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usb: dwc3: amend UTMI/UTMIW phy interface setup

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Let move 8/16-bit UTMI+ interface initialization into DWC3 core init
that is convenient for both DM_USB and u-boot traditional process.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Frank Wang
2020-05-26 11:34:30 +08:00
committed by Kever Yang
parent fafaa02290
commit 646979425a
4 changed files with 82 additions and 31 deletions
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5
drivers/usb/dwc3/core.h
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@@ -22,6 +22,7 @@
#include <linux/usb/ch9.h>
#include <linux/usb/otg.h>
#include <linux/usb/phy.h>
#define DWC3_MSG_MAX 500
@@ -659,6 +660,9 @@ struct dwc3_scratchpad_array {
* @maximum_speed: maximum speed requested (mainly for testing purposes)
* @revision: revision register contents
* @dr_mode: requested mode of operation
* @hsphy_mode: UTMI phy mode, one of following:
* - USBPHY_INTERFACE_MODE_UTMI
* - USBPHY_INTERFACE_MODE_UTMIW
* @dcfg: saved contents of DCFG register
* @gctl: saved contents of GCTL register
* @isoch_delay: wValue from Set Isochronous Delay request;
@@ -750,6 +754,7 @@ struct dwc3 {
size_t regs_size;
enum usb_dr_mode dr_mode;
enum usb_phy_interface hsphy_mode;
/* used for suspend/resume */
u32 dcfg;