diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index 950ec1e793c..c20e05ec7fd 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -49,4 +49,15 @@ void dram_bank_mmu_setup(int bank);
  */
 #define ARCH_DMA_MINALIGN	CONFIG_SYS_CACHELINE_SIZE
 
+/*
+ * arm_reserve_mmu() - Reserve memory for MMU TLB table
+ *
+ * Default implementation for reserving memory for MMU TLB table. It is used
+ * during generic board init sequence in common/board_f.c. Weakly defined, so
+ * that machines can override it if needed.
+ *
+ * Return: 0 if OK
+ */
+int arm_reserve_mmu(void);
+
 #endif /* _ASM_CACHE_H */
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index b8e1e340a16..3cbed602eb1 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -122,6 +122,11 @@ void invalidate_l2_cache(void)
 #endif
 
 __weak int reserve_mmu(void)
+{
+	return arm_reserve_mmu();
+}
+
+__weak int arm_reserve_mmu(void)
 {
 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
 	/* reserve TLB table */
diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 829a6c1b3e5..1b760ba5de3 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/cache.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -107,7 +108,7 @@ u64 get_page_table_size(void)
 }
 
 #if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU)
-int reserve_mmu(void)
+int arm_reserve_mmu(void)
 {
 	tcm_init(TCM_LOCK);
 	gd->arch.tlb_size = PGTABLE_SIZE;
diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
index 442427bc110..811684a9f88 100644
--- a/arch/arm/mach-zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -11,6 +11,7 @@
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
 #include <zynqmp_firmware.h>
+#include <asm/cache.h>
 
 #define ZYNQ_SILICON_VER_MASK	0xF000
 #define ZYNQ_SILICON_VER_SHIFT	12
@@ -116,7 +117,7 @@ void tcm_init(u8 mode)
 #endif
 
 #ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
-int reserve_mmu(void)
+int arm_reserve_mmu(void)
 {
 	tcm_init(TCM_LOCK);
 	gd->arch.tlb_size = PGTABLE_SIZE;