mirror of
https://xff.cz/git/u-boot/
synced 2025-09-02 09:12:08 +02:00
mtd: spi-nor: Enable QE bit for ISSI flash
Enable QE bit for ISSI flash chips. QE enablement logic is similar to what Macronix has, so reuse the existing code itself. Cc: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
@@ -325,6 +325,7 @@ static int set_4byte(struct spi_nor *nor, const struct flash_info *info,
|
|||||||
case SNOR_MFR_MICRON:
|
case SNOR_MFR_MICRON:
|
||||||
/* Some Micron need WREN command; all will accept it */
|
/* Some Micron need WREN command; all will accept it */
|
||||||
need_wren = true;
|
need_wren = true;
|
||||||
|
case SNOR_MFR_ISSI:
|
||||||
case SNOR_MFR_MACRONIX:
|
case SNOR_MFR_MACRONIX:
|
||||||
case SNOR_MFR_WINBOND:
|
case SNOR_MFR_WINBOND:
|
||||||
if (need_wren)
|
if (need_wren)
|
||||||
|
@@ -22,6 +22,7 @@
|
|||||||
#define SNOR_MFR_INTEL CFI_MFR_INTEL
|
#define SNOR_MFR_INTEL CFI_MFR_INTEL
|
||||||
#define SNOR_MFR_ST CFI_MFR_ST /* ST Micro <--> Micron */
|
#define SNOR_MFR_ST CFI_MFR_ST /* ST Micro <--> Micron */
|
||||||
#define SNOR_MFR_MICRON CFI_MFR_MICRON /* ST Micro <--> Micron */
|
#define SNOR_MFR_MICRON CFI_MFR_MICRON /* ST Micro <--> Micron */
|
||||||
|
#define SNOR_MFR_ISSI CFI_MFR_PMC
|
||||||
#define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
|
#define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
|
||||||
#define SNOR_MFR_SPANSION CFI_MFR_AMD
|
#define SNOR_MFR_SPANSION CFI_MFR_AMD
|
||||||
#define SNOR_MFR_SST CFI_MFR_SST
|
#define SNOR_MFR_SST CFI_MFR_SST
|
||||||
|
Reference in New Issue
Block a user