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stm32f7: stm32f746-disco: read memory info from device tree

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Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
This commit is contained in:
Vikas Manocha
2017-04-10 15:03:01 -07:00
committed by Tom Rini
parent 2f80a9f72e
commit 57af3cc32a
3 changed files with 32 additions and 19 deletions
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44
board/st/stm32f746-disco/stm32f746-disco.c
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@@ -21,32 +21,51 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
{
int mr_node;
mr_node = fdt_path_offset(gd->fdt_blob, "/memory");
if (mr_node < 0)
return mr_node;
*mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node,
"reg", 0, mr_size, false);
debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size);
return 0;
}
int dram_init(void) int dram_init(void)
{ {
struct udevice *dev; struct udevice *dev;
struct ram_info ram;
int rv; int rv;
fdt_addr_t mr_base, mr_size;
rv = uclass_get_device(UCLASS_RAM, 0, &dev); rv = uclass_get_device(UCLASS_RAM, 0, &dev);
if (rv) { if (rv) {
debug("DRAM init failed: %d\n", rv); debug("DRAM init failed: %d\n", rv);
return rv; return rv;
} }
rv = ram_get_info(dev, &ram);
if (rv) {
debug("Cannot get DRAM size: %d\n", rv);
return rv;
}
debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
gd->ram_size = ram.size;
rv = get_memory_base_size(&mr_base, &mr_size);
if (rv)
return rv;
gd->ram_size = mr_size;
gd->ram_top = mr_base;
return rv;
}
int dram_init_banksize(void)
{
fdt_addr_t mr_base, mr_size;
get_memory_base_size(&mr_base, &mr_size);
/* /*
* Fill in global info with description of SRAM configuration * Fill in global info with description of SRAM configuration
*/ */
gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE; gd->bd->bi_dram[0].start = mr_base;
gd->bd->bi_dram[0].size = ram.size; gd->bd->bi_dram[0].size = mr_size;
return rv; return 0;
} }
#ifdef CONFIG_ETH_DESIGNWARE #ifdef CONFIG_ETH_DESIGNWARE
@@ -111,7 +130,6 @@ int board_late_init(void)
int board_init(void) int board_init(void)
{ {
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
return 0; return 0;
} }

1
drivers/ram/stm32_sdram.c
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@@ -179,7 +179,6 @@ static int stm32_fmc_probe(struct udevice *dev)
static int stm32_fmc_get_info(struct udevice *dev, struct ram_info *info) static int stm32_fmc_get_info(struct udevice *dev, struct ram_info *info)
{ {
info->size = CONFIG_SYS_RAM_SIZE;
return 0; return 0;
} }

6
include/configs/stm32f746-disco.h
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@@ -16,11 +16,7 @@
* Configuration of the external SDRAM memory * Configuration of the external SDRAM memory
*/ */
#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_RAM_SIZE (8 * 1024 * 1024) #define CONFIG_SYS_RAM_FREQ_DIV 2
#define CONFIG_SYS_RAM_CS 1
#define CONFIG_SYS_RAM_FREQ_DIV 2
#define CONFIG_SYS_RAM_BASE 0xC0000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE
#define CONFIG_SYS_LOAD_ADDR 0xC0400000 #define CONFIG_SYS_LOAD_ADDR 0xC0400000
#define CONFIG_LOADADDR 0xC0400000 #define CONFIG_LOADADDR 0xC0400000