azure/gitlab/travis: Add RISC-V SPL testing

This adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64,
we test SPL running in M-mode and U-Boot proper running in S-mode,
with a 4-core SMP configuration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

.azure-pipelines.yml

@@ -224,6 +224,14 @@ jobs:
           TEST_PY_BD: "qemu-riscv64"
           TEST_PY_TEST_SPEC: "not sleep"
           BUILDMAN: "^qemu-riscv64$"
+        qemu_riscv32_spl:
+          TEST_PY_BD: "qemu-riscv32_spl"
+          TEST_PY_TEST_SPEC: "not sleep"
+          BUILDMAN: "^qemu-riscv32_spl$"
+        qemu_riscv64_spl:
+          TEST_PY_BD: "qemu-riscv64_spl"
+          TEST_PY_TEST_SPEC: "not sleep"
+          BUILDMAN: "^qemu-riscv64_spl$"
         qemu_x86:
           TEST_PY_BD: "qemu-x86"
           TEST_PY_TEST_SPEC: "not sleep"
@@ -271,6 +279,14 @@ jobs:
           cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
           cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
           cp /opt/grub/grubarm.efi ~/grub_arm.efi
+          if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
+              wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ;
+              export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+          fi
+          if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
+              wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ;
+              export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+          fi
           # the below corresponds to .gitlab-ci.yml "script"
           cd ${WORK_DIR}
           if [[ "${BUILDMAN}" != "" ]]; then

.gitlab-ci.yml

@@ -24,6 +24,14 @@ stages:
     - cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
     - cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
     - cp /opt/grub/grubarm.efi ~/grub_arm.efi
+    - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
+        wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ;
+        export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+      fi
+    - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
+        wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ;
+        export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+      fi
 
   after_script:
     - rm -rf /tmp/uboot-test-hooks /tmp/venv
@@ -314,6 +322,22 @@ qemu-riscv64 test.py:
     BUILDMAN: "^qemu-riscv64$"
   <<: *buildman_and_testpy_dfn
 
+qemu-riscv32_spl test.py:
+  tags: [ 'all' ]
+  variables:
+    TEST_PY_BD: "qemu-riscv32_spl"
+    TEST_PY_TEST_SPEC: "not sleep"
+    BUILDMAN: "^qemu-riscv32_spl$"
+  <<: *buildman_and_testpy_dfn
+
+qemu-riscv64_spl test.py:
+  tags: [ 'all' ]
+  variables:
+    TEST_PY_BD: "qemu-riscv64_spl"
+    TEST_PY_TEST_SPEC: "not sleep"
+    BUILDMAN: "^qemu-riscv64_spl$"
+  <<: *buildman_and_testpy_dfn
+
 qemu-x86 test.py:
   tags: [ 'all' ]
   variables:

.travis.yml

@@ -191,6 +191,14 @@ before_script:
        true &&
        popd;
     fi
+  - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
+       wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ;
+       export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+    fi
+  - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
+       wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ;
+       export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
+    fi
 
 script:
  # Comments must be outside the command strings below, or the Travis parser
@@ -586,6 +594,20 @@ matrix:
           QEMU_TARGET="riscv64-softmmu"
           BUILDMAN="^qemu-riscv64$"
           TOOLCHAIN="riscv"
+    - name: "test/py qemu-riscv32_spl"
+      env:
+        - TEST_PY_BD="qemu-riscv32_spl"
+          TEST_PY_TEST_SPEC="not sleep"
+          QEMU_TARGET="riscv32-softmmu"
+          BUILDMAN="^qemu-riscv32_spl$"
+          TOOLCHAIN="riscv"
+    - name: "test/py qemu-riscv64_spl"
+      env:
+        - TEST_PY_BD="qemu-riscv64_spl"
+          TEST_PY_TEST_SPEC="not sleep"
+          QEMU_TARGET="riscv64-softmmu"
+          BUILDMAN="^qemu-riscv64_spl$"
+          TOOLCHAIN="riscv"
     - name: "test/py qemu-x86"
       env:
         - TEST_PY_BD="qemu-x86"