dany/u-boot-megous
1
0
Fork 0
mirror of https://xff.cz/git/u-boot/ synced 2025-09-02 17:22:22 +02:00
Code Issues Packages Projects Releases Wiki Activity

x86: pinctrl: Add a way to get the pinctrl reg address

Browse Source 
At present we can query the offset of a pinctrl register within the p2sb.
For ACPI we need to get the actual address of the register. Add a function
to handle this and rename the old one to more accurately reflect its
purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
This commit is contained in:
Simon Glass
2020-07-07 21:32:19 -06:00
committed by Bin Meng
parent 54bcca2973
commit 4916f4586e
5 changed files with 51 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
arch/x86/include/asm/intel_pinctrl.h
View File

@@ -263,11 +263,23 @@ int pinctrl_read_pads(struct udevice *dev, ofnode node, const char *prop,
int pinctrl_count_pads(struct udevice *dev, u32 *pads, int size); int pinctrl_count_pads(struct udevice *dev, u32 *pads, int size);
/** /**
* intel_pinctrl_get_config_reg_addr() - Get address of the pin config registers * intel_pinctrl_get_config_reg_offset() - Get offset of pin config registers
*
* This works out the register offset of a pin within the p2sb region.
* *
* @dev: Pinctrl device * @dev: Pinctrl device
* @offset: GPIO offset within this device * @offset: GPIO offset within this device
* @return register offset within the GPIO p2sb region * @return register offset of first register within the GPIO p2sb region
*/
u32 intel_pinctrl_get_config_reg_offset(struct udevice *dev, uint offset);
/**
* intel_pinctrl_get_config_reg_addr() - Get address of pin config registers
*
* This works out the absolute address of the registers for a pin
* @dev: Pinctrl device
* @offset: GPIO offset within this device
* @return register address of first register within the GPIO p2sb region
*/ */
u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset); u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset);

15
drivers/gpio/intel_gpio.c
View File

@@ -24,7 +24,9 @@
static int intel_gpio_direction_input(struct udevice *dev, uint offset) static int intel_gpio_direction_input(struct udevice *dev, uint offset)
{ {
struct udevice *pinctrl = dev_get_parent(dev); struct udevice *pinctrl = dev_get_parent(dev);
uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset); uint config_offset;
config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
pcr_clrsetbits32(pinctrl, config_offset, pcr_clrsetbits32(pinctrl, config_offset,
PAD_CFG0_MODE_MASK | PAD_CFG0_TX_STATE | PAD_CFG0_MODE_MASK | PAD_CFG0_TX_STATE |
@@ -38,7 +40,9 @@ static int intel_gpio_direction_output(struct udevice *dev, uint offset,
int value) int value)
{ {
struct udevice *pinctrl = dev_get_parent(dev); struct udevice *pinctrl = dev_get_parent(dev);
uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset); uint config_offset;
config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
pcr_clrsetbits32(pinctrl, config_offset, pcr_clrsetbits32(pinctrl, config_offset,
PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE | PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE |
@@ -68,10 +72,13 @@ static int intel_gpio_get_value(struct udevice *dev, uint offset)
return 0; return 0;
} }
static int intel_gpio_set_value(struct udevice *dev, unsigned offset, int value) static int intel_gpio_set_value(struct udevice *dev, unsigned int offset,
int value)
{ {
struct udevice *pinctrl = dev_get_parent(dev); struct udevice *pinctrl = dev_get_parent(dev);
uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset); uint config_offset;
config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
pcr_clrsetbits32(pinctrl, config_offset, PAD_CFG0_TX_STATE, pcr_clrsetbits32(pinctrl, config_offset, PAD_CFG0_TX_STATE,
value ? PAD_CFG0_TX_STATE : 0); value ? PAD_CFG0_TX_STATE : 0);

16
drivers/misc/p2sb-uclass.c
View File

@@ -18,7 +18,7 @@
#define PCR_COMMON_IOSF_1_0 1 #define PCR_COMMON_IOSF_1_0 1
static void *_pcr_reg_address(struct udevice *dev, uint offset) void *pcr_reg_address(struct udevice *dev, uint offset)
{ {
struct p2sb_child_platdata *pplat = dev_get_parent_platdata(dev); struct p2sb_child_platdata *pplat = dev_get_parent_platdata(dev);
struct udevice *p2sb = dev_get_parent(dev); struct udevice *p2sb = dev_get_parent(dev);
@@ -55,7 +55,7 @@ uint pcr_read32(struct udevice *dev, uint offset)
/* Ensure the PCR offset is correctly aligned */ /* Ensure the PCR offset is correctly aligned */
assert(IS_ALIGNED(offset, sizeof(uint32_t))); assert(IS_ALIGNED(offset, sizeof(uint32_t)));
ptr = _pcr_reg_address(dev, offset); ptr = pcr_reg_address(dev, offset);
val = readl(ptr); val = readl(ptr);
unmap_sysmem(ptr); unmap_sysmem(ptr);
@@ -67,7 +67,7 @@ uint pcr_read16(struct udevice *dev, uint offset)
/* Ensure the PCR offset is correctly aligned */ /* Ensure the PCR offset is correctly aligned */
check_pcr_offset_align(offset, sizeof(uint16_t)); check_pcr_offset_align(offset, sizeof(uint16_t));
return readw(_pcr_reg_address(dev, offset)); return readw(pcr_reg_address(dev, offset));
} }
uint pcr_read8(struct udevice *dev, uint offset) uint pcr_read8(struct udevice *dev, uint offset)
@@ -75,7 +75,7 @@ uint pcr_read8(struct udevice *dev, uint offset)
/* Ensure the PCR offset is correctly aligned */ /* Ensure the PCR offset is correctly aligned */
check_pcr_offset_align(offset, sizeof(uint8_t)); check_pcr_offset_align(offset, sizeof(uint8_t));
return readb(_pcr_reg_address(dev, offset)); return readb(pcr_reg_address(dev, offset));
} }
/* /*
@@ -86,7 +86,7 @@ uint pcr_read8(struct udevice *dev, uint offset)
*/ */
static void write_completion(struct udevice *dev, uint offset) static void write_completion(struct udevice *dev, uint offset)
{ {
readl(_pcr_reg_address(dev, ALIGN_DOWN(offset, sizeof(uint32_t)))); readl(pcr_reg_address(dev, ALIGN_DOWN(offset, sizeof(uint32_t))));
} }
void pcr_write32(struct udevice *dev, uint offset, uint indata) void pcr_write32(struct udevice *dev, uint offset, uint indata)
@@ -94,7 +94,7 @@ void pcr_write32(struct udevice *dev, uint offset, uint indata)
/* Ensure the PCR offset is correctly aligned */ /* Ensure the PCR offset is correctly aligned */
assert(IS_ALIGNED(offset, sizeof(indata))); assert(IS_ALIGNED(offset, sizeof(indata)));
writel(indata, _pcr_reg_address(dev, offset)); writel(indata, pcr_reg_address(dev, offset));
/* Ensure the writes complete */ /* Ensure the writes complete */
write_completion(dev, offset); write_completion(dev, offset);
} }
@@ -104,7 +104,7 @@ void pcr_write16(struct udevice *dev, uint offset, uint indata)
/* Ensure the PCR offset is correctly aligned */ /* Ensure the PCR offset is correctly aligned */
check_pcr_offset_align(offset, sizeof(uint16_t)); check_pcr_offset_align(offset, sizeof(uint16_t));
writew(indata, _pcr_reg_address(dev, offset)); writew(indata, pcr_reg_address(dev, offset));
/* Ensure the writes complete */ /* Ensure the writes complete */
write_completion(dev, offset); write_completion(dev, offset);
} }
@@ -114,7 +114,7 @@ void pcr_write8(struct udevice *dev, uint offset, uint indata)
/* Ensure the PCR offset is correctly aligned */ /* Ensure the PCR offset is correctly aligned */
check_pcr_offset_align(offset, sizeof(uint8_t)); check_pcr_offset_align(offset, sizeof(uint8_t));
writeb(indata, _pcr_reg_address(dev, offset)); writeb(indata, pcr_reg_address(dev, offset));
/* Ensure the writes complete */ /* Ensure the writes complete */
write_completion(dev, offset); write_completion(dev, offset);
} }

11
drivers/pinctrl/intel/pinctrl.c
View File

@@ -394,7 +394,7 @@ static int pinctrl_configure_pad(struct udevice *dev,
return 0; return 0;
} }
u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset) u32 intel_pinctrl_get_config_reg_offset(struct udevice *dev, uint offset)
{ {
struct intel_pinctrl_priv *priv = dev_get_priv(dev); struct intel_pinctrl_priv *priv = dev_get_priv(dev);
const struct pad_community *comm = priv->comm; const struct pad_community *comm = priv->comm;
@@ -407,9 +407,16 @@ u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset)
return config_offset; return config_offset;
} }
u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset)
{
uint config_offset = intel_pinctrl_get_config_reg_offset(dev, offset);
return (u32)(ulong)pcr_reg_address(dev, config_offset);
}
u32 intel_pinctrl_get_config_reg(struct udevice *dev, uint offset) u32 intel_pinctrl_get_config_reg(struct udevice *dev, uint offset)
{ {
uint config_offset = intel_pinctrl_get_config_reg_addr(dev, offset); uint config_offset = intel_pinctrl_get_config_reg_offset(dev, offset);
return pcr_read32(dev, config_offset); return pcr_read32(dev, config_offset);
} }

9
include/p2sb.h
View File

@@ -132,4 +132,13 @@ int p2sb_set_port_id(struct udevice *dev, int portid);
*/ */
int p2sb_get_port_id(struct udevice *dev); int p2sb_get_port_id(struct udevice *dev);
/**
* pcr_reg_address() Convert an offset in p2sb space to an absolute address
*
* @dev: Child device (whose parent is UCLASS_P2SB)
* @offset: Offset within that child's address space
* @return pointer to that offset within the child's address space
*/
void *pcr_reg_address(struct udevice *dev, uint offset);
#endif #endif