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ARM: uniphier: fix DSPLL init code for LD20 SoC

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Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Dai Okamura
2017-08-28 21:57:15 +09:00
committed by Masahiro Yamada
parent e0daca7de5
commit 4013bbb1f3
1 changed files with 3 additions and 3 deletions
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6
arch/arm/mach-uniphier/clk/pll-base-ld20.c
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@@ -88,7 +88,7 @@ int uniphier_ld20_sscpll_set_regi(unsigned long reg_base, unsigned regi)
if (!base) if (!base)
return -ENOMEM; return -ENOMEM;
tmp = readl(base + 8); /* SSCPLLCTRL */ tmp = readl(base + 8); /* SSCPLLCTRL3 */
tmp &= ~SC_PLLCTRL3_REGI_MASK; tmp &= ~SC_PLLCTRL3_REGI_MASK;
tmp |= regi << SC_PLLCTRL3_REGI_SHIFT; tmp |= regi << SC_PLLCTRL3_REGI_SHIFT;
writel(tmp, base + 8); writel(tmp, base + 8);
@@ -133,9 +133,9 @@ int uniphier_ld20_dspll_init(unsigned long reg_base)
if (!base) if (!base)
return -ENOMEM; return -ENOMEM;
tmp = readl(base + 8); /* DSPLLCTRL2 */ tmp = readl(base + 4); /* DSPLLCTRL2 */
tmp |= SC_DSPLLCTRL2_K_LD; tmp |= SC_DSPLLCTRL2_K_LD;
writel(tmp, base + 8); writel(tmp, base + 4);
iounmap(base); iounmap(base);