mirror of
https://xff.cz/git/u-boot/
synced 2025-09-01 16:52:14 +02:00
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-samsung
- Various exynos fixes
This commit is contained in:
@@ -17,7 +17,7 @@
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serial0 = "/serial@13800000";
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serial0 = "/serial@13800000";
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console = "/serial@13810000";
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console = "/serial@13810000";
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mmc0 = &mshc_0;
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mmc0 = &mshc_0;
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mmc1 = &sdhci2;
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mmc2 = &sdhci2;
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};
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};
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serial@13810000 {
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serial@13810000 {
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@@ -236,6 +236,7 @@
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&sdhci2 {
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&sdhci2 {
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samsung,bus-width = <4>;
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samsung,bus-width = <4>;
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samsung,timing = <1 2 3>;
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samsung,timing = <1 2 3>;
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cd-inverted;
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cd-gpios = <&gpk2 2 0>;
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cd-gpios = <&gpk2 2 0>;
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status = "okay";
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status = "okay";
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};
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};
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@@ -10,7 +10,7 @@
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#include "exynos54xx.dtsi"
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#include "exynos54xx.dtsi"
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/ {
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/ {
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model = "Odroid XU3 based on EXYNOS5422";
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model = "Odroid XU3/XU4/HC1/HC2 based on Exynos5422";
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compatible = "samsung,odroidxu3", "samsung,exynos5";
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compatible = "samsung,odroidxu3", "samsung,exynos5";
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aliases {
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aliases {
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@@ -17,6 +17,7 @@
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#define EXYNOS4_GPIO_PART3_BASE 0x03860000
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#define EXYNOS4_GPIO_PART3_BASE 0x03860000
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#define EXYNOS4_PRO_ID 0x10000000
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#define EXYNOS4_PRO_ID 0x10000000
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#define EXYNOS4_OP_MODE 0x10000008
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#define EXYNOS4_SYSREG_BASE 0x10010000
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#define EXYNOS4_SYSREG_BASE 0x10010000
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#define EXYNOS4_POWER_BASE 0x10020000
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#define EXYNOS4_POWER_BASE 0x10020000
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#define EXYNOS4_SWRESET 0x10020400
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#define EXYNOS4_SWRESET 0x10020400
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@@ -25,6 +25,8 @@
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#include <asm/arch/sromc.h>
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#include <asm/arch/sromc.h>
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#include <lcd.h>
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#include <lcd.h>
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#include <i2c.h>
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#include <i2c.h>
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#include <mmc.h>
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#include <stdio_dev.h>
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#include <usb.h>
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#include <usb.h>
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#include <dwc3-uboot.h>
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#include <dwc3-uboot.h>
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#include <samsung/misc.h>
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#include <samsung/misc.h>
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@@ -43,6 +45,20 @@ __weak int exynos_power_init(void)
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return 0;
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return 0;
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}
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}
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/**
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* get_boot_mmc_dev() - read boot MMC device id from XOM[7:5] pins.
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*/
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static int get_boot_mmc_dev(void)
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{
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u32 mode = readl(EXYNOS4_OP_MODE) & 0x1C;
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if (mode == 0x04)
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return 2; /* MMC2: SD */
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/* MMC0: eMMC or unknown */
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return 0;
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}
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#if defined CONFIG_EXYNOS_TMU
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#if defined CONFIG_EXYNOS_TMU
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/* Boot Time Thermal Analysis for SoC temperature threshold breach */
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/* Boot Time Thermal Analysis for SoC temperature threshold breach */
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static void boot_temp_check(void)
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static void boot_temp_check(void)
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@@ -281,6 +297,8 @@ int board_late_init(void)
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{
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{
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struct udevice *dev;
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struct udevice *dev;
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int ret;
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int ret;
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int mmcbootdev = get_boot_mmc_dev();
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char mmcbootdev_str[16];
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stdio_print_current_devices();
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stdio_print_current_devices();
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ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
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ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
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@@ -293,6 +311,11 @@ int board_late_init(void)
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panic("Cannot init cros-ec device");
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panic("Cannot init cros-ec device");
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return -1;
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return -1;
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}
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}
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printf("Boot device: MMC(%u)\n", mmcbootdev);
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sprintf(mmcbootdev_str, "%u", mmcbootdev);
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env_set("mmcbootdev", mmcbootdev_str);
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return 0;
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return 0;
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}
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}
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#endif
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#endif
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@@ -360,3 +383,8 @@ int board_usb_cleanup(int index, enum usb_init_type init)
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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int mmc_get_env_dev(void)
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{
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return get_boot_mmc_dev();
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}
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@@ -67,7 +67,7 @@ static int odroid_get_adc_val(unsigned int *adcval)
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unsigned int adcval_prev = 0;
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unsigned int adcval_prev = 0;
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int ret, retries = 20;
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int ret, retries = 20;
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ret = adc_channel_single_shot("adc", CONFIG_ODROID_REV_AIN,
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ret = adc_channel_single_shot("adc@12D10000", CONFIG_ODROID_REV_AIN,
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&adcval_prev);
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&adcval_prev);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@@ -75,8 +75,8 @@ static int odroid_get_adc_val(unsigned int *adcval)
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while (retries--) {
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while (retries--) {
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mdelay(5);
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mdelay(5);
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ret = adc_channel_single_shot("adc", CONFIG_ODROID_REV_AIN,
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ret = adc_channel_single_shot("adc@12D10000",
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adcval);
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CONFIG_ODROID_REV_AIN, adcval);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@@ -129,7 +129,7 @@ static const char *odroid_get_type_str(void)
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if (gd->board_type != EXYNOS5_BOARD_ODROID_XU3_REV02)
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if (gd->board_type != EXYNOS5_BOARD_ODROID_XU3_REV02)
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goto exit;
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goto exit;
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ret = pmic_get("s2mps11", &dev);
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ret = pmic_get("s2mps11_pmic@66", &dev);
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if (ret)
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if (ret)
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goto exit;
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goto exit;
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@@ -65,9 +65,9 @@ int exynos_power_init(void)
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int ret;
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int ret;
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#ifdef CONFIG_PMIC_S2MPS11
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#ifdef CONFIG_PMIC_S2MPS11
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ret = pmic_get("s2mps11_pmic", &dev);
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ret = pmic_get("s2mps11_pmic@66", &dev);
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#else
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#else
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ret = pmic_get("max77686", &dev);
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ret = pmic_get("max77686_pmic@09", &dev);
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if (!ret) {
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if (!ret) {
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/* TODO(sjg@chromium.org): Move into the clock/pmic API */
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/* TODO(sjg@chromium.org): Move into the clock/pmic API */
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ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
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ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
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@@ -79,7 +79,7 @@ int exynos_power_init(void)
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if (ret)
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if (ret)
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return ret;
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return ret;
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} else {
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} else {
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ret = pmic_get("s5m8767-pmic", &dev);
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ret = pmic_get("s5m8767_pmic@66", &dev);
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/* TODO(sjg@chromium.org): Use driver model to access clock */
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/* TODO(sjg@chromium.org): Use driver model to access clock */
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#ifdef CONFIG_PMIC_S5M8767
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#ifdef CONFIG_PMIC_S5M8767
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if (!ret)
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if (!ret)
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@@ -14,6 +14,7 @@ CONFIG_FIT_BEST_MATCH=y
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CONFIG_SILENT_CONSOLE=y
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CONFIG_SILENT_CONSOLE=y
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CONFIG_CONSOLE_MUX=y
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CONFIG_CONSOLE_MUX=y
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CONFIG_MISC_INIT_R=y
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CONFIG_MISC_INIT_R=y
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CONFIG_BOARD_LATE_INIT=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_BOARD_TYPES=y
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CONFIG_BOARD_TYPES=y
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@@ -17,6 +17,7 @@ CONFIG_BOOTARGS="Please use defined boot"
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_MISC_INIT_R=y
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CONFIG_MISC_INIT_R=y
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_BOARD_TYPES=y
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CONFIG_BOARD_TYPES=y
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CONFIG_SYS_PROMPT="Odroid # "
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CONFIG_SYS_PROMPT="Odroid # "
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# CONFIG_CMD_XIMG is not set
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# CONFIG_CMD_XIMG is not set
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@@ -204,8 +204,13 @@ static int s5p_sdhci_probe(struct udevice *dev)
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if (ret)
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if (ret)
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return ret;
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return ret;
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ret = mmc_of_parse(dev, &plat->cfg);
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if (ret)
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return ret;
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host->mmc = &plat->mmc;
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host->mmc = &plat->mmc;
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host->mmc->dev = dev;
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host->mmc->dev = dev;
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ret = sdhci_setup_cfg(&plat->cfg, host, 0, 400000);
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ret = sdhci_setup_cfg(&plat->cfg, host, 0, 400000);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@@ -80,7 +80,7 @@
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"tzsw raw 0x83f 0x138\0"
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"tzsw raw 0x83f 0x138\0"
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#define BOOT_TARGET_DEVICES(func) \
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 2) \
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func(MMC, mmc, 0)
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func(MMC, mmc, 0)
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#include <config_distro_bootcmd.h>
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#include <config_distro_bootcmd.h>
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@@ -146,13 +146,13 @@
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"run kernel_args;" \
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"run kernel_args;" \
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"bootz ${kernel_addr_r} ${initrd_addr} ${fdt_addr};\0" \
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"bootz ${kernel_addr_r} ${initrd_addr} ${fdt_addr};\0" \
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"autoboot=" \
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"autoboot=" \
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"if test -e mmc 0 boot.scr; then; " \
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"if test -e mmc ${mmcbootdev} boot.scr; then; " \
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"run boot_script; " \
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"run boot_script; " \
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"elif test -e mmc 0 Image.itb; then; " \
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"elif test -e mmc ${mmcbootdev} Image.itb; then; " \
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"run boot_fit;" \
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"run boot_fit;" \
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"elif test -e mmc 0 zImage; then; " \
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"elif test -e mmc ${mmcbootdev} zImage; then; " \
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"run boot_zimg;" \
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"run boot_zimg;" \
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"elif test -e mmc 0 uImage; then; " \
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"elif test -e mmc ${mmcbootdev} uImage; then; " \
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"run boot_uimg;" \
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"run boot_uimg;" \
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"fi;\0" \
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"fi;\0" \
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"console=" CONFIG_DEFAULT_CONSOLE \
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"console=" CONFIG_DEFAULT_CONSOLE \
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