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ddr: imx93: Add 625M bypass clock support

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Add 625M bypass clock that may be used DRAM 625M
bypass mode support.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Jacky Bai
2023-04-28 12:08:42 +08:00
committed by Stefano Babic
parent 456f7ff8b2
commit 37eb821e2e
2 changed files with 6 additions and 0 deletions
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3
arch/arm/mach-imx/imx9/clock.c
View File

@@ -648,6 +648,9 @@ void dram_pll_init(ulong pll_val)
void dram_enable_bypass(ulong clk_val)
{
switch (clk_val) {
case MHZ(625):
ccm_clk_root_cfg(DRAM_ALT_CLK_ROOT, SYS_PLL_PFD2, 1);
break;
case MHZ(400):
ccm_clk_root_cfg(DRAM_ALT_CLK_ROOT, SYS_PLL_PFD1, 2);
break;

3
drivers/ddr/imx/phy/ddrphy_utils.c
View File

@@ -148,6 +148,9 @@ void ddrphy_init_set_dfi_clk(unsigned int drate)
dram_pll_init(MHZ(167));
dram_disable_bypass();
break;
case 625:
dram_enable_bypass(MHZ(625));
break;
case 400:
dram_enable_bypass(MHZ(400));
break;