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ARM: dts: uniphier: sync DT with Linux 4.19-rc1

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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada
2018-09-10 12:58:32 +09:00
parent f88b6facb8
commit 33aae6b5ed
10 changed files with 15 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/dts/uniphier-ld11-global.dts
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@@ -54,12 +54,13 @@
sound { sound {
compatible = "audio-graph-card"; compatible = "audio-graph-card";
label = "UniPhier LD11"; label = "UniPhier LD11";
widgets = "Headphone", "Headphone Jack"; widgets = "Headphone", "Headphones";
dais = <&i2s_port2 dais = <&i2s_port2
&i2s_port3 &i2s_port3
&i2s_port4 &i2s_port4
&spdif_port0 &spdif_port0
&comp_spdif_port0>; &comp_spdif_port0>;
hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>;
}; };
spdif-out { spdif-out {

2
arch/arm/dts/uniphier-ld11.dtsi
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@@ -407,7 +407,7 @@
reg = <0x5a000000 0x400>; reg = <0x5a000000 0x400>;
interrupts = <0 78 4>; interrupts = <0 78 4>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc_1v8>; pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sys_clk 4>; clocks = <&sys_clk 4>;
resets = <&sys_rst 4>; resets = <&sys_rst 4>;
bus-width = <8>; bus-width = <8>;

3
arch/arm/dts/uniphier-ld20-global.dts
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@@ -54,12 +54,13 @@
sound { sound {
compatible = "audio-graph-card"; compatible = "audio-graph-card";
label = "UniPhier LD20"; label = "UniPhier LD20";
widgets = "Headphone", "Headphone Jack"; widgets = "Headphone", "Headphones";
dais = <&i2s_port2 dais = <&i2s_port2
&i2s_port3 &i2s_port3
&i2s_port4 &i2s_port4
&spdif_port0 &spdif_port0
&comp_spdif_port0>; &comp_spdif_port0>;
hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>;
}; };
spdif-out { spdif-out {

4
arch/arm/dts/uniphier-ld20.dtsi
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@@ -58,6 +58,7 @@
clocks = <&sys_clk 32>; clocks = <&sys_clk 32>;
enable-method = "psci"; enable-method = "psci";
operating-points-v2 = <&cluster0_opp>; operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
}; };
cpu2: cpu@100 { cpu2: cpu@100 {
@@ -77,6 +78,7 @@
clocks = <&sys_clk 33>; clocks = <&sys_clk 33>;
enable-method = "psci"; enable-method = "psci";
operating-points-v2 = <&cluster1_opp>; operating-points-v2 = <&cluster1_opp>;
#cooling-cells = <2>;
}; };
}; };
@@ -512,7 +514,7 @@
reg = <0x5a000000 0x400>; reg = <0x5a000000 0x400>;
interrupts = <0 78 4>; interrupts = <0 78 4>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc_1v8>; pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sys_clk 4>; clocks = <&sys_clk 4>;
resets = <&sys_rst 4>; resets = <&sys_rst 4>;
bus-width = <8>; bus-width = <8>;

3
arch/arm/dts/uniphier-ld4.dtsi
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@@ -247,9 +247,8 @@
status = "disabled"; status = "disabled";
reg = <0x5a500000 0x200>; reg = <0x5a500000 0x200>;
interrupts = <0 78 4>; interrupts = <0 78 4>;
pinctrl-names = "default", "1.8v"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>; pinctrl-0 = <&pinctrl_emmc>;
pinctrl-1 = <&pinctrl_emmc_1v8>;
clocks = <&mio_clk 1>; clocks = <&mio_clk 1>;
reset-names = "host", "bridge"; reset-names = "host", "bridge";
resets = <&mio_rst 1>, <&mio_rst 4>; resets = <&mio_rst 1>, <&mio_rst 4>;

5
arch/arm/dts/uniphier-pinctrl.dtsi
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@@ -56,11 +56,6 @@
function = "emmc"; function = "emmc";
}; };
pinctrl_emmc_1v8: emmc-1v8 {
groups = "emmc", "emmc_dat8";
function = "emmc";
};
pinctrl_ether_mii: ether-mii { pinctrl_ether_mii: ether-mii {
groups = "ether_mii"; groups = "ether_mii";
function = "ether_mii"; function = "ether_mii";

3
arch/arm/dts/uniphier-pro4.dtsi
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@@ -281,9 +281,8 @@
status = "disabled"; status = "disabled";
reg = <0x5a500000 0x200>; reg = <0x5a500000 0x200>;
interrupts = <0 78 4>; interrupts = <0 78 4>;
pinctrl-names = "default", "1.8v"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>; pinctrl-0 = <&pinctrl_emmc>;
pinctrl-1 = <&pinctrl_emmc_1v8>;
clocks = <&mio_clk 1>; clocks = <&mio_clk 1>;
reset-names = "host", "bridge"; reset-names = "host", "bridge";
resets = <&mio_rst 1>, <&mio_rst 4>; resets = <&mio_rst 1>, <&mio_rst 4>;

3
arch/arm/dts/uniphier-pxs2.dtsi
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@@ -36,6 +36,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
operating-points-v2 = <&cpu_opp>; operating-points-v2 = <&cpu_opp>;
#cooling-cells = <2>;
}; };
cpu2: cpu@2 { cpu2: cpu@2 {
@@ -46,6 +47,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
operating-points-v2 = <&cpu_opp>; operating-points-v2 = <&cpu_opp>;
#cooling-cells = <2>;
}; };
cpu3: cpu@3 { cpu3: cpu@3 {
@@ -56,6 +58,7 @@
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
operating-points-v2 = <&cpu_opp>; operating-points-v2 = <&cpu_opp>;
#cooling-cells = <2>;
}; };
}; };

2
arch/arm/dts/uniphier-pxs3.dtsi
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@@ -327,7 +327,7 @@
reg = <0x5a000000 0x400>; reg = <0x5a000000 0x400>;
interrupts = <0 78 4>; interrupts = <0 78 4>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc_1v8>; pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sys_clk 4>; clocks = <&sys_clk 4>;
resets = <&sys_rst 4>; resets = <&sys_rst 4>;
bus-width = <8>; bus-width = <8>;

3
arch/arm/dts/uniphier-sld8.dtsi
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@@ -251,9 +251,8 @@
status = "disabled"; status = "disabled";
reg = <0x5a500000 0x200>; reg = <0x5a500000 0x200>;
interrupts = <0 78 4>; interrupts = <0 78 4>;
pinctrl-names = "default", "1.8v"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>; pinctrl-0 = <&pinctrl_emmc>;
pinctrl-1 = <&pinctrl_emmc_1v8>;
clocks = <&mio_clk 1>; clocks = <&mio_clk 1>;
reset-names = "host", "bridge"; reset-names = "host", "bridge";
resets = <&mio_rst 1>, <&mio_rst 4>; resets = <&mio_rst 1>, <&mio_rst 4>;