1
0
mirror of https://xff.cz/git/u-boot/ synced 2025-09-01 08:42:12 +02:00

fpga: xilinx: Fix the rest of CamelCases

No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek
2014-03-13 12:58:20 +01:00
parent f8c1be9816
commit 2df9d5c431
5 changed files with 99 additions and 99 deletions

View File

@@ -203,7 +203,7 @@ int astro5373l_altera_load(void)
}
/* Set the FPGA's PROG_B line to the specified level */
int xilinx_pgm_fn(int assert, int flush, int cookie)
int xilinx_pgm_config_fn(int assert, int flush, int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -218,7 +218,7 @@ int xilinx_pgm_fn(int assert, int flush, int cookie)
* Test the state of the active-low FPGA INIT line. Return 1 on INIT
* asserted (low).
*/
int xilinx_init_fn(int cookie)
int xilinx_init_config_fn(int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -226,7 +226,7 @@ int xilinx_init_fn(int cookie)
}
/* Test the state of the active-high FPGA DONE pin */
int xilinx_done_fn(int cookie)
int xilinx_done_config_fn(int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -234,7 +234,7 @@ int xilinx_done_fn(int cookie)
}
/* Abort an FPGA operation */
int xilinx_abort_fn(int cookie)
int xilinx_abort_config_fn(int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
/* ensure all SPI peripherals and FPGAs are deselected */
@@ -300,7 +300,7 @@ int xilinx_post_config_fn(int cookie)
return rc;
}
int xilinx_clk_fn(int assert_clk, int flush, int cookie)
int xilinx_clk_config_fn(int assert_clk, int flush, int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -311,7 +311,7 @@ int xilinx_clk_fn(int assert_clk, int flush, int cookie)
return assert_clk;
}
int xilinx_wr_fn(int assert_write, int flush, int cookie)
int xilinx_wr_config_fn(int assert_write, int flush, int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -322,7 +322,7 @@ int xilinx_wr_fn(int assert_write, int flush, int cookie)
return assert_write;
}
int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie)
int xilinx_fastwr_config_fn(void *buf, size_t len, int flush, int cookie)
{
size_t bytecount = 0;
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -365,13 +365,13 @@ int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie)
*/
xilinx_spartan3_slave_serial_fns xilinx_fns = {
xilinx_pre_config_fn,
xilinx_pgm_fn,
xilinx_clk_fn,
xilinx_init_fn,
xilinx_done_fn,
xilinx_wr_fn,
xilinx_pgm_config_fn,
xilinx_clk_config_fn,
xilinx_init_config_fn,
xilinx_done_config_fn,
xilinx_wr_config_fn,
0,
xilinx_fastwr_fn
xilinx_fastwr_config_fn
};
xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {
@@ -395,12 +395,12 @@ int astro5373l_xilinx_load(void)
* so set stuff here instead of static initialisation:
*/
xilinx_fns.pre = xilinx_pre_config_fn;
xilinx_fns.pgm = xilinx_pgm_fn;
xilinx_fns.clk = xilinx_clk_fn;
xilinx_fns.init = xilinx_init_fn;
xilinx_fns.done = xilinx_done_fn;
xilinx_fns.wr = xilinx_wr_fn;
xilinx_fns.bwr = xilinx_fastwr_fn;
xilinx_fns.pgm = xilinx_pgm_config_fn;
xilinx_fns.clk = xilinx_clk_config_fn;
xilinx_fns.init = xilinx_init_config_fn;
xilinx_fns.done = xilinx_done_config_fn;
xilinx_fns.wr = xilinx_wr_config_fn;
xilinx_fns.bwr = xilinx_fastwr_config_fn;
xilinx_fpga[i].iface_fns = (void *)&xilinx_fns;
fpga_add(fpga_xilinx, &xilinx_fpga[i]);
}