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arm64: zynqmp: Wire GEM reset gpio

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With ethernet-phy-id driver ETH phy reset can be properly handle that's why
describe it in DT.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5bfd92827033d19617113f4117f37dcf79699a0f.1662721547.git.michal.simek@amd.com
This commit is contained in:
Michal Simek
2022-09-09 13:05:49 +02:00
parent 13622c7a9d
commit 2b1db7b18c
6 changed files with 6 additions and 1 deletions
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2
arch/arm/dts/zynqmp-zcu102-revA.dts
View File

@@ -211,7 +211,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
/* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
};
};
};

1
arch/arm/dts/zynqmp-zcu104-revA.dts
View File

@@ -120,6 +120,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
};
};
};

1
arch/arm/dts/zynqmp-zcu104-revC.dts
View File

@@ -125,6 +125,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
};
};
};

1
arch/arm/dts/zynqmp-zcu111-revA.dts
View File

@@ -183,6 +183,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u22 6 GPIO_ACTIVE_LOW>;
};
};
};

1
arch/arm/dts/zynqmp-zcu208-revA.dts
View File

@@ -180,6 +180,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>;
};
};
};

1
arch/arm/dts/zynqmp-zcu216-revA.dts
View File

@@ -187,6 +187,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>;
};
};
};