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Add SGMII support to the tsec
Adds support for configuring the TBI to talk properly with the SerDes. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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@@ -60,6 +60,27 @@
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#define PHY_AUTONEGOTIATE_TIMEOUT 5000 /* in ms */
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/* TBI register addresses */
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#define TBI_CR 0x00
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#define TBI_SR 0x01
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#define TBI_ANA 0x04
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#define TBI_ANLPBPA 0x05
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#define TBI_ANEX 0x06
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#define TBI_TBICON 0x11
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/* TBI MDIO register bit fields*/
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#define TBICON_CLK_SELECT 0x0020
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#define TBIANA_ASYMMETRIC_PAUSE 0x0100
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#define TBIANA_SYMMETRIC_PAUSE 0x0080
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#define TBIANA_HALF_DUPLEX 0x0040
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#define TBIANA_FULL_DUPLEX 0x0020
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#define TBICR_PHY_RESET 0x8000
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#define TBICR_ANEG_ENABLE 0x1000
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#define TBICR_RESTART_ANEG 0x0200
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#define TBICR_FULL_DUPLEX 0x0100
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#define TBICR_SPEED1_SET 0x0040
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/* MAC register bits */
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#define MACCFG1_SOFT_RESET 0x80000000
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#define MACCFG1_RESET_RX_MC 0x00080000
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@@ -540,7 +561,9 @@ typedef struct tsec
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/* This flag currently only has
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* meaning if we're using the eTSEC */
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#define TSEC_REDUCED (1 << 1)
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#define TSEC_REDUCED (1 << 1)
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#define TSEC_SGMII (1 << 2)
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struct tsec_private {
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volatile tsec_t *regs;
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