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board: ns3: add support for Broadcom Northstar 3

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Add support for Broadcom Northstar 3 SoC.
NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors
targeting a broad range of networking applications.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Rayagonda Kokatanur
2020-07-15 22:48:55 +05:30
committed by Tom Rini
parent 423e08cb77
commit 291635aecf
9 changed files with 214 additions and 0 deletions
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10
arch/arm/Kconfig
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@@ -732,6 +732,15 @@ config TARGET_BCMNS2
ARMv8 Cortex-A57 processors targeting a broad range of networking
applications.
config TARGET_BCMNS3
bool "Support Broadcom NS3"
select ARM64
select BOARD_LATE_INIT
help
Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
ARMv8 Cortex-A72 processors targeting a broad range of networking
applications.
config ARCH_EXYNOS
bool "Samsung EXYNOS"
select DM
@@ -1916,6 +1925,7 @@ source "board/broadcom/bcm968580xref/Kconfig"
source "board/broadcom/bcmcygnus/Kconfig"
source "board/broadcom/bcmnsp/Kconfig"
source "board/broadcom/bcmns2/Kconfig"
source "board/broadcom/bcmns3/Kconfig"
source "board/cavium/thunderx/Kconfig"
source "board/cirrus/edb93xx/Kconfig"
source "board/eets/pdu001/Kconfig"

2
arch/arm/dts/Makefile
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@@ -930,6 +930,8 @@ dtb-$(CONFIG_ARCH_BCM68360) += \
dtb-$(CONFIG_ARCH_BCM6858) += \
bcm968580xref.dtb
dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb

24
arch/arm/dts/ns3-board.dts Normal file
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@@ -0,0 +1,24 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2020 Broadcom
*/
/dts-v1/;
#include "ns3.dtsi"
/ {
model = "NS3 model";
aliases {
serial0 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&uart1 {
status = "okay";
};

34
arch/arm/dts/ns3.dtsi Normal file
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@@ -0,0 +1,34 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2020 Broadcom
*/
#include "skeleton64.dtsi"
/ {
compatible = "brcm,ns3";
#address-cells = <2>;
#size-cells = <2>;
memory {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>,
<0x8 0x80000000 0x1 0x80000000>;
};
hsls {
compatible = "simple-bus";
dma-ranges;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x68900000 0x17700000>;
uart1: uart@110000 {
compatible = "snps,dw-apb-uart";
reg = <0x00110000 0x1000>;
reg-shift = <2>;
clock-frequency = <25000000>;
status = "disabled";
};
};
};