From f4bf81b01351f4d8918ee9ab6855dcb33acd4db8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 2 Mar 2022 12:47:51 +0100 Subject: [PATCH 01/18] env: sf: Allow to use env_sf_init_addr() at any stage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In some cases it makes sense to use env_sf_init_addr() also in SPL mode. Allow it for boards by providing custom implementation of weak function env_sf_get_env_addr(). When this function returns NULL it signals that address is invalid, like config option CONFIG_ENV_ADDR. There is no change in default behavior or in config options. Signed-off-by: Pali Rohár --- env/sf.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/env/sf.c b/env/sf.c index 6a4bb756f00..d2c07cd7168 100644 --- a/env/sf.c +++ b/env/sf.c @@ -24,10 +24,6 @@ #include #include -#ifndef CONFIG_SPL_BUILD -#define INITENV -#endif - #define OFFSET_INVALID (~(u32)0) #ifdef CONFIG_ENV_OFFSET_REDUND @@ -322,14 +318,15 @@ done: return ret; } -#if CONFIG_ENV_ADDR != 0x0 __weak void *env_sf_get_env_addr(void) { +#ifndef CONFIG_SPL_BUILD return (void *)CONFIG_ENV_ADDR; -} +#else + return NULL; #endif +} -#if defined(INITENV) && (CONFIG_ENV_ADDR != 0x0) /* * check if Environment on CONFIG_ENV_ADDR is valid. */ @@ -337,6 +334,9 @@ static int env_sf_init_addr(void) { env_t *env_ptr = (env_t *)env_sf_get_env_addr(); + if (!env_ptr) + return -ENOENT; + if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) { gd->env_addr = (ulong)&(env_ptr->data); gd->env_valid = ENV_VALID; @@ -346,7 +346,6 @@ static int env_sf_init_addr(void) return 0; } -#endif #if defined(CONFIG_ENV_SPI_EARLY) /* @@ -432,9 +431,10 @@ out: static int env_sf_init(void) { -#if defined(INITENV) && (CONFIG_ENV_ADDR != 0x0) - return env_sf_init_addr(); -#elif defined(CONFIG_ENV_SPI_EARLY) + int ret = env_sf_init_addr(); + if (ret != -ENOENT) + return ret; +#ifdef CONFIG_ENV_SPI_EARLY return env_sf_init_early(); #endif /* From d6ba5c4f922cbe596da13b295ffe10db35101fb4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 2 Mar 2022 12:47:52 +0100 Subject: [PATCH 02/18] arm: mvebu: turris_omnia: Provide env_sf_get_env_addr() function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit BootROM maps SPI Flash to fixed address 0xD4000000 and this mapping is active also when BootROM is executing binary kwbimage headers, which includes also U-Boot SPL. Therefore no initialization code is required to access SPI Flags from U-Boot SPL. In proper U-Boot it is remapped to other location. So in mvebu implementation of env_sf_get_env_addr() function returns 0xD4000000 when running in SPL and NULL when in proper U-Boot. This change would allow to use U-Boot ENV in U-Boot SPL. Normally it is not possible to read ENV because it is too big and U-Boot SPL does not have such big malloc() pool to real all ENV variables. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún --- board/CZ.NIC/turris_omnia/turris_omnia.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index da2fee578c4..28a3f2b8254 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -236,6 +236,16 @@ static bool omnia_detect_sata(void) return stsword & MSATA_IND_STSBIT ? true : false; } +void *env_sf_get_env_addr(void) +{ + /* SPI Flash is mapped to address 0xD4000000 only in SPL */ +#ifdef CONFIG_SPL_BUILD + return (void *)0xD4000000 + CONFIG_ENV_OFFSET; +#else + return NULL; +#endif +} + int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) { if (omnia_detect_sata()) { From f9c5cf8a88535211cf3491e82b13d0289820f4d8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 2 Mar 2022 12:47:53 +0100 Subject: [PATCH 03/18] arm: mvebu: turris_omnia: Enable ENV support in SPL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow to read ENV variables also in SPL on Turris Omnia. Signed-off-by: Pali Rohár --- configs/turris_omnia_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index ad56d3824ba..f310debe6f9 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y From 8ead243ecc2c5073cff3bd9dfb4c4fcab8c2a94a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 2 Mar 2022 12:47:54 +0100 Subject: [PATCH 04/18] arm: mvebu: turris_omnia: Define only one serdes map variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By default use primary serdes map with PCIe function in combined miniPCIe/mSATA slot. When SATA is detected change serdes map variable at runtime. Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 28a3f2b8254..25902742e3d 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -86,7 +86,7 @@ enum status_word_bits { #define OMNIA_GPP_POL_LOW 0x0 #define OMNIA_GPP_POL_MID 0x0 -static struct serdes_map board_serdes_map_pex[] = { +static struct serdes_map board_serdes_map[] = { {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, @@ -95,15 +95,6 @@ static struct serdes_map board_serdes_map_pex[] = { {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0} }; -static struct serdes_map board_serdes_map_sata[] = { - {SATA0, SERDES_SPEED_6_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, - {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, - {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0} -}; - static struct udevice *omnia_get_i2c_chip(const char *name, uint addr, uint offset_len) { @@ -249,13 +240,15 @@ void *env_sf_get_env_addr(void) int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) { if (omnia_detect_sata()) { - *serdes_map_array = board_serdes_map_sata; - *count = ARRAY_SIZE(board_serdes_map_sata); - } else { - *serdes_map_array = board_serdes_map_pex; - *count = ARRAY_SIZE(board_serdes_map_pex); + /* Change SerDes for first mPCIe port (mSATA) from PCIe to SATA */ + board_serdes_map[0].serdes_type = SATA0; + board_serdes_map[0].serdes_speed = SERDES_SPEED_6_GBPS; + board_serdes_map[0].serdes_mode = SERDES_DEFAULT_MODE; } + *serdes_map_array = board_serdes_map; + *count = ARRAY_SIZE(board_serdes_map); + return 0; } From 1da19dcf3b08db266043960f721d34d13ccc221c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 2 Mar 2022 12:47:55 +0100 Subject: [PATCH 05/18] arm: mvebu: turris_omnia: Allow to configure mSATA slot via env variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some PCIe-based MiniPCIe cards are broken and they do not ground PIN 43 which is required by PCIe mini CEM specs. Such broken cards are incorrectly detected as mSATA cards because SATA specs requires that PIN 43 on mSATA cards has to be disconnected. PIN 43 on Turris Omnia is used only for MiniPCIe/mSATA card detection by software in U-Boot SPL. Allow to override that U-Boot SPL detection by a new "omnia_msata_slot" env variable (to value "pcie" or "sata") so broken MiniPCIe cards can be used in combo mSATA/MiniPCIe slot too. As configuration of PCIe vs SATA functionality is done in U-Boot SPL, it is required to change env variable in permanent storage and reset the board to take effect. To force PCIe mode for broken MiniPCIe cards, call U-Boot commands: => setenv omnia_msata_slot pcie => saveenv => reset Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 27 ++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 25902742e3d..4753f9b2c83 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -200,13 +200,25 @@ static bool disable_mcu_watchdog(void) return true; } -static bool omnia_detect_sata(void) +static bool omnia_detect_sata(const char *msata_slot) { int ret; u16 stsword; puts("MiniPCIe/mSATA card detection... "); + if (msata_slot) { + if (strcmp(msata_slot, "pcie") == 0) { + puts("forced to MiniPCIe via env\n"); + return false; + } else if (strcmp(msata_slot, "sata") == 0) { + puts("forced to mSATA via env\n"); + return true; + } else if (strcmp(msata_slot, "auto") != 0) { + printf("unsupported env value '%s', fallback to... ", msata_slot); + } + } + ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &stsword, sizeof(stsword)); if (ret) { printf("omnia_mcu_read failed: %i, defaulting to MiniPCIe card\n", @@ -239,7 +251,18 @@ void *env_sf_get_env_addr(void) int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) { - if (omnia_detect_sata()) { +#ifdef CONFIG_SPL_ENV_SUPPORT + /* Do not use env_load() as malloc() pool is too small at this stage */ + bool has_env = (env_init() == 0); +#endif + const char *env_value = NULL; + +#ifdef CONFIG_SPL_ENV_SUPPORT + /* beware that env_get() returns static allocated memory */ + env_value = has_env ? env_get("omnia_msata_slot") : NULL; +#endif + + if (omnia_detect_sata(env_value)) { /* Change SerDes for first mPCIe port (mSATA) from PCIe to SATA */ board_serdes_map[0].serdes_type = SATA0; board_serdes_map[0].serdes_speed = SERDES_SPEED_6_GBPS; From d80276870d732d413447481f986d7ff63e5b764a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 2 Mar 2022 12:47:56 +0100 Subject: [PATCH 06/18] arm: mvebu: turris_omnia: Extract code for disabling sata/pcie MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move code for disabling sata and pcie DT nodes to own functions, so this code can be called from other places in follow up patches. Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 96 +++++++++++++----------- 1 file changed, 52 insertions(+), 44 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 4753f9b2c83..bdf473a31fc 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -511,10 +511,53 @@ void spl_board_init(void) #if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) || IS_ENABLED(CONFIG_OF_BOARD_SETUP) -static void fixup_serdes_0_nodes(void *blob) +static void disable_sata_node(void *blob) +{ + int node; + + fdt_for_each_node_by_compatible(node, blob, -1, "marvell,armada-380-ahci") { + if (!fdtdec_get_is_enabled(blob, node)) + continue; + + if (fdt_status_disabled(blob, node) < 0) + printf("Cannot disable SATA DT node!\n"); + else + debug("Disabled SATA DT node\n"); + + break; + } +} + +static void disable_pcie_node(void *blob, int port) +{ + int node; + + fdt_for_each_node_by_compatible(node, blob, -1, "marvell,armada-370-pcie") { + int port_node; + + if (!fdtdec_get_is_enabled(blob, node)) + continue; + + fdt_for_each_subnode (port_node, blob, node) { + if (!fdtdec_get_is_enabled(blob, port_node)) + continue; + + if (fdtdec_get_int(blob, port_node, "marvell,pcie-port", -1) != port) + continue; + + if (fdt_status_disabled(blob, port_node) < 0) + printf("Cannot disable PCIe port %d DT node!\n", port); + else + debug("Disabled PCIe port %d DT node\n", port); + + return; + } + } +} + +static void fixup_msata_port_nodes(void *blob) { bool mode_sata; - int node; /* * Determine if SerDes 0 is configured to SATA mode. @@ -534,47 +577,12 @@ static void fixup_serdes_0_nodes(void *blob) return; } - /* If mSATA card is not present, disable SATA DT node */ if (!mode_sata) { - fdt_for_each_node_by_compatible(node, blob, -1, - "marvell,armada-380-ahci") { - if (!fdtdec_get_is_enabled(blob, node)) - continue; - - if (fdt_status_disabled(blob, node) < 0) - printf("Cannot disable SATA DT node!\n"); - else - debug("Disabled SATA DT node\n"); - - break; - } - - return; - } - - /* Otherwise disable PCIe port 0 DT node (MiniPCIe / mSATA port) */ - fdt_for_each_node_by_compatible(node, blob, -1, - "marvell,armada-370-pcie") { - int port; - - if (!fdtdec_get_is_enabled(blob, node)) - continue; - - fdt_for_each_subnode (port, blob, node) { - if (!fdtdec_get_is_enabled(blob, port)) - continue; - - if (fdtdec_get_int(blob, port, "marvell,pcie-port", - -1) != 0) - continue; - - if (fdt_status_disabled(blob, port) < 0) - printf("Cannot disable PCIe port 0 DT node!\n"); - else - debug("Disabled PCIe port 0 DT node\n"); - - return; - } + /* If mSATA card is not present, disable SATA DT node */ + disable_sata_node(blob); + } else { + /* Otherwise disable PCIe port 0 DT node (MiniPCIe / mSATA port) */ + disable_pcie_node(blob, 0); } } @@ -583,7 +591,7 @@ static void fixup_serdes_0_nodes(void *blob) #if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) int board_fix_fdt(void *blob) { - fixup_serdes_0_nodes(blob); + fixup_msata_port_nodes(blob); return 0; } @@ -728,7 +736,7 @@ fail: int ft_board_setup(void *blob, struct bd_info *bd) { fixup_spi_nor_partitions(blob); - fixup_serdes_0_nodes(blob); + fixup_msata_port_nodes(blob); return 0; } From 72a9dd264c15e287ac5168d387cfa77710d22982 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 2 Mar 2022 12:47:57 +0100 Subject: [PATCH 07/18] arm: mvebu: turris_omnia: Signal error when sata/pcie DT mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Show error message when DT file does not contain sata or pcie node which should be explicitly disabled. This can happen when U-Boot code for finding those nodes is incomplete or when those DT nodes are in different unexpected location. In any case it is needed to know if DT not was not explicitly disabled as it could mean that combo slots where setup incorrectly. Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index bdf473a31fc..1f69b3d166d 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -524,8 +524,10 @@ static void disable_sata_node(void *blob) else debug("Disabled SATA DT node\n"); - break; + return; } + + printf("Cannot find SATA DT node!\n"); } static void disable_pcie_node(void *blob, int port) @@ -553,6 +555,8 @@ static void disable_pcie_node(void *blob, int port) return; } } + + printf("Cannot find PCIe port %d DT node!\n", port); } static void fixup_msata_port_nodes(void *blob) From 73c7db73e8f1a1e6ea59f0e5bdd8e825792eb41c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 2 Mar 2022 12:47:58 +0100 Subject: [PATCH 08/18] arm: mvebu: turris_omnia: Add support for USB3.0 mode in WWAN MiniPCIe slot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PCIe Mini CEM 2.1 spec added support for USB3.0 mode on MiniPCIe cards. USB3.0 and PCIe share same pins and only one function can be active at the same time. PCIe Mini CEM 2.1 spec says that determining function is platform specific and spec does not define any dedicated pin which could say if card is USB3.0-based or PCIe-based. Implement this platform specific decision (USB3.0 vs PCIe) for WWAN MiniPCIe slot on Turris Omnia via U-Boot env variable "omnia_wwan_slot", similarly like is implemented forced mode for MiniPCIe/mSATA slot via "omnia_msata_slot" env variable. Value "usb3" for "omnia_wwan_slot" would mean to set USB3.0 mode and value "pcie" original PCIe mode. A385 SoC on Turris Omnia has configurable fifth SerDes line (exported to MiniPCIe WWAN slot with SIM card) either to USB3.0 or PCIe functionality, so implementation of this new PCIe Mini CEM 2.1 feature is simple, by just configuring SerDes to USB 3.0 mode. Other twos MiniPCIe slots on Turris Omnia do not have this new functionality as their SerDes lines cannot be switched to USB3.0 functionality. Note that A385 SoC does not have too many USB3.0 blocks, so activating USB3.0 in MiniPCIe cause that one external USB3.0 USB-A port would loose USB3.0 functionality and would be downgraded just to USB2.0. By default this MiniPCIe WWAN slot is in PCIe mode, like before. To set this MiniPCIe WWAN slot to USB3.0 mode, call U-Boot commands: => setenv omnia_wwan_slot usb3 => saveenv => reset Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 57 ++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 1f69b3d166d..e768e6e5322 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -239,6 +239,22 @@ static bool omnia_detect_sata(const char *msata_slot) return stsword & MSATA_IND_STSBIT ? true : false; } +static bool omnia_detect_wwan_usb3(const char *wwan_slot) +{ + puts("WWAN slot configuration... "); + + if (wwan_slot && strcmp(wwan_slot, "usb3") == 0) { + puts("USB3.0\n"); + return true; + } + + if (wwan_slot && strcmp(wwan_slot, "pcie") != 0) + printf("unsupported env value '%s', fallback to... ", wwan_slot); + + puts("PCIe+USB2.0\n"); + return false; +} + void *env_sf_get_env_addr(void) { /* SPI Flash is mapped to address 0xD4000000 only in SPL */ @@ -269,6 +285,20 @@ int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) board_serdes_map[0].serdes_mode = SERDES_DEFAULT_MODE; } +#ifdef CONFIG_SPL_ENV_SUPPORT + /* beware that env_get() returns static allocated memory */ + env_value = has_env ? env_get("omnia_wwan_slot") : NULL; +#endif + + if (omnia_detect_wwan_usb3(env_value)) { + /* Disable SerDes for USB 3.0 pins on the front USB-A port */ + board_serdes_map[1].serdes_type = DEFAULT_SERDES; + /* Change SerDes for third mPCIe port (WWAN) from PCIe to USB 3.0 */ + board_serdes_map[4].serdes_type = USB3_HOST0; + board_serdes_map[4].serdes_speed = SERDES_SPEED_5_GBPS; + board_serdes_map[4].serdes_mode = SERDES_DEFAULT_MODE; + } + *serdes_map_array = board_serdes_map; *count = ARRAY_SIZE(board_serdes_map); @@ -590,12 +620,38 @@ static void fixup_msata_port_nodes(void *blob) } } +static void fixup_wwan_port_nodes(void *blob) +{ + bool mode_usb3; + + /* Determine if SerDes 4 is configured to USB3 mode */ + mode_usb3 = ((readl(MVEBU_REGISTER(0x183fc)) & GENMASK(19, 16)) >> 16) == 4; + + /* If SerDes 4 is not configured to USB3 mode then nothing is needed to fixup */ + if (!mode_usb3) + return; + + /* + * We're either adding status = "disabled" property, or changing + * status = "okay" to status = "disabled". In both cases we'll need more + * space. Increase the size a little. + */ + if (fdt_increase_size(blob, 32) < 0) { + printf("Cannot increase FDT size!\n"); + return; + } + + /* Disable PCIe port 2 DT node (WWAN) */ + disable_pcie_node(blob, 2); +} + #endif #if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) int board_fix_fdt(void *blob) { fixup_msata_port_nodes(blob); + fixup_wwan_port_nodes(blob); return 0; } @@ -741,6 +797,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) { fixup_spi_nor_partitions(blob); fixup_msata_port_nodes(blob); + fixup_wwan_port_nodes(blob); return 0; } From 1ae8a5fb6a59c3712f1e3adf25989ac23c9ec1bc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 6 Apr 2022 11:39:32 +0200 Subject: [PATCH 09/18] arm: mvebu: turris_omnia: Fix RESET button message MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Pali Rohár Reviewed-by: Marek Behún --- board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index e768e6e5322..aa05e4aad59 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -481,7 +481,7 @@ static void handle_reset_button(void) /* Ensure bootcmd_rescue is used by distroboot */ env_set("boot_targets", "rescue"); - printf("RESET button was pressed, overwriting bootcmd!\n"); + printf("RESET button was pressed, overwriting boot_targets!\n"); } else { /* * In case the user somehow managed to save environment with From 31f88018d924fffaa9b710017261e415850ef2b2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 6 Apr 2022 11:39:33 +0200 Subject: [PATCH 10/18] arm: mvebu: turris_omnia: Define CONFIG_ETHPRIME instead of ethact= ENV MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CONFIG_ETHPRIME defines primary ethernet device and env variable $ethact stores currently active ethernet device. So there is no point to set ethact= in default environment. Instead set CONFIG_ETHPRIME properly. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún --- configs/turris_omnia_defconfig | 2 ++ include/configs/turris_omnia.h | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index f310debe6f9..5591c9716b2 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -64,6 +64,8 @@ CONFIG_CMD_FS_UUID=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@34000" CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index b35299b2fbb..e8130ac858d 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -119,7 +119,6 @@ LOAD_ADDRESS_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "console=ttyS0,115200\0" \ - "ethact=ethernet@34000\0" \ "bootcmd_rescue=" TURRIS_OMNIA_BOOTCMD_RESCUE "\0" \ BOOTENV From 9efc5b7a4b40bbb18689a2c3b5c73de3272c136e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 6 Apr 2022 11:39:34 +0200 Subject: [PATCH 11/18] arm: mvebu: turris_omnia: Always enable MMC, SCSI and USB boot targets MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit U-Boot for Turris Omnia is always compiled with MMC, SCSI and USB support, so always enable macros for booting from these devices. Signed-off-by: Pali Rohár --- include/configs/turris_omnia.h | 24 +++--------------------- 1 file changed, 3 insertions(+), 21 deletions(-) diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index e8130ac858d..f2fc374ad14 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -52,28 +52,10 @@ /* Include the common distro boot environment */ #ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_MMC -#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) -#else -#define BOOT_TARGET_DEVICES_MMC(func) -#endif - -#ifdef CONFIG_USB_STORAGE -#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) -#else -#define BOOT_TARGET_DEVICES_USB(func) -#endif - -#ifdef CONFIG_SCSI -#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) -#else -#define BOOT_TARGET_DEVICES_SCSI(func) -#endif - #define BOOT_TARGET_DEVICES(func) \ - BOOT_TARGET_DEVICES_MMC(func) \ - BOOT_TARGET_DEVICES_SCSI(func) \ - BOOT_TARGET_DEVICES_USB(func) \ + func(MMC, mmc, 0) \ + func(SCSI, scsi, 0) \ + func(USB, usb, 0) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) From 0ddc1e5aa3e1e91fe1618798a523f75de7266657 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 6 Apr 2022 11:39:35 +0200 Subject: [PATCH 12/18] arm: mvebu: turris_omnia: Add NVMe to boot targets MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit U-Boot for Turris Omnia has already enabled NVMe support. So add NVMe to boot targets. Signed-off-by: Pali Rohár --- include/configs/turris_omnia.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index f2fc374ad14..8119340b112 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -54,6 +54,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ + func(NVME, nvme, 0) \ func(SCSI, scsi, 0) \ func(USB, usb, 0) \ func(PXE, pxe, na) \ From b8b91a0f08884b754d10751661bb6a15a21a2b9b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Wed, 6 Apr 2022 11:39:36 +0200 Subject: [PATCH 13/18] arm: mvebu: turris_mox: Add NVMe and SCSI to boot targets MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit U-Boot for Turris Mox has already enabled NVMe and SCSI support. So add NVMe and SCSI to boot targets. Signed-off-by: Pali Rohár --- include/configs/turris_mox.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index dc2fdcc654a..6640ee495d2 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -25,6 +25,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ + func(NVME, nvme, 0) \ + func(SCSI, scsi, 0) \ func(USB, usb, 0) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) From f0f98758ed4aadcf1c021f20342e3d2ef7f0b80e Mon Sep 17 00:00:00 2001 From: Tony Dinh Date: Tue, 12 Apr 2022 13:18:19 -0700 Subject: [PATCH 14/18] net: marvell: mvgbe: Set PHY page 0 before phy_connect For most Kirkwood boards, the PHY page is already set to page 0 (in register 22) before phy_connect is invoked. But some board like the Zyxel NSA310S (which uses the network chip MV88E1318S), the PHY page is not set to page 0. There seems to be some bad data remained in register 22 when the uclass MVGBE about to invoke phy_connect(). This patch enables the uclass MVGBE to always set the PHY page to 0 before phy_connect. For reference, please see this discussion: [RFC PATCH v2] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet. https://lists.denx.de/pipermail/u-boot/2022-April/480946.html This patch has been tested with the following Kirkwood boards: NSA310S (88F6702, network chip MV88E1318S) Sheevaplug (88F6281, network chip MV88E1318) Pogo V4 (88F6192, network chip 88E1116R) GF Home(88F6281, network chip 88E1116R) Dreamplug (88F6281, network chip MV88E1318) Dell Kace M300 (88F6282, network chip MV88E1318) - out of tree u-boot Signed-off-by: Tony Dinh --- drivers/net/mvgbe.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index bf5ed5513ba..a77c0574326 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -43,6 +43,7 @@ DECLARE_GLOBAL_DATA_PTR; #define MV_PHY_ADR_REQUEST 0xee #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi) +#define MVGBE_PGADR_REG 22 #if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII) static int smi_wait_ready(struct mvgbe_device *dmvgbe) @@ -745,6 +746,9 @@ static struct phy_device *__mvgbe_phy_init(struct eth_device *dev, miiphy_write(dev->name, MV_PHY_ADR_REQUEST, MV_PHY_ADR_REQUEST, phyid); + /* Make sure the selected PHY page is 0 before connecting */ + miiphy_write(dev->name, phyid, MVGBE_PGADR_REG, 0); + phydev = phy_connect(bus, phyid, dev, phy_interface); if (!phydev) { printf("phy_connect failed\n"); From dbd2a382c15543365ec55b9812759efd5bbdbe9a Mon Sep 17 00:00:00 2001 From: Tony Dinh Date: Sun, 17 Apr 2022 13:42:42 -0700 Subject: [PATCH 15/18] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet The Zyxel NSA310s board has the network chip Marvell Alaska 88E1318S. Use uclass mvgbe and the compatible driver M88E1310 driver to bring up Ethernet. - Use uclass mvgbe to bring up the network. And remove ad-hoc code. - Remove CONFIG_RESET_PHY_R. - Enable CONFIG_PHY_MARVELL to properly configure the network. - Add phy mode RGMII to kirkwood-nsa310s.dts - Miscellaneous changes: Move constants to .c file and remove header file board/zyxel/nsa310s/nsa310s.h, add support for large USB and SATA HDDs, use BIT macro, add/cleanup comments, and cosmetic changes. Note that this patch is depended on the following patch: https://patchwork.ozlabs.org/project/uboot/patch/20220412201820.10291-1-mibodhi@gmail.com/ Signed-off-by: Tony Dinh --- arch/arm/dts/kirkwood-nsa310s.dts | 1 + board/zyxel/nsa310s/nsa310s.c | 119 +++++++++--------------------- board/zyxel/nsa310s/nsa310s.h | 46 ------------ configs/nsa310s_defconfig | 6 +- include/configs/nsa310s.h | 11 +-- 5 files changed, 41 insertions(+), 142 deletions(-) delete mode 100644 board/zyxel/nsa310s/nsa310s.h diff --git a/arch/arm/dts/kirkwood-nsa310s.dts b/arch/arm/dts/kirkwood-nsa310s.dts index e1c9c9080c9..09ee76c2a2e 100644 --- a/arch/arm/dts/kirkwood-nsa310s.dts +++ b/arch/arm/dts/kirkwood-nsa310s.dts @@ -306,6 +306,7 @@ status = "okay"; ethernet0-port@0 { phy-handle = <ðphy0>; + phy-mode = "rgmii"; }; }; diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c index b71de4e11f0..b3ea6608914 100644 --- a/board/zyxel/nsa310s/nsa310s.c +++ b/board/zyxel/nsa310s/nsa310s.c @@ -1,22 +1,49 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2015, 2021 Tony Dinh + * Copyright (C) 2015, 2021-2022 Tony Dinh * Copyright (C) 2015 Gerald Kerma */ #include #include -#include -#include +#include #include #include #include #include #include -#include "nsa310s.h" +#include DECLARE_GLOBAL_DATA_PTR; +/* + * low GPIO's + */ +#define HDD1_GREEN_LED BIT(16) +#define HDD1_RED_LED BIT(13) +#define USB_GREEN_LED BIT(15) +#define USB_POWER BIT(21) +#define SYS_GREEN_LED BIT(28) +#define SYS_ORANGE_LED BIT(29) + +#define COPY_GREEN_LED BIT(22) +#define COPY_RED_LED BIT(23) + +#define PIN_USB_GREEN_LED 15 +#define PIN_USB_POWER 21 + +#define NSA310S_OE_LOW (~(0)) +#define NSA310S_VAL_LOW (SYS_GREEN_LED | USB_POWER) + +/* + * high GPIO's + */ +#define HDD2_GREEN_LED BIT(2) +#define HDD2_POWER BIT(1) + +#define NSA310S_OE_HIGH (~(0)) +#define NSA310S_VAL_HIGH (HDD2_POWER) + int board_early_init_f(void) { /* @@ -80,87 +107,7 @@ int board_init(void) return 0; } -static int fdt_get_phy_addr(const char *path) +int board_eth_init(struct bd_info *bis) { - const void *fdt = gd->fdt_blob; - const u32 *reg; - const u32 *val; - int node, phandle, addr; - - /* Find the node by its full path */ - node = fdt_path_offset(fdt, path); - if (node >= 0) { - /* Look up phy-handle */ - val = fdt_getprop(fdt, node, "phy-handle", NULL); - if (val) { - phandle = fdt32_to_cpu(*val); - if (!phandle) - return -1; - /* Follow it to its node */ - node = fdt_node_offset_by_phandle(fdt, phandle); - if (node) { - /* Look up reg */ - reg = fdt_getprop(fdt, node, "reg", NULL); - if (reg) { - addr = fdt32_to_cpu(*reg); - return addr; - } - } - } - } - return -1; + return cpu_eth_init(bis); } - -#ifdef CONFIG_RESET_PHY_R -void reset_phy(void) -{ - u16 reg; - u16 phyaddr; - char *name = "ethernet-controller@72000"; - char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0"; - - if (miiphy_set_current_dev(name)) - return; - - phyaddr = fdt_get_phy_addr(eth0_path); - if (phyaddr < 0) - return; - - /* set RGMII delay */ - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG); - miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, ®); - reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL); - miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg); - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); - - /* reset PHY */ - if (miiphy_reset(name, phyaddr)) - return; - - /* - * ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to 88E1318) - * and has an MCU attached to the LED[2] via tristate interrupt - */ - - /* switch to LED register page */ - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG); - /* read out LED polarity register */ - miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, ®); - /* clear 4, set 5 - LED2 low, tri-state */ - reg &= ~(MV88E1318_LED2_4); - reg |= (MV88E1318_LED2_5); - /* write back LED polarity register */ - miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg); - /* jump back to page 0, per the PHY chip documenation. */ - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); - - /* set PHY back to auto-negotiation mode */ - miiphy_write(name, phyaddr, 0x4, 0x1e1); - miiphy_write(name, phyaddr, 0x9, 0x300); - /* downshift */ - miiphy_write(name, phyaddr, 0x10, 0x3860); - miiphy_write(name, phyaddr, 0x0, 0x9140); - - printf("MV88E1318 PHY initialized on %s\n", name); -} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/zyxel/nsa310s/nsa310s.h b/board/zyxel/nsa310s/nsa310s.h deleted file mode 100644 index d8bd9a586fe..00000000000 --- a/board/zyxel/nsa310s/nsa310s.h +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2015 - * Gerald Kerma - * Tony Dinh - */ - -#ifndef __NSA310S_H -#define __NSA310S_H - -/* low GPIO's */ -#define HDD1_GREEN_LED (1 << 16) -#define HDD1_RED_LED (1 << 13) -#define USB_GREEN_LED (1 << 15) -#define USB_POWER (1 << 21) -#define SYS_GREEN_LED (1 << 28) -#define SYS_ORANGE_LED (1 << 29) - -#define COPY_GREEN_LED (1 << 22) -#define COPY_RED_LED (1 << 23) - -#define PIN_USB_GREEN_LED 15 -#define PIN_USB_POWER 21 - -#define NSA310S_OE_LOW (~(0)) -#define NSA310S_VAL_LOW (SYS_GREEN_LED | USB_POWER) - -/* high GPIO's */ -#define HDD2_GREEN_LED (1 << 2) -#define HDD2_POWER (1 << 1) - -#define NSA310S_OE_HIGH (~(0)) -#define NSA310S_VAL_HIGH (HDD2_POWER) - -/* PHY related */ -#define MV88E1318_PGADR_REG 22 -#define MV88E1318_MAC_CTRL_PG 2 -#define MV88E1318_MAC_CTRL_REG 21 -#define MV88E1318_RGMII_TX_CTRL (1 << 4) -#define MV88E1318_RGMII_RX_CTRL (1 << 5) -#define MV88E1318_LED_PG 3 -#define MV88E1318_LED_POL_REG 17 -#define MV88E1318_LED2_4 (1 << 4) -#define MV88E1318_LED2_5 (1 << 5) - -#endif /* __NSA310S_H */ diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index e4902d42779..ff015e36a5a 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 @@ -18,9 +19,8 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="nsa310s => " +CONFIG_SYS_PROMPT="NSA310s> " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y @@ -32,6 +32,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(root)" @@ -50,6 +51,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=1 # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 485a3fe42dc..1e6b8d8b0e7 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2015, 2021 Tony Dinh + * Copyright (C) 2015, 2021-2022 Tony Dinh * Copyright (C) 2015 * Gerald Kerma * Luka Perkov @@ -11,8 +11,6 @@ #include "mv-common.h" -/* environment variables configuration */ - /* default environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -24,14 +22,11 @@ "bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0" /* Ethernet driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 1 -#endif /* CONFIG_CMD_NET */ -/* SATA driver configuration */ -#ifdef CONFIG_SATA +/* Support large HDDs for USB and SATA */ #define CONFIG_LBA48 -#endif /* CONFIG_SATA */ +#define CONFIG_SYS_64BIT_LBA #endif /* _CONFIG_NSA310S_H */ From 363d9f2c2f1e8f1ea2db7ccb3336385eb60b2b54 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Fri, 29 Apr 2022 13:53:25 +0200 Subject: [PATCH 16/18] arm: mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is A385 register. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- board/CZ.NIC/turris_omnia/turris_omnia.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index aa05e4aad59..b169abca095 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -41,8 +41,8 @@ DECLARE_GLOBAL_DATA_PTR; #define OMNIA_I2C_EEPROM_CHIP_LEN 2 #define OMNIA_I2C_EEPROM_MAGIC 0x0341a034 -#define SYS_RSTOUT_MASK MVEBU_REGISTER(0x18260) -#define SYS_RSTOUT_MASK_WD BIT(10) +#define A385_SYS_RSTOUT_MASK MVEBU_REGISTER(0x18260) +#define A385_SYS_RSTOUT_MASK_WD BIT(10) #define A385_WDT_GLOBAL_CTRL MVEBU_REGISTER(0x20300) #define A385_WDT_GLOBAL_RATIO_MASK GENMASK(18, 16) @@ -180,7 +180,7 @@ static void enable_a385_watchdog(unsigned int timeout_minutes) setbits_32(A385_WD_RSTOUT_UNMASK, A385_WD_RSTOUT_UNMASK_GLOBAL); /* Unmask reset for watchdog */ - clrbits_32(SYS_RSTOUT_MASK, SYS_RSTOUT_MASK_WD); + clrbits_32(A385_SYS_RSTOUT_MASK, A385_SYS_RSTOUT_MASK_WD); } static bool disable_mcu_watchdog(void) From af767e9a3da6b1ce899ee3942d470b9a9dee2d95 Mon Sep 17 00:00:00 2001 From: Josef Schlehofer Date: Fri, 29 Apr 2022 17:49:14 +0200 Subject: [PATCH 17/18] arm: mvebu: clearfog_defconfig: enable setexpr command This command is useful in U-boot scripts and it is being used by OpenWrt bootscript for this board [1]. Otherwise shell scripting commands are enabled by default in cmd/Kconfig. [1] https://github.com/openwrt/openwrt/blob/852126680e21edc71c0c66561ae5a6d7479dcc67/target/linux/mvebu/image/clearfog.bootscript#L7 [2] https://source.denx.de/u-boot/u-boot/-/blob/e95afa56753cebcd20a5114b6d121f281b789006/cmd/Kconfig#L1504 Fixes: 0299c90f396c5b2971a4bac596339f4b03661c27 ("arm: mvebu: Add SolidRun ClearFog Armada 38x initial support") Signed-off-by: Josef Schlehofer Reviewed-by: Stefan Roese --- configs/clearfog_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 880f16a6e04..1e9c389deb7 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -34,7 +34,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y From 08dc62c1527ec7401cc98719cde50ca47533a7c2 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Mon, 2 May 2022 15:16:25 +1200 Subject: [PATCH 18/18] ARM: mvebu: x530: set MPP55 to gpio MPP55 is used as a reset connected to the L3 switch chip. This doesn't matter for u-boot as it doesn't use the L3 switch but it is useful to be able to toggle the switch in/out of reset for the OS. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- board/alliedtelesis/x530/x530.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c index c0ec2afa301..cbf4533e78d 100644 --- a/board/alliedtelesis/x530/x530.c +++ b/board/alliedtelesis/x530/x530.c @@ -93,7 +93,7 @@ int board_early_init_f(void) writel(0x55550550, MVEBU_MPP_BASE + 0x0c); writel(0x55555555, MVEBU_MPP_BASE + 0x10); writel(0x00100565, MVEBU_MPP_BASE + 0x14); - writel(0x40000000, MVEBU_MPP_BASE + 0x18); + writel(0x00000000, MVEBU_MPP_BASE + 0x18); writel(0x00004444, MVEBU_MPP_BASE + 0x1c); return 0;