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ddr: Migrate DDR_SPD to Kconfig
Move the symbol that controls building some JEDEC SPD support functions to Kconfig. This is required on the TI keystone 2 platforms and very frequently (but not always) used on large number of Freescale/NXP platforms, so use imply there. Signed-off-by: Tom Rini <trini@konsulko.com>
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@@ -729,6 +729,7 @@ config ARCH_KEYSTONE
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bool "TI Keystone"
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bool "TI Keystone"
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select CMD_POWEROFF
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select CMD_POWEROFF
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select CPU_V7A
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select CPU_V7A
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select DDR_SPD
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select GPIO_EXTRA_HEADER
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select GPIO_EXTRA_HEADER
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select SUPPORT_SPL
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select SUPPORT_SPL
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select SYS_ARCH_TIMER
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select SYS_ARCH_TIMER
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@@ -1,2 +1,8 @@
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config DDR_SPD
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bool "JEDEC Serial Presence Detect (SPD) support"
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help
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For memory controllers that can utilize it, add enable support for
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using the JEDEC SDP standard.
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source "drivers/ddr/altera/Kconfig"
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source "drivers/ddr/altera/Kconfig"
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source "drivers/ddr/imx/Kconfig"
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source "drivers/ddr/imx/Kconfig"
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@@ -116,22 +116,26 @@ choice
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config SYS_FSL_DDR4
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config SYS_FSL_DDR4
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bool "Freescale DDR4 controller"
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bool "Freescale DDR4 controller"
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depends on SYS_FSL_HAS_DDR4
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depends on SYS_FSL_HAS_DDR4
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imply DDR_SPD
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select SYS_FSL_DDRC_GEN4
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select SYS_FSL_DDRC_GEN4
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config SYS_FSL_DDR3
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config SYS_FSL_DDR3
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bool "Freescale DDR3 controller"
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bool "Freescale DDR3 controller"
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depends on SYS_FSL_HAS_DDR3
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depends on SYS_FSL_HAS_DDR3
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imply DDR_SPD
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select SYS_FSL_DDRC_GEN3 if PPC
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select SYS_FSL_DDRC_GEN3 if PPC
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select SYS_FSL_DDRC_ARM_GEN3 if ARM
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select SYS_FSL_DDRC_ARM_GEN3 if ARM
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config SYS_FSL_DDR2
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config SYS_FSL_DDR2
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bool "Freescale DDR2 controller"
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bool "Freescale DDR2 controller"
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depends on SYS_FSL_HAS_DDR2
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depends on SYS_FSL_HAS_DDR2
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imply DDR_SPD
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select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3)
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select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3)
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config SYS_FSL_DDR1
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config SYS_FSL_DDR1
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bool "Freescale DDR1 controller"
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bool "Freescale DDR1 controller"
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depends on SYS_FSL_HAS_DDR1
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depends on SYS_FSL_HAS_DDR1
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imply DDR_SPD
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select SYS_FSL_DDRC_GEN1
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select SYS_FSL_DDRC_GEN1
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endchoice
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endchoice
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