mirror of
https://xff.cz/git/u-boot/
synced 2025-09-01 16:52:14 +02:00
Merge branch 'master' of /home/git/u-boot
This commit is contained in:
1
examples/.gitignore
vendored
1
examples/.gitignore
vendored
@@ -1,5 +1,6 @@
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/hello_world
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/interrupt
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/sched
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/smc91111_eeprom
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*.bin
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*.srec
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@@ -91,13 +91,9 @@ BIN += sched.bin
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endif
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ifeq ($(ARCH),blackfin)
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ifneq ($(BOARD),bf537-stamp)
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ifneq ($(BOARD),bf537-pnav)
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ELF += smc91111_eeprom
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SREC += smc91111_eeprom.srec
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BIN += smc91111_eeprom.bin
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endif
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endif
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BIN += smc91111_eeprom.bin
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endif
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# The following example is pretty 8xx specific...
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@@ -166,7 +162,7 @@ $(LIB): $(obj).depend $(LIBOBJS)
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$(ELF):
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$(obj)%: $(obj)%.o $(LIB)
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$(LD) -g $(EX_LDFLAGS) -Ttext $(LOAD_ADDR) \
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-o $@ -e $(notdir $(<:.o=)) $< $(LIB) \
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-o $@ -e $(SYM_PREFIX)$(notdir $(<:.o=)) $< $(LIB) \
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-L$(gcclibdir) -lgcc
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$(SREC):
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@@ -31,6 +31,13 @@
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#include <exports.h>
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#include "../drivers/net/smc91111.h"
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#ifdef CONFIG_DRIVER_SMC91111
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#ifdef pFIO0_DIR
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# define pFIO_DIR pFIO0_DIR
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# define pFIO_FLAG_S pFIO0_FLAG_S
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#endif
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#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
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#define EEPROM 0x1;
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#define MAC 0x2;
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@@ -59,17 +66,9 @@ int smc91111_eeprom (int argc, char *argv[])
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return (0);
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}
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asm ("p2.h = 0xFFC0;");
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asm ("p2.l = 0x0730;");
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asm ("r0 = 0x01;");
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asm ("w[p2] = r0;");
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asm ("ssync;");
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asm ("p2.h = 0xffc0;");
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asm ("p2.l = 0x0708;");
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asm ("r0 = 0x01;");
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asm ("w[p2] = r0;");
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asm ("ssync;");
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*pFIO_DIR = 0x01;
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*pFIO_FLAG_S = 0x01;
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SSYNC();
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if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) {
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printf ("Can't find SMSC91111\n");
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@@ -387,3 +386,13 @@ void dump_reg (void)
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printf ("\n");
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}
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}
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#else
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int smc91111_eeprom (int argc, char *argv[])
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{
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printf("Not supported for this board\n");
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return 1;
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}
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#endif
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@@ -25,14 +25,14 @@ gd_t *global_data;
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: : "i"(XF_ ## x * sizeof(void *)) : "eax", "ecx");
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#elif defined(CONFIG_PPC)
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/*
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* r29 holds the pointer to the global_data, r11 is a call-clobbered
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* r2 holds the pointer to the global_data, r11 is a call-clobbered
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* register
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*/
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#define EXPORT_FUNC(x) \
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asm volatile ( \
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" .globl " #x "\n" \
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#x ":\n" \
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" lwz %%r11, %0(%%r29)\n" \
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" lwz %%r11, %0(%%r2)\n" \
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" lwz %%r11, %1(%%r11)\n" \
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" mtctr %%r11\n" \
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" bctr\n" \
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@@ -70,7 +70,7 @@ mmu_init:
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* we can load the instruction and data TLB registers with the
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* same values.
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*/
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lwz r9,20(r29) /* gd->ram_size */
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lwz r9,20(r2) /* gd->ram_size */
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addis r9,r9,-0x80
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mr r8, r9 /* Higher 8 Meg in SDRAM */
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@@ -30,11 +30,11 @@ asm volatile ( \
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asm volatile ( \
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" .globl mon_" #x "\n" \
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"mon_" #x ":\n" \
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" lwz %%r11, %0(%%r29)\n" \
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" lwz %%r11, %0(%%r2)\n" \
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" lwz %%r11, %1(%%r11)\n" \
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" mtctr %%r11\n" \
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" bctr\n" \
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: : "i"(offsetof(xxx_t, pfunc)), "i"(XF_ ## x * sizeof(void *)) : "r11", "r29");
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: : "i"(offsetof(xxx_t, pfunc)), "i"(XF_ ## x * sizeof(void *)) : "r11", "r2");
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#elif defined(__arm__)
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#define EXPORT_FUNC(x) \
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asm volatile ( \
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@@ -67,7 +67,7 @@ int main(void)
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#if defined(__i386__)
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xxx_t *pq;
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#elif defined(__powerpc__)
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register volatile xxx_t *pq asm("r29");
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register volatile xxx_t *pq asm("r2");
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#elif defined(__arm__)
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register volatile xxx_t *pq asm("r8");
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#elif defined(__mips__)
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