1
0
mirror of https://xff.cz/git/u-boot/ synced 2025-10-22 10:31:56 +02:00

mtd: spi-nor-core: Add fixups for Cypress s25hl-t/s25hs-t

The nor->ready() and spansion_sr_ready() introduced earlier in this
series are used for multi-die package parts.

The nor->quad_enable() sets the volatile QE bit on each die.

The nor->erase() is hooked if the device is not configured to uniform
sectors, assuming it has 32 x 4KB sectors overlaid on bottom address.
Other configurations, top and split, are not supported at this point.
Will submit additional patches to support it as needed.

The post_bfpt/sfdp() fixes the params wrongly advertised in SFDP.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Takahiro Kuwano
2021-06-29 15:01:03 +09:00
committed by Jagan Teki
parent 72151ad10f
commit 1c3dd193b5
2 changed files with 146 additions and 1 deletions

View File

@@ -128,6 +128,9 @@
#define SPINOR_OP_WRAR 0x71 /* Write any register */
#define SPINOR_REG_ADDR_STR1V 0x00800000
#define SPINOR_REG_ADDR_CFR1V 0x00800002
#define SPINOR_REG_ADDR_CFR3V 0x00800004
#define CFR3V_UNHYSA BIT(3) /* Uniform sectors or not */
#define CFR3V_PGMBUF BIT(4) /* Program buffer size */
/* Used for Micron flashes only. */
#define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */