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arm: socfpga: Add clock driver for Arria 10

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Add clock driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
This commit is contained in:
Ley Foon Tan
2017-04-26 02:44:39 +08:00
committed by Marek Vasut
parent 827e6a7e0d
commit 177ba1f927
5 changed files with 1335 additions and 1 deletions
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10
arch/arm/mach-socfpga/clock_manager.c
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@@ -19,7 +19,12 @@ void cm_wait_for_lock(u32 mask)
u32 inter_val;
u32 retry = 0;
do {
#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
inter_val = readl(&clock_manager_base->inter) & mask;
#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
inter_val = readl(&clock_manager_base->stat) & mask;
#endif
/* Wait for stable lock */
if (inter_val == mask)
retry++;
else
@@ -44,7 +49,12 @@ int set_cpu_clk_info(void)
gd->bd->bi_arm_freq = cm_get_mpu_clk_hz() / 1000000;
gd->bd->bi_dsp_freq = 0;
#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
gd->bd->bi_ddr_freq = cm_get_sdram_clk_hz() / 1000000;
#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
gd->bd->bi_ddr_freq = 0;
#endif
return 0;
}