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ARM64: zynqmp: Adjust to new SMC interface to get silicon version

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The new FW interface returns the IDCODE and version register, leaving
extracting bitfields to the caller.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Soren Brinkmann
2016-09-29 11:44:41 -07:00
committed by Michal Simek
parent 05c59d0bc8
commit 0cba6abbba
2 changed files with 17 additions and 0 deletions
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11
board/xilinx/zynqmp/zynqmp.c
View File

@@ -86,6 +86,17 @@ static int chip_id(void)
smc_call(&regs); smc_call(&regs);
/*
* SMC returns:
* regs[0][31:0] = status of the operation
* regs[0][63:32] = CSU.IDCODE register
* regs[1][31:0] = CSU.version register
*/
regs.regs[0] = upper_32_bits(regs.regs[0]);
regs.regs[0] &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
ZYNQMP_CSU_IDCODE_SVD_MASK;
regs.regs[0] >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
return regs.regs[0]; return regs.regs[0];
} }

6
include/zynqmppl.h
View File

@@ -16,6 +16,12 @@
#define ZYNQMP_FPGA_OP_LOAD (1 << 1) #define ZYNQMP_FPGA_OP_LOAD (1 << 1)
#define ZYNQMP_FPGA_OP_DONE (1 << 2) #define ZYNQMP_FPGA_OP_DONE (1 << 2)
#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT 15
#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xf << \
ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)
#define ZYNQMP_CSU_IDCODE_SVD_SHIFT 12
#define ZYNQMP_CSU_IDCODE_SVD_MASK (0xe << ZYNQMP_CSU_IDCODE_SVD_SHIFT)
extern struct xilinx_fpga_op zynqmp_op; extern struct xilinx_fpga_op zynqmp_op;
#define XILINX_ZYNQMP_DESC \ #define XILINX_ZYNQMP_DESC \