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Merge git://git.denx.de/u-boot-socfpga

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This commit is contained in:
Tom Rini
2017-09-23 17:32:53 -04:00
parent 6ef71c61f6 a7d5b6c668
commit 0929863aff
3 changed files with 4 additions and 3 deletions
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2
arch/arm/mach-socfpga/misc_gen5.c
View File

@@ -144,7 +144,7 @@ static const struct {
const u16 pn; const u16 pn;
const char *name; const char *name;
const char *var; const char *var;
} const socfpga_fpga_model[] = { } socfpga_fpga_model[] = {
/* Cyclone V E */ /* Cyclone V E */
{ 0x2b15, "Cyclone V, E/A2", "cv_e_a2" }, { 0x2b15, "Cyclone V, E/A2", "cv_e_a2" },
{ 0x2b05, "Cyclone V, E/A4", "cv_e_a4" }, { 0x2b05, "Cyclone V, E/A4", "cv_e_a4" },

3
configs/socfpga_de0_nano_soc_defconfig
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@@ -12,6 +12,7 @@ CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_nano_soc.dtb"
CONFIG_VERSION_VARIABLE=y CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y CONFIG_SPL=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
@@ -24,6 +25,7 @@ CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y CONFIG_CMD_USB=y
@@ -38,6 +40,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_EFI_PARTITION=y
CONFIG_SPL_DM=y CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_FPGA_SOCFPGA=y CONFIG_FPGA_SOCFPGA=y

2
include/configs/socfpga_common.h
View File

@@ -142,12 +142,10 @@
*/ */
#ifdef CONFIG_NAND_DENALI #ifdef CONFIG_NAND_DENALI
#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_DENALI_ECC_SIZE 512 #define CONFIG_NAND_DENALI_ECC_SIZE 512
#define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS #define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS
#define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS #define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10)
#endif #endif
/* /*