dany/u-boot-megous
1
0
Fork 0
mirror of https://xff.cz/git/u-boot/ synced 2025-09-01 08:42:12 +02:00
Code Issues Packages Projects Releases Wiki Activity

mpc8xx: remove RPXlite_dw, quantum board support

Browse Source 
These boards are old enough and have no maintainers.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This commit is contained in:
Masahiro Yamada
2014-06-20 13:54:52 +09:00
committed by Tom Rini
parent dab0f7626e
commit 0657e46e28
28 changed files with 3 additions and 2765 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/pcmcia/Makefile
View File

@@ -7,7 +7,6 @@
obj-$(CONFIG_I82365) += i82365.o
obj-$(CONFIG_8xx) += mpc8xx_pcmcia.o
obj-y += rpx_pcmcia.o
obj-$(CONFIG_IDE_TI_CARDBUS) += ti_pci1410a.o
obj-y += tqm8xx_pcmcia.o
obj-$(CONFIG_MARUBUN_PCCARD) += marubun_pcmcia.o

10
drivers/pcmcia/mpc8xx_pcmcia.c
View File

@@ -211,16 +211,6 @@ static u_int m8xx_get_graycode(u_int size)
#if 0
#if defined(CONFIG_RPXLITE)
/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
* SYPCR is write once only, therefore must the slowest memory be faster
* than the bus monitor or we will get a machine check due to the bus timeout.
*/
#undef PCMCIA_BMT_LIMIT
#define PCMCIA_BMT_LIMIT (6*8)
#endif
static u_int m8xx_get_speed(u_int ns, u_int is_io)
{
u_int reg, clocks, psst, psl, psht;

73
drivers/pcmcia/rpx_pcmcia.c
View File

@@ -1,73 +0,0 @@
/* -------------------------------------------------------------------- */
/* RPX Boards from Embedded Planet */
/* -------------------------------------------------------------------- */
#include <common.h>
#ifdef CONFIG_8xx
#include <mpc8xx.h>
#endif
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#if defined(CONFIG_PCMCIA) \
&& defined(CONFIG_RPXLITE)
#define PCMCIA_BOARD_MSG "RPX CLASSIC or RPX LITE"
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
u_long reg = 0;
switch(vcc) {
case 0: break;
case 33: reg |= BCSR1_PCVCTL4; break;
case 50: reg |= BCSR1_PCVCTL5; break;
default: return 1;
}
switch(vpp) {
case 0: break;
case 33:
case 50:
if(vcc == vpp)
reg |= BCSR1_PCVCTL6;
else
return 1;
break;
case 120:
reg |= BCSR1_PCVCTL7;
default: return 1;
}
/* first, turn off all power */
*((uint *)RPX_CSR_ADDR) &= ~(BCSR1_PCVCTL4 | BCSR1_PCVCTL5
| BCSR1_PCVCTL6 | BCSR1_PCVCTL7);
/* enable new powersettings */
*((uint *)RPX_CSR_ADDR) |= reg;
return 0;
}
int pcmcia_hardware_enable (int slot)
{
return 0; /* No hardware to enable */
}
#if defined(CONFIG_CMD_PCMCIA)
static int pcmcia_hardware_disable(int slot)
{
return 0; /* No hardware to disable */
}
#endif
#endif /* CONFIG_PCMCIA && CONFIG_RPXLITE */

5
drivers/video/mpc8xx_lcd.c
View File

@@ -268,11 +268,6 @@ void lcd_ctrl_init (void *lcdbase)
* the controller.
*/
#ifdef CONFIG_RPXLITE
/* This is special for RPXlite_DW Software Development Platform **[Sam]** */
panel_info.vl_dp = CONFIG_SYS_LOW;
#endif
lccrtmp = LCDBIT (LCCR_BNUM_BIT,
(((panel_info.vl_row * panel_info.vl_col) * (1 << LCD_BPP)) / 128));