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sf: Add dual memories support - DUAL_PARALLEL

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This patch added support for accessing dual memories in
parallel connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
This commit is contained in:
Jagannadha Sutradharudu Teki
2014-01-07 00:11:35 +05:30
parent f77f469117
commit 056fbc73d5
5 changed files with 45 additions and 9 deletions
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3
include/spi.h
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@@ -47,6 +47,7 @@
/* SPI bus connection options */
#define SPI_CONN_DUAL_SHARED 1 << 0
#define SPI_CONN_DUAL_SEPARATED 1 << 1
/* Header byte that marks the start of the message */
#define SPI_PREAMBLE_END_BYTE 0xec
@@ -66,7 +67,7 @@
* @max_write_size: If non-zero, the maximum number of bytes which can
* be written at once, excluding command bytes.
* @memory_map: Address of read-only SPI flash access.
* @option: Varies SPI bus options - separate bus.
* @option: Varies SPI bus options - separate, shared bus.
* @flags: Indication of SPI flags.
*/
struct spi_slave {