Merge e36dd0b445 into cc1de9f039

Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>

README.md

@@ -6,6 +6,7 @@ Official sunxi OpenEmbedded layer for Allwinner-based boards.
 This layer depends on the additional layers:
 
 * [meta-openembedded/meta-oe](http://git.openembedded.org/meta-openembedded/tree/meta-oe)
+* [meta-arm](https://git.yoctoproject.org/meta-arm)
 
 Tested with core-image-base.
 
@@ -16,6 +17,11 @@ Maintainers:
 * Sergey Lapin <slapin@ossfans.org>
 * Marek Belisko <marek.belisko@gmail.com>
 
+Community
+===========
+
+You can reach community + ask your question on gitter: https://matrix.to/#/#meta-sunxi:gitter.im
+
 Kernel / U-Boot Version
 ===========
 Most Allwinner devices and hardware are supported in mainline kernel and U-Boot, so this layer builds mainline by default.

classes/sdcard_image-sunxi.bbclass

@@ -1,129 +0,0 @@
-inherit image_types
-
-#
-# Create an image that can by written onto a SD card using dd.
-# Originally written for rasberrypi adapt for the needs of allwinner sunxi based boards
-#
-# The disk layout used is:
-#
-#    0                      -> 8*1024                           - reserverd
-#    8*1024                 ->                                  - arm combined spl/u-boot or aarch64 spl
-#    40*1024                ->                                  - aarch64 u-boot
-#    2048*1024              -> BOOT_SPACE                       - bootloader and kernel
-#
-#
-
-# Use an uncompressed ext4 by default as rootfs
-SDIMG_ROOTFS_TYPE ?= "ext4"
-
-# This image depends on the rootfs image
-IMAGE_TYPEDEP:sunxi-sdimg = "${SDIMG_ROOTFS_TYPE}"
-
-# Boot partition volume id
-BOOTDD_VOLUME_ID ?= "boot"
-
-# Boot partition size [in KiB]
-BOOT_SPACE ?= "40960"
-
-# First partition begin at sector 2048 : 2048*1024 = 2097152
-IMAGE_ROOTFS_ALIGNMENT = "2048"
-
-SDIMG_ROOTFS = "${IMGDEPLOYDIR}/${IMAGE_NAME}.rootfs.${SDIMG_ROOTFS_TYPE}"
-
-do_image_sunxi_sdimg[depends] += " \
-			parted-native:do_populate_sysroot \
-			mtools-native:do_populate_sysroot \
-			dosfstools-native:do_populate_sysroot \
-			virtual/kernel:do_deploy \
-			virtual/bootloader:do_deploy \
-			"
-
-# SD card image name
-SDIMG = "${IMGDEPLOYDIR}/${IMAGE_NAME}.rootfs.sunxi-sdimg"
-
-IMAGE_CMD:sunxi-sdimg () {
-
-	# Align partitions
-	BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE} + ${IMAGE_ROOTFS_ALIGNMENT} - 1)
-	BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE_ALIGNED} - ${BOOT_SPACE_ALIGNED} % ${IMAGE_ROOTFS_ALIGNMENT})
-	SDIMG_SIZE=$(expr ${IMAGE_ROOTFS_ALIGNMENT} + ${BOOT_SPACE_ALIGNED} + $ROOTFS_SIZE + ${IMAGE_ROOTFS_ALIGNMENT})
-
-	# Initialize sdcard image file
-	dd if=/dev/zero of=${SDIMG} bs=1 count=0 seek=$(expr 1024 \* ${SDIMG_SIZE})
-
-	# Create partition table
-	parted -s ${SDIMG} mklabel msdos
-	# Create boot partition and mark it as bootable
-	parted -s ${SDIMG} unit KiB mkpart primary fat32 ${IMAGE_ROOTFS_ALIGNMENT} $(expr ${BOOT_SPACE_ALIGNED} \+ ${IMAGE_ROOTFS_ALIGNMENT})
-	parted -s ${SDIMG} set 1 boot on
-	# Create rootfs partition
-	parted -s ${SDIMG} unit KiB mkpart primary ext2 $(expr ${BOOT_SPACE_ALIGNED} \+ ${IMAGE_ROOTFS_ALIGNMENT}) $(expr ${BOOT_SPACE_ALIGNED} \+ ${IMAGE_ROOTFS_ALIGNMENT} \+ ${ROOTFS_SIZE})
-	parted ${SDIMG} print
-
-	# Create a vfat image with boot files
-	BOOT_BLOCKS=$(LC_ALL=C parted -s ${SDIMG} unit b print | awk '/ 1 / { print substr($4, 1, length($4 -1)) / 512 /2 }')
-	rm -f ${WORKDIR}/boot.img
-	mkfs.vfat -n "${BOOTDD_VOLUME_ID}" -S 512 -C ${WORKDIR}/boot.img $BOOT_BLOCKS
-
-	mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${MACHINE}.bin ::${KERNEL_IMAGETYPE}
-
-	# Copy device tree file
-	if test -n "${KERNEL_DEVICETREE}"; then
-		for DTS_FILE in ${KERNEL_DEVICETREE}; do
-			DTS_BASE_NAME=`basename ${DTS_FILE} | awk -F "." '{print $1}'`
-			DTS_DIR_NAME=`dirname ${DTS_FILE}`
-			if [ -e ${DEPLOY_DIR_IMAGE}/"${DTS_BASE_NAME}.dtb" ]; then
-
-				if [ ${DTS_FILE} != ${DTS_BASE_NAME}.dtb ]; then
-					mmd -i ${WORKDIR}/boot.img ::/${DTS_DIR_NAME}
-				fi
-
-				kernel_bin="`readlink ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${MACHINE}.bin`"
-				kernel_bin_for_dtb="`readlink ${DEPLOY_DIR_IMAGE}/${DTS_BASE_NAME}.dtb | sed "s,$DTS_BASE_NAME,${KERNEL_IMAGETYPE},g;s,\.dtb$,.bin,g"`"
-				if [ $kernel_bin = $kernel_bin_for_dtb ]; then
-					mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/${DTS_BASE_NAME}.dtb ::/${DTS_FILE}
-				fi
-			fi
-		done
-	fi
-
-	if [ -e "${DEPLOY_DIR_IMAGE}/fex.bin" ]
-	then
-		mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/fex.bin ::script.bin
-	fi
-	if [ -e "${DEPLOY_DIR_IMAGE}/boot.scr" ]
-	then
-		mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/boot.scr ::boot.scr
-	fi
-        if [ -e "${DEPLOY_DIR_IMAGE}/splash.bmp" ]
-        then
-                mcopy -i ${WORKDIR}/boot.img -s ${DEPLOY_DIR_IMAGE}/splash.bmp ::splash.bmp
-        fi
-
-
-	# Add stamp file
-	echo "${IMAGE_NAME}" > ${WORKDIR}/image-version-info
-	mcopy -i ${WORKDIR}/boot.img -v ${WORKDIR}/image-version-info ::
-
-	# Burn Partitions
-	dd if=${WORKDIR}/boot.img of=${SDIMG} conv=notrunc seek=1 bs=$(expr ${IMAGE_ROOTFS_ALIGNMENT} \* 1024) && sync && sync
-	# If SDIMG_ROOTFS_TYPE is a .xz file use xzcat
-	if echo "${SDIMG_ROOTFS_TYPE}" | egrep -q "*\.xz"
-	then
-		xzcat ${SDIMG_ROOTFS} | dd of=${SDIMG} conv=notrunc seek=1 bs=$(expr 1024 \* ${BOOT_SPACE_ALIGNED} + ${IMAGE_ROOTFS_ALIGNMENT} \* 1024) && sync && sync
-	else
-		dd if=${SDIMG_ROOTFS} of=${SDIMG} conv=notrunc seek=1 bs=$(expr 1024 \* ${BOOT_SPACE_ALIGNED} + ${IMAGE_ROOTFS_ALIGNMENT} \* 1024) && sync && sync
-	fi
-
-	# write u-boot-spl at the begining of sdcard in one shot
-	SPL_FILE=$(basename ${SPL_BINARY})
-	dd if=${DEPLOY_DIR_IMAGE}/${SPL_FILE} of=${SDIMG} bs=1024 seek=8 conv=notrunc
-}
-
-# write uboot.itb for arm64 boards
-IMAGE_CMD_sunxi-sdimg:append:sun50i () {
-	if [ -e "${DEPLOY_DIR_IMAGE}/${UBOOT_BINARY}" ]
-	then
-		dd if=${DEPLOY_DIR_IMAGE}/${UBOOT_BINARY} of=${SDIMG} bs=1024 seek=40 conv=notrunc
-	fi
-}

conf/layer.conf

@@ -4,14 +4,14 @@ BBPATH .= ":${LAYERDIR}"
 # We have a recipes directory, add to BBFILES
 BBFILES += "${LAYERDIR}/recipes*/*/*.bb ${LAYERDIR}/recipes*/*/*.bbappend"
 
-BBFILE_COLLECTIONS += "meta-sunxi"
-BBFILE_PATTERN_meta-sunxi := "^${LAYERDIR}/"
-BBFILE_PRIORITY_meta-sunxi = "10"
+BBFILE_COLLECTIONS += "sunxi"
+BBFILE_PATTERN_sunxi := "^${LAYERDIR}/"
+BBFILE_PRIORITY_sunxi = "10"
 
 # This should only be incremented on significant changes that will
 # cause compatibility issues with other layers
-LAYERVERSION_meta-sunxi = "1"
+LAYERVERSION_sunxi = "1"
 
-LAYERDEPENDS_meta-sunxi = "core meta-python"
+LAYERDEPENDS_sunxi = "core meta-python meta-arm"
 
-LAYERSERIES_COMPAT_meta-sunxi = "honister kirkstone"
+LAYERSERIES_COMPAT_sunxi = "honister kirkstone langdale mickledore nanbield"

conf/machine/include/sun50i-h6.inc

@@ -0,0 +1,8 @@
+require conf/machine/include/sunxi64.inc
+
+DEFAULTTUNE ?= "cortexa53-crypto"
+require conf/machine/include/arm/armv8a/tune-cortexa53.inc
+
+MACHINEOVERRIDES =. "sun50i:"
+
+SOC_FAMILY = "sun50i-h6"

conf/machine/include/sun50i-h616.inc

@@ -6,4 +6,3 @@ require conf/machine/include/arm/armv8a/tune-cortexa53.inc
 MACHINEOVERRIDES =. "sun50i:"
 
 SOC_FAMILY = "sun50i-h616"
-

conf/machine/include/sunxi.inc

@@ -14,14 +14,13 @@ XSERVER = "xserver-xorg \
            xf86-input-keyboard"
 
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-mainline"
-PREFERRED_VERSION_linux-mainline ?= "5.15.%"
+PREFERRED_VERSION_linux-mainline ?= "6.5.%"
 PREFERRED_PROVIDER_u-boot ?= "u-boot"
 PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"
 
 KERNEL_IMAGETYPE ?= "uImage"
 
-IMAGE_CLASSES += "sdcard_image-sunxi"
-IMAGE_FSTYPES += "ext3 tar.gz sunxi-sdimg wic.gz wic.bmap"
+IMAGE_FSTYPES += "ext3 tar.gz wic.gz wic.bmap"
 
 MACHINE_EXTRA_RRECOMMENDS = "kernel-modules"
 
@@ -31,7 +30,7 @@ UBOOT_ENTRYPOINT ?= "0x40008000"
 
 SPL_BINARY ?= "u-boot-sunxi-with-spl.bin"
 
-SERIAL_CONSOLE ?= "115200 ttyS0"
+SERIAL_CONSOLES ?= "115200;ttyS0"
 MACHINE_FEATURES ?= "alsa apm keyboard rtc serial screen usbgadget usbhost vfat"
 
 # Mimic the sdcard_image-sunxi.bbclass

conf/machine/include/sunxi64.inc

@@ -4,13 +4,13 @@ include conf/machine/include/soc-family.inc
 MACHINEOVERRIDES =. "sunxi:sunxi64:"
 
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-mainline"
+PREFERRED_VERSION_linux-mainline ?= "6.1.%"
 PREFERRED_PROVIDER_u-boot ?= "u-boot"
 PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"
 
 KERNEL_IMAGETYPE ?= "Image"
 
-IMAGE_CLASSES += "sdcard_image-sunxi"
-IMAGE_FSTYPES += "ext4 tar.gz sunxi-sdimg"
+IMAGE_FSTYPES += "ext4 tar.gz wic.gz wic.bmap"
 
 MACHINE_EXTRA_RRECOMMENDS = "kernel-modules"
 
@@ -20,7 +20,33 @@ UBOOT_ENTRYPOINT ?= "0x40008000"
 UBOOT_LOADADDRESS ?= "0x400080OB00"
 
 #UBOOT_BINARY ?= "u-boot.itb"
-SPL_BINARY ?= "spl/sunxi-spl.bin"
+SPL_BINARY ?= "u-boot-sunxi-with-spl.bin"
 
-SERIAL_CONSOLE ?= "115200 ttyS0"
+SERIAL_CONSOLES ?= "115200;ttyS0"
 MACHINE_FEATURES ?= "alsa apm keyboard rtc serial screen usbgadget usbhost vfat"
+
+# arm64 dbts are under <vendor>/dts but is deployed under DEPLOYDIR 
+do_fix_device_tree_location() {
+
+    for kdt in ${KERNEL_DEVICETREE}
+    do
+        local dbt_dir=$(dirname ${kdt})
+        if [ "." != "${dbt_dir}" ] ; then
+            local dbt=$(basename ${kdt})
+            local dst=${DEPLOY_DIR_IMAGE}/${dbt_dir}/${dbt}
+            if [ ! -f ${dst} ] ; then
+                mkdir -p ${DEPLOY_DIR_IMAGE}/$dbt_dir
+                ln -s ${DEPLOY_DIR_IMAGE}/${dbt} ${dst}
+            fi
+        fi
+    done
+}
+
+
+addtask do_fix_device_tree_location after do_write_wks_template before do_image_wic
+
+SUNXI_BOOT_SPACE ?= "40"
+IMAGE_BOOT_FILES ?= "${KERNEL_IMAGETYPE} boot.scr ${KERNEL_DEVICETREE}"
+
+WKS_FILES ?= "sunxi-sdcard-image.wks.in"
+WKS_FILE_DEPENDS ?= "virtual/kernel u-boot"

conf/machine/lamobo-r1.conf

@@ -0,0 +1,10 @@
+#@TYPE: Machine
+#@NAME: Lamobo R1
+#@DESCRIPTION: Machine configuration for the lamobo r1, based on allwinner A20 CPU http://bananapi.org/
+
+require conf/machine/include/sun7i.inc
+
+MACHINE_EXTRA_RRECOMMENDS = " kernel-modules kernel-devicetree"
+KERNEL_DEVICETREE = "sun7i-a20-lamobo-r1.dtb"
+UBOOT_MACHINE = "Lamobo_R1_config"
+SUNXI_FEX_FILE = "sys_config/a20/lamobo-r1.fex"

conf/machine/nanopi-duo2.conf

@@ -1,9 +0,0 @@
-#@TYPE: Machine
-#@NAME: nanopi-duo2
-#@DESCRIPTION: Machine configuration for the FriendlyARM NanoPi Duo2, based on the Allwinner H3 CPU
-
-require conf/machine/include/sun8i.inc
-
-KERNEL_DEVICETREE = "sun8i-h3-nanopi-duo2.dtb"
-UBOOT_MACHINE = "nanopi_duo2_defconfig"
-

conf/machine/orange-pi-3lts.conf

@@ -0,0 +1,15 @@
+#@TYPE: Machine
+#@NAME: orange-pi-3lts
+#@DESCRIPTION: Machine configuration for the Orange Pi 3 LTS , based on Allwinner H6 CPU
+
+require conf/machine/include/sun50i-h6.inc
+
+KERNEL_DEVICETREE = "allwinner/sun50i-h6-orangepi-3-lts.dtb"
+UBOOT_MACHINE = "orangepi_3_lts_defconfig"
+
+SPL_BINARY = "u-boot-sunxi-with-spl.bin"
+
+# as for now neither graphics nor audio is supported
+MACHINE_FEATURES:remove = "alsa x11 bluetooth wifi"
+#MACHINE_FEATURES:append = "bluetooth wifi"
+

conf/machine/orange-pi-lite.conf

@@ -0,0 +1,9 @@
+#@TYPE: Machine
+#@NAME: orange-pi-lite
+#@DESCRIPTION: Machine configuration for the orange-pi-lite, based on Allwinner H3 CPU
+
+require conf/machine/include/sun8i.inc
+
+KERNEL_DEVICETREE = "sun8i-h3-orangepi-lite.dtb"
+UBOOT_MACHINE = "orangepi_lite_defconfig"
+

conf/machine/orange-pi-one-plus.conf

@@ -3,7 +3,7 @@
 #@DESCRIPTION: Machine configuration for the Orange Pi One Plus, based on Allwinner H6 CPU
 
 
-require conf/machine/include/sun50i.inc
+require conf/machine/include/sun50i-h6.inc
 
 KERNEL_DEVICETREE = "allwinner/sun50i-h6-orangepi-one-plus.dtb"
 UBOOT_MACHINE = "orangepi_one_plus_defconfig"

conf/machine/orange-pi-zero.conf

@@ -1,6 +1,6 @@
 #@TYPE: Machine
-#@NAME: orange-pi-one
-#@DESCRIPTION: Machine configuration for the orange-pi-one, base on allwinner H3 CPU
+#@NAME: orange-pi-zero
+#@DESCRIPTION: Machine configuration for the orange-pi-zero, based on Allwinner H2 CPU
 
 require conf/machine/include/sun8i.inc
 

recipes-bsp/atf/atf-sunxi/0001-Use-same-type-as-in-declaration.patch

@@ -1,26 +0,0 @@
-From 087b9306659effac870b4794c0f775ce3d7208c5 Mon Sep 17 00:00:00 2001
-From: Marek Belisko <marek.belisko@open-nandra.com>
-Date: Wed, 13 Apr 2022 08:09:29 +0200
-Subject: [PATCH] Use same type as in declaration
-
-Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
----
- services/std_svc/psci/psci_common.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/services/std_svc/psci/psci_common.c b/services/std_svc/psci/psci_common.c
-index 75f52f538..918a719f6 100644
---- a/services/std_svc/psci/psci_common.c
-+++ b/services/std_svc/psci/psci_common.c
-@@ -261,7 +261,7 @@ void psci_acquire_afflvl_locks(int start_afflvl,
-  ******************************************************************************/
- void psci_release_afflvl_locks(int start_afflvl,
- 			       int end_afflvl,
--			       aff_map_node_t *mpidr_nodes[])
-+			       mpidr_aff_map_nodes_t mpidr_nodes)
- {
- 	int level;
- 
--- 
-2.25.1
-

recipes-bsp/atf/atf-sunxi_git.bb

@@ -1,35 +0,0 @@
-DESCRIPTION = "ARM Trusted Firmware Allwinner"
-LICENSE = "BSD-3-Clause"
-LIC_FILES_CHKSUM = "file://license.md;md5=829bdeb34c1d9044f393d5a16c068371"
-LIC_FILES_CHKSUM:sun50i-h616 = "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde"
-
-SRC_URI = " \
-git://github.com/apritzel/arm-trusted-firmware;nobranch=1;protocol=https \
-file://0001-Use-same-type-as-in-declaration.patch \
-"
-SRCREV = "aa75c8da415158a94b82a430b2b40000778e851f"
-
-SRC_URI:sun50i-h616 = "git://github.com/ARM-software/arm-trusted-firmware;nobranch=1;protocol=https"
-SRCREV:sun50i-h616 = "f04dfbb297f03d7f8d7f7c00ce8712e1a10295cf"
-
-S = "${WORKDIR}/git"
-B = "${WORKDIR}/build"
-
-COMPATIBLE_MACHINE = "(sun50i|sun50i-h616)"
-
-PLATFORM:sun50i = "sun50iw1p1"
-PLATFORM:sun50i-h616 = "sun50i_h616"
-
-LDFLAGS[unexport] = "1"
-
-do_compile() {
-    oe_runmake -C ${S} BUILD_BASE=${B} \
-      CROSS_COMPILE=${TARGET_PREFIX} \
-      PLAT=${PLATFORM} \
-      bl31 \
-      all
-}
-
-do_install() {
-    install -D -p -m 0644 ${B}/${PLATFORM}/release/bl31.bin ${DEPLOY_DIR_IMAGE}/bl31.bin
-}

recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend

@@ -0,0 +1,7 @@
+COMPATIBLE_MACHINE = "(sun50i|sun50i-h616|sun50i-h6)"
+
+TFA_PLATFORM:sun50i = "sun50i_a64"
+TFA_PLATFORM:sun50i-h6 = "sun50i_h6"
+TFA_PLATFORM:sun50i-h616 = "sun50i_h616"
+
+TFA_BUILD_TARGET = "bl31"

recipes-bsp/u-boot/files/0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch

@@ -3,7 +3,7 @@ From: Florin Sarbu <florin@resin.io>
 Date: Wed, 12 Sep 2018 14:22:49 +0200
 Subject: [PATCH] nanopi_neo_air_defconfig: Enable eMMC support
 
-Upstream-status: Pending
+Upstream-Status: Pending
 Signed-off-by: Florin Sarbu <florin@resin.io>
 
 ---

recipes-bsp/u-boot/files/0002-Added-nanopi-r1-board-support.patch

@@ -5,6 +5,8 @@ Subject: [PATCH] Added nanopi-r1 board support
 
 Patch taken from : https://github.com/armbian/build/blob/master/patch/u-boot/u-boot-sunxi/add-nanopi-r1-and-duo2.patch
 
+Upstream-Status: Pending
+
 Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
 ---
 diff --git a/configs/nanopi_r1_defconfig b/configs/nanopi_r1_defconfig

recipes-bsp/u-boot/files/0003-Add-nanopi-duo2-board-support.patch

@@ -1,28 +0,0 @@
-diff --git a/configs/nanopi_duo2_defconfig b/configs/nanopi_duo2_defconfig
-new file mode 100644
-index 0000000..1e51018
---- /dev/null
-+++ b/configs/nanopi_duo2_defconfig
-@@ -0,0 +1,21 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_SYS_TEXT_BASE=0x4a000000
-+CONFIG_SPL_SPI_FLASH_SUPPORT=y
-+CONFIG_MACH_SUN8I_H3=y
-+CONFIG_DRAM_CLK=408
-+CONFIG_DRAM_ZQ=3881979
-+CONFIG_DRAM_ODT_EN=y
-+# CONFIG_VIDEO_DE2 is not set
-+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-duo2"
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+CONFIG_CONSOLE_MUX=y
-+CONFIG_SPL=y
-+CONFIG_SYS_CLK_FREQ=480000000
-+# CONFIG_CMD_IMLS is not set
-+# CONFIG_CMD_FLASH is not set
-+# CONFIG_CMD_FPGA is not set
-+CONFIG_SPL_SPI_SUNXI=y
-+CONFIG_SUN8I_EMAC=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
-

recipes-bsp/u-boot/files/0003-sunxi-H6-Enable-Ethernet-on-Orange-Pi-One-Plus.patch

@@ -0,0 +1,58 @@
+From: Anne Macedo <retpolanne@posteo.net>
+Date: Tue, 11 Jul 2023 00:39:58 +0000
+Subject: [PATCH] sunxi: H6: Enable Ethernet on Orange Pi One Plus
+
+Enable Ethernet on Orange Pi One Plus by using the correct phy for
+Realtek RTL8211E instead of the Generic One. Also use CONFIG_MACPWR to
+turn on ethernet on startup.
+
+After this patch is applied, a few issues can be seen:
+
+- there's still a PHY reset timed out error that doesn't seem to cause
+  any impacts to the overall connection
+
+- sometimes the emac driver times out after reset (yellow LED turns on
+  and never blinks)
+
+For future patches: for now, CONFIG_MACPWR is the only way to enable
+Ethernet on boot. There's already code on the dts for using the 3v3-gmac
+regulator. However, it is not probed on boot, so it only starts after a
+"regulator status" command is issued.
+
+More details about the troubleshooting on [1].
+
+Upstream-Status: Submitted
+
+[1] https://lore.kernel.org/u-boot/4wsvwgy56e2xfgtvioru2tf2ofkqprlts36qggivxogww6pn5j@4jk63zxhzhag/
+
+Signed-off-by: Anne Macedo <retpolanne@posteo.net>
+---
+ arch/arm/dts/sun50i-h6-orangepi-one-plus.dts | 2 +-
+ configs/orangepi_one_plus_defconfig          | 4 ++++
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts b/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts
+index 29a081e72a..6427c58f8a 100644
+--- a/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts
++++ b/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts
+@@ -37,7 +37,7 @@
+ 
+ &mdio {
+ 	ext_rgmii_phy: ethernet-phy@1 {
+-		compatible = "ethernet-phy-ieee802.3-c22";
++		compatible = "ethernet-phy-id001c.c915", "ethernet-phy-ieee802.3-c22" ;
+ 		reg = <1>;
+ 	};
+ };
+diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig
+index aa5f540eb1..a1835492db 100644
+--- a/configs/orangepi_one_plus_defconfig
++++ b/configs/orangepi_one_plus_defconfig
+@@ -8,3 +8,7 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_OHCI_HCD=y
++CONFIG_SUN8I_EMAC=y
++CONFIG_PHY_REALTEK=y
++CONFIG_PHY_ETHERNET_ID=y
++CONFIG_MACPWR="PD6"

recipes-bsp/u-boot/files/0004-OrangePi-3-LTS-support.patch

@@ -0,0 +1,420 @@
+From 9966dda20246285abf8b417bd251d5a4bea3e423 Mon Sep 17 00:00:00 2001
+From: Juliano Dorigão <jdorigao@gmail.com>
+Date: Fri, 3 Mar 2023 16:11:30 -0400
+Subject: [PATCH] OrangePi 3 LTS support
+
+---
+ arch/arm/dts/Makefile                     |   1 +
+ arch/arm/dts/sun50i-h6-orangepi-3-lts.dts | 361 ++++++++++++++++++++++
+ configs/orangepi_3_lts_defconfig          |  19 ++
+ 3 files changed, 381 insertions(+)
+ create mode 100644 arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
+ create mode 100644 configs/orangepi_3_lts_defconfig
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index 43951a77..8dbbb6f4 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -710,6 +710,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
+ dtb-$(CONFIG_MACH_SUN50I_H6) += \
+ 	sun50i-h6-beelink-gs1.dtb \
+ 	sun50i-h6-orangepi-3.dtb \
++	sun50i-h6-orangepi-3-lts.dtb \
+ 	sun50i-h6-orangepi-lite2.dtb \
+ 	sun50i-h6-orangepi-one-plus.dtb \
+ 	sun50i-h6-pine-h64.dtb \
+diff --git a/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts b/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
+new file mode 100644
+index 00000000..67f38b8a
+--- /dev/null
++++ b/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
+@@ -0,0 +1,361 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++// Copyright (C) 2023 Jernej Skrabec <jernej.skrabec@gmail.com>
++// Based on sun50i-h6-orangepi-3.dts, which is:
++// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
++
++/dts-v1/;
++
++#include "sun50i-h6.dtsi"
++#include "sun50i-h6-cpu-opp.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++	model = "OrangePi 3 LTS";
++	compatible = "xunlong,orangepi-3-lts", "allwinner,sun50i-h6";
++
++	aliases {
++		ethernet0 = &emac;
++		serial0 = &uart0;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	connector {
++		compatible = "hdmi-connector";
++		ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
++		type = "a";
++
++		port {
++			hdmi_con_in: endpoint {
++				remote-endpoint = <&hdmi_out_con>;
++			};
++		};
++	};
++
++	ext_osc32k: ext_osc32k_clk {
++		#clock-cells = <0>;
++		compatible = "fixed-clock";
++		clock-frequency = <32768>;
++		clock-output-names = "ext_osc32k";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led-0 {
++			label = "orangepi:red:power";
++			gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
++		};
++
++		led-1 {
++			label = "orangepi:green:status";
++			gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
++			default-state = "on";
++		};
++	};
++
++	reg_vcc5v: vcc5v {
++		/* board wide 5V supply directly from the DC jack */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-5v";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		regulator-always-on;
++	};
++
++	reg_gmac_3v3: gmac-3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "gmac-3v3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		startup-delay-us = <150000>;
++		enable-active-high;
++		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
++	};
++
++	reg_vcc33_wifi: vcc33-wifi {
++		/* Always on 3.3V regulator for WiFi and BT */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc33-wifi";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		enable-active-high;
++		gpio = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
++	};
++
++	reg_vcc_wifi_io: vcc-wifi-io {
++		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-wifi-io";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		regulator-always-on;
++		vin-supply = <&reg_vcc33_wifi>;
++	};
++
++	wifi_pwrseq: wifi-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rtc 1>;
++		clock-names = "ext_clock";
++		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
++		post-power-on-delay-ms = <200>;
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdca>;
++};
++
++&de {
++	status = "okay";
++};
++
++&dwc3 {
++	status = "okay";
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ehci3 {
++	status = "okay";
++};
++
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&ext_rgmii_pins>;
++	phy-mode = "rgmii";
++	phy-handle = <&ext_rgmii_phy>;
++	phy-supply = <&reg_gmac_3v3>;
++	allwinner,rx-delay-ps = <1500>;
++	allwinner,tx-delay-ps = <700>;
++	status = "okay";
++};
++
++&gpu {
++	mali-supply = <&reg_dcdcc>;
++	status = "okay";
++};
++
++&hdmi {
++	hvcc-supply = <&reg_bldo2>;
++	status = "okay";
++};
++
++&hdmi_out {
++	hdmi_out_con: endpoint {
++		remote-endpoint = <&hdmi_con_in>;
++	};
++};
++
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++
++		reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
++		reset-assert-us = <15000>;
++		reset-deassert-us = <40000>;
++	};
++};
++
++&mmc0 {
++	vmmc-supply = <&reg_cldo1>;
++	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
++	bus-width = <4>;
++	status = "okay";
++};
++
++&mmc1 {
++	vmmc-supply = <&reg_vcc33_wifi>;
++	vqmmc-supply = <&reg_vcc_wifi_io>;
++	mmc-pwrseq = <&wifi_pwrseq>;
++	bus-width = <4>;
++	non-removable;
++	status = "okay";
++};
++
++&mmc2 {
++	vmmc-supply = <&reg_cldo1>;
++	vqmmc-supply = <&reg_bldo2>;
++	cap-mmc-hw-reset;
++	non-removable;
++	bus-width = <8>;
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&ohci3 {
++	status = "okay";
++};
++
++&pio {
++	vcc-pc-supply = <&reg_bldo2>;
++	vcc-pd-supply = <&reg_cldo1>;
++	vcc-pg-supply = <&reg_bldo3>;
++};
++
++&r_ir {
++	status = "okay";
++};
++
++&r_rsb {
++	clock-frequency = <100000>;
++	status = "okay";
++
++	axp805: pmic@745 {
++		compatible = "x-powers,axp805", "x-powers,axp806";
++		reg = <0x745>;
++		interrupt-parent = <&r_intc>;
++		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
++		interrupt-controller;
++		#interrupt-cells = <1>;
++		x-powers,self-working-mode;
++		vina-supply = <&reg_vcc5v>;
++		vinb-supply = <&reg_vcc5v>;
++		vinc-supply = <&reg_vcc5v>;
++		vind-supply = <&reg_vcc5v>;
++		vine-supply = <&reg_vcc5v>;
++		aldoin-supply = <&reg_vcc5v>;
++		bldoin-supply = <&reg_vcc5v>;
++		cldoin-supply = <&reg_vcc5v>;
++
++		regulators {
++			reg_aldo1: aldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc-pl-led-ir";
++			};
++
++			reg_aldo2: aldo2 {
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc33-audio-tv-ephy-mac";
++			};
++
++			/* ALDO3 is shorted to CLDO1 */
++			reg_aldo3: aldo3 {
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
++			};
++
++			reg_bldo1: bldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc18-dram-bias-pll";
++			};
++
++			reg_bldo2: bldo2 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc-efuse-pcie-hdmi-pc";
++			};
++
++			reg_bldo3: bldo3 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc-pm-pg-dcxoio-wifi";
++			};
++
++			bldo4 {
++				/* unused */
++			};
++
++			reg_cldo1: cldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
++			};
++
++			cldo2 {
++				/* unused */
++			};
++
++			cldo3 {
++				/* unused */
++			};
++
++			reg_dcdca: dcdca {
++				regulator-always-on;
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <1160000>;
++				regulator-ramp-delay = <2500>;
++				regulator-name = "vdd-cpu";
++			};
++
++			reg_dcdcc: dcdcc {
++				regulator-enable-ramp-delay = <32000>;
++				regulator-min-microvolt = <810000>;
++				regulator-max-microvolt = <1080000>;
++				regulator-ramp-delay = <2500>;
++				regulator-name = "vdd-gpu";
++			};
++
++			reg_dcdcd: dcdcd {
++				regulator-always-on;
++				regulator-min-microvolt = <980000>;
++				regulator-max-microvolt = <980000>;
++				regulator-name = "vdd-sys";
++			};
++
++			reg_dcdce: dcdce {
++				regulator-always-on;
++				regulator-min-microvolt = <1200000>;
++				regulator-max-microvolt = <1200000>;
++				regulator-name = "vcc-dram";
++			};
++
++			sw {
++				/* unused */
++			};
++		};
++	};
++};
++
++&pwm {
++	status = "okay";
++};
++
++&r_ir {
++	status = "okay";
++};
++
++&rtc {
++	clocks = <&ext_osc32k>;
++};
++
++/delete-node/ &spi0;
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_ph_pins>;
++	status = "okay";
++};
++
++&usb2otg {
++	dr_mode = "host";
++	status = "okay";
++};
++
++&usb2phy {
++	usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
++	usb0_vbus-supply = <&reg_vcc5v>;
++	usb3_vbus-supply = <&reg_vcc5v>;
++	status = "okay";
++};
++
++&usb3phy {
++	status = "okay";
++};
+diff --git a/configs/orangepi_3_lts_defconfig b/configs/orangepi_3_lts_defconfig
+new file mode 100644
+index 00000000..41a9af4e
+--- /dev/null
++++ b/configs/orangepi_3_lts_defconfig
+@@ -0,0 +1,19 @@
++CONFIG_ARM=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3-lts"
++CONFIG_SPL=y
++CONFIG_MACH_SUN50I_H6=y
++CONFIG_SUNXI_DRAM_H6_LPDDR3=y
++CONFIG_MMC0_CD_PIN="PF6"
++CONFIG_MMC_SUNXI_SLOT_EXTRA=2
++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_SPL_STACK=0x118000
++CONFIG_SYS_PBSIZE=1024
++CONFIG_SYS_BOOTM_LEN=0x2000000
++CONFIG_PHY_SUN50I_USB3=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_XHCI_DWC3=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_DWC3=y
++# CONFIG_USB_DWC3_GADGET is not set
+-- 
+2.39.2
+

recipes-bsp/u-boot/files/0004-i2c-mvtwsi-Add-compatible-string-for-allwinner-sun4i.patch

@@ -1,32 +0,0 @@
-From eb31a4a141bf401f92426bd053a965022e47290d Mon Sep 17 00:00:00 2001
-From: Chris Morgan <macromorgan@hotmail.com>
-Date: Fri, 7 Jan 2022 11:52:54 -0600
-Subject: [PATCH] i2c: mvtwsi: Add compatible string for allwinner,
- sun4i-a10-i2c
-
-This adds a compatible string for the Allwinner Sun4i-A10 I2C
-controller. Without this, boards based on the R8 and A13 (at a
-minimum) fail to boot.
-
-Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
-Acked-by: Akash Gajjar <gajjar04akash@gmail.com>
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
----
- drivers/i2c/mvtwsi.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
-index bad4b1484f..f48a4f25aa 100644
---- a/drivers/i2c/mvtwsi.c
-+++ b/drivers/i2c/mvtwsi.c
-@@ -900,6 +900,7 @@ static const struct dm_i2c_ops mvtwsi_i2c_ops = {
- static const struct udevice_id mvtwsi_i2c_ids[] = {
- 	{ .compatible = "marvell,mv64xxx-i2c", },
- 	{ .compatible = "marvell,mv78230-i2c", },
-+	{ .compatible = "allwinner,sun4i-a10-i2c", },
- 	{ .compatible = "allwinner,sun6i-a31-i2c", },
- 	{ /* sentinel */ }
- };
--- 
-2.34.1
-

recipes-bsp/u-boot/files/0005-Added-dtb-for-sun8i-h3-nanopi-r1-device.patch

@@ -1,204 +0,0 @@
-From 4ac73cb006bf34108ca280812e48942989a3575b Mon Sep 17 00:00:00 2001
-From: Marek Belisko <marek.belisko@gmail.com>
-Date: Wed, 24 Apr 2024 15:06:58 +0200
-Subject: [PATCH] Added dtb for sun8i-h3-nanopi-r1 device
-
-Taken from mainline: 2c597855aa17d11520da642d03c82ff0c68042ab
-
-Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
----
- arch/arm/dts/Makefile               |   1 +
- arch/arm/dts/sun8i-h3-nanopi-r1.dts | 169 ++++++++++++++++++++++++++++
- 2 files changed, 170 insertions(+)
- create mode 100644 arch/arm/dts/sun8i-h3-nanopi-r1.dts
-
-diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
-index 9a9be76e6d..7a984510fe 100644
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -589,6 +589,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
- 	sun8i-h3-nanopi-m1-plus.dtb \
- 	sun8i-h3-nanopi-neo.dtb \
- 	sun8i-h3-nanopi-neo-air.dtb \
-+	sun8i-h3-nanopi-r1.dtb \
- 	sun8i-h3-orangepi-2.dtb \
- 	sun8i-h3-orangepi-lite.dtb \
- 	sun8i-h3-orangepi-one.dtb \
-diff --git a/arch/arm/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
-new file mode 100644
-index 0000000000..42cd1131ad
---- /dev/null
-+++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
-@@ -0,0 +1,169 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (C) 2019 Igor Pecovnik <igor@armbian.com>
-+ * Copyright (C) 2020 Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
-+ * Copyright (C) 2020 Yu-Tung Chang <mtwget@gmail.com>
-+*/
-+
-+#include "sun8i-h3-nanopi.dtsi"
-+#include <dt-bindings/leds/common.h>
-+
-+/ {
-+	model = "FriendlyARM NanoPi R1";
-+	compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
-+
-+	aliases {
-+		serial1 = &uart1;
-+		ethernet0 = &emac;
-+		ethernet1 = &wifi;
-+	};
-+
-+	reg_gmac_3v3: gmac-3v3 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "gmac-3v3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		startup-delay-us = <100000>;
-+		enable-active-high;
-+		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
-+	};
-+
-+	reg_vdd_cpux: gpio-regulator {
-+		compatible = "regulator-gpio";
-+		regulator-name = "vdd-cpux";
-+		regulator-type = "voltage";
-+		regulator-boot-on;
-+		regulator-always-on;
-+		regulator-min-microvolt = <1100000>;
-+		regulator-max-microvolt = <1300000>;
-+		regulator-ramp-delay = <50>;
-+		gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
-+		gpios-states = <0x1>;
-+		states = <1100000 0x0>,
-+			 <1300000 0x1>;
-+	};
-+
-+	wifi_pwrseq: wifi_pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
-+		clocks = <&rtc CLK_OSC32K_FANOUT>;
-+		clock-names = "ext_clock";
-+	};
-+
-+	leds {
-+		led-2 {
-+			function = LED_FUNCTION_WAN;
-+			color = <LED_COLOR_ID_GREEN>;
-+			gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
-+		};
-+
-+		led-3 {
-+			function = LED_FUNCTION_LAN;
-+			color = <LED_COLOR_ID_GREEN>;
-+			gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; /* PA9 */
-+		};
-+	};
-+};
-+
-+&cpu0 {
-+	cpu-supply = <&reg_vdd_cpux>;
-+};
-+
-+&ehci1 {
-+	status = "okay";
-+};
-+
-+&ehci2 {
-+	status = "okay";
-+};
-+
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emac_rgmii_pins>;
-+	phy-supply = <&reg_gmac_3v3>;
-+	phy-handle = <&ext_rgmii_phy>;
-+	phy-mode = "rgmii-id";
-+	status = "okay";
-+};
-+
-+&external_mdio {
-+	ext_rgmii_phy: ethernet-phy@7 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <7>;
-+	};
-+};
-+
-+&mmc1 {
-+	vmmc-supply = <&reg_vcc3v3>;
-+	vqmmc-supply = <&reg_vcc3v3>;
-+	mmc-pwrseq = <&wifi_pwrseq>;
-+	bus-width = <4>;
-+	non-removable;
-+	status = "okay";
-+
-+	wifi: wifi@1 {
-+		reg = <1>;
-+		compatible = "brcm,bcm4329-fmac";
-+		interrupt-parent = <&pio>;
-+		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
-+		interrupt-names = "host-wake";
-+	};
-+};
-+
-+&mmc2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&mmc2_8bit_pins>;
-+	vmmc-supply = <&reg_vcc3v3>;
-+	vqmmc-supply = <&reg_vcc3v3>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
-+&ohci1 {
-+	status = "okay";
-+};
-+
-+&ohci2 {
-+	status = "okay";
-+};
-+
-+&reg_usb0_vbus {
-+	gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
-+	status = "okay";
-+};
-+
-+&uart1 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart1_pins>;
-+	status = "okay";
-+};
-+
-+&uart3 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>;
-+	uart-has-rtscts;
-+	status = "okay";
-+
-+	bluetooth {
-+		compatible = "brcm,bcm43438-bt";
-+		clocks = <&rtc CLK_OSC32K_FANOUT>;
-+		clock-names = "lpo";
-+		vbat-supply = <&reg_vcc3v3>;
-+		vddio-supply = <&reg_vcc3v3>;
-+		device-wakeup-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
-+		host-wakeup-gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
-+		shutdown-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
-+	};
-+};
-+
-+&usb_otg {
-+	status = "okay";
-+	dr_mode = "otg";
-+};
-+
-+&usbphy {
-+	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
-+	usb0_vbus-supply = <&reg_usb0_vbus>;
-+	status = "okay";
-+};
--- 
-2.25.1
-

recipes-bsp/u-boot/files/0006-nanopi-r1-dts-fixes.patch

@@ -1,35 +0,0 @@
-From 08aab303e36a3da19d49f111e5f2ad7d85b642fd Mon Sep 17 00:00:00 2001
-From: Marek Belisko <marek.belisko@gmail.com>
-Date: Wed, 24 Apr 2024 15:32:12 +0200
-Subject: [PATCH] nanopi-r1: dts fixes
-
-Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
----
- arch/arm/dts/sun8i-h3-nanopi-r1.dts | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
-index 42cd1131ad..26e2e6172e 100644
---- a/arch/arm/dts/sun8i-h3-nanopi-r1.dts
-+++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
-@@ -46,7 +46,7 @@
- 	wifi_pwrseq: wifi_pwrseq {
- 		compatible = "mmc-pwrseq-simple";
- 		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
--		clocks = <&rtc CLK_OSC32K_FANOUT>;
-+		clocks = <&rtc 1>;
- 		clock-names = "ext_clock";
- 	};
- 
-@@ -147,7 +147,7 @@
- 
- 	bluetooth {
- 		compatible = "brcm,bcm43438-bt";
--		clocks = <&rtc CLK_OSC32K_FANOUT>;
-+		clocks = <&rtc 1>;
- 		clock-names = "lpo";
- 		vbat-supply = <&reg_vcc3v3>;
- 		vddio-supply = <&reg_vcc3v3>;
--- 
-2.25.1
-

recipes-bsp/u-boot/files/arm/boot.cmd

@@ -6,6 +6,6 @@ if itest.b *0x28 == 0x02 ; then
 	rootdev=mmcblk1p2
 fi
 setenv bootargs console=${console} console=tty1 root=/dev/${rootdev} rootwait panic=10 ${extra}
-load mmc 0:1 ${fdt_addr_r} ${fdtfile} || load mmc 0:1 ${fdt_addr_r} boot/${fdtfile}
+load mmc 0:1 ${fdt_addr_r} ${fdtfile} || load mmc 0:1 ${fdt_addr_r} boot/allwinner/${fdtfile}
 load mmc 0:1 ${kernel_addr_r} zImage || load mmc 0:1 ${kernel_addr_r} boot/zImage || load mmc 0:1 ${kernel_addr_r} uImage || load mmc 0:1 ${kernel_addr_r} boot/uImage
 bootz ${kernel_addr_r} - ${fdt_addr_r} || bootm ${kernel_addr_r} - ${fdt_addr_r}

recipes-bsp/u-boot/files/bananapi-m64/boot.cmd

@@ -0,0 +1,11 @@
+# Default to (primary) SD
+rootdev=mmcblk0p2
+if itest.b *0x28 == 0x02 ; then
+	# U-Boot loaded from eMMC or secondary SD so use it for rootfs too
+	echo "U-boot loaded from eMMC or secondary SD"
+	rootdev=mmcblk2p2
+fi
+setenv bootargs console=${console} console=tty1 root=/dev/${rootdev} rootwait panic=10 ${extra}
+load mmc 0:1 ${fdt_addr_r} ${fdtfile}
+load mmc 0:1 ${kernel_addr_r} Image
+booti ${kernel_addr_r} - ${fdt_addr_r}

recipes-bsp/u-boot/u-boot_%.bbappend

@@ -1,7 +1,7 @@
 FILESEXTRAPATHS:prepend:sunxi := "${THISDIR}/files:"
 
 DEPENDS:append:sunxi = " bc-native dtc-native swig-native python3-native flex-native bison-native "
-DEPENDS:append:sun50i = " atf-sunxi "
+DEPENDS:append:sun50i = " trusted-firmware-a"
 
 COMPATIBLE_MACHINE:sunxi = "(sun4i|sun5i|sun7i|sun8i|sun50i)"
 
@@ -14,10 +14,8 @@ DEFAULT_PREFERENCE:sun50i = "1"
 SRC_URI:append:sunxi = " \
         file://0001-nanopi_neo_air_defconfig-Enable-eMMC-support.patch \
 	file://0002-Added-nanopi-r1-board-support.patch \
-	file://0003-Add-nanopi-duo2-board-support.patch \
-	file://0004-i2c-mvtwsi-Add-compatible-string-for-allwinner-sun4i.patch \
-	file://0005-Added-dtb-for-sun8i-h3-nanopi-r1-device.patch \
-	file://0006-nanopi-r1-dts-fixes.patch \
+	file://0003-sunxi-H6-Enable-Ethernet-on-Orange-Pi-One-Plus.patch \
+        file://0004-OrangePi-3-LTS-support.patch \
         file://boot.cmd \
 "
 
@@ -27,7 +25,7 @@ UBOOT_ENV:sunxi = "boot"
 EXTRA_OEMAKE:append:sunxi = ' HOSTLDSHARED="${BUILD_CC} -shared ${BUILD_LDFLAGS} ${BUILD_CFLAGS}" '
 EXTRA_OEMAKE:append:sun50i = " BL31=${DEPLOY_DIR_IMAGE}/bl31.bin SCP=/dev/null"
 
-do_compile_sun50i[depends] += "atf-sunxi:do_deploy"
+do_compile:sun50i[depends] += "trusted-firmware-a:do_deploy"
 
 do_compile:append:sunxi() {
     ${B}/tools/mkimage -C none -A arm -T script -d ${WORKDIR}/boot.cmd ${WORKDIR}/${UBOOT_ENV_BINARY}

recipes-graphics/libgles/sunxi-mali_git.bb

@@ -22,7 +22,7 @@ python __anonymous() {
 }
 
 SRCREV = "d343311efc8db166d8371b28494f0f27b6a58724"
-SRC_URI = "gitsm://github.com/linux-sunxi/sunxi-mali.git \
+SRC_URI = "git://github.com/linux-sunxi/sunxi-mali.git;protocol=https;branch=master \
            file://0001-Add-EGLSyncKHR-EGLTimeKHR-and-GLChar-definition.patch \
            file://0002-Add-missing-GLchar-definition.patch \
            file://0003-Fix-sed-to-replace-by-the-correct-var.patch \

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0001-dts-add-h616-and-orangepizero2.patch

@@ -1,907 +0,0 @@
-From 4de4213f698a5962f839f671e4dec247baa35d5b Mon Sep 17 00:00:00 2001
-From: Patryk Biel <patryk.biel.external@trumpf.com>
-Date: Wed, 25 Jan 2023 20:30:15 +0100
-Subject: [PATCH] Add device tree from master
-
----
- arch/arm64/boot/dts/allwinner/Makefile        |   1 +
- .../allwinner/sun50i-h616-orangepi-zero2.dts  | 261 ++++++++
- .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 590 ++++++++++++++++++
- include/dt-bindings/clock/sun6i-rtc.h         |  10 +
- 4 files changed, 862 insertions(+)
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
- create mode 100644 include/dt-bindings/clock/sun6i-rtc.h
-
-diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
-index a96d9d2d8..471822f5f 100644
---- a/arch/arm64/boot/dts/allwinner/Makefile
-+++ b/arch/arm64/boot/dts/allwinner/Makefile
-@@ -37,3 +37,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
-+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
-\ No newline at end of file
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
-new file mode 100644
-index 000000000..e92055145
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
-@@ -0,0 +1,261 @@
-+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
-+/*
-+ * Copyright (C) 2020 Arm Ltd.
-+ */
-+
-+/dts-v1/;
-+
-+#include "sun50i-h616.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/leds/common.h>
-+
-+/ {
-+	model = "OrangePi Zero2";
-+	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
-+
-+	aliases {
-+		ethernet0 = &emac0;
-+		serial0 = &uart0;
-+	};
-+
-+	chosen {
-+		stdout-path = "serial0:115200n8";
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		led-0 {
-+			function = LED_FUNCTION_POWER;
-+			color = <LED_COLOR_ID_RED>;
-+			gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
-+			default-state = "on";
-+		};
-+
-+		led-1 {
-+			function = LED_FUNCTION_STATUS;
-+			color = <LED_COLOR_ID_GREEN>;
-+			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
-+		};
-+	};
-+
-+	reg_vcc5v: vcc5v {
-+		/* board wide 5V supply directly from the USB-C socket */
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc-5v";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-always-on;
-+	};
-+
-+	reg_vcc33_wifi: vcc33-wifi {
-+		/* Always on 3.3V regulator for WiFi and BT */
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc33-wifi";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+		vin-supply = <&reg_vcc5v>;
-+	};
-+
-+	reg_vcc_wifi_io: vcc-wifi-io {
-+		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc-wifi-io";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-always-on;
-+		vin-supply = <&reg_vcc33_wifi>;
-+	};
-+
-+	wifi_pwrseq: wifi-pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		clocks = <&rtc 1>;
-+		clock-names = "osc32k-out";
-+		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
-+		post-power-on-delay-ms = <200>;
-+	};
-+};
-+
-+&emac0 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&ext_rgmii_pins>;
-+	phy-mode = "rgmii";
-+	phy-handle = <&ext_rgmii_phy>;
-+	phy-supply = <&reg_dcdce>;
-+	allwinner,rx-delay-ps = <3100>;
-+	allwinner,tx-delay-ps = <700>;
-+	status = "okay";
-+};
-+
-+&mmc1 {
-+	vmmc-supply = <&reg_vcc33_wifi>;
-+	vqmmc-supply = <&reg_vcc_wifi_io>;
-+	mmc-pwrseq = <&wifi_pwrseq>;
-+	bus-width = <4>;
-+	non-removable;
-+	mmc-ddr-1_8v;
-+	status = "okay";
-+
-+	uwe-bsp {
-+		compatible = "unisoc,uwe_bsp";
-+		keep-power-on;
-+		data-irq;
-+		//adma-tx;
-+		adma-rx;
-+		//blksz-512;
-+		status = "okay";
-+	};
-+};
-+
-+&mdio0 {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <1>;
-+	};
-+};
-+
-+&mmc0 {
-+	vmmc-supply = <&reg_dcdce>;
-+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;	/* PF6 */
-+	bus-width = <4>;
-+	status = "okay";
-+};
-+
-+&r_rsb {
-+	status = "okay";
-+
-+	axp305: pmic@745 {
-+		compatible = "x-powers,axp305", "x-powers,axp805",
-+			     "x-powers,axp806";
-+		interrupt-controller;
-+		#interrupt-cells = <1>;
-+		reg = <0x745>;
-+
-+		x-powers,self-working-mode;
-+		vina-supply = <&reg_vcc5v>;
-+		vinb-supply = <&reg_vcc5v>;
-+		vinc-supply = <&reg_vcc5v>;
-+		vind-supply = <&reg_vcc5v>;
-+		vine-supply = <&reg_vcc5v>;
-+		aldoin-supply = <&reg_vcc5v>;
-+		bldoin-supply = <&reg_vcc5v>;
-+		cldoin-supply = <&reg_vcc5v>;
-+
-+		regulators {
-+			reg_aldo1: aldo1 {
-+				regulator-always-on;
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc-sys";
-+			};
-+
-+			reg_aldo2: aldo2 {	/* 3.3V on headers */
-+				regulator-always-on;
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc3v3-ext";
-+			};
-+
-+			reg_aldo3: aldo3 {	/* 3.3V on headers */
-+				regulator-always-on;
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc3v3-ext2";
-+			};
-+
-+			reg_bldo1: bldo1 {
-+				regulator-always-on;
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
-+				regulator-name = "vcc1v8";
-+			};
-+
-+			bldo2 {
-+				/* unused */
-+			};
-+
-+			bldo3 {
-+				/* unused */
-+			};
-+
-+			bldo4 {
-+				/* unused */
-+			};
-+
-+			cldo1 {
-+				/* reserved */
-+			};
-+
-+			cldo2 {
-+				/* unused */
-+			};
-+
-+			cldo3 {
-+				/* unused */
-+			};
-+
-+			reg_dcdca: dcdca {
-+				regulator-always-on;
-+				regulator-min-microvolt = <810000>;
-+				regulator-max-microvolt = <1100000>;
-+				regulator-name = "vdd-cpu";
-+			};
-+
-+			reg_dcdcc: dcdcc {
-+				regulator-always-on;
-+				regulator-min-microvolt = <810000>;
-+				regulator-max-microvolt = <990000>;
-+				regulator-name = "vdd-gpu-sys";
-+			};
-+
-+			reg_dcdcd: dcdcd {
-+				regulator-always-on;
-+				regulator-min-microvolt = <1500000>;
-+				regulator-max-microvolt = <1500000>;
-+				regulator-name = "vdd-dram";
-+			};
-+
-+			reg_dcdce: dcdce {
-+				regulator-always-on;
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc-eth-mmc";
-+			};
-+
-+			sw {
-+				/* unused */
-+			};
-+		};
-+	};
-+};
-+
-+&pio {
-+	vcc-pc-supply = <&reg_aldo1>;
-+	vcc-pf-supply = <&reg_aldo1>;
-+	vcc-pg-supply = <&reg_bldo1>;
-+	vcc-ph-supply = <&reg_aldo1>;
-+	vcc-pi-supply = <&reg_aldo1>;
-+};
-+
-+&spi0  {
-+	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
-+
-+	flash@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "jedec,spi-nor";
-+		reg = <0>;
-+		spi-max-frequency = <40000000>;
-+	};
-+};
-+
-+&uart0 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart0_ph_pins>;
-+	status = "okay";
-+};
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
-new file mode 100644
-index 000000000..ab344ea8a
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
-@@ -0,0 +1,590 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+// Copyright (C) 2020 Arm Ltd.
-+// based on the H6 dtsi, which is:
-+//   Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
-+
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/clock/sun50i-h616-ccu.h>
-+#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
-+#include <dt-bindings/clock/sun6i-rtc.h>
-+#include <dt-bindings/reset/sun50i-h616-ccu.h>
-+#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
-+
-+/ {
-+	interrupt-parent = <&gic>;
-+	#address-cells = <2>;
-+	#size-cells = <2>;
-+
-+	cpus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		cpu0: cpu@0 {
-+			compatible = "arm,cortex-a53";
-+			device_type = "cpu";
-+			reg = <0>;
-+			enable-method = "psci";
-+			clocks = <&ccu CLK_CPUX>;
-+		};
-+
-+		cpu1: cpu@1 {
-+			compatible = "arm,cortex-a53";
-+			device_type = "cpu";
-+			reg = <1>;
-+			enable-method = "psci";
-+			clocks = <&ccu CLK_CPUX>;
-+		};
-+
-+		cpu2: cpu@2 {
-+			compatible = "arm,cortex-a53";
-+			device_type = "cpu";
-+			reg = <2>;
-+			enable-method = "psci";
-+			clocks = <&ccu CLK_CPUX>;
-+		};
-+
-+		cpu3: cpu@3 {
-+			compatible = "arm,cortex-a53";
-+			device_type = "cpu";
-+			reg = <3>;
-+			enable-method = "psci";
-+			clocks = <&ccu CLK_CPUX>;
-+		};
-+	};
-+
-+	reserved-memory {
-+		#address-cells = <2>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		/*
-+		 * 256 KiB reserved for Trusted Firmware-A (BL31).
-+		 * This is added by BL31 itself, but some bootloaders fail
-+		 * to propagate this into the DTB handed to kernels.
-+		 */
-+		secmon@40000000 {
-+			reg = <0x0 0x40000000 0x0 0x40000>;
-+			no-map;
-+		};
-+	};
-+
-+	osc24M: osc24M-clk {
-+		#clock-cells = <0>;
-+		compatible = "fixed-clock";
-+		clock-frequency = <24000000>;
-+		clock-output-names = "osc24M";
-+	};
-+
-+	pmu {
-+		compatible = "arm,cortex-a53-pmu";
-+		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
-+			     <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
-+			     <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
-+			     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
-+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
-+	};
-+
-+	psci {
-+		compatible = "arm,psci-0.2";
-+		method = "smc";
-+	};
-+
-+	timer {
-+		compatible = "arm,armv8-timer";
-+		arm,no-tick-in-suspend;
-+		interrupts = <GIC_PPI 13
-+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
-+			     <GIC_PPI 14
-+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
-+			     <GIC_PPI 11
-+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
-+			     <GIC_PPI 10
-+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+	};
-+
-+	soc {
-+		compatible = "simple-bus";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		ranges = <0x0 0x0 0x0 0x40000000>;
-+
-+		syscon: syscon@3000000 {
-+			compatible = "allwinner,sun50i-h616-system-control";
-+			reg = <0x03000000 0x1000>;
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			ranges;
-+
-+			sram_c: sram@28000 {
-+				compatible = "mmio-sram";
-+				reg = <0x00028000 0x30000>;
-+				#address-cells = <1>;
-+				#size-cells = <1>;
-+				ranges = <0 0x00028000 0x30000>;
-+			};
-+		};
-+
-+		ccu: clock@3001000 {
-+			compatible = "allwinner,sun50i-h616-ccu";
-+			reg = <0x03001000 0x1000>;
-+			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>;
-+			clock-names = "hosc", "losc", "iosc";
-+			#clock-cells = <1>;
-+			#reset-cells = <1>;
-+		};
-+
-+		watchdog: watchdog@30090a0 {
-+			compatible = "allwinner,sun50i-h616-wdt",
-+				     "allwinner,sun6i-a31-wdt";
-+			reg = <0x030090a0 0x20>;
-+			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&osc24M>;
-+		};
-+
-+		pio: pinctrl@300b000 {
-+			compatible = "allwinner,sun50i-h616-pinctrl";
-+			reg = <0x0300b000 0x400>;
-+			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
-+			clock-names = "apb", "hosc", "losc";
-+			gpio-controller;
-+			#gpio-cells = <3>;
-+			interrupt-controller;
-+			#interrupt-cells = <3>;
-+
-+			ext_rgmii_pins: rgmii-pins {
-+				pins = "PI0", "PI1", "PI2", "PI3", "PI4",
-+				       "PI5", "PI7", "PI8", "PI9", "PI10",
-+				       "PI11", "PI12", "PI13", "PI14", "PI15",
-+				       "PI16";
-+				function = "emac0";
-+				drive-strength = <40>;
-+			};
-+
-+			i2c0_pins: i2c0-pins {
-+				pins = "PI6", "PI7";
-+				function = "i2c0";
-+			};
-+
-+			i2c3_ph_pins: i2c3-ph-pins {
-+				pins = "PH4", "PH5";
-+				function = "i2c3";
-+			};
-+
-+			ir_rx_pin: ir-rx-pin {
-+				pins = "PH10";
-+				function = "ir_rx";
-+			};
-+
-+			mmc0_pins: mmc0-pins {
-+				pins = "PF0", "PF1", "PF2", "PF3",
-+				       "PF4", "PF5";
-+				function = "mmc0";
-+				drive-strength = <30>;
-+				bias-pull-up;
-+			};
-+
-+			/omit-if-no-ref/
-+			mmc1_pins: mmc1-pins {
-+				pins = "PG0", "PG1", "PG2", "PG3",
-+				       "PG4", "PG5";
-+				function = "mmc1";
-+				drive-strength = <30>;
-+				bias-pull-up;
-+			};
-+
-+			mmc2_pins: mmc2-pins {
-+				pins = "PC0", "PC1", "PC5", "PC6",
-+				       "PC8", "PC9", "PC10", "PC11",
-+				       "PC13", "PC14", "PC15", "PC16";
-+				function = "mmc2";
-+				drive-strength = <30>;
-+				bias-pull-up;
-+			};
-+
-+			/omit-if-no-ref/
-+			spi0_pins: spi0-pins {
-+				pins = "PC0", "PC2", "PC4";
-+				function = "spi0";
-+			};
-+
-+			/omit-if-no-ref/
-+			spi0_cs0_pin: spi0-cs0-pin {
-+				pins = "PC3";
-+				function = "spi0";
-+			};
-+
-+			/omit-if-no-ref/
-+			spi1_pins: spi1-pins {
-+				pins = "PH6", "PH7", "PH8";
-+				function = "spi1";
-+			};
-+
-+			/omit-if-no-ref/
-+			spi1_cs0_pin: spi1-cs0-pin {
-+				pins = "PH5";
-+				function = "spi1";
-+			};
-+
-+			uart0_ph_pins: uart0-ph-pins {
-+				pins = "PH0", "PH1";
-+				function = "uart0";
-+			};
-+
-+			/omit-if-no-ref/
-+			uart1_pins: uart1-pins {
-+				pins = "PG6", "PG7";
-+				function = "uart1";
-+			};
-+
-+			/omit-if-no-ref/
-+			uart1_rts_cts_pins: uart1-rts-cts-pins {
-+				pins = "PG8", "PG9";
-+				function = "uart1";
-+			};
-+		};
-+
-+		gic: interrupt-controller@3021000 {
-+			compatible = "arm,gic-400";
-+			reg = <0x03021000 0x1000>,
-+			      <0x03022000 0x2000>,
-+			      <0x03024000 0x2000>,
-+			      <0x03026000 0x2000>;
-+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+			interrupt-controller;
-+			#interrupt-cells = <3>;
-+		};
-+
-+		mmc0: mmc@4020000 {
-+			compatible = "allwinner,sun50i-h616-mmc",
-+				     "allwinner,sun50i-a100-mmc";
-+			reg = <0x04020000 0x1000>;
-+			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
-+			clock-names = "ahb", "mmc";
-+			resets = <&ccu RST_BUS_MMC0>;
-+			reset-names = "ahb";
-+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-+			pinctrl-names = "default";
-+			pinctrl-0 = <&mmc0_pins>;
-+			status = "disabled";
-+			max-frequency = <150000000>;
-+			cap-sd-highspeed;
-+			cap-mmc-highspeed;
-+			mmc-ddr-3_3v;
-+			cap-sdio-irq;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		mmc1: mmc@4021000 {
-+			compatible = "allwinner,sun50i-h616-mmc",
-+				     "allwinner,sun50i-a100-mmc";
-+			reg = <0x04021000 0x1000>;
-+			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
-+			clock-names = "ahb", "mmc";
-+			resets = <&ccu RST_BUS_MMC1>;
-+			reset-names = "ahb";
-+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-+			pinctrl-names = "default";
-+			pinctrl-0 = <&mmc1_pins>;
-+			status = "disabled";
-+			max-frequency = <150000000>;
-+			cap-sd-highspeed;
-+			cap-mmc-highspeed;
-+			mmc-ddr-3_3v;
-+			cap-sdio-irq;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		mmc2: mmc@4022000 {
-+			compatible = "allwinner,sun50i-h616-emmc",
-+				     "allwinner,sun50i-a100-emmc";
-+			reg = <0x04022000 0x1000>;
-+			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
-+			clock-names = "ahb", "mmc";
-+			resets = <&ccu RST_BUS_MMC2>;
-+			reset-names = "ahb";
-+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-+			pinctrl-names = "default";
-+			pinctrl-0 = <&mmc2_pins>;
-+			status = "disabled";
-+			max-frequency = <150000000>;
-+			cap-sd-highspeed;
-+			cap-mmc-highspeed;
-+			mmc-ddr-3_3v;
-+			cap-sdio-irq;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		uart0: serial@5000000 {
-+			compatible = "snps,dw-apb-uart";
-+			reg = <0x05000000 0x400>;
-+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
-+			reg-shift = <2>;
-+			reg-io-width = <4>;
-+			clocks = <&ccu CLK_BUS_UART0>;
-+			resets = <&ccu RST_BUS_UART0>;
-+			status = "disabled";
-+		};
-+
-+		uart1: serial@5000400 {
-+			compatible = "snps,dw-apb-uart";
-+			reg = <0x05000400 0x400>;
-+			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-+			reg-shift = <2>;
-+			reg-io-width = <4>;
-+			clocks = <&ccu CLK_BUS_UART1>;
-+			resets = <&ccu RST_BUS_UART1>;
-+			status = "disabled";
-+		};
-+
-+		uart2: serial@5000800 {
-+			compatible = "snps,dw-apb-uart";
-+			reg = <0x05000800 0x400>;
-+			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-+			reg-shift = <2>;
-+			reg-io-width = <4>;
-+			clocks = <&ccu CLK_BUS_UART2>;
-+			resets = <&ccu RST_BUS_UART2>;
-+			status = "disabled";
-+		};
-+
-+		uart3: serial@5000c00 {
-+			compatible = "snps,dw-apb-uart";
-+			reg = <0x05000c00 0x400>;
-+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-+			reg-shift = <2>;
-+			reg-io-width = <4>;
-+			clocks = <&ccu CLK_BUS_UART3>;
-+			resets = <&ccu RST_BUS_UART3>;
-+			status = "disabled";
-+		};
-+
-+		uart4: serial@5001000 {
-+			compatible = "snps,dw-apb-uart";
-+			reg = <0x05001000 0x400>;
-+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-+			reg-shift = <2>;
-+			reg-io-width = <4>;
-+			clocks = <&ccu CLK_BUS_UART4>;
-+			resets = <&ccu RST_BUS_UART4>;
-+			status = "disabled";
-+		};
-+
-+		uart5: serial@5001400 {
-+			compatible = "snps,dw-apb-uart";
-+			reg = <0x05001400 0x400>;
-+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-+			reg-shift = <2>;
-+			reg-io-width = <4>;
-+			clocks = <&ccu CLK_BUS_UART5>;
-+			resets = <&ccu RST_BUS_UART5>;
-+			status = "disabled";
-+		};
-+
-+		i2c0: i2c@5002000 {
-+			compatible = "allwinner,sun50i-h616-i2c",
-+				     "allwinner,sun8i-v536-i2c",
-+				     "allwinner,sun6i-a31-i2c";
-+			reg = <0x05002000 0x400>;
-+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_I2C0>;
-+			resets = <&ccu RST_BUS_I2C0>;
-+			pinctrl-names = "default";
-+			pinctrl-0 = <&i2c0_pins>;
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		i2c1: i2c@5002400 {
-+			compatible = "allwinner,sun50i-h616-i2c",
-+				     "allwinner,sun8i-v536-i2c",
-+				     "allwinner,sun6i-a31-i2c";
-+			reg = <0x05002400 0x400>;
-+			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_I2C1>;
-+			resets = <&ccu RST_BUS_I2C1>;
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		i2c2: i2c@5002800 {
-+			compatible = "allwinner,sun50i-h616-i2c",
-+				     "allwinner,sun8i-v536-i2c",
-+				     "allwinner,sun6i-a31-i2c";
-+			reg = <0x05002800 0x400>;
-+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_I2C2>;
-+			resets = <&ccu RST_BUS_I2C2>;
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		i2c3: i2c@5002c00 {
-+			compatible = "allwinner,sun50i-h616-i2c",
-+				     "allwinner,sun8i-v536-i2c",
-+				     "allwinner,sun6i-a31-i2c";
-+			reg = <0x05002c00 0x400>;
-+			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_I2C3>;
-+			resets = <&ccu RST_BUS_I2C3>;
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		i2c4: i2c@5003000 {
-+			compatible = "allwinner,sun50i-h616-i2c",
-+				     "allwinner,sun8i-v536-i2c",
-+				     "allwinner,sun6i-a31-i2c";
-+			reg = <0x05003000 0x400>;
-+			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_I2C4>;
-+			resets = <&ccu RST_BUS_I2C4>;
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		spi0: spi@5010000 {
-+			compatible = "allwinner,sun50i-h616-spi",
-+				     "allwinner,sun8i-h3-spi";
-+			reg = <0x05010000 0x1000>;
-+			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
-+			clock-names = "ahb", "mod";
-+			resets = <&ccu RST_BUS_SPI0>;
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		spi1: spi@5011000 {
-+			compatible = "allwinner,sun50i-h616-spi",
-+				     "allwinner,sun8i-h3-spi";
-+			reg = <0x05011000 0x1000>;
-+			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
-+			clock-names = "ahb", "mod";
-+			resets = <&ccu RST_BUS_SPI1>;
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		emac0: ethernet@5020000 {
-+			compatible = "allwinner,sun50i-h616-emac0",
-+				     "allwinner,sun50i-a64-emac";
-+			reg = <0x05020000 0x10000>;
-+			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "macirq";
-+			clocks = <&ccu CLK_BUS_EMAC0>;
-+			clock-names = "stmmaceth";
-+			resets = <&ccu RST_BUS_EMAC0>;
-+			reset-names = "stmmaceth";
-+			syscon = <&syscon>;
-+			status = "disabled";
-+
-+			mdio0: mdio {
-+				compatible = "snps,dwmac-mdio";
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+			};
-+		};
-+
-+		rtc: rtc@7000000 {
-+			compatible = "allwinner,sun50i-h616-rtc",
-+				     "allwinner,sun50i-h6-rtc";
-+			reg = <0x07000000 0x400>;
-+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
-+				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
-+			clock-output-names = "osc32k", "osc32k-out", "iosc";
-+			#clock-cells = <1>;
-+		};
-+
-+		r_ccu: clock@7010000 {
-+			compatible = "allwinner,sun50i-h616-r-ccu";
-+			reg = <0x07010000 0x210>;
-+			clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
-+				 <&ccu CLK_PLL_PERIPH0>;
-+			clock-names = "hosc", "losc", "iosc", "pll-periph";
-+			#clock-cells = <1>;
-+			#reset-cells = <1>;
-+		};
-+
-+		r_pio: pinctrl@7022000 {
-+			compatible = "allwinner,sun50i-h616-r-pinctrl";
-+			reg = <0x07022000 0x400>;
-+			clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
-+				 <&rtc CLK_OSC32K>;
-+			clock-names = "apb", "hosc", "losc";
-+			gpio-controller;
-+			#gpio-cells = <3>;
-+
-+			/omit-if-no-ref/
-+			r_i2c_pins: r-i2c-pins {
-+				pins = "PL0", "PL1";
-+				function = "s_i2c";
-+			};
-+
-+			r_rsb_pins: r-rsb-pins {
-+				pins = "PL0", "PL1";
-+				function = "s_rsb";
-+			};
-+		};
-+
-+		ir: ir@7040000 {
-+			compatible = "allwinner,sun50i-h616-ir",
-+				     "allwinner,sun6i-a31-ir";
-+			reg = <0x07040000 0x400>;
-+			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&r_ccu CLK_R_APB1_IR>,
-+				 <&r_ccu CLK_IR>;
-+			clock-names = "apb", "ir";
-+			resets = <&r_ccu RST_R_APB1_IR>;
-+			pinctrl-names = "default";
-+			pinctrl-0 = <&ir_rx_pin>;
-+			status = "disabled";
-+		};
-+
-+		r_i2c: i2c@7081400 {
-+			compatible = "allwinner,sun50i-h616-i2c",
-+				     "allwinner,sun8i-v536-i2c",
-+				     "allwinner,sun6i-a31-i2c";
-+			reg = <0x07081400 0x400>;
-+			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&r_ccu CLK_R_APB2_I2C>;
-+			resets = <&r_ccu RST_R_APB2_I2C>;
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+
-+		r_rsb: rsb@7083000 {
-+			compatible = "allwinner,sun50i-h616-rsb",
-+				     "allwinner,sun8i-a23-rsb";
-+			reg = <0x07083000 0x400>;
-+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&r_ccu CLK_R_APB2_RSB>;
-+			clock-frequency = <3000000>;
-+			resets = <&r_ccu RST_R_APB2_RSB>;
-+			pinctrl-names = "default";
-+			pinctrl-0 = <&r_rsb_pins>;
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+		};
-+	};
-+};
-diff --git a/include/dt-bindings/clock/sun6i-rtc.h b/include/dt-bindings/clock/sun6i-rtc.h
-new file mode 100644
-index 000000000..c845493e4
---- /dev/null
-+++ b/include/dt-bindings/clock/sun6i-rtc.h
-@@ -0,0 +1,10 @@
-+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-+
-+#ifndef _DT_BINDINGS_CLK_SUN6I_RTC_H_
-+#define _DT_BINDINGS_CLK_SUN6I_RTC_H_
-+
-+#define CLK_OSC32K		0
-+#define CLK_OSC32K_FANOUT	1
-+#define CLK_IOSC		2
-+
-+#endif /* _DT_BINDINGS_CLK_SUN6I_RTC_H_ */
--- 
-2.34.1
-

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0004-dts-add-sunxi-info-device-tree-node.patch

@@ -1,27 +0,0 @@
-From 9a7776b44588c24d04ffff63194d8a137624f8ac Mon Sep 17 00:00:00 2001
-From: Patryk Biel <patryk.biel.external@trumpf.com>
-Date: Thu, 26 Jan 2023 09:50:42 +0100
-Subject: [PATCH] Add sunxi-info device tree node
-
----
- arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
-index ab344ea8a..d0b95d43a 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
-@@ -586,5 +586,10 @@ r_rsb: rsb@7083000 {
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 		};
-+
-+		sunxi-info {
-+			compatible = "allwinner,sun50i-h616-sys-info";
-+			status = "okay";
-+		};
- 	};
- };
--- 
-2.34.1
-

recipes-kernel/linux/linux-mainline-5.15.35/orange-pi-zero2/0009-drv-uwe5622-bluetooth-fix-firmware-init-fail.patch

@@ -1,28 +0,0 @@
-From 70a0c21f9bc1eed754cce584fe382883dc412db0 Mon Sep 17 00:00:00 2001
-From: afaulkner420 <afaulkner420@gmail.com>
-Date: Fri, 25 Mar 2022 20:31:26 +0000
-Subject: [PATCH 08/11] uwe5622: bluetooth: Fix firmware init fail
-
----
- net/bluetooth/hci_core.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
-index c67390367..b2ee9b6a8 100644
---- a/net/bluetooth/hci_core.c
-+++ b/net/bluetooth/hci_core.c
-@@ -932,7 +932,11 @@ static int __hci_init(struct hci_dev *hdev)
- 
- 	err = __hci_req_sync(hdev, hci_init3_req, 0, HCI_INIT_TIMEOUT, NULL);
- 	if (err < 0)
-+#if defined(CONFIG_RK_WIFI_DEVICE_UWE5621) || defined(CONFIG_AW_WIFI_DEVICE_UWE5622)
-+		;
-+#else
- 		return err;
-+#endif
- 
- 	err = __hci_req_sync(hdev, hci_init4_req, 0, HCI_INIT_TIMEOUT, NULL);
- 	if (err < 0)
--- 
-2.25.1
-

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0001-Input-axp20x-pek-allow-wakeup-after-shutdown.patch

@@ -0,0 +1,52 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sat, 2 Jan 2021 15:52:27 -0600
+Subject: [PATCH] Input: axp20x-pek - allow wakeup after shutdown
+
+While the AXP20x PMIC handles the power button itself after shutting
+down, it is not always possible to use the PMIC's built-in shutdown
+feature, such as when other wakeup sources are needed (for example, an
+IR remote or wake-on-LAN) that require firmware support. In that case,
+the PMIC remains on, but suspended, until the board is powered back on.
+
+During this "fake" off state, IRQ configuration is similar to system
+sleep, where enable_irq_wake() must be call on an IRQ for it to be
+wakeup capable. Run the suspend callback to arm the power button IRQs
+during the shutdown process, so the power button works in this state.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ drivers/input/misc/axp20x-pek.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/input/misc/axp20x-pek.c
++++ b/drivers/input/misc/axp20x-pek.c
+@@ -354,7 +354,7 @@ static int axp20x_pek_probe(struct platf
+ 	return 0;
+ }
+ 
+-static int __maybe_unused axp20x_pek_suspend(struct device *dev)
++static int axp20x_pek_suspend(struct device *dev)
+ {
+ 	struct axp20x_pek *axp20x_pek = dev_get_drvdata(dev);
+ 
+@@ -413,6 +413,11 @@ static const struct dev_pm_ops axp20x_pe
+ #endif
+ };
+ 
++static void axp20x_pek_shutdown(struct platform_device *pdev)
++{
++	axp20x_pek_suspend(&pdev->dev);
++}
++
+ static const struct platform_device_id axp_pek_id_match[] = {
+ 	{
+ 		.name = "axp20x-pek",
+@@ -428,6 +433,7 @@ MODULE_DEVICE_TABLE(platform, axp_pek_id
+ 
+ static struct platform_driver axp20x_pek_driver = {
+ 	.probe		= axp20x_pek_probe,
++	.shutdown	= axp20x_pek_shutdown,
+ 	.id_table	= axp_pek_id_match,
+ 	.driver		= {
+ 		.name		= "axp20x-pek",

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0002-clk-Implement-protected-clocks-for-all-OF-clock-prov.patch

@@ -0,0 +1,197 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sun, 29 Dec 2019 20:23:28 -0600
+Subject: [PATCH] clk: Implement protected-clocks for all OF clock providers
+
+This is a generic implementation of the "protected-clocks" property from
+the common clock binding. It allows firmware to inform the OS about
+clocks that must not be disabled while the OS is running.
+
+This implementation comes with some caveats:
+
+1) Clocks that have CLK_IS_CRITICAL in their init data are prepared/
+enabled before they are attached to the clock tree. protected-clocks are
+only protected once the clock provider is added, which is generally
+after all of the clocks it provides have been registered. This leaves a
+window of opportunity where something could disable or modify the clock,
+such as a driver running on another CPU, or the clock core itself. There
+is a comment to this effect in __clk_core_init():
+
+  /*
+   * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
+   * don't get accidentally disabled when walking the orphan tree and
+   * reparenting clocks
+   */
+
+Similarly, these clocks will be enabled after they are first reparented,
+unlike other CLK_IS_CRITICAL clocks. See the comment in
+clk_core_reparent_orphans_nolock():
+
+  /*
+   * We need to use __clk_set_parent_before() and _after() to
+   * to properly migrate any prepare/enable count of the orphan
+   * clock. This is important for CLK_IS_CRITICAL clocks, which
+   * are enabled during init but might not have a parent yet.
+   */
+
+Ideally we could detect protected clocks before they are reparented, but
+there are two problems with that:
+
+  a) From the clock core's perspective, hw->init is const.
+
+  b) The clock core doesn't see the device_node until __clk_register is
+     called on the first clock.
+
+So the only "race-free" way to detect protected-clocks is to do it in
+the middle of __clk_register, between when core->flags is initialized
+and calling __clk_core_init(). That requires scanning the device tree
+again for each clock, which is part of why I didn't do it that way.
+
+2) __clk_protect needs to be idempotent, for two reasons:
+
+  a) Clocks with CLK_IS_CRITICAL in their init data are already
+     prepared/enabled, and we don't want to prepare/enable them again.
+
+  b) of_clk_set_defaults() is called twice for (at least some) clock
+     controllers registered with CLK_OF_DECLARE. It is called first in
+     of_clk_add_provider()/of_clk_add_hw_provider() inside clk_init_cb,
+     and again afterward in of_clk_init(). The second call in
+     of_clk_init() may be unnecessary, but verifying that would require
+     auditing all users of CLK_OF_DECLARE to ensure they called one of
+     the of_clk_add{,_hw}_provider functions.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ drivers/clk/clk-conf.c | 54 ++++++++++++++++++++++++++++++++++++++++++
+ drivers/clk/clk.c      | 31 ++++++++++++++++++++++++
+ drivers/clk/clk.h      |  2 ++
+ 3 files changed, 87 insertions(+)
+
+--- a/drivers/clk/clk-conf.c
++++ b/drivers/clk/clk-conf.c
+@@ -11,6 +11,54 @@
+ #include <linux/of.h>
+ #include <linux/printk.h>
+ 
++#include "clk.h"
++
++static int __set_clk_flags(struct device_node *node)
++{
++	struct of_phandle_args clkspec;
++	struct property *prop;
++	int i, index = 0, rc;
++	const __be32 *cur;
++	struct clk *clk;
++	u32 nr_cells;
++
++	rc = of_property_read_u32(node, "#clock-cells", &nr_cells);
++	if (rc < 0) {
++		pr_err("clk: missing #clock-cells property on %pOF\n", node);
++		return rc;
++	}
++
++	clkspec.np         = node;
++	clkspec.args_count = nr_cells;
++
++	of_property_for_each_u32(node, "protected-clocks", prop, cur, clkspec.args[0]) {
++		/* read the remainder of the clock specifier */
++		for (i = 1; i < nr_cells; ++i) {
++			cur = of_prop_next_u32(prop, cur, &clkspec.args[i]);
++			if (!cur) {
++				pr_err("clk: invalid value of protected-clocks"
++				       " property at %pOF\n", node);
++				return -EINVAL;
++			}
++		}
++		clk = of_clk_get_from_provider(&clkspec);
++		if (IS_ERR(clk)) {
++			if (PTR_ERR(clk) != -EPROBE_DEFER)
++				pr_err("clk: couldn't get protected clock"
++				       " %u for %pOF\n", index, node);
++			return PTR_ERR(clk);
++		}
++
++		rc = __clk_protect(clk);
++		if (rc < 0)
++			pr_warn("clk: failed to protect %s: %d\n",
++				__clk_get_name(clk), rc);
++		clk_put(clk);
++		index++;
++	}
++	return 0;
++}
++
+ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
+ {
+ 	struct of_phandle_args clkspec;
+@@ -135,6 +183,12 @@ int of_clk_set_defaults(struct device_no
+ 	if (!node)
+ 		return 0;
+ 
++	if (clk_supplier) {
++		rc = __set_clk_flags(node);
++		if (rc < 0)
++			return rc;
++	}
++
+ 	rc = __set_clk_parents(node, clk_supplier);
+ 	if (rc < 0)
+ 		return rc;
+--- a/drivers/clk/clk.c
++++ b/drivers/clk/clk.c
+@@ -4271,6 +4271,37 @@ struct clk *devm_clk_hw_get_clk(struct d
+ EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk);
+ 
+ /*
++ * clk-conf helpers
++ */
++
++int __clk_protect(struct clk *clk)
++{
++	struct clk_core *core = clk->core;
++	int ret = 0;
++
++	clk_prepare_lock();
++
++	/*
++	 * If CLK_IS_CRITICAL was set in the clock's init data, then
++	 * the clock was already prepared/enabled when it was added.
++	 */
++	if (core->flags & CLK_IS_CRITICAL)
++		goto out;
++
++	core->flags |= CLK_IS_CRITICAL;
++	ret = clk_core_prepare(core);
++	if (ret)
++		goto out;
++
++	ret = clk_core_enable_lock(core);
++
++out:
++	clk_prepare_unlock();
++
++	return ret;
++}
++
++/*
+  * clkdev helpers
+  */
+ 
+--- a/drivers/clk/clk.h
++++ b/drivers/clk/clk.h
+@@ -24,6 +24,7 @@ struct clk_hw *clk_find_hw(const char *d
+ #ifdef CONFIG_COMMON_CLK
+ struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,
+ 			      const char *dev_id, const char *con_id);
++int __clk_protect(struct clk *clk);
+ void __clk_put(struct clk *clk);
+ #else
+ /* All these casts to avoid ifdefs in clkdev... */
+@@ -33,6 +34,7 @@ clk_hw_create_clk(struct device *dev, st
+ {
+ 	return (struct clk *)hw;
+ }
++static inline int __clk_protect(struct clk *clk) { return 0; }
+ static inline void __clk_put(struct clk *clk) { }
+ 
+ #endif

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0003-Revert-clk-qcom-Support-protected-clocks-property.patch

@@ -0,0 +1,49 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Mon, 30 Dec 2019 12:39:31 -0600
+Subject: [PATCH] Revert "clk: qcom: Support 'protected-clocks' property"
+
+Now that protected-clocks is handled in the clk core, this
+driver-specific implementation is redundant.
+
+This reverts commit b181b3b801da8893c8eb706e448dd5111b02de60.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ drivers/clk/qcom/common.c | 18 ------------------
+ 1 file changed, 18 deletions(-)
+
+--- a/drivers/clk/qcom/common.c
++++ b/drivers/clk/qcom/common.c
+@@ -194,22 +194,6 @@ int qcom_cc_register_sleep_clk(struct de
+ }
+ EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk);
+ 
+-/* Drop 'protected-clocks' from the list of clocks to register */
+-static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc)
+-{
+-	struct device_node *np = dev->of_node;
+-	struct property *prop;
+-	const __be32 *p;
+-	u32 i;
+-
+-	of_property_for_each_u32(np, "protected-clocks", prop, p, i) {
+-		if (i >= cc->num_rclks)
+-			continue;
+-
+-		cc->rclks[i] = NULL;
+-	}
+-}
+-
+ static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec,
+ 					 void *data)
+ {
+@@ -272,8 +256,6 @@ int qcom_cc_really_probe(struct platform
+ 	cc->rclks = rclks;
+ 	cc->num_rclks = num_clks;
+ 
+-	qcom_cc_drop_protected(dev, cc);
+-
+ 	for (i = 0; i < num_clk_hws; i++) {
+ 		ret = devm_clk_hw_register(dev, clk_hws[i]);
+ 		if (ret)

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0007-rtc-sun6i-Allow-RTC-wakeup-after-shutdown.patch

@@ -0,0 +1,62 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sat, 2 Jan 2021 15:52:27 -0600
+Subject: [PATCH] rtc: sun6i: Allow RTC wakeup after shutdown
+
+Only IRQs that have enable_irq_wake() called on them can wake the system
+from sleep or after it has been shut down. Currently, the RTC alarm can
+only wake the system from sleep. Run the suspend callback to arm the IRQ
+during the shutdown process, so the RTC alarm also works after shutdown.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ drivers/rtc/rtc-sun6i.c | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+--- a/drivers/rtc/rtc-sun6i.c
++++ b/drivers/rtc/rtc-sun6i.c
+@@ -641,7 +641,6 @@ static const struct rtc_class_ops sun6i_
+ 	.alarm_irq_enable	= sun6i_rtc_alarm_irq_enable
+ };
+ 
+-#ifdef CONFIG_PM_SLEEP
+ /* Enable IRQ wake on suspend, to wake up from RTC. */
+ static int sun6i_rtc_suspend(struct device *dev)
+ {
+@@ -654,7 +653,7 @@ static int sun6i_rtc_suspend(struct devi
+ }
+ 
+ /* Disable IRQ wake on resume. */
+-static int sun6i_rtc_resume(struct device *dev)
++static int __maybe_unused sun6i_rtc_resume(struct device *dev)
+ {
+ 	struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
+ 
+@@ -663,7 +662,6 @@ static int sun6i_rtc_resume(struct devic
+ 
+ 	return 0;
+ }
+-#endif
+ 
+ static SIMPLE_DEV_PM_OPS(sun6i_rtc_pm_ops,
+ 	sun6i_rtc_suspend, sun6i_rtc_resume);
+@@ -735,6 +733,11 @@ static int sun6i_rtc_probe(struct platfo
+ 	return 0;
+ }
+ 
++static void sun6i_rtc_shutdown(struct platform_device *pdev)
++{
++	sun6i_rtc_suspend(&pdev->dev);
++}
++
+ /*
+  * As far as RTC functionality goes, all models are the same. The
+  * datasheets claim that different models have different number of
+@@ -755,6 +758,7 @@ MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids
+ 
+ static struct platform_driver sun6i_rtc_driver = {
+ 	.probe		= sun6i_rtc_probe,
++	.shutdown	= sun6i_rtc_shutdown,
+ 	.driver		= {
+ 		.name		= "sun6i-rtc",
+ 		.of_match_table = sun6i_rtc_dt_ids,

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0009-firmware-arm_scpi-Support-unidirectional-mailbox-cha.patch

@@ -0,0 +1,122 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Tue, 5 Mar 2019 22:02:41 -0600
+Subject: [PATCH] firmware: arm_scpi: Support unidirectional mailbox channels
+
+Some mailbox controllers have only unidirectional channels, so we need a
+pair of them for each SCPI channel. If a mbox-names property is present,
+look for "rx" and "tx" mbox channels; otherwise, the existing behavior
+is preserved, and a single mbox channel is used for each SCPI channel.
+
+Note that since the mailbox framework only supports a single phandle
+with each name (mbox_request_channel_byname always returns the first
+one), this new mode only supports a single SCPI channel.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ drivers/firmware/arm_scpi.c | 58 +++++++++++++++++++++++++++++--------
+ 1 file changed, 46 insertions(+), 12 deletions(-)
+
+--- a/drivers/firmware/arm_scpi.c
++++ b/drivers/firmware/arm_scpi.c
+@@ -231,7 +231,8 @@ struct scpi_xfer {
+ 
+ struct scpi_chan {
+ 	struct mbox_client cl;
+-	struct mbox_chan *chan;
++	struct mbox_chan *rx_chan;
++	struct mbox_chan *tx_chan;
+ 	void __iomem *tx_payload;
+ 	void __iomem *rx_payload;
+ 	struct list_head rx_pending;
+@@ -505,7 +506,7 @@ static int scpi_send_message(u8 idx, voi
+ 	msg->rx_len = rx_len;
+ 	reinit_completion(&msg->done);
+ 
+-	ret = mbox_send_message(scpi_chan->chan, msg);
++	ret = mbox_send_message(scpi_chan->tx_chan, msg);
+ 	if (ret < 0 || !rx_buf)
+ 		goto out;
+ 
+@@ -856,8 +857,13 @@ static void scpi_free_channels(void *dat
+ 	struct scpi_drvinfo *info = data;
+ 	int i;
+ 
+-	for (i = 0; i < info->num_chans; i++)
+-		mbox_free_channel(info->channels[i].chan);
++	for (i = 0; i < info->num_chans; i++) {
++		struct scpi_chan *pchan = &info->channels[i];
++
++		if (pchan->tx_chan != pchan->rx_chan)
++			mbox_free_channel(pchan->tx_chan);
++		mbox_free_channel(pchan->rx_chan);
++	}
+ }
+ 
+ static int scpi_remove(struct platform_device *pdev)
+@@ -913,6 +919,7 @@ static int scpi_probe(struct platform_de
+ 	struct device *dev = &pdev->dev;
+ 	struct device_node *np = dev->of_node;
+ 	struct scpi_drvinfo *scpi_drvinfo;
++	bool use_mbox_names = false;
+ 
+ 	scpi_drvinfo = devm_kzalloc(dev, sizeof(*scpi_drvinfo), GFP_KERNEL);
+ 	if (!scpi_drvinfo)
+@@ -926,6 +933,14 @@ static int scpi_probe(struct platform_de
+ 		dev_err(dev, "no mboxes property in '%pOF'\n", np);
+ 		return -ENODEV;
+ 	}
++	if (of_get_property(dev->of_node, "mbox-names", NULL)) {
++		use_mbox_names = true;
++		if (count != 2) {
++			dev_err(dev, "need exactly 2 mboxes with mbox-names\n");
++			return -ENODEV;
++		}
++		count /= 2;
++	}
+ 
+ 	scpi_info->channels = devm_kcalloc(dev, count, sizeof(struct scpi_chan),
+ 					   GFP_KERNEL);
+@@ -974,15 +989,34 @@ static int scpi_probe(struct platform_de
+ 		mutex_init(&pchan->xfers_lock);
+ 
+ 		ret = scpi_alloc_xfer_list(dev, pchan);
+-		if (!ret) {
+-			pchan->chan = mbox_request_channel(cl, idx);
+-			if (!IS_ERR(pchan->chan))
+-				continue;
+-			ret = PTR_ERR(pchan->chan);
+-			if (ret != -EPROBE_DEFER)
+-				dev_err(dev, "failed to get channel%d err %d\n",
+-					idx, ret);
++		if (ret)
++			return ret;
++
++		if (use_mbox_names) {
++			pchan->rx_chan = mbox_request_channel_byname(cl, "rx");
++			if (IS_ERR(pchan->rx_chan)) {
++				ret = PTR_ERR(pchan->rx_chan);
++				goto fail;
++			}
++			pchan->tx_chan = mbox_request_channel_byname(cl, "tx");
++			if (IS_ERR(pchan->rx_chan)) {
++				ret = PTR_ERR(pchan->tx_chan);
++				goto fail;
++			}
++		} else {
++			pchan->rx_chan = mbox_request_channel(cl, idx);
++			if (IS_ERR(pchan->rx_chan)) {
++				ret = PTR_ERR(pchan->rx_chan);
++				goto fail;
++			}
++			pchan->tx_chan = pchan->rx_chan;
+ 		}
++		continue;
++
++fail:
++		if (ret != -EPROBE_DEFER)
++			dev_err(dev, "failed to get channel%d err %d\n",
++				idx, ret);
+ 		return ret;
+ 	}
+ 

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0012-arm64-dts-allwinner-h6-Add-SCPI-protocol.patch

@@ -0,0 +1,46 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sat, 14 Dec 2019 20:54:40 -0600
+Subject: [PATCH] arm64: dts: allwinner: h6: Add SCPI protocol
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -88,6 +88,13 @@
+ 		method = "smc";
+ 	};
+ 
++	scpi_protocol: scpi {
++		compatible = "arm,scpi";
++		mboxes = <&msgbox 2>, <&msgbox 3>;
++		mbox-names = "tx", "rx";
++		shmem = <&scpi_sram>;
++	};
++
+ 	timer {
+ 		compatible = "arm,armv8-timer";
+ 		arm,no-tick-in-suspend;
+@@ -196,6 +203,19 @@
+ 			#size-cells = <1>;
+ 			ranges;
+ 
++			sram_a2: sram@100000 {
++				compatible = "mmio-sram";
++				reg = <0x00100000 0x18000>;
++				#address-cells = <1>;
++				#size-cells = <1>;
++				ranges = <0 0x00100000 0x18000>;
++
++				scpi_sram: scpi-sram@17c00 {
++					compatible = "arm,scp-shmem";
++					reg = <0x17c00 0x200>;
++				};
++			};
++
+ 			sram_c: sram@28000 {
+ 				compatible = "mmio-sram";
+ 				reg = <0x00028000 0x1e000>;

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0013-ASoC-hdmi-codec-fix-channel-allocation.patch

@@ -0,0 +1,142 @@
+From 91b69779e0875e58d8973b2938a1cc4b7a1c455b Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Sun, 25 Mar 2018 22:17:06 +0200
+Subject: [PATCH 22/44] ASoC: hdmi-codec: fix channel allocation
+
+---
+ sound/soc/codecs/hdmi-codec.c | 113 ++++++++++++++++------------------
+ 1 file changed, 52 insertions(+), 61 deletions(-)
+
+--- a/sound/soc/codecs/hdmi-codec.c
++++ b/sound/soc/codecs/hdmi-codec.c
+@@ -194,78 +194,69 @@ static const struct snd_pcm_chmap_elem h
+  */
+ static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
+ 	{ .ca_id = 0x00, .n_ch = 2,
+-	  .mask = FL | FR},
+-	/* 2.1 */
+-	{ .ca_id = 0x01, .n_ch = 4,
+-	  .mask = FL | FR | LFE},
+-	/* Dolby Surround */
++	  .mask = FL | FR },
++	{ .ca_id = 0x03, .n_ch = 4,
++	  .mask = FL | FR | LFE | FC },
+ 	{ .ca_id = 0x02, .n_ch = 4,
+ 	  .mask = FL | FR | FC },
+-	/* surround51 */
++	{ .ca_id = 0x01, .n_ch = 4,
++	  .mask = FL | FR | LFE },
+ 	{ .ca_id = 0x0b, .n_ch = 6,
+-	  .mask = FL | FR | LFE | FC | RL | RR},
+-	/* surround40 */
+-	{ .ca_id = 0x08, .n_ch = 6,
+-	  .mask = FL | FR | RL | RR },
+-	/* surround41 */
+-	{ .ca_id = 0x09, .n_ch = 6,
+-	  .mask = FL | FR | LFE | RL | RR },
+-	/* surround50 */
++	  .mask = FL | FR | LFE | FC | RL | RR },
+ 	{ .ca_id = 0x0a, .n_ch = 6,
+ 	  .mask = FL | FR | FC | RL | RR },
+-	/* 6.1 */
+-	{ .ca_id = 0x0f, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | RL | RR | RC },
+-	/* surround71 */
++	{ .ca_id = 0x09, .n_ch = 6,
++	  .mask = FL | FR | LFE | RL | RR },
++	{ .ca_id = 0x08, .n_ch = 6,
++	  .mask = FL | FR | RL | RR },
++	{ .ca_id = 0x07, .n_ch = 6,
++	  .mask = FL | FR | LFE | FC | RC },
++	{ .ca_id = 0x06, .n_ch = 6,
++	  .mask = FL | FR | FC | RC },
++	{ .ca_id = 0x05, .n_ch = 6,
++	  .mask = FL | FR | LFE | RC },
++	{ .ca_id = 0x04, .n_ch = 6,
++	  .mask = FL | FR | RC },
+ 	{ .ca_id = 0x13, .n_ch = 8,
+ 	  .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
+-	/* others */
+-	{ .ca_id = 0x03, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC },
+-	{ .ca_id = 0x04, .n_ch = 8,
+-	  .mask = FL | FR | RC},
+-	{ .ca_id = 0x05, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RC },
+-	{ .ca_id = 0x06, .n_ch = 8,
+-	  .mask = FL | FR | FC | RC },
+-	{ .ca_id = 0x07, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | RC },
+-	{ .ca_id = 0x0c, .n_ch = 8,
+-	  .mask = FL | FR | RC | RL | RR },
+-	{ .ca_id = 0x0d, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RL | RR | RC },
+-	{ .ca_id = 0x0e, .n_ch = 8,
+-	  .mask = FL | FR | FC | RL | RR | RC },
+-	{ .ca_id = 0x10, .n_ch = 8,
+-	  .mask = FL | FR | RL | RR | RLC | RRC },
+-	{ .ca_id = 0x11, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RL | RR | RLC | RRC },
++	{ .ca_id = 0x1f, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
+ 	{ .ca_id = 0x12, .n_ch = 8,
+ 	  .mask = FL | FR | FC | RL | RR | RLC | RRC },
+-	{ .ca_id = 0x14, .n_ch = 8,
+-	  .mask = FL | FR | FLC | FRC },
+-	{ .ca_id = 0x15, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FLC | FRC },
+-	{ .ca_id = 0x16, .n_ch = 8,
+-	  .mask = FL | FR | FC | FLC | FRC },
+-	{ .ca_id = 0x17, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | FLC | FRC },
+-	{ .ca_id = 0x18, .n_ch = 8,
+-	  .mask = FL | FR | RC | FLC | FRC },
+-	{ .ca_id = 0x19, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RC | FLC | FRC },
+-	{ .ca_id = 0x1a, .n_ch = 8,
+-	  .mask = FL | FR | RC | FC | FLC | FRC },
+-	{ .ca_id = 0x1b, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RC | FC | FLC | FRC },
+-	{ .ca_id = 0x1c, .n_ch = 8,
+-	  .mask = FL | FR | RL | RR | FLC | FRC },
+-	{ .ca_id = 0x1d, .n_ch = 8,
+-	  .mask = FL | FR | LFE | RL | RR | FLC | FRC },
+ 	{ .ca_id = 0x1e, .n_ch = 8,
+ 	  .mask = FL | FR | FC | RL | RR | FLC | FRC },
+-	{ .ca_id = 0x1f, .n_ch = 8,
+-	  .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
++	{ .ca_id = 0x11, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR | RLC | RRC },
++	{ .ca_id = 0x1d, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR | FLC | FRC },
++	{ .ca_id = 0x10, .n_ch = 8,
++	  .mask = FL | FR | RL | RR | RLC | RRC },
++	{ .ca_id = 0x1c, .n_ch = 8,
++	  .mask = FL | FR | RL | RR | FLC | FRC },
++	{ .ca_id = 0x0f, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | RL | RR | RC },
++	{ .ca_id = 0x1b, .n_ch = 8,
++	  .mask = FL | FR | LFE | RC | FC | FLC | FRC },
++	{ .ca_id = 0x0e, .n_ch = 8,
++	  .mask = FL | FR | FC | RL | RR | RC },
++	{ .ca_id = 0x1a, .n_ch = 8,
++	  .mask = FL | FR | RC | FC | FLC | FRC },
++	{ .ca_id = 0x0d, .n_ch = 8,
++	  .mask = FL | FR | LFE | RL | RR | RC },
++	{ .ca_id = 0x19, .n_ch = 8,
++	  .mask = FL | FR | LFE | RC | FLC | FRC },
++	{ .ca_id = 0x0c, .n_ch = 8,
++	  .mask = FL | FR | RC | RL | RR },
++	{ .ca_id = 0x18, .n_ch = 8,
++	  .mask = FL | FR | RC | FLC | FRC },
++	{ .ca_id = 0x17, .n_ch = 8,
++	  .mask = FL | FR | LFE | FC | FLC | FRC },
++	{ .ca_id = 0x16, .n_ch = 8,
++	  .mask = FL | FR | FC | FLC | FRC },
++	{ .ca_id = 0x15, .n_ch = 8,
++	  .mask = FL | FR | LFE | FLC | FRC },
++	{ .ca_id = 0x14, .n_ch = 8,
++	  .mask = FL | FR | FLC | FRC },
+ };
+ 
+ struct hdmi_codec_priv {

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0028-mfd-Add-support-for-AC200.patch

@@ -0,0 +1,406 @@
+From 59adceb6f34521c0f1a229f20ee9961269daa539 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@siol.net>
+Date: Fri, 16 Aug 2019 16:38:21 +0200
+Subject: [PATCH 38/44] mfd: Add support for AC200
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+---
+ drivers/mfd/Kconfig       |   9 ++
+ drivers/mfd/Makefile      |   1 +
+ drivers/mfd/ac200.c       | 150 +++++++++++++++++++++++++++
+ include/linux/mfd/ac200.h | 209 ++++++++++++++++++++++++++++++++++++++
+ 4 files changed, 369 insertions(+)
+ create mode 100644 drivers/mfd/ac200.c
+ create mode 100644 include/linux/mfd/ac200.h
+
+--- a/drivers/mfd/Kconfig
++++ b/drivers/mfd/Kconfig
+@@ -178,6 +178,15 @@ config MFD_AC100
+ 	  This driver include only the core APIs. You have to select individual
+ 	  components like codecs or RTC under the corresponding menus.
+ 
++config MFD_AC200
++	tristate "X-Powers AC200"
++	select MFD_CORE
++	depends on I2C
++	help
++	  If you say Y here you get support for the X-Powers AC200 IC.
++	  This driver include only the core APIs. You have to select individual
++	  components like Ethernet PHY or RTC under the corresponding menus.
++
+ config MFD_AXP20X
+ 	tristate
+ 	select MFD_CORE
+--- a/drivers/mfd/Makefile
++++ b/drivers/mfd/Makefile
+@@ -142,6 +142,7 @@ obj-$(CONFIG_MFD_DA9052_SPI)	+= da9052-s
+ obj-$(CONFIG_MFD_DA9052_I2C)	+= da9052-i2c.o
+ 
+ obj-$(CONFIG_MFD_AC100)		+= ac100.o
++obj-$(CONFIG_MFD_AC200)		+= ac200.o
+ obj-$(CONFIG_MFD_AXP20X)	+= axp20x.o
+ obj-$(CONFIG_MFD_AXP20X_I2C)	+= axp20x-i2c.o
+ obj-$(CONFIG_MFD_AXP20X_RSB)	+= axp20x-rsb.o
+--- /dev/null
++++ b/drivers/mfd/ac200.c
+@@ -0,0 +1,148 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * MFD core driver for X-Powers' AC200 IC
++ *
++ * The AC200 is a chip which is co-packaged with Allwinner H6 SoC and
++ * includes analog audio codec, analog TV encoder, ethernet PHY, eFuse
++ * and RTC.
++ *
++ * Copyright (c) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
++ *
++ * Based on AC100 driver with following copyrights:
++ * Copyright (2016) Chen-Yu Tsai
++ */
++
++#include <linux/i2c.h>
++#include <linux/kernel.h>
++#include <linux/mfd/core.h>
++#include <linux/mfd/ac200.h>
++#include <linux/module.h>
++#include <linux/of.h>
++
++static const struct regmap_range_cfg ac200_range_cfg[] = {
++	{
++		.range_min = AC200_SYS_VERSION,
++		.range_max = AC200_IC_CHARA1,
++		.selector_reg = AC200_TWI_REG_ADDR_H,
++		.selector_mask = 0xff,
++		.selector_shift = 0,
++		.window_start = 0,
++		.window_len = 256,
++	}
++};
++
++static const struct regmap_config ac200_regmap_config = {
++	.reg_bits	= 8,
++	.val_bits	= 16,
++	.ranges		= ac200_range_cfg,
++	.num_ranges	= ARRAY_SIZE(ac200_range_cfg),
++	.max_register	= AC200_IC_CHARA1,
++};
++
++static struct mfd_cell ac200_cells[] = {
++	{
++		.name		= "ac200-codec",
++		.of_compatible	= "x-powers,ac200-codec",
++	}, {
++		.name		= "ac200-efuse",
++		.of_compatible	= "x-powers,ac200-efuse",
++	}, {
++		.name		= "ac200-ephy",
++		.of_compatible	= "x-powers,ac200-ephy",
++	}, {
++		.name		= "ac200-rtc",
++		.of_compatible	= "x-powers,ac200-rtc",
++	}, {
++		.name		= "ac200-tve",
++		.of_compatible	= "x-powers,ac200-tve",
++	},
++};
++
++static int ac200_i2c_probe(struct i2c_client *i2c,
++			   const struct i2c_device_id *id)
++{
++	struct device *dev = &i2c->dev;
++	struct ac200_dev *ac200;
++	int ret;
++
++	ac200 = devm_kzalloc(dev, sizeof(*ac200), GFP_KERNEL);
++	if (!ac200)
++		return -ENOMEM;
++
++	i2c_set_clientdata(i2c, ac200);
++
++	ac200->clk = devm_clk_get(dev, NULL);
++	if (IS_ERR(ac200->clk)) {
++		ret = PTR_ERR(ac200->clk);
++		dev_err(dev, "Can't obtain the clock: %d\n", ret);
++		return ret;
++	}
++
++	ac200->regmap = devm_regmap_init_i2c(i2c, &ac200_regmap_config);
++	if (IS_ERR(ac200->regmap)) {
++		ret = PTR_ERR(ac200->regmap);
++		dev_err(dev, "Regmap init failed: %d\n", ret);
++		return ret;
++	}
++
++	ret = clk_prepare_enable(ac200->clk);
++	if (ret)
++		return ret;
++
++	ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
++	if (ret)
++		goto err;
++
++	ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 1);
++	if (ret)
++		goto err;
++
++	ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, ac200_cells,
++				   ARRAY_SIZE(ac200_cells), NULL, 0, NULL);
++	if (ret) {
++		dev_err(dev, "Failed to add MFD devices: %d\n", ret);
++		goto err;
++	}
++
++	return 0;
++
++err:
++	clk_disable_unprepare(ac200->clk);
++	return ret;
++}
++
++void ac200_i2c_remove(struct i2c_client *i2c)
++{
++	struct ac200_dev *ac200 = i2c_get_clientdata(i2c);
++
++	regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
++
++	clk_disable_unprepare(ac200->clk);
++}
++
++static const struct i2c_device_id ac200_ids[] = {
++	{ "ac200", },
++	{ /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(i2c, ac200_ids);
++
++static const struct of_device_id ac200_of_match[] = {
++	{ .compatible = "x-powers,ac200" },
++	{ /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(of, ac200_of_match);
++
++static struct i2c_driver ac200_i2c_driver = {
++	.driver = {
++		.name	= "ac200",
++		.of_match_table	= of_match_ptr(ac200_of_match),
++	},
++	.probe	= ac200_i2c_probe,
++	.remove = ac200_i2c_remove,
++	.id_table = ac200_ids,
++};
++module_i2c_driver(ac200_i2c_driver);
++
++MODULE_DESCRIPTION("MFD core driver for AC200");
++MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
++MODULE_LICENSE("GPL v2");
+--- /dev/null
++++ b/include/linux/mfd/ac200.h
+@@ -0,0 +1,209 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++/*
++ * AC200 register list
++ *
++ * Copyright (C) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
++ */
++
++#ifndef __LINUX_MFD_AC200_H
++#define __LINUX_MFD_AC200_H
++
++#include <linux/clk.h>
++#include <linux/regmap.h>
++
++/* interface registers (can be accessed from any page) */
++#define AC200_TWI_CHANGE_TO_RSB		0x3E
++#define AC200_TWI_PAD_DELAY		0xC4
++#define AC200_TWI_REG_ADDR_H		0xFE
++
++/* General registers */
++#define AC200_SYS_VERSION		0x0000
++#define AC200_SYS_CONTROL		0x0002
++#define AC200_SYS_IRQ_ENABLE		0x0004
++#define AC200_SYS_IRQ_STATUS		0x0006
++#define AC200_SYS_CLK_CTL		0x0008
++#define AC200_SYS_DLDO_OSC_CTL		0x000A
++#define AC200_SYS_PLL_CTL0		0x000C
++#define AC200_SYS_PLL_CTL1		0x000E
++#define AC200_SYS_AUDIO_CTL0		0x0010
++#define AC200_SYS_AUDIO_CTL1		0x0012
++#define AC200_SYS_EPHY_CTL0		0x0014
++#define AC200_SYS_EPHY_CTL1		0x0016
++#define AC200_SYS_TVE_CTL0		0x0018
++#define AC200_SYS_TVE_CTL1		0x001A
++
++/* Audio Codec registers */
++#define AC200_AC_SYS_CLK_CTL		0x2000
++#define AC200_SYS_MOD_RST		0x2002
++#define AC200_SYS_SAMP_CTL		0x2004
++#define AC200_I2S_CTL			0x2100
++#define AC200_I2S_CLK			0x2102
++#define AC200_I2S_FMT0			0x2104
++#define AC200_I2S_FMT1			0x2108
++#define AC200_I2S_MIX_SRC		0x2114
++#define AC200_I2S_MIX_GAIN		0x2116
++#define AC200_I2S_DACDAT_DVC		0x2118
++#define AC200_I2S_ADCDAT_DVC		0x211A
++#define AC200_AC_DAC_DPC		0x2200
++#define AC200_AC_DAC_MIX_SRC		0x2202
++#define AC200_AC_DAC_MIX_GAIN		0x2204
++#define AC200_DACA_OMIXER_CTRL		0x2220
++#define AC200_OMIXER_SR			0x2222
++#define AC200_LINEOUT_CTRL		0x2224
++#define AC200_AC_ADC_DPC		0x2300
++#define AC200_MBIAS_CTRL		0x2310
++#define AC200_ADC_MIC_CTRL		0x2320
++#define AC200_ADCMIXER_SR		0x2322
++#define AC200_ANALOG_TUNING0		0x232A
++#define AC200_ANALOG_TUNING1		0x232C
++#define AC200_AC_AGC_SEL		0x2480
++#define AC200_ADC_DAPLCTRL		0x2500
++#define AC200_ADC_DAPRCTRL		0x2502
++#define AC200_ADC_DAPLSTA		0x2504
++#define AC200_ADC_DAPRSTA		0x2506
++#define AC200_ADC_DAPLTL		0x2508
++#define AC200_ADC_DAPRTL		0x250A
++#define AC200_ADC_DAPLHAC		0x250C
++#define AC200_ADC_DAPLLAC		0x250E
++#define AC200_ADC_DAPRHAC		0x2510
++#define AC200_ADC_DAPRLAC		0x2512
++#define AC200_ADC_DAPLDT		0x2514
++#define AC200_ADC_DAPLAT		0x2516
++#define AC200_ADC_DAPRDT		0x2518
++#define AC200_ADC_DAPRAT		0x251A
++#define AC200_ADC_DAPNTH		0x251C
++#define AC200_ADC_DAPLHNAC		0x251E
++#define AC200_ADC_DAPLLNAC		0x2520
++#define AC200_ADC_DAPRHNAC		0x2522
++#define AC200_ADC_DAPRLNAC		0x2524
++#define AC200_AC_DAPHHPFC		0x2526
++#define AC200_AC_DAPLHPFC		0x2528
++#define AC200_AC_DAPOPT			0x252A
++#define AC200_AC_DAC_DAPCTRL		0x3000
++#define AC200_AC_DRC_HHPFC		0x3002
++#define AC200_AC_DRC_LHPFC		0x3004
++#define AC200_AC_DRC_CTRL		0x3006
++#define AC200_AC_DRC_LPFHAT		0x3008
++#define AC200_AC_DRC_LPFLAT		0x300A
++#define AC200_AC_DRC_RPFHAT		0x300C
++#define AC200_AC_DRC_RPFLAT		0x300E
++#define AC200_AC_DRC_LPFHRT		0x3010
++#define AC200_AC_DRC_LPFLRT		0x3012
++#define AC200_AC_DRC_RPFHRT		0x3014
++#define AC200_AC_DRC_RPFLRT		0x3016
++#define AC200_AC_DRC_LRMSHAT		0x3018
++#define AC200_AC_DRC_LRMSLAT		0x301A
++#define AC200_AC_DRC_RRMSHAT		0x301C
++#define AC200_AC_DRC_RRMSLAT		0x301E
++#define AC200_AC_DRC_HCT		0x3020
++#define AC200_AC_DRC_LCT		0x3022
++#define AC200_AC_DRC_HKC		0x3024
++#define AC200_AC_DRC_LKC		0x3026
++#define AC200_AC_DRC_HOPC		0x3028
++#define AC200_AC_DRC_LOPC		0x302A
++#define AC200_AC_DRC_HLT		0x302C
++#define AC200_AC_DRC_LLT		0x302E
++#define AC200_AC_DRC_HKI		0x3030
++#define AC200_AC_DRC_LKI		0x3032
++#define AC200_AC_DRC_HOPL		0x3034
++#define AC200_AC_DRC_LOPL		0x3036
++#define AC200_AC_DRC_HET		0x3038
++#define AC200_AC_DRC_LET		0x303A
++#define AC200_AC_DRC_HKE		0x303C
++#define AC200_AC_DRC_LKE		0x303E
++#define AC200_AC_DRC_HOPE		0x3040
++#define AC200_AC_DRC_LOPE		0x3042
++#define AC200_AC_DRC_HKN		0x3044
++#define AC200_AC_DRC_LKN		0x3046
++#define AC200_AC_DRC_SFHAT		0x3048
++#define AC200_AC_DRC_SFLAT		0x304A
++#define AC200_AC_DRC_SFHRT		0x304C
++#define AC200_AC_DRC_SFLRT		0x304E
++#define AC200_AC_DRC_MXGHS		0x3050
++#define AC200_AC_DRC_MXGLS		0x3052
++#define AC200_AC_DRC_MNGHS		0x3054
++#define AC200_AC_DRC_MNGLS		0x3056
++#define AC200_AC_DRC_EPSHC		0x3058
++#define AC200_AC_DRC_EPSLC		0x305A
++#define AC200_AC_DRC_HPFHGAIN		0x305E
++#define AC200_AC_DRC_HPFLGAIN		0x3060
++#define AC200_AC_DRC_BISTCR		0x3100
++#define AC200_AC_DRC_BISTST		0x3102
++
++/* TVE registers */
++#define AC200_TVE_CTL0			0x4000
++#define AC200_TVE_CTL1			0x4002
++#define AC200_TVE_MOD0			0x4004
++#define AC200_TVE_MOD1			0x4006
++#define AC200_TVE_DAC_CFG0		0x4008
++#define AC200_TVE_DAC_CFG1		0x400A
++#define AC200_TVE_YC_DELAY		0x400C
++#define AC200_TVE_YC_FILTER		0x400E
++#define AC200_TVE_BURST_FRQ0		0x4010
++#define AC200_TVE_BURST_FRQ1		0x4012
++#define AC200_TVE_FRONT_PORCH		0x4014
++#define AC200_TVE_BACK_PORCH		0x4016
++#define AC200_TVE_TOTAL_LINE		0x401C
++#define AC200_TVE_FIRST_ACTIVE		0x401E
++#define AC200_TVE_BLACK_LEVEL		0x4020
++#define AC200_TVE_BLANK_LEVEL		0x4022
++#define AC200_TVE_PLUG_EN		0x4030
++#define AC200_TVE_PLUG_IRQ_EN		0x4032
++#define AC200_TVE_PLUG_IRQ_STA		0x4034
++#define AC200_TVE_PLUG_STA		0x4038
++#define AC200_TVE_PLUG_DEBOUNCE		0x4040
++#define AC200_TVE_DAC_TEST		0x4042
++#define AC200_TVE_PLUG_PULSE_LEVEL	0x40F4
++#define AC200_TVE_PLUG_PULSE_START	0x40F8
++#define AC200_TVE_PLUG_PULSE_PERIOD	0x40FA
++#define AC200_TVE_IF_CTL		0x5000
++#define AC200_TVE_IF_TIM0		0x5008
++#define AC200_TVE_IF_TIM1		0x500A
++#define AC200_TVE_IF_TIM2		0x500C
++#define AC200_TVE_IF_TIM3		0x500E
++#define AC200_TVE_IF_SYNC0		0x5010
++#define AC200_TVE_IF_SYNC1		0x5012
++#define AC200_TVE_IF_SYNC2		0x5014
++#define AC200_TVE_IF_TIM4		0x5016
++#define AC200_TVE_IF_STATUS		0x5018
++
++/* EPHY registers */
++#define AC200_EPHY_CTL			0x6000
++#define AC200_EPHY_BIST			0x6002
++
++/* eFuse registers (0x8000 - 0x9FFF, layout unknown) */
++
++/* RTC registers */
++#define AC200_LOSC_CTRL0		0xA000
++#define AC200_LOSC_CTRL1		0xA002
++#define AC200_LOSC_AUTO_SWT_STA		0xA004
++#define AC200_INTOSC_CLK_PRESCAL	0xA008
++#define AC200_RTC_YY_MM_DD0		0xA010
++#define AC200_RTC_YY_MM_DD1		0xA012
++#define AC200_RTC_HH_MM_SS0		0xA014
++#define AC200_RTC_HH_MM_SS1		0xA016
++#define AC200_ALARM0_CUR_VLU0		0xA024
++#define AC200_ALARM0_CUR_VLU1		0xA026
++#define AC200_ALARM0_ENABLE		0xA028
++#define AC200_ALARM0_IRQ_EN		0xA02C
++#define AC200_ALARM0_IRQ_STA		0xA030
++#define AC200_ALARM1_WK_HH_MM_SS0	0xA040
++#define AC200_ALARM1_WK_HH_MM_SS1	0xA042
++#define AC200_ALARM1_ENABLE		0xA044
++#define AC200_ALARM1_IRQ_EN		0xA048
++#define AC200_ALARM1_IRQ_STA		0xA04C
++#define AC200_ALARM_CONFIG		0xA050
++#define AC200_LOSC_OUT_GATING		0xA060
++#define AC200_GP_DATA(x)		(0xA100 + (x) * 2)
++#define AC200_RTC_DEB			0xA170
++#define AC200_GPL_HOLD_OUTPUT		0xA180
++#define AC200_VDD_RTC			0xA190
++#define AC200_IC_CHARA0			0xA1F0
++#define AC200_IC_CHARA1			0xA1F2
++
++struct ac200_dev {
++	struct clk	*clk;
++	struct regmap	*regmap;
++};
++
++#endif /* __LINUX_MFD_AC200_H */

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0029-net-phy-Add-support-for-AC200-EPHY.patch

@@ -0,0 +1,276 @@
+From cbf68fb141747879e2e6c43584c1e1e3b4d77683 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@siol.net>
+Date: Fri, 16 Aug 2019 16:38:57 +0200
+Subject: [PATCH 39/44] net: phy: Add support for AC200 EPHY
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+---
+ drivers/net/phy/Kconfig  |   7 ++
+ drivers/net/phy/Makefile |   1 +
+ drivers/net/phy/ac200.c  | 234 +++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 242 insertions(+)
+ create mode 100644 drivers/net/phy/ac200.c
+
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -63,6 +63,13 @@ config SFP
+ 
+ comment "MII PHY device drivers"
+ 
++config AC200_PHY
++	tristate "AC200 EPHY"
++	depends on NVMEM
++	depends on OF
++	help
++	  Fast ethernet PHY as found in X-Powers AC200 multi-function device.
++
+ config AMD_PHY
+ 	tristate "AMD PHYs"
+ 	help
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -30,6 +30,7 @@ obj-$(CONFIG_SFP)		+= sfp.o
+ sfp-obj-$(CONFIG_SFP)		+= sfp-bus.o
+ obj-y				+= $(sfp-obj-y) $(sfp-obj-m)
+ 
++obj-$(CONFIG_AC200_PHY)		+= ac200.o
+ obj-$(CONFIG_ADIN_PHY)		+= adin.o
+ obj-$(CONFIG_AMD_PHY)		+= amd.o
+ aquantia-objs			+= aquantia_main.o
+--- /dev/null
++++ b/drivers/net/phy/ac200.c
+@@ -0,0 +1,234 @@
++// SPDX-License-Identifier: GPL-2.0+
++/**
++ * Driver for AC200 Ethernet PHY
++ *
++ * Copyright (c) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/mfd/ac200.h>
++#include <linux/nvmem-consumer.h>
++#include <linux/of.h>
++#include <linux/phy.h>
++#include <linux/platform_device.h>
++
++#define AC200_EPHY_ID			0x00441400
++#define AC200_EPHY_ID_MASK		0x0ffffff0
++
++/* macros for system ephy control 0 register */
++#define AC200_EPHY_RESET_INVALID	BIT(0)
++#define AC200_EPHY_SYSCLK_GATING	BIT(1)
++
++/* macros for system ephy control 1 register */
++#define AC200_EPHY_E_EPHY_MII_IO_EN	BIT(0)
++#define AC200_EPHY_E_LNK_LED_IO_EN	BIT(1)
++#define AC200_EPHY_E_SPD_LED_IO_EN	BIT(2)
++#define AC200_EPHY_E_DPX_LED_IO_EN	BIT(3)
++
++/* macros for ephy control register */
++#define AC200_EPHY_SHUTDOWN		BIT(0)
++#define AC200_EPHY_LED_POL		BIT(1)
++#define AC200_EPHY_CLK_SEL		BIT(2)
++#define AC200_EPHY_ADDR(x)		(((x) & 0x1F) << 4)
++#define AC200_EPHY_XMII_SEL		BIT(11)
++#define AC200_EPHY_CALIB(x)		(((x) & 0xF) << 12)
++
++struct ac200_ephy_dev {
++	struct phy_driver	*ephy;
++	struct regmap		*regmap;
++};
++
++static char *ac200_phy_name = "AC200 EPHY";
++
++static void disable_intelligent_ieee(struct phy_device *phydev)
++{
++	unsigned int value;
++
++	phy_write(phydev, 0x1f, 0x0100);	/* switch to page 1 */
++	value = phy_read(phydev, 0x17);
++	value &= ~BIT(3);			/* disable IEEE */
++	phy_write(phydev, 0x17, value);
++	phy_write(phydev, 0x1f, 0x0000);	/* switch to page 0 */
++}
++
++static void disable_802_3az_ieee(struct phy_device *phydev)
++{
++	unsigned int value;
++
++	phy_write(phydev, 0xd, 0x7);
++	phy_write(phydev, 0xe, 0x3c);
++	phy_write(phydev, 0xd, BIT(14) | 0x7);
++	value = phy_read(phydev, 0xe);
++	value &= ~BIT(1);
++	phy_write(phydev, 0xd, 0x7);
++	phy_write(phydev, 0xe, 0x3c);
++	phy_write(phydev, 0xd, BIT(14) | 0x7);
++	phy_write(phydev, 0xe, value);
++
++	phy_write(phydev, 0x1f, 0x0200);	/* switch to page 2 */
++	phy_write(phydev, 0x18, 0x0000);
++}
++
++static int ac200_ephy_config_init(struct phy_device *phydev)
++{
++	const struct ac200_ephy_dev *priv = phydev->drv->driver_data;
++	unsigned int value;
++	int ret;
++
++	phy_write(phydev, 0x1f, 0x0100);	/* Switch to Page 1 */
++	phy_write(phydev, 0x12, 0x4824);	/* Disable APS */
++
++	phy_write(phydev, 0x1f, 0x0200);	/* Switch to Page 2 */
++	phy_write(phydev, 0x18, 0x0000);	/* PHYAFE TRX optimization */
++
++	phy_write(phydev, 0x1f, 0x0600);	/* Switch to Page 6 */
++	phy_write(phydev, 0x14, 0x708f);	/* PHYAFE TX optimization */
++	phy_write(phydev, 0x13, 0xF000);	/* PHYAFE RX optimization */
++	phy_write(phydev, 0x15, 0x1530);
++
++	phy_write(phydev, 0x1f, 0x0800);	/* Switch to Page 6 */
++	phy_write(phydev, 0x18, 0x00bc);	/* PHYAFE TRX optimization */
++
++	disable_intelligent_ieee(phydev);	/* Disable Intelligent IEEE */
++	disable_802_3az_ieee(phydev);		/* Disable 802.3az IEEE */
++	phy_write(phydev, 0x1f, 0x0000);	/* Switch to Page 0 */
++
++	value = (phydev->interface == PHY_INTERFACE_MODE_RMII) ?
++		AC200_EPHY_XMII_SEL : 0;
++	ret = regmap_update_bits(priv->regmap, AC200_EPHY_CTL,
++				 AC200_EPHY_XMII_SEL, value);
++	if (ret)
++		return ret;
++
++	/* FIXME: This is probably H6 specific */
++	value = phy_read(phydev, 0x13);
++	value |= BIT(12);
++	phy_write(phydev, 0x13, value);
++
++	return 0;
++}
++
++static const struct mdio_device_id __maybe_unused ac200_ephy_phy_tbl[] = {
++	{ AC200_EPHY_ID, AC200_EPHY_ID_MASK },
++	{ /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(mdio, ac200_ephy_phy_tbl);
++
++static int ac200_ephy_probe(struct platform_device *pdev)
++{
++	struct ac200_dev *ac200 = dev_get_drvdata(pdev->dev.parent);
++	struct device *dev = &pdev->dev;
++	struct ac200_ephy_dev *priv;
++	struct nvmem_cell *calcell;
++	struct phy_driver *ephy;
++	u16 *caldata, calib;
++	size_t callen;
++	int ret;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	ephy = devm_kzalloc(dev, sizeof(*ephy), GFP_KERNEL);
++	if (!ephy)
++		return -ENOMEM;
++
++	calcell = devm_nvmem_cell_get(dev, "ephy_calib");
++	if (IS_ERR(calcell)) {
++		dev_err(dev, "Unable to find calibration data!\n");
++		return PTR_ERR(calcell);
++	}
++
++	caldata = nvmem_cell_read(calcell, &callen);
++	if (IS_ERR(caldata)) {
++		dev_err(dev, "Unable to read calibration data!\n");
++		return PTR_ERR(caldata);
++	}
++
++	if (callen != 2) {
++		dev_err(dev, "Calibration data has wrong length: 2 != %lu\n",
++			callen);
++		kfree(caldata);
++		return -EINVAL;
++	}
++
++	calib = *caldata + 3;
++	kfree(caldata);
++
++	ephy->phy_id = AC200_EPHY_ID;
++	ephy->phy_id_mask = AC200_EPHY_ID_MASK;
++	ephy->name = ac200_phy_name;
++	ephy->driver_data = priv;
++	ephy->soft_reset = genphy_soft_reset;
++	ephy->config_init = ac200_ephy_config_init;
++	ephy->suspend = genphy_suspend;
++	ephy->resume = genphy_resume;
++
++	priv->ephy = ephy;
++	priv->regmap = ac200->regmap;
++	platform_set_drvdata(pdev, priv);
++
++	ret = regmap_write(ac200->regmap, AC200_SYS_EPHY_CTL0,
++			   AC200_EPHY_RESET_INVALID |
++			   AC200_EPHY_SYSCLK_GATING);
++	if (ret)
++		return ret;
++
++	ret = regmap_write(ac200->regmap, AC200_SYS_EPHY_CTL1,
++			   AC200_EPHY_E_EPHY_MII_IO_EN |
++			   AC200_EPHY_E_LNK_LED_IO_EN |
++			   AC200_EPHY_E_SPD_LED_IO_EN |
++			   AC200_EPHY_E_DPX_LED_IO_EN);
++	if (ret)
++		return ret;
++
++	ret = regmap_write(ac200->regmap, AC200_EPHY_CTL,
++			   AC200_EPHY_LED_POL |
++			   AC200_EPHY_CLK_SEL |
++			   AC200_EPHY_ADDR(1) |
++			   AC200_EPHY_CALIB(calib));
++	if (ret)
++		return ret;
++
++	ret = phy_driver_register(priv->ephy, THIS_MODULE);
++	if (ret) {
++		dev_err(dev, "Unable to register phy\n");
++		return ret;
++	}
++
++	return 0;
++}
++
++static int ac200_ephy_remove(struct platform_device *pdev)
++{
++	struct ac200_ephy_dev *priv = platform_get_drvdata(pdev);
++
++	phy_driver_unregister(priv->ephy);
++
++	regmap_write(priv->regmap, AC200_EPHY_CTL, AC200_EPHY_SHUTDOWN);
++	regmap_write(priv->regmap, AC200_SYS_EPHY_CTL1, 0);
++	regmap_write(priv->regmap, AC200_SYS_EPHY_CTL0, 0);
++
++	return 0;
++}
++
++static const struct of_device_id ac200_ephy_match[] = {
++	{ .compatible = "x-powers,ac200-ephy" },
++	{ /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(of, ac200_ephy_match);
++
++static struct platform_driver ac200_ephy_driver = {
++	.probe		= ac200_ephy_probe,
++	.remove		= ac200_ephy_remove,
++	.driver		= {
++		.name		= "ac200-ephy",
++		.of_match_table	= ac200_ephy_match,
++	},
++};
++module_platform_driver(ac200_ephy_driver);
++
++MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
++MODULE_DESCRIPTION("AC200 Ethernet PHY driver");
++MODULE_LICENSE("GPL");

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0031-arm64-dts-h6-deinterlace.patch

@@ -0,0 +1,31 @@
+From c009b3b707bbde30fa6ff49ca3075160524ea7b9 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@siol.net>
+Date: Tue, 26 May 2020 20:08:27 +0200
+Subject: [PATCH 41/44] arm64: dts: h6 deinterlace
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -160,6 +160,18 @@
+ 			};
+ 		};
+
++		deinterlace: deinterlace@1420000 {
++			compatible = "allwinner,sun50i-h6-deinterlace";
++			reg = <0x01420000 0x2000>;
++			clocks = <&ccu CLK_BUS_DEINTERLACE>,
++				 <&ccu CLK_DEINTERLACE>,
++				 <&ccu CLK_MBUS_DEINTERLACE>;
++			clock-names = "bus", "mod", "ram";
++			resets = <&ccu RST_BUS_DEINTERLACE>;
++			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
++			iommus = <&iommu 2>;
++		};
++
+ 		video-codec@1c0e000 {
+ 			compatible = "allwinner,sun50i-h6-video-engine";
+ 			reg = <0x01c0e000 0x2000>;

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0043-HACK-h6-Add-HDMI-sound-card.patch

@@ -0,0 +1,53 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@siol.net>
+Date: Sat, 16 Jan 2021 10:58:14 +0100
+Subject: [PATCH] HACK: h6: Add HDMI sound card
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 20 +++++++++++++++++++-
+ 1 file changed, 19 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -108,6 +108,24 @@
+ 			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ 	};
+ 
++	sound_hdmi: sound {
++		compatible = "simple-audio-card";
++		simple-audio-card,format = "i2s";
++		simple-audio-card,name = "allwinner-hdmi";
++		simple-audio-card,mclk-fs = <128>;
++		simple-audio-card,frame-inversion;
++
++		simple-audio-card,codec {
++			sound-dai = <&hdmi>;
++		};
++
++		simple-audio-card,cpu {
++			sound-dai = <&i2s1>;
++			dai-tdm-slot-num = <2>;
++			dai-tdm-slot-width = <32>;
++		};
++	};
++
+ 	soc {
+ 		compatible = "simple-bus";
+ 		#address-cells = <1>;
+@@ -664,7 +682,6 @@
+ 			dmas = <&dma 4>, <&dma 4>;
+ 			resets = <&ccu RST_BUS_I2S1>;
+ 			dma-names = "rx", "tx";
+-			status = "disabled";
+ 		};
+ 
+ 		spdif: spdif@5093000 {
+@@ -801,6 +818,7 @@
+ 		};
+ 
+ 		hdmi: hdmi@6000000 {
++			#sound-dai-cells = <0>;
+ 			compatible = "allwinner,sun50i-h6-dw-hdmi";
+ 			reg = <0x06000000 0x10000>;
+ 			reg-io-width = <1>;

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0049-arm64-dts-allwinner-h6-Add-AC200-EPHY-related-nodes.patch

@@ -0,0 +1,110 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@siol.net>
+Date: Fri, 16 Aug 2019 16:40:20 +0200
+Subject: [PATCH] arm64: dts: allwinner: h6: Add AC200 EPHY related nodes
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 ++++++++++++++++++++
+ 1 file changed, 56 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -16,6 +16,16 @@
+ 	#address-cells = <1>;
+ 	#size-cells = <1>;
+ 
++	ac200_pwm_clk: ac200_clk {
++		compatible = "pwm-clock";
++		#clock-cells = <0>;
++		clock-frequency = <24000000>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pwm1_pin>;
++		pwms = <&pwm 1 42 0>;
++		status = "disabled";
++	};
++
+ 	cpus {
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+@@ -319,6 +329,10 @@
+ 			cpu_speed_grade: cpu-speed-grade@1c {
+ 				reg = <0x1c 0x4>;
+ 			};
++
++			ephy_calib: ephy_calib@2c {
++				reg = <0x2c 0x2>;
++			};
+ 		};
+ 
+ 		timer@3009000 {
+@@ -373,6 +387,13 @@
+ 				drive-strength = <40>;
+ 			};
+ 
++			ext_rmii_pins: rmii_pins {
++				pins = "PA0", "PA1", "PA2", "PA3", "PA4",
++				       "PA5", "PA6", "PA7", "PA8", "PA9";
++				function = "emac";
++				drive-strength = <40>;
++			};
++
+ 			hdmi_pins: hdmi-pins {
+ 				pins = "PH8", "PH9", "PH10";
+ 				function = "hdmi";
+@@ -393,6 +414,11 @@
+ 				function = "i2c2";
+ 			};
+ 
++			i2c3_pins: i2c3-pins {
++				pins = "PB17", "PB18";
++				function = "i2c3";
++			};
++
+ 			mmc0_pins: mmc0-pins {
+ 				pins = "PF0", "PF1", "PF2", "PF3",
+ 				       "PF4", "PF5";
+@@ -419,6 +445,11 @@
+ 				bias-pull-up;
+ 			};
+ 
++			pwm1_pin: pwm1-pin {
++				pins = "PB19";
++				function = "pwm1";
++			};
++
+ 			/omit-if-no-ref/
+ 			spi0_pins: spi0-pins {
+ 				pins = "PC0", "PC2", "PC3";
+@@ -652,6 +683,31 @@
+ 			#size-cells = <0>;
+ 		};
+ 
++		i2c3: i2c@5002c00 {
++			compatible = "allwinner,sun6i-a31-i2c";
++			reg = <0x05002c00 0x400>;
++			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_I2C3>;
++			resets = <&ccu RST_BUS_I2C3>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&i2c3_pins>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			ac200: mfd@10 {
++				compatible = "x-powers,ac200";
++				reg = <0x10>;
++				clocks = <&ac200_pwm_clk>;
++
++				ac200_ephy: phy {
++					compatible = "x-powers,ac200-ephy";
++					nvmem-cells = <&ephy_calib>;
++					nvmem-cell-names = "ephy_calib";
++				};
++			};
++		};
++
+ 		emac: ethernet@5020000 {
+ 			compatible = "allwinner,sun50i-h6-emac",
+ 				     "allwinner,sun50i-a64-emac";

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0053-mmc-sunxi-fix-unusuable-eMMC-on-some-H6-boards-by-di.patch

@@ -0,0 +1,60 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Alejandro=20Gonz=C3=A1lez?=
+ <alejandro.gonzalez.correo@gmail.com>
+Date: Sun, 25 Aug 2019 17:05:58 +0200
+Subject: [PATCH] mmc: sunxi: fix unusuable eMMC on some H6 boards by disabling
+ DDR
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Some Allwinner H6 boards have timing problems when dealing with
+DDR-capable eMMC cards. These boards include the Pine H64 and Tanix TX6.
+
+These timing problems result in out of sync communication between the
+driver and the eMMC, which renders the memory unsuable for every
+operation but some basic commmands, like reading the status register.
+
+The cause of these timing problems is not yet well known, but they go
+away by disabling DDR mode operation in the driver. Like on some H5
+boards, it might be that the traces are not precise enough to support
+these speeds. However, Jernej Skrabec compared the BSP driver with this
+driver, and found that the BSP driver configures pinctrl to operate at
+1.8 V when entering DDR mode (although 3.3 V operation is supported), while
+the mainline kernel lacks any mechanism to switch voltages dynamically.
+Finally, other possible cause might be some timing parameter that is
+different on the H6 with respect to other SoCs.
+
+Therefore, as this fix works reliably, the kernel lacks the required
+dynamic pinctrl control for now and a slow eMMC is better than a not
+working eMMC, just disable DDR operation for now on H6-compatible
+devices.
+
+Signed-off-by: Alejandro González <alejandro.gonzalez.correo@gmail.com>
+---
+ drivers/mmc/host/sunxi-mmc.c | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+--- a/drivers/mmc/host/sunxi-mmc.c
++++ b/drivers/mmc/host/sunxi-mmc.c
+@@ -1421,14 +1421,17 @@ static int sunxi_mmc_probe(struct platfo
+ 
+ 	/*
+ 	 * Some H5 devices do not have signal traces precise enough to
+-	 * use HS DDR mode for their eMMC chips.
++	 * use HS DDR mode for their eMMC chips. Other H6 devices operate
++	 * unreliably on HS DDR mode, too.
+ 	 *
+ 	 * We still enable HS DDR modes for all the other controller
+-	 * variants that support them.
++	 * variants that support them properly.
+ 	 */
+ 	if ((host->cfg->clk_delays || host->use_new_timings) &&
+ 	    !of_device_is_compatible(pdev->dev.of_node,
+-				     "allwinner,sun50i-h5-emmc"))
++				     "allwinner,sun50i-h5-emmc") &&
++	    !of_device_is_compatible(pdev->dev.of_node,
++				     "allwinner,sun50i-h6-emmc"))
+ 		mmc->caps      |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
+ 
+ 	ret = mmc_of_parse(mmc);

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0065-wip-fix-H6-4k-60.patch

@@ -0,0 +1,75 @@
+From edc858b1d62ce5ffd8b8d10cc62425af15d48a91 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@gmail.com>
+Date: Wed, 8 Dec 2021 20:42:45 +0100
+Subject: [PATCH] wip: fix H6 4k@60
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++++++
+ drivers/gpu/drm/bridge/synopsys/dw-hdmi.h | 4 ++++
+ drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c    | 2 +-
+ 3 files changed, 12 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+index f08d0fded61f..bcd839a3ce80 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+@@ -1488,6 +1488,8 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
+ 	/* Override and disable clock termination. */
+ 	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
+ 			      HDMI_3D_TX_PHY_CKCALCTRL);
++	if (mpixelclock == 594000000)
++		dw_hdmi_phy_i2c_write(hdmi, 0x8006, HDMI_3D_TX_PHY_MSM_CTRL);
+ 
+ 	return 0;
+ }
+@@ -2166,6 +2168,8 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
+ 	hdmi->hdmi_data.hdcp_enable = 0;
+ 	hdmi->hdmi_data.video_mode.mdataenablepolarity = true;
+ 
++	hdmi_writeb(hdmi, HDMI_FC_GCP_SET_AVMUTE, HDMI_FC_GCP);
++
+ 	/* HDMI Initialization Step B.1 */
+ 	hdmi_av_composer(hdmi, &connector->display_info, mode);
+ 
+@@ -2205,6 +2209,9 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
+ 	hdmi_video_sample(hdmi);
+ 	hdmi_tx_hdcp_config(hdmi);
+ 
++	msleep(100);
++	hdmi_writeb(hdmi, HDMI_FC_GCP_CLEAR_AVMUTE, HDMI_FC_GCP);
++
+ 	dw_hdmi_clear_overflow(hdmi);
+ 
+ 	return 0;
+diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
+index 1999db05bc3b..05182418efbb 100644
+--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
+@@ -842,6 +842,10 @@ enum {
+ 	HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00,
+ 	HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,
+ 
++/* HDMI_FC_GCP */
++	HDMI_FC_GCP_SET_AVMUTE = 0x2,
++	HDMI_FC_GCP_CLEAR_AVMUTE = 0x1,
++
+ /* FC_DBGFORCE field values */
+ 	HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10,
+ 	HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,
+diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+index b64d93da651d..b70bc9de761f 100644
+--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
++++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+@@ -90,7 +90,7 @@ static const struct dw_hdmi_mpll_config sun50i_h6_mpll_cfg[] = {
+ 		},
+ 	},  {
+ 		594000000, {
+-			{ 0x1a40, 0x0003 },
++			{ 0x1a7c, 0x0003 },
+ 			{ 0x3b4c, 0x0003 },
+ 			{ 0x5a64, 0x0003 },
+ 		},
+-- 
+2.34.1
+

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0066-arm64-dts-allwinner-h6-Fix-Cedrus-IOMMU-again.patch

@@ -0,0 +1,26 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@gmail.com>
+Date: Wed, 12 Oct 2022 23:01:04 +0200
+Subject: [PATCH] arm64: dts: allwinner: h6: Fix Cedrus IOMMU, again
+
+Cedrus actually uses two IOMMU channels. Add the second one.
+
+Fixes: 62a8ccf3a248 ("arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage")
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+index e897559d9a89..436cc2a02d1a 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -172,7 +172,7 @@ video-codec@1c0e000 {
+ 			resets = <&ccu RST_BUS_VE>;
+ 			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+ 			allwinner,sram = <&ve_sram 1>;
+-			iommus = <&iommu 3>;
++			iommus = <&iommu 1>, <&iommu 3>;
+ 		};
+ 
+ 		gpu: gpu@1800000 {

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0073-iommu-sun50i-Allow-page-sizes-multiple-of-4096.patch

@@ -0,0 +1,107 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@gmail.com>
+Date: Fri, 14 Oct 2022 20:15:43 +0200
+Subject: [PATCH] iommu/sun50i: Allow page sizes multiple of 4096
+
+While peripheral supports only 4K page sizes, we can easily emulate
+support for bigger page sizes, up to 1M. This is done by making multiple
+entries in map function or clearing multiple entries in unmap.
+
+This considerably lowers overhead.
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ drivers/iommu/sun50i-iommu.c | 44 +++++++++++++++++++++---------------
+ 1 file changed, 26 insertions(+), 18 deletions(-)
+
+diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c
+index d7c5e9b1a087..9944266c4f58 100644
+--- a/drivers/iommu/sun50i-iommu.c
++++ b/drivers/iommu/sun50i-iommu.c
+@@ -593,10 +593,12 @@ static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova,
+ {
+ 	struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
+ 	struct sun50i_iommu *iommu = sun50i_domain->iommu;
+-	u32 pte_index;
++	u32 pte_index, pages, i;
+ 	u32 *page_table, *pte_addr;
+ 	int ret = 0;
+ 
++	pages = size / SPAGE_SIZE;
++
+ 	page_table = sun50i_dte_get_page_table(sun50i_domain, iova, gfp);
+ 	if (IS_ERR(page_table)) {
+ 		ret = PTR_ERR(page_table);
+@@ -604,18 +606,21 @@ static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova,
+ 	}
+ 
+ 	pte_index = sun50i_iova_get_pte_index(iova);
+-	pte_addr = &page_table[pte_index];
+-	if (unlikely(sun50i_pte_is_page_valid(*pte_addr))) {
+-		phys_addr_t page_phys = sun50i_pte_get_page_address(*pte_addr);
+-		dev_err(iommu->dev,
+-			"iova %pad already mapped to %pa cannot remap to %pa prot: %#x\n",
+-			&iova, &page_phys, &paddr, prot);
+-		ret = -EBUSY;
+-		goto out;
++	for (i = 0; i < pages; i++) {
++		pte_addr = &page_table[pte_index + i];
++		if (unlikely(sun50i_pte_is_page_valid(*pte_addr))) {
++			phys_addr_t page_phys = sun50i_pte_get_page_address(*pte_addr);
++			dev_err(iommu->dev,
++				"iova %pad already mapped to %pa cannot remap to %pa prot: %#x\n",
++				&iova, &page_phys, &paddr, prot);
++			ret = -EBUSY;
++			goto out;
++		}
++		*pte_addr = sun50i_mk_pte(paddr, prot);
++		paddr += SPAGE_SIZE;
+ 	}
+ 
+-	*pte_addr = sun50i_mk_pte(paddr, prot);
+-	sun50i_table_flush(sun50i_domain, pte_addr, 1);
++	sun50i_table_flush(sun50i_domain, &page_table[pte_index], pages);
+ 
+ out:
+ 	return ret;
+@@ -626,8 +631,10 @@ static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova
+ {
+ 	struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
+ 	phys_addr_t pt_phys;
++	u32 dte, pages, i;
+ 	u32 *pte_addr;
+-	u32 dte;
++
++	pages = size / SPAGE_SIZE;
+ 
+ 	dte = sun50i_domain->dt[sun50i_iova_get_dte_index(iova)];
+ 	if (!sun50i_dte_is_pt_valid(dte))
+@@ -636,13 +643,14 @@ static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova
+ 	pt_phys = sun50i_dte_get_pt_address(dte);
+ 	pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova);
+ 
+-	if (!sun50i_pte_is_page_valid(*pte_addr))
+-		return 0;
++	for (i = 0; i < pages; i++)
++		if (!sun50i_pte_is_page_valid(pte_addr[i]))
++			return 0;
+ 
+-	memset(pte_addr, 0, sizeof(*pte_addr));
+-	sun50i_table_flush(sun50i_domain, pte_addr, 1);
++	memset(pte_addr, 0, sizeof(*pte_addr) * pages);
++	sun50i_table_flush(sun50i_domain, pte_addr, pages);
+ 
+-	return SZ_4K;
++	return size;
+ }
+ 
+ static phys_addr_t sun50i_iommu_iova_to_phys(struct iommu_domain *domain,
+@@ -828,7 +836,7 @@ static int sun50i_iommu_of_xlate(struct device *dev,
+ }
+ 
+ static const struct iommu_ops sun50i_iommu_ops = {
+-	.pgsize_bitmap	= SZ_4K,
++	.pgsize_bitmap	= 0x1ff000,
+ 	.device_group	= sun50i_iommu_device_group,
+ 	.domain_alloc	= sun50i_iommu_domain_alloc,
+ 	.of_xlate	= sun50i_iommu_of_xlate,

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/0077-OrangePi-3-LTS-support.patch

@@ -0,0 +1,393 @@
+From 20d3d43d9daa82d5fa1e937e17b975974572d189 Mon Sep 17 00:00:00 2001
+From: Juliano Dorigão <jdorigao@gmail.com>
+Date: Fri, 3 Mar 2023 16:12:03 -0400
+Subject: [PATCH] OrangePi 3 LTS support
+
+---
+ arch/arm64/boot/dts/allwinner/Makefile        |   1 +
+ .../allwinner/sun50i-h6-orangepi-3-lts.dts    | 361 ++++++++++++++++++
+ 2 files changed, 362 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
+
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+index 6a96494a2..ace8159a6 100644
+--- a/arch/arm64/boot/dts/allwinner/Makefile
++++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3.dtb
++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3-lts.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
+new file mode 100644
+index 000000000..67f38b8a1
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
+@@ -0,0 +1,361 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++// Copyright (C) 2023 Jernej Skrabec <jernej.skrabec@gmail.com>
++// Based on sun50i-h6-orangepi-3.dts, which is:
++// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
++
++/dts-v1/;
++
++#include "sun50i-h6.dtsi"
++#include "sun50i-h6-cpu-opp.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++	model = "OrangePi 3 LTS";
++	compatible = "xunlong,orangepi-3-lts", "allwinner,sun50i-h6";
++
++	aliases {
++		ethernet0 = &emac;
++		serial0 = &uart0;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	connector {
++		compatible = "hdmi-connector";
++		ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
++		type = "a";
++
++		port {
++			hdmi_con_in: endpoint {
++				remote-endpoint = <&hdmi_out_con>;
++			};
++		};
++	};
++
++	ext_osc32k: ext_osc32k_clk {
++		#clock-cells = <0>;
++		compatible = "fixed-clock";
++		clock-frequency = <32768>;
++		clock-output-names = "ext_osc32k";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		led-0 {
++			label = "orangepi:red:power";
++			gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
++		};
++
++		led-1 {
++			label = "orangepi:green:status";
++			gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
++			default-state = "on";
++		};
++	};
++
++	reg_vcc5v: vcc5v {
++		/* board wide 5V supply directly from the DC jack */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-5v";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		regulator-always-on;
++	};
++
++	reg_gmac_3v3: gmac-3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "gmac-3v3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		startup-delay-us = <150000>;
++		enable-active-high;
++		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
++	};
++
++	reg_vcc33_wifi: vcc33-wifi {
++		/* Always on 3.3V regulator for WiFi and BT */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc33-wifi";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		enable-active-high;
++		gpio = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
++	};
++
++	reg_vcc_wifi_io: vcc-wifi-io {
++		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-wifi-io";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		regulator-always-on;
++		vin-supply = <&reg_vcc33_wifi>;
++	};
++
++	wifi_pwrseq: wifi-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rtc 1>;
++		clock-names = "ext_clock";
++		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
++		post-power-on-delay-ms = <200>;
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdca>;
++};
++
++&de {
++	status = "okay";
++};
++
++&dwc3 {
++	status = "okay";
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ehci3 {
++	status = "okay";
++};
++
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&ext_rgmii_pins>;
++	phy-mode = "rgmii";
++	phy-handle = <&ext_rgmii_phy>;
++	phy-supply = <&reg_gmac_3v3>;
++	allwinner,rx-delay-ps = <1500>;
++	allwinner,tx-delay-ps = <700>;
++	status = "okay";
++};
++
++&gpu {
++	mali-supply = <&reg_dcdcc>;
++	status = "okay";
++};
++
++&hdmi {
++	hvcc-supply = <&reg_bldo2>;
++	status = "okay";
++};
++
++&hdmi_out {
++	hdmi_out_con: endpoint {
++		remote-endpoint = <&hdmi_con_in>;
++	};
++};
++
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++
++		reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
++		reset-assert-us = <15000>;
++		reset-deassert-us = <40000>;
++	};
++};
++
++&mmc0 {
++	vmmc-supply = <&reg_cldo1>;
++	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
++	bus-width = <4>;
++	status = "okay";
++};
++
++&mmc1 {
++	vmmc-supply = <&reg_vcc33_wifi>;
++	vqmmc-supply = <&reg_vcc_wifi_io>;
++	mmc-pwrseq = <&wifi_pwrseq>;
++	bus-width = <4>;
++	non-removable;
++	status = "okay";
++};
++
++&mmc2 {
++	vmmc-supply = <&reg_cldo1>;
++	vqmmc-supply = <&reg_bldo2>;
++	cap-mmc-hw-reset;
++	non-removable;
++	bus-width = <8>;
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&ohci3 {
++	status = "okay";
++};
++
++&pio {
++	vcc-pc-supply = <&reg_bldo2>;
++	vcc-pd-supply = <&reg_cldo1>;
++	vcc-pg-supply = <&reg_bldo3>;
++};
++
++&r_ir {
++	status = "okay";
++};
++
++&r_rsb {
++	clock-frequency = <100000>;
++	status = "okay";
++
++	axp805: pmic@745 {
++		compatible = "x-powers,axp805", "x-powers,axp806";
++		reg = <0x745>;
++		interrupt-parent = <&r_intc>;
++		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
++		interrupt-controller;
++		#interrupt-cells = <1>;
++		x-powers,self-working-mode;
++		vina-supply = <&reg_vcc5v>;
++		vinb-supply = <&reg_vcc5v>;
++		vinc-supply = <&reg_vcc5v>;
++		vind-supply = <&reg_vcc5v>;
++		vine-supply = <&reg_vcc5v>;
++		aldoin-supply = <&reg_vcc5v>;
++		bldoin-supply = <&reg_vcc5v>;
++		cldoin-supply = <&reg_vcc5v>;
++
++		regulators {
++			reg_aldo1: aldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc-pl-led-ir";
++			};
++
++			reg_aldo2: aldo2 {
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc33-audio-tv-ephy-mac";
++			};
++
++			/* ALDO3 is shorted to CLDO1 */
++			reg_aldo3: aldo3 {
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
++			};
++
++			reg_bldo1: bldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc18-dram-bias-pll";
++			};
++
++			reg_bldo2: bldo2 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc-efuse-pcie-hdmi-pc";
++			};
++
++			reg_bldo3: bldo3 {
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc-pm-pg-dcxoio-wifi";
++			};
++
++			bldo4 {
++				/* unused */
++			};
++
++			reg_cldo1: cldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
++			};
++
++			cldo2 {
++				/* unused */
++			};
++
++			cldo3 {
++				/* unused */
++			};
++
++			reg_dcdca: dcdca {
++				regulator-always-on;
++				regulator-min-microvolt = <800000>;
++				regulator-max-microvolt = <1160000>;
++				regulator-ramp-delay = <2500>;
++				regulator-name = "vdd-cpu";
++			};
++
++			reg_dcdcc: dcdcc {
++				regulator-enable-ramp-delay = <32000>;
++				regulator-min-microvolt = <810000>;
++				regulator-max-microvolt = <1080000>;
++				regulator-ramp-delay = <2500>;
++				regulator-name = "vdd-gpu";
++			};
++
++			reg_dcdcd: dcdcd {
++				regulator-always-on;
++				regulator-min-microvolt = <980000>;
++				regulator-max-microvolt = <980000>;
++				regulator-name = "vdd-sys";
++			};
++
++			reg_dcdce: dcdce {
++				regulator-always-on;
++				regulator-min-microvolt = <1200000>;
++				regulator-max-microvolt = <1200000>;
++				regulator-name = "vcc-dram";
++			};
++
++			sw {
++				/* unused */
++			};
++		};
++	};
++};
++
++&pwm {
++	status = "okay";
++};
++
++&r_ir {
++	status = "okay";
++};
++
++&rtc {
++	clocks = <&ext_osc32k>;
++};
++
++/delete-node/ &spi0;
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_ph_pins>;
++	status = "okay";
++};
++
++&usb2otg {
++	dr_mode = "host";
++	status = "okay";
++};
++
++&usb2phy {
++	usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
++	usb0_vbus-supply = <&reg_vcc5v>;
++	usb3_vbus-supply = <&reg_vcc5v>;
++	status = "okay";
++};
++
++&usb3phy {
++	status = "okay";
++};
+-- 
+2.39.2
+

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/1004-orange-pi-3-lts-wifi-bt.patch

@@ -0,0 +1,28 @@
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts	2023-07-08 22:25:33.117853247 +0200
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts	2023-07-08 22:26:25.418940556 +0200
+@@ -103,6 +103,25 @@
+ 		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
+ 		post-power-on-delay-ms = <200>;
+ 	};
++
++	sunxi-info {
++		compatible = "allwinner,sun50i-h6-sys-info";
++		status = "okay";
++	};
++
++	addr_mgt: addr-mgt {
++		compatible = "allwinner,sunxi-addr_mgt";
++		type_addr_wifi = <0x2>;
++		type_addr_bt = <0x2>;
++		type_addr_eth = <0x2>;
++		status = "okay";
++	};
++
++	dump_reg: dump_reg@20000 {
++		compatible = "allwinner,sunxi-dump-reg";
++		reg = <0x0 0x03001000 0x0 0x0f20>;
++		status = "okay";
++	};
+ };
+ 
+ &cpu0 {

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/2000-arm64-dts-allwinner-Enforce-consistent-MMC-numbering.patch

@@ -0,0 +1,67 @@
+From ba3b30a80ac2c388d48c58fbee242466d51fbfd8 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sun, 6 Dec 2020 11:15:34 -0600
+Subject: [PATCH 177/389] arm64: dts: allwinner: Enforce consistent MMC
+ numbering
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 ++++++
+ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi  | 6 ++++++
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  | 6 ++++++
+ 3 files changed, 18 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+index 77b5349f6087..9e0e17179839 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -18,6 +18,12 @@ / {
+ 	#address-cells = <1>;
+ 	#size-cells = <1>;
+ 
++	aliases {
++		mmc0 = &mmc0;
++		mmc1 = &mmc1;
++		mmc2 = &mmc2;
++	};
++
+ 	chosen {
+ 		#address-cells = <1>;
+ 		#size-cells = <1>;
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+index a56fae761a1f..2159fa336d75 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+@@ -6,6 +6,12 @@
+ #include <dt-bindings/thermal/thermal.h>
+ 
+ / {
++	aliases {
++		mmc0 = &mmc0;
++		mmc1 = &mmc1;
++		mmc2 = &mmc2;
++	};
++
+ 	cpus {
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+index ca1d287a0a01..3feac99556f3 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -17,6 +17,12 @@ / {
+ 	#address-cells = <1>;
+ 	#size-cells = <1>;
+ 
++	aliases {
++		mmc0 = &mmc0;
++		mmc1 = &mmc1;
++		mmc2 = &mmc2;
++	};
++
+ 	cpus {
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+-- 
+2.35.3
+

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-3lts/orangepi-3lts.cfg

@@ -0,0 +1,4 @@
+CONFIG_SPARD_WLAN_SUPPORT=y
+CONFIG_NVMEM_SUNXI_SID=y
+CONFIG_INIT_STACK_NONE=y
+CONFIG_PHY_SUN50I_USB3=y

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-zero2/0003-drv-fix-incldue-path-for-unisocwcn.patch

@@ -1,6 +1,6 @@
-From bb564341bb6c64003abbf24fd5d5ef254060b040 Mon Sep 17 00:00:00 2001
-From: Patryk Biel <patryk.biel.external@trumpf.com>
-Date: Thu, 19 Jan 2023 10:46:28 +0100
+From 5138d597275fd503573fac84018186bd18740644 Mon Sep 17 00:00:00 2001
+From: pbiel <pbiel7@gmail.com>
+Date: Thu, 30 Mar 2023 22:45:33 +0200
 Subject: [PATCH] Fix incldue path for unisocwcn
 
 ---
@@ -24,13 +24,13 @@ index 313ea5123..e9a398584 100644
  export UNISOC_BSP_INCLUDE
  
 diff --git a/drivers/net/wireless/uwe5622/unisocwcn/Makefile b/drivers/net/wireless/uwe5622/unisocwcn/Makefile
-index b62652f63..ae6e1e25a 100644
+index f9c595747..1ad490594 100644
 --- a/drivers/net/wireless/uwe5622/unisocwcn/Makefile
 +++ b/drivers/net/wireless/uwe5622/unisocwcn/Makefile
-@@ -119,9 +119,9 @@ ccflags-y += -DCONFIG_WCN_UTILS
+@@ -129,9 +129,9 @@ ccflags-y += -DCONFIG_WCN_BOOT
+ ccflags-y += -DCONFIG_WCN_UTILS
  
  #### include path ######
- ccflags-y += -I$(src)/../tty-sdio
 -ccflags-y += -I$(src)/include/
 -ccflags-y += -I$(src)/platform/
 -ccflags-y += -I$(src)/platform/rf/

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-zero2/0004-drv-wireless-adapt-uwe5622-wifi-driver-to-kernel-6.1.patch

@@ -0,0 +1,177 @@
+From 5f4d2d5fc32dfe41c73cac36ec6747c34e5562a3 Mon Sep 17 00:00:00 2001
+From: pbiel <pbiel7@gmail.com>
+Date: Wed, 15 Mar 2023 23:04:27 +0100
+Subject: [PATCH] wireless: Adapt uwe5622 wifi driver to kernel 6.1
+
+---
+ drivers/net/wireless/uwe5622/tty-sdio/lpm.c            |  2 +-
+ .../uwe5622/unisocwcn/boot/wcn_integrate_dev.c         |  2 +-
+ .../uwe5622/unisocwcn/platform/wcn_parn_parser.c       |  2 +-
+ .../wireless/uwe5622/unisocwcn/platform/wcn_procfs.c   |  2 +-
+ .../wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c  |  2 +-
+ .../net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c  |  6 +++---
+ drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c     | 10 +++++-----
+ drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c       |  2 +-
+ 8 files changed, 14 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/net/wireless/uwe5622/tty-sdio/lpm.c b/drivers/net/wireless/uwe5622/tty-sdio/lpm.c
+index b2d9a8994e5e..35e30651a921 100644
+--- a/drivers/net/wireless/uwe5622/tty-sdio/lpm.c
++++ b/drivers/net/wireless/uwe5622/tty-sdio/lpm.c
+@@ -70,7 +70,7 @@ static int btwrite_proc_show(struct seq_file *m, void *v)
+ 
+ static int bluesleep_open_proc_btwrite(struct inode *inode, struct file *file)
+ {
+-	return single_open(file, btwrite_proc_show, PDE_DATA(inode));
++	return single_open(file, btwrite_proc_show, pde_data(inode));
+ }
+ 
+ static const struct proc_ops lpm_proc_btwrite_fops = {
+diff --git a/drivers/net/wireless/uwe5622/unisocwcn/boot/wcn_integrate_dev.c b/drivers/net/wireless/uwe5622/unisocwcn/boot/wcn_integrate_dev.c
+index 3ee6910e7cf7..29a3ec298bc1 100644
+--- a/drivers/net/wireless/uwe5622/unisocwcn/boot/wcn_integrate_dev.c
++++ b/drivers/net/wireless/uwe5622/unisocwcn/boot/wcn_integrate_dev.c
+@@ -562,7 +562,7 @@ static struct wcn_proc_data g_proc_data = {
+ static int wcn_platform_open(struct inode *inode, struct file *filp)
+ {
+ 	struct platform_proc_file_entry
+-	*entry = (struct platform_proc_file_entry *)PDE_DATA(inode);
++	*entry = (struct platform_proc_file_entry *)pde_data(inode);
+ 
+ 	WCN_INFO("entry name:%s\n!", entry->name);
+ 
+diff --git a/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_parn_parser.c b/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_parn_parser.c
+index aea7d6d0fe57..bd841f0b32d3 100644
+--- a/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_parn_parser.c
++++ b/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_parn_parser.c
+@@ -146,7 +146,7 @@ static int prefixcmp(const char *str, const char *prefix)
+ }
+ 
+ #if KERNEL_VERSION(3, 19, 0) <= LINUX_VERSION_CODE
+-static int find_callback(struct dir_context *ctx, const char *name, int namlen,
++static bool find_callback(struct dir_context *ctx, const char *name, int namlen,
+ 		     loff_t offset, u64 ino, unsigned int d_type)
+ #else
+ static int find_callback(void *ctx, const char *name, int namlen,
+diff --git a/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_procfs.c b/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_procfs.c
+index 2edb7903d80e..9e453365bba8 100644
+--- a/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_procfs.c
++++ b/drivers/net/wireless/uwe5622/unisocwcn/platform/wcn_procfs.c
+@@ -431,7 +431,7 @@ static const struct proc_ops mdbg_snap_shoot_seq_fops = {
+ static int mdbg_proc_open(struct inode *inode, struct file *filp)
+ {
+ 	struct mdbg_proc_entry *entry =
+-		(struct mdbg_proc_entry *)PDE_DATA(inode);
++		(struct mdbg_proc_entry *)pde_data(inode);
+ 	filp->private_data = entry;
+ 
+ 	return 0;
+diff --git a/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c b/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c
+index 8f228d403909..750bfc0466cb 100644
+--- a/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c
++++ b/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_download.c
+@@ -82,7 +82,7 @@ static int wcn_usb_dopen(struct inode *inode, struct file *file)
+ {
+ 	struct wcn_usb_ddata *data;
+ 
+-	data = (struct wcn_usb_ddata *)PDE_DATA(inode);
++	data = (struct wcn_usb_ddata *)pde_data(inode);
+ 
+ 	if (!data)
+ 		return -EIO;
+diff --git a/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c b/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c
+index c2cccc658c0d..e7a9f258943e 100644
+--- a/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c
++++ b/drivers/net/wireless/uwe5622/unisocwcn/usb/wcn_usb_test.c
+@@ -61,7 +61,7 @@ static int wcn_usb_channel_open(struct inode *inode, struct file *file)
+ {
+ 	struct channel *channel;
+ 
+-	channel = (struct channel *)PDE_DATA(inode);
++	channel = (struct channel *)pde_data(inode);
+ 
+ 	if (!channel)
+ 		return -EIO;
+@@ -467,7 +467,7 @@ static int wcn_usb_chnmg_open(struct inode *inode, struct file *file)
+ {
+ 	struct chnmg *chnmg;
+ 	/* get channel_list head */
+-	chnmg = (struct chnmg *)PDE_DATA(inode);
++	chnmg = (struct chnmg *)pde_data(inode);
+ 
+ 	file->private_data = chnmg;
+ 	return 0;
+@@ -916,7 +916,7 @@ static int print_level_open(struct inode *inode, struct file *file)
+ {
+ 	struct chnmg *chnmg;
+ 	/* get channel_list head */
+-	chnmg = (struct chnmg *)PDE_DATA(inode);
++	chnmg = (struct chnmg *)pde_data(inode);
+ 
+ 	file->private_data = chnmg;
+ 	return 0;
+diff --git a/drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c b/drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c
+index daef880ae3c0..2231388da70a 100644
+--- a/drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c
++++ b/drivers/net/wireless/uwe5622/unisocwifi/cfg80211.c
+@@ -703,7 +703,7 @@ static int sprdwl_add_cipher_key(struct sprdwl_vif *vif, bool pairwise,
+ }
+ 
+ static int sprdwl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
+-				   u8 key_index, bool pairwise,
++				   int link_id, u8 key_index, bool pairwise,
+ 				   const u8 *mac_addr,
+ 				   struct key_params *params)
+ {
+@@ -725,7 +725,7 @@ static int sprdwl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
+ }
+ 
+ static int sprdwl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *ndev,
+-				   u8 key_index, bool pairwise,
++				   int link_id, u8 key_index, bool pairwise,
+ 				   const u8 *mac_addr)
+ {
+ 	struct sprdwl_vif *vif = netdev_priv(ndev);
+@@ -755,7 +755,7 @@ static int sprdwl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *ndev,
+ 
+ static int sprdwl_cfg80211_set_default_key(struct wiphy *wiphy,
+ 					   struct net_device *ndev,
+-					   u8 key_index, bool unicast,
++					   int link_id, u8 key_index, bool unicast,
+ 					   bool multicast)
+ {
+ 	struct sprdwl_vif *vif = netdev_priv(ndev);
+@@ -984,7 +984,7 @@ static int sprdwl_cfg80211_change_beacon(struct wiphy *wiphy,
+ 	return sprdwl_change_beacon(vif, beacon);
+ }
+ 
+-static int sprdwl_cfg80211_stop_ap(struct wiphy *wiphy, struct net_device *ndev)
++static int sprdwl_cfg80211_stop_ap(struct wiphy *wiphy, struct net_device *ndev, unsigned int link_id)
+ {
+ #ifdef DFS_MASTER
+ 	struct sprdwl_vif *vif = netdev_priv(ndev);
+@@ -2367,7 +2367,7 @@ void sprdwl_report_connection(struct sprdwl_vif *vif,
+ 		 conn_info->status == SPRDWL_ROAM_SUCCESS){
+ #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0)
+ 		struct cfg80211_roam_info roam_info = {
+-			.bss = bss,
++			.links[0].bss = bss,
+ 			.req_ie = conn_info->req_ie,
+ 			.req_ie_len = conn_info->req_ie_len,
+ 			.resp_ie = conn_info->resp_ie,
+diff --git a/drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c b/drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c
+index e81619b12e39..1ecbfac5b490 100644
+--- a/drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c
++++ b/drivers/net/wireless/uwe5622/unisocwifi/cmdevt.c
+@@ -3296,7 +3296,7 @@ void sprdwl_event_chan_changed(struct sprdwl_vif *vif, u8 *data, u16 len)
+ 						NL80211_CHAN_HT20);
+ 		else
+ 			wl_err("%s, ch is null!\n", __func__);
+-		cfg80211_ch_switch_notify(vif->ndev, &chandef);
++		cfg80211_ch_switch_notify(vif->ndev, &chandef, 0);
+ 	}
+ }
+ 
+-- 
+2.34.1
+

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-zero2/0005-drv-fix-setting-mac-address-for-netdev-in-uwe5622.patch

@@ -0,0 +1,35 @@
+From 9211a92d07e9a43fce104f87f9d45e890257b699 Mon Sep 17 00:00:00 2001
+From: pbiel <pbiel7@gmail.com>
+Date: Tue, 7 Mar 2023 20:28:44 +0100
+Subject: [PATCH] wireless: fix setting mac address for netdev in uwe5622
+ unisocwifi driver
+
+---
+ drivers/net/wireless/uwe5622/unisocwifi/main.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/net/wireless/uwe5622/unisocwifi/main.c b/drivers/net/wireless/uwe5622/unisocwifi/main.c
+index 21efdf4e0..566a9a7f3 100644
+--- a/drivers/net/wireless/uwe5622/unisocwifi/main.c
++++ b/drivers/net/wireless/uwe5622/unisocwifi/main.c
+@@ -1356,6 +1356,7 @@ static struct sprdwl_vif *sprdwl_register_netdev(struct sprdwl_priv *priv,
+ 	struct wireless_dev *wdev;
+ 	struct sprdwl_vif *vif;
+ 	int ret;
++	u8 target_mac_addr[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
+ 
+ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 17, 0))
+ 	ndev = alloc_netdev(sizeof(*vif), name, NET_NAME_UNKNOWN, ether_setup);
+@@ -1411,7 +1412,8 @@ static struct sprdwl_vif *sprdwl_register_netdev(struct sprdwl_priv *priv,
+ 	ndev->features |= NETIF_F_SG;
+ 	SET_NETDEV_DEV(ndev, wiphy_dev(priv->wiphy));
+ 
+-	sprdwl_set_mac_addr(vif, addr, ndev->dev_addr);
++	sprdwl_set_mac_addr(vif, addr, target_mac_addr);
++	dev_addr_set(ndev, target_mac_addr);
+ 
+ #ifdef CONFIG_P2P_INTF
+ 	if (type == NL80211_IFTYPE_P2P_DEVICE)
+-- 
+2.34.1
+

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-zero2/0008-drv-add-sunxi-addr-driver.patch

@@ -1,8 +1,7 @@
-From 29cfa9437eaa2ff862ab0f06852383b181b60743 Mon Sep 17 00:00:00 2001
-From: afaulkner420 <afaulkner420@gmail.com>
-Date: Fri, 25 Mar 2022 20:18:18 +0000
-Subject: [PATCH 04/11] Add sunxi-addr driver - Used to fix uwe5622 bluetooth
- MAC addresses
+From 418436514e2e64e07e7fd2ef9d77ec4712d1033b Mon Sep 17 00:00:00 2001
+From: pbiel <pbiel7@gmail.com>
+Date: Fri, 24 Feb 2023 10:38:03 +0100
+Subject: [PATCH 2/2] Add sunxi addr driver
 
 ---
  drivers/misc/Kconfig                 |   1 +
@@ -18,23 +17,23 @@ Subject: [PATCH 04/11] Add sunxi-addr driver - Used to fix uwe5622 bluetooth
  create mode 100644 drivers/misc/sunxi-addr/sunxi-addr.c
 
 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
-index 24cb809ae..52843042f 100644
+index 358ad56f6..c59480dc8 100644
 --- a/drivers/misc/Kconfig
 +++ b/drivers/misc/Kconfig
-@@ -494,4 +494,5 @@ source "drivers/misc/cardreader/Kconfig"
- source "drivers/misc/habanalabs/Kconfig"
+@@ -514,4 +514,5 @@ source "drivers/misc/habanalabs/Kconfig"
  source "drivers/misc/uacce/Kconfig"
  source "drivers/misc/pvpanic/Kconfig"
+ source "drivers/misc/mchp_pci1xxxx/Kconfig"
 +source "drivers/misc/sunxi-addr/Kconfig"
  endmenu
 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
-index f3eaa577a..0f9280509 100644
+index ac9b3e757..487a2bf2d 100644
 --- a/drivers/misc/Makefile
 +++ b/drivers/misc/Makefile
-@@ -60,3 +60,4 @@ obj-$(CONFIG_XILINX_SDFEC)	+= xilinx_sdfec.o
- obj-$(CONFIG_HISI_HIKEY_USB)	+= hisi_hikey_usb.o
- obj-$(CONFIG_HI6421V600_IRQ)	+= hi6421v600-irq.o
- obj-$(CONFIG_MODEM_POWER)	+= modem-power.o
+@@ -62,3 +62,4 @@ obj-$(CONFIG_HI6421V600_IRQ)	+= hi6421v600-irq.o
+ obj-$(CONFIG_OPEN_DICE)		+= open-dice.o
+ obj-$(CONFIG_GP_PCI1XXXX)	+= mchp_pci1xxxx/
+ obj-$(CONFIG_VCPU_STALL_DETECTOR)	+= vcpu_stall_detector.o
 +obj-$(CONFIG_SUNXI_ADDR_MGT)    += sunxi-addr/
 \ No newline at end of file
 diff --git a/drivers/misc/sunxi-addr/Kconfig b/drivers/misc/sunxi-addr/Kconfig
@@ -609,5 +608,5 @@ index 000000000..a812e4e82
 +MODULE_DESCRIPTION("Network MAC Addess Manager");
 +MODULE_LICENSE("GPL");
 -- 
-2.25.1
+2.34.1
 

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-zero2/0009-dts-add-addr_mgt-device-tree-node.patch

@@ -1,5 +1,5 @@
 From 706dc6ed092e4a1b9d84893cb4186fbd354bb1c8 Mon Sep 17 00:00:00 2001
-From: Patryk Biel <patryk.biel.external@trumpf.com>
+From: pbiel <pbiel7@gmail.com>
 Date: Thu, 26 Jan 2023 09:51:22 +0100
 Subject: [PATCH] Add addr_mgt device tree node
 

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-zero2/0010-dts-add-wifi-power-regulator.patch

@@ -0,0 +1,70 @@
+From 899da8366afd97b1ca59b632036dc313777026da Mon Sep 17 00:00:00 2001
+From: pbiel <pbiel7@gmail.com>
+Date: Fri, 24 Feb 2023 22:14:58 +0100
+Subject: [PATCH] Add wifi power regulator
+
+---
+ .../allwinner/sun50i-h616-orangepi-zero2.dts  | 47 +++++++++++++++++++
+ 1 file changed, 47 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+index 02893f3ac..88234a139 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+@@ -49,6 +49,53 @@ reg_vcc5v: vcc5v {
+ 		regulator-max-microvolt = <5000000>;
+ 		regulator-always-on;
+ 	};
++
++	reg_vcc33_wifi: vcc33-wifi {
++		/* Always on 3.3V regulator for WiFi and BT */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc33-wifi";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++		vin-supply = <&reg_vcc5v>;
++	};
++
++	reg_vcc_wifi_io: vcc-wifi-io {
++		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-wifi-io";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		regulator-always-on;
++		vin-supply = <&reg_vcc33_wifi>;
++	};
++
++	wifi_pwrseq: wifi-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rtc 1>;
++		clock-names = "osc32k-out";
++		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
++		post-power-on-delay-ms = <200>;
++	};
++};
++
++&mmc1 {
++	vmmc-supply = <&reg_vcc33_wifi>;
++	vqmmc-supply = <&reg_vcc_wifi_io>;
++	mmc-pwrseq = <&wifi_pwrseq>;
++	bus-width = <4>;
++	non-removable;
++	mmc-ddr-1_8v;
++	status = "okay";
++	uwe-bsp {
++		compatible = "unisoc,uwe_bsp";
++		keep-power-on;
++		data-irq;
++		//adma-tx;
++		adma-rx;
++		//blksz-512;
++		status = "okay";
++	};
+ };
+ 
+ &emac0 {
+-- 
+2.34.1
+

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-zero2/0011-dts-add-usb-to-h616.patch

@@ -0,0 +1,184 @@
+From ab35c98369d50766eb20920a93a2dca927935481 Mon Sep 17 00:00:00 2001
+From: OpenEmbedded <oe.patch@oe>
+Date: Fri, 19 May 2023 23:01:14 +0200
+Subject: [PATCH] Add usb support to h616. This is not needed from kernel 6.2
+
+Signed-off-by: OpenEmbedded <oe.patch@oe>
+---
+ .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 160 ++++++++++++++++++
+ 1 file changed, 160 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 04cdec7e2..a1d872e74 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -504,6 +504,166 @@ mdio0: mdio {
+ 			};
+ 		};
+ 
++		usbotg: usb@5100000 {
++			compatible = "allwinner,sun50i-h616-musb",
++				     "allwinner,sun8i-h3-musb";
++			reg = <0x05100000 0x0400>;
++			clocks = <&ccu CLK_BUS_OTG>;
++			resets = <&ccu RST_BUS_OTG>;
++			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "mc";
++			phys = <&usbphy 0>;
++			phy-names = "usb";
++			extcon = <&usbphy 0>;
++			status = "disabled";
++		};
++
++		usbphy: phy@5100400 {
++			compatible = "allwinner,sun50i-h616-usb-phy";
++			reg = <0x05100400 0x24>,
++			      <0x05101800 0x14>,
++			      <0x05200800 0x14>,
++			      <0x05310800 0x14>,
++			      <0x05311800 0x14>;
++			reg-names = "phy_ctrl",
++				    "pmu0",
++				    "pmu1",
++				    "pmu2",
++				    "pmu3";
++			clocks = <&ccu CLK_USB_PHY0>,
++				 <&ccu CLK_USB_PHY1>,
++				 <&ccu CLK_USB_PHY2>,
++				 <&ccu CLK_USB_PHY3>,
++				 <&ccu CLK_BUS_EHCI2>;
++			clock-names = "usb0_phy",
++				      "usb1_phy",
++				      "usb2_phy",
++				      "usb3_phy",
++				      "pmu2_clk";
++			resets = <&ccu RST_USB_PHY0>,
++				 <&ccu RST_USB_PHY1>,
++				 <&ccu RST_USB_PHY2>,
++				 <&ccu RST_USB_PHY3>;
++			reset-names = "usb0_reset",
++				      "usb1_reset",
++				      "usb2_reset",
++				      "usb3_reset";
++			status = "disabled";
++			#phy-cells = <1>;
++		};
++
++		ehci0: usb@5101000 {
++			compatible = "allwinner,sun50i-h616-ehci",
++				     "generic-ehci";
++			reg = <0x05101000 0x100>;
++			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_OHCI0>,
++				 <&ccu CLK_BUS_EHCI0>,
++				 <&ccu CLK_USB_OHCI0>;
++			resets = <&ccu RST_BUS_OHCI0>,
++				 <&ccu RST_BUS_EHCI0>;
++			phys = <&usbphy 0>;
++			phy-names = "usb";
++			status = "disabled";
++		};
++
++		ohci0: usb@5101400 {
++			compatible = "allwinner,sun50i-h616-ohci",
++				     "generic-ohci";
++			reg = <0x05101400 0x100>;
++			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_OHCI0>,
++				 <&ccu CLK_USB_OHCI0>;
++			resets = <&ccu RST_BUS_OHCI0>;
++			phys = <&usbphy 0>;
++			phy-names = "usb";
++			status = "disabled";
++		};
++
++		ehci1: usb@5200000 {
++			compatible = "allwinner,sun50i-h616-ehci",
++				     "generic-ehci";
++			reg = <0x05200000 0x100>;
++			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_OHCI1>,
++				 <&ccu CLK_BUS_EHCI1>,
++				 <&ccu CLK_USB_OHCI1>;
++			resets = <&ccu RST_BUS_OHCI1>,
++				 <&ccu RST_BUS_EHCI1>;
++			phys = <&usbphy 1>;
++			phy-names = "usb";
++			status = "disabled";
++		};
++
++		ohci1: usb@5200400 {
++			compatible = "allwinner,sun50i-h616-ohci",
++				     "generic-ohci";
++			reg = <0x05200400 0x100>;
++			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_OHCI1>,
++				 <&ccu CLK_USB_OHCI1>;
++			resets = <&ccu RST_BUS_OHCI1>;
++			phys = <&usbphy 1>;
++			phy-names = "usb";
++			status = "disabled";
++		};
++
++		ehci2: usb@5310000 {
++			compatible = "allwinner,sun50i-h616-ehci",
++				     "generic-ehci";
++			reg = <0x05310000 0x100>;
++			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_OHCI2>,
++				 <&ccu CLK_BUS_EHCI2>,
++				 <&ccu CLK_USB_OHCI2>;
++			resets = <&ccu RST_BUS_OHCI2>,
++				 <&ccu RST_BUS_EHCI2>;
++			phys = <&usbphy 2>;
++			phy-names = "usb";
++			status = "disabled";
++		};
++
++		ohci2: usb@5310400 {
++			compatible = "allwinner,sun50i-h616-ohci",
++				     "generic-ohci";
++			reg = <0x05310400 0x100>;
++			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_OHCI2>,
++				 <&ccu CLK_USB_OHCI2>;
++			resets = <&ccu RST_BUS_OHCI2>;
++			phys = <&usbphy 2>;
++			phy-names = "usb";
++			status = "disabled";
++		};
++
++		ehci3: usb@5311000 {
++			compatible = "allwinner,sun50i-h616-ehci",
++				     "generic-ehci";
++			reg = <0x05311000 0x100>;
++			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_OHCI3>,
++				 <&ccu CLK_BUS_EHCI3>,
++				 <&ccu CLK_USB_OHCI3>;
++			resets = <&ccu RST_BUS_OHCI3>,
++				 <&ccu RST_BUS_EHCI3>;
++			phys = <&usbphy 3>;
++			phy-names = "usb";
++			status = "disabled";
++		};
++
++		ohci3: usb@5311400 {
++			compatible = "allwinner,sun50i-h616-ohci",
++				     "generic-ohci";
++			reg = <0x05311400 0x100>;
++			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_OHCI3>,
++				 <&ccu CLK_USB_OHCI3>;
++			resets = <&ccu RST_BUS_OHCI3>;
++			phys = <&usbphy 3>;
++			phy-names = "usb";
++			status = "disabled";
++		};
++
+ 		rtc: rtc@7000000 {
+ 			compatible = "allwinner,sun50i-h616-rtc";
+ 			reg = <0x07000000 0x400>;
+-- 
+2.40.1
+

recipes-kernel/linux/linux-mainline-6.1.9/orange-pi-zero2/0012-dts-orange-pi-zero2.patch

@@ -0,0 +1,84 @@
+From 038441bbe0f6dab3e701061c514a8d776dbe6523 Mon Sep 17 00:00:00 2001
+From: OpenEmbedded <oe.patch@oe>
+Date: Sat, 20 May 2023 14:07:47 +0200
+Subject: [PATCH] DTS orange pi zero2 enable usb
+
+Signed-off-by: OpenEmbedded <oe.patch@oe>
+---
+ .../allwinner/sun50i-h616-orangepi-zero2.dts  | 42 +++++++++++++++++++
+ 1 file changed, 42 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+index 88234a139..3b836296b 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+@@ -50,6 +50,16 @@ reg_vcc5v: vcc5v {
+ 		regulator-always-on;
+ 	};
+ 
++        reg_usb1_vbus: regulator-usb1-vbus {
++                compatible = "regulator-fixed";
++                regulator-name = "usb1-vbus";
++                regulator-min-microvolt = <5000000>;
++                regulator-max-microvolt = <5000000>;
++                vin-supply = <&reg_vcc5v>;
++                enable-active-high;
++                gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
++        };
++
+ 	reg_vcc33_wifi: vcc33-wifi {
+ 		/* Always on 3.3V regulator for WiFi and BT */
+ 		compatible = "regulator-fixed";
+@@ -79,6 +89,12 @@ wifi_pwrseq: wifi-pwrseq {
+ 	};
+ };
+ 
++&ehci1 {
++        status = "okay";
++};
++
++/* USB 2 & 3 are on headers only. */
++
+ &mmc1 {
+ 	vmmc-supply = <&reg_vcc33_wifi>;
+ 	vqmmc-supply = <&reg_vcc_wifi_io>;
+@@ -123,6 +139,11 @@ &mmc0 {
+ 	status = "okay";
+ };
+ 
++
++&ohci1 {
++	status = "okay";
++};
++
+ &r_rsb {
+ 	status = "okay";
+ 
+@@ -258,3 +279,24 @@ &uart0 {
+ 	pinctrl-0 = <&uart0_ph_pins>;
+ 	status = "okay";
+ };
++
++&usbotg {
++	/*
++	 * PHY0 pins are connected to a USB-C socket, but a role switch
++	 * is not implemented: both CC pins are pulled to GND.
++	 * The VBUS pins power the device, so a fixed peripheral mode
++	 * is the best choice.
++	 * The board can be powered via GPIOs, in this case port0 *can*
++	 * act as a host (with a cable/adapter ignoring CC), as VBUS is
++	 * then provided by the GPIOs. Any user of this setup would
++	 * need to adjust the DT accordingly: dr_mode set to "host",
++	 * enabling OHCI0 and EHCI0.
++	 */
++	dr_mode = "peripheral";
++	status = "okay";
++};
++
++&usbphy {
++	usb1_vbus-supply = <&reg_usb1_vbus>;
++	status = "okay";
++};
+-- 
+2.40.1
+

recipes-kernel/linux/linux-mainline.inc

@@ -7,7 +7,23 @@ inherit kernel
 
 require linux.inc
 
-LINUX_VERSION = "${PV}"
+KERNEL_DTB_PREFIX = "0"
+
+python() {
+    # return version in int form
+    def kernel_version():
+        ver = d.getVar('PV', True).split('.')
+        return int("".join(ver[0])),int("".join(ver[1]))
+
+    # kernel 6.5 have updated dts path add 'allwinner' prefix automatically
+    major, minor = kernel_version()
+    if major >= 6 and minor >= 5:
+        dt = d.getVar('KERNEL_DEVICETREE', True)
+        if not "allwinner" in dt:
+            dt = "allwinner/{0}".format(dt)
+            d.setVar('KERNEL_DEVICETREE', dt)
+        d.setVar('KERNEL_DTB_PREFIX', "1")
+}
 
 # Since we're not using git, this doesn't make a difference, but we need to fill
 # in something or kernel-yocto.bbclass will fail.
@@ -20,18 +36,30 @@ RDEPENDS_${KERNEL_PACKAGE_NAME}-base += "kernel-devicetree"
 
 KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}"
 
-LINUX_VERSION ?= "${PV}"
-
 S = "${WORKDIR}/linux-${PV}"
 
-SRC_URI = "https://www.kernel.org/pub/linux/kernel/v5.x/linux-${PV}.tar.xz \
+# get release version 5.x or 6.x based on version
+KRELEASE = "${@d.getVar('PV', True).split('.')[0]}"
+
+SRC_URI = "https://www.kernel.org/pub/linux/kernel/v${KRELEASE}.x/linux-${PV}.tar.xz \
+	file://defconfig \
+"
+
+# append patches for kernels before 6.5 and after based on version
+SRC_URI += "${@oe.utils.ifelse(d.getVar('KERNEL_DTB_PREFIX') == '1', d.getVar('SOURCES_K65'), d.getVar('SOURCES'))}"
+
+SOURCES_K65 = " \
+	file://6.5/0001-dts-orangepi-zero-Add-wifi-support.patch \
+	file://6.5/0002-dts-nanopi-neo-air-Add-camera-support.patch \
+	file://6.5/0003-dts-allwinner-bananapi-m2-zero-Enforce-consistent-MM.patch \
+	file://6.5/0004-dts-allwinner-bananapi-m64-Consistent-nodes-for-mmc-devices.patch \
+"
+
+SOURCES = " \
 	file://0001-dts-orange-pi-zero-Add-wifi-support.patch \
 	file://0002-dts-nanopi-neo-air-add-camera.patch \
 	file://0003-dts-allwinner-bananapi-m2-zreo-Enforce-consistent-MM.patch \
-	file://0004-i2c-mv64xxx-Add-atomic_xfer-method-to-driver.patch \
-	file://0005-i2c-mv64xxx-Remove-shutdown-method-from-driver.patch \
-	file://0006-orangepi-pc-plus-Added-mmc-aliases-to-have-consisten.patch \
-	file://defconfig \
+	file://0004-dts-allwinner-bananapi-m64-Consistent-nodes-for-mmc-devices.patch \
 "
 
 SRC_URI:append:use-mailine-graphics = " file://drm.cfg"

recipes-kernel/linux/linux-mainline/0004-dts-allwinner-bananapi-m64-Consistent-nodes-for-mmc-devices.patch

@@ -0,0 +1,27 @@
+From f487f62babb11d014da7a0b58a0fcdf6d217a812 Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Thu, 11 May 2023 11:18:33 +0200
+Subject: [PATCH] bananapi-m64: Consistent nodes for mmc devices
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+index e6d5bc0f7..39a28aad8 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+@@ -16,6 +16,9 @@ aliases {
+ 		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
++                mmc0 = &mmc0;
++                mmc1 = &mmc1;
++                mmc2 = &mmc2;
+ 	};
+ 
+ 	chosen {
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline/0004-i2c-mv64xxx-Add-atomic_xfer-method-to-driver.patch

@@ -1,145 +0,0 @@
-From 544a8d75f3d6e60e160cd92dc56321484598a993 Mon Sep 17 00:00:00 2001
-From: Chris Morgan <macromorgan@hotmail.com>
-Date: Wed, 30 Mar 2022 12:16:57 -0500
-Subject: [PATCH] i2c: mv64xxx: Add atomic_xfer method to driver
-
-Add an atomic_xfer method to the driver so that it behaves correctly
-when controlling a PMIC that is responsible for device shutdown.
-
-The atomic_xfer method added is similar to the one from the i2c-rk3x
-driver. When running an atomic_xfer a bool flag in the driver data is
-set, the interrupt is not unmasked on transfer start, and the IRQ
-handler is manually invoked while waiting for pending transfers to
-complete.
-
-Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
-Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
-Signed-off-by: Wolfram Sang <wsa@kernel.org>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 52 ++++++++++++++++++++++++++++----
- 1 file changed, 46 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 424c53e4c513..103a05ecc3d6 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -150,6 +150,7 @@ struct mv64xxx_i2c_data {
- 	/* Clk div is 2 to the power n, not 2 to the power n + 1 */
- 	bool			clk_n_base_0;
- 	struct i2c_bus_recovery_info	rinfo;
-+	bool			atomic;
- };
- 
- static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = {
-@@ -179,7 +180,10 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
- 	u32	dir = 0;
- 
- 	drv_data->cntl_bits = MV64XXX_I2C_REG_CONTROL_ACK |
--		MV64XXX_I2C_REG_CONTROL_INTEN | MV64XXX_I2C_REG_CONTROL_TWSIEN;
-+			      MV64XXX_I2C_REG_CONTROL_TWSIEN;
-+
-+	if (!drv_data->atomic)
-+		drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_INTEN;
- 
- 	if (msg->flags & I2C_M_RD)
- 		dir = 1;
-@@ -409,7 +413,8 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 	case MV64XXX_I2C_ACTION_RCV_DATA_STOP:
- 		drv_data->msg->buf[drv_data->byte_posn++] =
- 			readl(drv_data->reg_base + drv_data->reg_offsets.data);
--		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
-+		if (!drv_data->atomic)
-+			drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
- 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
- 			drv_data->reg_base + drv_data->reg_offsets.control);
- 		drv_data->block = 0;
-@@ -427,7 +432,8 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 		drv_data->rc = -EIO;
- 		fallthrough;
- 	case MV64XXX_I2C_ACTION_SEND_STOP:
--		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
-+		if (!drv_data->atomic)
-+			drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
- 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
- 			drv_data->reg_base + drv_data->reg_offsets.control);
- 		drv_data->block = 0;
-@@ -575,6 +581,17 @@ mv64xxx_i2c_wait_for_completion(struct mv64xxx_i2c_data *drv_data)
- 		spin_unlock_irqrestore(&drv_data->lock, flags);
- }
- 
-+static void mv64xxx_i2c_wait_polling(struct mv64xxx_i2c_data *drv_data)
-+{
-+	ktime_t timeout = ktime_add_ms(ktime_get(), drv_data->adapter.timeout);
-+
-+	while (READ_ONCE(drv_data->block) &&
-+	       ktime_compare(ktime_get(), timeout) < 0) {
-+		udelay(5);
-+		mv64xxx_i2c_intr(0, drv_data);
-+	}
-+}
-+
- static int
- mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg,
- 				int is_last)
-@@ -590,7 +607,11 @@ mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg,
- 	mv64xxx_i2c_send_start(drv_data);
- 	spin_unlock_irqrestore(&drv_data->lock, flags);
- 
--	mv64xxx_i2c_wait_for_completion(drv_data);
-+	if (!drv_data->atomic)
-+		mv64xxx_i2c_wait_for_completion(drv_data);
-+	else
-+		mv64xxx_i2c_wait_polling(drv_data);
-+
- 	return drv_data->rc;
- }
- 
-@@ -717,7 +738,7 @@ mv64xxx_i2c_functionality(struct i2c_adapter *adap)
- }
- 
- static int
--mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
-+mv64xxx_i2c_xfer_core(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
- {
- 	struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap);
- 	int rc, ret = num;
-@@ -730,7 +751,7 @@ mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
- 	drv_data->msgs = msgs;
- 	drv_data->num_msgs = num;
- 
--	if (mv64xxx_i2c_can_offload(drv_data))
-+	if (mv64xxx_i2c_can_offload(drv_data) && !drv_data->atomic)
- 		rc = mv64xxx_i2c_offload_xfer(drv_data);
- 	else
- 		rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[0], num == 1);
-@@ -747,8 +768,27 @@ mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
- 	return ret;
- }
- 
-+static int
-+mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
-+{
-+	struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap);
-+
-+	drv_data->atomic = 0;
-+	return mv64xxx_i2c_xfer_core(adap, msgs, num);
-+}
-+
-+static int mv64xxx_i2c_xfer_atomic(struct i2c_adapter *adap,
-+				   struct i2c_msg msgs[], int num)
-+{
-+	struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap);
-+
-+	drv_data->atomic = 1;
-+	return mv64xxx_i2c_xfer_core(adap, msgs, num);
-+}
-+
- static const struct i2c_algorithm mv64xxx_i2c_algo = {
- 	.master_xfer = mv64xxx_i2c_xfer,
-+	.master_xfer_atomic = mv64xxx_i2c_xfer_atomic,
- 	.functionality = mv64xxx_i2c_functionality,
- };
- 
--- 
-2.25.1
-

recipes-kernel/linux/linux-mainline/0005-i2c-mv64xxx-Remove-shutdown-method-from-driver.patch

@@ -1,56 +0,0 @@
-From 09b343038e3470e4d0da45f0ee09fb42107e5314 Mon Sep 17 00:00:00 2001
-From: Chris Morgan <macromorgan@hotmail.com>
-Date: Fri, 25 Mar 2022 13:06:25 -0500
-Subject: [PATCH] i2c: mv64xxx: Remove shutdown method from driver
-
-When I attempt to shut down (or reboot) my R8 based NTC CHIP with this
-i2c driver I get the following error: "i2c i2c-0: mv64xxx: I2C bus
-locked, block: 1, time_left: 0". Reboots are successful but shutdowns
-freeze. If I comment out the shutdown routine the device both reboots
-and shuts down successfully without receiving this error (however it
-does receive a warning of missing atomic_xfer).
-
-It appears that very few i2c drivers have a shutdown method, I assume
-because these devices are often used to communicate with PMICs (such
-as in my case with the R8 based NTC CHIP). I'm proposing we simply
-remove this method so long as it doesn't cause trouble for others
-downstream. I'll work on an atomic_xfer method and submit that in
-a different patch.
-
-Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
-Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
-Signed-off-by: Wolfram Sang <wsa@kernel.org>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 9 ---------
- 1 file changed, 9 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 5c8e94b6cdb5..424c53e4c513 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -1047,14 +1047,6 @@ mv64xxx_i2c_remove(struct platform_device *pd)
- 	return 0;
- }
- 
--static void
--mv64xxx_i2c_shutdown(struct platform_device *pd)
--{
--	pm_runtime_disable(&pd->dev);
--	if (!pm_runtime_status_suspended(&pd->dev))
--		mv64xxx_i2c_runtime_suspend(&pd->dev);
--}
--
- static const struct dev_pm_ops mv64xxx_i2c_pm_ops = {
- 	SET_RUNTIME_PM_OPS(mv64xxx_i2c_runtime_suspend,
- 			   mv64xxx_i2c_runtime_resume, NULL)
-@@ -1065,7 +1057,6 @@ static const struct dev_pm_ops mv64xxx_i2c_pm_ops = {
- static struct platform_driver mv64xxx_i2c_driver = {
- 	.probe	= mv64xxx_i2c_probe,
- 	.remove	= mv64xxx_i2c_remove,
--	.shutdown = mv64xxx_i2c_shutdown,
- 	.driver	= {
- 		.name	= MV64XXX_I2C_CTLR_NAME,
- 		.pm     = &mv64xxx_i2c_pm_ops,
--- 
-2.25.1
-

recipes-kernel/linux/linux-mainline/0006-orangepi-pc-plus-Added-mmc-aliases-to-have-consisten.patch

@@ -1,30 +0,0 @@
-From 60ffeb194d08817efab0467e2b2d7eff502f3276 Mon Sep 17 00:00:00 2001
-From: Marek Belisko <marek.belisko@open-nandra.com>
-Date: Wed, 10 Jan 2024 08:37:32 +0100
-Subject: [PATCH] orangepi-pc-plus: Added mmc aliases to have consistent
- devices
-
-It fix random issues with boot problem.
-
-Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
----
- arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-index babf4cf1b..8c9bd76f5 100644
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-@@ -50,6 +50,9 @@ / {
- 	aliases {
- 		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
- 		ethernet1 = &rtl8189ftv;
-+		mmc0 = &mmc0;
-+		mmc1 = &mmc1;
-+		mmc2 = &mmc2;
- 	};
- };
- 
--- 
-2.25.1
-

recipes-kernel/linux/linux-mainline/6.5/0001-dts-orangepi-zero-Add-wifi-support.patch

@@ -0,0 +1,100 @@
+From a9bad790ae9a9e9befbe8e8938b6baca84ee5138 Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Tue, 24 Oct 2023 10:40:52 +0200
+Subject: [PATCH] dts: orangepi-zero: Add wifi support
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+ .../allwinner/sun8i-h2-plus-orangepi-zero.dts | 46 +++++++++++++++----
+ 1 file changed, 37 insertions(+), 9 deletions(-)
+
+diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+index 3706216ff..ca94e313f 100644
+--- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
++++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+@@ -80,13 +80,15 @@ status_led {
+ 		};
+ 	};
+ 
+-	reg_vcc_wifi: reg_vcc_wifi {
++	vdd_wifi: vdd_wifi {
+ 		compatible = "regulator-fixed";
+-		regulator-min-microvolt = <3300000>;
+-		regulator-max-microvolt = <3300000>;
+-		regulator-name = "vcc-wifi";
+-		enable-active-high;
++		regulator-name = "wifi";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
+ 		gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
++		startup-delay-us = <70000>;
++		enable-active-high;
++
+ 	};
+ 
+ 	reg_vdd_cpux: vdd-cpux-regulator {
+@@ -105,10 +107,12 @@ reg_vdd_cpux: vdd-cpux-regulator {
+ 		states = <1100000 0>, <1300000 1>;
+ 	};
+ 
+-	wifi_pwrseq: wifi_pwrseq {
++	pwrseq_wifi: pwrseq_wifi {
+ 		compatible = "mmc-pwrseq-simple";
++		pinctrl-names = "default";
++		pinctrl-0 = <&wifi_rst>;
+ 		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
+-		post-power-on-delay-ms = <200>;
++		post-power-on-delay-ms = <50>;
+ 	};
+ };
+ 
+@@ -139,9 +143,11 @@ &mmc0 {
+ };
+ 
+ &mmc1 {
+-	vmmc-supply = <&reg_vcc_wifi>;
+-	mmc-pwrseq = <&wifi_pwrseq>;
++	vmmc-supply = <&reg_vcc3v3>;
++	vqmmc-supply = <&vdd_wifi>;
++	mmc-pwrseq = <&pwrseq_wifi>;
+ 	bus-width = <4>;
++	max-frequency = <16000000>;
+ 	non-removable;
+ 	status = "okay";
+ 
+@@ -151,6 +157,13 @@ &mmc1 {
+ 	 */
+ 	xr819: sdio_wifi@1 {
+ 		reg = <1>;
++		compatible = "xradio,xr819";
++		pinctrl-names = "default";
++		pinctrl-0 = <&wifi_wake>;
++		interrupt-parent = <&pio>;
++		interrupts = <6 10 IRQ_TYPE_EDGE_RISING>;
++		interrupt-names = "host-wake";
++		local-mac-address = [dc 44 6d c0 ff ee];
+ 	};
+ };
+ 
+@@ -207,3 +220,18 @@ &usbphy {
+ 	status = "okay";
+ 	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ };
++
++&pio {
++	wifi_wake: wifi_wake {
++		pins = "PG10";
++		function = "gpio_in";
++    };
++};
++
++&r_pio {
++	wifi_rst: wifi_rst {
++		pins = "PL7";
++		function = "gpio_out";
++    };
++};
++
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline/6.5/0002-dts-nanopi-neo-air-Add-camera-support.patch

@@ -0,0 +1,113 @@
+From e0d786f5465d2e2d977696cf0d02c70b78402291 Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Tue, 24 Oct 2023 10:42:36 +0200
+Subject: [PATCH] dts:nanopi-neo-air: Add camera support
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+ .../dts/allwinner/sun8i-h3-nanopi-neo-air.dts | 85 +++++++++++++++++++
+ 1 file changed, 85 insertions(+)
+
+diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
+index 9e1a33f94..7a05eff33 100644
+--- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
++++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
+@@ -77,6 +77,39 @@ wifi_pwrseq: wifi_pwrseq {
+ 		compatible = "mmc-pwrseq-simple";
+ 		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ 	};
++
++        cam_xclk: cam-xclk {
++                #clock-cells = <0>;
++                compatible = "fixed-clock";
++                clock-frequency = <24000000>;
++                clock-output-names = "cam-xclk";
++        };
++
++        reg_cam_avdd: cam-avdd {
++                compatible = "regulator-fixed";
++                regulator-name = "cam-avdd";
++                regulator-min-microvolt = <2800000>;
++                regulator-max-microvolt = <2800000>;
++                vin-supply = <&reg_vcc3v3>;
++        };
++
++        reg_cam_dovdd: cam-dovdd {
++                compatible = "regulator-fixed";
++                regulator-name = "cam-dovdd";
++                regulator-min-microvolt = <1800000>;
++                regulator-max-microvolt = <1800000>;
++                vin-supply = <&reg_vcc3v3>;
++        };
++
++        reg_cam_dvdd: cam-dvdd {
++                compatible = "regulator-fixed";
++                regulator-name = "cam-dvdd";
++                regulator-min-microvolt = <1500000>;
++                regulator-max-microvolt = <1500000>;
++                vin-supply = <&reg_vcc3v3>;
++        };
++
++
+ };
+ 
+ &mmc0 {
+@@ -141,3 +174,55 @@ &usbphy {
+ 	/* USB VBUS is always on */
+ 	status = "okay";
+ };
++
++&csi {
++    status = "okay";
++
++    port {
++        #address-cells = <1>;
++        #size-cells = <0>;
++
++        /* Parallel bus endpoint */
++        csi_from_ov5640: endpoint {
++            remote-endpoint = <&ov5640_to_csi>;
++            bus-width = <8>;
++            data-shift = <2>;
++            hsync-active = <1>; /* Active high */
++            vsync-active = <0>; /* Active low */
++            data-active = <1>;  /* Active high */
++            pclk-sample = <1>;  /* Rising */
++        };
++    };
++};
++
++&i2c2 {
++   status = "okay";
++
++   ov5640: camera@3c {
++        compatible = "ovti,ov5640";
++        reg = <0x3c>;
++        clocks = <&cam_xclk>;
++        clock-names = "xclk";
++
++        reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>;
++        powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
++        AVDD-supply = <&reg_cam_avdd>;
++        DOVDD-supply = <&reg_cam_dovdd>;
++        DVDD-supply = <&reg_cam_dvdd>;
++
++        port {
++            ov5640_to_csi: endpoint {
++                remote-endpoint = <&csi_from_ov5640>;
++                bus-width = <8>;
++                data-shift = <2>;
++                hsync-active = <1>; /* Active high */
++                vsync-active = <0>; /* Active low */
++                data-active = <1>;  /* Active high */
++                pclk-sample = <1>;  /* Rising */
++            };
++        };
++    };
++};
++&i2c2_pins {
++   bias-pull-up;
++};
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline/6.5/0003-dts-allwinner-bananapi-m2-zero-Enforce-consistent-MM.patch

@@ -0,0 +1,30 @@
+From 7d7f32460702e99cab48909bb85ed84b67e65062 Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Tue, 24 Oct 2023 10:43:55 +0200
+Subject: [PATCH] dts: allwinner: bananapi-m2-zero: Enforce consistent MMC
+ numbering
+
+Enforce MMC number (sometimes the order was wrong and the device does not boot).
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+ arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts
+index d729b7c70..410a79487 100644
+--- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts
++++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-m2-zero.dts
+@@ -20,6 +20,9 @@ / {
+ 	aliases {
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
++		mmc0 = &mmc0;
++		mmc1 = &mmc1;
++		mmc2 = &mmc2;
+ 	};
+ 
+ 	chosen {
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline/6.5/0004-dts-allwinner-bananapi-m64-Consistent-nodes-for-mmc-devices.patch

@@ -0,0 +1,27 @@
+From f487f62babb11d014da7a0b58a0fcdf6d217a812 Mon Sep 17 00:00:00 2001
+From: Marek Belisko <marek.belisko@open-nandra.com>
+Date: Thu, 11 May 2023 11:18:33 +0200
+Subject: [PATCH] bananapi-m64: Consistent nodes for mmc devices
+
+Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+index e6d5bc0f7..39a28aad8 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+@@ -16,6 +16,9 @@ aliases {
+ 		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
++                mmc0 = &mmc0;
++                mmc1 = &mmc1;
++                mmc2 = &mmc2;
+ 	};
+ 
+ 	chosen {
+-- 
+2.25.1
+

recipes-kernel/linux/linux-mainline_5.15.35.bb

@@ -1,23 +0,0 @@
-require linux-mainline.inc
-
-DESCRIPTION = "Mainline Longterm Linux kernel"
-
-LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46"
-
-SRC_URI[sha256sum] = "0a1a5ae2f30eb2b38215e59077f045aabd7f4e2857a881482f02ea48186105d8"
-
-
-# # orangepi-zero-2 support added only for 5.15 kernel so add it to this recipe not to inc file
-SRC_URI:append:orange-pi-zero2  = " \
-        file://defconfig \
-        file://0001-dts-add-h616-and-orangepizero2.patch \
-        file://0002-drv-add-dump_reg-and-sunxi-sysinfo-drivers.patch \
-        file://0003-drv-add-sunxi_get_soc_chipid-and-sunxi_get_serial.patch \
-        file://0004-dts-add-sunxi-info-device-tree-node.patch \
-        file://0005-dts-add-addr_mgt-device-tree-node.patch \
-        file://0006-drv-modem-power-Power-manager-for-modems.patch \
-        file://0007-drv-add-sunxi-addr-driver-used-to-fix-uwe5622-bluetooth-.patch \
-        file://0008-drv-wireless-add-uwe5622-driver.patch \
-        file://0009-drv-uwe5622-bluetooth-fix-firmware-init-fail.patch \
-        file://0010-drv-fix-incldue-path-for-unisocwcn.patch \
-"

recipes-kernel/linux/linux-mainline_5.15.91.bb

@@ -4,5 +4,4 @@ DESCRIPTION = "Mainline Longterm Linux kernel"
 
 LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46"
 
-SRC_URI[md5sum] = "0751179f60de73eb2cd93f161fa52fcf"
-SRC_URI[sha256sum] = "3b84e13abae26af17ebccc4d7212f5843a991127a73a320848d5c6942ef781a2"
+SRC_URI[sha256sum] = "a63c2bb1beb15f1aea9c63cf80559f5b7ab58afd2da2fa5e7670c515ebe1fe80"

recipes-kernel/linux/linux-mainline_5.4.69.bb

@@ -1,8 +0,0 @@
-require linux-mainline.inc
-
-DESCRIPTION = "Mainline Longterm Linux kernel"
-
-LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
-
-SRC_URI[md5sum] = "98c8187b801f006ba203db0669e307a5"
-SRC_URI[sha256sum] = "a8b31d716b397303a183e42ad525ff2871024a43e3ea530d0fdf73b7f9d27da7"

recipes-kernel/linux/linux-mainline_6.1.9.bb

@@ -0,0 +1,51 @@
+require linux-mainline.inc
+
+DESCRIPTION = "Mainline Longterm Linux kernel"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46"
+
+SRC_URI[sha256sum] = "d60cf185693c386e7acd9f3eb3a94ae30ffbfee0a9447a20e83711e0bdf5922b"
+
+SRC_URI:append:orange-pi-zero2  = " \
+        file://defconfig \
+        file://0001-drv-wireless-add-uwe5622-wifi-driver.patch \
+        file://0002-drv-wireless-driver-for-uwe5622-allwinner-bugfix.patch \
+        file://0003-drv-fix-incldue-path-for-unisocwcn.patch \
+        file://0004-drv-wireless-adapt-uwe5622-wifi-driver-to-kernel-6.1.patch \
+        file://0005-drv-fix-setting-mac-address-for-netdev-in-uwe5622.patch \
+        file://0006-drv-add-dump_reg-and-sunxi-sysinfo-drivers.patch \
+        file://0007-drv-add-sunxi_get_soc_chipid-and-sunxi_get_serial.patch \
+        file://0008-drv-add-sunxi-addr-driver.patch \
+        file://0009-dts-add-addr_mgt-device-tree-node.patch \
+        file://0010-dts-add-wifi-power-regulator.patch \
+        file://0011-dts-add-usb-to-h616.patch \
+        file://0012-dts-orange-pi-zero2.patch \
+"
+
+
+SRC_URI:append:orange-pi-3lts  = " \
+        file://orangepi-3lts.cfg \
+        file://0001-Input-axp20x-pek-allow-wakeup-after-shutdown.patch \
+        file://0002-clk-Implement-protected-clocks-for-all-OF-clock-prov.patch \
+        file://0003-Revert-clk-qcom-Support-protected-clocks-property.patch \
+        file://0007-rtc-sun6i-Allow-RTC-wakeup-after-shutdown.patch \
+        file://0009-firmware-arm_scpi-Support-unidirectional-mailbox-cha.patch \
+        file://0012-arm64-dts-allwinner-h6-Add-SCPI-protocol.patch \
+        file://0013-ASoC-hdmi-codec-fix-channel-allocation.patch \
+        file://0028-mfd-Add-support-for-AC200.patch \
+        file://0029-net-phy-Add-support-for-AC200-EPHY.patch \
+        file://0031-arm64-dts-h6-deinterlace.patch \
+        file://0043-HACK-h6-Add-HDMI-sound-card.patch \
+        file://0049-arm64-dts-allwinner-h6-Add-AC200-EPHY-related-nodes.patch \
+        file://0053-mmc-sunxi-fix-unusuable-eMMC-on-some-H6-boards-by-di.patch \
+        file://0065-wip-fix-H6-4k-60.patch \
+        file://0066-arm64-dts-allwinner-h6-Fix-Cedrus-IOMMU-again.patch \
+        file://0073-iommu-sun50i-Allow-page-sizes-multiple-of-4096.patch \
+        file://0077-OrangePi-3-LTS-support.patch \
+        file://2000-arm64-dts-allwinner-Enforce-consistent-MMC-numbering.patch \
+"
+#  For wifi and BT these are under testing 
+#        file://1000-OrangePi-UWE5622.patch \
+#        file://1004-orange-pi-3-lts-wifi-bt.patch \
+#"
+

recipes-kernel/linux/linux-mainline_6.5.11.bb

@@ -0,0 +1,8 @@
+require linux-mainline.inc
+
+DESCRIPTION = "Mainline Longterm Linux kernel"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46"
+
+SRC_URI[sha256sum] = "2ee24af9282b80923b2da56b70aad7df2e8ee4e3f076452e05ba66be2059b519"
+

recipes-kernel/linux/linux-sunxi_3.4.bb

@@ -9,8 +9,6 @@ PV = "3.4.104"
 PR = "r1"
 SRCREV = "d47d367036be38c5180632ec8a3ad169a4593a88"
 
-LINUX_VERSION ?= "${PV}"
-
 MACHINE_KERNEL_PR:append = "a"
 
 SRC_URI += "git://github.com/linux-sunxi/linux-sunxi.git;branch=sunxi-3.4;protocol=https \

recipes-kernel/xradio/xradio.bb

@@ -11,11 +11,10 @@ RDEPENDS:${PN} += "xradio-firmware"
 
 COMPATIBLE_MACHINE = "orange-pi-zero"
 
-SRCREV = "279868ac96f6db34b65f68c6722830fa0aacb86b"
+SRCREV = "547521df27d1a80fb5542e93fa13bd09fb2259a2"
 
 SRC_URI = "\
-	   git://github.com/dbeinder/xradio.git;protocol=https;branch=karabek_rebase \
-	file://0001-Enable-out-of-tree-compilation.patch \
+	   git://github.com/fifteenhex/xradio.git;protocol=http;branch=master \
           "
 
 S = "${WORKDIR}/git"

recipes-kernel/xradio/xradio/0001-Enable-out-of-tree-compilation.patch

@@ -1,30 +0,0 @@
-From 15651d333da5429a1544f0a17d5f02c74f693ad7 Mon Sep 17 00:00:00 2001
-From: Marek Belisko <marek.belisko@open-nandra.com>
-Date: Thu, 15 Oct 2020 14:45:07 +0200
-Subject: [PATCH] Enable out of tree compilation
-
-Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
----
- Makefile | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/Makefile b/Makefile
-index 7a0de9a..ee75f0b 100644
---- a/Makefile
-+++ b/Makefile
-@@ -1,9 +1,9 @@
- # SPDX-License-Identifier: GPL-2.0-only
- 
- # # Standalone Makefile - uncomment for out-of-tree compilation
--# CONFIG_WLAN_VENDOR_XRADIO := m
--# ccflags-y += -DCONFIG_XRADIO_USE_EXTENSIONS
--# ccflags-y += -DCONFIG_XRADIO_WAPI_SUPPORT
-+CONFIG_WLAN_VENDOR_XRADIO := m
-+ccflags-y += -DCONFIG_XRADIO_USE_EXTENSIONS
-+ccflags-y += -DCONFIG_XRADIO_WAPI_SUPPORT
- 
- # Kernel part
- 
--- 
-2.7.4
-