From 339dc8af45860021e30ddd4624796a6391176888 Mon Sep 17 00:00:00 2001 From: Jens Lucius Date: Fri, 28 Nov 2014 09:21:58 +0100 Subject: [PATCH 1/3] python: added pyA20 for controlling GPIO pyA20 allows controlling GPIO, SPI and I2C on Allwinner boards from python. Although it is named A20 it should work on A10, A13 and other CPUs. Provided by Olimex for their boards but should work for others as well. Tested on A20-OLinuXino-MICRO. Signed-off-by: Jens Lucius --- recipes-devtools/python/files/setup.py.patch | 51 ++++++++++++++++++++ recipes-devtools/python/pyA20_0.2.0.bb | 15 ++++++ 2 files changed, 66 insertions(+) create mode 100644 recipes-devtools/python/files/setup.py.patch create mode 100644 recipes-devtools/python/pyA20_0.2.0.bb diff --git a/recipes-devtools/python/files/setup.py.patch b/recipes-devtools/python/files/setup.py.patch new file mode 100644 index 0000000..753d42f --- /dev/null +++ b/recipes-devtools/python/files/setup.py.patch @@ -0,0 +1,51 @@ +--- pyA20-0.2.0/setup.py 2014-09-04 12:17:18.000000000 +0200 ++++ pyA20-0.2.0/setup.py 2014-11-24 17:44:37.000000000 +0100 +@@ -43,31 +43,31 @@ + Detect processor type + :return: + """ +- cpuinfo = open("/proc/cpuinfo", 'r') +- for line in cpuinfo: +- if "Hardware" in line: +- processor = line.split(":")[1].rstrip() ++ #cpuinfo = open("/proc/cpuinfo", 'r') ++ #for line in cpuinfo: ++ # if "Hardware" in line: ++ # processor = line.split(":")[1].rstrip() + +- if "sun4i" in processor: +- print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A10)") ++ # if "sun4i" in processor: ++ # print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A10)") + +- elif "sun5i" in processor: +- print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A13)") ++ # elif "sun5i" in processor: ++ # print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A13)") + +- elif "sun7i" in processor: +- print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A20)") ++ # elif "sun7i" in processor: ++ # print ("Detected processor: " + print_color(processor) + " (Probably Allwinner A20)") + +- else: +- print ("Detected processor: " + print_color("unknown")) ++ # else: ++ # print ("Detected processor: " + print_color("unknown")) + + +- if processor_type not in processor: +- print_warning() ++ # if processor_type not in processor: ++ # print_warning() + +- return ++ return + +- print ("No processor detected") +- print_warning() ++ #print ("No processor detected") ++ #print_warning() + + + class build_ext(_build_ext): diff --git a/recipes-devtools/python/pyA20_0.2.0.bb b/recipes-devtools/python/pyA20_0.2.0.bb new file mode 100644 index 0000000..49bd543 --- /dev/null +++ b/recipes-devtools/python/pyA20_0.2.0.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "A module to control Allwinner GPIO,SPI and I2C channels" +HOMEPAGE = "https://pypi.python.org/pypi/pyA20" +SECTION = "devel/python" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://PKG-INFO;md5=b4cb7d5da6f1efc1d0bf487169e83985" + +SRC_URI = "http://pypi.python.org/packages/source/p/pyA20/pyA20-${PV}.tar.gz \ + file://setup.py.patch \ + " +S = "${WORKDIR}/pyA20-${PV}" + +inherit distutils + +SRC_URI[md5sum] = "b4115859834f09ebd389f810f2ffefb9" +SRC_URI[sha256sum] = "9855747d9bbdfcce6b460fcd67d953155e39f4e002a9a4c573910248b451dad8" From 5699690a98bcbfbc9fd82cf8816d182b0e8d10d0 Mon Sep 17 00:00:00 2001 From: Jens Lucius Date: Fri, 28 Nov 2014 12:23:16 +0100 Subject: [PATCH 2/3] python: pyA20 added different GPIO mappings Unfortunately there is a difference between different boards when using pyA20 - the GPIO mappings. Olimex tried to solve this by providing different packages for different boards. Just made the receipe use different mappings.h, so it can be easily adjusted to different boards in one receipe. Signed-off-by: Jens Lucius --- .../python/files/olinuxino-a10/mapping.h | 221 +++++++++++++ .../python/files/olinuxino-a13/mapping.h | 146 +++++++++ .../python/files/olinuxino-a20/mapping.h | 303 ++++++++++++++++++ recipes-devtools/python/pyA20_0.2.0.bb | 5 + 4 files changed, 675 insertions(+) create mode 100644 recipes-devtools/python/files/olinuxino-a10/mapping.h create mode 100644 recipes-devtools/python/files/olinuxino-a13/mapping.h create mode 100644 recipes-devtools/python/files/olinuxino-a20/mapping.h diff --git a/recipes-devtools/python/files/olinuxino-a10/mapping.h b/recipes-devtools/python/files/olinuxino-a10/mapping.h new file mode 100644 index 0000000..fcb5e2c --- /dev/null +++ b/recipes-devtools/python/files/olinuxino-a10/mapping.h @@ -0,0 +1,221 @@ +/* + * + * This file is part of pyA10Lime. + * mapping.h is python GPIO extension. + * + * Copyright (c) 2014 Stefan Mavrodiev @ OLIMEX LTD, + * + * pyA10Lime is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __MAPPING_H +#define __MAPPING_H + +#include "gpio_lib.h" + +/** +Structure that describe all gpio +*/ +typedef struct _pin { + char name[10]; // The processor pin + int offset; // Memory offset for the pin + int pin_number; // Number on the connector +}pin_t; + +typedef struct _gpio { + char connector_name[10]; + pin_t pins[41]; +}gpio_t; + + +gpio_t gpio[] = { + {"lcd", + { + { "PD16", SUNXI_GPD(16), 5 }, + { "PD17", SUNXI_GPD(17), 6 }, + { "PD18", SUNXI_GPD(18), 7 }, + { "PD19", SUNXI_GPD(19), 8 }, + { "PD20", SUNXI_GPD(20), 9 }, + { "PD21", SUNXI_GPD(21), 10 }, + { "PD22", SUNXI_GPD(22), 11 }, + { "PD23", SUNXI_GPD(23), 12 }, + { "PD8", SUNXI_GPD(8), 13 }, + { "PD9", SUNXI_GPD(9), 14 }, + { "PD10", SUNXI_GPD(10), 15 }, + { "PD11", SUNXI_GPD(11), 16 }, + { "PD12", SUNXI_GPD(12), 17 }, + { "PD13", SUNXI_GPD(13), 18 }, + { "PD14", SUNXI_GPD(14), 19 }, + { "PD15", SUNXI_GPD(15), 20 }, + { "PD0", SUNXI_GPD(0), 21 }, + { "PD1", SUNXI_GPD(1), 22 }, + { "PD2", SUNXI_GPD(2), 23 }, + { "PD3", SUNXI_GPD(3), 24 }, + { "PD4", SUNXI_GPD(4), 25 }, + { "PD5", SUNXI_GPD(5), 26 }, + { "PD6", SUNXI_GPD(6), 27 }, + { "PD7", SUNXI_GPD(7), 28 }, + { "PD26", SUNXI_GPD(26), 29 }, + { "PD27", SUNXI_GPD(27), 30 }, + { "PD24", SUNXI_GPD(24), 31 }, + { "PD25", SUNXI_GPD(25), 32 }, + { "PH8", SUNXI_GPH(8), 35 }, + { "PB2", SUNXI_GPB(2), 36 }, + { + { 0, 0, 0} + }, + } + }, + + {"gpio1", + { + { "PG0", SUNXI_GPG(0), 5 }, + { "PG1", SUNXI_GPG(1), 7 }, + { "PG2", SUNXI_GPG(2), 9 }, + { "PG3", SUNXI_GPG(3), 11 }, + { "PG4", SUNXI_GPG(4), 13 }, + { "PG5", SUNXI_GPG(5), 15 }, + { "PG6", SUNXI_GPG(6), 17 }, + { "PG7", SUNXI_GPG(7), 19 }, + { "PG8", SUNXI_GPG(8), 21 }, + { "PG9", SUNXI_GPG(9), 23 }, + { "PG10", SUNXI_GPG(10), 25 }, + { "PG11", SUNXI_GPG(11), 27 }, + { "PC3", SUNXI_GPC(3), 29 }, + { "PC18", SUNXI_GPC(18), 31 }, + { "PC19", SUNXI_GPC(19), 33 }, + { "PC20", SUNXI_GPC(20), 35 }, + { "PC21", SUNXI_GPC(21), 37 }, + { "PC22", SUNXI_GPC(22), 39 }, + { "PC23", SUNXI_GPC(23), 40 }, + { "PC24", SUNXI_GPC(24), 38 }, + { "PB18", SUNXI_GPB(18), 36 }, + { "PB19", SUNXI_GPB(19), 34 }, + { "PB20", SUNXI_GPB(20), 32 }, + { "PB21", SUNXI_GPB(21), 30 }, + { + { 0, 0, 0} + }, + } + }, + + {"gpio2", + { + { "PI0", SUNXI_GPI(0), 9 }, + { "PI1", SUNXI_GPI(1), 11 }, + { "PI2", SUNXI_GPI(2), 13 }, + { "PI3", SUNXI_GPI(3), 15 }, + { "PI4", SUNXI_GPI(4), 17 }, + { "PI5", SUNXI_GPI(5), 19 }, + { "PI6", SUNXI_GPI(6), 21 }, + { "PI7", SUNXI_GPI(7), 23 }, + { "PI8", SUNXI_GPI(8), 25 }, + { "PI9", SUNXI_GPI(9), 27 }, + { "PI10", SUNXI_GPI(10), 29 }, + { "PI11", SUNXI_GPI(11), 31 }, + { "PI12", SUNXI_GPI(12), 33 }, + { "PI13", SUNXI_GPI(13), 35 }, + { "PI14", SUNXI_GPI(14), 37 }, + { "PI15", SUNXI_GPI(15), 39 }, + { "PI16", SUNXI_GPI(16), 40 }, + { "PI17", SUNXI_GPI(17), 38 }, + { "PI18", SUNXI_GPI(18), 36 }, + { "PI19", SUNXI_GPI(19), 34 }, + { "PI20", SUNXI_GPI(20), 32 }, + { "PI21", SUNXI_GPI(21), 30 }, + { "PE0", SUNXI_GPE(0), 6 }, + { "PE1", SUNXI_GPE(1), 8 }, + { "PE2", SUNXI_GPE(2), 10 }, + { "PE3", SUNXI_GPE(3), 12 }, + { "PE4", SUNXI_GPE(4), 14 }, + { "PE5", SUNXI_GPE(5), 16 }, + { "PE6", SUNXI_GPE(6), 18 }, + { "PE7", SUNXI_GPE(7), 20 }, + { "PE8", SUNXI_GPE(8), 22 }, + { "PE9", SUNXI_GPE(9), 24 }, + { "PE10", SUNXI_GPE(10), 26 }, + { "PE11", SUNXI_GPE(11), 28 }, + { + { 0, 0, 0} + }, + } + }, + + {"gpio3", + { + { "PH0", SUNXI_GPH(0), 7 }, + { "PH7", SUNXI_GPH(7), 9 }, + { "PH9", SUNXI_GPH(9), 11 }, + { "PH10", SUNXI_GPH(10), 13 }, + { "PH11", SUNXI_GPH(11), 15 }, + { "PH12", SUNXI_GPH(12), 17 }, + { "PH13", SUNXI_GPH(13), 19 }, + { "PH14", SUNXI_GPH(14), 21 }, + { "PH15", SUNXI_GPH(15), 23 }, + { "PH16", SUNXI_GPH(16), 25 }, + { "PH17", SUNXI_GPH(17), 27 }, + { "PH18", SUNXI_GPH(18), 29 }, + { "PH19", SUNXI_GPH(19), 31 }, + { "PH20", SUNXI_GPH(20), 33 }, + { "PH21", SUNXI_GPH(21), 35 }, + { "PH22", SUNXI_GPH(22), 37 }, + { "PH23", SUNXI_GPH(23), 39 }, + { "PH24", SUNXI_GPH(24), 34 }, + { "PH25", SUNXI_GPH(25), 36 }, + { "PH26", SUNXI_GPH(26), 38 }, + { "PH27", SUNXI_GPH(27), 40 }, + { "PB3", SUNXI_GPB(3), 6 }, + { "PB4", SUNXI_GPB(4), 8 }, + { "PB5", SUNXI_GPB(5), 10 }, + { "PB6", SUNXI_GPB(6), 12 }, + { "PB7", SUNXI_GPB(7), 14 }, + { "PB8", SUNXI_GPB(8), 16 }, + { "PB10", SUNXI_GPB(10), 18 }, + { "PB11", SUNXI_GPB(11), 20 }, + { "PB12", SUNXI_GPB(12), 22 }, + { "PB13", SUNXI_GPB(13), 24 }, + { "PB14", SUNXI_GPB(14), 26 }, + { "PB15", SUNXI_GPB(15), 28 }, + { "PB16", SUNXI_GPB(16), 30 }, + { "PB17", SUNXI_GPB(17), 32 }, + { + { 0, 0, 0} + }, + } + }, + + {"gpio4", + { + { "PC7", SUNXI_GPC(7), 16 }, + { "PC16", SUNXI_GPC(16), 18 }, + { "PC17", SUNXI_GPC(17), 20 }, + { + { 0, 0, 0} + }, + } + }, + + {"led", + { + { "PH2", SUNXI_GPH(2), 1}, + { + { 0, 0, 0} + }, + } + }, +}; + +#endif \ No newline at end of file diff --git a/recipes-devtools/python/files/olinuxino-a13/mapping.h b/recipes-devtools/python/files/olinuxino-a13/mapping.h new file mode 100644 index 0000000..2d408d5 --- /dev/null +++ b/recipes-devtools/python/files/olinuxino-a13/mapping.h @@ -0,0 +1,146 @@ +/* + * + * This file is part of pyA13. + * mapping.h is python GPIO extension. + * + * Copyright (c) 2014 Stefan Mavrodiev @ OLIMEX LTD, + * + * pyA13 is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __MAPPING_H +#define __MAPPING_H + +#include "gpio_lib.h" + +/** +Structure that describe all gpio +*/ +typedef struct _pin { + char name[10]; // The processor pin + int offset; // Memory offset for the pin + int pin_number; // Number on the connector +}pin_t; + +typedef struct _gpio { + char connector_name[10]; + pin_t pins[41]; +}gpio_t; + + +gpio_t gpio[] = { + {"lcd", + { + { "PD18", SUNXI_GPD(18), 5 }, + { "PD18", SUNXI_GPD(18), 6 }, + { "PD18", SUNXI_GPD(18), 7 }, + { "PD19", SUNXI_GPD(19), 8 }, + { "PD20", SUNXI_GPD(20), 9 }, + { "PD21", SUNXI_GPD(21), 10 }, + { "PD22", SUNXI_GPD(22), 11 }, + { "PD23", SUNXI_GPD(23), 12 }, + { "PD10", SUNXI_GPD(10), 13 }, + { "PD10", SUNXI_GPD(10), 14 }, + { "PD10", SUNXI_GPD(10), 15 }, + { "PD11", SUNXI_GPD(11), 16 }, + { "PD12", SUNXI_GPD(12), 17 }, + { "PD13", SUNXI_GPD(13), 18 }, + { "PD14", SUNXI_GPD(14), 19 }, + { "PD15", SUNXI_GPD(15), 20 }, + { "PD2", SUNXI_GPD(2), 21 }, + { "PD2", SUNXI_GPD(2), 22 }, + { "PD2", SUNXI_GPD(2), 23 }, + { "PD3", SUNXI_GPD(3), 24 }, + { "PD4", SUNXI_GPD(4), 25 }, + { "PD5", SUNXI_GPD(5), 26 }, + { "PD6", SUNXI_GPD(6), 27 }, + { "PD7", SUNXI_GPD(7), 28 }, + { "PD26", SUNXI_GPD(26), 29 }, + { "PD27", SUNXI_GPD(27), 30 }, + { "PD24", SUNXI_GPD(24), 31 }, + { "PD25", SUNXI_GPD(25), 32 }, + { "PB3", SUNXI_GPB(3), 33 }, + { "PB4", SUNXI_GPB(4), 34 }, + { "PB10", SUNXI_GPB(10), 35 }, + { "PB2", SUNXI_GPB(2), 36 }, + { + { 0, 0, 0} + }, + } + }, + {"gpio2", + { + { "PB0", SUNXI_GPB(0), 5 }, + { "PG11", SUNXI_GPG(11), 6 }, + { "PB1", SUNXI_GPB(1), 7 }, + { "PG10", SUNXI_GPG(10), 8 }, + { "PB2", SUNXI_GPB(2), 9 }, + { "PG9", SUNXI_GPG(9), 10 }, + { "PB3", SUNXI_GPB(3), 11 }, + { "PE11", SUNXI_GPE(11), 12 }, + { "PB4", SUNXI_GPB(4), 13 }, + { "PE10", SUNXI_GPE(10), 14 }, + { "PB10", SUNXI_GPB(10), 15 }, + { "PE9", SUNXI_GPE(9), 16 }, + { "PB15", SUNXI_GPB(15), 17 }, + { "PE8", SUNXI_GPE(8), 18 }, + { "PB16", SUNXI_GPB(16), 19 }, + { "PE7", SUNXI_GPE(7), 20 }, + { "PC0", SUNXI_GPC(0), 21 }, + { "PE6", SUNXI_GPE(6), 22 }, + { "PC1", SUNXI_GPC(1), 23 }, + { "PE5", SUNXI_GPE(5), 24 }, + { "PC2", SUNXI_GPC(2), 25 }, + { "PE4", SUNXI_GPE(4), 26 }, + { "PC3", SUNXI_GPC(3), 27 }, + { "PC19", SUNXI_GPC(19), 28 }, + { "PC4", SUNXI_GPC(4), 29 }, + { "PC15", SUNXI_GPC(15), 30 }, + { "PC5", SUNXI_GPC(5), 31 }, + { "PC14", SUNXI_GPC(14), 32 }, + { "PC6", SUNXI_GPC(6), 33 }, + { "PC13", SUNXI_GPC(13), 34 }, + { "PC7", SUNXI_GPC(7), 35 }, + { "PC12", SUNXI_GPC(12), 36 }, + { "PC8", SUNXI_GPC(8), 37 }, + { "PC11", SUNXI_GPC(11), 38 }, + { "PC9", SUNXI_GPC(9), 39 }, + { "PC10", SUNXI_GPC(10), 40 }, + { + { 0, 0, 0} + }, + } + }, + {"uext", + { + { "PG3", SUNXI_GPG(3), 3 }, + { "PG3", SUNXI_GPG(4), 4 }, + { "PB17", SUNXI_GPB(17), 5 }, + { "PB18", SUNXI_GPB(18), 6 }, + { "PE3", SUNXI_GPE(3), 7 }, + { "PE2", SUNXI_GPE(2), 8 }, + { "PE1", SUNXI_GPE(1), 9 }, + { "PE0", SUNXI_GPE(0), 10 }, + { + { 0, 0, 0} + }, + } + }, +}; + + + +#endif \ No newline at end of file diff --git a/recipes-devtools/python/files/olinuxino-a20/mapping.h b/recipes-devtools/python/files/olinuxino-a20/mapping.h new file mode 100644 index 0000000..082d8d9 --- /dev/null +++ b/recipes-devtools/python/files/olinuxino-a20/mapping.h @@ -0,0 +1,303 @@ +/* + * + * This file is part of pyA20. + * mapping.h is python GPIO extension. + * + * Copyright (c) 2014 Stefan Mavrodiev @ OLIMEX LTD, + * + * pyA20 is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __MAPPING_H +#define __MAPPING_H + +#include "gpio_lib.h" + +/** +Structure that describe all gpio +*/ +typedef struct _pin { + char name[10]; // The processor pin + int offset; // Memory offset for the pin + int pin_number; // Number on the connector +}pin_t; + +typedef struct _gpio { + char connector_name[10]; + pin_t pins[41]; +}gpio_t; + + +gpio_t gpio[] = { + {"lcd", + { + { "PD16", SUNXI_GPD(16), 5 }, + { "PD17", SUNXI_GPD(17), 6 }, + { "PD18", SUNXI_GPD(18), 7 }, + { "PD19", SUNXI_GPD(19), 8 }, + { "PD20", SUNXI_GPD(20), 9 }, + { "PD21", SUNXI_GPD(21), 10 }, + { "PD22", SUNXI_GPD(22), 11 }, + { "PD23", SUNXI_GPD(23), 12 }, + { "PD8", SUNXI_GPD(8), 13 }, + { "PD9", SUNXI_GPD(9), 14 }, + { "PD10", SUNXI_GPD(10), 15 }, + { "PD11", SUNXI_GPD(11), 16 }, + { "PD12", SUNXI_GPD(12), 17 }, + { "PD13", SUNXI_GPD(13), 18 }, + { "PD14", SUNXI_GPD(14), 19 }, + { "PD15", SUNXI_GPD(15), 20 }, + { "PD0", SUNXI_GPD(0), 21 }, + { "PD1", SUNXI_GPD(1), 22 }, + { "PD2", SUNXI_GPD(2), 23 }, + { "PD3", SUNXI_GPD(3), 24 }, + { "PD4", SUNXI_GPD(4), 25 }, + { "PD5", SUNXI_GPD(5), 26 }, + { "PD6", SUNXI_GPD(6), 27 }, + { "PD7", SUNXI_GPD(7), 28 }, + { "PD26", SUNXI_GPD(26), 29 }, + { "PD27", SUNXI_GPD(27), 30 }, + { "PD24", SUNXI_GPD(24), 31 }, + { "PD25", SUNXI_GPD(25), 32 }, + { "PH8", SUNXI_GPH(8), 35 }, + { "PB2", SUNXI_GPB(2), 36 }, + { + { 0, 0, 0} + }, + } + }, + /* + #define PIN_PG0 SUNXI_GPG(0) +#define PIN_PG1 SUNXI_GPG(1) +#define PIN_PG2 SUNXI_GPG(2) +#define PIN_PG3 SUNXI_GPG(3) +#define PIN_PG4 SUNXI_GPG(4) +#define PIN_PG5 SUNXI_GPG(5) +#define PIN_PG6 SUNXI_GPG(6) +#define PIN_PG7 SUNXI_GPG(7) +#define PIN_PG8 SUNXI_GPG(8) +#define PIN_PG9 SUNXI_GPG(9) +#define PIN_PG10 SUNXI_GPG(10) +#define PIN_PG11 SUNXI_GPG(11) +*/ {"gpio1", + { + { "PG0", SUNXI_GPG(0), 5 }, + { "PG1", SUNXI_GPG(0), 7 }, + { "PG2", SUNXI_GPG(0), 9 }, + { "PG3", SUNXI_GPG(0), 11 }, + { "PG4", SUNXI_GPG(0), 13 }, + { "PG5", SUNXI_GPG(0), 15 }, + { "PG6", SUNXI_GPG(0), 17 }, + { "PG7", SUNXI_GPG(0), 19 }, + { "PG8", SUNXI_GPG(0), 21 }, + { "PG9", SUNXI_GPG(0), 23 }, + { "PG10", SUNXI_GPG(0), 25 }, + { "PG11", SUNXI_GPG(0), 27 }, + { + { 0, 0, 0} + }, + } + }, + + /* + //GPIO 2 +#define PIN_PE0 SUNXI_GPE(0) +#define PIN_PE1 SUNXI_GPE(1) +#define PIN_PI0 SUNXI_GPI(0) +#define PIN_PE2 SUNXI_GPE(2) +#define PIN_PI1 SUNXI_GPI(1) +#define PIN_PE3 SUNXI_GPE(3) +#define PIN_PI2 SUNXI_GPI(2) +#define PIN_PE4 SUNXI_GPE(4) +#define PIN_PI3 SUNXI_GPI(3) +#define PIN_PE5 SUNXI_GPE(5) +#define PIN_PI10 SUNXI_GPI(10) +#define PIN_PE6 SUNXI_GPE(6) +#define PIN_PI11 SUNXI_GPI(11) +#define PIN_PE7 SUNXI_GPE(7) +#define PIN_PC3 SUNXI_GPC(3) +#define PIN_PE8 SUNXI_GPE(8) +#define PIN_PC7 SUNXI_GPC(7) +#define PIN_PE9 SUNXI_GPE(9) +#define PIN_PC16 SUNXI_GPC(16) +#define PIN_PE10 SUNXI_GPE(10) +#define PIN_PC17 SUNXI_GPC(17) +#define PIN_PE11 SUNXI_GPE(11) +#define PIN_PC18 SUNXI_GPC(18) +#define PIN_PI14 SUNXI_GPI(14) +#define PIN_PC23 SUNXI_GPC(23) +#define PIN_PI15 SUNXI_GPI(15) +#define PIN_PC24 SUNXI_GPC(24) +#define PIN_PB23 SUNXI_GPB(23) +#define PIN_PB22 SUNXI_GPB(22) +*/ + {"gpio2", + { + { "PE0", SUNXI_GPE(0), 6 }, + { "PE1", SUNXI_GPE(1), 8 }, + { "PI0", SUNXI_GPI(0), 9 }, + { "PE2", SUNXI_GPE(2), 10 }, + { "PI1", SUNXI_GPI(1), 11 }, + { "PE3", SUNXI_GPE(3), 12 }, + { "PI2", SUNXI_GPI(2), 13 }, + { "PE4", SUNXI_GPE(4), 14 }, + { "PI3", SUNXI_GPI(3), 15 }, + { "PE5", SUNXI_GPE(5), 16 }, + { "PI10", SUNXI_GPI(10), 17 }, + { "PE6", SUNXI_GPE(6), 18 }, + { "PI11", SUNXI_GPI(11), 19 }, + { "PE7", SUNXI_GPE(7), 20 }, + { "PC3", SUNXI_GPC(3), 21 }, + { "PE8", SUNXI_GPE(8), 22 }, + { "PC7", SUNXI_GPC(7), 23 }, + { "PE9", SUNXI_GPE(9), 24 }, + { "PC16", SUNXI_GPC(16), 25 }, + { "PE10", SUNXI_GPE(10), 26 }, + { "PC17", SUNXI_GPC(17), 27 }, + { "PE11", SUNXI_GPE(11), 28 }, + { "PC18", SUNXI_GPC(18), 29 }, + { "PI14", SUNXI_GPI(14), 30 }, + { "PC23", SUNXI_GPC(23), 31 }, + { "PI15", SUNXI_GPI(15), 32 }, + { "PC24", SUNXI_GPC(24), 33 }, + { "PB23", SUNXI_GPB(23), 34 }, + { "PB22", SUNXI_GPB(22), 36 }, + { + { 0, 0, 0} + }, + } + }, + +/* +//GPIO 3 +#define PIN_PH0 SUNXI_GPH(0) +#define PIN_PB3 SUNXI_GPB(3) +#define PIN_PH2 SUNXI_GPH(2) +#define PIN_PB4 SUNXI_GPB(4) +#define PIN_PH7 SUNXI_GPH(7) +#define PIN_PB5 SUNXI_GPB(5) +#define PIN_PH9 SUNXI_GPH(9) +#define PIN_PB6 SUNXI_GPB(6) +#define PIN_PH10 SUNXI_GPH(10) +#define PIN_PB7 SUNXI_GPB(7) +#define PIN_PH11 SUNXI_GPH(11) +#define PIN_PB8 SUNXI_GPB(8) +#define PIN_PH12 SUNXI_GPH(12) +#define PIN_PB10 SUNXI_GPB(10) +#define PIN_PH13 SUNXI_GPH(13) +#define PIN_PB11 SUNXI_GPB(11) +#define PIN_PH14 SUNXI_GPH(14) +#define PIN_PB12 SUNXI_GPB(12) +#define PIN_PH15 SUNXI_GPH(15) +#define PIN_PB13 SUNXI_GPB(13) +#define PIN_PH16 SUNXI_GPH(16) +#define PIN_PB14 SUNXI_GPB(14) +#define PIN_PH17 SUNXI_GPH(17) +#define PIN_PB15 SUNXI_GPB(15) +#define PIN_PH18 SUNXI_GPH(18) +#define PIN_PB16 SUNXI_GPB(16) +#define PIN_PH19 SUNXI_GPH(19) +#define PIN_PB17 SUNXI_GPB(17) +#define PIN_PH20 SUNXI_GPH(20) +#define PIN_PH24 SUNXI_GPH(24) +#define PIN_PH21 SUNXI_GPH(21) +#define PIN_PH25 SUNXI_GPH(25) +#define PIN_PH22 SUNXI_GPH(22) +#define PIN_PH26 SUNXI_GPH(26) +#define PIN_PH23 SUNXI_GPH(23) +#define PIN_PH27 SUNXI_GPH(27) +*/ + {"gpio3", + { + { "PH0", SUNXI_GPH(0), 5 }, + { "PB3", SUNXI_GPB(3), 6 }, + { "PH2", SUNXI_GPH(2), 7 }, + { "PB4", SUNXI_GPB(4), 8 }, + { "PH7", SUNXI_GPH(7), 9 }, + { "PB5", SUNXI_GPB(5), 10 }, + { "PH9", SUNXI_GPH(9), 11 }, + { "PB6", SUNXI_GPB(6), 12 }, + { "PH10", SUNXI_GPH(10), 13 }, + { "PB7", SUNXI_GPB(7), 14 }, + { "PH11", SUNXI_GPH(11), 15 }, + { "PB8", SUNXI_GPB(8), 16 }, + { "PH12", SUNXI_GPH(12), 17 }, + { "PB10", SUNXI_GPB(10), 18 }, + { "PH13", SUNXI_GPH(13), 19 }, + { "PB11", SUNXI_GPB(11), 20 }, + { "PH14", SUNXI_GPH(14), 21 }, + { "PB12", SUNXI_GPB(12), 22 }, + { "PH15", SUNXI_GPH(15), 23 }, + { "PB13", SUNXI_GPB(13), 24 }, + { "PH16", SUNXI_GPH(16), 25 }, + { "PB14", SUNXI_GPB(14), 26 }, + { "PH17", SUNXI_GPH(17), 27 }, + { "PB15", SUNXI_GPB(15), 28 }, + { "PH18", SUNXI_GPH(18), 29 }, + { "PB16", SUNXI_GPB(16), 30 }, + { "PH19", SUNXI_GPH(19), 31 }, + { "PB17", SUNXI_GPB(17), 32 }, + { "PH20", SUNXI_GPH(20), 33 }, + { "PH24", SUNXI_GPH(24), 34 }, + { "PH21", SUNXI_GPH(21), 35 }, + { "PH25", SUNXI_GPH(25), 36 }, + { "PH22", SUNXI_GPH(22), 37 }, + { "PH26", SUNXI_GPH(26), 38 }, + { "PH23", SUNXI_GPH(23), 39 }, + { "PH27", SUNXI_GPH(27), 40 }, + { + { 0, 0, 0} + }, + } + }, + + + {"uext1", + { + { "PI12", SUNXI_GPI(12), 3 }, + { "PI13", SUNXI_GPI(13), 4 }, + { "PB20", SUNXI_GPB(20), 5 }, + { "PB21", SUNXI_GPB(21), 6 }, + { "PC22", SUNXI_GPC(22), 7 }, + { "PC21", SUNXI_GPC(21), 8 }, + { "PC20", SUNXI_GPC(20), 9 }, + { "PC19", SUNXI_GPC(19), 10 }, + { + { 0, 0, 0} + }, + } + }, + + {"uext2", + { + { "PI20", SUNXI_GPI(20), 3 }, + { "PI21", SUNXI_GPI(21), 4 }, + { "PB18", SUNXI_GPB(18), 5 }, + { "PB19", SUNXI_GPB(19), 6 }, + { "PI19", SUNXI_GPI(19), 7 }, + { "PI18", SUNXI_GPI(18), 8 }, + { "PI17", SUNXI_GPI(17), 9 }, + { "PI16", SUNXI_GPI(16), 10 }, + { + { 0, 0, 0} + }, + } + }, +}; + + + +#endif \ No newline at end of file diff --git a/recipes-devtools/python/pyA20_0.2.0.bb b/recipes-devtools/python/pyA20_0.2.0.bb index 49bd543..437ff03 100644 --- a/recipes-devtools/python/pyA20_0.2.0.bb +++ b/recipes-devtools/python/pyA20_0.2.0.bb @@ -6,10 +6,15 @@ LIC_FILES_CHKSUM = "file://PKG-INFO;md5=b4cb7d5da6f1efc1d0bf487169e83985" SRC_URI = "http://pypi.python.org/packages/source/p/pyA20/pyA20-${PV}.tar.gz \ file://setup.py.patch \ + file://mapping.h \ " S = "${WORKDIR}/pyA20-${PV}" inherit distutils +do_compile_prepend() { +cp ${WORKDIR}/mapping.h ${S}/pyA20/gpio/mapping.h +} + SRC_URI[md5sum] = "b4115859834f09ebd389f810f2ffefb9" SRC_URI[sha256sum] = "9855747d9bbdfcce6b460fcd67d953155e39f4e002a9a4c573910248b451dad8" From 31b7c4c8e26add259f1d73731b5f4a12fa5812d6 Mon Sep 17 00:00:00 2001 From: Jens Lucius Date: Fri, 28 Nov 2014 17:37:05 +0100 Subject: [PATCH 3/3] python: pyA20 depend on python and only for olimex boards Add dependency on python and COMPATIBLE_MACHINE as pyA20 is only compatible to three olimex boards right now. Signed-off-by: Jens Lucius --- recipes-devtools/python/pyA20_0.2.0.bb | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/recipes-devtools/python/pyA20_0.2.0.bb b/recipes-devtools/python/pyA20_0.2.0.bb index 437ff03..62b3117 100644 --- a/recipes-devtools/python/pyA20_0.2.0.bb +++ b/recipes-devtools/python/pyA20_0.2.0.bb @@ -3,6 +3,10 @@ HOMEPAGE = "https://pypi.python.org/pypi/pyA20" SECTION = "devel/python" LICENSE = "MIT" LIC_FILES_CHKSUM = "file://PKG-INFO;md5=b4cb7d5da6f1efc1d0bf487169e83985" +DEPENDS = "python" + +# No GPIO mappings for other machines yet +COMPATIBLE_MACHINE = "(olinuxino-a13|olinuxino-a10|olinuxino-a20)" SRC_URI = "http://pypi.python.org/packages/source/p/pyA20/pyA20-${PV}.tar.gz \ file://setup.py.patch \