diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/add-nodes-for-sunxi-info-addr-dump-reg.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/add-nodes-for-sunxi-info-addr-dump-reg.patch
new file mode 100644
index 0000000..9e51894
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/add-nodes-for-sunxi-info-addr-dump-reg.patch
@@ -0,0 +1,72 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: The-going <48602507+The-going@users.noreply.github.com>
+Date: Sat, 16 Apr 2022 11:51:35 +0300
+Subject: add nodes for sunxi-info, sunxi-addr and sunxi-dump-reg
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 ++++++++++
+ 1 file changed, 19 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+index 538c90663602..6365cce07304 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -1243,6 +1243,25 @@ ths: thermal-sensor@5070400 {
+ 			nvmem-cell-names = "calibration";
+ 			#thermal-sensor-cells = <1>;
+ 		};
++
++		sunxi-info {
++			compatible = "allwinner,sun50i-h6-sys-info";
++			status = "okay";
++		};
++
++		addr_mgt: addr-mgt {
++			compatible = "allwinner,sunxi-addr_mgt";
++			type_addr_wifi = <0x2>;
++			type_addr_bt = <0x2>;
++			type_addr_eth = <0x2>;
++			status = "okay";
++		};
++
++		dump_reg: dump_reg@20000 {
++			compatible = "allwinner,sunxi-dump-reg";
++			reg = <0x0 0x03001000 0x0 0x0f20>;
++			status = "okay";
++		};
+ 	};
+ 
+ 	thermal-zones {
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 98735d39e6e8..5ff1b357a25b 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -1053,6 +1053,25 @@ ths: thermal-sensor@5070400 {
+ 			nvmem-cell-names = "calibration";
+ 			#thermal-sensor-cells = <1>;
+ 		};
++
++		dump_reg: dump_reg@20000 {
++			compatible = "allwinner,sunxi-dump-reg";
++			reg = <0x0 0x03001000 0x0 0x0f20>;
++			status = "okay";
++		};
++
++		sunxi-info {
++			compatible = "allwinner,sun50i-h616-sys-info";
++			status = "okay";
++		};
++
++		addr_mgt: addr-mgt {
++			compatible = "allwinner,sunxi-addr_mgt";
++			type_addr_wifi = <0x2>;
++			type_addr_bt = <0x2>;
++			type_addr_eth = <0x2>;
++			status = "okay";
++		};
+ 	};
+ 
+ 	thermal-zones {
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Add-device-node-for-SID.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Add-device-node-for-SID.patch
new file mode 100644
index 0000000..e04954a
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Add-device-node-for-SID.patch
@@ -0,0 +1,41 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Kali Prasad <kprasadvnsi@protonmail.com>
+Date: Sun, 19 Sep 2021 08:02:27 +0000
+Subject: arm64: dts: allwinner: h616: Add device node for SID
+
+The device tree binding for H616's SID controller.
+
+Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 15 ++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 45359b0d317a..7ad1982fb47f 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -171,6 +171,21 @@ ccu: clock@3001000 {
+ 			#reset-cells = <1>;
+ 		};
+ 
++		sid: efuse@3006000 {
++			compatible = "allwinner,sun50i-h616-sid";
++			reg = <0x03006000 0x1000>;
++			#address-cells = <1>;
++			#size-cells = <1>;
++
++			cpu_speed_grade: cpu-speed-grade@0 {
++				reg = <0x00 0x02>;
++			};
++
++			ths_calibration: thermal-sensor-calibration@14 {
++				reg = <0x14 0x8>;
++			};
++		};
++
+ 		watchdog: watchdog@30090a0 {
+ 			compatible = "allwinner,sun50i-h616-wdt",
+ 				     "allwinner,sun6i-a31-wdt";
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch
new file mode 100644
index 0000000..fea28a8
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch
@@ -0,0 +1,473 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: AGM1968 <AGM1968@users.noreply.github.com>
+Date: Tue, 23 May 2023 16:43:00 +0000
+Subject: arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2
+ arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
+ arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
+ arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+ drivers/cpufreq/cpufreq-dt-platdev.c drivers/cpufreq/sun50i-cpufreq-nvmem.c
+
+Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi       | 75 ++++++++
+ arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi      | 64 +++++++++++++
+ arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi |  1 +
+ arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts |  5 +
+ arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 62 ++-----------
+ drivers/cpufreq/cpufreq-dt-platdev.c                         |  2 +
+ drivers/cpufreq/sun50i-cpufreq-nvmem.c                       | 92 +++++++---
+ 7 files changed, 221 insertions(+), 80 deletions(-)
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
+ 
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
+new file mode 100644
+index 000000000000..36f2950367c6
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
+@@ -0,0 +1,75 @@
++//SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++//Testing Version 1  from: AGM1968 <AGM1968@users.noreply.github.com>
++//Noted: PLL_CPUX = 24 MHz*N/P (WIP)
++
++/ {
++	cpu_opp_table: opp-table-cpu {
++		compatible = "allwinner,sun50i-h616-operating-points";
++		nvmem-cells = <&cpu_speed_grade>;
++		opp-shared;
++ 
++		opp-480000000 {
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-hz = /bits/ 64 <480000000>;
++			opp-microvolt-speed0 = <820000 820000 1100000>; 
++			opp-microvolt-speed1 = <880000 880000 1100000>;
++			opp-microvolt-speed2 = <880000 880000 1100000>;
++		};
++	
++		opp-600000000 {
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-hz = /bits/ 64 <600000000>;
++			opp-microvolt-speed0 = <820000 820000 1100000>;
++			opp-microvolt-speed1 = <880000 880000 1100000>;
++			opp-microvolt-speed2 = <880000 880000 1100000>;
++		};
++
++		opp-792000000 {
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-hz = /bits/ 64 <792000000>;
++		        opp-microvolt-speed0 = <860000 860000 1100000>;
++			opp-microvolt-speed1 = <940000 940000 1100000>;
++			opp-microvolt-speed2 = <940000 940000 1100000>;
++		};
++
++		opp-1008000000 {
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-hz = /bits/ 64 <1008000000>;
++			opp-microvolt-speed0 = <900000 900000 1100000>;
++			opp-microvolt-speed1 = <1020000 1020000 1100000>;
++			opp-microvolt-speed2 = <1020000 1020000 1100000>;
++		};
++
++		opp-1200000000 {
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-hz = /bits/ 64 <1200000000>;
++			opp-microvolt-speed0 = <960000 960000 1100000>;
++			opp-microvolt-speed1 = <1100000 1100000 1100000>;
++			opp-microvolt-speed2 = <1100000 1100000 1100000>;
++		};
++
++		opp-1512000000 {
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			opp-hz = /bits/ 64 <1512000000>;
++			opp-microvolt-speed0 = <1100000 1100000 1100000>;
++			opp-microvolt-speed1 = <1100000 1100000 1100000>;
++			opp-microvolt-speed2 = <1100000 1100000 1100000>;
++		};
++	};
++};
++
++&cpu0 {
++	operating-points-v2 = <&cpu_opp_table>;
++};
++ 
++&cpu1 {
++	operating-points-v2 = <&cpu_opp_table>;
++};
++ 
++&cpu2 {
++	operating-points-v2 = <&cpu_opp_table>;
++};
++ 
++&cpu3 {
++	operating-points-v2 = <&cpu_opp_table>;
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+index 0666d16ba7d0..54d706286554 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+@@ -7,6 +7,7 @@
+  */
+ 
+ #include "sun50i-h616.dtsi"
++#include "sun50i-h616-cpu-opp.dtsi"
+ 
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+index 8d8009c7f9a3..41a5a4013091 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+@@ -12,6 +12,11 @@ / {
+ 	compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
+ };
+ 
++&cpu0  {
++	cpu-supply = <&reg_dcdca>;
++	status = "okay";
++};
++
+ &emac0 {
+ 	phy-supply = <&reg_dcdce>;
+ };
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
+new file mode 100644
+index 0000000000000..0509e3fb22e26
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-cpu-dvfs.dtsi
+@@ -0,0 +1,64 @@
++
++
++&r_i2c {
++	status = "okay";
++
++	axp313: pmic@36 {
++		compatible = "x-powers,axp313a";
++		reg = <0x36>;
++		#interrupt-cells = <1>;
++		interrupt-controller;
++		interrupt-parent = <&pio>;
++		interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>;	/* PC9 */
++
++		vin1-supply = <&reg_vcc5v>;
++		vin2-supply = <&reg_vcc5v>;
++		vin3-supply = <&reg_vcc5v>;
++
++		regulators {
++			/* Supplies VCC-PLL and DRAM */
++			reg_aldo1: aldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc1v8";
++			};
++
++			/* Supplies VCC-IO, so needs to be always on. */
++			reg_dldo1: dldo1 {
++				regulator-always-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc3v3";
++			};
++
++			reg_dcdc1: dcdc1 {
++				regulator-always-on;
++				regulator-min-microvolt = <810000>;
++				regulator-max-microvolt = <990000>;
++				regulator-step-delay-us = <25>;
++				regulator-final-delay-us = <50>;
++				regulator-name = "vdd-gpu-sys";
++			};
++
++			reg_dcdc2: dcdc2 {
++				regulator-always-on;
++				regulator-min-microvolt = <500000>;
++				regulator-max-microvolt = <1100000>;
++				regulator-step-delay-us = <25>;
++				regulator-final-delay-us = <50>;
++				regulator-ramp-delay = <200>;
++				regulator-name = "vdd-cpu";
++			};
++
++			reg_dcdc3: dcdc3 {
++				regulator-always-on;
++				regulator-min-microvolt = <1100000>;
++				regulator-max-microvolt = <1100000>;
++				regulator-step-delay-us = <25>;
++				regulator-final-delay-us = <50>;
++				regulator-name = "vdd-dram";
++			};
++		};
++	};
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
+index 00fe28caac93..edbfc83f390a 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
+@@ -6,12 +6,18 @@
+ /dts-v1/;
+ 
+ #include "sun50i-h616-orangepi-zero.dtsi"
++#include "sun50i-h618-cpu-dvfs.dtsi"
+ 
+ / {
+ 	model = "OrangePi Zero3";
+ 	compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
+ };
+ 
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
++	status = "okay";
++};
++
+ &emac0 {
+ 	phy-supply = <&reg_dldo1>;
+ };
+@@ -31,62 +37,6 @@ &mmc0 {
+ 	vmmc-supply = <&reg_dldo1>;
+ };
+ 
+-&r_i2c {
+-	status = "okay";
+-
+-	axp313: pmic@36 {
+-		compatible = "x-powers,axp313a";
+-		reg = <0x36>;
+-		#interrupt-cells = <1>;
+-		interrupt-controller;
+-		interrupt-parent = <&pio>;
+-		interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>;	/* PC9 */
+-
+-		vin1-supply = <&reg_vcc5v>;
+-		vin2-supply = <&reg_vcc5v>;
+-		vin3-supply = <&reg_vcc5v>;
+-
+-		regulators {
+-			/* Supplies VCC-PLL, so needs to be always on. */
+-			reg_aldo1: aldo1 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <1800000>;
+-				regulator-max-microvolt = <1800000>;
+-				regulator-name = "vcc1v8";
+-			};
+-
+-			/* Supplies VCC-IO, so needs to be always on. */
+-			reg_dldo1: dldo1 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <3300000>;
+-				regulator-max-microvolt = <3300000>;
+-				regulator-name = "vcc3v3";
+-			};
+-
+-			reg_dcdc1: dcdc1 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <810000>;
+-				regulator-max-microvolt = <990000>;
+-				regulator-name = "vdd-gpu-sys";
+-			};
+-
+-			reg_dcdc2: dcdc2 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <810000>;
+-				regulator-max-microvolt = <1100000>;
+-				regulator-name = "vdd-cpu";
+-			};
+-
+-			reg_dcdc3: dcdc3 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <1100000>;
+-				regulator-max-microvolt = <1100000>;
+-				regulator-name = "vdd-dram";
+-			};
+-		};
+-	};
+-};
+-
+ &pio {
+ 	vcc-pc-supply = <&reg_dldo1>;
+ 	vcc-pf-supply = <&reg_dldo1>;
+diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
+index fb2875ce1fdd..e63d36839769 100644
+--- a/drivers/cpufreq/cpufreq-dt-platdev.c
++++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+@@ -104,6 +104,8 @@ static const struct of_device_id allowlist[] __initconst = {
+  */
+ static const struct of_device_id blocklist[] __initconst = {
+ 	{ .compatible = "allwinner,sun50i-h6", },
++	{ .compatible = "allwinner,sun50i-h616", },
++	{ .compatible = "allwinner,sun50i-h618", },
+ 
+ 	{ .compatible = "apple,arm-platform", },
+ 
+diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+index 6845ab5034ec..5d85bfe475de 100644
+--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
++++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+@@ -6,6 +6,9 @@
+  * provide the OPP framework with required information.
+  *
+  * Copyright (C) 2019 Yangtao Li <tiny.windzz@gmail.com>
++ *
++ * ADD efuse_xlate to extract SoC version so that h6 and h616 can coexist.
++ * Version 1 AGM1968 <AGM1968@users.noreply.github.com>
+  */
+ 
+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+@@ -20,25 +23,62 @@
+ 
+ #define MAX_NAME_LEN	7
+ 
+-#define NVMEM_MASK	0x7
+-#define NVMEM_SHIFT	5
++#define SUN50I_H616_NVMEM_MASK 0x22
++#define SUN50I_H616_NVMEM_SHIFT 5
++#define SUN50I_H6_NVMEM_MASK 0x7
++#define SUN50I_H6_NVMEM_SHIFT 5
++
++struct sunxi_cpufreq_soc_data {
++	u32 (*efuse_xlate) (void *efuse);
++};
+ 
+ static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
+ 
++static u32 sun50i_h616_efuse_xlate(void *efuse)
++{
++   u32 efuse_value = (*(u32 *)efuse >> SUN50I_H616_NVMEM_SHIFT) &
++             SUN50I_H616_NVMEM_MASK;
++
++   /* Tested as V1 h616 soc. Expected efuse values are 1 - 3,
++      slowest to fastest */
++   if (efuse_value >=1 && efuse_value <= 3)
++       return efuse_value - 1;
++   else
++       return 0;
++};
++
++static u32 sun50i_h6_efuse_xlate(void *efuse)
++{
++   u32 efuse_value = (*(u32 *)efuse >> SUN50I_H6_NVMEM_SHIFT) &
++             SUN50I_H6_NVMEM_MASK;
++
++   /*
++    * We treat unexpected efuse values as if the SoC was from
++    * the slowest bin. Expected efuse values are 1 - 3, slowest
++    * to fastest.
++   */
++   if (efuse_value >= 1 && efuse_value <= 3)
++       return efuse_value - 1;
++   else
++       return 0;
++};
++
++
+ /**
+  * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
++ * @soc_data: pointer to sunxi_cpufreq_soc_data context
+  * @versions: Set to the value parsed from efuse
+  *
+  * Returns 0 if success.
+  */
+-static int sun50i_cpufreq_get_efuse(u32 *versions)
++static int sun50i_cpufreq_get_efuse(const struct sunxi_cpufreq_soc_data *soc_data,
++		u32 *versions)
+ {
+ 	struct nvmem_cell *speedbin_nvmem;
+ 	struct device_node *np;
+ 	struct device *cpu_dev;
+-	u32 *speedbin, efuse_value;
++	u32 *speedbin;
+ 	size_t len;
+-	int ret;
+ 
+ 	cpu_dev = get_cpu_device(0);
+ 	if (!cpu_dev)
+@@ -47,10 +87,9 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
+ 	np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
+ 	if (!np)
+ 		return -ENOENT;
+-
+-	ret = of_device_is_compatible(np,
+-				      "allwinner,sun50i-h6-operating-points");
+-	if (!ret) {
++	if (of_device_is_compatible(np, "allwinner,sun50i-h6-operating-points")) {}
++	else if (of_device_is_compatible(np, "allwinner,sun50i-h616-operating-points")) {}
++	else {
+ 		of_node_put(np);
+ 		return -ENOENT;
+ 	}
+@@ -66,17 +105,7 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
+ 	if (IS_ERR(speedbin))
+ 		return PTR_ERR(speedbin);
+ 
+-	efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
+-
+-	/*
+-	 * We treat unexpected efuse values as if the SoC was from
+-	 * the slowest bin. Expected efuse values are 1-3, slowest
+-	 * to fastest.
+-	 */
+-	if (efuse_value >= 1 && efuse_value <= 3)
+-		*versions = efuse_value - 1;
+-	else
+-		*versions = 0;
++	*versions = soc_data->efuse_xlate(speedbin);
+ 
+ 	kfree(speedbin);
+ 	return 0;
+@@ -84,18 +113,23 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
+ 
+ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)
+ {
++	const struct of_device_id *match;
+ 	int *opp_tokens;
+ 	char name[MAX_NAME_LEN];
+ 	unsigned int cpu;
+ 	u32 speed = 0;
+ 	int ret;
+ 
++	match = dev_get_platdata(&pdev->dev);
++	if (!match)
++		return -EINVAL;
++
+ 	opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens),
+ 			     GFP_KERNEL);
+ 	if (!opp_tokens)
+ 		return -ENOMEM;
+ 
+-	ret = sun50i_cpufreq_get_efuse(&speed);
++	ret = sun50i_cpufreq_get_efuse(match-> data, &speed);
+ 	if (ret) {
+ 		kfree(opp_tokens);
+ 		return ret;
+@@ -159,8 +193,18 @@ static struct platform_driver sun50i_cpufreq_driver = {
+ 	},
+ };
+ 
++static const struct sunxi_cpufreq_soc_data sun50i_h616_data = {
++    .efuse_xlate = sun50i_h616_efuse_xlate,
++};
++
++static const struct sunxi_cpufreq_soc_data sun50i_h6_data = {
++    .efuse_xlate = sun50i_h6_efuse_xlate,
++};
++
+ static const struct of_device_id sun50i_cpufreq_match_list[] = {
+-	{ .compatible = "allwinner,sun50i-h6" },
++	{ .compatible = "allwinner,sun50i-h6", .data = &sun50i_h6_data },
++        { .compatible = "allwinner,sun50i-h616", .data = &sun50i_h616_data },
++        { .compatible = "allwinner,sun50i-h618", .data = &sun50i_h616_data },
+ 	{}
+ };
+ MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list);
+@@ -196,8 +239,8 @@ static int __init sun50i_cpufreq_init(void)
+ 		return ret;
+ 
+ 	sun50i_cpufreq_pdev =
+-		platform_device_register_simple("sun50i-cpufreq-nvmem",
+-						-1, NULL, 0);
++		platform_device_register_data(NULL,
++		"sun50i-cpufreq-nvmem", -1, match, sizeof(*match));
+ 	ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev);
+ 	if (ret == 0)
+ 		return 0;
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch
new file mode 100644
index 0000000..887bd51
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch
@@ -0,0 +1,135 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Kali Prasad <kprasadvnsi@protonmail.com>
+Date: Sun, 19 Sep 2021 08:02:27 +0000
+Subject: arm64: dts: allwinner: h616: Add thermal sensor and thermal zones
+
+There are four sensors, CPU, GPU, VE, and DDR.
+
+Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 75 ++++++++++
+ 1 file changed, 75 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 7ad1982fb47f..8628a9e3dfca 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -9,6 +9,7 @@
+ #include <dt-bindings/clock/sun6i-rtc.h>
+ #include <dt-bindings/reset/sun50i-h616-ccu.h>
+ #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
++#include <dt-bindings/thermal/thermal.h>
+ 
+ / {
+ 	interrupt-parent = <&gic>;
+@@ -25,6 +26,8 @@ cpu0: cpu@0 {
+ 			reg = <0>;
+ 			enable-method = "psci";
+ 			clocks = <&ccu CLK_CPUX>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			#cooling-cells = <2>;
+ 		};
+ 
+ 		cpu1: cpu@1 {
+@@ -33,6 +36,8 @@ cpu1: cpu@1 {
+ 			reg = <1>;
+ 			enable-method = "psci";
+ 			clocks = <&ccu CLK_CPUX>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			#cooling-cells = <2>;
+ 		};
+ 
+ 		cpu2: cpu@2 {
+@@ -41,6 +46,8 @@ cpu2: cpu@2 {
+ 			reg = <2>;
+ 			enable-method = "psci";
+ 			clocks = <&ccu CLK_CPUX>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			#cooling-cells = <2>;
+ 		};
+ 
+ 		cpu3: cpu@3 {
+@@ -49,6 +56,8 @@ cpu3: cpu@3 {
+ 			reg = <3>;
+ 			enable-method = "psci";
+ 			clocks = <&ccu CLK_CPUX>;
++			clock-latency-ns = <244144>; /* 8 32k periods */
++			#cooling-cells = <2>;
+ 		};
+ 	};
+ 
+@@ -833,5 +842,71 @@ r_rsb: rsb@7083000 {
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
+ 		};
++
++		ths: thermal-sensor@5070400 {
++			compatible = "allwinner,sun50i-h616-ths";
++			reg = <0x05070400 0x400>;
++			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_THS>;
++			clock-names = "bus";
++			resets = <&ccu RST_BUS_THS>;
++			nvmem-cells = <&ths_calibration>;
++			nvmem-cell-names = "calibration";
++			#thermal-sensor-cells = <1>;
++		};
++	};
++
++	thermal-zones {
++		cpu-thermal {
++			polling-delay-passive = <500>;
++			polling-delay = <1000>;
++			thermal-sensors = <&ths 2>;
++			sustainable-power = <1000>;
++			k_po = <20>;
++			k_pu = <40>;
++			k_i = <0>;
++
++			trips {
++				cpu_threshold: trip-point@0 {
++					temperature = <60000>;
++					type = "passive";
++					hysteresis = <0>;
++				};
++				cpu_target: trip-point@1 {
++					temperature = <70000>;
++					type = "passive";
++					hysteresis = <0>;
++				};
++			};
++
++			cooling-maps {
++				map0 {
++					trip = <&cpu_target>;
++					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
++							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
++							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
++							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
++				};
++			};
++		};
++
++		gpu-thermal {
++			polling-delay-passive = <500>;
++			polling-delay = <1000>;
++			thermal-sensors = <&ths 0>;
++			sustainable-power = <1100>;
++		};
++
++		ve-thermal {
++			polling-delay-passive = <0>;
++			polling-delay = <0>;
++			thermal-sensors = <&ths 1>;
++		};
++
++		ddr-thermal {
++			polling-delay-passive = <0>;
++			polling-delay = <0>;
++			thermal-sensors = <&ths 3>;
++		};
+ 	};
+ };
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch
new file mode 100644
index 0000000..053809e
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch
@@ -0,0 +1,73 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Micha=C5=82=20Dzieko=C5=84ski?=
+ <michal.dziekonski+github@gmail.com>
+Date: Wed, 3 May 2023 12:17:28 +0000
+Subject: arm64: dts: allwinner: h616: Fix thermal zones (add missing trips)
+
+Signed-off-by: Michal Dziekonski <michal.dziekonski+github@gmail.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 29 ++++++++++
+ 1 file changed, 29 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 8628a9e3dfca..17b13d3193cc 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -877,6 +877,11 @@ cpu_target: trip-point@1 {
+ 					type = "passive";
+ 					hysteresis = <0>;
+ 				};
++				cpu_temp_critical: trip-point@2 {
++					temperature = <110000>;
++					type = "critical";
++					hysteresis = <0>;
++				};
+ 			};
+ 
+ 			cooling-maps {
+@@ -895,18 +900,42 @@ gpu-thermal {
+ 			polling-delay = <1000>;
+ 			thermal-sensors = <&ths 0>;
+ 			sustainable-power = <1100>;
++
++			trips {
++				gpu_temp_critical: trip-point@0 {
++					temperature = <110000>;
++					type = "critical";
++					hysteresis = <0>;
++				};
++			};
+ 		};
+ 
+ 		ve-thermal {
+ 			polling-delay-passive = <0>;
+ 			polling-delay = <0>;
+ 			thermal-sensors = <&ths 1>;
++
++			trips {
++				ve_temp_critical: trip-point@0 {
++					temperature = <110000>;
++					type = "critical";
++					hysteresis = <0>;
++				};
++			};
+ 		};
+ 
+ 		ddr-thermal {
+ 			polling-delay-passive = <0>;
+ 			polling-delay = <0>;
+ 			thermal-sensors = <&ths 3>;
++
++			trips {
++				ddr_temp_critical: trip-point@0 {
++					temperature = <110000>;
++					type = "critical";
++					hysteresis = <0>;
++				};
++			};
+ 		};
+ 	};
+ };
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-LED-green_power_on-red_status_heartbeat.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-LED-green_power_on-red_status_heartbeat.patch
new file mode 100644
index 0000000..926bb7d
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-h616-LED-green_power_on-red_status_heartbeat.patch
@@ -0,0 +1,39 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: AGM1968 <AGM1968@users.noreply.github.com>
+Date: Wed, 31 May 2023 08:12:00 +0000
+Subject: LED-green_power_on-red_status_heartbeat
+ arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+
+Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+index 0666d16ba7d0..19451a0c85ae 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+@@ -26,16 +26,17 @@ leds {
+ 		compatible = "gpio-leds";
+ 
+ 		led-0 {
+-			function = LED_FUNCTION_POWER;
++			function = LED_FUNCTION_STATUS;
+ 			color = <LED_COLOR_ID_RED>;
+ 			gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+-			default-state = "on";
++			linux,default-trigger = "heartbeat";
+ 		};
+ 
+ 		led-1 {
+-			function = LED_FUNCTION_STATUS;
++			function = LED_FUNCTION_POWER;
+ 			color = <LED_COLOR_ID_GREEN>;
+ 			gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
++			default-state = "on";
+ 		};
+ 	};
+ 
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-Add-GPU-node.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-Add-GPU-node.patch
new file mode 100644
index 0000000..35b3a15
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-Add-GPU-node.patch
@@ -0,0 +1,38 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@gmail.com>
+Date: Fri, 15 Oct 2021 21:07:46 +0200
+Subject: arm64:dts: allwinner: sun50i-h616 Add GPU node
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 14 ++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 44f8ae11ca16..26ef79c5d895 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -108,6 +108,20 @@ soc {
+ 		#size-cells = <1>;
+ 		ranges = <0x0 0x0 0x0 0x40000000>;
+ 
++		gpu: gpu@1800000 {
++			compatible = "allwinner,sun50i-h616-mali",
++				     "arm,mali-bifrost";
++			reg = <0x1800000 0x40000>;
++			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "job", "mmu", "gpu";
++			clocks = <&ccu CLK_GPU0>, <&ccu CLK_BUS_GPU>;
++			clock-names = "core", "bus";
++			resets = <&ccu RST_BUS_GPU>;
++			status = "disabled";
++		};
++
+ 		syscon: syscon@3000000 {
+ 			compatible = "allwinner,sun50i-h616-system-control";
+ 			reg = <0x03000000 0x1000>;
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-Add-VPU-node.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-Add-VPU-node.patch
new file mode 100644
index 0000000..507ad19
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-Add-VPU-node.patch
@@ -0,0 +1,55 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@gmail.com>
+Date: Fri, 15 Oct 2021 21:14:55 +0200
+Subject: arm64:dts:allwinner: sun50i-h616 Add VPU node
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 24 ++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 26ef79c5d895..944ff2747d27 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -122,6 +122,17 @@ gpu: gpu@1800000 {
+ 			status = "disabled";
+ 		};
+ 
++		video-codec@1c0e000 {
++			compatible = "allwinner,sun50i-h616-video-engine";
++			reg = <0x01c0e000 0x2000>;
++			clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
++				 <&ccu CLK_MBUS_VE>;
++			clock-names = "ahb", "mod", "ram";
++			resets = <&ccu RST_BUS_VE>;
++			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
++			allwinner,sram = <&ve_sram 1>;
++		};
++
+ 		syscon: syscon@3000000 {
+ 			compatible = "allwinner,sun50i-h616-system-control";
+ 			reg = <0x03000000 0x1000>;
+@@ -136,6 +147,19 @@ sram_c: sram@28000 {
+ 				#size-cells = <1>;
+ 				ranges = <0 0x00028000 0x30000>;
+ 			};
++
++			sram_c1: sram@1a00000 {
++				compatible = "mmio-sram";
++				reg = <0x01a00000 0x200000>;
++				#address-cells = <1>;
++				#size-cells = <1>;
++				ranges = <0 0x01a00000 0x200000>;
++
++				ve_sram: sram-section@0 {
++					compatible = "allwinner,sun50i-h616-sram-c1";
++					reg = <0x000000 0x200000>;
++				};
++			};
+ 		};
+ 
+ 		ccu: clock@3001000 {
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch
new file mode 100644
index 0000000..fe1bd5c
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch
@@ -0,0 +1,39 @@
+From a3e54a502cf754b148a8ad06580a3c256bc42b09 Mon Sep 17 00:00:00 2001
+From: Patrick Yavitz <pyavitz@xxxxx.com>
+Date: Thu, 22 Feb 2024 19:31:11 -0500
+Subject: [PATCH] arch: arm64: dts: allwinner: sun50i-h616: PG 12c pins
+
+pins = "PG17", "PG18";
+pins = "PG15", "PG16";
+
+Signed-off-by: Patrick Yavitz <pyavitz@xxxxx.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 17df57e2db0a..e5ce4214a43b 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -334,6 +334,18 @@ i2c4_ph_pins: i2c4-ph-pins {
+ 				function = "i2c4";
+ 			};
+ 
++			/omit-if-no-ref/
++			i2c3_pg_pins: i2c3-pg-pins {
++				pins = "PG17", "PG18";
++				function = "i2c3";
++			};
++
++			/omit-if-no-ref/
++			i2c4_pg_pins: i2c4-pg-pins {
++				pins = "PG15", "PG16";
++				function = "i2c4";
++			};
++
+ 			ir_rx_pin: ir-rx-pin {
+ 				pins = "PH10";
+ 				function = "ir_rx";
+-- 
+2.39.2
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch
new file mode 100644
index 0000000..ddac57e
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch
@@ -0,0 +1,30 @@
+From 64b0221e526f6359a39ab3beb9a693dc964b1112 Mon Sep 17 00:00:00 2001
+From: Patrick Yavitz <pyavitz@xxxxx.com>
+Date: Wed, 6 Mar 2024 06:51:01 -0500
+Subject: [PATCH] arch: arm64: dts: allwinner: sun50i-h616: spi1 cs1 pin
+
+Signed-off-by: Patrick Yavitz <pyavitz@xxxxx.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 33f8c758b9e6..1354dca01e78 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -397,6 +397,12 @@ spi1_cs0_pin: spi1-cs0-pin {
+ 				function = "spi1";
+ 			};
+ 
++			/omit-if-no-ref/
++			spi1_cs1_pin: spi1-cs1-pin {
++				pins = "PH9";
++				function = "spi1";
++			};
++
+ 			uart0_ph_pins: uart0-ph-pins {
+ 				pins = "PH0", "PH1";
+ 				function = "uart0";
+-- 
+2.39.2
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-h616-add-wifi-support-for-orange-pi-zero-2.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-h616-add-wifi-support-for-orange-pi-zero-2.patch
new file mode 100644
index 0000000..9b3c700
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-h616-add-wifi-support-for-orange-pi-zero-2.patch
@@ -0,0 +1,69 @@
+From 8e36084386d07a07f755bda978875b1354162019 Mon Sep 17 00:00:00 2001
+From: Gunjan Gupta <viraniac@gmail.com>
+Date: Wed, 13 Dec 2023 19:15:45 +0000
+Subject: [PATCH] arm64: dts: h616: add wifi support for orange pi zero 2 and
+ zero3
+
+---
+ .../allwinner/sun50i-h616-orangepi-zero.dtsi  | 38 +++++++++++++++++++
+ 1 file changed, 38 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+index 19451a0c85ae..400966667d1e 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+@@ -59,6 +59,34 @@ reg_usb1_vbus: regulator-usb1-vbus {
+ 		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
+ 		status = "okay";
+ 	};
++
++	reg_vcc33_wifi: vcc33-wifi {
++		/* Always on 3.3V regulator for WiFi and BT */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc33-wifi";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++		vin-supply = <&reg_vcc5v>;
++	};
++
++	reg_vcc_wifi_io: vcc-wifi-io {
++		/* Always on 1.8V/300mA regulator for WiFi and BT IO */
++		compatible = "regulator-fixed";
++		regulator-name = "vcc-wifi-io";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		regulator-always-on;
++		vin-supply = <&reg_vcc33_wifi>;
++	};
++
++	wifi_pwrseq: wifi-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rtc 1>;
++		clock-names = "osc32k-out";
++		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
++		post-power-on-delay-ms = <200>;
++	};
+ };
+ 
+ &ehci1 {
+@@ -90,6 +118,16 @@ &mmc0 {
+ 	status = "okay";
+ };
+ 
++&mmc1 {
++	vmmc-supply = <&reg_vcc33_wifi>;
++	vqmmc-supply = <&reg_vcc_wifi_io>;
++	mmc-pwrseq = <&wifi_pwrseq>;
++	bus-width = <4>;
++	non-removable;
++	mmc-ddr-1_8v;
++	status = "okay";
++};
++
+ &ohci1 {
+ 	status = "okay";
+ };
+-- 
+2.34.1
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-sun50i-h616-Add-dma-node.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-sun50i-h616-Add-dma-node.patch
new file mode 100644
index 0000000..6eec14d
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-sun50i-h616-Add-dma-node.patch
@@ -0,0 +1,53 @@
+From 8cdd9309fce75995cf3068be5c7ffb65cec51cff Mon Sep 17 00:00:00 2001
+From: Gunjan Gupta <viraniac@gmail.com>
+Date: Wed, 3 Jan 2024 09:53:55 +0000
+Subject: [PATCH] arm64: dts: sun50i-h616: Add dma node
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+index 2424a2827455..e71b79ebced8 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+@@ -170,6 +170,18 @@ mixer0_out_tcon_top_mixer0: endpoint {
+ 			};
+ 		};
+ 
++		dma: dma-controller@3002000 {
++			compatible = "allwinner,sun50i-h6-dma";
++			reg = <0x03002000 0x1000>;
++			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>;
++			clock-names = "bus", "mbus";
++			dma-channels = <16>;
++			dma-requests = <49>;
++			resets = <&ccu RST_BUS_DMA>;
++			#dma-cells = <1>;
++		};
++
+ 		gpu: gpu@1800000 {
+ 			compatible = "allwinner,sun50i-h616-mali",
+ 				     "arm,mali-bifrost";
+@@ -606,6 +618,8 @@ spi0: spi@5010000 {
+ 			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ 			clock-names = "ahb", "mod";
++			dmas = <&dma 22>, <&dma 22>;
++			dma-names = "rx", "tx";
+ 			resets = <&ccu RST_BUS_SPI0>;
+ 			pinctrl-names = "default";
+ 			pinctrl-0 = <&spi0_pins>;
+@@ -621,6 +635,8 @@ spi1: spi@5011000 {
+ 			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
+ 			clock-names = "ahb", "mod";
++			dmas = <&dma 23>, <&dma 23>;
++			dma-names = "rx", "tx";
+ 			resets = <&ccu RST_BUS_SPI1>;
+ 			pinctrl-names = "default";
+ 			pinctrl-0 = <&spi1_pins>;
+-- 
+2.34.1
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-sun50i-h616-orangepi-zero2-Enable-GPU-mali.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-sun50i-h616-orangepi-zero2-Enable-GPU-mali.patch
new file mode 100644
index 0000000..edd0271
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-sun50i-h616-orangepi-zero2-Enable-GPU-mali.patch
@@ -0,0 +1,29 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@gmail.com>
+Date: Fri, 15 Oct 2021 21:09:42 +0200
+Subject: arm64:dts: sun50i-h616-orangepi-zero2 Enable GPU mali
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+index d83852e72f06..8d8009c7f9a3 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+@@ -16,6 +16,11 @@ &emac0 {
+ 	phy-supply = <&reg_dcdce>;
+ };
+ 
++&gpu {
++	mali-supply = <&reg_dcdcc>;
++	status = "okay";
++};
++
+ &mmc0 {
+ 	vmmc-supply = <&reg_dcdce>;
+ };
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-sun50i-h616-orangepi-zero2-reg_usb1_vbus-status-ok.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-sun50i-h616-orangepi-zero2-reg_usb1_vbus-status-ok.patch
new file mode 100644
index 0000000..8ad6814
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/arm64-dts-sun50i-h616-orangepi-zero2-reg_usb1_vbus-status-ok.patch
@@ -0,0 +1,24 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: The-going <48602507+The-going@users.noreply.github.com>
+Date: Wed, 14 Dec 2022 20:15:41 +0300
+Subject: arm64: dts: sun50i-h616-orangepi-zero2: reg_usb1_vbus status ok
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+index 15290e6892fc..0666d16ba7d0 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
+@@ -56,6 +56,7 @@ reg_usb1_vbus: regulator-usb1-vbus {
+ 		vin-supply = <&reg_vcc5v>;
+ 		enable-active-high;
+ 		gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
++		status = "okay";
+ 	};
+ };
+ 
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-nvmem-sunxi_sid-Support-SID-on-H616.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-nvmem-sunxi_sid-Support-SID-on-H616.patch
new file mode 100644
index 0000000..abfb475
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-nvmem-sunxi_sid-Support-SID-on-H616.patch
@@ -0,0 +1,41 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Kali Prasad <kprasadvnsi@protonmail.com>
+Date: Sun, 19 Sep 2021 08:02:27 +0000
+Subject: drv:nvmem:sunxi_sid: Support SID on H616
+
+Add support for H616's SID controller. It supports 4K-bit
+EFUSE.
+
+Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
+---
+ drivers/nvmem/sunxi_sid.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
+index 5d364d85347f..c526fe4abe22 100644
+--- a/drivers/nvmem/sunxi_sid.c
++++ b/drivers/nvmem/sunxi_sid.c
+@@ -204,6 +204,12 @@ static const struct sunxi_sid_cfg sun50i_h6_cfg = {
+ 	.size = 0x200,
+ };
+ 
++static const struct sunxi_sid_cfg sun50i_h616_cfg = {
++	.value_offset = 0x200,
++	.size = 0x100,
++	.need_register_readout = true,
++};
++
+ static const struct of_device_id sunxi_sid_of_match[] = {
+ 	{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
+ 	{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
+@@ -213,6 +219,7 @@ static const struct of_device_id sunxi_sid_of_match[] = {
+ 	{ .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
+ 	{ .compatible = "allwinner,sun50i-h5-sid", .data = &sun50i_a64_cfg },
+ 	{ .compatible = "allwinner,sun50i-h6-sid", .data = &sun50i_h6_cfg },
++	{ .compatible = "allwinner,sun50i-h616-sid", .data = &sun50i_h616_cfg },
+ 	{/* sentinel */},
+ };
+ MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-rtc-sun6i-Add-Allwinner-H616-support.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-rtc-sun6i-Add-Allwinner-H616-support.patch
new file mode 100644
index 0000000..400b4b0
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-rtc-sun6i-Add-Allwinner-H616-support.patch
@@ -0,0 +1,45 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Andre Przywara <andre.przywara@arm.com>
+Date: Wed, 21 Apr 2021 12:46:43 +0100
+Subject: drv:rtc: sun6i: Add Allwinner H616 support
+
+The H616 RTC changes its day storage to the newly introduced linear day
+scheme, so pair the new compatible string with this feature flag.
+The clock part is missing an external 32768 Hz oscillator input pin,
+for future expansion we must thus ignore any provided clock for now.
+
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+---
+ drivers/rtc/rtc-sun6i.c | 16 ++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
+index 190ea007d82e..e0b85a0d5645 100644
+--- a/drivers/rtc/rtc-sun6i.c
++++ b/drivers/rtc/rtc-sun6i.c
+@@ -389,6 +389,22 @@ static void __init sun50i_h6_rtc_clk_init(struct device_node *node)
+ CLK_OF_DECLARE_DRIVER(sun50i_h6_rtc_clk, "allwinner,sun50i-h6-rtc",
+ 		      sun50i_h6_rtc_clk_init);
+ 
++static const struct sun6i_rtc_clk_data sun50i_h616_rtc_data = {
++	.rc_osc_rate = 16000000,
++	.fixed_prescaler = 32,
++	.has_prescaler = 1,
++	.has_out_clk = 1,
++	.no_ext_losc = 1,
++};
++
++static void __init sun50i_h616_rtc_clk_init(struct device_node *node)
++{
++	sun6i_rtc_clk_init(node, &sun50i_h616_rtc_data);
++}
++
++CLK_OF_DECLARE_DRIVER(sun50i_h616_rtc_clk, "allwinner,sun50i-h616-rtc",
++		      sun50i_h616_rtc_clk_init);
++
+ /*
+  * The R40 user manual is self-conflicting on whether the prescaler is
+  * fixed or configurable. The clock diagram shows it as fixed, but there
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-rtc-sun6i-support-RTCs-without-external-LOSCs.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-rtc-sun6i-support-RTCs-without-external-LOSCs.patch
new file mode 100644
index 0000000..7902dc4
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-rtc-sun6i-support-RTCs-without-external-LOSCs.patch
@@ -0,0 +1,68 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Andre Przywara <andre.przywara@arm.com>
+Date: Mon, 14 Jun 2021 23:02:45 +0100
+Subject: drv:rtc:sun6i: support RTCs without external LOSCs
+
+Some newer Allwinner RTCs (for instance the one in the H616 SoC) lack
+a pin for an external 32768 Hz oscillator. As a consequence, this LOSC
+can't be selected as the RTC clock source, and we must rely on the
+internal RC oscillator.
+To allow additions of clocks to the RTC node, add a feature bit to ignore
+any provided clocks for now (the current code would think this is the
+external LOSC). Later DTs and code can then for instance add the PLL
+based clock input, and older kernel won't get confused.
+
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ drivers/rtc/rtc-sun6i.c | 16 +++++++---
+ 1 file changed, 11 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
+index 02129ea346c1..190ea007d82e 100644
+--- a/drivers/rtc/rtc-sun6i.c
++++ b/drivers/rtc/rtc-sun6i.c
+@@ -137,6 +137,7 @@ struct sun6i_rtc_clk_data {
+ 	unsigned int has_out_clk : 1;
+ 	unsigned int has_losc_en : 1;
+ 	unsigned int has_auto_swt : 1;
++	unsigned int no_ext_losc : 1;
+ };
+ 
+ #define RTC_LINEAR_DAY	BIT(0)
+@@ -260,7 +261,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
+ 	}
+ 
+ 	/* Switch to the external, more precise, oscillator, if present */
+-	if (of_property_present(node, "clocks")) {
++	if (!rtc->data->no_ext_losc && of_get_property(node, "clocks", NULL)) {
+ 		reg |= SUN6I_LOSC_CTRL_EXT_OSC;
+ 		if (rtc->data->has_losc_en)
+ 			reg |= SUN6I_LOSC_CTRL_EXT_LOSC_EN;
+@@ -284,14 +285,19 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
+ 	}
+ 
+ 	parents[0] = clk_hw_get_name(rtc->int_osc);
+-	/* If there is no external oscillator, this will be NULL and ... */
+-	parents[1] = of_clk_get_parent_name(node, 0);
++	if (rtc->data->no_ext_losc) {
++		parents[1] = NULL;
++		init.num_parents = 1;
++	} else {
++		/* If there is no external oscillator, this will be NULL and */
++		parents[1] = of_clk_get_parent_name(node, 0);
++		/* ... number of clock parents will be 1. */
++		init.num_parents = of_clk_get_parent_count(node) + 1;
++	}
+ 
+ 	rtc->hw.init = &init;
+ 
+ 	init.parent_names = parents;
+-	/* ... number of clock parents will be 1. */
+-	init.num_parents = of_clk_get_parent_count(node) + 1;
+ 	of_property_read_string_index(node, "clock-output-names", 0,
+ 				      &init.name);
+ 
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-soc-sunxi-sram-Add-SRAM-C1-H616-handling.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-soc-sunxi-sram-Add-SRAM-C1-H616-handling.patch
new file mode 100644
index 0000000..6f98624
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-soc-sunxi-sram-Add-SRAM-C1-H616-handling.patch
@@ -0,0 +1,41 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@gmail.com>
+Date: Sat, 16 Oct 2021 21:26:41 +0200
+Subject: drv:soc: sunxi: sram: Add SRAM C1 H616 handling
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ drivers/soc/sunxi/sunxi_sram.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
+index 4458b2e0562b..9e65d8dfe355 100644
+--- a/drivers/soc/sunxi/sunxi_sram.c
++++ b/drivers/soc/sunxi/sunxi_sram.c
+@@ -70,6 +70,12 @@ static struct sunxi_sram_desc sun4i_a10_sram_c1 = {
+ 				  SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")),
+ };
+ 
++static struct sunxi_sram_desc sun50i_h616_sram_c1 = {
++	.data	= SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31,
++				  SUNXI_SRAM_MAP(0x7fffffff, 0, "cpu"),
++				  SUNXI_SRAM_MAP(0, 1, "ve")),
++};
++
+ static struct sunxi_sram_desc sun4i_a10_sram_d = {
+ 	.data	= SUNXI_SRAM_DATA("D", 0x4, 0x0, 1,
+ 				  SUNXI_SRAM_MAP(0, 0, "cpu"),
+@@ -99,6 +105,10 @@ static const struct of_device_id sunxi_sram_dt_ids[] = {
+ 		.compatible	= "allwinner,sun50i-a64-sram-c",
+ 		.data		= &sun50i_a64_sram_c.data,
+ 	},
++	{
++		.compatible	= "allwinner,sun50i-h616-sram-c1",
++		.data		= &sun50i_h616_sram_c1.data,
++	},
+ 	{}
+ };
+ 
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-staging-media-sunxi-cedrus-add-H616-variant.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-staging-media-sunxi-cedrus-add-H616-variant.patch
new file mode 100644
index 0000000..089747e
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/drv-staging-media-sunxi-cedrus-add-H616-variant.patch
@@ -0,0 +1,44 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@gmail.com>
+Date: Fri, 15 Oct 2021 21:49:45 +0200
+Subject: drv:staging:media:sunxi:cedrus: add H616 variant
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ drivers/staging/media/sunxi/cedrus/cedrus.c | 13 ++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c
+index a0f9f4a5b03a..160bd376eb58 100644
+--- a/drivers/staging/media/sunxi/cedrus/cedrus.c
++++ b/drivers/staging/media/sunxi/cedrus/cedrus.c
+@@ -651,6 +651,15 @@ static const struct cedrus_variant sun50i_h6_cedrus_variant = {
+ 	.mod_rate	= 600000000,
+ };
+ 
++static const struct cedrus_variant sun50i_h616_cedrus_variant = {
++	.capabilities	= CEDRUS_CAPABILITY_UNTILED |
++			  CEDRUS_CAPABILITY_MPEG2_DEC |
++			  CEDRUS_CAPABILITY_H264_DEC |
++			  CEDRUS_CAPABILITY_H265_DEC |
++			  CEDRUS_CAPABILITY_VP8_DEC,
++	.mod_rate	= 600000000,
++};
++
+ static const struct of_device_id cedrus_dt_match[] = {
+ 	{
+ 		.compatible = "allwinner,sun4i-a10-video-engine",
+@@ -696,6 +705,10 @@ static const struct of_device_id cedrus_dt_match[] = {
+ 		.compatible = "allwinner,sun50i-h6-video-engine",
+ 		.data = &sun50i_h6_cedrus_variant,
+ 	},
++	{
++		.compatible = "allwinner,sun50i-h616-video-engine",
++		.data = &sun50i_h6_cedrus_variant,
++	},
+ 	{ /* sentinel */ }
+ };
+ MODULE_DEVICE_TABLE(of, cedrus_dt_match);
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/h61x-common-6_6.scc b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/h61x-common-6_6.scc
new file mode 100644
index 0000000..1ad3b12
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/h61x-common-6_6.scc
@@ -0,0 +1,25 @@
+# Common patches for h616 and h618
+# Ported from armbian
+# https://github.com/armbian/build/tree/main/patch/kernel/archive/sunxi-6.6/patches.armbian
+
+#patch Add-sunxi-addr-driver-Used-to-fix-uwe5622-bluetooth-MAC-address.patch
+patch add-nodes-for-sunxi-info-addr-dump-reg.patch
+patch arm64-dts-allwinner-h616-Add-device-node-for-SID.patch
+patch arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch
+patch arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch
+patch arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch
+patch arm64-dts-allwinner-h616-LED-green_power_on-red_status_heartbeat.patch
+patch arm64-dts-allwinner-sun50i-h616-Add-GPU-node.patch
+patch arm64-dts-allwinner-sun50i-h616-Add-VPU-node.patch
+patch arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch
+patch arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch
+
+patch arm64-dts-sun50i-h616-Add-dma-node.patch
+#patch drivers-hack-for-h616-hdmi-video-output.patch
+patch drv-nvmem-sunxi_sid-Support-SID-on-H616.patch
+patch drv-rtc-sun6i-Add-Allwinner-H616-support.patch
+patch drv-rtc-sun6i-support-RTCs-without-external-LOSCs.patch
+patch drv-soc-sunxi-sram-Add-SRAM-C1-H616-handling.patch
+patch drv-staging-media-sunxi-cedrus-add-H616-variant.patch
+patch nvmem-sunxi_sid-add-sunxi_get_soc_chipid-sunxi_get_serial.patch
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/nvmem-sunxi_sid-add-sunxi_get_soc_chipid-sunxi_get_serial.patch b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/nvmem-sunxi_sid-add-sunxi_get_soc_chipid-sunxi_get_serial.patch
new file mode 100644
index 0000000..1eceb98
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/nvmem-sunxi_sid-add-sunxi_get_soc_chipid-sunxi_get_serial.patch
@@ -0,0 +1,58 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: The-going <48602507+The-going@users.noreply.github.com>
+Date: Sat, 16 Apr 2022 11:19:05 +0300
+Subject: nvmem: sunxi_sid: add sunxi_get_soc_chipid, sunxi_get_serial
+
+---
+ drivers/nvmem/sunxi_sid.c | 28 ++++++++++
+ 1 file changed, 28 insertions(+)
+
+diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
+index c526fe4abe22..e522bd1e5edd 100644
+--- a/drivers/nvmem/sunxi_sid.c
++++ b/drivers/nvmem/sunxi_sid.c
+@@ -36,6 +36,25 @@ struct sunxi_sid {
+ 	u32			value_offset;
+ };
+ 
++static unsigned int sunxi_soc_chipid[4];
++static unsigned int sunxi_serial[4];
++
++int sunxi_get_soc_chipid(unsigned char *chipid)
++{
++	memcpy(chipid, sunxi_soc_chipid, 16);
++
++	return 0;
++}
++EXPORT_SYMBOL(sunxi_get_soc_chipid);
++
++int sunxi_get_serial(unsigned       char *serial)
++{
++	memcpy(serial, sunxi_serial, 16);
++
++	return 0;
++}
++EXPORT_SYMBOL(sunxi_get_serial);
++
+ static int sunxi_sid_read(void *context, unsigned int offset,
+ 			  void *val, size_t bytes)
+ {
+@@ -177,6 +196,15 @@ static int sunxi_sid_probe(struct platform_device *pdev)
+ 
+ 	platform_set_drvdata(pdev, nvmem);
+ 
++	nvmem_cfg->reg_read(sid, 0, &sunxi_soc_chipid[0], sizeof(int));
++	nvmem_cfg->reg_read(sid, 4, &sunxi_soc_chipid[1], sizeof(int));
++	nvmem_cfg->reg_read(sid, 8, &sunxi_soc_chipid[2], sizeof(int));
++	nvmem_cfg->reg_read(sid, 12, &sunxi_soc_chipid[3], sizeof(int));
++
++	sunxi_serial[0] = sunxi_soc_chipid[3];
++	sunxi_serial[1] = sunxi_soc_chipid[2];
++	sunxi_serial[2] = (sunxi_soc_chipid[1] >> 16) & 0x0ffff;
++
+ 	return 0;
+ }
+ 
+-- 
+Armbian
+
diff --git a/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/orangepi-zero2-6_6.scc b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/orangepi-zero2-6_6.scc
new file mode 100644
index 0000000..3ec9608
--- /dev/null
+++ b/recipes-kernel/linux/linux-mainline/sunxi-kmeta/bsp/h61x/orangepi-zero2-6_6.scc
@@ -0,0 +1,7 @@
+# Kmeta for OPI Zero 2
+include h61x-common-6_6.scc
+
+patch arm64-dts-h616-add-wifi-support-for-orange-pi-zero-2.patch
+patch arm64-dts-sun50i-h616-orangepi-zero2-Enable-GPU-mali.patch
+patch arm64-dts-sun50i-h616-orangepi-zero2-reg_usb1_vbus-status-ok.patch
+