diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2w.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2w.dts
index 2e6e740dc..971891901 100644
--- a/arch/arm/dts/sun50i-h616-orangepi-zero2w.dts
+++ b/arch/arm/dts/sun50i-h616-orangepi-zero2w.dts
@@ -17,10 +17,11 @@
 	aliases {
 		ethernet0 = &emac0;
 		serial0 = &uart0;
+		serial5 = &uart5;
 	};
 
 	chosen {
-		stdout-path = "serial0:115200n8";
+		stdout-path = "serial5:115200n8";
 	};
 
 	leds {
@@ -170,6 +171,12 @@
 	status = "okay";
 };
 
+&uart5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart5_ph_pins>;
+	status = "okay";
+};
+
 &usbotg {
 	dr_mode = "peripheral";
 	status = "okay";
diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
index dd4d2f311..1cc260298 100644
--- a/arch/arm/dts/sun50i-h616.dtsi
+++ b/arch/arm/dts/sun50i-h616.dtsi
@@ -211,7 +211,10 @@
 				pins = "PH0", "PH1";
 				function = "uart0";
 			};
-
+			uart5_ph_pins: uart5-ph-pins {
+				pins = "PH2", "PH3";
+				function = "uart5";
+			};
 			uart1_pins: uart1-pins {
 				pins = "PG6", "PG7";
 				function = "uart1";

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 2969a530a..bcb792a09 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -208,6 +208,7 @@ enum sunxi_gpio_number {
 #define SUN9I_GPH_UART0		2
 #define SUN50I_H6_GPH_UART0	2
 #define SUN50I_H616_GPH_UART0	2
+#define SUN50I_H616_GPH_UART5	2
 
 #define SUNXI_GPI_SDC3		2
 #define SUN7I_GPI_TWI3		3
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 0537c29b2..650bb928a 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -135,6 +135,10 @@ static int gpio_init(void)
 	sunxi_gpio_set_cfgpin(SUNXI_GPH(0), SUN50I_H616_GPH_UART0);
 	sunxi_gpio_set_cfgpin(SUNXI_GPH(1), SUN50I_H616_GPH_UART0);
 	sunxi_gpio_set_pull(SUNXI_GPH(1), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 6 && defined(CONFIG_MACH_SUN50I_H616)
+	sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN50I_H616_GPH_UART5);
+	sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN50I_H616_GPH_UART5);
+	sunxi_gpio_set_pull(SUNXI_GPH(3), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_A83T)
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0);
 	sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0);

diff --git a/configs/orangepi_zero2w_defconfig b/configs/orangepi_zero2w_defconfig
index 7bec5462d..267a708e8 100644
--- a/configs/orangepi_zero2w_defconfig
+++ b/configs/orangepi_zero2w_defconfig
@@ -16,3 +16,4 @@ CONFIG_AXP_DCDC3_VOLT=1100
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_AXP313A_POWER=y
 CONFIG_SPL_SPI_SUNXI=y
+CONFIG_CONS_INDEX=6

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index eb9ccf47c..2d93713a4 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -46,6 +46,9 @@
 # define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
 # define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
 # define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
+#ifdef CONFIG_MACH_SUN50I_H616
+# define CONFIG_SYS_NS16550_COM6		0x05001400
+#endif
 #endif
 
 /* CPU */
@@ -470,7 +473,7 @@ extern int soft_i2c_gpio_scl;
 	MEM_LAYOUT_ENV_EXTRA_SETTINGS \
 	DFU_ALT_INFO_RAM \
 	"fdtfile=" FDTFILE "\0" \
-	"console=ttyS0,115200\0" \
+	"console=ttyS5,115200\0" \
 	SUNXI_MTDIDS_DEFAULT \
 	SUNXI_MTDPARTS_DEFAULT \
 	"uuid_gpt_esp=" UUID_GPT_ESP "\0" \