From bdfbfc9669efbe5f84e6c361532f3fe64831aaae Mon Sep 17 00:00:00 2001 From: DanyLE Date: Fri, 8 Mar 2024 10:41:41 +0100 Subject: [PATCH] add first working meta-layer --- conf/layer.conf | 44 + conf/machine/include/sun50i-h616.inc | 9 + conf/machine/include/sunxi-mali-driver.inc | 15 + conf/machine/include/sunxi64.inc | 27 + conf/machine/orange-pi-zero2w.conf | 45 + recipes-bsp/atf/atf-50i-h616_git.bb | 30 + .../0001-use-uart5-as-uboot-console.patch | 108 + recipes-bsp/u-boot/files/0002-debug.patch | 85142 ++++++++++++++++ recipes-bsp/u-boot/files/boot.cmd | 83 + recipes-bsp/u-boot/files/boot.scr | Bin 0 -> 3186 bytes recipes-bsp/u-boot/u-boot-xunlong.bb | 62 + recipes-core/base-files/base-files_%.bbappend | 28 + recipes-core/dropbear/dropbear_%.bbappend | 7 + recipes-core/dropbear/files/default | 2 + recipes-core/images/README.md | 40 + recipes-core/images/core-image-base.bbappend | 1 + .../images/core-image-minimal.bbappend | 63 + recipes-core/images/core-image-recovery.bb | 53 + recipes-core/init-ifupdown/files/itf_diya | 24 + .../init-ifupdown/init-ifupdown_%.bbappend | 7 + recipes-diya/diya-overlay/diya-overlay.bb | 44 + recipes-diya/diya-overlay/files/80_diya | 3 + .../diya-overlay/files/boot-to-recovery | 21 + recipes-diya/diya-overlay/files/confd | 44 + recipes-diya/diya-overlay/files/expandfs.sh | 37 + recipes-diya/diya-overlay/files/fs_resize | 1 + recipes-diya/initramfs/files/confd | 21 + recipes-diya/initramfs/files/diya-update | 147 + recipes-diya/initramfs/files/init | 107 + recipes-diya/initramfs/recovery-boot_0.1.bb | 47 + recipes-extended/sudo/sudo_%.bbappend | 9 + recipes-graphics/libsdl2/libsdl2_%.bbappend | 4 + recipes-graphics/wayland/weston-init.bbappend | 7 + ...ix-reset-issue-on-H6-by-using-R_WDOG.patch | 28 + .../files/0002-fix-rtl8822c-compi-error.patch | 13 + .../linux/files/0003-enable-mali-gpu.patch | 13 + .../0004-fix-unisocwcn-include-path.patch | 33 + .../files/0005-fix-rtl8xxx-include-path.patch | 271 + recipes-kernel/linux/files/defconfig | 8422 ++ recipes-kernel/linux/linux-xunlong_6.1.31.bb | 56 + recipes-kernel/linux/linux.inc | 126 + .../uwe5622-firmware/files/wcnmodem.bin | Bin 0 -> 947120 bytes .../files/wifi_2355b001_1ant.ini | 177 + .../uwe5622-firmware/uwe5622-firmware.bb | 22 + .../l3afpad/files/l3afpad-0.8.18.1.11.tar.gz | Bin 0 -> 1442465 bytes recipes-support/l3afpad/l3afpad_0.8.18.bb | 30 + recipes-support/sfwbar/files/sfwbar.config | 334 + recipes-support/sfwbar/sfwbar_git.bb | 27 + recipes-support/swayidle/swayidle_%.bbappend | 1 + recipes-support/swaylock/swaylock_%.bbappend | 1 + recipes-support/tofi/files/config | 320 + recipes-support/tofi/files/drun | 9 + recipes-support/tofi/tofi_git.bb | 27 + recipes-support/wlopm/wlopm_git.bb | 23 + recipes-support/wtype/wtype_git.bb | 17 + recipes-wlroots/labwc/files/autostart | 38 + recipes-wlroots/labwc/files/environment | 28 + recipes-wlroots/labwc/files/init | 53 + recipes-wlroots/labwc/files/menu.xml | 49 + recipes-wlroots/labwc/files/rc.xml | 71 + recipes-wlroots/labwc/files/wpp.jpg | Bin 0 -> 164654 bytes recipes-wlroots/labwc/labwc_%.bbappend_bak | 27 + recipes-wlroots/wlroots/wlroots-%.bbappend | 2 + wic/opi.wks.in | 12 + 64 files changed, 96512 insertions(+) create mode 100644 conf/layer.conf create mode 100644 conf/machine/include/sun50i-h616.inc create mode 100644 conf/machine/include/sunxi-mali-driver.inc create mode 100644 conf/machine/include/sunxi64.inc create mode 100644 conf/machine/orange-pi-zero2w.conf create mode 100644 recipes-bsp/atf/atf-50i-h616_git.bb create mode 100644 recipes-bsp/u-boot/files/0001-use-uart5-as-uboot-console.patch create mode 100644 recipes-bsp/u-boot/files/0002-debug.patch create mode 100644 recipes-bsp/u-boot/files/boot.cmd create mode 100644 recipes-bsp/u-boot/files/boot.scr create mode 100644 recipes-bsp/u-boot/u-boot-xunlong.bb create mode 100644 recipes-core/base-files/base-files_%.bbappend create mode 100644 recipes-core/dropbear/dropbear_%.bbappend create mode 100644 recipes-core/dropbear/files/default create mode 100644 recipes-core/images/README.md create mode 120000 recipes-core/images/core-image-base.bbappend create mode 100644 recipes-core/images/core-image-minimal.bbappend create mode 100644 recipes-core/images/core-image-recovery.bb create mode 100644 recipes-core/init-ifupdown/files/itf_diya create mode 100644 recipes-core/init-ifupdown/init-ifupdown_%.bbappend create mode 100644 recipes-diya/diya-overlay/diya-overlay.bb create mode 100644 recipes-diya/diya-overlay/files/80_diya create mode 100755 recipes-diya/diya-overlay/files/boot-to-recovery create mode 100644 recipes-diya/diya-overlay/files/confd create mode 100644 recipes-diya/diya-overlay/files/expandfs.sh create mode 100644 recipes-diya/diya-overlay/files/fs_resize create mode 100644 recipes-diya/initramfs/files/confd create mode 100755 recipes-diya/initramfs/files/diya-update create mode 100755 recipes-diya/initramfs/files/init create mode 100644 recipes-diya/initramfs/recovery-boot_0.1.bb create mode 100644 recipes-extended/sudo/sudo_%.bbappend create mode 100644 recipes-graphics/libsdl2/libsdl2_%.bbappend create mode 100644 recipes-graphics/wayland/weston-init.bbappend create mode 100644 recipes-kernel/linux/files/0001-Fix-reset-issue-on-H6-by-using-R_WDOG.patch create mode 100644 recipes-kernel/linux/files/0002-fix-rtl8822c-compi-error.patch create mode 100644 recipes-kernel/linux/files/0003-enable-mali-gpu.patch create mode 100644 recipes-kernel/linux/files/0004-fix-unisocwcn-include-path.patch create mode 100644 recipes-kernel/linux/files/0005-fix-rtl8xxx-include-path.patch create mode 100644 recipes-kernel/linux/files/defconfig create mode 100644 recipes-kernel/linux/linux-xunlong_6.1.31.bb create mode 100644 recipes-kernel/linux/linux.inc create mode 100644 recipes-kernel/uwe5622-firmware/files/wcnmodem.bin create mode 100644 recipes-kernel/uwe5622-firmware/files/wifi_2355b001_1ant.ini create mode 100644 recipes-kernel/uwe5622-firmware/uwe5622-firmware.bb create mode 100644 recipes-support/l3afpad/files/l3afpad-0.8.18.1.11.tar.gz create mode 100644 recipes-support/l3afpad/l3afpad_0.8.18.bb create mode 100644 recipes-support/sfwbar/files/sfwbar.config create mode 100644 recipes-support/sfwbar/sfwbar_git.bb create mode 100644 recipes-support/swayidle/swayidle_%.bbappend create mode 100644 recipes-support/swaylock/swaylock_%.bbappend create mode 100644 recipes-support/tofi/files/config create mode 100755 recipes-support/tofi/files/drun create mode 100644 recipes-support/tofi/tofi_git.bb create mode 100644 recipes-support/wlopm/wlopm_git.bb create mode 100644 recipes-support/wtype/wtype_git.bb create mode 100644 recipes-wlroots/labwc/files/autostart create mode 100644 recipes-wlroots/labwc/files/environment create mode 100755 recipes-wlroots/labwc/files/init create mode 100644 recipes-wlroots/labwc/files/menu.xml create mode 100644 recipes-wlroots/labwc/files/rc.xml create mode 100644 recipes-wlroots/labwc/files/wpp.jpg create mode 100644 recipes-wlroots/labwc/labwc_%.bbappend_bak create mode 100644 recipes-wlroots/wlroots/wlroots-%.bbappend create mode 100644 wic/opi.wks.in diff --git a/conf/layer.conf b/conf/layer.conf new file mode 100644 index 0000000..9db75bf --- /dev/null +++ b/conf/layer.conf @@ -0,0 +1,44 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "meta-opi-diya" +BBFILE_PATTERN_meta-opi-diya = "^${LAYERDIR}/" +BBFILE_PRIORITY_meta-opi-diya = "11" + +LAYERDEPENDS_meta-opi-diya = " core " +LAYERSERIES_COMPAT_meta-opi-diya = "kirkstone" + +PACKAGE_CLASSES = "package_ipk" + +INITRAMFS_IMAGE="core-image-recovery" +INITRAMFS_IMAGE_BUNDLE="0" +INITRAMFS_MAXSIZE="200000" +INHERIT += "rm_work" + +EXTRA_IMAGE_FEATURES ?= " ssh-server-dropbear read-only-rootfs " +# ssh-server-dropbear +DISTRO_FEATURES:append := " opengl wayland " +DISTRO_FEATURES:remove = " x11 vulkan " +TOOLCHAIN_TARGET_TASK:append = " libgles3-mesa-dev " +# DISTRO_FEATURES:append := " vc4-gfx opengl directfb " +MACHINE ?= "orange-pi-zero2w" + +WKS_FILE="opi.wks.in" +ROOT_HOME = "/root" + +PREFERRED_PROVIDER_virtual/kernel = "linux-xunlong" +PREFERRED_VERSION_linux-xunlong = "6.1.31" + +PREFERRED_PROVIDER_virtual/bootloader = "u-boot-xunlong" +PREFERRED_PROVIDER_u-boot = "u-boot-xunlong" + +# + +# extra kernel CMDLINE_RNDIS option +# CMDLINE_RNDIS += " video=DPI-1:480x640,rotate=90 " +# accept license for wifi and bluetooth firmware +LICENSE_FLAGS_ACCEPTED = "synaptics-killswitch" \ No newline at end of file diff --git a/conf/machine/include/sun50i-h616.inc b/conf/machine/include/sun50i-h616.inc new file mode 100644 index 0000000..0e0214b --- /dev/null +++ b/conf/machine/include/sun50i-h616.inc @@ -0,0 +1,9 @@ +require conf/machine/include/sunxi64.inc + +DEFAULTTUNE ?= "cortexa53-crypto" +require conf/machine/include/arm/armv8a/tune-cortexa53.inc + +MACHINEOVERRIDES =. "sun50i:" + +SOC_FAMILY = "sun50i-h616" + diff --git a/conf/machine/include/sunxi-mali-driver.inc b/conf/machine/include/sunxi-mali-driver.inc new file mode 100644 index 0000000..cb9d7e3 --- /dev/null +++ b/conf/machine/include/sunxi-mali-driver.inc @@ -0,0 +1,15 @@ +PREFERRED_PROVIDER_virtual/mesa ?= "mesa-gl" +PREFERRED_PROVIDER_virtual/libgl ?= "mesa-gl" +PREFERRED_PROVIDER_virtual/libgles1 ?= "sunxi-mali" +PREFERRED_PROVIDER_virtual/libgles2 ?= "sunxi-mali" +PREFERRED_PROVIDER_virtual/egl ?= "sunxi-mali" + +PACKAGECONFIG:remove:pn-xserver-xorg = "${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'glamor', '', d)}" + +XSERVER += "sunxi-mali \ + sunxi-mali-dev" + +MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += "\ + kernel-module-mali \ + kernel-module-mali-drm \ + " diff --git a/conf/machine/include/sunxi64.inc b/conf/machine/include/sunxi64.inc new file mode 100644 index 0000000..87e034e --- /dev/null +++ b/conf/machine/include/sunxi64.inc @@ -0,0 +1,27 @@ +SOC_FAMILY ??= "" +include conf/machine/include/soc-family.inc + +MACHINEOVERRIDES =. "sunxi:sunxi64:" + +PREFERRED_PROVIDER_virtual/kernel ?= "linux-mainline" +PREFERRED_PROVIDER_u-boot ?= "u-boot" +PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot" + +KERNEL_IMAGETYPE ?= "Image" + +# IMAGE_CLASSES += "sdcard_image-sunxi" +IMAGE_FSTYPES += "ext4 tar.gz wic.bz2 wic.bmap" +# sunxi-sdimg + +MACHINE_EXTRA_RRECOMMENDS = "kernel-modules" + +UBOOT_LOCALVERSION = "-g${@d.getVar('SRCPV', True).partition('+')[2][0:7]}" + +UBOOT_ENTRYPOINT ?= "0x40008000" +UBOOT_LOADADDRESS ?= "0x400080OB00" + +#UBOOT_BINARY ?= "u-boot.itb" +SPL_BINARY ?= "spl/sunxi-spl.bin" + +SERIAL_CONSOLE ?= "115200 ttyS0" +MACHINE_FEATURES ?= "alsa apm keyboard rtc serial screen usbgadget usbhost vfat" diff --git a/conf/machine/orange-pi-zero2w.conf b/conf/machine/orange-pi-zero2w.conf new file mode 100644 index 0000000..6197992 --- /dev/null +++ b/conf/machine/orange-pi-zero2w.conf @@ -0,0 +1,45 @@ +#@TYPE: Machine +#@NAME: orange-pi-zero-2 +#@DESCRIPTION: Machine configuration for the orange-pi-zero-2, based on Allwinner H616 CPU + +require conf/machine/include/sun50i-h616.inc + +KERNEL_DEVICETREE = "allwinner/sun50i-h616-orangepi-zero2w.dtb \ + allwinner/overlay/sun50i-h616-disable-leds.dtbo \ + allwinner/overlay/sun50i-h616-disable-uart0.dtbo \ + allwinner/overlay/sun50i-h616-gpu.dtbo \ + allwinner/overlay/sun50i-h616-ir.dtbo \ + allwinner/overlay/sun50i-h616-ph-i2c1.dtbo \ + allwinner/overlay/sun50i-h616-ph-i2c2.dtbo \ + allwinner/overlay/sun50i-h616-ph-i2c3.dtbo \ + allwinner/overlay/sun50i-h616-ph-i2c4.dtbo \ + allwinner/overlay/sun50i-h616-ph-pwm12.dtbo \ + allwinner/overlay/sun50i-h616-ph-pwm34.dtbo \ + allwinner/overlay/sun50i-h616-ph-uart2.dtbo \ + allwinner/overlay/sun50i-h616-ph-uart5.dtbo \ + allwinner/overlay/sun50i-h616-pi-i2c0.dtbo \ + allwinner/overlay/sun50i-h616-pi-i2c1.dtbo \ + allwinner/overlay/sun50i-h616-pi-i2c2.dtbo \ + allwinner/overlay/sun50i-h616-pi-pwm1.dtbo \ + allwinner/overlay/sun50i-h616-pi-pwm2.dtbo \ + allwinner/overlay/sun50i-h616-pi-pwm3.dtbo \ + allwinner/overlay/sun50i-h616-pi-pwm4.dtbo \ + allwinner/overlay/sun50i-h616-pi-uart2.dtbo \ + allwinner/overlay/sun50i-h616-pi-uart3.dtbo \ + allwinner/overlay/sun50i-h616-pi-uart4.dtbo \ + allwinner/overlay/sun50i-h616-spi0-spidev.dtbo \ + allwinner/overlay/sun50i-h616-spi1-cs0-cs1-spidev.dtbo \ + allwinner/overlay/sun50i-h616-spi1-cs0-spidev.dtbo \ + allwinner/overlay/sun50i-h616-spi1-cs1-spidev.dtbo \ + allwinner/overlay/sun50i-h616-usb0-host.dtbo \ + allwinner/overlay/sun50i-h616-zero2w-disable-led.dtbo \ +" +UBOOT_MACHINE = "orangepi_zero2w_defconfig" + +SPL_BINARY = "u-boot-sunxi-with-spl.bin" + +# as for now neither graphics nor audio is supported +MACHINE_FEATURES:remove = "alsa x11" +MACHINE_FEATURES:append = "bluetooth wifi" + +MACHINE_EXTRA_RRECOMMENDS = "uwe5622-firmware" \ No newline at end of file diff --git a/recipes-bsp/atf/atf-50i-h616_git.bb b/recipes-bsp/atf/atf-50i-h616_git.bb new file mode 100644 index 0000000..4ce548a --- /dev/null +++ b/recipes-bsp/atf/atf-50i-h616_git.bb @@ -0,0 +1,30 @@ +DESCRIPTION = "ARM Trusted Firmware Allwinner" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde" + + +SRC_URI = "git://github.com/ARM-software/arm-trusted-firmware;branch=master;protocol=https" +SRCREV = "d3e71ead6ea5bc3555ac90a446efec84ef6c6122" + +# v2.9 + +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" + +COMPATIBLE_MACHINE = "(sun50i|sun50i-h616)" + +PLATFORM = "sun50i_h616" + +LDFLAGS[unexport] = "1" + +do_compile() { + oe_runmake -C ${S} BUILD_BASE=${B} \ + CROSS_COMPILE=${TARGET_PREFIX} \ + PLAT=${PLATFORM} \ + bl31 \ + all +} + +do_install() { + install -D -p -m 0644 ${B}/${PLATFORM}/release/bl31.bin ${DEPLOY_DIR_IMAGE}/bl31.bin +} diff --git a/recipes-bsp/u-boot/files/0001-use-uart5-as-uboot-console.patch b/recipes-bsp/u-boot/files/0001-use-uart5-as-uboot-console.patch new file mode 100644 index 0000000..2fea76d --- /dev/null +++ b/recipes-bsp/u-boot/files/0001-use-uart5-as-uboot-console.patch @@ -0,0 +1,108 @@ +diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2w.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2w.dts +index 2e6e740dc..971891901 100644 +--- a/arch/arm/dts/sun50i-h616-orangepi-zero2w.dts ++++ b/arch/arm/dts/sun50i-h616-orangepi-zero2w.dts +@@ -17,10 +17,11 @@ + aliases { + ethernet0 = &emac0; + serial0 = &uart0; ++ serial5 = &uart5; + }; + + chosen { +- stdout-path = "serial0:115200n8"; ++ stdout-path = "serial5:115200n8"; + }; + + leds { +@@ -170,6 +171,12 @@ + status = "okay"; + }; + ++&uart5 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart5_ph_pins>; ++ status = "okay"; ++}; ++ + &usbotg { + dr_mode = "peripheral"; + status = "okay"; +diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi +index dd4d2f311..1cc260298 100644 +--- a/arch/arm/dts/sun50i-h616.dtsi ++++ b/arch/arm/dts/sun50i-h616.dtsi +@@ -211,7 +211,10 @@ + pins = "PH0", "PH1"; + function = "uart0"; + }; +- ++ uart5_ph_pins: uart5-ph-pins { ++ pins = "PH2", "PH3"; ++ function = "uart5"; ++ }; + uart1_pins: uart1-pins { + pins = "PG6", "PG7"; + function = "uart1"; + +diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h +index 2969a530a..bcb792a09 100644 +--- a/arch/arm/include/asm/arch-sunxi/gpio.h ++++ b/arch/arm/include/asm/arch-sunxi/gpio.h +@@ -208,6 +208,7 @@ enum sunxi_gpio_number { + #define SUN9I_GPH_UART0 2 + #define SUN50I_H6_GPH_UART0 2 + #define SUN50I_H616_GPH_UART0 2 ++#define SUN50I_H616_GPH_UART5 2 + + #define SUNXI_GPI_SDC3 2 + #define SUN7I_GPI_TWI3 3 +diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c +index 0537c29b2..650bb928a 100644 +--- a/arch/arm/mach-sunxi/board.c ++++ b/arch/arm/mach-sunxi/board.c +@@ -135,6 +135,10 @@ static int gpio_init(void) + sunxi_gpio_set_cfgpin(SUNXI_GPH(0), SUN50I_H616_GPH_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPH(1), SUN50I_H616_GPH_UART0); + sunxi_gpio_set_pull(SUNXI_GPH(1), SUNXI_GPIO_PULL_UP); ++#elif CONFIG_CONS_INDEX == 6 && defined(CONFIG_MACH_SUN50I_H616) ++ sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN50I_H616_GPH_UART5); ++ sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN50I_H616_GPH_UART5); ++ sunxi_gpio_set_pull(SUNXI_GPH(3), SUNXI_GPIO_PULL_UP); + #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_A83T) + sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0); + +diff --git a/configs/orangepi_zero2w_defconfig b/configs/orangepi_zero2w_defconfig +index 7bec5462d..267a708e8 100644 +--- a/configs/orangepi_zero2w_defconfig ++++ b/configs/orangepi_zero2w_defconfig +@@ -16,3 +16,4 @@ CONFIG_AXP_DCDC3_VOLT=1100 + CONFIG_SPL_I2C_SUPPORT=y + CONFIG_AXP313A_POWER=y + CONFIG_SPL_SPI_SUNXI=y ++CONFIG_CONS_INDEX=6 + +diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h +index eb9ccf47c..2d93713a4 100644 +--- a/include/configs/sunxi-common.h ++++ b/include/configs/sunxi-common.h +@@ -46,6 +46,9 @@ + # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE + # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE + # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE ++#ifdef CONFIG_MACH_SUN50I_H616 ++# define CONFIG_SYS_NS16550_COM6 0x05001400 ++#endif + #endif + + /* CPU */ +@@ -470,7 +473,7 @@ extern int soft_i2c_gpio_scl; + MEM_LAYOUT_ENV_EXTRA_SETTINGS \ + DFU_ALT_INFO_RAM \ + "fdtfile=" FDTFILE "\0" \ +- "console=ttyS0,115200\0" \ ++ "console=ttyS5,115200\0" \ + SUNXI_MTDIDS_DEFAULT \ + SUNXI_MTDPARTS_DEFAULT \ + "uuid_gpt_esp=" UUID_GPT_ESP "\0" \ diff --git a/recipes-bsp/u-boot/files/0002-debug.patch b/recipes-bsp/u-boot/files/0002-debug.patch new file mode 100644 index 0000000..cec4328 --- /dev/null +++ b/recipes-bsp/u-boot/files/0002-debug.patch @@ -0,0 +1,85142 @@ +diff --git a/api/api_display.c b/api/api_display.c +index 4f2cdd733..e7d1efb2c 100644 +--- a/api/api_display.c ++++ b/api/api_display.c +@@ -23,7 +23,7 @@ int display_get_info(int type, struct display_info *di) + + switch (type) { + default: +- debug("%s: unsupport display device type: %d\n", ++printf("%s: unsupport display device type: %d\n", + __FILE__, type); + return API_ENODEV; + #ifdef CONFIG_LCD +diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c +index 8a8d394a5..0895179b2 100644 +--- a/arch/arc/lib/bootm.c ++++ b/arch/arc/lib/bootm.c +@@ -37,7 +37,7 @@ void arch_lmb_reserve(struct lmb *lmb) + * pointer. + */ + sp = get_sp(); +- debug("## Current stack ends at 0x%08lx ", sp); ++printf("## Current stack ends at 0x%08lx ", sp); + + /* adjust sp by 4K to be safe */ + sp -= 4096; +@@ -85,7 +85,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) + + kernel_entry = images->ep; + +- debug("## Transferring control to Linux (at address %08lx)...\n", ++printf("## Transferring control to Linux (at address %08lx)...\n", + kernel_entry); + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + +diff --git a/arch/arc/lib/relocate.c b/arch/arc/lib/relocate.c +index 7f531c95e..0d47c9bbc 100644 +--- a/arch/arc/lib/relocate.c ++++ b/arch/arc/lib/relocate.c +@@ -49,7 +49,7 @@ int do_elf_reloc_fixups(void) + if (gd->flags & GD_FLG_SKIP_RELOC) + return 0; + +- debug("Section .rela.dyn is located at %08x-%08x\n", ++printf("Section .rela.dyn is located at %08x-%08x\n", + (unsigned int)re_src, (unsigned int)re_end); + + Elf32_Addr *offset_ptr_rom; +@@ -79,7 +79,7 @@ int do_elf_reloc_fixups(void) + do_swap = 1; + #endif + +- debug("Patching value @ %08x (relocated to %08x)%s\n", ++printf("Patching value @ %08x (relocated to %08x)%s\n", + (unsigned int)offset_ptr_rom, + (unsigned int)offset_ptr_ram, + do_swap ? ", middle-endian encoded" : ""); +@@ -120,7 +120,7 @@ int do_elf_reloc_fixups(void) + * 10005cbe: 700c mov_s r0,0 + * ----------------------->8-------------------- + */ +- debug("Relocation target %08x points outside of image\n", ++printf("Relocation target %08x points outside of image\n", + val); + } + +diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c +index 4e1cf3a1e..649cd9f5e 100644 +--- a/arch/arm/cpu/arm926ejs/mxs/clock.c ++++ b/arch/arm/cpu/arm926ejs/mxs/clock.c +@@ -305,7 +305,7 @@ void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq) + ((rate - 1) << SSP_TIMING_CLOCK_RATE_OFFSET); + writel(reg, &ssp_regs->hw_ssp_timing); + +- debug("SPI%d: Set freq rate to %d KHz (requested %d KHz)\n", ++printf("SPI%d: Set freq rate to %d KHz (requested %d KHz)\n", + bus, tgtclk, freq); + } + +diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +index 0a8985b90..b197246ef 100644 +--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c ++++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +@@ -129,7 +129,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr, + mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size); + + mxs_spl_console_init(); +- debug("SPL: Serial Console Initialised\n"); ++printf("SPL: Serial Console Initialised\n"); + + mxs_power_init(); + +@@ -141,7 +141,7 @@ void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr, + mxs_power_wait_pswitch(); + + if (mxs_boot_modes[data->boot_mode_idx].boot_pads == MXS_BM_JTAG) { +- debug("SPL: Waiting for JTAG user\n"); ++printf("SPL: Waiting for JTAG user\n"); + asm volatile ("x: b x"); + } + } +diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c +index 2cfbd7809..0ff816319 100644 +--- a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c ++++ b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c +@@ -18,7 +18,7 @@ void mxs_lradc_init(void) + { + struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; + +- debug("SPL: Initialisating LRADC\n"); ++printf("SPL: Initialisating LRADC\n"); + + writel(LRADC_CTRL0_SFTRST, ®s->hw_lradc_ctrl0_clr); + writel(LRADC_CTRL0_CLKGATE, ®s->hw_lradc_ctrl0_clr); +@@ -39,15 +39,15 @@ void mxs_lradc_enable_batt_measurement(void) + { + struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; + +- debug("SPL: Enabling LRADC battery measurement\n"); ++printf("SPL: Enabling LRADC battery measurement\n"); + + /* Check if the channel is present at all. */ + if (!(readl(®s->hw_lradc_status) & LRADC_STATUS_CHANNEL7_PRESENT)) { +- debug("SPL: LRADC channel 7 is not present - aborting\n"); ++printf("SPL: LRADC channel 7 is not present - aborting\n"); + return; + } + +- debug("SPL: LRADC channel 7 is present - configuring\n"); ++printf("SPL: LRADC channel 7 is present - configuring\n"); + + writel(LRADC_CTRL1_LRADC7_IRQ_EN, ®s->hw_lradc_ctrl1_clr); + writel(LRADC_CTRL1_LRADC7_IRQ, ®s->hw_lradc_ctrl1_clr); +@@ -75,5 +75,5 @@ void mxs_lradc_enable_batt_measurement(void) + writel(0xffffffff, ®s->hw_lradc_ch7_clr); + writel(LRADC_DELAY_KICK, ®s->hw_lradc_delay3_set); + +- debug("SPL: LRADC channel 7 configuration complete\n"); ++printf("SPL: LRADC channel 7 configuration complete\n"); + } +diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +index a94803ee9..e97ea3dbc 100644 +--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c ++++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +@@ -93,7 +93,7 @@ __weak uint32_t mxs_dram_vals[] = { + + __weak void mxs_adjust_memory_params(uint32_t *dram_vals) + { +- debug("SPL: Using default SDRAM parameters\n"); ++printf("SPL: Using default SDRAM parameters\n"); + } + + #ifdef CONFIG_MX28 +@@ -101,10 +101,10 @@ static void initialize_dram_values(void) + { + int i; + +- debug("SPL: Setting mx28 board specific SDRAM parameters\n"); ++printf("SPL: Setting mx28 board specific SDRAM parameters\n"); + mxs_adjust_memory_params(mxs_dram_vals); + +- debug("SPL: Applying SDRAM parameters\n"); ++printf("SPL: Applying SDRAM parameters\n"); + for (i = 0; i < ARRAY_SIZE(mxs_dram_vals); i++) + writel(mxs_dram_vals[i], MXS_DRAM_BASE + (4 * i)); + } +@@ -113,7 +113,7 @@ static void initialize_dram_values(void) + { + int i; + +- debug("SPL: Setting mx23 board specific SDRAM parameters\n"); ++printf("SPL: Setting mx23 board specific SDRAM parameters\n"); + mxs_adjust_memory_params(mxs_dram_vals); + + /* +@@ -125,7 +125,7 @@ static void initialize_dram_values(void) + * HW_DRAM_CTL8 is setup as the last element. + * So skip the initialization of these HW_DRAM_CTL registers. + */ +- debug("SPL: Applying SDRAM parameters\n"); ++printf("SPL: Applying SDRAM parameters\n"); + for (i = 0; i < ARRAY_SIZE(mxs_dram_vals); i++) { + if (i == 8 || i == 27 || i == 28 || i == 35) + continue; +@@ -152,7 +152,7 @@ static void mxs_mem_init_clock(void) + const unsigned char divider = 21; + #endif + +- debug("SPL: Initialising FRAC0\n"); ++printf("SPL: Initialising FRAC0\n"); + + /* Gate EMI clock */ + writeb(CLKCTRL_FRAC_CLKGATE, +@@ -178,7 +178,7 @@ static void mxs_mem_init_clock(void) + &clkctrl_regs->hw_clkctrl_clkseq_clr); + + early_delay(10000); +- debug("SPL: FRAC0 Initialised\n"); ++printf("SPL: FRAC0 Initialised\n"); + } + + static void mxs_mem_setup_cpu_and_hbus(void) +@@ -186,7 +186,7 @@ static void mxs_mem_setup_cpu_and_hbus(void) + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; + +- debug("SPL: Setting CPU and HBUS clock frequencies\n"); ++printf("SPL: Setting CPU and HBUS clock frequencies\n"); + + /* Set fractional divider for ref_cpu to 480 * 18 / 19 = 454MHz + * and ungate CPU clock */ +@@ -220,7 +220,7 @@ static void mxs_mem_setup_vdda(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Configuring VDDA\n"); ++printf("SPL: Configuring VDDA\n"); + + writel((0xc << POWER_VDDACTRL_TRG_OFFSET) | + (0x7 << POWER_VDDACTRL_BO_OFFSET_OFFSET) | +@@ -253,7 +253,7 @@ static void mx23_mem_setup_vddmem(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Setting mx23 VDDMEM\n"); ++printf("SPL: Setting mx23 VDDMEM\n"); + + /* We must wait before and after disabling the current limiter! */ + early_delay(10000); +@@ -267,7 +267,7 @@ static void mx23_mem_setup_vddmem(void) + + static void mx23_mem_init(void) + { +- debug("SPL: Initialising mx23 SDRAM Controller\n"); ++printf("SPL: Initialising mx23 SDRAM Controller\n"); + + /* + * Reset/ungate the EMI block. This is essential, otherwise the system +@@ -314,7 +314,7 @@ static void mx28_mem_init(void) + struct mxs_pinctrl_regs *pinctrl_regs = + (struct mxs_pinctrl_regs *)MXS_PINCTRL_BASE; + +- debug("SPL: Initialising mx28 SDRAM Controller\n"); ++printf("SPL: Initialising mx28 SDRAM Controller\n"); + + /* Set DDR2 mode */ + writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2, +diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +index 35ea71a5b..cc7633374 100644 +--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c ++++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +@@ -34,7 +34,7 @@ static void mxs_power_clock2xtal(void) + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; + +- debug("SPL: Switching CPU clock to 24MHz XTAL\n"); ++printf("SPL: Switching CPU clock to 24MHz XTAL\n"); + + /* Set XTAL as CPU reference clock */ + writel(CLKCTRL_CLKSEQ_BYPASS_CPU, +@@ -53,7 +53,7 @@ static void mxs_power_clock2pll(void) + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; + +- debug("SPL: Switching CPU core clock source to PLL\n"); ++printf("SPL: Switching CPU core clock source to PLL\n"); + + /* + * TODO: Are we really? It looks like we turn on PLL0, but we then +@@ -86,7 +86,7 @@ static void mxs_power_set_auto_restart(void) + struct mxs_rtc_regs *rtc_regs = + (struct mxs_rtc_regs *)MXS_RTC_BASE; + +- debug("SPL: Setting auto-restart bit\n"); ++printf("SPL: Setting auto-restart bit\n"); + + writel(RTC_CTRL_SFTRST, &rtc_regs->hw_rtc_ctrl_clr); + while (readl(&rtc_regs->hw_rtc_ctrl) & RTC_CTRL_SFTRST) +@@ -127,17 +127,17 @@ static void mxs_power_set_linreg(void) + (struct mxs_power_regs *)MXS_POWER_BASE; + + /* Set linear regulator 25mV below switching converter */ +- debug("SPL: Setting VDDD 25mV below DC-DC converters\n"); ++printf("SPL: Setting VDDD 25mV below DC-DC converters\n"); + clrsetbits_le32(&power_regs->hw_power_vdddctrl, + POWER_VDDDCTRL_LINREG_OFFSET_MASK, + POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW); + +- debug("SPL: Setting VDDA 25mV below DC-DC converters\n"); ++printf("SPL: Setting VDDA 25mV below DC-DC converters\n"); + clrsetbits_le32(&power_regs->hw_power_vddactrl, + POWER_VDDACTRL_LINREG_OFFSET_MASK, + POWER_VDDACTRL_LINREG_OFFSET_1STEPS_BELOW); + +- debug("SPL: Setting VDDIO 25mV below DC-DC converters\n"); ++printf("SPL: Setting VDDIO 25mV below DC-DC converters\n"); + clrsetbits_le32(&power_regs->hw_power_vddioctrl, + POWER_VDDIOCTRL_LINREG_OFFSET_MASK, + POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW); +@@ -157,7 +157,7 @@ static int mxs_get_batt_volt(void) + volt >>= POWER_BATTMONITOR_BATT_VAL_OFFSET; + volt *= 8; + +- debug("SPL: Battery Voltage = %dmV\n", volt); ++printf("SPL: Battery Voltage = %dmV\n", volt); + return volt; + } + +@@ -186,7 +186,7 @@ static int mxs_is_batt_good(void) + uint32_t volt = mxs_get_batt_volt(); + + if ((volt >= 2400) && (volt <= 4300)) { +- debug("SPL: Battery is good\n"); ++printf("SPL: Battery is good\n"); + return 1; + } + +@@ -209,12 +209,12 @@ static int mxs_is_batt_good(void) + volt = mxs_get_batt_volt(); + + if (volt >= 3500) { +- debug("SPL: Battery Voltage too high\n"); ++printf("SPL: Battery Voltage too high\n"); + return 0; + } + + if (volt >= 2400) { +- debug("SPL: Battery is good\n"); ++printf("SPL: Battery is good\n"); + return 1; + } + +@@ -222,7 +222,7 @@ static int mxs_is_batt_good(void) + &power_regs->hw_power_charge_clr); + writel(POWER_CHARGE_PWD_BATTCHRG, &power_regs->hw_power_charge_set); + +- debug("SPL: Battery Voltage too low\n"); ++printf("SPL: Battery Voltage too low\n"); + return 0; + } + +@@ -241,7 +241,7 @@ static void mxs_power_setup_5v_detect(void) + (struct mxs_power_regs *)MXS_POWER_BASE; + + /* Start 5V detection */ +- debug("SPL: Starting 5V input detection comparator\n"); ++printf("SPL: Starting 5V input detection comparator\n"); + clrsetbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_VBUSVALID_TRSH_MASK, + POWER_5VCTRL_VBUSVALID_TRSH_4V4 | +@@ -278,7 +278,7 @@ void mxs_power_switch_dcdc_clocksource(uint32_t freqsel) + */ + __weak void mxs_power_setup_dcdc_clocksource(void) + { +- debug("SPL: Using default DC-DC clocksource\n"); ++printf("SPL: Using default DC-DC clocksource\n"); + } + + /** +@@ -292,7 +292,7 @@ static void mxs_src_power_init(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Pre-Configuring power block\n"); ++printf("SPL: Pre-Configuring power block\n"); + + /* Improve efficieny and reduce transient ripple */ + writel(POWER_LOOPCTRL_TOGGLE_DIF | POWER_LOOPCTRL_EN_CM_HYST | +@@ -331,7 +331,7 @@ static void mxs_power_init_4p2_params(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Configuring common 4P2 regulator params\n"); ++printf("SPL: Configuring common 4P2 regulator params\n"); + + /* Setup 4P2 parameters */ + clrsetbits_le32(&power_regs->hw_power_dcdc4p2, +@@ -364,7 +364,7 @@ static void mxs_enable_4p2_dcdc_input(int xfer) + uint32_t tmp, vbus_thresh, vbus_5vdetect, pwd_bo; + uint32_t prev_5v_brnout, prev_5v_droop; + +- debug("SPL: %s 4P2 DC-DC Input\n", xfer ? "Enabling" : "Disabling"); ++printf("SPL: %s 4P2 DC-DC Input\n", xfer ? "Enabling" : "Disabling"); + + if (xfer && (readl(&power_regs->hw_power_5vctrl) & + POWER_5VCTRL_ENABLE_DCDC)) { +@@ -467,7 +467,7 @@ static void mxs_power_init_4p2_regulator(void) + (struct mxs_power_regs *)MXS_POWER_BASE; + uint32_t tmp, tmp2; + +- debug("SPL: Enabling 4P2 regulator\n"); ++printf("SPL: Enabling 4P2 regulator\n"); + + setbits_le32(&power_regs->hw_power_dcdc4p2, POWER_DCDC4P2_ENABLE_4P2); + +@@ -486,7 +486,7 @@ static void mxs_power_init_4p2_regulator(void) + * gradually to avoid large inrush current from the 5V cable which can + * cause transients/problems + */ +- debug("SPL: Charging 4P2 capacitor\n"); ++printf("SPL: Charging 4P2 capacitor\n"); + mxs_enable_4p2_dcdc_input(0); + + if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) { +@@ -501,7 +501,7 @@ static void mxs_power_init_4p2_regulator(void) + writel(POWER_5VCTRL_PWD_CHARGE_4P2_MASK, + &power_regs->hw_power_5vctrl_set); + +- debug("SPL: Unable to recover from mx23 errata 5837\n"); ++printf("SPL: Unable to recover from mx23 errata 5837\n"); + hang(); + } + +@@ -515,7 +515,7 @@ static void mxs_power_init_4p2_regulator(void) + * current limit until the brownout status is false or until we've + * reached our maximum defined 4p2 current limit. + */ +- debug("SPL: Setting 4P2 brownout level\n"); ++printf("SPL: Setting 4P2 brownout level\n"); + clrsetbits_le32(&power_regs->hw_power_dcdc4p2, + POWER_DCDC4P2_BO_MASK, + 22 << POWER_DCDC4P2_BO_OFFSET); /* 4.15V */ +@@ -562,11 +562,11 @@ static void mxs_power_init_dcdc_4p2_source(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Switching DC-DC converters to 4P2\n"); ++printf("SPL: Switching DC-DC converters to 4P2\n"); + + if (!(readl(&power_regs->hw_power_dcdc4p2) & + POWER_DCDC4P2_ENABLE_DCDC)) { +- debug("SPL: Already switched - aborting\n"); ++printf("SPL: Already switched - aborting\n"); + hang(); + } + +@@ -595,7 +595,7 @@ static void mxs_power_enable_4p2(void) + uint32_t vdddctrl, vddactrl, vddioctrl; + uint32_t tmp; + +- debug("SPL: Powering up 4P2 regulator\n"); ++printf("SPL: Powering up 4P2 regulator\n"); + + vdddctrl = readl(&power_regs->hw_power_vdddctrl); + vddactrl = readl(&power_regs->hw_power_vddactrl); +@@ -648,7 +648,7 @@ static void mxs_power_enable_4p2(void) + writel(POWER_CHARGE_ENABLE_LOAD, + &power_regs->hw_power_charge_clr); + +- debug("SPL: 4P2 regulator powered-up\n"); ++printf("SPL: 4P2 regulator powered-up\n"); + } + + /** +@@ -664,7 +664,7 @@ static void mxs_boot_valid_5v(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Booting from 5V supply\n"); ++printf("SPL: Booting from 5V supply\n"); + + /* + * Use VBUSVALID level instead of VDD5V_GT_VDDIO level to trigger a 5V +@@ -694,7 +694,7 @@ static void mxs_powerdown(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("Powering Down\n"); ++printf("Powering Down\n"); + + writel(POWER_RESET_UNLOCK_KEY, &power_regs->hw_power_reset); + writel(POWER_RESET_UNLOCK_KEY | POWER_RESET_PWD_OFF, +@@ -712,7 +712,7 @@ static void mxs_batt_boot(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Configuring power block to boot from battery\n"); ++printf("SPL: Configuring power block to boot from battery\n"); + + clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_PWDN_5VBRNOUT); + clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_ENABLE_DCDC); +@@ -769,7 +769,7 @@ static void mxs_handle_5v_conflict(void) + (struct mxs_power_regs *)MXS_POWER_BASE; + uint32_t tmp; + +- debug("SPL: Resolving 5V conflict\n"); ++printf("SPL: Resolving 5V conflict\n"); + + setbits_le32(&power_regs->hw_power_vddioctrl, + POWER_VDDIOCTRL_BO_OFFSET_MASK); +@@ -782,17 +782,17 @@ static void mxs_handle_5v_conflict(void) + * VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes + * unreliable + */ +- debug("SPL: VDDIO has a brownout\n"); ++printf("SPL: VDDIO has a brownout\n"); + mxs_powerdown(); + break; + } + + if (tmp & POWER_STS_VDD5V_GT_VDDIO) { +- debug("SPL: POWER_STS_VDD5V_GT_VDDIO is set\n"); ++printf("SPL: POWER_STS_VDD5V_GT_VDDIO is set\n"); + mxs_boot_valid_5v(); + break; + } else { +- debug("SPL: POWER_STS_VDD5V_GT_VDDIO is not set\n"); ++printf("SPL: POWER_STS_VDD5V_GT_VDDIO is not set\n"); + mxs_powerdown(); + break; + } +@@ -802,7 +802,7 @@ static void mxs_handle_5v_conflict(void) + * powerdown or boot from a stable 5V supply. + */ + if (tmp & POWER_STS_PSWITCH_MASK) { +- debug("SPL: POWER_STS_PSWITCH_MASK is set\n"); ++printf("SPL: POWER_STS_PSWITCH_MASK is set\n"); + mxs_batt_boot(); + break; + } +@@ -820,26 +820,26 @@ static void mxs_5v_boot(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Configuring power block to boot from 5V input\n"); ++printf("SPL: Configuring power block to boot from 5V input\n"); + + /* + * NOTE: In original IMX-Bootlets, this also checks for VBUSVALID, + * but their implementation always returns 1 so we omit it here. + */ + if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { +- debug("SPL: 5V VDD good\n"); ++printf("SPL: 5V VDD good\n"); + mxs_boot_valid_5v(); + return; + } + + early_delay(1000); + if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { +- debug("SPL: 5V VDD good (after delay)\n"); ++printf("SPL: 5V VDD good (after delay)\n"); + mxs_boot_valid_5v(); + return; + } + +- debug("SPL: 5V VDD not good\n"); ++printf("SPL: 5V VDD not good\n"); + mxs_handle_5v_conflict(); + } + +@@ -854,7 +854,7 @@ static void mxs_init_batt_bo(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Initialising battery brown-out level to 3.0V\n"); ++printf("SPL: Initialising battery brown-out level to 3.0V\n"); + + /* Brownout at 3V */ + clrsetbits_le32(&power_regs->hw_power_battmonitor, +@@ -876,7 +876,7 @@ static void mxs_switch_vddd_to_dcdc_source(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Switching VDDD to DC-DC converters\n"); ++printf("SPL: Switching VDDD to DC-DC converters\n"); + + clrsetbits_le32(&power_regs->hw_power_vdddctrl, + POWER_VDDDCTRL_LINREG_OFFSET_MASK, +@@ -904,7 +904,7 @@ static void mxs_power_configure_power_source(void) + struct mxs_lradc_regs *lradc_regs = + (struct mxs_lradc_regs *)MXS_LRADC_BASE; + +- debug("SPL: Configuring power source\n"); ++printf("SPL: Configuring power source\n"); + + mxs_power_setup_dcdc_clocksource(); + mxs_src_power_init(); +@@ -942,7 +942,7 @@ static void mxs_power_configure_power_source(void) + + #ifdef CONFIG_MX23 + /* Fire up the VDDMEM LinReg now that we're all set. */ +- debug("SPL: Enabling mx23 VDDMEM linear regulator\n"); ++printf("SPL: Enabling mx23 VDDMEM linear regulator\n"); + writel(POWER_VDDMEMCTRL_ENABLE_LINREG | POWER_VDDMEMCTRL_ENABLE_ILIMIT, + &power_regs->hw_power_vddmemctrl); + #endif +@@ -962,7 +962,7 @@ static void mxs_enable_output_rail_protection(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Enabling output rail protection\n"); ++printf("SPL: Enabling output rail protection\n"); + + writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ | + POWER_CTRL_VDDIO_BO_IRQ, &power_regs->hw_power_ctrl_clr); +@@ -1203,7 +1203,7 @@ static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg, + */ + static void mxs_setup_batt_detect(void) + { +- debug("SPL: Starting battery voltage measurement logic\n"); ++printf("SPL: Starting battery voltage measurement logic\n"); + + mxs_lradc_init(); + mxs_lradc_enable_batt_measurement(); +@@ -1239,7 +1239,7 @@ void mxs_power_init(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Initialising Power Block\n"); ++printf("SPL: Initialising Power Block\n"); + + mxs_ungate_power(); + +@@ -1253,13 +1253,13 @@ void mxs_power_init(void) + mxs_power_configure_power_source(); + mxs_enable_output_rail_protection(); + +- debug("SPL: Setting VDDIO to 3V3 (brownout @ 3v15)\n"); ++printf("SPL: Setting VDDIO to 3V3 (brownout @ 3v15)\n"); + mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150); + +- debug("SPL: Setting VDDD to 1V55 (brownout @ 1v400)\n"); ++printf("SPL: Setting VDDD to 1V55 (brownout @ 1v400)\n"); + mxs_power_set_vddx(&mxs_vddd_cfg, 1550, 1400); + #ifdef CONFIG_MX23 +- debug("SPL: Setting mx23 VDDMEM to 2V5 (brownout @ 1v7)\n"); ++printf("SPL: Setting mx23 VDDMEM to 2V5 (brownout @ 1v7)\n"); + mxs_power_set_vddx(&mxs_vddmem_cfg, 2500, 1700); + #endif + writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ | +@@ -1284,7 +1284,7 @@ void mxs_power_wait_pswitch(void) + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + +- debug("SPL: Waiting for power switch input\n"); ++printf("SPL: Waiting for power switch input\n"); + while (!(readl(&power_regs->hw_power_sts) & POWER_STS_PSWITCH_MASK)) + ; + } +diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c +index d7edefee2..8bd5a2ee3 100644 +--- a/arch/arm/cpu/armv7/bcm235xx/clk-core.c ++++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c +@@ -30,7 +30,7 @@ int clk_get_and_enable(char *clkstr) + int ret = 0; + struct clk *c; + +- debug("%s: %s\n", __func__, clkstr); ++printf("%s: %s\n", __func__, clkstr); + + c = clk_get(clkstr); + if (c) { +@@ -69,7 +69,7 @@ static inline int wait_bit(void *base, u32 offset, u32 bit, bool want) + udelay(1); + } + +- debug("%s: timeout on addr 0x%p, waiting for bit %d to go to %d\n", ++printf("%s: timeout on addr 0x%p, waiting for bit %d to go to %d\n", + __func__, base + offset, bit, want); + + return -ETIMEDOUT; +@@ -86,7 +86,7 @@ static int peri_clk_enable(struct clk *c, int enable) + void *base = (void *)c->ccu_clk_mgr_base; + + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + + clk_get_rate(c); /* Make sure rate and sel are filled in */ + +@@ -94,7 +94,7 @@ static int peri_clk_enable(struct clk *c, int enable) + writel(CLK_WR_ACCESS_PASSWORD, base + WR_ACCESS_OFFSET); + + if (enable) { +- debug("%s %s set rate %lu div %lu sel %d parent %lu\n", ++printf("%s %s set rate %lu div %lu sel %d parent %lu\n", + __func__, c->name, c->rate, c->div, c->sel, + c->parent->rate); + +@@ -141,7 +141,7 @@ static int peri_clk_enable(struct clk *c, int enable) + if (ret) + return ret; + } else { +- debug("%s disable clock %s\n", __func__, c->name); ++printf("%s disable clock %s\n", __func__, c->name); + + /* clkgate */ + reg = readl(base + cd->gate.offset); +@@ -169,7 +169,7 @@ static int peri_clk_set_rate(struct clk *c, unsigned long rate) + struct peri_clk_data *cd = peri_clk->data; + const char **clock; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + diff = rate; + + i = 0; +@@ -197,7 +197,7 @@ static int peri_clk_set_rate(struct clk *c, unsigned long rate) + } + } + +- debug("%s %s set rate %lu div %lu sel %d parent %lu\n", __func__, ++printf("%s %s set rate %lu div %lu sel %d parent %lu\n", __func__, + c->name, c->rate, c->div, c->sel, c->parent->rate); + return ret; + } +@@ -213,7 +213,7 @@ static unsigned long peri_clk_get_rate(struct clk *c) + struct refclk *ref; + u32 reg; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + if (selector_exists(&cd->sel)) { + reg = readl(base + cd->sel.offset); + c->sel = bitfield_extract(reg, cd->sel.shift, cd->sel.width); +@@ -241,7 +241,7 @@ static unsigned long peri_clk_get_rate(struct clk *c) + c->parent = &ref->clk; + c->div = div; + c->rate = c->parent->rate / c->div; +- debug("%s parent rate %lu div %d sel %d rate %lu\n", __func__, ++printf("%s parent rate %lu div %d sel %d rate %lu\n", __func__, + c->parent->rate, div, c->sel, c->rate); + + return c->rate; +@@ -262,7 +262,7 @@ static int ccu_clk_enable(struct clk *c, int enable) + int ret = 0; + u32 reg; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + if (!enable) + return -EINVAL; /* CCU clock cannot shutdown */ + +@@ -321,7 +321,7 @@ static int ccu_clk_enable(struct clk *c, int enable) + static unsigned long ccu_clk_get_rate(struct clk *c) + { + struct ccu_clock *ccu_clk = to_ccu_clk(c); +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + c->rate = ccu_clk->freq_tbl[ccu_clk->freq_id]; + return c->rate; + } +@@ -341,14 +341,14 @@ static int bus_clk_enable(struct clk *c, int enable) + int ret = 0; + u32 reg; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + /* enable access */ + writel(CLK_WR_ACCESS_PASSWORD, base + WR_ACCESS_OFFSET); + + /* enable gating */ + reg = readl(base + cd->gate.offset); + if (!!(reg & (1 << cd->gate.status_bit)) == !!enable) +- debug("%s already %s\n", c->name, ++printf("%s already %s\n", c->name, + enable ? "enabled" : "disabled"); + else { + int want = (enable) ? 1 : 0; +@@ -378,7 +378,7 @@ static unsigned long bus_clk_get_rate(struct clk *c) + struct bus_clock *bus_clk = to_bus_clk(c); + struct ccu_clock *ccu_clk; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + ccu_clk = to_ccu_clk(c->parent); + + c->rate = bus_clk->freq_tbl[ccu_clk->freq_id]; +@@ -395,7 +395,7 @@ struct clk_ops bus_clk_ops = { + /* Enable a reference clock */ + static int ref_clk_enable(struct clk *c, int enable) + { +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + return 0; + } + +@@ -411,7 +411,7 @@ struct clk_ops ref_clk_ops = { + /* Initialize the clock framework */ + int clk_init(void) + { +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + return 0; + } + +@@ -421,7 +421,7 @@ struct clk *clk_get(const char *con_id) + int i; + struct clk_lookup *clk_tblp; + +- debug("%s: %s\n", __func__, con_id); ++printf("%s: %s\n", __func__, con_id); + + clk_tblp = arch_clk_tbl; + for (i = 0; i < arch_clk_tbl_array_size; i++, clk_tblp++) { +@@ -439,7 +439,7 @@ int clk_enable(struct clk *c) + { + int ret = 0; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + if (!c->ops || !c->ops->enable) + return -1; + +@@ -460,7 +460,7 @@ int clk_enable(struct clk *c) + /* Disable a clock */ + void clk_disable(struct clk *c) + { +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + if (!c->ops || !c->ops->enable) + return; + +@@ -482,10 +482,10 @@ unsigned long clk_get_rate(struct clk *c) + + if (!c || !c->ops || !c->ops->get_rate) + return 0; +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + + rate = c->ops->get_rate(c); +- debug("%s: rate = %ld\n", __func__, rate); ++printf("%s: rate = %ld\n", __func__, rate); + return rate; + } + +@@ -496,7 +496,7 @@ int clk_set_rate(struct clk *c, unsigned long rate) + + if (!c || !c->ops || !c->ops->set_rate) + return -EINVAL; +- debug("%s: %s rate=%ld\n", __func__, c->name, rate); ++printf("%s: %s rate=%ld\n", __func__, c->name, rate); + + if (c->use_cnt) + return -EINVAL; +diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-core.c b/arch/arm/cpu/armv7/bcm281xx/clk-core.c +index 26b673a54..5c67fffe7 100644 +--- a/arch/arm/cpu/armv7/bcm281xx/clk-core.c ++++ b/arch/arm/cpu/armv7/bcm281xx/clk-core.c +@@ -30,7 +30,7 @@ int clk_get_and_enable(char *clkstr) + int ret = 0; + struct clk *c; + +- debug("%s: %s\n", __func__, clkstr); ++printf("%s: %s\n", __func__, clkstr); + + c = clk_get(clkstr); + if (c) { +@@ -69,7 +69,7 @@ static inline int wait_bit(void *base, u32 offset, u32 bit, bool want) + udelay(1); + } + +- debug("%s: timeout on addr 0x%p, waiting for bit %d to go to %d\n", ++printf("%s: timeout on addr 0x%p, waiting for bit %d to go to %d\n", + __func__, base + offset, bit, want); + + return -ETIMEDOUT; +@@ -86,7 +86,7 @@ static int peri_clk_enable(struct clk *c, int enable) + void *base = (void *)c->ccu_clk_mgr_base; + + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + + clk_get_rate(c); /* Make sure rate and sel are filled in */ + +@@ -94,7 +94,7 @@ static int peri_clk_enable(struct clk *c, int enable) + writel(CLK_WR_ACCESS_PASSWORD, base + WR_ACCESS_OFFSET); + + if (enable) { +- debug("%s %s set rate %lu div %lu sel %d parent %lu\n", ++printf("%s %s set rate %lu div %lu sel %d parent %lu\n", + __func__, c->name, c->rate, c->div, c->sel, + c->parent->rate); + +@@ -141,7 +141,7 @@ static int peri_clk_enable(struct clk *c, int enable) + if (ret) + return ret; + } else { +- debug("%s disable clock %s\n", __func__, c->name); ++printf("%s disable clock %s\n", __func__, c->name); + + /* clkgate */ + reg = readl(base + cd->gate.offset); +@@ -169,7 +169,7 @@ static int peri_clk_set_rate(struct clk *c, unsigned long rate) + struct peri_clk_data *cd = peri_clk->data; + const char **clock; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + diff = rate; + + i = 0; +@@ -197,7 +197,7 @@ static int peri_clk_set_rate(struct clk *c, unsigned long rate) + } + } + +- debug("%s %s set rate %lu div %lu sel %d parent %lu\n", __func__, ++printf("%s %s set rate %lu div %lu sel %d parent %lu\n", __func__, + c->name, c->rate, c->div, c->sel, c->parent->rate); + return ret; + } +@@ -213,7 +213,7 @@ static unsigned long peri_clk_get_rate(struct clk *c) + struct refclk *ref; + u32 reg; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + if (selector_exists(&cd->sel)) { + reg = readl(base + cd->sel.offset); + c->sel = bitfield_extract(reg, cd->sel.shift, cd->sel.width); +@@ -241,7 +241,7 @@ static unsigned long peri_clk_get_rate(struct clk *c) + c->parent = &ref->clk; + c->div = div; + c->rate = c->parent->rate / c->div; +- debug("%s parent rate %lu div %d sel %d rate %lu\n", __func__, ++printf("%s parent rate %lu div %d sel %d rate %lu\n", __func__, + c->parent->rate, div, c->sel, c->rate); + + return c->rate; +@@ -262,7 +262,7 @@ static int ccu_clk_enable(struct clk *c, int enable) + int ret = 0; + u32 reg; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + if (!enable) + return -EINVAL; /* CCU clock cannot shutdown */ + +@@ -321,7 +321,7 @@ static int ccu_clk_enable(struct clk *c, int enable) + static unsigned long ccu_clk_get_rate(struct clk *c) + { + struct ccu_clock *ccu_clk = to_ccu_clk(c); +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + c->rate = ccu_clk->freq_tbl[ccu_clk->freq_id]; + return c->rate; + } +@@ -341,14 +341,14 @@ static int bus_clk_enable(struct clk *c, int enable) + int ret = 0; + u32 reg; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + /* enable access */ + writel(CLK_WR_ACCESS_PASSWORD, base + WR_ACCESS_OFFSET); + + /* enable gating */ + reg = readl(base + cd->gate.offset); + if (!!(reg & (1 << cd->gate.status_bit)) == !!enable) +- debug("%s already %s\n", c->name, ++printf("%s already %s\n", c->name, + enable ? "enabled" : "disabled"); + else { + int want = (enable) ? 1 : 0; +@@ -378,7 +378,7 @@ static unsigned long bus_clk_get_rate(struct clk *c) + struct bus_clock *bus_clk = to_bus_clk(c); + struct ccu_clock *ccu_clk; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + ccu_clk = to_ccu_clk(c->parent); + + c->rate = bus_clk->freq_tbl[ccu_clk->freq_id]; +@@ -395,7 +395,7 @@ struct clk_ops bus_clk_ops = { + /* Enable a reference clock */ + static int ref_clk_enable(struct clk *c, int enable) + { +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + return 0; + } + +@@ -411,7 +411,7 @@ struct clk_ops ref_clk_ops = { + /* Initialize the clock framework */ + int clk_init(void) + { +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + return 0; + } + +@@ -421,7 +421,7 @@ struct clk *clk_get(const char *con_id) + int i; + struct clk_lookup *clk_tblp; + +- debug("%s: %s\n", __func__, con_id); ++printf("%s: %s\n", __func__, con_id); + + clk_tblp = arch_clk_tbl; + for (i = 0; i < arch_clk_tbl_array_size; i++, clk_tblp++) { +@@ -439,7 +439,7 @@ int clk_enable(struct clk *c) + { + int ret = 0; + +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + if (!c->ops || !c->ops->enable) + return -1; + +@@ -461,7 +461,7 @@ int clk_enable(struct clk *c) + /* Disable a clock */ + void clk_disable(struct clk *c) + { +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + if (!c->ops || !c->ops->enable) + return; + +@@ -482,10 +482,10 @@ unsigned long clk_get_rate(struct clk *c) + + if (!c || !c->ops || !c->ops->get_rate) + return 0; +- debug("%s: %s\n", __func__, c->name); ++printf("%s: %s\n", __func__, c->name); + + rate = c->ops->get_rate(c); +- debug("%s: rate = %ld\n", __func__, rate); ++printf("%s: rate = %ld\n", __func__, rate); + return rate; + } + +@@ -496,7 +496,7 @@ int clk_set_rate(struct clk *c, unsigned long rate) + + if (!c || !c->ops || !c->ops->set_rate) + return -EINVAL; +- debug("%s: %s rate=%ld\n", __func__, c->name, rate); ++printf("%s: %s rate=%ld\n", __func__, c->name, rate); + + if (c->use_cnt) + return -EINVAL; +diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c +index f6d25bb68..0c0064c79 100644 +--- a/arch/arm/cpu/armv7/exception_level.c ++++ b/arch/arm/cpu/armv7/exception_level.c +@@ -28,7 +28,7 @@ + static void entry_non_secure(struct jmp_buf_data *non_secure_jmp) + { + dcache_enable(); +- debug("Reached non-secure mode\n"); ++printf("Reached non-secure mode\n"); + + /* Restore stack and registers saved in switch_to_non_secure_mode() */ + longjmp(non_secure_jmp, 1); +diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c +index 8a95ee86a..1642623fe 100644 +--- a/arch/arm/cpu/armv7/ls102xa/soc.c ++++ b/arch/arm/cpu/armv7/ls102xa/soc.c +@@ -151,7 +151,7 @@ void erratum_a010315(void) + + for (i = PCIE1; i <= PCIE2; i++) + if (!is_serdes_configured(i)) { +- debug("PCIe%d: disabled all R/W permission!\n", i); ++printf("PCIe%d: disabled all R/W permission!\n", i); + set_pcie_ns_access(i, 0); + } + } +diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c +index c0422485b..a705d1ec7 100644 +--- a/arch/arm/cpu/armv7/virt-dt.c ++++ b/arch/arm/cpu/armv7/virt-dt.c +@@ -39,7 +39,7 @@ int armv7_apply_memory_carveout(u64 *start, u64 *size) + *start + *size == (u64)CONFIG_ARMV7_SECURE_BASE + + CONFIG_ARMV7_SECURE_RESERVE_SIZE) { + if (*size < CONFIG_ARMV7_SECURE_RESERVE_SIZE) { +- debug("Secure monitor larger than RAM bank!?\n"); ++printf("Secure monitor larger than RAM bank!?\n"); + return -EINVAL; + } + *size -= CONFIG_ARMV7_SECURE_RESERVE_SIZE; +@@ -47,7 +47,7 @@ int armv7_apply_memory_carveout(u64 *start, u64 *size) + *start += CONFIG_ARMV7_SECURE_RESERVE_SIZE; + return 0; + } +- debug("Secure monitor not located at beginning or end of RAM bank\n"); ++printf("Secure monitor not located at beginning or end of RAM bank\n"); + return -EINVAL; + #else /* !CONFIG_ARMV7_SECURE_RESERVE_SIZE */ + return 0; +diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c +index d1aecf6a8..a698be354 100644 +--- a/arch/arm/cpu/armv7m/cache.c ++++ b/arch/arm/cpu/armv7m/cache.c +@@ -130,7 +130,7 @@ static u32 get_cline_size(enum cache_type type) + size = readl(V7M_PROC_REG_CCSIDR) & CLINE_SIZE_MASK; + /* Size enocoded as 2 less than log(no_of_words_in_cache_line) base 2 */ + size = 1 << (size + 2); +- debug("cache line size is %d\n", size); ++printf("cache line size is %d\n", size); + + return size; + } +@@ -155,7 +155,7 @@ static int action_cache_range(enum cache_action action, u32 start_addr, + cline_size = get_cline_size(type); + /* Align start address to cache line boundary */ + start_addr &= ~(cline_size - 1); +- debug("total size for cache action = %llx\n", size); ++printf("total size for cache action = %llx\n", size); + do { + writel(start_addr, action_reg); + size -= cline_size; +@@ -165,7 +165,7 @@ static int action_cache_range(enum cache_action action, u32 start_addr, + /* Make sure cache action is effective for next memory access */ + dsb(); + isb(); /* Make sure instruction stream sees it */ +- debug("cache action on range done\n"); ++printf("cache action on range done\n"); + + return 0; + } +@@ -186,7 +186,7 @@ static int action_dcache_all(enum cache_action action) + dsb(); + + get_cache_ways_sets(&cache); /* Get number of ways & sets */ +- debug("cache: ways= %d, sets= %d\n", cache.ways + 1, cache.sets + 1); ++printf("cache: ways= %d, sets= %d\n", cache.ways + 1, cache.sets + 1); + for (i = cache.sets; i >= 0; i--) { + for (j = cache.ways; j >= 0; j--) { + writel((j << WAYS_SHIFT) | (i << SETS_SHIFT), +diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c +index 15cecb5e0..18ab1b58e 100644 +--- a/arch/arm/cpu/armv8/cache_v8.c ++++ b/arch/arm/cpu/armv8/cache_v8.c +@@ -113,7 +113,7 @@ static u64 *find_pte(u64 addr, int level) + u64 va_bits; + int i; + +- debug("addr=%llx level=%d\n", addr, level); ++printf("addr=%llx level=%d\n", addr, level); + + get_tcr(0, NULL, &va_bits); + if (va_bits < 39) +@@ -127,7 +127,7 @@ static u64 *find_pte(u64 addr, int level) + for (i = start_level; i < 4; i++) { + idx = (addr >> level2shift(i)) & 0x1FF; + pte += idx; +- debug("idx=%llx PTE %p at level %d: %llx\n", idx, pte, i, *pte); ++printf("idx=%llx PTE %p at level %d: %llx\n", idx, pte, i, *pte); + + /* Found it */ + if (i == level) +@@ -167,7 +167,7 @@ static u64 *create_table(void) + static void set_pte_table(u64 *pte, u64 *table) + { + /* Point *pte to the new table */ +- debug("Setting %p to addr=%p\n", pte, table); ++printf("Setting %p to addr=%p\n", pte, table); + *pte = PTE_TYPE_TABLE | (ulong)table; + } + +@@ -186,7 +186,7 @@ static void split_block(u64 *pte, int level) + "mem_map.", pte, old_pte); + + new_table = create_table(); +- debug("Splitting pte %p (%llx) into %p\n", pte, old_pte, new_table); ++printf("Splitting pte %p (%llx) into %p\n", pte, old_pte, new_table); + + for (i = 0; i < MAX_PTE_ENTRIES; i++) { + new_table[i] = old_pte | (i << levelshift); +@@ -195,7 +195,7 @@ static void split_block(u64 *pte, int level) + if ((level + 1) == 3) + new_table[i] |= PTE_TYPE_TABLE; + +- debug("Setting new_table[%lld] = %llx\n", i, new_table[i]); ++printf("Setting new_table[%lld] = %llx\n", i, new_table[i]); + } + + /* Set the new table into effect */ +@@ -217,7 +217,7 @@ static void add_map(struct mm_region *map) + while (size) { + pte = find_pte(virt, 0); + if (pte && (pte_type(pte) == PTE_TYPE_FAULT)) { +- debug("Creating table for virt 0x%llx\n", virt); ++printf("Creating table for virt 0x%llx\n", virt); + new_table = create_table(); + set_pte_table(pte, new_table); + } +@@ -228,11 +228,11 @@ static void add_map(struct mm_region *map) + panic("pte not found\n"); + + blocksize = 1ULL << level2shift(level); +- debug("Checking if pte fits for virt=%llx size=%llx blocksize=%llx\n", ++printf("Checking if pte fits for virt=%llx size=%llx blocksize=%llx\n", + virt, size, blocksize); + if (size >= blocksize && !(virt & (blocksize - 1))) { + /* Page fits, create block PTE */ +- debug("Setting PTE %p to block virt=%llx\n", ++printf("Setting PTE %p to block virt=%llx\n", + pte, virt); + if (level == 3) + *pte = phys | attrs | PTE_TYPE_PAGE; +@@ -244,12 +244,12 @@ static void add_map(struct mm_region *map) + break; + } else if (pte_type(pte) == PTE_TYPE_FAULT) { + /* Page doesn't fit, create subpages */ +- debug("Creating subtable for virt 0x%llx blksize=%llx\n", ++printf("Creating subtable for virt 0x%llx blksize=%llx\n", + virt, blocksize); + new_table = create_table(); + set_pte_table(pte, new_table); + } else if (pte_type(pte) == PTE_TYPE_BLOCK) { +- debug("Split block into subtable for virt 0x%llx blksize=0x%llx\n", ++printf("Split block into subtable for virt 0x%llx blksize=0x%llx\n", + virt, blocksize); + split_block(pte, level); + } +@@ -443,9 +443,9 @@ inline void flush_dcache_all(void) + __asm_flush_dcache_all(); + ret = __asm_flush_l3_dcache(); + if (ret) +- debug("flushing dcache returns 0x%x\n", ret); ++printf("flushing dcache returns 0x%x\n", ret); + else +- debug("flushing dcache successfully.\n"); ++printf("flushing dcache successfully.\n"); + } + + #ifndef CONFIG_SYS_DISABLE_DCACHE_OPS +@@ -534,13 +534,13 @@ static u64 set_one_region(u64 start, u64 size, u64 attrs, bool flag, int level) + *pte &= ~PMD_ATTRINDX_MASK; + *pte |= attrs & PMD_ATTRINDX_MASK; + } +- debug("Set attrs=%llx pte=%p level=%d\n", attrs, pte, level); ++printf("Set attrs=%llx pte=%p level=%d\n", attrs, pte, level); + + return levelsize; + } + + /* Unaligned or doesn't fit, maybe split block into table */ +- debug("addr=%llx level=%d pte=%p (%llx)\n", start, level, pte, *pte); ++printf("addr=%llx level=%d pte=%p (%llx)\n", start, level, pte, *pte); + + /* Maybe we need to split the block into a table */ + if (pte_type(pte) == PTE_TYPE_BLOCK) +@@ -562,7 +562,7 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + u64 real_start = start; + u64 real_size = size; + +- debug("start=%lx size=%lx\n", (ulong)start, (ulong)size); ++printf("start=%lx size=%lx\n", (ulong)start, (ulong)size); + + if (!gd->arch.tlb_emerg) + panic("Emergency page table not setup."); +diff --git a/arch/arm/cpu/armv8/exception_level.c b/arch/arm/cpu/armv8/exception_level.c +index b11936548..eca8f0036 100644 +--- a/arch/arm/cpu/armv8/exception_level.c ++++ b/arch/arm/cpu/armv8/exception_level.c +@@ -27,7 +27,7 @@ + static void entry_non_secure(struct jmp_buf_data *non_secure_jmp) + { + dcache_enable(); +- debug("Reached non-secure mode\n"); ++printf("Reached non-secure mode\n"); + + /* Restore stack and registers saved in switch_to_non_secure_mode() */ + longjmp(non_secure_jmp, 1); +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +index d0103fc88..035cd94a1 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c ++++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +@@ -661,7 +661,7 @@ enum boot_src __get_boot_src(u32 porsr1) + #if !defined(CONFIG_NXP_LSCH3_2) + u32 val; + #endif +- debug("%s: rcw_src 0x%x\n", __func__, rcw_src); ++printf("%s: rcw_src 0x%x\n", __func__, rcw_src); + + #if defined(CONFIG_FSL_LSCH3) + #if defined(CONFIG_NXP_LSCH3_2) +@@ -760,7 +760,7 @@ enum boot_src __get_boot_src(u32 porsr1) + if (CONFIG_IS_ENABLED(SYS_FSL_ERRATUM_A010539) && !rcw_src) + src = BOOT_SOURCE_QSPI_NOR; + +- debug("%s: src 0x%x\n", __func__, src); ++printf("%s: src 0x%x\n", __func__, src); + return src; + } + +@@ -791,7 +791,7 @@ enum boot_src get_boot_src(void) + #endif + } + +- debug("%s: porsr1 0x%x\n", __func__, porsr1); ++printf("%s: porsr1 0x%x\n", __func__, porsr1); + + return __get_boot_src(porsr1); + } +@@ -1133,7 +1133,7 @@ int arch_early_init_r(void) + erratum_a009942_check_cpo(); + #endif + if (check_psci()) { +- debug("PSCI: PSCI does not exist.\n"); ++printf("PSCI: PSCI does not exist.\n"); + + /* if PSCI does not exist, boot secondary cores here */ + if (fsl_layerscape_wake_seconday_cores()) +@@ -1363,7 +1363,7 @@ static int tfa_dram_init_banksize(void) + struct pt_regs regs; + phys_size_t dram_size = tfa_get_dram_size(); + +- debug("dram_size %llx\n", dram_size); ++printf("dram_size %llx\n", dram_size); + + if (!dram_size) + return -EINVAL; +@@ -1378,7 +1378,7 @@ static int tfa_dram_init_banksize(void) + break; + } + +- debug("bank[%d]: start %lx, size %lx\n", i, regs.regs[1], ++printf("bank[%d]: start %lx, size %lx\n", i, regs.regs[1], + regs.regs[2]); + gd->bd->bi_dram[i].start = regs.regs[1]; + gd->bd->bi_dram[i].size = regs.regs[2]; +@@ -1442,7 +1442,7 @@ int dram_init_banksize(void) + + #ifdef CONFIG_SYS_MEM_RESERVE_SECURE + if (gd->arch.secure_ram & MEM_RESERVE_SECURE_MAINTAINED) { +- debug("No need to run again, skip %s\n", __func__); ++printf("No need to run again, skip %s\n", __func__); + + return 0; + } +@@ -1528,7 +1528,7 @@ int dram_init_banksize(void) + #endif + + #ifdef CONFIG_SYS_MEM_RESERVE_SECURE +- debug("%s is called. gd->ram_size is reduced to %lu\n", ++printf("%s is called. gd->ram_size is reduced to %lu\n", + __func__, (ulong)gd->ram_size); + #endif + +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +index f1624ff30..ffc2c334b 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c ++++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +@@ -135,7 +135,7 @@ remove_psci_node: + fdt_setprop(blob, off, "cpu-release-addr", + &val, sizeof(val)); + } else { +- debug("skipping offline core\n"); ++printf("skipping offline core\n"); + } + } else { + puts("Warning: found cpu node without reg property\n"); +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c +index 41c89b890..7463fdb97 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c ++++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c +@@ -121,7 +121,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift, + enum srds_prtcl lane_prtcl = serdes_get_prtcl(sd, cfg, lane); + + if (unlikely(lane_prtcl >= SERDES_PRCTL_COUNT)) +- debug("Unknown SerDes lane protocol %d\n", lane_prtcl); ++printf("Unknown SerDes lane protocol %d\n", lane_prtcl); + else + serdes_prtcl_map[lane_prtcl] = 1; + } +@@ -163,7 +163,7 @@ int setup_serdes_volt(u32 svdd) + if (svdd_cur < 0) + return -EINVAL; + +- debug("%s: current SVDD: %dmV; target SVDD: %dmV\n", ++printf("%s: current SVDD: %dmV; target SVDD: %dmV\n", + __func__, svdd_cur, svdd_tar); + if (svdd_cur == svdd_tar) + return 0; +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +index fad7a9356..778a3b879 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c ++++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +@@ -155,7 +155,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask, + for (lane = 0; lane < SRDS_MAX_LANES; lane++) { + enum srds_prtcl lane_prtcl = serdes_get_prtcl(sd, cfg, lane); + if (unlikely(lane_prtcl >= SERDES_PRCTL_COUNT)) +- debug("Unknown SerDes lane protocol %d\n", lane_prtcl); ++printf("Unknown SerDes lane protocol %d\n", lane_prtcl); + else { + serdes_prtcl_map[lane_prtcl] = 1; + #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) +@@ -425,7 +425,7 @@ int setup_serdes_volt(u32 svdd) + if (svdd_cur < 0) + return -EINVAL; + +- debug("%s: current SVDD: %x; target SVDD: %x\n", ++printf("%s: current SVDD: %x; target SVDD: %x\n", + __func__, svdd_cur, svdd_tar); + if (svdd_cur == svdd_tar) + return 0; +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c +index 49df8b379..572720868 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c ++++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c +@@ -107,7 +107,7 @@ void fdt_fixup_ecam(void *blob) + + off = fdt_node_offset_by_compatible(blob, 0, "pci-host-ecam-generic"); + if (off < 0) { +- debug("ECAM node not found\n"); ++printf("ECAM node not found\n"); + return; + } + +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c +index 730d7663d..16e920b74 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c ++++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c +@@ -107,7 +107,7 @@ int fsl_layerscape_wake_seconday_cores(void) + efi_size_in_pages(secondary_boot_code_size), + &reloc_addr); + if (ret == EFI_SUCCESS) { +- debug("Relocating spin table from %llx to %llx (size %lx)\n", ++printf("Relocating spin table from %llx to %llx (size %lx)\n", + (u64)secondary_boot_code_start, reloc_addr, + secondary_boot_code_size); + memcpy((void *)reloc_addr, secondary_boot_code_start, +@@ -136,7 +136,7 @@ int fsl_layerscape_wake_seconday_cores(void) + (unsigned long)table + + (CONFIG_MAX_CPUS*SPIN_TABLE_ELEM_SIZE)); + +- debug("Waking secondary cores to start from %lx\n", gd->relocaddr); ++printf("Waking secondary cores to start from %lx\n", gd->relocaddr); + + #ifdef CONFIG_FSL_LSCH3 + gur_out32(&gur->bootlocptrh, (u32)(gd->relocaddr >> 32)); +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c +index b9894d41b..fd2818d1b 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c ++++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c +@@ -51,13 +51,13 @@ int ppa_init(void) + + /* Skip if running at lower exception level */ + if (el < 3) { +- debug("Skipping PPA init, running at EL%d\n", el); ++printf("Skipping PPA init, running at EL%d\n", el); + return 0; + } + + #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP + ppa_fit_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR; +- debug("%s: PPA image load from XIP\n", __func__); ++printf("%s: PPA image load from XIP\n", __func__); + #ifdef CONFIG_CHAIN_OF_TRUST + ppa_esbc_hdr = CONFIG_SYS_LS_PPA_ESBC_ADDR; + #endif +@@ -72,7 +72,7 @@ int ppa_init(void) + u32 cnt; + u32 blk; + +- debug("%s: PPA image load from eMMC/SD\n", __func__); ++printf("%s: PPA image load from eMMC/SD\n", __func__); + + ret = mmc_initialize(gd->bd); + if (ret) { +@@ -100,7 +100,7 @@ int ppa_init(void) + + blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512; + cnt = DIV_ROUND_UP(fdt_header_len, 512); +- debug("%s: MMC read PPA FIT header: dev # %u, block # %u, count %u\n", ++printf("%s: MMC read PPA FIT header: dev # %u, block # %u, count %u\n", + __func__, dev, blk, cnt); + ret = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, fitp); + if (ret != cnt) { +@@ -132,7 +132,7 @@ int ppa_init(void) + printf("MMC/SD read of PPA header failed\n"); + return -EIO; + } +- debug("Read PPA header to 0x%p\n", ppa_hdr_ddr); ++printf("Read PPA header to 0x%p\n", ppa_hdr_ddr); + + ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr; + #endif +@@ -150,7 +150,7 @@ int ppa_init(void) + + blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512; + cnt = DIV_ROUND_UP(fw_length, 512); +- debug("%s: MMC read PPA FIT image: dev # %u, block # %u, count %u\n", ++printf("%s: MMC read PPA FIT image: dev # %u, block # %u, count %u\n", + __func__, dev, blk, cnt); + ret = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, ppa_fit_addr); + if (ret != cnt) { +@@ -163,7 +163,7 @@ int ppa_init(void) + #elif defined(CONFIG_SYS_LS_PPA_FW_IN_NAND) + struct fdt_header fit; + +- debug("%s: PPA image load from NAND\n", __func__); ++printf("%s: PPA image load from NAND\n", __func__); + + nand_init(); + ret = nand_read(get_nand_dev_by_index(0), +@@ -199,7 +199,7 @@ int ppa_init(void) + CONFIG_SYS_LS_PPA_FW_ADDR); + return -EIO; + } +- debug("Read PPA header to 0x%p\n", ppa_hdr_ddr); ++printf("Read PPA header to 0x%p\n", ppa_hdr_ddr); + + ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr; + #endif +@@ -270,7 +270,7 @@ int ppa_init(void) + loadable_h = &scfg->scratchrw[3]; + #endif + +- debug("fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\n", ++printf("fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\n", + boot_loc_ptr_l, boot_loc_ptr_h); + ret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l, boot_loc_ptr_h, + loadable_l, loadable_h); +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c +index c3cd6c7ac..dbeea2d49 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c ++++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c +@@ -56,13 +56,13 @@ int ls_gic_rd_tables_init(void *blob) + lpi_base.end = addr + size - 1; + ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL, false); + if (ret) { +- debug("%s: failed to add reserved memory\n", __func__); ++printf("%s: failed to add reserved memory\n", __func__); + return ret; + } + + ret = gic_lpi_tables_init(); + if (ret) +- debug("%s: failed to init gic-lpi-tables\n", __func__); ++printf("%s: failed to init gic-lpi-tables\n", __func__); + + return ret; + } +@@ -406,18 +406,18 @@ int get_core_volt_from_fuse(void) + + /* get the voltage ID from fuse status register */ + fusesr = in_le32(&gur->dcfg_fusesr); +- debug("%s: fusesr = 0x%x\n", __func__, fusesr); ++printf("%s: fusesr = 0x%x\n", __func__, fusesr); + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & + FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; + if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) { + vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) & + FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; + } +- debug("%s: VID = 0x%x\n", __func__, vid); ++printf("%s: VID = 0x%x\n", __func__, vid); + switch (vid) { + case 0x00: /* VID isn't supported */ + vdd = -EINVAL; +- debug("%s: The VID feature is not supported\n", __func__); ++printf("%s: The VID feature is not supported\n", __func__); + break; + case 0x08: /* 0.9V silicon */ + vdd = 900; +@@ -427,10 +427,10 @@ int get_core_volt_from_fuse(void) + break; + default: /* Other core voltage */ + vdd = -EINVAL; +- debug("%s: The VID(%x) isn't supported\n", __func__, vid); ++printf("%s: The VID(%x) isn't supported\n", __func__, vid); + break; + } +- debug("%s: The required minimum volt of CORE is %dmV\n", __func__, vdd); ++printf("%s: The required minimum volt of CORE is %dmV\n", __func__, vdd); + + return vdd; + } +@@ -504,7 +504,7 @@ void erratum_a010315(void) + + for (i = PCIE1; i <= PCIE4; i++) + if (!is_serdes_configured(i)) { +- debug("PCIe%d: disabled all R/W permission!\n", i); ++printf("PCIe%d: disabled all R/W permission!\n", i); + set_pcie_ns_access(i, 0); + } + } +@@ -533,18 +533,18 @@ int get_core_volt_from_fuse(void) + u8 vid; + + fusesr = in_be32(&gur->dcfg_fusesr); +- debug("%s: fusesr = 0x%x\n", __func__, fusesr); ++printf("%s: fusesr = 0x%x\n", __func__, fusesr); + vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) & + FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK; + if ((vid == 0) || (vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK)) { + vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) & + FSL_CHASSIS2_DCFG_FUSESR_VID_MASK; + } +- debug("%s: VID = 0x%x\n", __func__, vid); ++printf("%s: VID = 0x%x\n", __func__, vid); + switch (vid) { + case 0x00: /* VID isn't supported */ + vdd = -EINVAL; +- debug("%s: The VID feature is not supported\n", __func__); ++printf("%s: The VID feature is not supported\n", __func__); + break; + case 0x08: /* 0.9V silicon */ + vdd = 900; +@@ -557,7 +557,7 @@ int get_core_volt_from_fuse(void) + printf("%s: The VID(%x) isn't supported\n", __func__, vid); + break; + } +- debug("%s: The required minimum volt of CORE is %dmV\n", __func__, vdd); ++printf("%s: The required minimum volt of CORE is %dmV\n", __func__, vdd); + + return vdd; + } +diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c +index b3f1148f9..82a1b625e 100644 +--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c ++++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c +@@ -76,7 +76,7 @@ void board_init_f(ulong dummy) + board_early_init_f(); + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + timer_init(); +diff --git a/arch/arm/cpu/armv8/hisilicon/pinmux.c b/arch/arm/cpu/armv8/hisilicon/pinmux.c +index 5183e00a4..1cf28b049 100644 +--- a/arch/arm/cpu/armv8/hisilicon/pinmux.c ++++ b/arch/arm/cpu/armv8/hisilicon/pinmux.c +@@ -96,7 +96,7 @@ static void hi6220_uart_config(int peripheral) + break; + + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return; + } + } +@@ -155,7 +155,7 @@ static int hi6220_mmc_config(int peripheral) + break; + + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + } + +@@ -175,7 +175,7 @@ int hi6220_pinmux_config(int peripheral) + case PERIPH_ID_SDMMC1: + return hi6220_mmc_config(peripheral); + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + } + +diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c +index 267894fbc..5a071c31a 100644 +--- a/arch/arm/cpu/armv8/sec_firmware.c ++++ b/arch/arm/cpu/armv8/sec_firmware.c +@@ -105,7 +105,7 @@ static int sec_firmware_parse_image(const void *sec_firmware_img, + if (ret) + return ret; + +- debug("SEC Firmware: raw_image_addr = 0x%p, raw_image_size = 0x%lx\n", ++printf("SEC Firmware: raw_image_addr = 0x%p, raw_image_size = 0x%lx\n", + *raw_image_addr, *raw_image_size); + + return 0; +@@ -188,7 +188,7 @@ static int sec_firmware_check_copy_loadable(const void *sec_firmware_img, + gd->arch.tlb_size) + load; + + /* Copy loadable to secure memory and flush dcache */ +- debug("%s copied to address 0x%p\n", ++printf("%s copied to address 0x%p\n", + FIT_LOADABLE_PROP, (void *)sec_firmware_loadable_addr); + memcpy((void *)sec_firmware_loadable_addr, data, size); + flush_dcache_range(sec_firmware_loadable_addr, +@@ -213,7 +213,7 @@ static int sec_firmware_check_copy_loadable(const void *sec_firmware_img, + static int sec_firmware_copy_image(const char *title, + u64 image_addr, u32 image_size, u64 sec_firmware) + { +- debug("%s copied to address 0x%p\n", title, (void *)sec_firmware); ++printf("%s copied to address 0x%p\n", title, (void *)sec_firmware); + memcpy((void *)sec_firmware, (void *)image_addr, image_size); + flush_dcache_range(sec_firmware, sec_firmware + image_size); + +@@ -259,7 +259,7 @@ static int sec_firmware_load_image(const void *sec_firmware_img, + + /* Align SEC Firmware base address to 4K */ + sec_firmware_addr = (sec_firmware_addr + 0xfff) & ~0xfff; +- debug("SEC Firmware: Load address: 0x%llx\n", ++printf("SEC Firmware: Load address: 0x%llx\n", + sec_firmware_addr & SEC_FIRMWARE_ADDR_MASK); + + ret = sec_firmware_parse_image(sec_firmware_img, &raw_image_addr, +@@ -289,7 +289,7 @@ static int sec_firmware_load_image(const void *sec_firmware_img, + goto out; + + sec_firmware_addr |= SEC_FIRMWARE_LOADED; +- debug("SEC Firmware: Entry point: 0x%llx\n", ++printf("SEC Firmware: Entry point: 0x%llx\n", + sec_firmware_addr & SEC_FIRMWARE_ADDR_MASK); + + return 0; +@@ -434,7 +434,7 @@ int sec_firmware_init(const void *sec_firmware_img, + } + } + +- debug("SEC Firmware: Return from SEC Firmware: current_el = %d\n", ++printf("SEC Firmware: Return from SEC Firmware: current_el = %d\n", + current_el()); + + /* +diff --git a/arch/arm/include/asm/arch-imx8/sci/sci.h b/arch/arm/include/asm/arch-imx8/sci/sci.h +index 1c29209b3..be6f54f84 100644 +--- a/arch/arm/include/asm/arch-imx8/sci/sci.h ++++ b/arch/arm/include/asm/arch-imx8/sci/sci.h +@@ -52,7 +52,7 @@ static inline int sc_err_to_linux(sc_err_t err) + break; + } + +- debug("%s %d %d\n", __func__, err, ret); ++printf("%s %d %d\n", __func__, err, ret); + + return ret; + } +diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c +index f60ee3a7e..6913e3e2e 100644 +--- a/arch/arm/lib/bootm.c ++++ b/arch/arm/lib/bootm.c +@@ -66,7 +66,7 @@ void arch_lmb_reserve(struct lmb *lmb) + * pointer. + */ + sp = get_sp(); +- debug("## Current stack ends at 0x%08lx ", sp); ++printf("## Current stack ends at 0x%08lx ", sp); + + /* adjust sp by 4K to be safe */ + sp -= 4096; +@@ -246,13 +246,13 @@ static void boot_prep_linux(bootm_headers_t *images) + + if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) { + #ifdef CONFIG_OF_LIBFDT +- debug("using: FDT\n"); ++printf("using: FDT\n"); + if (image_setup_linux(images)) { + panic("FDT creation failed!"); + } + #endif + } else if (BOOTM_ENABLE_TAGS) { +- debug("using: ATAGS\n"); ++printf("using: ATAGS\n"); + setup_start_tag(gd->bd); + if (BOOTM_ENABLE_SERIAL_TAG) + setup_serial_tag(¶ms); +@@ -345,7 +345,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) + kernel_entry = (void (*)(void *fdt_addr, void *res0, void *res1, + void *res2))images->ep; + +- debug("## Transferring control to Linux (at address %lx)...\n", ++printf("## Transferring control to Linux (at address %lx)...\n", + (ulong) kernel_entry); + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + +@@ -390,13 +390,13 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) + s = env_get("machid"); + if (s) { + if (strict_strtoul(s, 16, &machid) < 0) { +- debug("strict_strtoul failed!\n"); ++printf("strict_strtoul failed!\n"); + return; + } + printf("Using machid 0x%lx from environment\n", machid); + } + +- debug("## Transferring control to Linux (at address %08lx)" \ ++printf("## Transferring control to Linux (at address %08lx)" \ + "...\n", (ulong) kernel_entry); + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + announce_and_cleanup(fake); +diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c +index aab1bf436..6e5a3c615 100644 +--- a/arch/arm/lib/cache-cp15.c ++++ b/arch/arm/lib/cache-cp15.c +@@ -51,7 +51,7 @@ void set_section_dcache(int section, enum dcache_option option) + + __weak void mmu_page_table_flush(unsigned long start, unsigned long stop) + { +- debug("%s: Warning: not implemented\n", __func__); ++printf("%s: Warning: not implemented\n", __func__); + } + + void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys, +@@ -71,10 +71,10 @@ void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys, + start = start >> MMU_SECTION_SHIFT; + + #ifdef CONFIG_ARMV7_LPAE +- debug("%s: start=%pa, size=%zu, option=%llx\n", __func__, &start, size, ++printf("%s: start=%pa, size=%zu, option=%llx\n", __func__, &start, size, + option); + #else +- debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size, ++printf("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size, + option); + #endif + for (upto = start; upto < end; upto++, phys += MMU_SECTION_SIZE) +@@ -108,7 +108,7 @@ __weak void dram_bank_mmu_setup(int bank) + if ((gd->flags & GD_FLG_RELOC) == 0) + return; + +- debug("%s: bank: %d\n", __func__, bank); ++printf("%s: bank: %d\n", __func__, bank); + for (i = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT; + i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) + + (bd->bi_dram[bank].size >> MMU_SECTION_SHIFT); +diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c +index a2bf2e57b..76a069c81 100644 +--- a/arch/arm/lib/cache.c ++++ b/arch/arm/lib/cache.c +@@ -97,7 +97,7 @@ int noncached_init(void) + size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE); + start = end - size; + +- debug("mapping memory %pa-%pa non-cached\n", &start, &end); ++printf("mapping memory %pa-%pa non-cached\n", &start, &end); + + noncached_start = start; + noncached_end = end; +@@ -115,7 +115,7 @@ phys_addr_t noncached_alloc(size_t size, size_t align) + if (next >= noncached_end || (noncached_end - next) < size) + return 0; + +- debug("allocated %zu bytes of uncached memory @%pa\n", size, &next); ++printf("allocated %zu bytes of uncached memory @%pa\n", size, &next); + noncached_next = next + size; + + return next; +@@ -149,7 +149,7 @@ __weak int arm_reserve_mmu(void) + gd->relocaddr &= ~(0x10000 - 1); + + gd->arch.tlb_addr = gd->relocaddr; +- debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, ++printf("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, + gd->arch.tlb_addr + gd->arch.tlb_size); + + #ifdef CONFIG_SYS_MEM_RESERVE_SECURE +diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c +index 904fddd6c..9058d5662 100644 +--- a/arch/arm/lib/semihosting.c ++++ b/arch/arm/lib/semihosting.c +@@ -55,7 +55,7 @@ static long smh_open(const char *fname, char *modestr) + size_t len; + } open; + +- debug("%s: file \'%s\', mode \'%s\'\n", __func__, fname, modestr); ++printf("%s: file \'%s\', mode \'%s\'\n", __func__, fname, modestr); + + /* Check the file mode */ + if (!(strcmp(modestr, "r"))) { +@@ -93,7 +93,7 @@ static long smh_read(long fd, void *memp, size_t len) + size_t len; + } read; + +- debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len); ++printf("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len); + + read.fd = fd; + read.memp = memp; +@@ -122,7 +122,7 @@ static long smh_close(long fd) + { + long ret; + +- debug("%s: fd %ld\n", __func__, fd); ++printf("%s: fd %ld\n", __func__, fd); + + ret = smh_trap(SYSCLOSE, &fd); + if (ret == -1) +@@ -138,7 +138,7 @@ static long smh_len_fd(long fd) + { + long ret; + +- debug("%s: fd %ld\n", __func__, fd); ++printf("%s: fd %ld\n", __func__, fd); + + ret = smh_trap(SYSFLEN, &fd); + if (ret == -1) +diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c +index 8e2bdf353..48956dc6c 100644 +--- a/arch/arm/lib/spl.c ++++ b/arch/arm/lib/spl.c +@@ -54,7 +54,7 @@ void __weak board_init_f(ulong dummy) + #ifdef CONFIG_ARM64 + void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) + { +- debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg); ++printf("Entering kernel arg pointer: 0x%p\n", spl_image->arg); + cleanup_before_linux(); + armv8_switch_to_el2((u64)spl_image->arg, 0, 0, 0, + spl_image->entry_point, ES_TO_AARCH64); +@@ -67,7 +67,7 @@ void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) + machid = CONFIG_MACH_TYPE; + #endif + +- debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg); ++printf("Entering kernel arg pointer: 0x%p\n", spl_image->arg); + typedef void (*image_entry_arg_t)(int, int, void *) + __attribute__ ((noreturn)); + image_entry_arg_t image_entry = +diff --git a/arch/arm/mach-aspeed/ast2500/board_common.c b/arch/arm/mach-aspeed/ast2500/board_common.c +index aca200223..87db93ec1 100644 +--- a/arch/arm/mach-aspeed/ast2500/board_common.c ++++ b/arch/arm/mach-aspeed/ast2500/board_common.c +@@ -44,13 +44,13 @@ int dram_init(void) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM FAIL1\r\n"); ++printf("DRAM FAIL1\r\n"); + return ret; + } + + ret = ram_get_info(dev, &ram); + if (ret) { +- debug("DRAM FAIL2\r\n"); ++printf("DRAM FAIL2\r\n"); + return ret; + } + +diff --git a/arch/arm/mach-aspeed/ast2600/board_common.c b/arch/arm/mach-aspeed/ast2600/board_common.c +index 82ff21908..4ed94b070 100644 +--- a/arch/arm/mach-aspeed/ast2600/board_common.c ++++ b/arch/arm/mach-aspeed/ast2600/board_common.c +@@ -35,13 +35,13 @@ int dram_init(void) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("cannot get DRAM driver\n"); ++printf("cannot get DRAM driver\n"); + return ret; + } + + ret = ram_get_info(dev, &ram); + if (ret) { +- debug("cannot get DRAM information\n"); ++printf("cannot get DRAM information\n"); + return ret; + } + +@@ -76,13 +76,13 @@ void board_add_ram_info(int use_default) + rc = uclass_get_device_by_driver(UCLASS_CLK, + DM_DRIVER_GET(aspeed_ast2600_scu), &scu_dev); + if (rc) { +- debug("%s: cannot find SCU device, rc=%d\n", __func__, rc); ++printf("%s: cannot find SCU device, rc=%d\n", __func__, rc); + return; + } + + scu = devfdt_get_addr_ptr(scu_dev); + if (IS_ERR_OR_NULL(scu)) { +- debug("%s: cannot get SCU address pointer\n", __func__); ++printf("%s: cannot get SCU address pointer\n", __func__); + return; + } + +diff --git a/arch/arm/mach-aspeed/ast2600/spl.c b/arch/arm/mach-aspeed/ast2600/spl.c +index 0d8cb2967..5255b242a 100644 +--- a/arch/arm/mach-aspeed/ast2600/spl.c ++++ b/arch/arm/mach-aspeed/ast2600/spl.c +@@ -50,7 +50,7 @@ int spl_start_uboot(void) + int board_fit_config_name_match(const char *name) + { + /* just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + return 0; + } + #endif +diff --git a/arch/arm/mach-at91/arm926ejs/eflash.c b/arch/arm/mach-at91/arm926ejs/eflash.c +index 23c24936e..b56d11517 100644 +--- a/arch/arm/mach-at91/arm926ejs/eflash.c ++++ b/arch/arm/mach-at91/arm926ejs/eflash.c +@@ -67,7 +67,7 @@ unsigned long flash_init(void) + u32 id, size, nplanes, planesize, nlocks; + u32 addr, i, tmp=0; + +- debug("eflash: init\n"); ++printf("eflash: init\n"); + + flash_info[0].flash_id = FLASH_UNKNOWN; + +@@ -86,13 +86,13 @@ unsigned long flash_init(void) + pagesize = readl(&eefc->frr); /* word 2 */ + nplanes = readl(&eefc->frr); /* word 3 */ + planesize = readl(&eefc->frr); /* word 4 */ +- debug("id=%08x size=%u pagesize=%u planes=%u planesize=%u\n", ++printf("id=%08x size=%u pagesize=%u planes=%u planesize=%u\n", + id, size, pagesize, nplanes, planesize); + for (i=1; ifrr); /* words 5..4+nplanes-1 */ + }; + nlocks = readl(&eefc->frr); /* word 4+nplanes */ +- debug("nlocks=%u\n", nlocks); ++printf("nlocks=%u\n", nlocks); + /* since we are going to use the lock regions as sectors, check count */ + if (nlocks > CONFIG_SYS_MAX_FLASH_SECT) { + printf("eflash: number of lock regions(%u) "\ +@@ -156,7 +156,7 @@ int flash_real_protect (flash_info_t *info, long sector, int prot) + u32 pagenum = (info->start[sector]-ATMEL_BASE_FLASH)/pagesize; + u32 i, tmp=0; + +- debug("protect sector=%ld prot=%d\n", sector, prot); ++printf("protect sector=%ld prot=%d\n", sector, prot); + + #if defined(CONFIG_EFLASH_PROTSECTORS) + if (sector < CONFIG_EFLASH_PROTSECTORS) { +@@ -192,7 +192,7 @@ static u32 erase_write_page (u32 pagenum) + { + at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC; + +- debug("erase+write page=%u\n", pagenum); ++printf("erase+write page=%u\n", pagenum); + + /* give erase and write page command */ + writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_EWP | +@@ -206,7 +206,7 @@ static u32 erase_write_page (u32 pagenum) + + int flash_erase(flash_info_t *info, int s_first, int s_last) + { +- debug("erase first=%d last=%d\n", s_first, s_last); ++printf("erase first=%d last=%d\n", s_first, s_last); + puts("this flash does not need and support erasing!\n"); + return 0; + } +@@ -223,7 +223,7 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) + u32 *src32, *dst32; + u32 i; + +- debug("write src=%08lx addr=%08lx cnt=%lx\n", ++printf("write src=%08lx addr=%08lx cnt=%lx\n", + (ulong)src, addr, cnt); + + /* REQUIRE addr to be on a page start, abort if not */ +diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c +index d0c732539..23333477d 100644 +--- a/arch/arm/mach-at91/spl_at91.c ++++ b/arch/arm/mach-at91/spl_at91.c +@@ -84,7 +84,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + #endif +diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c +index 217ed12e3..b8e01358a 100644 +--- a/arch/arm/mach-at91/spl_atmel.c ++++ b/arch/arm/mach-at91/spl_atmel.c +@@ -106,7 +106,7 @@ void board_init_f(ulong dummy) + if (IS_ENABLED(CONFIG_OF_CONTROL)) { + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + } +@@ -138,7 +138,7 @@ void board_init_f(ulong dummy) + + ret = spl_init(); + if (ret) { +- debug("spl_init() failed: %d\n", ret); ++printf("spl_init() failed: %d\n", ret); + hang(); + } + +diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c +index da9faafe1..0db7ec87d 100644 +--- a/arch/arm/mach-bcm283x/mbox.c ++++ b/arch/arm/mach-bcm283x/mbox.c +@@ -21,7 +21,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv) + ulong endtime = get_timer(0) + TIMEOUT; + u32 val; + +- debug("time: %lu timeout: %lu\n", get_timer(0), endtime); ++printf("time: %lu timeout: %lu\n", get_timer(0), endtime); + + if (send & BCM2835_CHAN_MASK) { + printf("mbox: Illegal mbox data 0x%08x\n", send); +@@ -56,7 +56,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv) + /* Send the request */ + + val = BCM2835_MBOX_PACK(chan, send); +- debug("mbox: TX raw: 0x%08x\n", val); ++printf("mbox: TX raw: 0x%08x\n", val); + writel(val, ®s->write); + + /* Wait for the response */ +@@ -74,7 +74,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv) + /* Read the response */ + + val = readl(®s->read); +- debug("mbox: RX raw: 0x%08x\n", val); ++printf("mbox: RX raw: 0x%08x\n", val); + + /* Validate the response */ + +diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c +index 90b38b7e0..bf4674338 100644 +--- a/arch/arm/mach-davinci/misc.c ++++ b/arch/arm/mach-davinci/misc.c +@@ -98,7 +98,7 @@ void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr) + * There is no MAC address in the environment, so we + * initialize it from the value in the EEPROM. + */ +- debug("### Setting environment from EEPROM MAC address = " ++printf("### Setting environment from EEPROM MAC address = " + "\"%pM\"\n", + env_enetaddr); + ret = !eth_env_set_enetaddr("ethaddr", rom_enetaddr); +diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c +index ef48d35aa..591c6bc8c 100644 +--- a/arch/arm/mach-exynos/clock.c ++++ b/arch/arm/mach-exynos/clock.c +@@ -357,7 +357,7 @@ static struct clk_bit_info *get_clk_bit_info(int peripheral) + } + + if (info[i].id == PERIPH_ID_NONE) +- debug("ERROR: Peripheral ID %d not found\n", peripheral); ++printf("ERROR: Peripheral ID %d not found\n", peripheral); + + return &info[i]; + } +@@ -426,7 +426,7 @@ static unsigned long exynos5_get_periph_rate(int peripheral) + sub_div = readl(&clk->div_top0); + break; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + }; + +@@ -444,7 +444,7 @@ static unsigned long exynos5_get_periph_rate(int peripheral) + sclk = exynos5_get_pll_clk(VPLL); + break; + default: +- debug("%s: EXYNOS_SRC %d not supported\n", __func__, src); ++printf("%s: EXYNOS_SRC %d not supported\n", __func__, src); + return 0; + } + +@@ -517,7 +517,7 @@ static unsigned long exynos542x_get_periph_rate(int peripheral) + div = readl(&clk->div_top1); + break; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + }; + +@@ -538,7 +538,7 @@ static unsigned long exynos542x_get_periph_rate(int peripheral) + sclk = exynos542x_get_pll_clk(RPLL); + break; + default: +- debug("%s: EXYNOS542X_SRC %d not supported", __func__, src); ++printf("%s: EXYNOS542X_SRC %d not supported", __func__, src); + return 0; + } + +@@ -1311,7 +1311,7 @@ int exynos5_set_epll_clk(unsigned long rate) + while (!(readl(&clk->epll_con0) & + (0x1 << EXYNOS5_EPLLCON0_LOCKED_SHIFT))) { + if (get_timer(start) > TIMEOUT_EPLL_LOCK) { +- debug("%s: Timeout waiting for EPLL lock\n", __func__); ++printf("%s: Timeout waiting for EPLL lock\n", __func__); + return -1; + } + } +@@ -1360,26 +1360,26 @@ int exynos5_set_i2s_clk_prescaler(unsigned int src_frq, + unsigned int div; + + if ((dst_frq == 0) || (src_frq == 0)) { +- debug("%s: Invalid requency input for prescaler\n", __func__); +- debug("src frq = %d des frq = %d ", src_frq, dst_frq); ++printf("%s: Invalid requency input for prescaler\n", __func__); ++printf("src frq = %d des frq = %d ", src_frq, dst_frq); + return -1; + } + + div = (src_frq / dst_frq); + if (i2s_id == 0) { + if (div > AUDIO_0_RATIO_MASK) { +- debug("%s: Frequency ratio is out of range\n", ++printf("%s: Frequency ratio is out of range\n", + __func__); +- debug("src frq = %d des frq = %d ", src_frq, dst_frq); ++printf("src frq = %d des frq = %d ", src_frq, dst_frq); + return -1; + } + clrsetbits_le32(&clk->div_mau, AUDIO_0_RATIO_MASK, + (div & AUDIO_0_RATIO_MASK)); + } else if (i2s_id == 1) { + if (div > AUDIO_1_RATIO_MASK) { +- debug("%s: Frequency ratio is out of range\n", ++printf("%s: Frequency ratio is out of range\n", + __func__); +- debug("src frq = %d des frq = %d ", src_frq, dst_frq); ++printf("src frq = %d des frq = %d ", src_frq, dst_frq); + return -1; + } + clrsetbits_le32(&clk->div_peric4, AUDIO_1_RATIO_MASK, +@@ -1415,7 +1415,7 @@ static int clock_calc_best_scalar(unsigned int main_scaler_bits, + const unsigned int cap = (1 << fine_scalar_bits) - 1; + const unsigned int loops = 1 << main_scaler_bits; + +- debug("Input Rate is %u, Target is %u, Cap is %u\n", input_rate, ++printf("Input Rate is %u, Target is %u, Cap is %u\n", input_rate, + target_rate, cap); + + assert(best_fine_scalar != NULL); +@@ -1436,7 +1436,7 @@ static int clock_calc_best_scalar(unsigned int main_scaler_bits, + effective_div; + const int error = target_rate - effective_rate; + +- debug("%d|effdiv:%u, effrate:%u, error:%d\n", i, effective_div, ++printf("%d|effdiv:%u, effrate:%u, error:%d\n", i, effective_div, + effective_rate, error); + + if (error >= 0 && error <= best_error) { +@@ -1462,7 +1462,7 @@ static int exynos5_set_spi_clk(enum periph_id periph_id, + + main = clock_calc_best_scalar(4, 8, 400000000, rate, &fine); + if (main < 0) { +- debug("%s: Cannot set clock rate for periph %d", ++printf("%s: Cannot set clock rate for periph %d", + __func__, periph_id); + return -1; + } +@@ -1496,7 +1496,7 @@ static int exynos5_set_spi_clk(enum periph_id periph_id, + pre_shift = 16; + break; + default: +- debug("%s: Unsupported peripheral ID %d\n", __func__, ++printf("%s: Unsupported peripheral ID %d\n", __func__, + periph_id); + return -1; + } +@@ -1520,7 +1520,7 @@ static int exynos5420_set_spi_clk(enum periph_id periph_id, + + main = clock_calc_best_scalar(4, 8, 400000000, rate, &fine); + if (main < 0) { +- debug("%s: Cannot set clock rate for periph %d", ++printf("%s: Cannot set clock rate for periph %d", + __func__, periph_id); + return -1; + } +@@ -1559,7 +1559,7 @@ static int exynos5420_set_spi_clk(enum periph_id periph_id, + pre_shift = 8; + break; + default: +- debug("%s: Unsupported peripheral ID %d\n", __func__, ++printf("%s: Unsupported peripheral ID %d\n", __func__, + periph_id); + return -1; + } +@@ -1655,7 +1655,7 @@ unsigned long get_uart_clk(int dev_index) + id = PERIPH_ID_UART3; + break; + default: +- debug("%s: invalid UART index %d", __func__, dev_index); ++printf("%s: invalid UART index %d", __func__, dev_index); + return -1; + } + +@@ -1691,7 +1691,7 @@ unsigned long get_mmc_clk(int dev_index) + id = PERIPH_ID_SDMMC3; + break; + default: +- debug("%s: invalid MMC index %d", __func__, dev_index); ++printf("%s: invalid MMC index %d", __func__, dev_index); + return -1; + } + +diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c +index ad3fbf2da..1bf3dc7a9 100644 +--- a/arch/arm/mach-exynos/pinmux.c ++++ b/arch/arm/mach-exynos/pinmux.c +@@ -33,7 +33,7 @@ static void exynos5_uart_config(int peripheral) + count = 2; + break; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return; + } + for (i = start; i < start + count; i++) { +@@ -64,7 +64,7 @@ static void exynos5420_uart_config(int peripheral) + count = 2; + break; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return; + } + +@@ -98,11 +98,11 @@ static int exynos5_mmc_config(int peripheral, int flags) + start_ext = 0; + break; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + } + if ((flags & PINMUX_FLAG_8BIT_MODE) && !start_ext) { +- debug("SDMMC device %d does not support 8bit mode", ++printf("SDMMC device %d does not support 8bit mode", + peripheral); + return -1; + } +@@ -146,12 +146,12 @@ static int exynos5420_mmc_config(int peripheral, int flags) + break; + default: + start = 0; +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + } + + if ((flags & PINMUX_FLAG_8BIT_MODE) && !start_ext) { +- debug("SDMMC device %d does not support 8bit mode", ++printf("SDMMC device %d does not support 8bit mode", + peripheral); + return -1; + } +@@ -455,7 +455,7 @@ void exynos5420_spi_config(int peripheral) + default: + cfg = 0; + pin = 0; +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return; + } + +@@ -524,7 +524,7 @@ static int exynos5_pinmux_config(int peripheral, int flags) + gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_FUNC(2)); + break; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + } + +@@ -572,7 +572,7 @@ static int exynos5420_pinmux_config(int peripheral, int flags) + gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(2)); + break; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + } + +@@ -685,7 +685,7 @@ static void exynos4_uart_config(int peripheral) + count = 2; + break; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return; + } + for (i = start; i < (start + count); i++) { +@@ -799,7 +799,7 @@ static void exynos4x12_uart_config(int peripheral) + count = 2; + break; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return; + } + for (i = start; i < (start + count); i++) { +@@ -833,10 +833,10 @@ static int exynos4_pinmux_config(int peripheral, int flags) + return exynos4_mmc_config(peripheral, flags); + case PERIPH_ID_SDMMC1: + case PERIPH_ID_SDMMC3: +- debug("SDMMC device %d not implemented\n", peripheral); ++printf("SDMMC device %d not implemented\n", peripheral); + return -1; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + } + +@@ -868,10 +868,10 @@ static int exynos4x12_pinmux_config(int peripheral, int flags) + return exynos4x12_mmc_config(peripheral, flags); + case PERIPH_ID_SDMMC1: + case PERIPH_ID_SDMMC3: +- debug("SDMMC device %d not implemented\n", peripheral); ++printf("SDMMC device %d not implemented\n", peripheral); + return -1; + default: +- debug("%s: invalid peripheral %d", __func__, peripheral); ++printf("%s: invalid peripheral %d", __func__, peripheral); + return -1; + } + +@@ -892,7 +892,7 @@ int exynos_pinmux_config(int peripheral, int flags) + return exynos4_pinmux_config(peripheral, flags); + } + +- debug("pinmux functionality not supported\n"); ++printf("pinmux functionality not supported\n"); + + return -1; + } +@@ -906,7 +906,7 @@ static int exynos4_pinmux_decode_periph_id(const void *blob, int node) + err = fdtdec_get_int_array(blob, node, "interrupts", cell, + ARRAY_SIZE(cell)); + if (err) { +- debug(" invalid peripheral id\n"); ++printf(" invalid peripheral id\n"); + return PERIPH_ID_NONE; + } + +diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c +index 722449881..7415f063d 100644 +--- a/arch/arm/mach-exynos/spl_boot.c ++++ b/arch/arm/mach-exynos/spl_boot.c +@@ -147,7 +147,7 @@ static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr) + /* waiting for TX done */ + while (!(readl(®s->spi_sts) & SPI_ST_TX_DONE)) { + if (!timeout) { +- debug("SPI TIMEOUT\n"); ++printf("SPI TIMEOUT\n"); + break; + } + timeout--; +diff --git a/arch/arm/mach-imx/cmd_dek.c b/arch/arm/mach-imx/cmd_dek.c +index b10ead194..8a13a9a9a 100644 +--- a/arch/arm/mach-imx/cmd_dek.c ++++ b/arch/arm/mach-imx/cmd_dek.c +@@ -45,7 +45,7 @@ static int blob_encap_dek(u32 src_addr, u32 dst_addr, u32 len) + sec_init(); + + if (!((len == 128) | (len == 192) | (len == 256))) { +- debug("Invalid DEK size. Valid sizes are 128, 192 and 256b\n"); ++printf("Invalid DEK size. Valid sizes are 128, 192 and 256b\n"); + return -1; + } + +@@ -171,7 +171,7 @@ static int blob_encap_dek(u32 src_addr, u32 dst_addr, u32 len) + + /* Check addr input */ + if (!(src_ptr && dst_ptr)) { +- debug("src_addr or dst_addr invalid\n"); ++printf("src_addr or dst_addr invalid\n"); + return -1; + } + +@@ -196,7 +196,7 @@ static int blob_encap_dek(u32 src_addr, u32 dst_addr, u32 len) + break; + default: + /* Not supported */ +- debug("Invalid DEK size. Valid sizes are 128, 192 and 256b\n"); ++printf("Invalid DEK size. Valid sizes are 128, 192 and 256b\n"); + return -1; + } + +diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c +index 7157c9e97..77fee9886 100644 +--- a/arch/arm/mach-imx/cmd_nandbcb.c ++++ b/arch/arm/mach-imx/cmd_nandbcb.c +@@ -218,7 +218,7 @@ static int nandbcb_get_size(int argc, char * const argv[], int num, + boot_cfg->maxsize = maxsize; + boot_cfg->offset = offset; + +- debug("max: %llx, offset: %llx\n", maxsize, offset); ++printf("max: %llx, offset: %llx\n", maxsize, offset); + + if (size && size != maxsize) + boot_cfg->input_size = size; +@@ -282,7 +282,7 @@ static int nandbcb_set_boot_config(int argc, char * const argv[], + + /* sanity check */ + if (max_boot_stream_size <= 0) { +- debug("st1_addr: %llx, st2_addr: %llx, max: %llx\n", ++printf("st1_addr: %llx, st2_addr: %llx, max: %llx\n", + boot_stream1_address, boot_stream2_address, + max_boot_stream_size); + printf("something wrong with firmware address settings\n"); +@@ -511,7 +511,7 @@ static int read_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb, + + fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); + if (!fcb_raw_page) { +- debug("failed to allocate fcb_raw_page\n"); ++printf("failed to allocate fcb_raw_page\n"); + ret = -ENOMEM; + return ret; + } +@@ -584,7 +584,7 @@ static int write_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb) + fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize, + GFP_KERNEL); + if (!fcb_raw_page) { +- debug("failed to allocate fcb_raw_page\n"); ++printf("failed to allocate fcb_raw_page\n"); + ret = -ENOMEM; + return ret; + } +@@ -1007,7 +1007,7 @@ static int nandbcb_init(struct boot_config *boot_cfg, u_char *buf) + /* fill fcb */ + fcb = kzalloc(sizeof(*fcb), GFP_KERNEL); + if (!fcb) { +- debug("failed to allocate fcb\n"); ++printf("failed to allocate fcb\n"); + ret = -ENOMEM; + return ret; + } +@@ -1018,14 +1018,14 @@ static int nandbcb_init(struct boot_config *boot_cfg, u_char *buf) + /* fill dbbt */ + dbbt_page = kzalloc(mtd->writesize, GFP_KERNEL); + if (!dbbt_page) { +- debug("failed to allocate dbbt_page\n"); ++printf("failed to allocate dbbt_page\n"); + ret = -ENOMEM; + goto fcb_err; + } + + dbbt_data_page = kzalloc(mtd->writesize, GFP_KERNEL); + if (!dbbt_data_page) { +- debug("failed to allocate dbbt_data_page\n"); ++printf("failed to allocate dbbt_data_page\n"); + ret = -ENOMEM; + goto dbbt_page_err; + } +diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c +index 423b71535..a585b15e5 100644 +--- a/arch/arm/mach-imx/cpu.c ++++ b/arch/arm/mach-imx/cpu.c +@@ -233,9 +233,9 @@ int print_cpuinfo(void) + if (!ret) + printf(" at %dC", cpu_tmp); + else +- debug(" - invalid sensor data\n"); ++printf(" - invalid sensor data\n"); + } else { +- debug(" - invalid sensor device\n"); ++printf(" - invalid sensor device\n"); + } + puts("\n"); + #endif +diff --git a/arch/arm/mach-imx/ddrmc-vf610-calibration.c b/arch/arm/mach-imx/ddrmc-vf610-calibration.c +index cd7e95e61..ab0f73720 100644 +--- a/arch/arm/mach-imx/ddrmc-vf610-calibration.c ++++ b/arch/arm/mach-imx/ddrmc-vf610-calibration.c +@@ -98,13 +98,13 @@ static void bitmap_print(unsigned long *bmap, int max) + { + int i; + +- debug("BITMAP [0x%p]:\n", bmap); ++printf("BITMAP [0x%p]:\n", bmap); + for (i = 0; i <= max; i++) { +- debug("%d ", test_bit(i, bmap) ? 1 : 0); ++printf("%d ", test_bit(i, bmap) ? 1 : 0); + if (i && (i % 32) == (32 - 1)) +- debug("\n"); ++printf("\n"); + } +- debug("\n"); ++printf("\n"); + } + + #define sw_leveling_op_done \ +@@ -145,11 +145,11 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) + (readl(&ddrmr->cr[105]) >> DDRMC_CR105_RDLVL_DL_0_OFF) & 0xFFFF; + u16 rdlvl_dl_1_def = readl(&ddrmr->cr[110]) & 0xFFFF; + +- debug("\nRDLVL: ======================\n"); +- debug("RDLVL: DQS to DQ (RDLVL)\n"); ++printf("\nRDLVL: ======================\n"); ++printf("RDLVL: DQS to DQ (RDLVL)\n"); + +- debug("RDLVL: RDLVL_DL_0_DFL:\t 0x%x\n", rdlvl_dl_0_def); +- debug("RDLVL: RDLVL_DL_1_DFL:\t 0x%x\n", rdlvl_dl_1_def); ++printf("RDLVL: RDLVL_DL_0_DFL:\t 0x%x\n", rdlvl_dl_0_def); ++printf("RDLVL: RDLVL_DL_1_DFL:\t 0x%x\n", rdlvl_dl_1_def); + + /* + * Set/Read setup for calibration +@@ -161,16 +161,16 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) + writel(0x40, &ddrmr->cr[146]); + + tmp = readl(&ddrmr->cr[144]); +- debug("RDLVL: PHY_RDLVL_RES:\t 0x%x\n", (tmp >> 24) & 0xFF);// set 0x40 +- debug("RDLVL: PHY_RDLV_LOAD:\t 0x%x\n", (tmp >> 16) & 0xFF);// set 0x70 +- debug("RDLVL: PHY_RDLV_DLL:\t 0x%x\n", (tmp >> 8) & 0xFF); // set 0x30 +- debug("RDLVL: PHY_RDLV_EN:\t 0x%x\n", tmp & 0xFF); //set 0x30 ++printf("RDLVL: PHY_RDLVL_RES:\t 0x%x\n", (tmp >> 24) & 0xFF);// set 0x40 ++printf("RDLVL: PHY_RDLV_LOAD:\t 0x%x\n", (tmp >> 16) & 0xFF);// set 0x70 ++printf("RDLVL: PHY_RDLV_DLL:\t 0x%x\n", (tmp >> 8) & 0xFF); // set 0x30 ++printf("RDLVL: PHY_RDLV_EN:\t 0x%x\n", tmp & 0xFF); //set 0x30 + + tmp = readl(&ddrmr->cr[145]); +- debug("RDLVL: PHY_RDLV_RR:\t 0x%x\n", tmp & 0x3FF); //set 0x40 ++printf("RDLVL: PHY_RDLV_RR:\t 0x%x\n", tmp & 0x3FF); //set 0x40 + + tmp = readl(&ddrmr->cr[146]); +- debug("RDLVL: PHY_RDLV_RESP:\t 0x%x\n", tmp); //set 0x40 ++printf("RDLVL: PHY_RDLV_RESP:\t 0x%x\n", tmp); //set 0x40 + + /* + * Program/read the leveling edge RDLVL_EDGE = 0 +@@ -181,14 +181,14 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) + clrbits_le32(&ddrmr->cr[101], DDRMC_CR101_PHY_RDLVL_EDGE); + + tmp = readl(&ddrmr->cr[101]); +- debug("RDLVL: PHY_RDLVL_EDGE:\t 0x%x\n", ++printf("RDLVL: PHY_RDLVL_EDGE:\t 0x%x\n", + (tmp >> DDRMC_CR101_PHY_RDLVL_EDGE_OFF) & 0x1); //set 0 + + /* Program Leveling mode - CR93[SW_LVL_MODE] to ’b10 */ + clrsetbits_le32(&ddrmr->cr[93], DDRMC_CR93_SW_LVL_MODE(0x3), + DDRMC_CR93_SW_LVL_MODE(0x2)); + tmp = readl(&ddrmr->cr[93]); +- debug("RDLVL: SW_LVL_MODE:\t 0x%x\n", ++printf("RDLVL: SW_LVL_MODE:\t 0x%x\n", + (tmp >> DDRMC_CR93_SW_LVL_MODE_OFF) & 0x3); + + /* Start procedure - CR93[SWLVL_START] to ’b1 */ +@@ -203,7 +203,7 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) + * The procedure is to increase the delay values from 0 to 0xFF + * and read the response from the DDRMC + */ +- debug("\nRDLVL: ---> RDLVL_DL_0\n"); ++printf("\nRDLVL: ---> RDLVL_DL_0\n"); + bitmap_zero(rdlvl_rsp, DDRMC_DQS_DQ_MAX_DELAY + 1); + + for (i = 0; i <= DDRMC_DQS_DQ_MAX_DELAY; i++) { +@@ -245,17 +245,17 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) + N_SAMPLES, rdlvl_dl_0_min, + DDRMC_DQS_DQ_MAX_DELAY); + +- debug("RDLVL: DL_0 min: %d [0x%x] DL_0 max: %d [0x%x]\n", ++printf("RDLVL: DL_0 min: %d [0x%x] DL_0 max: %d [0x%x]\n", + rdlvl_dl_0_min, rdlvl_dl_0_min, rdlvl_dl_0_max, rdlvl_dl_0_max); + rdlvl_dl_0 = (rdlvl_dl_0_max - rdlvl_dl_0_min) / 2; + + if (rdlvl_dl_0_max == -1 || rdlvl_dl_0_min == -1 || rdlvl_dl_0 <= 0) { +- debug("RDLVL: The DQS to DQ delay cannot be found!\n"); +- debug("RDLVL: Using default - slice 0: %d!\n", rdlvl_dl_0_def); ++printf("RDLVL: The DQS to DQ delay cannot be found!\n"); ++printf("RDLVL: Using default - slice 0: %d!\n", rdlvl_dl_0_def); + rdlvl_dl_0 = rdlvl_dl_0_def; + } + +- debug("\nRDLVL: ---> RDLVL_DL_1\n"); ++printf("\nRDLVL: ---> RDLVL_DL_1\n"); + bitmap_zero(rdlvl_rsp, DDRMC_DQS_DQ_MAX_DELAY + 1); + + for (i = 0; i <= DDRMC_DQS_DQ_MAX_DELAY; i++) { +@@ -297,17 +297,17 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) + N_SAMPLES, rdlvl_dl_1_min, + DDRMC_DQS_DQ_MAX_DELAY); + +- debug("RDLVL: DL_1 min: %d [0x%x] DL_1 max: %d [0x%x]\n", ++printf("RDLVL: DL_1 min: %d [0x%x] DL_1 max: %d [0x%x]\n", + rdlvl_dl_1_min, rdlvl_dl_1_min, rdlvl_dl_1_max, rdlvl_dl_1_max); + rdlvl_dl_1 = (rdlvl_dl_1_max - rdlvl_dl_1_min) / 2; + + if (rdlvl_dl_1_max == -1 || rdlvl_dl_1_min == -1 || rdlvl_dl_1 <= 0) { +- debug("RDLVL: The DQS to DQ delay cannot be found!\n"); +- debug("RDLVL: Using default - slice 1: %d!\n", rdlvl_dl_1_def); ++printf("RDLVL: The DQS to DQ delay cannot be found!\n"); ++printf("RDLVL: Using default - slice 1: %d!\n", rdlvl_dl_1_def); + rdlvl_dl_1 = rdlvl_dl_1_def; + } + +- debug("RDLVL: CALIBRATED: rdlvl_dl_0: 0x%x\t rdlvl_dl_1: 0x%x\n", ++printf("RDLVL: CALIBRATED: rdlvl_dl_0: 0x%x\t rdlvl_dl_1: 0x%x\n", + rdlvl_dl_0, rdlvl_dl_1); + + /* Write new delay values */ +diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c +index 00bd157d0..ea3dcd509 100644 +--- a/arch/arm/mach-imx/hab.c ++++ b/arch/arm/mach-imx/hab.c +@@ -851,15 +851,15 @@ static int validate_ivt(struct ivt *ivt_initial) + } + + puts("Error: Invalid IVT structure\n"); +- debug("\nAllowed IVT structure:\n"); +- debug("IVT HDR = 0x4X2000D1\n"); +- debug("IVT ENTRY = 0xXXXXXXXX\n"); +- debug("IVT RSV1 = 0x0\n"); +- debug("IVT DCD = 0x0\n"); /* Recommended */ +- debug("IVT BOOT_DATA = 0xXXXXXXXX\n"); /* Commonly 0x0 */ +- debug("IVT SELF = 0xXXXXXXXX\n"); /* = ddr_start + ivt_offset */ +- debug("IVT CSF = 0xXXXXXXXX\n"); +- debug("IVT RSV2 = 0x0\n"); ++printf("\nAllowed IVT structure:\n"); ++printf("IVT HDR = 0x4X2000D1\n"); ++printf("IVT ENTRY = 0xXXXXXXXX\n"); ++printf("IVT RSV1 = 0x0\n"); ++printf("IVT DCD = 0x0\n"); /* Recommended */ ++printf("IVT BOOT_DATA = 0xXXXXXXXX\n"); /* Commonly 0x0 */ ++printf("IVT SELF = 0xXXXXXXXX\n"); /* = ddr_start + ivt_offset */ ++printf("IVT CSF = 0xXXXXXXXX\n"); ++printf("IVT RSV2 = 0x0\n"); + + /* Invalid IVT structure */ + return 0; +diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c +index 6392fe267..4e219d567 100644 +--- a/arch/arm/mach-imx/imx8/ahab.c ++++ b/arch/arm/mach-imx/imx8/ahab.c +@@ -75,7 +75,7 @@ int authenticate_os_container(ulong addr) + + length = phdr->length_lsb + (phdr->length_msb << 8); + +- debug("container length %u\n", length); ++printf("container length %u\n", length); + memcpy((void *)SEC_SECURE_RAM_BASE, (const void *)addr, + ALIGN(length, CONFIG_SYS_CACHELINE_SIZE)); + +@@ -94,7 +94,7 @@ int authenticate_os_container(ulong addr) + sizeof(struct container_hdr) + + i * sizeof(struct boot_img_t)); + +- debug("img %d, dst 0x%x, src 0x%lux, size 0x%x\n", ++printf("img %d, dst 0x%x, src 0x%lux, size 0x%x\n", + i, (uint32_t) img->dst, img->offset + addr, img->size); + + memcpy((void *)img->dst, (const void *)(img->offset + addr), +@@ -115,7 +115,7 @@ int authenticate_os_container(ulong addr) + + err = sc_rm_get_memreg_info(-1, mr, &start, &end); + if (!err) +- debug("memreg %u 0x%llx -- 0x%llx\n", mr, start, end); ++printf("memreg %u 0x%llx -- 0x%llx\n", mr, start, end); + + err = sc_rm_set_memreg_permissions(-1, mr, SECO_PT, + SC_RM_PERM_FULL); +diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c +index 02db322f5..01eedb306 100644 +--- a/arch/arm/mach-imx/imx8/cpu.c ++++ b/arch/arm/mach-imx/imx8/cpu.c +@@ -251,7 +251,7 @@ static int get_owned_memreg(sc_rm_mr_t mr, sc_faddr_t *addr_start, + printf("Memreg get info failed, %d\n", ret); + return -EINVAL; + } +- debug("0x%llx -- 0x%llx\n", start, end); ++printf("0x%llx -- 0x%llx\n", start, end); + *addr_start = start; + *addr_end = end; + +@@ -519,7 +519,7 @@ void enable_caches(void) + } + + for (i = 0; i < MAX_MEM_MAP_REGIONS; i++) { +- debug("[%d] vir = 0x%llx phys = 0x%llx size = 0x%llx attrs = 0x%llx\n", ++printf("[%d] vir = 0x%llx phys = 0x%llx size = 0x%llx attrs = 0x%llx\n", + i, imx8_mem_map[i].virt, imx8_mem_map[i].phys, + imx8_mem_map[i].size, imx8_mem_map[i].attrs); + } +@@ -594,7 +594,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) + mac[4] = val[1]; + mac[5] = val[1] >> 8; + +- debug("%s: MAC%d: %02x.%02x.%02x.%02x.%02x.%02x\n", ++printf("%s: MAC%d: %02x.%02x.%02x.%02x.%02x.%02x\n", + __func__, dev_id, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + return; + err: +diff --git a/arch/arm/mach-imx/imx8/fdt.c b/arch/arm/mach-imx/imx8/fdt.c +index a132ce2e6..5446b79cc 100644 +--- a/arch/arm/mach-imx/imx8/fdt.c ++++ b/arch/arm/mach-imx/imx8/fdt.c +@@ -57,17 +57,17 @@ static void update_fdt_with_owned_resources(void *blob) + + for (offset = fdt_next_node(blob, offset, &depth); offset > 0; + offset = fdt_next_node(blob, offset, &depth)) { +- debug("Node name: %s, depth %d\n", ++printf("Node name: %s, depth %d\n", + fdt_get_name(blob, offset, NULL), depth); + + if (!fdt_get_property(blob, offset, "power-domains", NULL)) { +- debug(" - ignoring node %s\n", ++printf(" - ignoring node %s\n", + fdt_get_name(blob, offset, NULL)); + continue; + } + + if (!fdtdec_get_is_enabled(blob, offset)) { +- debug(" - ignoring node %s\n", ++printf(" - ignoring node %s\n", + fdt_get_name(blob, offset, NULL)); + continue; + } +@@ -109,7 +109,7 @@ static int config_smmu_resource_sid(int rsrc, int sid) + int err; + + err = sc_rm_set_master_sid(-1, rsrc, sid); +- debug("set_master_sid rsrc=%d sid=0x%x err=%d\n", rsrc, sid, err); ++printf("set_master_sid rsrc=%d sid=0x%x err=%d\n", rsrc, sid, err); + if (err != SC_ERR_NONE) { + if (!check_owned_resource(rsrc)) { + printf("%s rsrc[%d] not owned\n", __func__, rsrc); +@@ -135,7 +135,7 @@ static int config_smmu_fdt_device_sid(void *blob, int device_offset, int sid) + if (prop) { + int i; + +- debug("configure node %s sid 0x%x for %d resources\n", ++printf("configure node %s sid 0x%x for %d resources\n", + name, sid, (int)(proplen / sizeof(fdt32_t))); + for (i = 0; i < proplen / sizeof(fdt32_t); ++i) { + ret = config_smmu_resource_sid(fdt32_to_cpu(prop[i]), +@@ -161,7 +161,7 @@ static int config_smmu_fdt_device_sid(void *blob, int device_offset, int sid) + continue; + } + +- debug("configure node %s sid 0x%x rsrc=%d\n", ++printf("configure node %s sid 0x%x rsrc=%d\n", + name, sid, rsrc); + rsrc = args.args[0]; + +@@ -183,7 +183,7 @@ static int config_smmu_fdt(void *blob) + offset = fdt_node_offset_by_compatible(blob, 0, "arm,mmu-500"); + prop = fdt_getprop(blob, offset, "mmu-masters", &proplen); + if (offset > 0 && prop) { +- debug("found legacy mmu-masters property\n"); ++printf("found legacy mmu-masters property\n"); + + for (i = 0; i < proplen / 8; ++i) { + u32 phandle = fdt32_to_cpu(prop[2 * i]); +@@ -214,14 +214,14 @@ static int config_smmu_fdt(void *blob) + prop = fdt_getprop(blob, offset, "iommus", &proplen); + if (!prop) + continue; +- debug("node %s iommus proplen %d\n", name, proplen); ++printf("node %s iommus proplen %d\n", name, proplen); + + if (proplen == 12) { + int sid = fdt32_to_cpu(prop[1]); + + config_smmu_fdt_device_sid(blob, offset, sid); + } else if (proplen != 4) { +- debug("node %s ignore unexpected iommus proplen=%d\n", ++printf("node %s ignore unexpected iommus proplen=%d\n", + name, proplen); + } + } +diff --git a/arch/arm/mach-imx/imx8/image.c b/arch/arm/mach-imx/imx8/image.c +index 5abc0d3a3..a4df3293b 100644 +--- a/arch/arm/mach-imx/imx8/image.c ++++ b/arch/arm/mach-imx/imx8/image.c +@@ -30,7 +30,7 @@ static int __get_container_size(ulong addr) + + phdr = (struct container_hdr *)addr; + if (phdr->tag != 0x87 && phdr->version != 0x0) { +- debug("Wrong container header\n"); ++printf("Wrong container header\n"); + return -EFAULT; + } + +@@ -42,7 +42,7 @@ static int __get_container_size(ulong addr) + if (img_end > max_offset) + max_offset = img_end; + +- debug("img[%u], end = 0x%x\n", i, img_end); ++printf("img[%u], end = 0x%x\n", i, img_end); + + img_entry++; + } +@@ -54,7 +54,7 @@ static int __get_container_size(ulong addr) + if (phdr->sig_blk_offset + len > max_offset) + max_offset = phdr->sig_blk_offset + len; + +- debug("sigblk, end = 0x%x\n", phdr->sig_blk_offset + len); ++printf("sigblk, end = 0x%x\n", phdr->sig_blk_offset + len); + } + + return max_offset; +@@ -168,17 +168,17 @@ static int get_imageset_end(void *dev, int dev_type) + return value_container[0]; + } + +- debug("seco container size 0x%x\n", value_container[0]); ++printf("seco container size 0x%x\n", value_container[0]); + + value_container[1] = get_container_size(dev, dev_type, offset2); + if (value_container[1] < 0) { +- debug("Parse scu container failed %d, only seco container\n", ++printf("Parse scu container failed %d, only seco container\n", + value_container[1]); + /* return seco container total size */ + return value_container[0] + offset1; + } + +- debug("scu container size 0x%x\n", value_container[1]); ++printf("scu container size 0x%x\n", value_container[1]); + + return value_container[1] + offset2; + } +diff --git a/arch/arm/mach-imx/imx8/iomux.c b/arch/arm/mach-imx/imx8/iomux.c +index 9c3cfbf00..3b9b2ee5d 100644 +--- a/arch/arm/mach-imx/imx8/iomux.c ++++ b/arch/arm/mach-imx/imx8/iomux.c +@@ -29,7 +29,7 @@ void imx8_iomux_setup_pad(iomux_cfg_t pad) + if (ret) + printf("sc_pad_set failed!, pin: %u, val: 0x%x\n", pin_id, val); + +- debug("iomux: pin %d, val = 0x%x\n", pin_id, val); ++printf("iomux: pin %d, val = 0x%x\n", pin_id, val); + } + + /* configures a list of pads within declared with IOMUX_PADS macro */ +diff --git a/arch/arm/mach-imx/imx8/misc.c b/arch/arm/mach-imx/imx8/misc.c +index de19955e2..92267b09a 100644 +--- a/arch/arm/mach-imx/imx8/misc.c ++++ b/arch/arm/mach-imx/imx8/misc.c +@@ -46,7 +46,7 @@ void build_info(void) + /* Get SECO FW build and commit id */ + sc_seco_build_info(-1, &seco_build, &seco_commit); + if (!seco_build) { +- debug("SECO FW does not support build info\n"); ++printf("SECO FW does not support build info\n"); + /* Display 0 when the build info is not supported */ + seco_commit = 0; + } +@@ -56,7 +56,7 @@ void build_info(void) + 0, 0, 0, 0, 0, 0, &res); + atf_commit = res.a0; + if (atf_commit == 0xffffffff) { +- debug("ATF does not support build info\n"); ++printf("ATF does not support build info\n"); + atf_commit = 0x30; /* Display 0 */ + } + +diff --git a/arch/arm/mach-imx/imx8/parse-container.c b/arch/arm/mach-imx/imx8/parse-container.c +index 375098902..86c21b3ba 100644 +--- a/arch/arm/mach-imx/imx8/parse-container.c ++++ b/arch/arm/mach-imx/imx8/parse-container.c +@@ -24,7 +24,7 @@ static int authenticate_image(struct boot_img_t *img, int image_index) + int err; + int ret = 0; + +- debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n", ++printf("img %d, dst 0x%x, src 0x%x, size 0x%x\n", + image_index, (uint32_t)img->dst, img->offset, img->size); + + /* Find the memreg and set permission for seco pt */ +@@ -40,7 +40,7 @@ static int authenticate_image(struct boot_img_t *img, int image_index) + + err = sc_rm_get_memreg_info(-1, mr, &start, &end); + if (!err) +- debug("memreg %u 0x%x -- 0x%x\n", mr, start, end); ++printf("memreg %u 0x%x -- 0x%x\n", mr, start, end); + + err = sc_rm_set_memreg_permissions(-1, mr, + SECO_PT, SC_RM_PERM_FULL); +@@ -81,7 +81,7 @@ static struct boot_img_t *read_auth_image(struct spl_image_info *spl_image, + u32 sectors; + + if (image_index > container->num_images) { +- debug("Invalid image number\n"); ++printf("Invalid image number\n"); + return NULL; + } + +@@ -99,7 +99,7 @@ static struct boot_img_t *read_auth_image(struct spl_image_info *spl_image, + sector = images[image_index].offset / info->bl_len + + container_sector; + +- debug("%s: container: %p sector: %lu sectors: %u\n", __func__, ++printf("%s: container: %p sector: %lu sectors: %u\n", __func__, + container, sector, sectors); + if (info->read(info, sector, sectors, + (void *)images[image_index].entry) != sectors) { +@@ -134,7 +134,7 @@ static int read_auth_container(struct spl_image_info *spl_image, + */ + container = (struct container_hdr *)spl_get_load_buffer(-size, size); + +- debug("%s: container: %p sector: %lu sectors: %u\n", __func__, ++printf("%s: container: %p sector: %lu sectors: %u\n", __func__, + container, sector, sectors); + if (info->read(info, sector, sectors, container) != sectors) + return -EIO; +@@ -150,7 +150,7 @@ static int read_auth_container(struct spl_image_info *spl_image, + } + + length = container->length_lsb + (container->length_msb << 8); +- debug("Container length %u\n", length); ++printf("Container length %u\n", length); + + if (length > CONTAINER_HDR_ALIGNMENT) { + size = roundup(length, info->bl_len); +@@ -158,7 +158,7 @@ static int read_auth_container(struct spl_image_info *spl_image, + + container = (struct container_hdr *)spl_get_load_buffer(-size, size); + +- debug("%s: container: %p sector: %lu sectors: %u\n", ++printf("%s: container: %p sector: %lu sectors: %u\n", + __func__, container, sector, sectors); + if (info->read(info, sector, sectors, container) != + sectors) +diff --git a/arch/arm/mach-imx/imx8/snvs_security_sc.c b/arch/arm/mach-imx/imx8/snvs_security_sc.c +index 6f9b1c99f..91db55ad4 100644 +--- a/arch/arm/mach-imx/imx8/snvs_security_sc.c ++++ b/arch/arm/mach-imx/imx8/snvs_security_sc.c +@@ -297,8 +297,8 @@ static int check_write_secvio_config(u32 id, u32 *_p1, u32 *_p2, + &d4, &d4, _cnt); + if (scierr != SC_ERR_NONE) { + printf("Failed to set secvio configuration\n"); +- debug("Failed to set conf id 0x%x with values ", id); +- debug("0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x (cnt: %d)\n", ++printf("Failed to set conf id 0x%x with values ", id); ++printf("0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x (cnt: %d)\n", + d1, d2, d3, d4, d5, _cnt); + goto exit; + } +@@ -325,9 +325,9 @@ static int apply_snvs_config(struct snvs_security_sc_conf *cnf) + { + int scierr = 0; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + +- debug("Applying config:\n" ++printf("Applying config:\n" + "\thp.lock = 0x%.8x\n" + "\thp.secvio_ctl = 0x%.8x\n" + "\tlp.lock = 0x%.8x\n" +@@ -442,7 +442,7 @@ static int dgo_write(u32 _id, u8 _access, u32 *_pdata) + + if (scierr != SC_ERR_NONE) { + printf("Failed to set dgo configuration\n"); +- debug("Failed to set conf id 0x%x : 0x%.8x", _id, *_pdata); ++printf("Failed to set conf id 0x%x : 0x%.8x", _id, *_pdata); + } + + return scierr; +@@ -452,9 +452,9 @@ static int apply_snvs_dgo_config(struct snvs_dgo_conf *cnf) + { + int scierr = 0; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + +- debug("Applying config:\n" ++printf("Applying config:\n" + "\ttamper_offset_ctl = 0x%.8x\n" + "\ttamper_pull_ctl = 0x%.8x\n" + "\ttamper_ana_test_ctl = 0x%.8x\n" +@@ -503,7 +503,7 @@ static int pad_write(u32 _pad, u32 _value) + + if (scierr != SC_ERR_NONE) { + printf("Failed to set pad configuration\n"); +- debug("Failed to set conf pad 0x%x : 0x%.8x", _pad, _value); ++printf("Failed to set conf pad 0x%x : 0x%.8x", _pad, _value); + } + + return scierr; +@@ -514,10 +514,10 @@ static int apply_tamper_pin_list_config(struct tamper_pin_cfg *confs, u32 size) + int scierr = 0; + u32 idx; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + for (idx = 0; idx < size; idx++) { +- debug("\t idx %d: pad %d: 0x%.8x\n", idx, confs[idx].pad, ++printf("\t idx %d: pad %d: 0x%.8x\n", idx, confs[idx].pad, + confs[idx].mux_conf); + pad_write(confs[idx].pad, 3 << 30 | confs[idx].mux_conf); + if (scierr != SC_ERR_NONE) +@@ -573,7 +573,7 @@ int snvs_security_sc_init(void) + struct tamper_pin_cfg *tamper_pin_conf; + u32 size; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + snvs_conf = get_snvs_config(); + snvs_dgo_conf = get_snvs_dgo_config(); +@@ -582,19 +582,19 @@ int snvs_security_sc_init(void) + + err = apply_tamper_pin_list_config(tamper_pin_conf, size); + if (err) { +- debug("Failed to set pins\n"); ++printf("Failed to set pins\n"); + goto exit; + } + + err = apply_snvs_dgo_config(snvs_dgo_conf); + if (err) { +- debug("Failed to set dgo\n"); ++printf("Failed to set dgo\n"); + goto exit; + } + + err = apply_snvs_config(snvs_conf); + if (err) { +- debug("Failed to set snvs\n"); ++printf("Failed to set snvs\n"); + goto exit; + } + +diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c +index 0c44022a6..46a2d4ba8 100644 +--- a/arch/arm/mach-imx/imx8m/soc.c ++++ b/arch/arm/mach-imx/imx8m/soc.c +@@ -196,7 +196,7 @@ void enable_caches(void) + imx8m_mem_map[entry].virt = gd->bd->bi_dram[i].start; + imx8m_mem_map[entry].size = gd->bd->bi_dram[i].size; + imx8m_mem_map[entry].attrs = attrs; +- debug("Added memory mapping (%d): %llx %llx\n", entry, ++printf("Added memory mapping (%d): %llx %llx\n", entry, + imx8m_mem_map[entry].phys, imx8m_mem_map[entry].size); + i++; entry++; + } +@@ -784,10 +784,10 @@ static int low_drive_gpu_freq(void *blob) + assignedclks[cnt - 2] = 200000000; + + for (i = 0; i < cnt; i++) { +- debug("<%u>, ", assignedclks[i]); ++printf("<%u>, ", assignedclks[i]); + assignedclks[i] = cpu_to_fdt32(assignedclks[i]); + } +- debug("\n"); ++printf("\n"); + + return fdt_setprop(blob, nodeoff, "assigned-clock-rates", &assignedclks, sizeof(assignedclks)); + } +@@ -925,7 +925,7 @@ static int disable_cpu_nodes(void *blob, u32 disabled_cores) + if (nodeoff < 0) + continue; /* Not found, skip it */ + +- debug("Found %s node\n", nodes_path[i]); ++printf("Found %s node\n", nodes_path[i]); + + rc = fdt_del_node(blob, nodeoff); + if (rc < 0) { +@@ -999,7 +999,7 @@ usb_modify_speed: + if (nodeoff < 0) + continue; /* Not found, skip it */ + +- debug("Found %s node\n", nodes_path[i]); ++printf("Found %s node\n", nodes_path[i]); + + rc = fdt_delprop(blob, nodeoff, "cpu-idle-states"); + if (rc == -FDT_ERR_NOTFOUND) +@@ -1010,7 +1010,7 @@ usb_modify_speed: + return rc; + } + +- debug("Remove %s:%s\n", nodes_path[i], ++printf("Remove %s:%s\n", nodes_path[i], + "cpu-idle-states"); + } + } +@@ -1103,7 +1103,7 @@ static void acquire_buildinfo(void) + 0, 0, 0, 0, 0, 0, &res); + atf_commit = res.a0; + if (atf_commit == 0xffffffff) { +- debug("ATF does not support build info\n"); ++printf("ATF does not support build info\n"); + atf_commit = 0x30; /* Display 0, 0 ascii is 0x30 */ + } + +diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c +index 30fb45d48..d5351899c 100644 +--- a/arch/arm/mach-imx/imx_bootaux.c ++++ b/arch/arm/mach-imx/imx_bootaux.c +@@ -62,7 +62,7 @@ static unsigned long load_elf_image_m_core_phdr(unsigned long addr) + dst = (void *)(phdr->p_paddr - mmap->da) + mmap->sa; + src = (void *)addr + phdr->p_offset; + +- debug("Loading phdr %i to 0x%p (%i bytes)\n", ++printf("Loading phdr %i to 0x%p (%i bytes)\n", + i, dst, phdr->p_filesz); + + if (phdr->p_filesz) +diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c +index d82efa7f8..ecf1a7416 100644 +--- a/arch/arm/mach-imx/misc.c ++++ b/arch/arm/mach-imx/misc.c +@@ -92,7 +92,7 @@ void board_lmb_reserve(struct lmb *lmb) + int bank; + + sp = get_sp(); +- debug("## Current stack ends at 0x%08lx ", sp); ++printf("## Current stack ends at 0x%08lx ", sp); + + /* adjust sp by 16K to be safe */ + sp -= 4096 << 2; +diff --git a/arch/arm/mach-imx/mx5/clock.c b/arch/arm/mach-imx/mx5/clock.c +index bbaddd5a3..602514fd8 100644 +--- a/arch/arm/mach-imx/mx5/clock.c ++++ b/arch/arm/mach-imx/mx5/clock.c +@@ -601,7 +601,7 @@ static int calc_pll_params(u32 ref, u32 target, struct pll_param *pll) + t1 *= mfd; + do_div(t1, n_ref); + mfn = t1; +- debug("ref=%d, target=%d, pd=%d," "mfi=%d,mfn=%d, mfd=%d\n", ++printf("ref=%d, target=%d, pd=%d," "mfi=%d,mfn=%d, mfd=%d\n", + ref, n_target, (u32)pd, (u32)mfi, (u32)mfn, (u32)mfd); + i = 1; + if (mfn != 0) +diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c +index cb9d629be..f35271d2a 100644 +--- a/arch/arm/mach-imx/mx6/clock.c ++++ b/arch/arm/mach-imx/mx6/clock.c +@@ -248,7 +248,7 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq) + BP_ANADIG_PLL_AUDIO_TEST_DIV_SELECT; + div &= BM_ANADIG_PLL_AUDIO_DIV_SELECT; + if (test_div == 3) { +- debug("Error test_div\n"); ++printf("Error test_div\n"); + return 0; + } + test_div = 1 << (2 - test_div); +@@ -267,7 +267,7 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq) + BP_ANADIG_PLL_VIDEO_POST_DIV_SELECT; + div &= BM_ANADIG_PLL_VIDEO_DIV_SELECT; + if (test_div == 3) { +- debug("Error test_div\n"); ++printf("Error test_div\n"); + return 0; + } + test_div = 1 << (2 - test_div); +@@ -556,7 +556,7 @@ static int enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom, + u32 reg = 0; + ulong start; + +- debug("pll5 div = %d, num = %d, denom = %d\n", ++printf("pll5 div = %d, num = %d, denom = %d\n", + pll_div, pll_num, pll_denom); + + /* Power up PLL5 video */ +@@ -627,11 +627,11 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq) + u32 i, j, max_pred = 8, max_postd = 8, pred = 1, postd = 1; + u32 pll_div, pll_num, pll_denom, post_div = 1; + +- debug("mxs_set_lcdclk, freq = %dKHz\n", freq); ++printf("mxs_set_lcdclk, freq = %dKHz\n", freq); + + if (!is_mx6sx() && !is_mx6ul() && !is_mx6ull() && !is_mx6sl() && + !is_mx6sll()) { +- debug("This chip not support lcd!\n"); ++printf("This chip not support lcd!\n"); + return; + } + +@@ -694,7 +694,7 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq) + return; + } + +- debug("best %d, pred = %d, postd = %d\n", best, pred, postd); ++printf("best %d, pred = %d, postd = %d\n", best, pred, postd); + + pll_div = best / hck; + pll_denom = 1000000; +diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c +index f872bfdab..ad8eb1998 100644 +--- a/arch/arm/mach-imx/mx6/ddr.c ++++ b/arch/arm/mach-imx/mx6/ddr.c +@@ -131,7 +131,7 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo) + /* disable Adopt power down timer */ + setbits_le32(&mmdc0->mapsr, 0x1); + +- debug("Starting write leveling calibration.\n"); ++printf("Starting write leveling calibration.\n"); + + /* + * 2. disable auto refresh and ZQ calibration +@@ -177,7 +177,7 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo) + if (readl(&mmdc1->mpwlgcr) & 0x00000F00) + errors |= 2; + +- debug("Ending write leveling calibration. Error mask: 0x%x\n", errors); ++printf("Ending write leveling calibration. Error mask: 0x%x\n", errors); + + /* check to see if cal failed */ + if ((readl(&mmdc0->mpwldectrl0) == 0x001F001F) && +@@ -185,7 +185,7 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo) + ((sysinfo->dsize < 2) || + ((readl(&mmdc1->mpwldectrl0) == 0x001F001F) && + (readl(&mmdc1->mpwldectrl1) == 0x001F001F)))) { +- debug("Cal seems to have soft-failed due to memory not supporting write leveling on all channels. Restoring original write leveling values.\n"); ++printf("Cal seems to have soft-failed due to memory not supporting write leveling on all channels. Restoring original write leveling values.\n"); + writel(ldectrl[0], &mmdc0->mpwldectrl0); + writel(ldectrl[1], &mmdc0->mpwldectrl1); + if (sysinfo->dsize == 2) { +@@ -217,14 +217,14 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo) + writel(esdmisc_val, &mmdc0->mdref); + writel(zq_val, &mmdc0->mpzqhwctrl); + +- debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08x\n", ++printf("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08x\n", + readl(&mmdc0->mpwldectrl0)); +- debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08x\n", ++printf("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08x\n", + readl(&mmdc0->mpwldectrl1)); + if (sysinfo->dsize == 2) { +- debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08x\n", ++printf("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08x\n", + readl(&mmdc1->mpwldectrl0)); +- debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08x\n", ++printf("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08x\n", + readl(&mmdc1->mpwldectrl1)); + } + +@@ -387,7 +387,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo) + * Read DQS Gating calibration + * *************************** + */ +- debug("Starting Read DQS Gating calibration.\n"); ++printf("Starting Read DQS Gating calibration.\n"); + + /* + * Reset the read data FIFOs (two resets); only need to issue reset +@@ -449,14 +449,14 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo) + modify_dg_result(&mmdc1->mpdghwst2, &mmdc1->mpdghwst3, + &mmdc1->mpdgctrl1); + } +- debug("Ending Read DQS Gating calibration. Error mask: 0x%x\n", errors); ++printf("Ending Read DQS Gating calibration. Error mask: 0x%x\n", errors); + + /* + * ********************** + * Read Delay calibration + * ********************** + */ +- debug("Starting Read Delay calibration.\n"); ++printf("Starting Read Delay calibration.\n"); + + reset_read_data_fifos(); + +@@ -490,14 +490,14 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo) + (readl(&mmdc1->mprddlhwctl) & 0x0000000f)) + errors |= 8; + +- debug("Ending Read Delay calibration. Error mask: 0x%x\n", errors); ++printf("Ending Read Delay calibration. Error mask: 0x%x\n", errors); + + /* + * *********************** + * Write Delay Calibration + * *********************** + */ +- debug("Starting Write Delay calibration.\n"); ++printf("Starting Write Delay calibration.\n"); + + reset_read_data_fifos(); + +@@ -544,7 +544,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo) + (readl(&mmdc1->mpwrdlhwctl) & 0x0000000f)) + errors |= 32; + +- debug("Ending Write Delay calibration. Error mask: 0x%x\n", errors); ++printf("Ending Write Delay calibration. Error mask: 0x%x\n", errors); + + reset_read_data_fifos(); + +@@ -582,41 +582,41 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo) + * Print out the registers that were updated as a result + * of the calibration process. + */ +- debug("MMDC registers updated from calibration\n"); +- debug("Read DQS gating calibration:\n"); +- debug("\tMPDGCTRL0 PHY0 = 0x%08x\n", readl(&mmdc0->mpdgctrl0)); +- debug("\tMPDGCTRL1 PHY0 = 0x%08x\n", readl(&mmdc0->mpdgctrl1)); ++printf("MMDC registers updated from calibration\n"); ++printf("Read DQS gating calibration:\n"); ++printf("\tMPDGCTRL0 PHY0 = 0x%08x\n", readl(&mmdc0->mpdgctrl0)); ++printf("\tMPDGCTRL1 PHY0 = 0x%08x\n", readl(&mmdc0->mpdgctrl1)); + if (sysinfo->dsize == 2) { +- debug("\tMPDGCTRL0 PHY1 = 0x%08x\n", readl(&mmdc1->mpdgctrl0)); +- debug("\tMPDGCTRL1 PHY1 = 0x%08x\n", readl(&mmdc1->mpdgctrl1)); ++printf("\tMPDGCTRL0 PHY1 = 0x%08x\n", readl(&mmdc1->mpdgctrl0)); ++printf("\tMPDGCTRL1 PHY1 = 0x%08x\n", readl(&mmdc1->mpdgctrl1)); + } +- debug("Read calibration:\n"); +- debug("\tMPRDDLCTL PHY0 = 0x%08x\n", readl(&mmdc0->mprddlctl)); ++printf("Read calibration:\n"); ++printf("\tMPRDDLCTL PHY0 = 0x%08x\n", readl(&mmdc0->mprddlctl)); + if (sysinfo->dsize == 2) +- debug("\tMPRDDLCTL PHY1 = 0x%08x\n", readl(&mmdc1->mprddlctl)); +- debug("Write calibration:\n"); +- debug("\tMPWRDLCTL PHY0 = 0x%08x\n", readl(&mmdc0->mpwrdlctl)); ++printf("\tMPRDDLCTL PHY1 = 0x%08x\n", readl(&mmdc1->mprddlctl)); ++printf("Write calibration:\n"); ++printf("\tMPWRDLCTL PHY0 = 0x%08x\n", readl(&mmdc0->mpwrdlctl)); + if (sysinfo->dsize == 2) +- debug("\tMPWRDLCTL PHY1 = 0x%08x\n", readl(&mmdc1->mpwrdlctl)); ++printf("\tMPWRDLCTL PHY1 = 0x%08x\n", readl(&mmdc1->mpwrdlctl)); + + /* + * Registers below are for debugging purposes. These print out + * the upper and lower boundaries captured during + * read DQS gating calibration. + */ +- debug("Status registers bounds for read DQS gating:\n"); +- debug("\tMPDGHWST0 PHY0 = 0x%08x\n", readl(&mmdc0->mpdghwst0)); +- debug("\tMPDGHWST1 PHY0 = 0x%08x\n", readl(&mmdc0->mpdghwst1)); +- debug("\tMPDGHWST2 PHY0 = 0x%08x\n", readl(&mmdc0->mpdghwst2)); +- debug("\tMPDGHWST3 PHY0 = 0x%08x\n", readl(&mmdc0->mpdghwst3)); ++printf("Status registers bounds for read DQS gating:\n"); ++printf("\tMPDGHWST0 PHY0 = 0x%08x\n", readl(&mmdc0->mpdghwst0)); ++printf("\tMPDGHWST1 PHY0 = 0x%08x\n", readl(&mmdc0->mpdghwst1)); ++printf("\tMPDGHWST2 PHY0 = 0x%08x\n", readl(&mmdc0->mpdghwst2)); ++printf("\tMPDGHWST3 PHY0 = 0x%08x\n", readl(&mmdc0->mpdghwst3)); + if (sysinfo->dsize == 2) { +- debug("\tMPDGHWST0 PHY1 = 0x%08x\n", readl(&mmdc1->mpdghwst0)); +- debug("\tMPDGHWST1 PHY1 = 0x%08x\n", readl(&mmdc1->mpdghwst1)); +- debug("\tMPDGHWST2 PHY1 = 0x%08x\n", readl(&mmdc1->mpdghwst2)); +- debug("\tMPDGHWST3 PHY1 = 0x%08x\n", readl(&mmdc1->mpdghwst3)); ++printf("\tMPDGHWST0 PHY1 = 0x%08x\n", readl(&mmdc1->mpdghwst0)); ++printf("\tMPDGHWST1 PHY1 = 0x%08x\n", readl(&mmdc1->mpdghwst1)); ++printf("\tMPDGHWST2 PHY1 = 0x%08x\n", readl(&mmdc1->mpdghwst2)); ++printf("\tMPDGHWST3 PHY1 = 0x%08x\n", readl(&mmdc1->mpdghwst3)); + } + +- debug("Final do_dqs_calibration error mask: 0x%x\n", errors); ++printf("Final do_dqs_calibration error mask: 0x%x\n", errors); + + return errors; + } +@@ -1117,31 +1117,31 @@ void mx6_lpddr2_cfg(const struct mx6_ddr_sysinfo *sysinfo, + + cs0_end = 4 * sysinfo->cs_density - 1; + +- debug("density:%d Gb (%d Gb per chip)\n", ++printf("density:%d Gb (%d Gb per chip)\n", + sysinfo->cs_density, lpddr2_cfg->density); +- debug("clock: %dMHz (%d ps)\n", clock, clkper); +- debug("memspd:%d\n", lpddr2_cfg->mem_speed); +- debug("trcd_lp=%d\n", trcd_lp); +- debug("trppb_lp=%d\n", trppb_lp); +- debug("trpab_lp=%d\n", trpab_lp); +- debug("trc_lp=%d\n", trc_lp); +- debug("tcke=%d\n", tcke); +- debug("tcksrx=%d\n", tcksrx); +- debug("tcksre=%d\n", tcksre); +- debug("trfc=%d\n", trfc); +- debug("txsr=%d\n", txsr); +- debug("txp=%d\n", txp); +- debug("tfaw=%d\n", tfaw); +- debug("tcl=%d\n", tcl); +- debug("tras=%d\n", tras); +- debug("twr=%d\n", twr); +- debug("tmrd=%d\n", tmrd); +- debug("twl=%d\n", twl); +- debug("trtp=%d\n", trtp); +- debug("twtr=%d\n", twtr); +- debug("trrd=%d\n", trrd); +- debug("cs0_end=%d\n", cs0_end); +- debug("ncs=%d\n", sysinfo->ncs); ++printf("clock: %dMHz (%d ps)\n", clock, clkper); ++printf("memspd:%d\n", lpddr2_cfg->mem_speed); ++printf("trcd_lp=%d\n", trcd_lp); ++printf("trppb_lp=%d\n", trppb_lp); ++printf("trpab_lp=%d\n", trpab_lp); ++printf("trc_lp=%d\n", trc_lp); ++printf("tcke=%d\n", tcke); ++printf("tcksrx=%d\n", tcksrx); ++printf("tcksre=%d\n", tcksre); ++printf("trfc=%d\n", trfc); ++printf("txsr=%d\n", txsr); ++printf("txp=%d\n", txp); ++printf("tfaw=%d\n", tfaw); ++printf("tcl=%d\n", tcl); ++printf("tras=%d\n", tras); ++printf("twr=%d\n", twr); ++printf("tmrd=%d\n", tmrd); ++printf("twl=%d\n", twl); ++printf("trtp=%d\n", trtp); ++printf("twtr=%d\n", twtr); ++printf("trrd=%d\n", trrd); ++printf("cs0_end=%d\n", cs0_end); ++printf("ncs=%d\n", sysinfo->ncs); + + /* + * board-specific configuration: +@@ -1390,42 +1390,42 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, + trtp = twtr; + cs0_end = 4 * sysinfo->cs_density - 1; + +- debug("density:%d Gb (%d Gb per chip)\n", ++printf("density:%d Gb (%d Gb per chip)\n", + sysinfo->cs_density, ddr3_cfg->density); +- debug("clock: %dMHz (%d ps)\n", clock, clkper); +- debug("memspd:%d\n", mem_speed); +- debug("tcke=%d\n", tcke); +- debug("tcksrx=%d\n", tcksrx); +- debug("tcksre=%d\n", tcksre); +- debug("taofpd=%d\n", taofpd); +- debug("taonpd=%d\n", taonpd); +- debug("todtlon=%d\n", todtlon); +- debug("tanpd=%d\n", tanpd); +- debug("taxpd=%d\n", taxpd); +- debug("trfc=%d\n", trfc); +- debug("txs=%d\n", txs); +- debug("txp=%d\n", txp); +- debug("txpdll=%d\n", txpdll); +- debug("tfaw=%d\n", tfaw); +- debug("tcl=%d\n", tcl); +- debug("trcd=%d\n", trcd); +- debug("trp=%d\n", trp); +- debug("trc=%d\n", trc); +- debug("tras=%d\n", tras); +- debug("twr=%d\n", twr); +- debug("tmrd=%d\n", tmrd); +- debug("tcwl=%d\n", tcwl); +- debug("tdllk=%d\n", tdllk); +- debug("trtp=%d\n", trtp); +- debug("twtr=%d\n", twtr); +- debug("trrd=%d\n", trrd); +- debug("txpr=%d\n", txpr); +- debug("cs0_end=%d\n", cs0_end); +- debug("ncs=%d\n", sysinfo->ncs); +- debug("Rtt_wr=%d\n", sysinfo->rtt_wr); +- debug("Rtt_nom=%d\n", sysinfo->rtt_nom); +- debug("SRT=%d\n", ddr3_cfg->SRT); +- debug("twr=%d\n", twr); ++printf("clock: %dMHz (%d ps)\n", clock, clkper); ++printf("memspd:%d\n", mem_speed); ++printf("tcke=%d\n", tcke); ++printf("tcksrx=%d\n", tcksrx); ++printf("tcksre=%d\n", tcksre); ++printf("taofpd=%d\n", taofpd); ++printf("taonpd=%d\n", taonpd); ++printf("todtlon=%d\n", todtlon); ++printf("tanpd=%d\n", tanpd); ++printf("taxpd=%d\n", taxpd); ++printf("trfc=%d\n", trfc); ++printf("txs=%d\n", txs); ++printf("txp=%d\n", txp); ++printf("txpdll=%d\n", txpdll); ++printf("tfaw=%d\n", tfaw); ++printf("tcl=%d\n", tcl); ++printf("trcd=%d\n", trcd); ++printf("trp=%d\n", trp); ++printf("trc=%d\n", trc); ++printf("tras=%d\n", tras); ++printf("twr=%d\n", twr); ++printf("tmrd=%d\n", tmrd); ++printf("tcwl=%d\n", tcwl); ++printf("tdllk=%d\n", tdllk); ++printf("trtp=%d\n", trtp); ++printf("twtr=%d\n", twtr); ++printf("trrd=%d\n", trrd); ++printf("txpr=%d\n", txpr); ++printf("cs0_end=%d\n", cs0_end); ++printf("ncs=%d\n", sysinfo->ncs); ++printf("Rtt_wr=%d\n", sysinfo->rtt_wr); ++printf("Rtt_nom=%d\n", sysinfo->rtt_nom); ++printf("SRT=%d\n", ddr3_cfg->SRT); ++printf("twr=%d\n", twr); + + /* + * board-specific configuration: +@@ -1524,22 +1524,22 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, + /* MR2 */ + val = (sysinfo->rtt_wr & 3) << 9 | (ddr3_cfg->SRT & 1) << 7 | + ((tcwl - 3) & 3) << 3; +- debug("MR2 CS%d: 0x%08x\n", cs, (u32)MR(val, 2, 3, cs)); ++printf("MR2 CS%d: 0x%08x\n", cs, (u32)MR(val, 2, 3, cs)); + mmdc0->mdscr = MR(val, 2, 3, cs); + /* MR3 */ +- debug("MR3 CS%d: 0x%08x\n", cs, (u32)MR(0, 3, 3, cs)); ++printf("MR3 CS%d: 0x%08x\n", cs, (u32)MR(0, 3, 3, cs)); + mmdc0->mdscr = MR(0, 3, 3, cs); + /* MR1 */ + val = ((sysinfo->rtt_nom & 1) ? 1 : 0) << 2 | + ((sysinfo->rtt_nom & 2) ? 1 : 0) << 6; +- debug("MR1 CS%d: 0x%08x\n", cs, (u32)MR(val, 1, 3, cs)); ++printf("MR1 CS%d: 0x%08x\n", cs, (u32)MR(val, 1, 3, cs)); + mmdc0->mdscr = MR(val, 1, 3, cs); + /* MR0 */ + val = ((tcl - 1) << 4) | /* CAS */ + (1 << 8) | /* DLL Reset */ + ((twr - 3) << 9) | /* Write Recovery */ + (sysinfo->pd_fast_exit << 12); /* Precharge PD PLL on */ +- debug("MR0 CS%d: 0x%08x\n", cs, (u32)MR(val, 0, 3, cs)); ++printf("MR0 CS%d: 0x%08x\n", cs, (u32)MR(val, 0, 3, cs)); + mmdc0->mdscr = MR(val, 0, 3, cs); + /* ZQ calibration */ + val = (1 << 10); +diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c +index 304a03031..17817600c 100644 +--- a/arch/arm/mach-imx/mx7/clock.c ++++ b/arch/arm/mach-imx/mx7/clock.c +@@ -782,7 +782,7 @@ static int enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom, + u32 reg = 0; + ulong start; + +- debug("pll5 div = %d, num = %d, denom = %d\n", ++printf("pll5 div = %d, num = %d, denom = %d\n", + pll_div, pll_num, pll_denom); + + /* Power up PLL5 video and disable its output */ +@@ -902,7 +902,7 @@ void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq) + u32 pll_div, pll_num, pll_denom, post_div = 0; + u32 target; + +- debug("mxs_set_lcdclk, freq = %d\n", freq); ++printf("mxs_set_lcdclk, freq = %d\n", freq); + + clock_enable(CCGR_LCDIF, 0); + +@@ -941,7 +941,7 @@ void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq) + return; + } + +- debug("best %d, pred = %d, postd = %d\n", best, pred, postd); ++printf("best %d, pred = %d, postd = %d\n", best, pred, postd); + + pll_div = best / hck; + pll_denom = 1000000; +diff --git a/arch/arm/mach-imx/mx7ulp/iomux.c b/arch/arm/mach-imx/mx7ulp/iomux.c +index 05ddeed2a..3215d6eb8 100644 +--- a/arch/arm/mach-imx/mx7ulp/iomux.c ++++ b/arch/arm/mach-imx/mx7ulp/iomux.c +@@ -31,7 +31,7 @@ void mx7ulp_iomux_setup_pad(iomux_cfg_t pad) + u32 pad_ctrl_ofs = mux_ctrl_ofs; + u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; + +- debug("[PAD CFG] = 0x%16llX \r\n\tmux_ctl = 0x%X(0x%X) sel_input = 0x%X(0x%X) pad_ctrl = 0x%X(0x%X)\r\n", ++printf("[PAD CFG] = 0x%16llX \r\n\tmux_ctl = 0x%X(0x%X) sel_input = 0x%X(0x%X) pad_ctrl = 0x%X(0x%X)\r\n", + pad, mux_ctrl_ofs, mux_mode, sel_input_ofs, sel_input, + pad_ctrl_ofs, pad_ctrl); + +diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c +index 4c066557c..223704552 100644 +--- a/arch/arm/mach-imx/mx7ulp/scg.c ++++ b/arch/arm/mach-imx/mx7ulp/scg.c +@@ -1035,10 +1035,10 @@ void scg_a7_sys_clk_sel(enum scg_sys_src clk) + + void scg_a7_info(void) + { +- debug("SCG Version: 0x%x\n", readl(&scg1_regs->verid)); +- debug("SCG Parameter: 0x%x\n", readl(&scg1_regs->param)); +- debug("SCG RCCR Value: 0x%x\n", readl(&scg1_regs->rccr)); +- debug("SCG Clock Status: 0x%x\n", readl(&scg1_regs->csr)); ++printf("SCG Version: 0x%x\n", readl(&scg1_regs->verid)); ++printf("SCG Parameter: 0x%x\n", readl(&scg1_regs->param)); ++printf("SCG RCCR Value: 0x%x\n", readl(&scg1_regs->rccr)); ++printf("SCG Clock Status: 0x%x\n", readl(&scg1_regs->csr)); + } + + void scg_a7_init_core_clk(void) +diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c +index 320f24dd2..742ac2366 100644 +--- a/arch/arm/mach-imx/mx7ulp/soc.c ++++ b/arch/arm/mach-imx/mx7ulp/soc.c +@@ -312,7 +312,7 @@ static char *get_reset_cause(char *ret) + break; + } + +- debug("[%X] SRS[%X] %X - ", cause1, srs, srs^cause1); ++printf("[%X] SRS[%X] %X - ", cause1, srs, srs^cause1); + return ret; + } + +diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c +index 36033d611..06593b0b3 100644 +--- a/arch/arm/mach-imx/spl.c ++++ b/arch/arm/mach-imx/spl.c +@@ -287,7 +287,7 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + image_entry_noargs_t image_entry = + (image_entry_noargs_t)(unsigned long)spl_image->entry_point; + +- debug("image entry point: 0x%lX\n", spl_image->entry_point); ++printf("image entry point: 0x%lX\n", spl_image->entry_point); + + if (spl_image->flags & SPL_FIT_FOUND) { + image_entry(); +diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c +index d2085dabd..e3dd0438e 100644 +--- a/arch/arm/mach-imx/spl_imx_romapi.c ++++ b/arch/arm/mach-imx/spl_imx_romapi.c +@@ -41,7 +41,7 @@ static ulong spl_romapi_read_seekable(struct spl_load_info *load, + + offset = sector * pagesize; + +- debug("ROM API load from 0x%x, size 0x%x\n", offset, (u32)byte); ++printf("ROM API load from 0x%x, size 0x%x\n", offset, (u32)byte); + + ret = g_rom_api->download_image(buf, offset, byte, + ((uintptr_t)buf) ^ offset ^ byte); +diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c +index 425b3f93c..fc692e2c2 100644 +--- a/arch/arm/mach-k3/am6_init.c ++++ b/arch/arm/mach-k3/am6_init.c +@@ -199,7 +199,7 @@ void board_init_f(ulong dummy) + + mem_malloc_init((ulong)pool_addr, (ulong)pool_size); + gd->flags |= GD_FLG_FULL_MALLOC_INIT; +- debug("%s: initialized an early full malloc pool at 0x%08lx of 0x%lx bytes\n", ++printf("%s: initialized an early full malloc pool at 0x%08lx of 0x%lx bytes\n", + __func__, (unsigned long)pool_addr, (unsigned long)pool_size); + /* + * Process pinctrl for the serial0 a.k.a. WKUP_UART0 module and continue +diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c +index 9191f686f..2a24acd20 100644 +--- a/arch/arm/mach-k3/common.c ++++ b/arch/arm/mach-k3/common.c +@@ -211,7 +211,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + if (ret) + panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret); + if (!(size > 0 && valid_elf_image(loadaddr))) { +- debug("Shutting down...\n"); ++printf("Shutting down...\n"); + release_resources_for_core_shutdown(); + + while (1) +@@ -236,7 +236,7 @@ int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name) + + ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end); + msmc_size = msmc_end - msmc_start + 1; +- debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__, ++printf("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__, + msmc_start, msmc_size); + + /* find or create "msmc_sram node */ +@@ -278,13 +278,13 @@ int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name) + addr = fdt_read_number(sub_reg, 1); + sub_reg++; + size = fdt_read_number(sub_reg, 1); +- debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__, ++printf("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__, + subnode, addr, size); + if (addr + size > msmc_size || + !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) || + !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) { + fdt_del_node(blob, subnode); +- debug("%s: deleting subnode %d\n", __func__, subnode); ++printf("%s: deleting subnode %d\n", __func__, subnode); + if (!prev_node) + subnode = fdt_first_subnode(blob, node); + else +@@ -377,7 +377,7 @@ bool soc_is_j7200(void) + #ifdef CONFIG_ARM64 + void board_prep_linux(bootm_headers_t *images) + { +- debug("Linux kernel Image start = 0x%lx end = 0x%lx\n", ++printf("Linux kernel Image start = 0x%lx end = 0x%lx\n", + images->os.start, images->os.end); + __asm_flush_dcache_range(images->os.start, + ROUND(images->os.end, +@@ -456,7 +456,7 @@ void spl_enable_dcache(void) + ram_top = (phys_addr_t) 0x100000000; + + gd->arch.tlb_addr = ram_top - gd->arch.tlb_size; +- debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, ++printf("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, + gd->arch.tlb_addr + gd->arch.tlb_size); + + dcache_enable(); +diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c +index 66f90a5a3..a7605fb93 100644 +--- a/arch/arm/mach-k3/security.c ++++ b/arch/arm/mach-k3/security.c +@@ -29,8 +29,8 @@ void board_fit_image_post_process(void **p_image, size_t *p_size) + image_addr = (uintptr_t)*p_image; + image_size = *p_size; + +- debug("Authenticating image at address 0x%016llx\n", image_addr); +- debug("Authenticating image of size %d bytes\n", image_size); ++printf("Authenticating image at address 0x%016llx\n", image_addr); ++printf("Authenticating image of size %d bytes\n", image_size); + + flush_dcache_range((unsigned long)image_addr, + ALIGN((unsigned long)image_addr + image_size, +diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c +index 0bacfc4d0..c18d25af5 100644 +--- a/arch/arm/mach-k3/sysfw-loader.c ++++ b/arch/arm/mach-k3/sysfw-loader.c +@@ -259,7 +259,7 @@ void k3_sysfw_loader(bool rom_loaded_sysfw, + panic("Error allocating %u bytes of memory for SYSFW image\n", + CONFIG_K3_SYSFW_IMAGE_SIZE_MAX); + +- debug("%s: allocated %u bytes at 0x%p\n", __func__, ++printf("%s: allocated %u bytes at 0x%p\n", __func__, + CONFIG_K3_SYSFW_IMAGE_SIZE_MAX, sysfw_load_address); + + /* Set load address for legacy modes that bypass spl_get_load_buffer */ +diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c +index 339ae7fd2..34cd1229b 100644 +--- a/arch/arm/mach-kirkwood/cpu.c ++++ b/arch/arm/mach-kirkwood/cpu.c +@@ -99,17 +99,17 @@ static void kw_sysrst_action(void) + char *s = env_get("sysrstcmd"); + + if (!s) { +- debug("Error.. %s failed, check sysrstcmd\n", ++printf("Error.. %s failed, check sysrstcmd\n", + __FUNCTION__); + return; + } + +- debug("Starting %s process...\n", __FUNCTION__); ++printf("Starting %s process...\n", __FUNCTION__); + ret = run_command(s, 0); + if (ret != 0) +- debug("Error.. %s failed\n", __FUNCTION__); ++printf("Error.. %s failed\n", __FUNCTION__); + else +- debug("%s process finished\n", __FUNCTION__); ++printf("%s process finished\n", __FUNCTION__); + } + + static void kw_sysrst_check(void) +@@ -129,7 +129,7 @@ static void kw_sysrst_check(void) + + /* read SysRst Length counter register (bits 28:0) */ + sysrst_cnt = (0x1fffffff & readl(KW_REG_SYSRST_CNT)); +- debug("H/w Rst hold time: %d.%d secs\n", ++printf("H/w Rst hold time: %d.%d secs\n", + sysrst_cnt / SYSRST_CNT_1SEC_VAL, + sysrst_cnt % SYSRST_CNT_1SEC_VAL); + +diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c +index 4fdad99ca..5d27661ff 100644 +--- a/arch/arm/mach-kirkwood/mpp.c ++++ b/arch/arm/mach-kirkwood/mpp.c +@@ -24,7 +24,7 @@ static u32 kirkwood_variant(void) + case 2: + return MPP_F6281_MASK; + default: +- debug("MPP setup: unknown kirkwood variant\n"); ++printf("MPP setup: unknown kirkwood variant\n"); + return 0; + } + } +@@ -42,12 +42,12 @@ void kirkwood_mpp_conf(const u32 *mpp_list, u32 *mpp_save) + if (!variant_mask) + return; + +- debug( "initial MPP regs:"); ++printf( "initial MPP regs:"); + for (i = 0; i < MPP_NR_REGS; i++) { + mpp_ctrl[i] = readl(MPP_CTRL(i)); +- debug(" %08x", mpp_ctrl[i]); ++printf(" %08x", mpp_ctrl[i]); + } +- debug("\n"); ++printf("\n"); + + + while (*mpp_list) { +@@ -57,12 +57,12 @@ void kirkwood_mpp_conf(const u32 *mpp_list, u32 *mpp_save) + int shift; + + if (num > MPP_MAX) { +- debug("kirkwood_mpp_conf: invalid MPP " ++printf("kirkwood_mpp_conf: invalid MPP " + "number (%u)\n", num); + continue; + } + if (!(*mpp_list & variant_mask)) { +- debug("kirkwood_mpp_conf: requested MPP%u config " ++printf("kirkwood_mpp_conf: requested MPP%u config " + "unavailable on this hardware\n", num); + continue; + } +@@ -81,11 +81,11 @@ void kirkwood_mpp_conf(const u32 *mpp_list, u32 *mpp_save) + mpp_list++; + } + +- debug(" final MPP regs:"); ++printf(" final MPP regs:"); + for (i = 0; i < MPP_NR_REGS; i++) { + writel(mpp_ctrl[i], MPP_CTRL(i)); +- debug(" %08x", mpp_ctrl[i]); ++printf(" %08x", mpp_ctrl[i]); + } +- debug("\n"); ++printf("\n"); + + } +diff --git a/arch/arm/mach-mediatek/mt7629/init.c b/arch/arm/mach-mediatek/mt7629/init.c +index 0130554ff..a9f67b1aa 100644 +--- a/arch/arm/mach-mediatek/mt7629/init.c ++++ b/arch/arm/mach-mediatek/mt7629/init.c +@@ -110,7 +110,7 @@ int dram_init(void) + if (ret) + return ret; + +- debug("RAM init base=%lx, size=%x\n", ram.base, ram.size); ++printf("RAM init base=%lx, size=%x\n", ram.base, ram.size); + + gd->ram_size = ram.size; + +diff --git a/arch/arm/mach-mediatek/mt8512/init.c b/arch/arm/mach-mediatek/mt8512/init.c +index b7050dfc3..9d1ebd1d2 100644 +--- a/arch/arm/mach-mediatek/mt8512/init.c ++++ b/arch/arm/mach-mediatek/mt8512/init.c +@@ -56,7 +56,7 @@ void reset_cpu(void) + + int print_cpuinfo(void) + { +- debug("CPU: MediaTek MT8512\n"); ++printf("CPU: MediaTek MT8512\n"); + return 0; + } + +diff --git a/arch/arm/mach-meson/board-axg.c b/arch/arm/mach-meson/board-axg.c +index 71ac65c63..489bc4b22 100644 +--- a/arch/arm/mach-meson/board-axg.c ++++ b/arch/arm/mach-meson/board-axg.c +@@ -108,18 +108,18 @@ int board_usb_init(int index, enum usb_init_type init) + node = fdt_node_offset_by_compatible(blob, -1, + "amlogic,meson-gxl-usb-ctrl"); + if (node < 0) { +- debug("Not found usb-control node\n"); ++printf("Not found usb-control node\n"); + return -ENODEV; + } + + if (!fdtdec_get_is_enabled(blob, node)) { +- debug("usb is disabled in the device tree\n"); ++printf("usb is disabled in the device tree\n"); + return -ENODEV; + } + + ret = uclass_get_device_by_of_offset(UCLASS_SIMPLE_BUS, node, &dev); + if (ret) { +- debug("Not found usb-control device\n"); ++printf("Not found usb-control device\n"); + return ret; + } + +@@ -127,18 +127,18 @@ int board_usb_init(int index, enum usb_init_type init) + dwc2_node = fdt_node_offset_by_compatible(blob, node, + "amlogic,meson-g12a-usb"); + if (dwc2_node < 0) { +- debug("Not found dwc2 node\n"); ++printf("Not found dwc2 node\n"); + return -ENODEV; + } + + if (!fdtdec_get_is_enabled(blob, dwc2_node)) { +- debug("dwc2 is disabled in the device tree\n"); ++printf("dwc2 is disabled in the device tree\n"); + return -ENODEV; + } + + meson_gx_dwc2_data.regs_otg = fdtdec_get_addr(blob, dwc2_node, "reg"); + if (meson_gx_dwc2_data.regs_otg == FDT_ADDR_T_NONE) { +- debug("usbotg: can't get base address\n"); ++printf("usbotg: can't get base address\n"); + return -ENODATA; + } + +@@ -146,7 +146,7 @@ int board_usb_init(int index, enum usb_init_type init) + ret = fdtdec_parse_phandle_with_args(blob, dwc2_node, "clocks", + "#clock-cells", 0, 0, &args); + if (ret) { +- debug("usbotg has no clocks defined in the device tree\n"); ++printf("usbotg has no clocks defined in the device tree\n"); + return ret; + } + +@@ -155,7 +155,7 @@ int board_usb_init(int index, enum usb_init_type init) + return ret; + + if (args.args_count != 1) { +- debug("Can't find clock ID in the device tree\n"); ++printf("Can't find clock ID in the device tree\n"); + return -ENODATA; + } + +@@ -164,7 +164,7 @@ int board_usb_init(int index, enum usb_init_type init) + + ret = clk_enable(&clk); + if (ret) { +- debug("Failed to enable usbotg clock\n"); ++printf("Failed to enable usbotg clock\n"); + return ret; + } + +@@ -194,7 +194,7 @@ int board_usb_cleanup(int index, enum usb_init_type init) + node = fdt_node_offset_by_compatible(blob, -1, + "amlogic,meson-gxl-usb-ctrl"); + if (node < 0) { +- debug("Not found usb-control node\n"); ++printf("Not found usb-control node\n"); + return -ENODEV; + } + +diff --git a/arch/arm/mach-meson/board-g12a.c b/arch/arm/mach-meson/board-g12a.c +index 2e59eee8f..d34268241 100644 +--- a/arch/arm/mach-meson/board-g12a.c ++++ b/arch/arm/mach-meson/board-g12a.c +@@ -114,18 +114,18 @@ int board_usb_init(int index, enum usb_init_type init) + node = fdt_node_offset_by_compatible(blob, -1, + "amlogic,meson-g12a-usb-ctrl"); + if (node < 0) { +- debug("Not found usb-control node\n"); ++printf("Not found usb-control node\n"); + return -ENODEV; + } + + if (!fdtdec_get_is_enabled(blob, node)) { +- debug("usb is disabled in the device tree\n"); ++printf("usb is disabled in the device tree\n"); + return -ENODEV; + } + + ret = uclass_get_device_by_of_offset(UCLASS_SIMPLE_BUS, node, &dev); + if (ret) { +- debug("Not found usb-control device\n"); ++printf("Not found usb-control device\n"); + return ret; + } + +@@ -133,18 +133,18 @@ int board_usb_init(int index, enum usb_init_type init) + dwc2_node = fdt_node_offset_by_compatible(blob, node, + "amlogic,meson-g12a-usb"); + if (dwc2_node < 0) { +- debug("Not found dwc2 node\n"); ++printf("Not found dwc2 node\n"); + return -ENODEV; + } + + if (!fdtdec_get_is_enabled(blob, dwc2_node)) { +- debug("dwc2 is disabled in the device tree\n"); ++printf("dwc2 is disabled in the device tree\n"); + return -ENODEV; + } + + meson_g12a_dwc2_data.regs_otg = fdtdec_get_addr(blob, dwc2_node, "reg"); + if (meson_g12a_dwc2_data.regs_otg == FDT_ADDR_T_NONE) { +- debug("usbotg: can't get base address\n"); ++printf("usbotg: can't get base address\n"); + return -ENODATA; + } + +@@ -152,7 +152,7 @@ int board_usb_init(int index, enum usb_init_type init) + ret = fdtdec_parse_phandle_with_args(blob, dwc2_node, "clocks", + "#clock-cells", 0, 0, &args); + if (ret) { +- debug("usbotg has no clocks defined in the device tree\n"); ++printf("usbotg has no clocks defined in the device tree\n"); + return ret; + } + +@@ -161,7 +161,7 @@ int board_usb_init(int index, enum usb_init_type init) + return ret; + + if (args.args_count != 1) { +- debug("Can't find clock ID in the device tree\n"); ++printf("Can't find clock ID in the device tree\n"); + return -ENODATA; + } + +@@ -170,7 +170,7 @@ int board_usb_init(int index, enum usb_init_type init) + + ret = clk_enable(&clk); + if (ret) { +- debug("Failed to enable usbotg clock\n"); ++printf("Failed to enable usbotg clock\n"); + return ret; + } + +diff --git a/arch/arm/mach-meson/board-gx.c b/arch/arm/mach-meson/board-gx.c +index 01fafd81c..0711f83ee 100644 +--- a/arch/arm/mach-meson/board-gx.c ++++ b/arch/arm/mach-meson/board-gx.c +@@ -129,19 +129,19 @@ int board_usb_init(int index, enum usb_init_type init) + node = fdt_node_offset_by_compatible(blob, -1, + "amlogic,meson-gxm-usb-ctrl"); + if (node < 0) { +- debug("Not found usb-control node\n"); ++printf("Not found usb-control node\n"); + return -ENODEV; + } + } + + if (!fdtdec_get_is_enabled(blob, node)) { +- debug("usb is disabled in the device tree\n"); ++printf("usb is disabled in the device tree\n"); + return -ENODEV; + } + + ret = uclass_get_device_by_of_offset(UCLASS_SIMPLE_BUS, node, &dev); + if (ret) { +- debug("Not found usb-control device\n"); ++printf("Not found usb-control device\n"); + return ret; + } + +@@ -149,18 +149,18 @@ int board_usb_init(int index, enum usb_init_type init) + dwc2_node = fdt_node_offset_by_compatible(blob, node, + "amlogic,meson-g12a-usb"); + if (dwc2_node < 0) { +- debug("Not found dwc2 node\n"); ++printf("Not found dwc2 node\n"); + return -ENODEV; + } + + if (!fdtdec_get_is_enabled(blob, dwc2_node)) { +- debug("dwc2 is disabled in the device tree\n"); ++printf("dwc2 is disabled in the device tree\n"); + return -ENODEV; + } + + meson_gx_dwc2_data.regs_otg = fdtdec_get_addr(blob, dwc2_node, "reg"); + if (meson_gx_dwc2_data.regs_otg == FDT_ADDR_T_NONE) { +- debug("usbotg: can't get base address\n"); ++printf("usbotg: can't get base address\n"); + return -ENODATA; + } + +@@ -168,7 +168,7 @@ int board_usb_init(int index, enum usb_init_type init) + ret = fdtdec_parse_phandle_with_args(blob, dwc2_node, "clocks", + "#clock-cells", 0, 0, &args); + if (ret) { +- debug("usbotg has no clocks defined in the device tree\n"); ++printf("usbotg has no clocks defined in the device tree\n"); + return ret; + } + +@@ -177,7 +177,7 @@ int board_usb_init(int index, enum usb_init_type init) + return ret; + + if (args.args_count != 1) { +- debug("Can't find clock ID in the device tree\n"); ++printf("Can't find clock ID in the device tree\n"); + return -ENODATA; + } + +@@ -186,7 +186,7 @@ int board_usb_init(int index, enum usb_init_type init) + + ret = clk_enable(&clk); + if (ret) { +- debug("Failed to enable usbotg clock\n"); ++printf("Failed to enable usbotg clock\n"); + return ret; + } + +@@ -219,7 +219,7 @@ int board_usb_cleanup(int index, enum usb_init_type init) + node = fdt_node_offset_by_compatible(blob, -1, + "amlogic,meson-gxm-usb-ctrl"); + if (node < 0) { +- debug("Not found usb-control node\n"); ++printf("Not found usb-control node\n"); + return -ENODEV; + } + } +diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c +index 1a8f23cb1..f089f11c2 100644 +--- a/arch/arm/mach-meson/sm.c ++++ b/arch/arm/mach-meson/sm.c +@@ -45,7 +45,7 @@ static void meson_init_shmem(void) + smc_call(®s); + shmem_output = (void *)regs.regs[0]; + +- debug("Secure Monitor shmem: 0x%p 0x%p\n", shmem_input, shmem_output); ++printf("Secure Monitor shmem: 0x%p 0x%p\n", shmem_input, shmem_output); + } + + ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size) +diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c +index 16ebb7a59..69ddfc75d 100644 +--- a/arch/arm/mach-mvebu/spl.c ++++ b/arch/arm/mach-mvebu/spl.c +@@ -28,7 +28,7 @@ static u32 get_boot_device(void) + */ + val = readl(CONFIG_BOOTROM_ERR_REG); + boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS; +- debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device); ++printf("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device); + if (boot_device == BOOTROM_ERR_MODE_UART) + return BOOT_DEVICE_UART; + +@@ -47,7 +47,7 @@ static u32 get_boot_device(void) + */ + val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */ + boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS; +- debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); ++printf("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); + switch (boot_device) { + #if defined(CONFIG_ARMADA_38X) + case BOOT_FROM_NAND: +@@ -113,7 +113,7 @@ void board_init_f(ulong dummy) + + ret = spl_init(); + if (ret) { +- debug("spl_init() failed: %d\n", ret); ++printf("spl_init() failed: %d\n", ret); + hang(); + } + +diff --git a/arch/arm/mach-nexell/clock.c b/arch/arm/mach-nexell/clock.c +index d5b46a87a..19fa3ef57 100644 +--- a/arch/arm/mach-nexell/clock.c ++++ b/arch/arm/mach-nexell/clock.c +@@ -621,7 +621,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate) + + step = peri->clk_step; + mask = peri->in_mask; +- debug("clk: %s.%d request = %ld [input=0x%x]\n", peri->dev_name, ++printf("clk: %s.%d request = %ld [input=0x%x]\n", peri->dev_name, + peri->dev_id, rate, mask); + + if (!(I_CLOCK_MASK & mask)) { +@@ -659,7 +659,7 @@ next: + if (rate_hz && (abs(rate - request) > abs(rate_hz - request))) + continue; + +- debug("clk: %s.%d, pll.%d[%lu] request[%ld] calc[%ld]\n", ++printf("clk: %s.%d, pll.%d[%lu] request[%ld] calc[%ld]\n", + peri->dev_name, peri->dev_id, n, pll->clk.rate, + request, rate); + +@@ -692,10 +692,10 @@ next: + peri->div_src_1 = s2, peri->div_val_1 = d2; + clk->rate = rate_hz; + +- debug("clk: %s.%d, step[%d] src[%d,%d] %ld", peri->dev_name, ++printf("clk: %s.%d, step[%d] src[%d,%d] %ld", peri->dev_name, + peri->dev_id, peri->clk_step, peri->div_src_0, peri->div_src_1, + rate); +- debug("/(div0: %d * div1: %d) = %ld, %ld diff (%ld)\n", ++printf("/(div0: %d * div1: %d) = %ld, %ld diff (%ld)\n", + peri->div_val_0, peri->div_val_1, rate_hz, request, + abs(rate_hz - request)); + +@@ -731,7 +731,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate) + + clk_dev_rate(peri->base, i, s, d); + +- debug("clk: %s.%d (%p) set_rate [%d] src[%d] div[%d]\n", ++printf("clk: %s.%d (%p) set_rate [%d] src[%d] div[%d]\n", + peri->dev_name, peri->dev_id, peri->base, i, s, d); + } + +@@ -747,7 +747,7 @@ int clk_enable(struct clk *clk) + if (!peri) + return 0; + +- debug("clk: %s.%d enable (BCLK=%s, PCLK=%s)\n", peri->dev_name, ++printf("clk: %s.%d enable (BCLK=%s, PCLK=%s)\n", peri->dev_name, + peri->dev_id, I_GATE_BCLK & peri->in_mask ? "ON" : "PASS", + I_GATE_PCLK & peri->in_mask ? "ON" : "PASS"); + +@@ -797,7 +797,7 @@ void clk_disable(struct clk *clk) + if (!peri) + return; + +- debug("clk: %s.%d disable\n", peri->dev_name, peri->dev_id); ++printf("clk: %s.%d disable\n", peri->dev_name, peri->dev_id); + + if (!(I_CLOCK_MASK & peri->in_mask)) { + /* Gated BCLK/PCLK disable */ +@@ -865,5 +865,5 @@ void __init clk_init(void) + } + #endif + } +- debug("CPU : Clock Generator= %d EA, ", CLK_DEVS_NUM); ++printf("CPU : Clock Generator= %d EA, ", CLK_DEVS_NUM); + } +diff --git a/arch/arm/mach-nexell/timer.c b/arch/arm/mach-nexell/timer.c +index 3b311fd22..587872e72 100644 +--- a/arch/arm/mach-nexell/timer.c ++++ b/arch/arm/mach-nexell/timer.c +@@ -211,7 +211,7 @@ unsigned long get_timer_masked(void) + /* save last */ + lastdec = now; + +- debug("now=%lu, last=%lu, timestamp=%lu\n", now, lastdec, timestamp); ++printf("now=%lu, last=%lu, timestamp=%lu\n", now, lastdec, timestamp); + return (unsigned long)timestamp; + } + +@@ -219,7 +219,7 @@ void __udelay(unsigned long usec) + { + unsigned long tmo, tmp; + +- debug("+udelay=%ld\n", usec); ++printf("+udelay=%ld\n", usec); + + if (!timerinit) + timer_init(); +@@ -239,7 +239,7 @@ void __udelay(unsigned long usec) + } + + tmp = get_timer_masked(); /* get current timestamp */ +- debug("A. tmo=%ld, tmp=%ld\n", tmo, tmp); ++printf("A. tmo=%ld, tmp=%ld\n", tmo, tmp); + + /* if setting this fordward will roll time stamp */ + if (tmp > (tmo + tmp + 1)) +@@ -249,13 +249,13 @@ void __udelay(unsigned long usec) + /* set advancing stamp wake up time */ + tmo += tmp; + +- debug("B. tmo=%ld, tmp=%ld\n", tmo, tmp); ++printf("B. tmo=%ld, tmp=%ld\n", tmo, tmp); + + /* loop till event */ + do { + tmp = get_timer_masked(); + } while (tmo > tmp); +- debug("-udelay=%ld\n", usec); ++printf("-udelay=%ld\n", usec); + } + + void udelay_masked(unsigned long usec) +diff --git a/arch/arm/mach-omap2/am33xx/clock.c b/arch/arm/mach-omap2/am33xx/clock.c +index 130ee6c6e..9ec44cfdf 100644 +--- a/arch/arm/mach-omap2/am33xx/clock.c ++++ b/arch/arm/mach-omap2/am33xx/clock.c +@@ -141,7 +141,7 @@ static inline void enable_clock_module(u32 *const clkctrl_addr, u32 enable_mode, + { + clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, + enable_mode << MODULE_CLKCTRL_MODULEMODE_SHIFT); +- debug("Enable clock module - %p\n", clkctrl_addr); ++printf("Enable clock module - %p\n", clkctrl_addr); + if (wait_for_enable) + wait_for_clk_enable(clkctrl_addr); + } +@@ -168,7 +168,7 @@ static inline void disable_clock_module(u32 *const clkctrl_addr, + clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, + MODULE_CLKCTRL_MODULEMODE_SW_DISABLE << + MODULE_CLKCTRL_MODULEMODE_SHIFT); +- debug("Disable clock module - %p\n", clkctrl_addr); ++printf("Disable clock module - %p\n", clkctrl_addr); + if (wait_for_disable) + wait_for_clk_disable(clkctrl_addr); + } +@@ -177,7 +177,7 @@ static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 enable_mode) + { + clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, + enable_mode << CD_CLKCTRL_CLKTRCTRL_SHIFT); +- debug("Enable clock domain - %p\n", clkctrl_reg); ++printf("Enable clock domain - %p\n", clkctrl_reg); + } + + static inline void disable_clock_domain(u32 *const clkctrl_reg) +@@ -185,7 +185,7 @@ static inline void disable_clock_domain(u32 *const clkctrl_reg) + clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, + CD_CLKCTRL_CLKTRCTRL_SW_SLEEP << + CD_CLKCTRL_CLKTRCTRL_SHIFT); +- debug("Disable clock domain - %p\n", clkctrl_reg); ++printf("Disable clock domain - %p\n", clkctrl_reg); + } + + void do_enable_clocks(u32 *const *clk_domains, +diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c +index f8434ecf5..28412f0bf 100644 +--- a/arch/arm/mach-omap2/am33xx/ddr.c ++++ b/arch/arm/mach-omap2/am33xx/ddr.c +@@ -46,7 +46,7 @@ static inline u32 get_mr(int nr, u32 cs, u32 mr_addr) + writel(mr_addr, &emif_reg[nr]->emif_lpddr2_mode_reg_cfg); + + mr = readl(&emif_reg[nr]->emif_lpddr2_mode_reg_data); +- debug("get_mr: EMIF1 cs %d mr %08x val 0x%x\n", cs, mr_addr, mr); ++printf("get_mr: EMIF1 cs %d mr %08x val 0x%x\n", cs, mr_addr, mr); + if (((mr & 0x0000ff00) >> 8) == (mr & 0xff) && + ((mr & 0x00ff0000) >> 16) == (mr & 0xff) && + ((mr & 0xff000000) >> 24) == (mr & 0xff)) +diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c +index 1268a3250..34376ae65 100644 +--- a/arch/arm/mach-omap2/boot-common.c ++++ b/arch/arm/mach-omap2/boot-common.c +@@ -224,7 +224,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + + u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS); + +- debug("image entry point: 0x%lX\n", spl_image->entry_point); ++printf("image entry point: 0x%lX\n", spl_image->entry_point); + /* Pass the saved boot_params from rom code */ + image_entry((u32 *)boot_params); + } +diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c +index 14b638a65..5b2d03c1f 100644 +--- a/arch/arm/mach-omap2/clocks-common.c ++++ b/arch/arm/mach-omap2/clocks-common.c +@@ -230,13 +230,13 @@ static void do_setup_dpll(u32 const base, const struct dpll_params *params, + M = (temp & CM_CLKSEL_DPLL_M_MASK) >> CM_CLKSEL_DPLL_M_SHIFT; + N = (temp & CM_CLKSEL_DPLL_N_MASK) >> CM_CLKSEL_DPLL_N_SHIFT; + if ((M != (params->m)) || (N != (params->n))) { +- debug("\n %s Dpll locked, but not for ideal M = %d," ++printf("\n %s Dpll locked, but not for ideal M = %d," + "N = %d values, current values are M = %d," + "N= %d" , dpll, params->m, params->n, + M, N); + } else { + /* Dpll locked with ideal values for nominal opps. */ +- debug("\n %s Dpll already locked with ideal" ++printf("\n %s Dpll already locked with ideal" + "nominal opp values", dpll); + + bypass_dpll(base); +@@ -277,7 +277,7 @@ u32 omap_ddr_clk(void) + + core_dpll_params = get_core_dpll_params(*dplls_data); + +- debug("sys_clk %d\n ", sys_clk_khz * 1000); ++printf("sys_clk %d\n ", sys_clk_khz * 1000); + + /* Find Core DPLL locked frequency first */ + ddr_clk = sys_clk_khz * 2 * core_dpll_params->m / +@@ -299,7 +299,7 @@ u32 omap_ddr_clk(void) + + ddr_clk = ddr_clk / divider / core_dpll_params->m2; + ddr_clk *= 1000; /* convert to Hz */ +- debug("ddr_clk %d\n ", ddr_clk); ++printf("ddr_clk %d\n ", ddr_clk); + + return ddr_clk; + } +@@ -340,7 +340,7 @@ void configure_mpu_dpll(void) + params = get_mpu_dpll_params(*dplls_data); + + do_setup_dpll((*prcm)->cm_clkmode_dpll_mpu, params, DPLL_LOCK, "mpu"); +- debug("MPU DPLL locked\n"); ++printf("MPU DPLL locked\n"); + } + + #if defined(CONFIG_USB_EHCI_OMAP) || defined(CONFIG_USB_XHCI_OMAP) || \ +@@ -379,7 +379,7 @@ static void setup_dplls(void) + const struct dpll_params *params; + struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE; + +- debug("setup_dplls\n"); ++printf("setup_dplls\n"); + + /* CORE dpll */ + params = get_core_dpll_params(*dplls_data); /* default - safest */ +@@ -400,13 +400,13 @@ static void setup_dplls(void) + (CLKSEL_L3_CORE_DIV_2 << CLKSEL_L3_SHIFT) | + (CLKSEL_L4_L3_DIV_2 << CLKSEL_L4_SHIFT); + writel(temp, (*prcm)->cm_clksel_core); +- debug("Core DPLL configured\n"); ++printf("Core DPLL configured\n"); + + /* lock PER dpll */ + params = get_per_dpll_params(*dplls_data); + do_setup_dpll((*prcm)->cm_clkmode_dpll_per, + params, DPLL_LOCK, "per"); +- debug("PER DPLL locked\n"); ++printf("PER DPLL locked\n"); + + /* MPU dpll */ + configure_mpu_dpll(); +@@ -470,7 +470,7 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) + + offset_code = get_offset_code(offset, pmic); + +- debug("do_scale_vcore: volt - %d offset_code - 0x%x\n", volt_mv, ++printf("do_scale_vcore: volt - %d offset_code - 0x%x\n", volt_mv, + offset_code); + + if (pmic->pmic_write(pmic->i2c_slave_addr, vcore_reg, offset_code)) +@@ -515,7 +515,7 @@ static u32 optimize_vcore_voltage(struct volts const *v, int opp) + return v->value[opp]; + } + +- debug("%s:efuse 0x%08x bits=%d Vnom=%d, using efuse value %d\n", ++printf("%s:efuse 0x%08x bits=%d Vnom=%d, using efuse value %d\n", + __func__, v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp], + val); + return val; +@@ -547,7 +547,7 @@ void scale_vcores(struct vcores_data const *vcores) + + for (i=0; i<(sizeof(struct vcores_data)/sizeof(struct volts)); i++) { + opp = get_voltrail_opp(i); +- debug("%d -> ", pv->value[opp]); ++printf("%d -> ", pv->value[opp]); + + if (pv->value[opp]) { + /* Handle non-empty members only */ +@@ -577,12 +577,12 @@ void scale_vcores(struct vcores_data const *vcores) + j++; + } + } +- debug("%d\n", pv->value[opp]); ++printf("%d\n", pv->value[opp]); + pv++; + } + + opp = get_voltrail_opp(VOLT_CORE); +- debug("cor: %d\n", vcores->core.value[opp]); ++printf("cor: %d\n", vcores->core.value[opp]); + do_scale_vcore(vcores->core.addr, vcores->core.value[opp], + vcores->core.pmic); + /* +@@ -596,7 +596,7 @@ void scale_vcores(struct vcores_data const *vcores) + #endif + + opp = get_voltrail_opp(VOLT_MPU); +- debug("mpu: %d\n", vcores->mpu.value[opp]); ++printf("mpu: %d\n", vcores->mpu.value[opp]); + do_scale_vcore(vcores->mpu.addr, vcores->mpu.value[opp], + vcores->mpu.pmic); + /* Configure MPU ABB LDO after scale */ +@@ -609,7 +609,7 @@ void scale_vcores(struct vcores_data const *vcores) + OMAP_ABB_FAST_OPP); + + opp = get_voltrail_opp(VOLT_MM); +- debug("mm: %d\n", vcores->mm.value[opp]); ++printf("mm: %d\n", vcores->mm.value[opp]); + do_scale_vcore(vcores->mm.addr, vcores->mm.value[opp], + vcores->mm.pmic); + /* Configure MM ABB LDO after scale */ +@@ -622,7 +622,7 @@ void scale_vcores(struct vcores_data const *vcores) + OMAP_ABB_FAST_OPP); + + opp = get_voltrail_opp(VOLT_GPU); +- debug("gpu: %d\n", vcores->gpu.value[opp]); ++printf("gpu: %d\n", vcores->gpu.value[opp]); + do_scale_vcore(vcores->gpu.addr, vcores->gpu.value[opp], + vcores->gpu.pmic); + /* Configure GPU ABB LDO after scale */ +@@ -635,7 +635,7 @@ void scale_vcores(struct vcores_data const *vcores) + OMAP_ABB_FAST_OPP); + + opp = get_voltrail_opp(VOLT_EVE); +- debug("eve: %d\n", vcores->eve.value[opp]); ++printf("eve: %d\n", vcores->eve.value[opp]); + do_scale_vcore(vcores->eve.addr, vcores->eve.value[opp], + vcores->eve.pmic); + /* Configure EVE ABB LDO after scale */ +@@ -648,7 +648,7 @@ void scale_vcores(struct vcores_data const *vcores) + OMAP_ABB_FAST_OPP); + + opp = get_voltrail_opp(VOLT_IVA); +- debug("iva: %d\n", vcores->iva.value[opp]); ++printf("iva: %d\n", vcores->iva.value[opp]); + do_scale_vcore(vcores->iva.addr, vcores->iva.value[opp], + vcores->iva.pmic); + /* Configure IVA ABB LDO after scale */ +@@ -665,7 +665,7 @@ static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode) + { + clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, + enable_mode << CD_CLKCTRL_CLKTRCTRL_SHIFT); +- debug("Enable clock domain - %x\n", clkctrl_reg); ++printf("Enable clock domain - %x\n", clkctrl_reg); + } + + static inline void disable_clock_domain(u32 const clkctrl_reg) +@@ -673,7 +673,7 @@ static inline void disable_clock_domain(u32 const clkctrl_reg) + clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, + CD_CLKCTRL_CLKTRCTRL_SW_SLEEP << + CD_CLKCTRL_CLKTRCTRL_SHIFT); +- debug("Disable clock domain - %x\n", clkctrl_reg); ++printf("Disable clock domain - %x\n", clkctrl_reg); + } + + static inline void wait_for_clk_enable(u32 clkctrl_addr) +@@ -700,7 +700,7 @@ static inline void enable_clock_module(u32 const clkctrl_addr, u32 enable_mode, + { + clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, + enable_mode << MODULE_CLKCTRL_MODULEMODE_SHIFT); +- debug("Enable clock module - %x\n", clkctrl_addr); ++printf("Enable clock module - %x\n", clkctrl_addr); + if (wait_for_enable) + wait_for_clk_enable(clkctrl_addr); + } +@@ -728,7 +728,7 @@ static inline void disable_clock_module(u32 const clkctrl_addr, + clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, + MODULE_CLKCTRL_MODULEMODE_SW_DISABLE << + MODULE_CLKCTRL_MODULEMODE_SHIFT); +- debug("Disable clock module - %x\n", clkctrl_addr); ++printf("Disable clock module - %x\n", clkctrl_addr); + if (wait_for_disable) + wait_for_clk_disable(clkctrl_addr); + } +diff --git a/arch/arm/mach-omap2/emif-common.c b/arch/arm/mach-omap2/emif-common.c +index 312f868fb..096bf329e 100644 +--- a/arch/arm/mach-omap2/emif-common.c ++++ b/arch/arm/mach-omap2/emif-common.c +@@ -68,7 +68,7 @@ static inline u32 get_mr(u32 base, u32 cs, u32 mr_addr) + mr = readl(&emif->emif_lpddr2_mode_reg_data_es2); + else + mr = readl(&emif->emif_lpddr2_mode_reg_data); +- debug("get_mr: EMIF%d cs %d mr %08x val 0x%x\n", emif_num(base), ++printf("get_mr: EMIF%d cs %d mr %08x val 0x%x\n", emif_num(base), + cs, mr_addr, mr); + if (((mr & 0x0000ff00) >> 8) == (mr & 0xff) && + ((mr & 0x00ff0000) >> 16) == (mr & 0xff) && +@@ -329,7 +329,7 @@ static void dra7_ddr3_leveling(u32 base, const struct emif_regs *regs) + /* Enable refreshes after leveling */ + clrbits_le32(&emif->emif_sdram_ref_ctrl, EMIF_REG_INITREF_DIS_MASK); + +- debug("HW leveling success\n"); ++printf("HW leveling success\n"); + /* + * Update slave ratios in EXT_PHY_CTRLx registers + * as per HW leveling output +@@ -604,7 +604,7 @@ s8 addressing_table_index(u8 type, u8 density, u8 width) + else + index = density; + +- debug("emif: addressing table index %d\n", index); ++printf("emif: addressing table index %d\n", index); + + return index; + } +@@ -639,7 +639,7 @@ static const struct lpddr2_ac_timings *get_timings_table(const struct + timings = device_timings[i]; + } + } +- debug("emif: timings table: %d\n", freq_nearest); ++printf("emif: timings table: %d\n", freq_nearest); + return timings; + } + +@@ -1093,10 +1093,10 @@ static void display_sdram_details(u32 emif_nr, u32 cs, + char density_str[10]; + u32 density; + +- debug("EMIF%d CS%d\t", emif_nr, cs); ++printf("EMIF%d CS%d\t", emif_nr, cs); + + if (!device) { +- debug("None\n"); ++printf("None\n"); + return; + } + +@@ -1110,7 +1110,7 @@ static void display_sdram_details(u32 emif_nr, u32 cs, + } else + sprintf(density_str, "%d MB", density); + if (mfg_str && type_str) +- debug("%s\t\t%s\t%s\n", mfg_str, type_str, density_str); ++printf("%s\t\t%s\t%s\n", mfg_str, type_str, density_str); + } + + static u8 is_lpddr2_sdram_present(u32 base, u32 cs, +@@ -1231,7 +1231,7 @@ static void do_sdram_init(u32 base) + const struct emif_regs *regs; + u32 in_sdram, emif_nr; + +- debug(">>do_sdram_init() %x\n", base); ++printf(">>do_sdram_init() %x\n", base); + + in_sdram = running_from_sdram(); + emif_nr = (base == EMIF1_BASE) ? 1 : 2; +@@ -1239,7 +1239,7 @@ static void do_sdram_init(u32 base) + #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS + emif_get_reg_dump(emif_nr, ®s); + if (!regs) { +- debug("EMIF: reg dump not provided\n"); ++printf("EMIF: reg dump not provided\n"); + return; + } + #else +@@ -1309,7 +1309,7 @@ static void do_sdram_init(u32 base) + /* Write to the shadow registers */ + emif_update_timings(base, regs); + +- debug("<emif_sdram_config); + +- debug(">>sdram_init()\n"); ++printf(">>sdram_init()\n"); + + if (omap_hw_init_context() == OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL) + return; + + in_sdram = running_from_sdram(); +- debug("in_sdram = %d\n", in_sdram); ++printf("in_sdram = %d\n", in_sdram); + + if (!in_sdram) { + if ((sdram_type == EMIF_SDRAM_TYPE_LPDDR2) && !warm_reset()) +@@ -1577,7 +1577,7 @@ void sdram_init(void) + size_detect, + size_prog); + } else +- debug("get_ram_size() successful"); ++printf("get_ram_size() successful"); + } + + #if defined(CONFIG_TI_SECURE_DEVICE) +@@ -1602,5 +1602,5 @@ void sdram_init(void) + do_bug0039_workaround(EMIF2_BASE); + } + +- debug("<bi_dram[bank].size >> MMU_SECTION_SHIFT; + u32 end = start + size; + +- debug("%s: bank: %d\n", __func__, bank); ++printf("%s: bank: %d\n", __func__, bank); + for (i = start; i < end; i++) + set_section_dcache(i, ARMV7_DCACHE_POLICY); + } +diff --git a/arch/arm/mach-omap2/omap3/am35x_musb.c b/arch/arm/mach-omap2/omap3/am35x_musb.c +index 1121acc00..fce5edb6a 100644 +--- a/arch/arm/mach-omap2/omap3/am35x_musb.c ++++ b/arch/arm/mach-omap2/omap3/am35x_musb.c +@@ -35,7 +35,7 @@ void am35x_musb_phy_power(struct udevice *dev, u8 on) + CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN, + CONF2_PHY_PLLON); + +- debug("Waiting for PHY clock good...\n"); ++printf("Waiting for PHY clock good...\n"); + while (!(readl(&am35x_scm_general_regs->devconf2) + & CONF2_PHYCLKGD)) { + +diff --git a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c +index 8569eff31..68e9eb242 100644 +--- a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c ++++ b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c +@@ -240,7 +240,7 @@ void __recalibrate_iodelay_end(int ret) + puts("IODELAY: Wrong Context call?\n"); + break; + default: +- debug("IODELAY: IO delay recalibration successfully completed\n"); ++printf("IODELAY: IO delay recalibration successfully completed\n"); + } + + /* If there is an error during iodelay recalibration, SoC is in a bad +diff --git a/arch/arm/mach-omap2/omap5/fdt.c b/arch/arm/mach-omap2/omap5/fdt.c +index c4162420f..c01446d5a 100644 +--- a/arch/arm/mach-omap2/omap5/fdt.c ++++ b/arch/arm/mach-omap2/omap5/fdt.c +@@ -53,7 +53,7 @@ static int ft_hs_fixup_crossbar(void *fdt, struct bd_info *bd) + path = "/ocp/crossbar"; + offs = fdt_path_offset(fdt, path); + if (offs < 0) { +- debug("Node %s not found.\n", path); ++printf("Node %s not found.\n", path); + return 0; + } + +@@ -108,7 +108,7 @@ static int ft_hs_fixup_sram(void *fdt, struct bd_info *bd) + path = "/ocp/ocmcram@40300000/sram-hs"; + offs = fdt_path_offset(fdt, path); + if (offs < 0) { +- debug("Node %s not found.\n", path); ++printf("Node %s not found.\n", path); + return 0; + } + +@@ -215,7 +215,7 @@ static int ft_fixup_clocks(void *fdt, const char **names, u32 *rates, int num) + if (offs < 0) + offs = fdt_path_offset(fdt, "/ocp/l4@4a000000/cm_core_aon@5000/clocks"); + if (offs < 0) { +- debug("Could not find cm_core_aon clocks node path offset : %s\n", ++printf("Could not find cm_core_aon clocks node path offset : %s\n", + fdt_strerror(offs)); + return offs; + } +@@ -223,14 +223,14 @@ static int ft_fixup_clocks(void *fdt, const char **names, u32 *rates, int num) + for (i = 0; i < num; i++) { + node_offs = fdt_subnode_offset(fdt, offs, names[i]); + if (node_offs < 0) { +- debug("Could not find clock sub-node %s: %s\n", ++printf("Could not find clock sub-node %s: %s\n", + names[i], fdt_strerror(node_offs)); + return offs; + } + + phandle = fdt_get_phandle(fdt, node_offs); + if (!phandle) { +- debug("Could not find phandle for clock %s\n", ++printf("Could not find phandle for clock %s\n", + names[i]); + return -1; + } +@@ -238,7 +238,7 @@ static int ft_fixup_clocks(void *fdt, const char **names, u32 *rates, int num) + ret = fdt_setprop_u32(fdt, node_offs, "assigned-clocks", + phandle); + if (ret < 0) { +- debug("Could not add assigned-clocks property to clock node %s: %s\n", ++printf("Could not add assigned-clocks property to clock node %s: %s\n", + names[i], fdt_strerror(ret)); + return ret; + } +@@ -246,7 +246,7 @@ static int ft_fixup_clocks(void *fdt, const char **names, u32 *rates, int num) + ret = fdt_setprop_u32(fdt, node_offs, "assigned-clock-rates", + rates[i]); + if (ret < 0) { +- debug("Could not add assigned-clock-rates property to clock node %s: %s\n", ++printf("Could not add assigned-clock-rates property to clock node %s: %s\n", + names[i], fdt_strerror(ret)); + return ret; + } +diff --git a/arch/arm/mach-omap2/sec-common.c b/arch/arm/mach-omap2/sec-common.c +index 0551bc125..facd67612 100644 +--- a/arch/arm/mach-omap2/sec-common.c ++++ b/arch/arm/mach-omap2/sec-common.c +@@ -152,7 +152,7 @@ int secure_boot_verify_image(void **image, size_t *size) + } + + /* Call ROM HAL API to verify certificate signature */ +- debug("%s: load_addr = %x, size = %x, sig_addr = %x\n", __func__, ++printf("%s: load_addr = %x, size = %x, sig_addr = %x\n", __func__, + cert_addr, cert_size, sig_addr); + + result = secure_rom_call( +@@ -219,7 +219,7 @@ int secure_emif_firewall_setup(uint8_t region_num, uint32_t start_addr, + * Call PPA HAL API to do any other general firewall + * configuration for regions 1-6 of the EMIF firewall. + */ +- debug("%s: regionNum = %x, startAddr = %x, size = %x", __func__, ++printf("%s: regionNum = %x, startAddr = %x, size = %x", __func__, + region_num, start_addr, size); + + result = secure_rom_call( +@@ -229,7 +229,7 @@ int secure_emif_firewall_setup(uint8_t region_num, uint32_t start_addr, + + if (result != 0) { + puts("Secure EMIF Firewall Setup failed!\n"); +- debug("Return Value = %x\n", result); ++printf("Return Value = %x\n", result); + } + + return result; +@@ -261,7 +261,7 @@ int secure_emif_reserve(void) + + if (result != 0) { + puts("SDRAM Firewall: Secure memory reservation failed!\n"); +- debug("Return Value = %x\n", result); ++printf("Return Value = %x\n", result); + } + + return result; +@@ -285,7 +285,7 @@ int secure_emif_firewall_lock(void) + + if (result != 0) { + puts("Secure EMIF Firewall Lock failed!\n"); +- debug("Return Value = %x\n", result); ++printf("Return Value = %x\n", result); + } + + return result; +@@ -330,13 +330,13 @@ int secure_tee_install(u32 addr) + unmap_sysmem(hdr); + loadptr = map_sysmem(addr, tee_file_size); + +- debug("tee_info.tee_sec_mem_start= %08X\n", tee_info.tee_sec_mem_start); +- debug("tee_info.tee_sec_mem_size = %08X\n", tee_info.tee_sec_mem_size); +- debug("tee_info.tee_jump_addr = %08X\n", tee_info.tee_jump_addr); +- debug("tee_info.tee_cert_start = %08X\n", tee_info.tee_cert_start); +- debug("tee_info.tee_cert_size = %08X\n", tee_info.tee_cert_size); +- debug("tee_info.tee_arg0 = %08X\n", tee_info.tee_arg0); +- debug("tee_file_size = %d\n", tee_file_size); ++printf("tee_info.tee_sec_mem_start= %08X\n", tee_info.tee_sec_mem_start); ++printf("tee_info.tee_sec_mem_size = %08X\n", tee_info.tee_sec_mem_size); ++printf("tee_info.tee_jump_addr = %08X\n", tee_info.tee_jump_addr); ++printf("tee_info.tee_cert_start = %08X\n", tee_info.tee_cert_start); ++printf("tee_info.tee_cert_size = %08X\n", tee_info.tee_cert_size); ++printf("tee_info.tee_arg0 = %08X\n", tee_info.tee_arg0); ++printf("tee_file_size = %d\n", tee_file_size); + + #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) + flush_dcache_range( +diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c +index 5304eb055..99ce9a2dd 100644 +--- a/arch/arm/mach-rockchip/board.c ++++ b/arch/arm/mach-rockchip/board.c +@@ -41,7 +41,7 @@ int board_init(void) + #ifdef CONFIG_DM_REGULATOR + ret = regulators_enable_boot_on(false); + if (ret) +- debug("%s: Cannot enable boot on regulator\n", __func__); ++printf("%s: Cannot enable boot on regulator\n", __func__); + #endif + + return 0; +@@ -85,7 +85,7 @@ int board_usb_init(int index, enum usb_init_type init) + node = ofnode_by_compatible(node, "snps,dwc2"); + } + if (!matched) { +- debug("Not found usb_otg device\n"); ++printf("Not found usb_otg device\n"); + return -ENODEV; + } + otg_data.regs_otg = ofnode_get_addr(node); +@@ -101,13 +101,13 @@ int board_usb_init(int index, enum usb_init_type init) + + node = ofnode_get_by_phandle(phandle); + if (!ofnode_valid(node)) { +- debug("Not found usb phy device\n"); ++printf("Not found usb phy device\n"); + return -ENODEV; + } + + phy_node = ofnode_get_parent(node); + if (!ofnode_valid(node)) { +- debug("Not found usb phy device\n"); ++printf("Not found usb phy device\n"); + return -ENODEV; + } + +diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c +index 215893415..95848f2c4 100644 +--- a/arch/arm/mach-rockchip/boot_mode.c ++++ b/arch/arm/mach-rockchip/boot_mode.c +@@ -87,18 +87,18 @@ int setup_boot_mode(void) + rockchip_dnl_mode_check(); + + boot_mode = readl(reg); +- debug("%s: boot mode 0x%08x\n", __func__, boot_mode); ++printf("%s: boot mode 0x%08x\n", __func__, boot_mode); + + /* Clear boot mode */ + writel(BOOT_NORMAL, reg); + + switch (boot_mode) { + case BOOT_FASTBOOT: +- debug("%s: enter fastboot!\n", __func__); ++printf("%s: enter fastboot!\n", __func__); + env_set("preboot", "setenv preboot; fastboot usb0"); + break; + case BOOT_UMS: +- debug("%s: enter UMS!\n", __func__); ++printf("%s: enter UMS!\n", __func__); + env_set("preboot", "setenv preboot; ums mmc 0"); + break; + } +diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c +index 87eebd987..715329d17 100644 +--- a/arch/arm/mach-rockchip/misc.c ++++ b/arch/arm/mach-rockchip/misc.c +@@ -35,13 +35,13 @@ int rockchip_setup_macaddr(void) + return 0; + + if (!cpuid) { +- debug("%s: could not retrieve 'cpuid#'\n", __func__); ++printf("%s: could not retrieve 'cpuid#'\n", __func__); + return -1; + } + + ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size); + if (ret) { +- debug("%s: failed to calculate SHA256\n", __func__); ++printf("%s: failed to calculate SHA256\n", __func__); + return -1; + } + +@@ -73,14 +73,14 @@ int rockchip_cpuid_from_efuse(const u32 cpuid_offset, + DM_DRIVER_GET(rockchip_otp), &dev); + #endif + if (ret) { +- debug("%s: could not find efuse device\n", __func__); ++printf("%s: could not find efuse device\n", __func__); + return -1; + } + + /* read the cpu_id range from the efuses */ + ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length); + if (ret) { +- debug("%s: reading cpuid from the efuses failed\n", ++printf("%s: reading cpuid from the efuses failed\n", + __func__); + return -1; + } +@@ -101,7 +101,7 @@ int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) + for (i = 0; i < 16; i++) + sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); + +- debug("cpuid: %s\n", cpuid_str); ++printf("cpuid: %s\n", cpuid_str); + + /* + * Mix the cpuid bytes using the same rules as in +diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c +index 37e88f5cc..6c3463aef 100644 +--- a/arch/arm/mach-rockchip/px30/syscon_px30.c ++++ b/arch/arm/mach-rockchip/px30/syscon_px30.c +@@ -26,7 +26,7 @@ U_BOOT_DRIVER(syscon_px30) = { + static int px30_syscon_bind_of_plat(struct udevice *dev) + { + dev->driver_data = dev->driver->of_match->data; +- debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); ++printf("syscon: %s %d\n", dev->name, (uint)dev->driver_data); + + return 0; + } +diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c +index ad8c6cd1d..4a396e46a 100644 +--- a/arch/arm/mach-rockchip/rk3188/rk3188.c ++++ b/arch/arm/mach-rockchip/rk3188/rk3188.c +@@ -120,7 +120,7 @@ static int setup_led(void) + return 0; + ret = led_get_by_label(led_name, &dev); + if (ret) { +- debug("%s: get=%d\n", __func__, ret); ++printf("%s: get=%d\n", __func__, ret); + return ret; + } + ret = led_set_state(dev, LEDST_ON); +@@ -137,7 +137,7 @@ void spl_board_init(void) + + ret = setup_led(); + if (ret) { +- debug("LED ret=%d\n", ret); ++printf("LED ret=%d\n", ret); + hang(); + } + } +diff --git a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c +index 917ff37c0..c31a487d6 100644 +--- a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c ++++ b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c +@@ -27,7 +27,7 @@ U_BOOT_DRIVER(syscon_rk3188) = { + static int rk3188_syscon_bind_of_plat(struct udevice *dev) + { + dev->driver_data = dev->driver->of_match->data; +- debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); ++printf("syscon: %s %d\n", dev->name, (uint)dev->driver_data); + + return 0; + } +diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c +index bc20bc5ab..e2cc59468 100644 +--- a/arch/arm/mach-rockchip/rk3288/rk3288.c ++++ b/arch/arm/mach-rockchip/rk3288/rk3288.c +@@ -125,7 +125,7 @@ static int ft_rk3288w_setup(void *blob) + path = "/clock-controller@ff760000"; + offs = fdt_path_offset(blob, path); + if (offs < 0) { +- debug("failed to found fdt path %s\n", path); ++printf("failed to found fdt path %s\n", path); + return offs; + } + +diff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c +index 9c1ae880c..b22e70737 100644 +--- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c ++++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c +@@ -28,7 +28,7 @@ U_BOOT_DRIVER(syscon_rk3288) = { + static int rk3288_syscon_bind_of_plat(struct udevice *dev) + { + dev->driver_data = dev->driver->of_match->data; +- debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); ++printf("syscon: %s %d\n", dev->name, (uint)dev->driver_data); + + return 0; + } +diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c +index dc2d831dd..80bfef306 100644 +--- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c ++++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c +@@ -33,7 +33,7 @@ U_BOOT_DRIVER(syscon_rk3368) = { + static int rk3368_syscon_bind_of_plat(struct udevice *dev) + { + dev->driver_data = dev->driver->of_match->data; +- debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); ++printf("syscon: %s %d\n", dev->name, (uint)dev->driver_data); + + return 0; + } +diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c +index 869d2159b..866c6d865 100644 +--- a/arch/arm/mach-rockchip/rk3399/rk3399.c ++++ b/arch/arm/mach-rockchip/rk3399/rk3399.c +@@ -224,17 +224,17 @@ static void rk3399_force_power_on_reset(void) + ofnode node; + struct gpio_desc sysreset_gpio; + +- debug("%s: trying to force a power-on reset\n", __func__); ++printf("%s: trying to force a power-on reset\n", __func__); + + node = ofnode_path("/config"); + if (!ofnode_valid(node)) { +- debug("%s: no /config node?\n", __func__); ++printf("%s: no /config node?\n", __func__); + return; + } + + if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0, + &sysreset_gpio, GPIOD_IS_OUT)) { +- debug("%s: could not find a /config/sysreset-gpio\n", __func__); ++printf("%s: could not find a /config/sysreset-gpio\n", __func__); + return; + } + +@@ -278,7 +278,7 @@ void spl_board_init(void) + * BIOS_ENABLE) signal is done through a always-on regulator). + */ + if (regulators_enable_boot_on(false)) +- debug("%s: Cannot enable boot on regulator\n", __func__); ++printf("%s: Cannot enable boot on regulator\n", __func__); + #endif + } + #endif +diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +index b360ca7dd..ba0c6dc97 100644 +--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c ++++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +@@ -31,7 +31,7 @@ U_BOOT_DRIVER(syscon_rk3399) = { + static int rk3399_syscon_bind_of_plat(struct udevice *dev) + { + dev->driver_data = dev->driver->of_match->data; +- debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); ++printf("syscon: %s %d\n", dev->name, (uint)dev->driver_data); + + return 0; + } +diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c +index 28c379ef0..4efb8af25 100644 +--- a/arch/arm/mach-rockchip/sdram.c ++++ b/arch/arm/mach-rockchip/sdram.c +@@ -90,7 +90,7 @@ size_t rockchip_sdram_size(phys_addr_t reg) + & SYS_REG_NUM_CH_MASK); + + dram_type = (sys_reg2 >> SYS_REG_DDRTYPE_SHIFT) & SYS_REG_DDRTYPE_MASK; +- debug("%s %x %x\n", __func__, (u32)reg, sys_reg2); ++printf("%s %x %x\n", __func__, (u32)reg, sys_reg2); + for (ch = 0; ch < ch_num; ch++) { + rank = 1 + (sys_reg2 >> SYS_REG_RANK_SHIFT(ch) & + SYS_REG_RANK_MASK); +@@ -150,12 +150,12 @@ size_t rockchip_sdram_size(phys_addr_t reg) + chipsize_mb = chipsize_mb * 3 / 4; + size_mb += chipsize_mb; + if (rank > 1) +- debug("rank %d cs0_col %d cs1_col %d bk %d cs0_row %d\ ++printf("rank %d cs0_col %d cs1_col %d bk %d cs0_row %d\ + cs1_row %d bw %d row_3_4 %d\n", + rank, cs0_col, cs1_col, bk, cs0_row, + cs1_row, bw, row_3_4); + else +- debug("rank %d cs0_col %d bk %d cs0_row %d\ ++printf("rank %d cs0_col %d bk %d cs0_row %d\ + bw %d row_3_4 %d\n", + rank, cs0_col, bk, cs0_row, + bw, row_3_4); +@@ -190,16 +190,16 @@ int dram_init(void) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + return ret; + } + ret = ram_get_info(dev, &ram); + if (ret) { +- debug("Cannot get DRAM size: %d\n", ret); ++printf("Cannot get DRAM size: %d\n", ret); + return ret; + } + gd->ram_size = ram.size; +- debug("SDRAM base=%lx, size=%lx\n", ++printf("SDRAM base=%lx, size=%lx\n", + (unsigned long)ram.base, (unsigned long)ram.size); + + return 0; +diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c +index 93b8e7de4..afd0004b8 100644 +--- a/arch/arm/mach-rockchip/spl-boot-order.c ++++ b/arch/arm/mach-rockchip/spl-boot-order.c +@@ -94,7 +94,7 @@ static int spl_node_to_boot_device(int node) + */ + __weak const char *board_spl_was_booted_from(void) + { +- debug("%s: no support for 'same-as-spl' for this board\n", __func__); ++printf("%s: no support for 'same-as-spl' for this board\n", __func__); + return NULL; + } + +@@ -115,7 +115,7 @@ void board_boot_order(u32 *spl_boot_list) + const char *conf; + + if (chosen_node < 0) { +- debug("%s: /chosen not found, using spl_boot_device()\n", ++printf("%s: /chosen not found, using spl_boot_device()\n", + __func__); + spl_boot_list[0] = spl_boot_device(); + return; +@@ -142,14 +142,14 @@ void board_boot_order(u32 *spl_boot_list) + /* Try to resolve the config item (or alias) as a path */ + node = fdt_path_offset(blob, conf); + if (node < 0) { +- debug("%s: could not find %s in FDT\n", __func__, conf); ++printf("%s: could not find %s in FDT\n", __func__, conf); + continue; + } + + /* Try to map this back onto SPL boot devices */ + boot_device = spl_node_to_boot_device(node); + if (boot_device < 0) { +- debug("%s: could not map node @%x to a boot-device\n", ++printf("%s: could not map node @%x to a boot-device\n", + __func__, node); + continue; + } +diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c +index 02c40fb37..08aeb57c2 100644 +--- a/arch/arm/mach-rockchip/spl.c ++++ b/arch/arm/mach-rockchip/spl.c +@@ -39,10 +39,10 @@ const char *board_spl_was_booted_from(void) + bootdevice_ofpath = boot_devices[bootdevice_brom_id]; + + if (bootdevice_ofpath) +- debug("%s: brom_bootdevice_id %x maps to '%s'\n", ++printf("%s: brom_bootdevice_id %x maps to '%s'\n", + __func__, bootdevice_brom_id, bootdevice_ofpath); + else +- debug("%s: failed to resolve brom_bootdevice_id %x\n", ++printf("%s: failed to resolve brom_bootdevice_id %x\n", + __func__, bootdevice_brom_id); + + return bootdevice_ofpath; +@@ -121,7 +121,7 @@ void board_init_f(ulong dummy) + * printascii("string"); + */ + debug_uart_init(); +- debug("\nspl:debug uart enabled in %s\n", __func__); ++printf("\nspl:debug uart enabled in %s\n", __func__); + #endif + + board_early_init_f(); +@@ -140,7 +140,7 @@ void board_init_f(ulong dummy) + timer_init(); + #endif + #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_RAM) +- debug("\nspl:init dram\n"); ++printf("\nspl:init dram\n"); + ret = dram_init(); + if (ret) { + printf("DRAM init failed: %d\n", ret); +diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c +index cc908e1b0..20f30237a 100644 +--- a/arch/arm/mach-rockchip/tpl.c ++++ b/arch/arm/mach-rockchip/tpl.c +@@ -65,7 +65,7 @@ void board_init_f(ulong dummy) + #endif + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + +diff --git a/arch/arm/mach-snapdragon/dram.c b/arch/arm/mach-snapdragon/dram.c +index 2a161be13..1931d10bc 100644 +--- a/arch/arm/mach-snapdragon/dram.c ++++ b/arch/arm/mach-snapdragon/dram.c +@@ -80,7 +80,7 @@ int msm_fixup_memory(void *blob) + if (p->category == CATEGORY_SDRAM && p->type == TYPE_SYSMEM) { + bank_start[count] = p->start; + bank_size[count] = p->size; +- debug("Detected memory bank %u: start: 0x%llx size: 0x%llx\n", ++printf("Detected memory bank %u: start: 0x%llx size: 0x%llx\n", + count, p->start, p->size); + count++; + } +diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c +index 650122fcd..ca8f3c9ea 100644 +--- a/arch/arm/mach-socfpga/board.c ++++ b/arch/arm/mach-socfpga/board.c +@@ -96,7 +96,7 @@ int g_dnl_board_usb_cable_connected(void) + __weak int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -127,7 +127,7 @@ void board_prep_linux(bootm_headers_t *images) + } + + env_set_hex("fdt_addr", (ulong)images->ft_addr); +- debug("images->ft_addr = 0x%08lx\n", (ulong)images->ft_addr); ++printf("images->ft_addr = 0x%08lx\n", (ulong)images->ft_addr); + } + + if (IS_ENABLED(CONFIG_CADENCE_QSPI)) { +diff --git a/arch/arm/mach-socfpga/clock_manager_agilex.c b/arch/arm/mach-socfpga/clock_manager_agilex.c +index e035c09aa..62d09de33 100644 +--- a/arch/arm/mach-socfpga/clock_manager_agilex.c ++++ b/arch/arm/mach-socfpga/clock_manager_agilex.c +@@ -42,7 +42,7 @@ static ulong cm_get_rate_dm(u32 id) + if ((rate == (unsigned long)-ENOSYS) || + (rate == (unsigned long)-ENXIO) || + (rate == (unsigned long)-EIO)) { +- debug("%s id %u: clk_get_rate err: %ld\n", ++printf("%s id %u: clk_get_rate err: %ld\n", + __func__, id, rate); + return 0; + } +diff --git a/arch/arm/mach-socfpga/pinmux_arria10.c b/arch/arm/mach-socfpga/pinmux_arria10.c +index f378fce7f..60efdd8dc 100644 +--- a/arch/arm/mach-socfpga/pinmux_arria10.c ++++ b/arch/arm/mach-socfpga/pinmux_arria10.c +@@ -23,11 +23,11 @@ static int do_pinctr_pin(const void *blob, int child, const char *node_name) + if (!cell || len <= 0) + return -EFAULT; + +- debug("%p %d\n", cell, len); ++printf("%p %d\n", cell, len); + for (; len > 0; len -= (2 * sizeof(u32))) { + offset = fdt32_to_cpu(*cell++); + value = fdt32_to_cpu(*cell++); +- debug("<0x%x 0x%x>\n", offset, value); ++printf("<0x%x 0x%x>\n", offset, value); + writel(value, base_addr + offset); + } + return 0; +diff --git a/arch/arm/mach-socfpga/secure_vab.c b/arch/arm/mach-socfpga/secure_vab.c +index e2db58850..12cf7334e 100644 +--- a/arch/arm/mach-socfpga/secure_vab.c ++++ b/arch/arm/mach-socfpga/secure_vab.c +@@ -65,11 +65,11 @@ int socfpga_vendor_authentication(void **p_image, size_t *p_size) + + img_addr = (uintptr_t)*p_image; + +- debug("Authenticating image at address 0x%016llx (%ld bytes)\n", ++printf("Authenticating image at address 0x%016llx (%ld bytes)\n", + img_addr, *p_size); + + img_sz = get_img_size((u8 *)img_addr, *p_size); +- debug("img_sz = %ld\n", img_sz); ++printf("img_sz = %ld\n", img_sz); + + if (!img_sz) { + puts("VAB certificate not found in image!\n"); +@@ -101,8 +101,8 @@ int socfpga_vendor_authentication(void **p_image, size_t *p_size) + /* Size in word (32bits) */ + mbox_data_sz = (ALIGN(*p_size - img_sz, sizeof(u32))) >> 2; + +- debug("mbox_data_addr = 0x%016llx\n", mbox_data_addr); +- debug("mbox_data_sz = %ld words\n", mbox_data_sz); ++printf("mbox_data_addr = 0x%016llx\n", mbox_data_addr); ++printf("mbox_data_sz = %ld words\n", mbox_data_sz); + + /* + * Relocate certificate to first memory block before trigger SMC call +@@ -118,7 +118,7 @@ int socfpga_vendor_authentication(void **p_image, size_t *p_size) + memcpy(mbox_relocate_data_addr, (u8 *)mbox_data_addr, mbox_data_sz * sizeof(u32)); + *(u32 *)mbox_relocate_data_addr = 0; + +- debug("mbox_relocate_data_addr = 0x%p\n", mbox_relocate_data_addr); ++printf("mbox_relocate_data_addr = 0x%p\n", mbox_relocate_data_addr); + + do { + if (!IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_SPL_ATF)) { +@@ -146,7 +146,7 @@ int socfpga_vendor_authentication(void **p_image, size_t *p_size) + /* Exclude the size of the VAB certificate from image size */ + *p_size = img_sz; + +- debug("ret = 0x%08x, resp = 0x%08x, resp_len = %d\n", ret, resp, ++printf("ret = 0x%08x, resp = 0x%08x, resp_len = %d\n", ret, resp, + resp_len); + + if (ret) { +diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c +index ee5a9dc1e..f58e56bde 100644 +--- a/arch/arm/mach-socfpga/spl_agilex.c ++++ b/arch/arm/mach-socfpga/spl_agilex.c +@@ -56,7 +56,7 @@ void board_init_f(ulong dummy) + + ret = uclass_get_device(UCLASS_CLK, 0, &dev); + if (ret) { +- debug("Clock init failed: %d\n", ret); ++printf("Clock init failed: %d\n", ret); + hang(); + } + +@@ -67,14 +67,14 @@ void board_init_f(ulong dummy) + firewall_setup(); + ret = uclass_get_device(UCLASS_CACHE, 0, &dev); + if (ret) { +- debug("CCU init failed: %d\n", ret); ++printf("CCU init failed: %d\n", ret); + hang(); + } + + #if CONFIG_IS_ENABLED(ALTERA_SDRAM) + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + hang(); + } + #endif +diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c +index 7c7161176..b172a3af7 100644 +--- a/arch/arm/mach-socfpga/spl_gen5.c ++++ b/arch/arm/mach-socfpga/spl_gen5.c +@@ -91,7 +91,7 @@ void board_init_f(ulong dummy) + socfpga_sdram_remap_zero(); + socfpga_pl310_clear(); + +- debug("Freezing all I/O banks\n"); ++printf("Freezing all I/O banks\n"); + /* freeze all IO banks */ + sys_mgr_frzctrl_freeze_req(); + +@@ -106,7 +106,7 @@ void board_init_f(ulong dummy) + socfpga_per_reset(SOCFPGA_RESET(OSC1TIMER0), 0); + timer_init(); + +- debug("Reconfigure Clock Manager\n"); ++printf("Reconfigure Clock Manager\n"); + /* reconfigure the PLLs */ + if (cm_basic_init(cm_default_cfg)) + hang(); +@@ -128,7 +128,7 @@ void board_init_f(ulong dummy) + /* Set bridges handoff value */ + socfpga_bridges_set_handoff_regs(true, true, true); + +- debug("Unfreezing/Thaw all I/O banks\n"); ++printf("Unfreezing/Thaw all I/O banks\n"); + /* unfreeze / thaw all IO banks */ + sys_mgr_frzctrl_thaw_req(); + +@@ -139,7 +139,7 @@ void board_init_f(ulong dummy) + + ret = uclass_get_device(UCLASS_RESET, 0, &dev); + if (ret) +- debug("Reset init failed: %d\n", ret); ++printf("Reset init failed: %d\n", ret); + + #ifdef CONFIG_SPL_NAND_DENALI + clrbits_le32(SOCFPGA_RSTMGR_ADDRESS + RSTMGR_GEN5_PERMODRST, BIT(4)); +@@ -150,7 +150,7 @@ void board_init_f(ulong dummy) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + hang(); + } + } +diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c +index c20e87cdb..5f980dcf8 100644 +--- a/arch/arm/mach-socfpga/spl_s10.c ++++ b/arch/arm/mach-socfpga/spl_s10.c +@@ -81,7 +81,7 @@ void board_init_f(ulong dummy) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + hang(); + } + #endif +diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c b/arch/arm/mach-socfpga/wrap_handoff_soc64.c +index a7ad7a18e..3bc24ea5a 100644 +--- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c ++++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c +@@ -20,7 +20,7 @@ int socfpga_get_handoff_size(void *handoff_address, enum endianness endian) + + size = (size - SOC64_HANDOFF_OFFSET_DATA) / sizeof(u32); + +- debug("%s: handoff address = 0x%p handoff size = 0x%08x\n", __func__, ++printf("%s: handoff address = 0x%p handoff size = 0x%08x\n", __func__, + (u32 *)handoff_address, size); + + return size; +@@ -32,13 +32,13 @@ int socfpga_handoff_read(void *handoff_address, void *table, u32 table_len, + u32 temp, i; + u32 *table_x32 = table; + +- debug("%s: handoff addr = 0x%p ", __func__, (u32 *)handoff_address); ++printf("%s: handoff addr = 0x%p ", __func__, (u32 *)handoff_address); + + if (big_endian) { + if (swab32(readl(SOC64_HANDOFF_BASE)) == SOC64_HANDOFF_MAGIC_BOOT) { +- debug("Handoff table address = 0x%p ", table_x32); +- debug("table length = 0x%x\n", table_len); +- debug("%s: handoff data =\n{\n", __func__); ++printf("Handoff table address = 0x%p ", table_x32); ++printf("table length = 0x%x\n", table_len); ++printf("%s: handoff data =\n{\n", __func__); + + for (i = 0; i < table_len; i++) { + temp = readl(handoff_address + +@@ -47,17 +47,17 @@ int socfpga_handoff_read(void *handoff_address, void *table, u32 table_len, + *table_x32 = swab32(temp); + + if (!(i % 2)) +- debug(" No.%d Addr 0x%08x: ", i, ++printf(" No.%d Addr 0x%08x: ", i, + *table_x32); + else +- debug(" 0x%08x\n", *table_x32); ++printf(" 0x%08x\n", *table_x32); + + table_x32++; + } +- debug("\n}\n"); ++printf("\n}\n"); + } else { +- debug("%s: Cannot find SOC64_HANDOFF_MAGIC_BOOT ", __func__); +- debug("at addr 0x%p\n", (u32 *)handoff_address); ++printf("%s: Cannot find SOC64_HANDOFF_MAGIC_BOOT ", __func__); ++printf("at addr 0x%p\n", (u32 *)handoff_address); + return -EPERM; + } + } +diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c +index 32ec0bc4c..f174127fc 100644 +--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c ++++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c +@@ -113,7 +113,7 @@ inline void mbus_configure_port(u8 port, + | (bwl0 << 16) ); + const u32 cfg1 = ((u32)bwl2 << 16) | (bwl1 & 0xffff); + +- debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); ++printf("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); + writel(cfg0, &mctl_com->master[port].cfg0); + writel(cfg1, &mctl_com->master[port].cfg1); + } +@@ -530,11 +530,11 @@ static bool mctl_channel_init(struct dram_para *para) + + if (readl(&mctl_phy->pgsr[0]) & 0xff00000) { + /* Oops! There's something wrong! */ +- debug("PLL = %x\n", readl(0x3001010)); +- debug("DRAM PHY PGSR0 = %x\n", readl(&mctl_phy->pgsr[0])); ++printf("PLL = %x\n", readl(0x3001010)); ++printf("DRAM PHY PGSR0 = %x\n", readl(&mctl_phy->pgsr[0])); + for (i = 0; i < 4; i++) +- debug("DRAM PHY DX%dRSR0 = %x\n", i, readl(&mctl_phy->dx[i].rsr[0])); +- debug("Error while initializing DRAM PHY!\n"); ++printf("DRAM PHY DX%dRSR0 = %x\n", i, readl(&mctl_phy->dx[i].rsr[0])); ++printf("Error while initializing DRAM PHY!\n"); + + return false; + } +@@ -574,25 +574,25 @@ static void mctl_auto_detect_rank_width(struct dram_para *para) + * visible. + */ + +- debug("testing 32-bit width, rank = 2\n"); ++printf("testing 32-bit width, rank = 2\n"); + para->bus_full_width = 1; + para->ranks = 2; + if (mctl_core_init(para)) + return; + +- debug("testing 32-bit width, rank = 1\n"); ++printf("testing 32-bit width, rank = 1\n"); + para->bus_full_width = 1; + para->ranks = 1; + if (mctl_core_init(para)) + return; + +- debug("testing 16-bit width, rank = 2\n"); ++printf("testing 16-bit width, rank = 2\n"); + para->bus_full_width = 0; + para->ranks = 2; + if (mctl_core_init(para)) + return; + +- debug("testing 16-bit width, rank = 1\n"); ++printf("testing 16-bit width, rank = 1\n"); + para->bus_full_width = 0; + para->ranks = 1; + if (mctl_core_init(para)) +diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c +index 205c78bb6..beb61af8c 100644 +--- a/arch/arm/mach-sunxi/dram_sun50i_h616.c ++++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c +@@ -49,7 +49,7 @@ inline void mbus_configure_port(u8 port, + | (bwl0 << 16) ); + const u32 cfg1 = ((u32)bwl2 << 16) | (bwl1 & 0xffff); + +- debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); ++printf("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); + writel_relaxed(cfg0, &mctl_com->master[port].cfg0); + writel_relaxed(cfg1, &mctl_com->master[port].cfg1); + } +@@ -1063,7 +1063,7 @@ static bool mctl_phy_init(struct dram_para *para) + if (mctl_phy_write_leveling(para)) + break; + if (i == 5) { +- debug("write leveling failed!\n"); ++printf("write leveling failed!\n"); + return false; + } + } +@@ -1073,7 +1073,7 @@ static bool mctl_phy_init(struct dram_para *para) + if (mctl_phy_read_calibration(para)) + break; + if (i == 5) { +- debug("read calibration failed!\n"); ++printf("read calibration failed!\n"); + return false; + } + } +@@ -1083,7 +1083,7 @@ static bool mctl_phy_init(struct dram_para *para) + if (mctl_phy_read_training(para)) + break; + if (i == 5) { +- debug("read training failed!\n"); ++printf("read training failed!\n"); + return false; + } + } +@@ -1093,7 +1093,7 @@ static bool mctl_phy_init(struct dram_para *para) + if (mctl_phy_write_training(para)) + break; + if (i == 5) { +- debug("write training failed!\n"); ++printf("write training failed!\n"); + return false; + } + } +@@ -1230,25 +1230,25 @@ static void mctl_auto_detect_rank_width(struct dram_para *para) + * visible. + */ + +- debug("testing 32-bit width, rank = 2\n"); ++printf("testing 32-bit width, rank = 2\n"); + para->bus_full_width = 1; + para->ranks = 2; + if (mctl_core_init(para)) + return; + +- debug("testing 32-bit width, rank = 1\n"); ++printf("testing 32-bit width, rank = 1\n"); + para->bus_full_width = 1; + para->ranks = 1; + if (mctl_core_init(para)) + return; + +- debug("testing 16-bit width, rank = 2\n"); ++printf("testing 16-bit width, rank = 2\n"); + para->bus_full_width = 0; + para->ranks = 2; + if (mctl_core_init(para)) + return; + +- debug("testing 16-bit width, rank = 1\n"); ++printf("testing 16-bit width, rank = 1\n"); + para->bus_full_width = 0; + para->ranks = 1; + if (mctl_core_init(para)) +diff --git a/arch/arm/mach-sunxi/dram_sun9i.c b/arch/arm/mach-sunxi/dram_sun9i.c +index 14be212e8..db2628a5b 100644 +--- a/arch/arm/mach-sunxi/dram_sun9i.c ++++ b/arch/arm/mach-sunxi/dram_sun9i.c +@@ -204,7 +204,7 @@ static void mctl_sys_init(void) + struct sunxi_mctl_com_reg * const mctl_com = + (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; + +- debug("Setting PLL6 to %d\n", DRAM_CLK * 2); ++printf("Setting PLL6 to %d\n", DRAM_CLK * 2); + clock_set_pll6(DRAM_CLK * 2); + + /* Original dram init code which may come in handy later +@@ -288,12 +288,12 @@ static void mctl_sys_init(void) + mctl_ctl_sched_init(SUNXI_DRAM_CTL1_BASE); + sdelay(1000); + +- debug("2\n"); ++printf("2\n"); + + /* (3 << 12): PLL_DDR */ + writel((3 << 12) | (1 << 16), &ccm->dram_clk_cfg); + do { +- debug("Waiting for DRAM_CLK_CFG\n"); ++printf("Waiting for DRAM_CLK_CFG\n"); + sdelay(10000); + } while (readl(&ccm->dram_clk_cfg) & (1 << 16)); + setbits_le32(&ccm->dram_clk_cfg, (1 << 31)); +@@ -351,7 +351,7 @@ static void mctl_com_init(struct dram_sun9i_para *para) + | MCTL_CR_PAGE_SIZE(para->page_size) | MCTL_CR_RANK(para->rank), + &mctl_com->cr); + +- debug("CR: %d\n", readl(&mctl_com->cr)); ++printf("CR: %d\n", readl(&mctl_com->cr)); + } + + static u32 mctl_channel_init(u32 ch_index, struct dram_sun9i_para *para) +@@ -439,7 +439,7 @@ static u32 mctl_channel_init(u32 ch_index, struct dram_sun9i_para *para) + CL = para->cl_cwl_table[i].CL; + CWL = para->cl_cwl_table[i].CWL; + +- debug("found CL/CWL: CL = %d, CWL = %d\n", CL, CWL); ++printf("found CL/CWL: CL = %d, CWL = %d\n", CL, CWL); + break; + } + } +@@ -691,7 +691,7 @@ static u32 mctl_channel_init(u32 ch_index, struct dram_sun9i_para *para) + &mctl_phy->dtcr); + + /* TODO: half width */ +- debug("DX2GCR0 reset: 0x%x\n", readl(&mctl_phy->dx[2].gcr[0])); ++printf("DX2GCR0 reset: 0x%x\n", readl(&mctl_phy->dx[2].gcr[0])); + writel(0x7C000285, &mctl_phy->dx[2].gcr[0]); + writel(0x7C000285, &mctl_phy->dx[3].gcr[0]); + +@@ -758,7 +758,7 @@ static u32 mctl_channel_init(u32 ch_index, struct dram_sun9i_para *para) + /* Wait for the INIT bit to clear itself... */ + while ((readl(&mctl_phy->pir) & MCTL_PIR_INIT) != MCTL_PIR_INIT) { + /* not done yet -- keep spinning */ +- debug("MCTL_PIR_INIT not set\n"); ++printf("MCTL_PIR_INIT not set\n"); + sdelay(1000); + /* TODO: implement timeout */ + } +@@ -792,33 +792,33 @@ static u32 mctl_channel_init(u32 ch_index, struct dram_sun9i_para *para) + + /* check if any errors are set */ + if (readl(&mctl_phy->pgsr[0]) & MCTL_PGSR0_ERRORS) { +- debug("Channel %d unavailable!\n", ch_index); ++printf("Channel %d unavailable!\n", ch_index); + return 0; + } else{ + /* initial OK */ +- debug("Channel %d OK!\n", ch_index); ++printf("Channel %d OK!\n", ch_index); + /* return 1; */ + } + + while ((readl(&mctl_ctl->stat) & 0x1) != 0x1) { +- debug("Waiting for INIT to be done (controller to come up into 'normal operating' mode\n"); ++printf("Waiting for INIT to be done (controller to come up into 'normal operating' mode\n"); + sdelay(100000); + /* init not done */ + /* TODO: implement time-out */ + } +- debug("done\n"); ++printf("done\n"); + + /* "DDR is controller by contoller" */ + clrbits_le32(&mctl_phy->pgcr[3], (1 << 25)); + + /* TODO: is the following necessary? */ +- debug("DFIMISC before writing 0: 0x%x\n", readl(&mctl_ctl->dfimisc)); ++printf("DFIMISC before writing 0: 0x%x\n", readl(&mctl_ctl->dfimisc)); + writel(0, &mctl_ctl->dfimisc); + + /* Enable auto-refresh */ + clrbits_le32(&mctl_ctl->rfshctl3, MCTL_RFSHCTL3_DIS_AUTO_REFRESH); + +- debug("channel_init complete\n"); ++printf("channel_init complete\n"); + return 1; + } + +diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c +index 9107b114d..44829edde 100644 +--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c ++++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c +@@ -102,7 +102,7 @@ static inline void mbus_configure_port(u8 port, + | (bwl0 << 16) ); + const u32 cfg1 = ((u32)bwl2 << 16) | (bwl1 & 0xffff); + +- debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); ++printf("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); + writel(cfg0, &mctl_com->mcr[port][0]); + writel(cfg1, &mctl_com->mcr[port][1]); + } +diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c +index 53b7c0324..6e257b799 100644 +--- a/arch/arm/mach-sunxi/spl_spi_sunxi.c ++++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c +@@ -343,7 +343,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + +- debug("Found FIT image\n"); ++printf("Found FIT image\n"); + load.dev = NULL; + load.priv = NULL; + load.filename = NULL; +diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c +index 532730fe7..ce1abd925 100644 +--- a/arch/arm/mach-tegra/ap.c ++++ b/arch/arm/mach-tegra/ap.c +@@ -32,7 +32,7 @@ int tegra_get_chip(void) + * Tegra30, 0x35 for T114, and 0x40 for Tegra124. + */ + rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT; +- debug("%s: CHIPID is 0x%02X\n", __func__, rev); ++printf("%s: CHIPID is 0x%02X\n", __func__, rev); + + return rev; + } +@@ -43,7 +43,7 @@ int tegra_get_sku_info(void) + struct fuse_regs *fuse = (struct fuse_regs *)NV_PA_FUSE_BASE; + + sku_id = readl(&fuse->sku_info) & 0xff; +- debug("%s: SKU info byte is 0x%02X\n", __func__, sku_id); ++printf("%s: SKU info byte is 0x%02X\n", __func__, sku_id); + + return sku_id; + } +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index 95d6555a0..d595c124c 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -104,10 +104,10 @@ static phys_size_t query_sdram_size(void) + + emem_cfg = readl(&mc->mc_emem_cfg); + #if defined(CONFIG_TEGRA20) +- debug("mc->mc_emem_cfg (MEM_SIZE_KB) = 0x%08x\n", emem_cfg); ++printf("mc->mc_emem_cfg (MEM_SIZE_KB) = 0x%08x\n", emem_cfg); + size_bytes = get_ram_size((void *)PHYS_SDRAM_1, emem_cfg * 1024); + #else +- debug("mc->mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n", emem_cfg); ++printf("mc->mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n", emem_cfg); + #ifndef CONFIG_PHYS_64BIT + /* + * If >=4GB RAM is present, the byte RAM size won't fit into 32-bits +diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c +index 8950e678a..c9a728885 100644 +--- a/arch/arm/mach-tegra/board2.c ++++ b/arch/arm/mach-tegra/board2.c +@@ -145,11 +145,11 @@ int board_init(void) + #ifdef CONFIG_SYS_I2C_TEGRA + # ifdef CONFIG_TEGRA_PMU + if (pmu_set_nominal()) +- debug("Failed to select nominal voltages\n"); ++printf("Failed to select nominal voltages\n"); + # ifdef CONFIG_TEGRA_CLOCK_SCALING + err = board_emc_init(); + if (err) +- debug("Memory controller init failed: %d\n", err); ++printf("Memory controller init failed: %d\n", err); + # endif + # endif /* CONFIG_TEGRA_PMU */ + #endif /* CONFIG_SYS_I2C_TEGRA */ +@@ -162,7 +162,7 @@ int board_init(void) + board_id = tegra_board_id(); + err = tegra_lcd_pmic_init(board_id); + if (err) { +- debug("Failed to set up LCD PMIC\n"); ++printf("Failed to set up LCD PMIC\n"); + return err; + } + #endif +diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c +index 55eb81986..2d4985790 100644 +--- a/arch/arm/mach-tegra/cboot.c ++++ b/arch/arm/mach-tegra/cboot.c +@@ -116,7 +116,7 @@ int cboot_dram_init(void) + prop += ns; + gd->ram_size += bank_size; + bank_end = bank_start + bank_size; +- debug("Bank %d: %llx..%llx (+%llx)\n", i, ++printf("Bank %d: %llx..%llx (+%llx)\n", i, + bank_start, bank_end, bank_size); + + /* +@@ -129,7 +129,7 @@ int cboot_dram_init(void) + bank_start = ROUND(bank_start, SZ_2M); + bank_end = bank_end & ~(SZ_2M - 1); + bank_size = bank_end - bank_start; +- debug(" aligned: %llx..%llx (+%llx)\n", ++printf(" aligned: %llx..%llx (+%llx)\n", + bank_start, bank_end, bank_size); + if (bank_end <= bank_start) + continue; +@@ -146,14 +146,14 @@ int cboot_dram_init(void) + /* Determine best bank to relocate U-Boot into */ + if (bank_end > SZ_4G) + bank_end = SZ_4G; +- debug(" end %llx (usable)\n", bank_end); ++printf(" end %llx (usable)\n", bank_end); + usable_bank_size = bank_end - bank_start; +- debug(" size %llx (usable)\n", usable_bank_size); ++printf(" size %llx (usable)\n", usable_bank_size); + if ((usable_bank_size >= MIN_USABLE_RAM_SIZE) && + (bank_end > ram_top)) { + ram_top = bank_end; + region_base = bank_start; +- debug("ram top now %llx\n", ram_top); ++printf("ram top now %llx\n", ram_top); + } + } + +@@ -320,7 +320,7 @@ static void set_calculated_aliases(char *aliases, u64 address) + alias = strsep(&tmp, " "); + if (!alias) + break; +- debug("%s: alias: %s\n", __func__, alias); ++printf("%s: alias: %s\n", __func__, alias); + err = env_set_hex(alias, address); + if (err) + pr_err("Could not set %s\n", alias); +@@ -367,17 +367,17 @@ static void set_calculated_env_var(const char *var) + offset = env_get_hex(var_offset, 0); + aliases = env_get(var_aliases); + +- debug("%s: Calc var %s; size=%llx, align=%llx, offset=%llx\n", ++printf("%s: Calc var %s; size=%llx, align=%llx, offset=%llx\n", + __func__, var, size, align, offset); + if (aliases) +- debug("%s: Aliases: %s\n", __func__, aliases); ++printf("%s: Aliases: %s\n", __func__, aliases); + + address = alloc_ram(size, align, offset); + if (!address) { + pr_err("Could not allocate %s\n", var); + goto out_free_var_aliases; + } +- debug("%s: Address %llx\n", __func__, address); ++printf("%s: Address %llx\n", __func__, address); + + err = env_set_hex(var, address); + if (err) +@@ -431,7 +431,7 @@ static void set_calculated_env_vars(void) + + vars = env_get("calculated_vars"); + if (!vars) { +- debug("%s: No env var calculated_vars\n", __func__); ++printf("%s: No env var calculated_vars\n", __func__); + return; + } + +@@ -446,7 +446,7 @@ static void set_calculated_env_vars(void) + var = strsep(&tmp, " "); + if (!var) + break; +- debug("%s: var: %s\n", __func__, var); ++printf("%s: var: %s\n", __func__, var); + set_calculated_env_var(var); + #ifdef DEBUG + printf("RAM banks after allocating %s:\n", var); +@@ -508,7 +508,7 @@ static int cboot_get_ethaddr_legacy(const void *fdt, uint8_t mac[ETH_ALEN]) + return -EINVAL; + } + +- debug("Legacy MAC address: %pM\n", mac); ++printf("Legacy MAC address: %pM\n", mac); + + return 0; + } +@@ -525,7 +525,7 @@ int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) + goto out; + } + +- debug("ethernet alias found: %s\n", path); ++printf("ethernet alias found: %s\n", path); + + node = fdt_path_offset(fdt, path); + if (node < 0) { +@@ -544,7 +544,7 @@ int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]) + goto out; + } + +- debug("MAC address: %pM\n", prop); ++printf("MAC address: %pM\n", prop); + memcpy(mac, prop, ETH_ALEN); + + out: +diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c +index 18c19dbf6..09e69f7b7 100644 +--- a/arch/arm/mach-tegra/clock.c ++++ b/arch/arm/mach-tegra/clock.c +@@ -78,7 +78,7 @@ static struct clk_pll *get_pll(enum clock_id clkid) + + assert(clock_id_is_pll(clkid)); + if (clkid >= (enum clock_id)TEGRA_CLK_PLLS) { +- debug("%s: Invalid PLL %d\n", __func__, clkid); ++printf("%s: Invalid PLL %d\n", __func__, clkid); + return NULL; + } + return &clkrst->crc_pll[clkid]; +@@ -126,7 +126,7 @@ unsigned long clock_start_pll(enum clock_id clkid, u32 divm, u32 divn, + } else { + simple_pll = clock_get_simple_pll(clkid); + if (!simple_pll) { +- debug("%s: Uknown simple PLL %d\n", __func__, clkid); ++printf("%s: Uknown simple PLL %d\n", __func__, clkid); + return 0; + } + } +@@ -459,7 +459,7 @@ unsigned clock_adjust_periph_pll_div(enum periph_id periph_id, + assert(divider >= 0); + if (adjust_periph_pll(periph_id, source, mux_bits, divider)) + return -1U; +- debug("periph %d, rate=%d, reg=%p = %x\n", periph_id, rate, ++printf("periph %d, rate=%d, reg=%p = %x\n", periph_id, rate, + get_periph_source_reg(periph_id), + readl(get_periph_source_reg(periph_id))); + +@@ -468,7 +468,7 @@ unsigned clock_adjust_periph_pll_div(enum periph_id periph_id, + if (extra_div) + effective_rate /= *extra_div; + if (rate != effective_rate) +- debug("Requested clock rate %u not honored (got %u)\n", ++printf("Requested clock rate %u not honored (got %u)\n", + rate, effective_rate); + return effective_rate; + } +@@ -682,7 +682,7 @@ int clock_verify(void) + printf("Warning: PLLP %x is not correct\n", reg); + return -1; + } +- debug("PLLP %x is correct\n", reg); ++printf("PLLP %x is correct\n", reg); + return 0; + } + +@@ -700,14 +700,14 @@ void clock_init(void) + pll_rate[CLOCK_ID_OSC] = clock_get_rate(CLOCK_ID_OSC); + pll_rate[CLOCK_ID_CLK_M] = clock_get_rate(CLOCK_ID_CLK_M); + +- debug("Osc = %d\n", pll_rate[CLOCK_ID_OSC]); +- debug("CLKM = %d\n", pll_rate[CLOCK_ID_CLK_M]); +- debug("PLLC = %d\n", pll_rate[CLOCK_ID_CGENERAL]); +- debug("PLLM = %d\n", pll_rate[CLOCK_ID_MEMORY]); +- debug("PLLP = %d\n", pll_rate[CLOCK_ID_PERIPH]); +- debug("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); +- debug("PLLD = %d\n", pll_rate[CLOCK_ID_DISPLAY]); +- debug("PLLX = %d\n", pll_rate[CLOCK_ID_XCPU]); ++printf("Osc = %d\n", pll_rate[CLOCK_ID_OSC]); ++printf("CLKM = %d\n", pll_rate[CLOCK_ID_CLK_M]); ++printf("PLLC = %d\n", pll_rate[CLOCK_ID_CGENERAL]); ++printf("PLLM = %d\n", pll_rate[CLOCK_ID_MEMORY]); ++printf("PLLP = %d\n", pll_rate[CLOCK_ID_PERIPH]); ++printf("PLLU = %d\n", pll_rate[CLOCK_ID_USB]); ++printf("PLLD = %d\n", pll_rate[CLOCK_ID_DISPLAY]); ++printf("PLLX = %d\n", pll_rate[CLOCK_ID_XCPU]); + + for (i = 0; periph_clk_init_table[i].periph_id != -1; i++) { + enum periph_id periph_id; +diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c +index 65b15b79f..817a3c41d 100644 +--- a/arch/arm/mach-tegra/cpu.c ++++ b/arch/arm/mach-tegra/cpu.c +@@ -20,7 +20,7 @@ int get_num_cpus(void) + { + struct apb_misc_gp_ctlr *gp; + uint rev; +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + gp = (struct apb_misc_gp_ctlr *)NV_PA_APB_MISC_GP_BASE; + rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT; +@@ -157,14 +157,14 @@ static inline void pllx_set_iddq(void) + #if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA210) + struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + u32 reg; +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* Disable IDDQ */ + reg = readl(&clkrst->crc_pllx_misc3); + reg &= ~PLLX_IDDQ_MASK; + writel(reg, &clkrst->crc_pllx_misc3); + udelay(2); +- debug("%s: IDDQ: PLLX IDDQ = 0x%08X\n", __func__, ++printf("%s: IDDQ: PLLX IDDQ = 0x%08X\n", __func__, + readl(&clkrst->crc_pllx_misc3)); + #endif + } +@@ -175,11 +175,11 @@ int pllx_set_rate(struct clk_pll_simple *pll , u32 divn, u32 divm, + struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; + int chip = tegra_get_chip(); + u32 reg; +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* If PLLX is already enabled, just return */ + if (readl(&pll->pll_base) & PLL_ENABLE_MASK) { +- debug("%s: PLLX already enabled, returning\n", __func__); ++printf("%s: PLLX already enabled, returning\n", __func__); + return 0; + } + +@@ -209,20 +209,20 @@ int pllx_set_rate(struct clk_pll_simple *pll , u32 divn, u32 divm, + reg = readl(&pll->pll_base); + reg &= ~PLL_BYPASS_MASK; + writel(reg, &pll->pll_base); +- debug("%s: base = 0x%08X\n", __func__, reg); ++printf("%s: base = 0x%08X\n", __func__, reg); + + /* Set lock_enable to PLLX_MISC if lock_ena is valid (i.e. 0-31) */ + reg = readl(&pll->pll_misc); + if (pllinfo->lock_ena < 32) + reg |= (1 << pllinfo->lock_ena); + writel(reg, &pll->pll_misc); +- debug("%s: misc = 0x%08X\n", __func__, reg); ++printf("%s: misc = 0x%08X\n", __func__, reg); + + /* Enable PLLX last, once it's all configured */ + reg = readl(&pll->pll_base); + reg |= PLL_ENABLE_MASK; + writel(reg, &pll->pll_base); +- debug("%s: base final = 0x%08X\n", __func__, reg); ++printf("%s: base final = 0x%08X\n", __func__, reg); + + return 0; + } +@@ -234,23 +234,23 @@ void init_pllx(void) + int soc_type, sku_info, chip_sku; + enum clock_osc_freq osc; + struct clk_pll_table *sel; +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* get SOC (chip) type */ + soc_type = tegra_get_chip(); +- debug("%s: SoC = 0x%02X\n", __func__, soc_type); ++printf("%s: SoC = 0x%02X\n", __func__, soc_type); + + /* get SKU info */ + sku_info = tegra_get_sku_info(); +- debug("%s: SKU info byte = 0x%02X\n", __func__, sku_info); ++printf("%s: SKU info byte = 0x%02X\n", __func__, sku_info); + + /* get chip SKU, combo of the above info */ + chip_sku = tegra_get_chip_sku(); +- debug("%s: Chip SKU = %d\n", __func__, chip_sku); ++printf("%s: Chip SKU = %d\n", __func__, chip_sku); + + /* get osc freq */ + osc = clock_get_osc_freq(); +- debug("%s: osc = %d\n", __func__, osc); ++printf("%s: osc = %d\n", __func__, osc); + + /* set pllx */ + sel = &tegra_pll_x_table[chip_sku][osc]; +@@ -261,7 +261,7 @@ void enable_cpu_clock(int enable) + { + struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + u32 clk; +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* + * NOTE: +@@ -308,7 +308,7 @@ static int is_cpu_powered(void) + static void remove_cpu_io_clamps(void) + { + u32 reg; +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* Remove the clamps on the CPU I/O signals */ + reg = tegra_pmc_readl(offsetof(struct pmc_ctlr, pmc_remove_clamping)); +@@ -323,7 +323,7 @@ void powerup_cpu(void) + { + u32 reg; + int timeout = IO_STABILIZATION_DELAY; +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + if (!is_cpu_powered()) { + /* Toggle the CPU power state (OFF -> ON) */ +@@ -366,7 +366,7 @@ void reset_A9_cpu(int reset) + int num_cpus = get_num_cpus(); + int cpu; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + /* Hold CPUs 1 onwards in reset, and CPU 0 if asked */ + for (cpu = 1; cpu < num_cpus; cpu++) + reset_cmplx_set_enable(cpu, mask, 1); +@@ -380,7 +380,7 @@ void clock_enable_coresight(int enable) + { + u32 rst, src = 2; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + clock_set_enable(PERIPH_ID_CORESIGHT, enable); + reset_set_enable(PERIPH_ID_CORESIGHT, !enable); + +@@ -407,7 +407,7 @@ void clock_enable_coresight(int enable) + + void halt_avp(void) + { +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + for (;;) { + writel(HALT_COP_EVENT_JTAG | (FLOW_MODE_STOP << 29), +diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c +index 13ffade04..3155ea926 100644 +--- a/arch/arm/mach-tegra/gpu.c ++++ b/arch/arm/mach-tegra/gpu.c +@@ -32,7 +32,7 @@ void tegra_gpu_config(void) + readl(&mc->mc_video_protect_reg_ctrl); + } + +- debug("configured VPR\n"); ++printf("configured VPR\n"); + + _configured = true; + } +diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c +index 8d617bee6..4be8c37d6 100644 +--- a/arch/arm/mach-tegra/pmc.c ++++ b/arch/arm/mach-tegra/pmc.c +@@ -35,7 +35,7 @@ static bool tegra_pmc_detect_tz_only(void) + + /* if we read all-zeroes, access is restricted to TZ only */ + if (value == 0) { +- debug("access to PMC is restricted to TZ\n"); ++printf("access to PMC is restricted to TZ\n"); + is_tz_only = true; + } else { + /* restore original value */ +diff --git a/arch/arm/mach-tegra/spl.c b/arch/arm/mach-tegra/spl.c +index ed897efc5..70bca75c6 100644 +--- a/arch/arm/mach-tegra/spl.c ++++ b/arch/arm/mach-tegra/spl.c +@@ -46,7 +46,7 @@ u32 spl_boot_device(void) + + void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + { +- debug("image entry point: 0x%lX\n", spl_image->entry_point); ++printf("image entry point: 0x%lX\n", spl_image->entry_point); + + start_cpu((u32)spl_image->entry_point); + halt_avp(); +diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c +index 167589d1b..b9b38fa27 100644 +--- a/arch/arm/mach-tegra/tegra114/clock.c ++++ b/arch/arm/mach-tegra/tegra114/clock.c +@@ -719,19 +719,19 @@ void arch_timer_init(void) + u32 freq, val; + + freq = clock_get_rate(CLOCK_ID_CLK_M); +- debug("%s: clk_m freq is %dHz [0x%08X]\n", __func__, freq, freq); ++printf("%s: clk_m freq is %dHz [0x%08X]\n", __func__, freq, freq); + + /* ARM CNTFRQ */ + asm("mcr p15, 0, %0, c14, c0, 0\n" : : "r" (freq)); + + /* Only T114 has the System Counter regs */ +- debug("%s: setting CNTFID0 to 0x%08X\n", __func__, freq); ++printf("%s: setting CNTFID0 to 0x%08X\n", __func__, freq); + writel(freq, &sysctr->cntfid0); + + val = readl(&sysctr->cntcr); + val |= TSC_CNTCR_ENABLE | TSC_CNTCR_HDBG; + writel(val, &sysctr->cntcr); +- debug("%s: TSC CNTCR = 0x%08X\n", __func__, val); ++printf("%s: TSC CNTCR = 0x%08X\n", __func__, val); + } + + struct periph_clk_init periph_clk_init_table[] = { +diff --git a/arch/arm/mach-tegra/tegra114/cpu.c b/arch/arm/mach-tegra/tegra114/cpu.c +index 62c105363..78cf3ca83 100644 +--- a/arch/arm/mach-tegra/tegra114/cpu.c ++++ b/arch/arm/mach-tegra/tegra114/cpu.c +@@ -23,7 +23,7 @@ static void enable_cpu_power_rail(void) + struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + u32 reg; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* un-tristate PWR_I2C SCL/SDA, rest of the defaults are correct */ + pinmux_tristate_disable(PMUX_PINGRP_PWR_I2C_SCL_PZ6); +@@ -56,7 +56,7 @@ static void enable_cpu_clocks(void) + struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; + u32 reg; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* Wait for PLL-X to lock */ + do { +@@ -80,7 +80,7 @@ static void remove_cpu_resets(void) + struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + u32 reg; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + /* Take the slow non-CPU partition out of reset */ + reg = readl(&clkrst->crc_rst_cpulp_cmplx_clr); + writel((reg | CLR_NONCPURESET), &clkrst->crc_rst_cpulp_cmplx_clr); +@@ -114,21 +114,21 @@ void t114_init_clocks(void) + struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; + u32 val; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* Set active CPU cluster to G */ + clrbits_le32(&flow->cluster_control, 1); + + writel(SUPER_SCLK_ENB_MASK, &clkrst->crc_super_sclk_div); + +- debug("Setting up PLLX\n"); ++printf("Setting up PLLX\n"); + init_pllx(); + + val = (1 << CLK_SYS_RATE_AHB_RATE_SHIFT); + writel(val, &clkrst->crc_clk_sys_rate); + + /* Enable clocks to required peripherals. TBD - minimize this list */ +- debug("Enabling clocks\n"); ++printf("Enabling clocks\n"); + + clock_set_enable(PERIPH_ID_CACHE2, 1); + clock_set_enable(PERIPH_ID_GPIO, 1); +@@ -166,7 +166,7 @@ void t114_init_clocks(void) + udelay(1000); + + /* Take required peripherals out of reset */ +- debug("Taking periphs out of reset\n"); ++printf("Taking periphs out of reset\n"); + reset_set_enable(PERIPH_ID_CACHE2, 0); + reset_set_enable(PERIPH_ID_GPIO, 0); + reset_set_enable(PERIPH_ID_TMR, 0); +@@ -182,7 +182,7 @@ void t114_init_clocks(void) + reset_set_enable(PERIPH_ID_MC1, 0); + reset_set_enable(PERIPH_ID_DVFS, 0); + +- debug("%s exit\n", __func__); ++printf("%s exit\n", __func__); + } + + static bool is_partition_powered(u32 partid) +@@ -209,11 +209,11 @@ static void power_partition(u32 partid) + { + struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + +- debug("%s: part ID = %08X\n", __func__, partid); ++printf("%s: part ID = %08X\n", __func__, partid); + /* Is the partition already on? */ + if (!is_partition_powered(partid)) { + /* No, toggle the partition power state (OFF -> ON) */ +- debug("power_partition, toggling state\n"); ++printf("power_partition, toggling state\n"); + writel(START_CP | partid, &pmc->pmc_pwrgate_toggle); + + /* Wait for the power to come up */ +@@ -232,7 +232,7 @@ static void power_partition(u32 partid) + void powerup_cpus(void) + { + /* We boot to the fast cluster */ +- debug("%s entry: G cluster\n", __func__); ++printf("%s entry: G cluster\n", __func__); + + /* Power up the fast cluster rail partition */ + power_partition(CRAIL); +@@ -248,7 +248,7 @@ void start_cpu(u32 reset_vector) + { + u32 imme, inst; + +- debug("%s entry, reset_vector = %x\n", __func__, reset_vector); ++printf("%s entry, reset_vector = %x\n", __func__, reset_vector); + + t114_init_clocks(); + +diff --git a/arch/arm/mach-tegra/tegra114/funcmux.c b/arch/arm/mach-tegra/tegra114/funcmux.c +index 23a27c868..3ec907574 100644 +--- a/arch/arm/mach-tegra/tegra114/funcmux.c ++++ b/arch/arm/mach-tegra/tegra114/funcmux.c +@@ -44,12 +44,12 @@ int funcmux_select(enum periph_id id, int config) + /* Add other periph IDs here as needed */ + + default: +- debug("%s: invalid periph_id %d", __func__, id); ++printf("%s: invalid periph_id %d", __func__, id); + return -1; + } + + if (bad_config) { +- debug("%s: invalid config %d for periph_id %d", __func__, ++printf("%s: invalid config %d for periph_id %d", __func__, + config, id); + return -1; + } +diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c +index 79e67f519..94408b0cb 100644 +--- a/arch/arm/mach-tegra/tegra124/clock.c ++++ b/arch/arm/mach-tegra/tegra124/clock.c +@@ -917,19 +917,19 @@ void arch_timer_init(void) + u32 freq, val; + + freq = clock_get_rate(CLOCK_ID_CLK_M); +- debug("%s: clk_m freq is %dHz [0x%08X]\n", __func__, freq, freq); ++printf("%s: clk_m freq is %dHz [0x%08X]\n", __func__, freq, freq); + + /* ARM CNTFRQ */ + asm("mcr p15, 0, %0, c14, c0, 0\n" : : "r" (freq)); + + /* Only Tegra114+ has the System Counter regs */ +- debug("%s: setting CNTFID0 to 0x%08X\n", __func__, freq); ++printf("%s: setting CNTFID0 to 0x%08X\n", __func__, freq); + writel(freq, &sysctr->cntfid0); + + val = readl(&sysctr->cntcr); + val |= TSC_CNTCR_ENABLE | TSC_CNTCR_HDBG; + writel(val, &sysctr->cntcr); +- debug("%s: TSC CNTCR = 0x%08X\n", __func__, val); ++printf("%s: TSC CNTCR = 0x%08X\n", __func__, val); + } + + #define PLLE_SS_CNTL 0x68 +@@ -1126,7 +1126,7 @@ u32 clock_set_display_rate(u32 frequency) + rounded_rate = (ref / best_m * best_n) >> best_p; + } + +- debug("%s: PLLD=%u ref=%u, m/n/p/cpcon=%u/%u/%u/%u\n", ++printf("%s: PLLD=%u ref=%u, m/n/p/cpcon=%u/%u/%u/%u\n", + __func__, rounded_rate, ref, best_m, best_n, best_p, cpcon); + + source = get_periph_clock_source(PERIPH_ID_DISP1, CLOCK_ID_DISPLAY, +diff --git a/arch/arm/mach-tegra/tegra124/cpu.c b/arch/arm/mach-tegra/tegra124/cpu.c +index d5f2683b2..e834b8817 100644 +--- a/arch/arm/mach-tegra/tegra124/cpu.c ++++ b/arch/arm/mach-tegra/tegra124/cpu.c +@@ -24,7 +24,7 @@ static void enable_cpu_power_rail(void) + { + struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* un-tristate PWR_I2C SCL/SDA, rest of the defaults are correct */ + pinmux_tristate_disable(PMUX_PINGRP_PWR_I2C_SCL_PZ6); +@@ -49,35 +49,35 @@ static void enable_cpu_clocks(void) + struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; + u32 reg; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* Wait for PLL-X to lock */ + do { + reg = readl(&clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); +- debug("%s: PLLX base = 0x%08X\n", __func__, reg); ++printf("%s: PLLX base = 0x%08X\n", __func__, reg); + } while ((reg & (1 << pllinfo->lock_det)) == 0); + +- debug("%s: PLLX locked, delay for stable clocks\n", __func__); ++printf("%s: PLLX locked, delay for stable clocks\n", __func__); + /* Wait until all clocks are stable */ + udelay(PLL_STABILIZATION_DELAY); + +- debug("%s: Setting CCLK_BURST and DIVIDER\n", __func__); ++printf("%s: Setting CCLK_BURST and DIVIDER\n", __func__); + writel(CCLK_BURST_POLICY, &clkrst->crc_cclk_brst_pol); + writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div); + +- debug("%s: Enabling clock to all CPUs\n", __func__); ++printf("%s: Enabling clock to all CPUs\n", __func__); + /* Enable the clock to all CPUs */ + reg = CLR_CPU3_CLK_STP | CLR_CPU2_CLK_STP | CLR_CPU1_CLK_STP | + CLR_CPU0_CLK_STP; + writel(reg, &clkrst->crc_clk_cpu_cmplx_clr); + +- debug("%s: Enabling main CPU complex clocks\n", __func__); ++printf("%s: Enabling main CPU complex clocks\n", __func__); + /* Always enable the main CPU complex clocks */ + clock_enable(PERIPH_ID_CPU); + clock_enable(PERIPH_ID_CPULP); + clock_enable(PERIPH_ID_CPUG); + +- debug("%s: Done\n", __func__); ++printf("%s: Done\n", __func__); + } + + static void remove_cpu_resets(void) +@@ -85,7 +85,7 @@ static void remove_cpu_resets(void) + struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + u32 reg; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* Take the slow and fast partitions out of reset */ + reg = CLR_NONCPURESET; +@@ -128,7 +128,7 @@ static void tegra124_ram_repair(void) + val = readl(&flow->ram_repair); + } while (!(val & RAM_REPAIR_STS) && ram_repair_timeout--); + if (!ram_repair_timeout) +- debug("Ram Repair cluster0 failed\n"); ++printf("Ram Repair cluster0 failed\n"); + + /* cluster 1 */ + setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ); +@@ -140,7 +140,7 @@ static void tegra124_ram_repair(void) + } while (!(val & RAM_REPAIR_STS) && ram_repair_timeout--); + + if (!ram_repair_timeout) +- debug("Ram Repair cluster1 failed\n"); ++printf("Ram Repair cluster1 failed\n"); + } + + /** +@@ -155,7 +155,7 @@ void tegra124_init_clocks(void) + (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + u32 val; + +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + /* Set active CPU cluster to G */ + clrbits_le32(&flow->cluster_control, 1); +@@ -175,14 +175,14 @@ void tegra124_init_clocks(void) + /* Set HOLD_CKE_LOW_EN to 1 */ + setbits_le32(&pmc->pmc_cntrl2, HOLD_CKE_LOW_EN); + +- debug("Setting up PLLX\n"); ++printf("Setting up PLLX\n"); + init_pllx(); + + val = (1 << CLK_SYS_RATE_AHB_RATE_SHIFT); + writel(val, &clkrst->crc_clk_sys_rate); + + /* Enable clocks to required peripherals. TBD - minimize this list */ +- debug("Enabling clocks\n"); ++printf("Enabling clocks\n"); + + clock_set_enable(PERIPH_ID_CACHE2, 1); + clock_set_enable(PERIPH_ID_GPIO, 1); +@@ -214,7 +214,7 @@ void tegra124_init_clocks(void) + udelay(IO_STABILIZATION_DELAY); + + /* Take required peripherals out of reset */ +- debug("Taking periphs out of reset\n"); ++printf("Taking periphs out of reset\n"); + reset_set_enable(PERIPH_ID_CACHE2, 0); + reset_set_enable(PERIPH_ID_GPIO, 0); + reset_set_enable(PERIPH_ID_TMR, 0); +@@ -227,7 +227,7 @@ void tegra124_init_clocks(void) + reset_set_enable(PERIPH_ID_MSELECT, 0); + reset_set_enable(PERIPH_ID_DVFS, 0); + +- debug("%s exit\n", __func__); ++printf("%s exit\n", __func__); + } + + static bool is_partition_powered(u32 partid) +@@ -244,11 +244,11 @@ static void unpower_partition(u32 partid) + { + struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + +- debug("%s: part ID = %08X\n", __func__, partid); ++printf("%s: part ID = %08X\n", __func__, partid); + /* Is the partition on? */ + if (is_partition_powered(partid)) { + /* Yes, toggle the partition power state (ON -> OFF) */ +- debug("power_partition, toggling state\n"); ++printf("power_partition, toggling state\n"); + writel(START_CP | partid, &pmc->pmc_pwrgate_toggle); + + /* Wait for the power to come down */ +@@ -262,32 +262,32 @@ static void unpower_partition(u32 partid) + + void unpower_cpus(void) + { +- debug("%s entry: G cluster\n", __func__); ++printf("%s entry: G cluster\n", __func__); + + /* Power down the fast cluster rail partition */ +- debug("%s: CRAIL\n", __func__); ++printf("%s: CRAIL\n", __func__); + unpower_partition(CRAIL); + + /* Power down the fast cluster non-CPU partition */ +- debug("%s: C0NC\n", __func__); ++printf("%s: C0NC\n", __func__); + unpower_partition(C0NC); + + /* Power down the fast cluster CPU0 partition */ +- debug("%s: CE0\n", __func__); ++printf("%s: CE0\n", __func__); + unpower_partition(CE0); + +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + } + + static void power_partition(u32 partid) + { + struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + +- debug("%s: part ID = %08X\n", __func__, partid); ++printf("%s: part ID = %08X\n", __func__, partid); + /* Is the partition already on? */ + if (!is_partition_powered(partid)) { + /* No, toggle the partition power state (OFF -> ON) */ +- debug("power_partition, toggling state\n"); ++printf("power_partition, toggling state\n"); + writel(START_CP | partid, &pmc->pmc_pwrgate_toggle); + + /* Wait for the power to come up */ +@@ -302,28 +302,28 @@ static void power_partition(u32 partid) + void powerup_cpus(void) + { + /* We boot to the fast cluster */ +- debug("%s entry: G cluster\n", __func__); ++printf("%s entry: G cluster\n", __func__); + + /* Power up the fast cluster rail partition */ +- debug("%s: CRAIL\n", __func__); ++printf("%s: CRAIL\n", __func__); + power_partition(CRAIL); + + /* Power up the fast cluster non-CPU partition */ +- debug("%s: C0NC\n", __func__); ++printf("%s: C0NC\n", __func__); + power_partition(C0NC); + + /* Power up the fast cluster CPU0 partition */ +- debug("%s: CE0\n", __func__); ++printf("%s: CE0\n", __func__); + power_partition(CE0); + +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + } + + void start_cpu(u32 reset_vector) + { + struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + +- debug("%s entry, reset_vector = %x\n", __func__, reset_vector); ++printf("%s entry, reset_vector = %x\n", __func__, reset_vector); + + /* + * High power clusters are on after software reset, +@@ -344,5 +344,5 @@ void start_cpu(u32 reset_vector) + clock_enable_coresight(1); + writel(reset_vector, EXCEP_VECTOR_CPU_RESET_VECTOR); + remove_cpu_resets(); +- debug("%s exit, should continue @ reset_vector\n", __func__); ++printf("%s exit, should continue @ reset_vector\n", __func__); + } +diff --git a/arch/arm/mach-tegra/tegra124/funcmux.c b/arch/arm/mach-tegra/tegra124/funcmux.c +index e7ad85fde..b5e89c079 100644 +--- a/arch/arm/mach-tegra/tegra124/funcmux.c ++++ b/arch/arm/mach-tegra/tegra124/funcmux.c +@@ -58,12 +58,12 @@ int funcmux_select(enum periph_id id, int config) + /* Add other periph IDs here as needed */ + + default: +- debug("%s: invalid periph_id %d", __func__, id); ++printf("%s: invalid periph_id %d", __func__, id); + return -1; + } + + if (bad_config) { +- debug("%s: invalid config %d for periph_id %d", __func__, ++printf("%s: invalid config %d for periph_id %d", __func__, + config, id); + return -1; + } +diff --git a/arch/arm/mach-tegra/tegra124/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c +index d3c7719c3..6fc4a9e50 100644 +--- a/arch/arm/mach-tegra/tegra124/xusb-padctl.c ++++ b/arch/arm/mach-tegra/tegra124/xusb-padctl.c +@@ -327,12 +327,12 @@ void tegra_xusb_padctl_init(void) + int count = 0; + int ret; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + if (of_live_active()) { + struct device_node *np = of_find_compatible_node(NULL, NULL, + "nvidia,tegra124-xusb-padctl"); + +- debug("np=%p\n", np); ++printf("np=%p\n", np); + if (np) { + nodes[0] = np_to_ofnode(np); + count = 1; +@@ -349,5 +349,5 @@ void tegra_xusb_padctl_init(void) + } + + ret = tegra_xusb_process_nodes(nodes, count, &tegra124_socdata); +- debug("%s: done, ret=%d\n", __func__, ret); ++printf("%s: done, ret=%d\n", __func__, ret); + } +diff --git a/arch/arm/mach-tegra/tegra20/crypto.c b/arch/arm/mach-tegra/tegra20/crypto.c +index 1efaa5c3e..55da6b1b2 100644 +--- a/arch/arm/mach-tegra/tegra20/crypto.c ++++ b/arch/arm/mach-tegra/tegra20/crypto.c +@@ -83,7 +83,7 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst, + aes_encrypt(AES128_KEY_LENGTH, tmp_data, + key_schedule, dst); + +- debug("sign_obj: block %d of %d\n", i, num_aes_blocks); ++printf("sign_obj: block %d of %d\n", i, num_aes_blocks); + + /* Update pointers for next loop. */ + cbc_chain_data = dst; +@@ -107,7 +107,7 @@ static int encrypt_and_sign(u8 *key, enum security_op oper, u8 *src, + u8 key_schedule[AES128_EXPAND_KEY_LENGTH]; + u8 iv[AES128_KEY_LENGTH] = {0}; + +- debug("encrypt_and_sign: length = %d\n", length); ++printf("encrypt_and_sign: length = %d\n", length); + + /* + * The only need for a key is for signing/checksum purposes, so +@@ -120,17 +120,17 @@ static int encrypt_and_sign(u8 *key, enum security_op oper, u8 *src, + + if (oper & SECURITY_ENCRYPT) { + /* Perform this in place, resulting in src being encrypted. */ +- debug("encrypt_and_sign: begin encryption\n"); ++printf("encrypt_and_sign: begin encryption\n"); + aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, src, + src, num_aes_blocks); +- debug("encrypt_and_sign: end encryption\n"); ++printf("encrypt_and_sign: end encryption\n"); + } + + if (oper & SECURITY_SIGN) { + /* encrypt the data, overwriting the result in signature. */ +- debug("encrypt_and_sign: begin signing\n"); ++printf("encrypt_and_sign: begin signing\n"); + sign_object(key, key_schedule, src, sig_dst, num_aes_blocks); +- debug("encrypt_and_sign: end signing\n"); ++printf("encrypt_and_sign: end signing\n"); + } + + return 0; +diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c +index d55b09b4a..4b6e49dd8 100644 +--- a/arch/arm/mach-tegra/tegra20/emc.c ++++ b/arch/arm/mach-tegra/tegra20/emc.c +@@ -126,7 +126,7 @@ static int find_emc_tables(const void *blob, int node, int ram_code) + if (!need_ram_code) + return node; + if (ram_code == -1) { +- debug("%s: RAM code required but not supplied\n", __func__); ++printf("%s: RAM code required but not supplied\n", __func__); + return ERR_NO_RAM_CODE; + } + +@@ -152,7 +152,7 @@ static int find_emc_tables(const void *blob, int node, int ram_code) + return offset; + } while (1); + +- debug("%s: Could not find tables for RAM code %d\n", __func__, ++printf("%s: Could not find tables for RAM code %d\n", __func__, + ram_code); + return ERR_RAM_CODE_NOT_FOUND; + } +@@ -189,12 +189,12 @@ static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp, + + node = fdtdec_next_compatible(blob, 0, COMPAT_NVIDIA_TEGRA20_EMC); + if (node < 0) { +- debug("%s: No EMC node found in FDT\n", __func__); ++printf("%s: No EMC node found in FDT\n", __func__); + return ERR_NO_EMC_NODE; + } + *emcp = (struct emc_ctlr *)fdtdec_get_addr(blob, node, "reg"); + if (*emcp == (struct emc_ctlr *)FDT_ADDR_T_NONE) { +- debug("%s: No EMC node reg property\n", __func__); ++printf("%s: No EMC node reg property\n", __func__); + return ERR_NO_EMC_REG; + } + +@@ -213,7 +213,7 @@ static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp, + break; + node_rate = fdtdec_get_int(blob, node, "clock-frequency", -1); + if (node_rate == -1) { +- debug("%s: Missing clock-frequency\n", __func__); ++printf("%s: Missing clock-frequency\n", __func__); + return ERR_NO_FREQ; /* we expect this property */ + } + +@@ -221,7 +221,7 @@ static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp, + break; + } + if (node < 0) { +- debug("%s: No node found for clock frequency %d\n", __func__, ++printf("%s: No node found for clock frequency %d\n", __func__, + rate); + return ERR_FREQ_NOT_FOUND; + } +@@ -229,7 +229,7 @@ static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp, + *tablep = fdtdec_locate_array(blob, node, "nvidia,emc-registers", + TEGRA_EMC_NUM_REGS); + if (!*tablep) { +- debug("%s: node '%s' array missing / wrong size\n", __func__, ++printf("%s: node '%s' array missing / wrong size\n", __func__, + fdt_get_name(blob, node, NULL)); + return ERR_BAD_REGS; + } +@@ -246,24 +246,24 @@ int tegra_set_emc(const void *blob, unsigned rate) + + err = decode_emc(blob, rate, &emc, &table); + if (err) { +- debug("Warning: no valid EMC (%d), memory timings unset\n", ++printf("Warning: no valid EMC (%d), memory timings unset\n", + err); + return err; + } + +- debug("%s: Table found, setting EMC values as follows:\n", __func__); ++printf("%s: Table found, setting EMC values as follows:\n", __func__); + for (i = 0; i < TEGRA_EMC_NUM_REGS; i++) { + u32 value = fdt32_to_cpu(table[i]); + u32 addr = (uintptr_t)emc + emc_reg_addr[i]; + +- debug(" %#x: %#x\n", addr, value); ++printf(" %#x: %#x\n", addr, value); + writel(value, addr); + } + + /* trigger emc with new settings */ + clock_adjust_periph_pll_div(PERIPH_ID_EMC, CLOCK_ID_MEMORY, + clock_get_rate(CLOCK_ID_MEMORY), NULL); +- debug("EMC clock set to %lu\n", ++printf("EMC clock set to %lu\n", + clock_get_periph_rate(PERIPH_ID_EMC, CLOCK_ID_MEMORY)); + + return 0; +diff --git a/arch/arm/mach-tegra/tegra20/funcmux.c b/arch/arm/mach-tegra/tegra20/funcmux.c +index 90fe0cba8..efb3a68dc 100644 +--- a/arch/arm/mach-tegra/tegra20/funcmux.c ++++ b/arch/arm/mach-tegra/tegra20/funcmux.c +@@ -284,12 +284,12 @@ int funcmux_select(enum periph_id id, int config) + break; + + default: +- debug("%s: invalid periph_id %d", __func__, id); ++printf("%s: invalid periph_id %d", __func__, id); + return -1; + } + + if (bad_config) { +- debug("%s: invalid config %d for periph_id %d", __func__, ++printf("%s: invalid config %d for periph_id %d", __func__, + config, id); + return -1; + } +diff --git a/arch/arm/mach-tegra/tegra20/pmu.c b/arch/arm/mach-tegra/tegra20/pmu.c +index 05d0668cd..9ad9abf9f 100644 +--- a/arch/arm/mach-tegra/tegra20/pmu.c ++++ b/arch/arm/mach-tegra/tegra20/pmu.c +@@ -43,18 +43,18 @@ int pmu_set_nominal(void) + cpu = VDD_CPU_NOMINAL_T25; + break; + default: +- debug("%s: Unknown SKU id\n", __func__); ++printf("%s: Unknown SKU id\n", __func__); + return -1; + } + + ret = tegra_i2c_get_dvc_bus(&bus); + if (ret) { +- debug("%s: Cannot find DVC I2C bus\n", __func__); ++printf("%s: Cannot find DVC I2C bus\n", __func__); + return ret; + } + ret = i2c_get_chip(bus, PMI_I2C_ADDRESS, 1, &dev); + if (ret) { +- debug("%s: Cannot find DVC I2C chip\n", __func__); ++printf("%s: Cannot find DVC I2C chip\n", __func__); + return ret; + } + +diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c +index ccc64eb77..257949a17 100644 +--- a/arch/arm/mach-tegra/tegra210/clock.c ++++ b/arch/arm/mach-tegra/tegra210/clock.c +@@ -688,7 +688,7 @@ enum clock_osc_freq clock_get_osc_freq(void) + * 8 = 12MHz, 9 = 48MHz, 12 = 26MHz + */ + if (reg == 5) { +- debug("OSC_FREQ is 38.4MHz (%d) ...\n", reg); ++printf("OSC_FREQ is 38.4MHz (%d) ...\n", reg); + /* Map it to the 5th CLOCK_OSC_ enum, i.e. 4 */ + return 4; + } +@@ -1052,19 +1052,19 @@ void arch_timer_init(void) + u32 freq, val; + + freq = clock_get_rate(CLOCK_ID_CLK_M); +- debug("%s: clk_m freq is %dHz [0x%08X]\n", __func__, freq, freq); ++printf("%s: clk_m freq is %dHz [0x%08X]\n", __func__, freq, freq); + + if (current_el() == 3) + asm("msr cntfrq_el0, %0\n" : : "r" (freq)); + + /* Only Tegra114+ has the System Counter regs */ +- debug("%s: setting CNTFID0 to 0x%08X\n", __func__, freq); ++printf("%s: setting CNTFID0 to 0x%08X\n", __func__, freq); + writel(freq, &sysctr->cntfid0); + + val = readl(&sysctr->cntcr); + val |= TSC_CNTCR_ENABLE | TSC_CNTCR_HDBG; + writel(val, &sysctr->cntcr); +- debug("%s: TSC CNTCR = 0x%08X\n", __func__, val); ++printf("%s: TSC CNTCR = 0x%08X\n", __func__, val); + } + + #define PLLREFE_MISC 0x4c8 +@@ -1104,7 +1104,7 @@ static int tegra_pllref_enable(void) + PLLREFE_BASE_DIVM(4); + writel(value, NV_PA_CLK_RST_BASE + PLLREFE_BASE); + +- debug("waiting for pllrefe lock\n"); ++printf("waiting for pllrefe lock\n"); + start = get_timer(0); + while (get_timer(start) < 250) { + value = readl(NV_PA_CLK_RST_BASE + PLLREFE_MISC); +@@ -1112,10 +1112,10 @@ static int tegra_pllref_enable(void) + break; + } + if (!(value & PLLREFE_MISC_LOCK)) { +- debug(" timeout\n"); ++printf(" timeout\n"); + return -ETIMEDOUT; + } +- debug(" done\n"); ++printf(" done\n"); + + return 0; + } +@@ -1206,7 +1206,7 @@ int tegra_plle_enable(void) + + /* 4. Wait for LOCK */ + +- debug("waiting for plle lock\n"); ++printf("waiting for plle lock\n"); + start = get_timer(0); + while (get_timer(start) < 250) { + value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); +@@ -1214,10 +1214,10 @@ int tegra_plle_enable(void) + break; + } + if (!(value & PLLE_MISC_LOCK)) { +- debug(" timeout\n"); ++printf(" timeout\n"); + return -ETIMEDOUT; + } +- debug(" done\n"); ++printf(" done\n"); + + /* 5. Enable SSA */ + +diff --git a/arch/arm/mach-tegra/tegra210/funcmux.c b/arch/arm/mach-tegra/tegra210/funcmux.c +index 30d994a17..1ea7669da 100644 +--- a/arch/arm/mach-tegra/tegra210/funcmux.c ++++ b/arch/arm/mach-tegra/tegra210/funcmux.c +@@ -27,12 +27,12 @@ int funcmux_select(enum periph_id id, int config) + */ + + default: +- debug("%s: invalid periph_id %d", __func__, id); ++printf("%s: invalid periph_id %d", __func__, id); + return -1; + } + + if (bad_config) { +- debug("%s: invalid config %d for periph_id %d", __func__, ++printf("%s: invalid config %d for periph_id %d", __func__, + config, id); + return -1; + } +diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c +index c414dfd3b..9396e36b9 100644 +--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c ++++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c +@@ -232,7 +232,7 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) + unsigned long start; + u32 value; + +- debug("> %s(phy=%p)\n", __func__, phy); ++printf("> %s(phy=%p)\n", __func__, phy); + + value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); + value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_CTRL_MASK; +@@ -287,7 +287,7 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) + value |= XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_EN; + padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); + +- debug(" waiting for calibration\n"); ++printf(" waiting for calibration\n"); + + start = get_timer(0); + +@@ -297,16 +297,16 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) + break; + } + if (!(value & XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_DONE)) { +- debug(" timeout\n"); ++printf(" timeout\n"); + return -ETIMEDOUT; + } +- debug(" done\n"); ++printf(" done\n"); + + value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); + value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_EN; + padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); + +- debug(" waiting for calibration to stop\n"); ++printf(" waiting for calibration to stop\n"); + + start = get_timer(0); + +@@ -316,16 +316,16 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) + break; + } + if (value & XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_DONE) { +- debug(" timeout\n"); ++printf(" timeout\n"); + return -ETIMEDOUT; + } +- debug(" done\n"); ++printf(" done\n"); + + value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); + value |= XUSB_PADCTL_UPHY_PLL_P0_CTL1_ENABLE; + padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); + +- debug(" waiting for PLL to lock...\n"); ++printf(" waiting for PLL to lock...\n"); + start = get_timer(0); + + while (get_timer(start) < 250) { +@@ -334,17 +334,17 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) + break; + } + if (!(value & XUSB_PADCTL_UPHY_PLL_P0_CTL1_LOCKDET_STATUS)) { +- debug(" timeout\n"); ++printf(" timeout\n"); + return -ETIMEDOUT; + } +- debug(" done\n"); ++printf(" done\n"); + + value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); + value |= XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN; + value |= XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_EN; + padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); + +- debug(" waiting for register calibration...\n"); ++printf(" waiting for register calibration...\n"); + start = get_timer(0); + + while (get_timer(start) < 250) { +@@ -353,16 +353,16 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) + break; + } + if (!(value & XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_DONE)) { +- debug(" timeout\n"); ++printf(" timeout\n"); + return -ETIMEDOUT; + } +- debug(" done\n"); ++printf(" done\n"); + + value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); + value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_EN; + padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); + +- debug(" waiting for register calibration to stop...\n"); ++printf(" waiting for register calibration to stop...\n"); + start = get_timer(0); + + while (get_timer(start) < 250) { +@@ -371,16 +371,16 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) + break; + } + if (value & XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_DONE) { +- debug(" timeout\n"); ++printf(" timeout\n"); + return -ETIMEDOUT; + } +- debug(" done\n"); ++printf(" done\n"); + + value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); + value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN; + padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); + +- debug("< %s()\n", __func__); ++printf("< %s()\n", __func__); + return 0; + } + +@@ -419,12 +419,12 @@ void tegra_xusb_padctl_init(void) + int count = 0; + int ret; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + if (of_live_active()) { + struct device_node *np = of_find_compatible_node(NULL, NULL, + "nvidia,tegra210-xusb-padctl"); + +- debug("np=%p\n", np); ++printf("np=%p\n", np); + if (np) { + nodes[0] = np_to_ofnode(np); + count = 1; +@@ -441,14 +441,14 @@ void tegra_xusb_padctl_init(void) + } + + ret = tegra_xusb_process_nodes(nodes, count, &tegra210_socdata); +- debug("%s: done, ret=%d\n", __func__, ret); ++printf("%s: done, ret=%d\n", __func__, ret); + } + + void tegra_xusb_padctl_exit(void) + { + u32 value; + +- debug("> %s\n", __func__); ++printf("> %s\n", __func__); + + value = padctl_readl(&padctl, XUSB_PADCTL_USB3_PAD_MUX); + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE; +@@ -473,5 +473,5 @@ void tegra_xusb_padctl_exit(void) + while (padctl.enable) + tegra_xusb_padctl_disable(&padctl); + +- debug("< %s()\n", __func__); ++printf("< %s()\n", __func__); + } +diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c +index 651edd27e..56cf4912f 100644 +--- a/arch/arm/mach-tegra/tegra30/cpu.c ++++ b/arch/arm/mach-tegra/tegra30/cpu.c +@@ -52,7 +52,7 @@ static void enable_cpu_power_rail(void) + struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + u32 reg; + +- debug("enable_cpu_power_rail entry\n"); ++printf("enable_cpu_power_rail entry\n"); + reg = readl(&pmc->pmc_cntrl); + reg |= CPUPWRREQ_OE; + writel(reg, &pmc->pmc_cntrl); +@@ -90,7 +90,7 @@ void t30_init_clocks(void) + struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; + u32 val; + +- debug("t30_init_clocks entry\n"); ++printf("t30_init_clocks entry\n"); + /* Set active CPU cluster to G */ + clrbits_le32(flow->cluster_control, 1 << 0); + +@@ -131,13 +131,13 @@ static void set_cpu_running(int run) + { + struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; + +- debug("set_cpu_running entry, run = %d\n", run); ++printf("set_cpu_running entry, run = %d\n", run); + writel(run ? FLOW_MODE_NONE : FLOW_MODE_STOP, &flow->halt_cpu_events); + } + + void start_cpu(u32 reset_vector) + { +- debug("start_cpu entry, reset_vector = %x\n", reset_vector); ++printf("start_cpu entry, reset_vector = %x\n", reset_vector); + t30_init_clocks(); + + /* Enable VDD_CPU */ +diff --git a/arch/arm/mach-tegra/tegra30/funcmux.c b/arch/arm/mach-tegra/tegra30/funcmux.c +index c3ee787f3..52f82142a 100644 +--- a/arch/arm/mach-tegra/tegra30/funcmux.c ++++ b/arch/arm/mach-tegra/tegra30/funcmux.c +@@ -38,12 +38,12 @@ int funcmux_select(enum periph_id id, int config) + /* Add other periph IDs here as needed */ + + default: +- debug("%s: invalid periph_id %d", __func__, id); ++printf("%s: invalid periph_id %d", __func__, id); + return -1; + } + + if (bad_config) { +- debug("%s: invalid config %d for periph_id %d", __func__, ++printf("%s: invalid config %d for periph_id %d", __func__, + config, id); + return -1; + } +diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c +index e56e27c8b..6d989e960 100644 +--- a/arch/arm/mach-tegra/xusb-padctl-common.c ++++ b/arch/arm/mach-tegra/xusb-padctl-common.c +@@ -257,7 +257,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl, + ofnode_for_each_subnode(subnode, node) { + struct tegra_xusb_padctl_config *config = &padctl->config; + +- debug("%s: subnode=%s\n", __func__, ofnode_get_name(subnode)); ++printf("%s: subnode=%s\n", __func__, ofnode_get_name(subnode)); + err = tegra_xusb_padctl_config_parse_dt(padctl, config, + subnode); + if (err < 0) { +@@ -266,7 +266,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl, + continue; + } + } +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + + return 0; + } +@@ -279,9 +279,9 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count, + unsigned int i; + int err; + +- debug("%s: count=%d\n", __func__, count); ++printf("%s: count=%d\n", __func__, count); + for (i = 0; i < count; i++) { +- debug("%s: i=%d, node=%p\n", __func__, i, nodes[i].np); ++printf("%s: i=%d, node=%p\n", __func__, i, nodes[i].np); + if (!ofnode_is_available(nodes[i])) + continue; + +@@ -305,7 +305,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count, + /* only a single instance is supported */ + break; + } +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + + return 0; + } +diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c +index d09141c3b..388d0f663 100644 +--- a/arch/arm/mach-zynq/spl.c ++++ b/arch/arm/mach-zynq/spl.c +@@ -83,5 +83,5 @@ int spl_start_uboot(void) + void spl_board_prepare_for_boot(void) + { + ps7_post_config(); +- debug("SPL bye\n"); ++printf("SPL bye\n"); + } +diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c +index 656678a15..5bc3ca02b 100644 +--- a/arch/arm/mach-zynqmp/mp.c ++++ b/arch/arm/mach-zynqmp/mp.c +@@ -198,7 +198,7 @@ static void write_tcm_boot_trampoline(u32 boot_addr) + * ldr r1, [r0] + * bx r1 + */ +- debug("Write boot trampoline for %x\n", boot_addr); ++printf("Write boot trampoline for %x\n", boot_addr); + writel(0xea000000, ZYNQMP_TCM_START_ADDRESS); + writel(boot_addr, ZYNQMP_TCM_START_ADDRESS + 0x4); + writel(0xe59f0004, ZYNQMP_TCM_START_ADDRESS + 0x8); +diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c +index 51a6f9385..4d3eebe06 100644 +--- a/arch/m68k/lib/bootm.c ++++ b/arch/m68k/lib/bootm.c +@@ -82,7 +82,7 @@ int do_bootm_linux(int flag, int argc, char *const argv[], + + kernel = (void (*)(struct bd_info *, ulong, ulong, ulong, ulong))images->ep; + +- debug("## Transferring control to Linux (at address %08lx) ...\n", ++printf("## Transferring control to Linux (at address %08lx) ...\n", + (ulong) kernel); + + bootstage_mark(BOOTSTAGE_ID_RUN_OS); +diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c +index fe65f3728..d166b724a 100644 +--- a/arch/microblaze/cpu/interrupts.c ++++ b/arch/microblaze/cpu/interrupts.c +@@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR; + + void enable_interrupts(void) + { +- debug("Enable interrupts for the whole CPU\n"); ++printf("Enable interrupts for the whole CPU\n"); + MSRSET(0x2); + } + +@@ -55,9 +55,9 @@ static void enable_one_interrupt(int irq) + mask = intc->ier; + intc->ier = (mask | offset); + +- debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, ++printf("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, + intc->ier); +- debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, ++printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + intc->iar, intc->mer); + } + +@@ -70,9 +70,9 @@ static void disable_one_interrupt(int irq) + mask = intc->ier; + intc->ier = (mask & ~offset); + +- debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask, ++printf("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask, + intc->ier); +- debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, ++printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + intc->iar, intc->mer); + } + +@@ -110,7 +110,7 @@ static void intc_init(void) + /* XIntc_Start - hw_interrupt enable and all interrupt enable */ + intc->mer = 0x3; + +- debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, ++printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + intc->iar, intc->mer); + } + +@@ -120,7 +120,7 @@ int interrupt_init(void) + const void *blob = gd->fdt_blob; + int node = 0; + +- debug("INTC: Initialization\n"); ++printf("INTC: Initialization\n"); + + node = fdt_node_offset_by_compatible(blob, node, + "xlnx,xps-intc-1.00.a"); +@@ -129,10 +129,10 @@ int interrupt_init(void) + if (base == FDT_ADDR_T_NONE) + return -1; + +- debug("INTC: Base addr %lx\n", base); ++printf("INTC: Base addr %lx\n", base); + intc = (microblaze_intc_t *)base; + irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0); +- debug("INTC: IRQ NO %x\n", irq_no); ++printf("INTC: IRQ NO %x\n", irq_no); + } else { + return node; + } +@@ -166,26 +166,26 @@ void interrupt_handler(void) + int value; + struct irq_action *act = vecs + irqs; + +- debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, ++printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + intc->iar, intc->mer); + #ifdef DEBUG + R14(value); + #endif +- debug("Interrupt handler on %x line, r14 %x\n", irqs, value); ++printf("Interrupt handler on %x line, r14 %x\n", irqs, value); + +- debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", ++printf("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", + (u32)act->handler, act->count, (u32)act->arg); + act->handler(act->arg); + act->count++; + + intc->iar = mask << irqs; + +- debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, ++printf("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, + intc->ier, intc->iar, intc->mer); + #ifdef DEBUG + R14(value); + #endif +- debug("Interrupt handler on %x line, r14 %x\n", irqs, value); ++printf("Interrupt handler on %x line, r14 %x\n", irqs, value); + } + + #if defined(CONFIG_CMD_IRQ) +diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c +index 86522f844..a54a02417 100644 +--- a/arch/microblaze/cpu/spl.c ++++ b/arch/microblaze/cpu/spl.c +@@ -30,7 +30,7 @@ void spl_board_init(void) + #ifdef CONFIG_SPL_OS_BOOT + void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) + { +- debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg); ++printf("Entering kernel arg pointer: 0x%p\n", spl_image->arg); + typedef void (*image_entry_arg_t)(char *, ulong, ulong) + __attribute__ ((noreturn)); + image_entry_arg_t image_entry = +diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c +index 647bdcd5b..a9cfa3d0f 100644 +--- a/arch/microblaze/cpu/timer.c ++++ b/arch/microblaze/cpu/timer.c +@@ -54,7 +54,7 @@ int timer_init (void) + int node = 0; + u32 cell[2]; + +- debug("TIMER: Initialization\n"); ++printf("TIMER: Initialization\n"); + + /* Do not init before relocation */ + if (!(gd->flags & GD_FLG_RELOC)) +@@ -67,7 +67,7 @@ int timer_init (void) + if (base == FDT_ADDR_T_NONE) + return -1; + +- debug("TIMER: Base addr %lx\n", base); ++printf("TIMER: Base addr %lx\n", base); + tmr = (microblaze_timer_t *)base; + + ret = fdtdec_get_int_array(blob, node, "interrupts", +@@ -76,7 +76,7 @@ int timer_init (void) + return ret; + + irq = cell[0]; +- debug("TIMER: IRQ %x\n", irq); ++printf("TIMER: IRQ %x\n", irq); + + preload = fdtdec_get_int(blob, node, "clock-frequency", 0); + preload /= CONFIG_SYS_HZ; +diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c +index 6695ac63c..76bbc0afc 100644 +--- a/arch/microblaze/lib/bootm.c ++++ b/arch/microblaze/lib/bootm.c +@@ -47,7 +47,7 @@ void arch_lmb_reserve(struct lmb *lmb) + * pointer. + */ + sp = get_sp(); +- debug("## Current stack ends at 0x%08lx ", sp); ++printf("## Current stack ends at 0x%08lx ", sp); + + /* adjust sp by 4K to be safe */ + sp -= 4096; +@@ -73,9 +73,9 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) + + thekernel = (void (*)(char *, ulong, ulong))images->ep; + +- debug("## Transferring control to Linux (at address 0x%08lx) ", ++printf("## Transferring control to Linux (at address 0x%08lx) ", + (ulong)thekernel); +- debug("cmdline 0x%08lx, ramdisk 0x%08lx, FDT 0x%08lx...\n", ++printf("cmdline 0x%08lx, ramdisk 0x%08lx, FDT 0x%08lx...\n", + cmdline, rd_start, dt); + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + +@@ -102,7 +102,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) + static void boot_prep_linux(bootm_headers_t *images) + { + if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) { +- debug("using: FDT\n"); ++printf("using: FDT\n"); + if (image_setup_linux(images)) { + printf("FDT creation failed! hanging..."); + hang(); +diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c +index fde90fced..175c2c94b 100644 +--- a/arch/mips/lib/bootm.c ++++ b/arch/mips/lib/bootm.c +@@ -42,7 +42,7 @@ void arch_lmb_reserve(struct lmb *lmb) + ulong sp; + + sp = arch_get_sp(); +- debug("## Current stack ends at 0x%08lx\n", sp); ++printf("## Current stack ends at 0x%08lx\n", sp); + + /* adjust sp by 4K to be safe */ + sp -= 4096; +@@ -71,11 +71,11 @@ static void linux_cmdline_dump(void) + { + int i; + +- debug("## cmdline argv at 0x%p, argp at 0x%p\n", ++printf("## cmdline argv at 0x%p, argp at 0x%p\n", + linux_argv, linux_argp); + + for (i = 1; i < linux_argc; i++) +- debug(" arg %03d: %s\n", i, linux_argv[i]); ++printf(" arg %03d: %s\n", i, linux_argv[i]); + } + + static void linux_cmdline_legacy(bootm_headers_t *images) +@@ -179,11 +179,11 @@ static void linux_env_legacy(bootm_headers_t *images) + + if (CONFIG_IS_ENABLED(MEMSIZE_IN_BYTES)) { + sprintf(env_buf, "%lu", (ulong)gd->ram_size); +- debug("## Giving linux memsize in bytes, %lu\n", ++printf("## Giving linux memsize in bytes, %lu\n", + (ulong)gd->ram_size); + } else { + sprintf(env_buf, "%lu", (ulong)(gd->ram_size >> 20)); +- debug("## Giving linux memsize in MB, %lu\n", ++printf("## Giving linux memsize in MB, %lu\n", + (ulong)(gd->ram_size >> 20)); + } + +@@ -227,7 +227,7 @@ static int boot_reloc_fdt(bootm_headers_t *images) + * by do_bootm_states() and should not repeated in 'bootm prep'. + */ + if (images->state & BOOTM_STATE_FDT) { +- debug("## FDT already relocated\n"); ++printf("## FDT already relocated\n"); + return 0; + } + +@@ -284,7 +284,7 @@ static void boot_jump_linux(bootm_headers_t *images) + kernel_entry_t kernel = (kernel_entry_t) images->ep; + ulong linux_extra = 0; + +- debug("## Transferring control to Linux (at address %p) ...\n", kernel); ++printf("## Transferring control to Linux (at address %p) ...\n", kernel); + + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + +diff --git a/arch/mips/lib/spl.c b/arch/mips/lib/spl.c +index f96fda5b2..b2dfddff9 100644 +--- a/arch/mips/lib/spl.c ++++ b/arch/mips/lib/spl.c +@@ -17,6 +17,6 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + /* Flush cache before jumping to application */ + flush_cache((unsigned long)spl_image->load_addr, spl_image->size); + +- debug("image entry point: 0x%lx\n", spl_image->entry_point); ++printf("image entry point: 0x%lx\n", spl_image->entry_point); + image_entry(); + } +diff --git a/arch/mips/lib/stack.c b/arch/mips/lib/stack.c +index 930d21856..305f343b9 100644 +--- a/arch/mips/lib/stack.c ++++ b/arch/mips/lib/stack.c +@@ -13,7 +13,7 @@ int arch_reserve_stacks(void) + gd->start_addr_sp -= 0x500; + gd->start_addr_sp &= ~0xFFF; + gd->irq_sp = gd->start_addr_sp; +- debug("Reserving %d Bytes for exception vector at: %08lx\n", ++printf("Reserving %d Bytes for exception vector at: %08lx\n", + 0x500, gd->start_addr_sp); + + return 0; +diff --git a/arch/mips/mach-ath79/qca956x/clk.c b/arch/mips/mach-ath79/qca956x/clk.c +index 6a58dba91..3678c5384 100644 +--- a/arch/mips/mach-ath79/qca956x/clk.c ++++ b/arch/mips/mach-ath79/qca956x/clk.c +@@ -401,7 +401,7 @@ int get_clocks(void) + gd->mem_clk = ddr_rate; + gd->bus_clk = ahb_rate; + +- debug("cpu_clk=%u, ddr_clk=%u, bus_clk=%u\n", ++printf("cpu_clk=%u, ddr_clk=%u, bus_clk=%u\n", + cpu_rate, ddr_rate, ahb_rate); + + return 0; +diff --git a/arch/mips/mach-bmips/dram.c b/arch/mips/mach-bmips/dram.c +index bba6cd6f4..a0d26c0d8 100644 +--- a/arch/mips/mach-bmips/dram.c ++++ b/arch/mips/mach-bmips/dram.c +@@ -21,17 +21,17 @@ int dram_init(void) + + err = uclass_get_device(UCLASS_RAM, 0, &dev); + if (err) { +- debug("DRAM init failed: %d\n", err); ++printf("DRAM init failed: %d\n", err); + return 0; + } + + err = ram_get_info(dev, &ram); + if (err) { +- debug("Cannot get DRAM size: %d\n", err); ++printf("Cannot get DRAM size: %d\n", err); + return 0; + } + +- debug("SDRAM base=%zx, size=%x\n", ram.base, ram.size); ++printf("SDRAM base=%zx, size=%x\n", ram.base, ram.size); + + gd->ram_size = ram.size; + +diff --git a/arch/mips/mach-mscc/phy.c b/arch/mips/mach-mscc/phy.c +index 83d3e5bdd..d7b4ab2b3 100644 +--- a/arch/mips/mach-mscc/phy.c ++++ b/arch/mips/mach-mscc/phy.c +@@ -34,17 +34,17 @@ int mscc_phy_rd_wr(u8 read, + i = 0; + do { + if (i++ > 100) { +- debug("Miim timeout"); ++printf("Miim timeout"); + return -1; + } + data = readl(BASE_DEVCPU_GCB + MIIM_MII_STATUS(miimdev)); +- debug("Read status miim(%d): 0x%08x\n", miimdev, data); ++printf("Read status miim(%d): 0x%08x\n", miimdev, data); + } while (data & MSCC_F_MII_STATUS_MIIM_STAT_BUSY(1)); + + if (read) { + data = readl(BASE_DEVCPU_GCB + MIIM_MII_DATA(miimdev)); + if (data & MSCC_M_MII_DATA_MIIM_DATA_SUCCESS) { +- debug("Read(%d, %d) returned 0x%08x\n", ++printf("Read(%d, %d) returned 0x%08x\n", + miim_addr, addr, data); + return -1; + } +@@ -61,7 +61,7 @@ int mscc_phy_rd(u32 miimdev, + { + if (mscc_phy_rd_wr(1, miimdev, miim_addr, addr, value) == 0) + return 0; +- debug("Read(%d, %d) returned error\n", miim_addr, addr); ++printf("Read(%d, %d) returned error\n", miim_addr, addr); + return -1; + } + +diff --git a/arch/mips/mach-octeon/bootoctlinux.c b/arch/mips/mach-octeon/bootoctlinux.c +index c195dc28a..cffdc41d2 100644 +--- a/arch/mips/mach-octeon/bootoctlinux.c ++++ b/arch/mips/mach-octeon/bootoctlinux.c +@@ -165,7 +165,7 @@ static int octeon_set_moveable_region(u32 base, int region_num, + int i; + u8 node_mask = 0x01; /* ToDo: Currently only one node is supported */ + +- debug("%s(0x%x, %d, %d, %p, %u)\n", __func__, base, region_num, enable, ++printf("%s(0x%x, %d, %d, %p, %u)\n", __func__, base, region_num, enable, + data, num_words); + + if (num_words > 32) { +@@ -195,16 +195,16 @@ static int octeon_set_moveable_region(u32 base, int region_num, + + val = MIO_BOOT_LOC_CFG_EN | + FIELD_PREP(MIO_BOOT_LOC_CFG_BASE, base >> 7); +- debug("%s: Setting MIO_BOOT_LOC_CFG(%d) on node %d to 0x%llx\n", ++printf("%s: Setting MIO_BOOT_LOC_CFG(%d) on node %d to 0x%llx\n", + __func__, region_num, node, val); + csr_wr(CVMX_MIO_BOOT_LOC_CFGX(region_num & 1), val); + + val = FIELD_PREP(MIO_BOOT_LOC_ADR_ADR, (region_num ? 0x80 : 0x00) >> 3); +- debug("%s: Setting MIO_BOOT_LOC_ADR start to 0x%llx\n", __func__, val); ++printf("%s: Setting MIO_BOOT_LOC_ADR start to 0x%llx\n", __func__, val); + csr_wr(CVMX_MIO_BOOT_LOC_ADR, val); + + for (i = 0; i < num_words; i++) { +- debug(" 0x%02llx: 0x%016llx\n", ++printf(" 0x%02llx: 0x%016llx\n", + csr_rd(CVMX_MIO_BOOT_LOC_ADR), data[i]); + csr_wr(CVMX_MIO_BOOT_LOC_DAT, data[i]); + } +@@ -228,13 +228,13 @@ static int octeon_parse_nodes(u64 values[CVMX_MAX_NODES], + char *sep; + + do { +- debug("Parsing node %d: \"%s\"\n", node, str); ++printf("Parsing node %d: \"%s\"\n", node, str); + values[node] = simple_strtoull(str, &sep, base); +- debug(" node %d: 0x%llx\n", node, values[node]); ++printf(" node %d: 0x%llx\n", node, values[node]); + str = sep + 1; + } while (++node < CVMX_MAX_NODES && *sep == ','); + +- debug("%s: returning %d\n", __func__, node); ++printf("%s: returning %d\n", __func__, node); + return node; + } + +@@ -258,14 +258,14 @@ int octeon_parse_bootopts(int argc, char *const argv[], + int node; + u8 node_mask = 0x01; /* ToDo: Currently only one node is supported */ + +- debug("%s(%d, %p, %d, %p)\n", __func__, argc, argv, cmd, boot_args); ++printf("%s(%d, %p, %d, %p)\n", __func__, argc, argv, cmd, boot_args); + memset(boot_args, 0, sizeof(*boot_args)); + boot_args->stack_size = DEFAULT_STACK_SIZE; + boot_args->heap_size = DEFAULT_HEAP_SIZE; + boot_args->node_mask = 0; + + for (arg = 0; arg < argc; arg++) { +- debug(" argv[%d]: %s\n", arg, argv[arg]); ++printf(" argv[%d]: %s\n", arg, argv[arg]); + if (cmd == BOOTOCT && !strncmp(argv[arg], "stack=", 6)) { + boot_args->stack_size = simple_strtoul(argv[arg] + 6, + NULL, 0); +@@ -325,7 +325,7 @@ int octeon_parse_bootopts(int argc, char *const argv[], + boot_args->app_name = argv[arg]; + break; + } else { +- debug(" Unknown argument \"%s\"\n", argv[arg]); ++printf(" Unknown argument \"%s\"\n", argv[arg]); + } + } + +@@ -348,7 +348,7 @@ int octeon_parse_bootopts(int argc, char *const argv[], + boot_args->node_mask |= 1 << j; + } + +- debug("%s: return %d\n", __func__, arg); ++printf("%s: return %d\n", __func__, arg); + return arg; + } + +@@ -391,11 +391,11 @@ int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, + if (addr == 0) + addr = CONFIG_SYS_LOAD_ADDR; + +- debug("%s: arg start: %d\n", __func__, arg_start); ++printf("%s: arg start: %d\n", __func__, arg_start); + arg_count = octeon_parse_bootopts(argc - arg_start, argv + arg_start, + BOOTOCTLINUX, &boot_args); + +- debug("%s:\n" ++printf("%s:\n" + " named block: %s\n" + " node mask: 0x%x\n" + " stack size: 0x%x\n" +@@ -417,18 +417,18 @@ int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, + boot_args.num_cores_set ? "true" : "false", + boot_args.num_skipped_set ? "true" : "false", + boot_args.endbootargs ? "true" : "false"); +- debug(" num cores: "); ++printf(" num cores: "); + for (i = 0; i < CVMX_MAX_NODES; i++) +- debug("%s%d", i > 0 ? ", " : "", boot_args.num_cores[i]); +- debug("\n num skipped: "); ++printf("%s%d", i > 0 ? ", " : "", boot_args.num_cores[i]); ++printf("\n num skipped: "); + for (i = 0; i < CVMX_MAX_NODES; i++) { +- debug("%s%d", i > 0 ? ", " : "", boot_args.num_skipped[i]); +- debug("\n coremask:\n"); ++printf("%s%d", i > 0 ? ", " : "", boot_args.num_skipped[i]); ++printf("\n coremask:\n"); + cvmx_coremask_dprint(&boot_args.coremask); + } + + if (boot_args.endbootargs) { +- debug("endbootargs set, adjusting argc from %d to %d, arg_count: %d, arg_start: %d\n", ++printf("endbootargs set, adjusting argc from %d to %d, arg_count: %d, arg_start: %d\n", + argc, argc - (arg_count + arg_start), arg_count, + arg_start); + argc -= (arg_count + arg_start); +@@ -460,7 +460,7 @@ int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, + return -1; + } + +- debug("Setting up boot descriptor block with core mask:\n"); ++printf("Setting up boot descriptor block with core mask:\n"); + cvmx_coremask_dprint(&core_mask); + + /* +@@ -493,7 +493,7 @@ int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, + first_core = cvmx_coremask_get_first_core(&coremask_to_run); + + cvmx_coremask_for_each_core(core, &coremask_to_run) { +- debug("%s: Activating core %d\n", __func__, core); ++printf("%s: Activating core %d\n", __func__, core); + + cvmx_bootinfo_array[core].core_mask = + cvmx_coremask_get32(&coremask_to_run); +@@ -539,7 +539,7 @@ int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, + arg2 = 0x1; /* Core 0 sets init core for Linux */ + arg3 = XKPHYS | virt_to_phys(&boot_desc[core]); + +- debug("## Transferring control to Linux (at address %p) ...\n", kernel); ++printf("## Transferring control to Linux (at address %p) ...\n", kernel); + + /* + * Flush cache before jumping to application. Let's flush the +@@ -582,11 +582,11 @@ int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, + * We need to send a NMI to get the cores out of their wait loop + */ + octeon_get_available_coremask(&avail_coremask); +- debug("Available coremask:\n"); ++printf("Available coremask:\n"); + cvmx_coremask_dprint(&avail_coremask); +- debug("Starting coremask:\n"); ++printf("Starting coremask:\n"); + cvmx_coremask_dprint(&coremask_to_run); +- debug("Sending NMIs to other cores\n"); ++printf("Sending NMIs to other cores\n"); + if (octeon_has_feature(OCTEON_FEATURE_CIU3)) { + u64 avail_cm; + int node; +@@ -596,7 +596,7 @@ int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, + node); + + if (avail_cm != 0) { +- debug("Sending NMI to node %d, coremask=0x%llx, CIU3_NMI=0x%llx\n", ++printf("Sending NMI to node %d, coremask=0x%llx, CIU3_NMI=0x%llx\n", + node, avail_cm, + (node > 0 ? -1ull : -2ull) & avail_cm); + csr_wr(CVMX_CIU3_NMI, +@@ -607,7 +607,7 @@ int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc, + csr_wr(CVMX_CIU_NMI, + -2ull & cvmx_coremask_get64(&avail_coremask)); + } +- debug("Done sending NMIs\n"); ++printf("Done sending NMIs\n"); + + /* Wait a short while for the other cores... */ + mdelay(100); +diff --git a/arch/mips/mach-octeon/cpu.c b/arch/mips/mach-octeon/cpu.c +index f56beb896..239516ac4 100644 +--- a/arch/mips/mach-octeon/cpu.c ++++ b/arch/mips/mach-octeon/cpu.c +@@ -65,7 +65,7 @@ static int get_clocks(void) + gd->cpu_clk = ref_clock * FIELD_GET(RST_BOOT_C_MUL, val); + gd->bus_clk = ref_clock * FIELD_GET(RST_BOOT_PNR_MUL, val); + +- debug("%s: cpu: %lu, bus: %lu\n", __func__, gd->cpu_clk, gd->bus_clk); ++printf("%s: cpu: %lu, bus: %lu\n", __func__, gd->cpu_clk, gd->bus_clk); + + return 0; + } +@@ -126,7 +126,7 @@ static int octeon_bootmem_init(void) + writeq((u64)__cvmx_bootmem_internal_get_desc_ptr() & 0x7fffffffull, + (void *)CKSEG0ADDR(BOOTLOADER_BOOTMEM_DESC_ADDR)); + +- debug("Reserving first 1MB of memory\n"); ++printf("Reserving first 1MB of memory\n"); + ret = cvmx_bootmem_reserve_memory(0, OCTEON_RESERVED_LOW_BOOT_MEM_SIZE, + "__low_reserved", 0); + if (!ret) +@@ -164,11 +164,11 @@ static int octeon_configure_load_memory(void) + } + } else { + size = simple_strtol(eptr, NULL, 16); +- debug("octeon_reserved_mem_load_size=0x%08x\n", size); ++printf("octeon_reserved_mem_load_size=0x%08x\n", size); + } + + if (size) { +- debug("Linux reserved load size 0x%08x\n", size); ++printf("Linux reserved load size 0x%08x\n", size); + eptr = env_get("octeon_reserved_mem_load_base"); + if (!eptr || !strcmp("auto", eptr)) { + u64 mem_top; +@@ -208,7 +208,7 @@ static int octeon_configure_load_memory(void) + if ((gd->ram_size > (256 << 20))) + mem_top += (256 << 20); + +- debug("Adjusted memory top is 0x%llx\n", mem_top); ++printf("Adjusted memory top is 0x%llx\n", mem_top); + addr = mem_top - size; + if (addr > (512 << 20)) + addr = (512 << 20); +@@ -243,7 +243,7 @@ static int octeon_configure_load_memory(void) + + snprintf(str, sizeof(str), "0x%x", addr); + env_set("loadaddr", str); +- debug("Setting load address to 0x%08x, size 0x%x\n", ++printf("Setting load address to 0x%08x, size 0x%x\n", + addr, size); + } + return 0; +@@ -263,7 +263,7 @@ static int init_pcie_console(void) + char iomux_name[128]; + int ret = 0; + +- debug("%s: stdin: %s, stdout: %s, stderr: %s\n", __func__, stdinname, ++printf("%s: stdin: %s, stdout: %s, stderr: %s\n", __func__, stdinname, + stdoutname, stderrname); + if (!stdinname) { + env_set("stdin", "serial"); +@@ -294,7 +294,7 @@ static int init_pcie_console(void) + ret = uclass_get_device_by_name(UCLASS_SERIAL, CONSOLE_NAME, + &pcie_console_dev); + if (ret || !pcie_console_dev) { +- debug("%s: No PCI console device %s found\n", __func__, ++printf("%s: No PCI console device %s found\n", __func__, + CONSOLE_NAME); + return 0; + } +@@ -346,7 +346,7 @@ static int init_pcie_console(void) + if (!stderr_set) + env_set("stderr", iomux_name); + +- debug("%s: stdin: %s, stdout: %s, stderr: %s, ret: %d\n", ++printf("%s: stdin: %s, stdout: %s, stderr: %s, ret: %d\n", + __func__, env_get("stdin"), env_get("stdout"), + env_get("stderr"), ret); + +@@ -361,7 +361,7 @@ static int init_bootcmd_console(void) + char iomux_name[128]; + int ret = 0; + +- debug("%s: stdin before: %s\n", __func__, ++printf("%s: stdin before: %s\n", __func__, + stdinname ? stdinname : "NONE"); + if (!stdinname) { + env_set("stdin", "serial"); +@@ -388,7 +388,7 @@ static int init_bootcmd_console(void) + env_set("stdin", iomux_name); + } + +- debug("%s: Set iomux and stdin to %s (ret: %d)\n", ++printf("%s: Set iomux and stdin to %s (ret: %d)\n", + __func__, iomux_name, ret); + return ret; + } +diff --git a/arch/mips/mach-octeon/cvmx-bootmem.c b/arch/mips/mach-octeon/cvmx-bootmem.c +index 12695df9b..81c803875 100644 +--- a/arch/mips/mach-octeon/cvmx-bootmem.c ++++ b/arch/mips/mach-octeon/cvmx-bootmem.c +@@ -285,7 +285,7 @@ static int __cvmx_bootmem_check_version(int exact_match) + major_version = CVMX_BOOTMEM_DESC_GET_FIELD(major_version); + if ((major_version > 3) || + (exact_match && major_version != exact_match)) { +- debug("ERROR: Incompatible bootmem descriptor version: %d.%d at addr: 0x%llx\n", ++printf("ERROR: Incompatible bootmem descriptor version: %d.%d at addr: 0x%llx\n", + major_version, + (int)CVMX_BOOTMEM_DESC_GET_FIELD(minor_version), + CAST_ULL(cvmx_bootmem_desc_addr)); +@@ -594,7 +594,7 @@ s64 cvmx_bootmem_phy_alloc(u64 req_size, u64 address_min, + u64 desired_min_addr, usable_max; + u64 align, align_mask; + +- debug("%s: req_size: 0x%llx, min_addr: 0x%llx, max_addr: 0x%llx, align: 0x%llx\n", ++printf("%s: req_size: 0x%llx, min_addr: 0x%llx, max_addr: 0x%llx, align: 0x%llx\n", + __func__, CAST_ULL(req_size), CAST_ULL(address_min), + CAST_ULL(address_max), CAST_ULL(alignment)); + +@@ -669,7 +669,7 @@ s64 cvmx_bootmem_phy_alloc(u64 req_size, u64 address_min, + /* Validate the free list ascending order */ + if (ent_size < CVMX_BOOTMEM_ALIGNMENT_SIZE || + (next_addr && ent_addr > next_addr)) { +- debug("ERROR: %s: bad free list ent: %#llx, next: %#llx\n", ++printf("ERROR: %s: bad free list ent: %#llx, next: %#llx\n", + __func__, CAST_ULL(ent_addr), + CAST_ULL(next_addr)); + goto error_out; +@@ -701,7 +701,7 @@ s64 cvmx_bootmem_phy_alloc(u64 req_size, u64 address_min, + + /* Bail if the search has resulted in no eligible free blocks */ + if (target_ent_addr == 0) { +- debug("%s: eligible free block not found\n", __func__); ++printf("%s: eligible free block not found\n", __func__); + goto error_out; + } + +@@ -710,7 +710,7 @@ s64 cvmx_bootmem_phy_alloc(u64 req_size, u64 address_min, + prev_addr = target_prev_addr; + ent_size = target_size; + +- debug("%s: using free block at %#010llx size %#llx\n", ++printf("%s: using free block at %#010llx size %#llx\n", + __func__, CAST_ULL(ent_addr), CAST_ULL(ent_size)); + + /* Always allocate from the end of a free block */ +@@ -735,7 +735,7 @@ s64 cvmx_bootmem_phy_alloc(u64 req_size, u64 address_min, + cvmx_bootmem_phy_set_next(ent_addr, new_ent_addr); + cvmx_bootmem_phy_set_size(ent_addr, ent_size); + +- debug("%s: splitting head, addr %#llx size %#llx\n", ++printf("%s: splitting head, addr %#llx size %#llx\n", + __func__, CAST_ULL(ent_addr), CAST_ULL(ent_size)); + + /* Make the allocation target the current free block */ +@@ -754,7 +754,7 @@ s64 cvmx_bootmem_phy_alloc(u64 req_size, u64 address_min, + cvmx_bootmem_phy_get_next(ent_addr)); + cvmx_bootmem_phy_set_size(new_ent_addr, new_ent_size); + +- debug("%s: splitting tail, addr %#llx size %#llx\n", ++printf("%s: splitting tail, addr %#llx size %#llx\n", + __func__, CAST_ULL(new_ent_addr), CAST_ULL(new_ent_size)); + + /* Adjust the current block to exclude tail room */ +@@ -765,7 +765,7 @@ s64 cvmx_bootmem_phy_alloc(u64 req_size, u64 address_min, + + /* The current free block IS the allocation target */ + if (desired_min_addr != ent_addr || ent_size != req_size) +- debug("ERROR: %s: internal error - addr %#llx %#llx size %#llx %#llx\n", ++printf("ERROR: %s: internal error - addr %#llx %#llx size %#llx %#llx\n", + __func__, CAST_ULL(desired_min_addr), CAST_ULL(ent_addr), + CAST_ULL(ent_size), CAST_ULL(req_size)); + +@@ -780,7 +780,7 @@ s64 cvmx_bootmem_phy_alloc(u64 req_size, u64 address_min, + } + + __cvmx_bootmem_unlock(flags); +- debug("%s: allocated size: %#llx, at addr: %#010llx\n", ++printf("%s: allocated size: %#llx, at addr: %#010llx\n", + __func__, + CAST_ULL(req_size), + CAST_ULL(desired_min_addr)); +@@ -799,7 +799,7 @@ int __cvmx_bootmem_phy_free(u64 phy_addr, u64 size, u32 flags) + u64 prev_addr = 0; /* zero is invalid */ + int retval = 0; + +- debug("%s addr: %#llx, size: %#llx\n", __func__, ++printf("%s addr: %#llx, size: %#llx\n", __func__, + CAST_ULL(phy_addr), CAST_ULL(size)); + + if (__cvmx_bootmem_check_version(0)) +@@ -912,7 +912,7 @@ void cvmx_bootmem_phy_list_print(void) + (int)CVMX_BOOTMEM_DESC_GET_FIELD(major_version), + (int)CVMX_BOOTMEM_DESC_GET_FIELD(minor_version)); + if (CVMX_BOOTMEM_DESC_GET_FIELD(major_version) > 3) +- debug("Warning: Bootmem descriptor version is newer than expected\n"); ++printf("Warning: Bootmem descriptor version is newer than expected\n"); + + if (!addr) + printf("mem list is empty!\n"); +@@ -947,7 +947,7 @@ u64 cvmx_bootmem_phy_named_block_find(const char *name, u32 flags) + { + u64 result = 0; + +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + __cvmx_bootmem_lock(flags); + if (!__cvmx_bootmem_check_version(3)) { +@@ -993,7 +993,7 @@ int cvmx_bootmem_phy_named_block_free(const char *name, u32 flags) + if (__cvmx_bootmem_check_version(3)) + return 0; + +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + /* + * Take lock here, as name lookup/block free/name free need to be +@@ -1010,7 +1010,7 @@ int cvmx_bootmem_phy_named_block_free(const char *name, u32 flags) + u64 named_size = + CVMX_BOOTMEM_NAMED_GET_FIELD(named_block_addr, size); + +- debug("%s: %s, base: 0x%llx, size: 0x%llx\n", ++printf("%s: %s, base: 0x%llx, size: 0x%llx\n", + __func__, name, CAST_ULL(named_addr), + CAST_ULL(named_size)); + +@@ -1033,7 +1033,7 @@ s64 cvmx_bootmem_phy_named_block_alloc(u64 size, u64 min_addr, + s64 addr_allocated; + u64 named_block_desc_addr; + +- debug("%s: size: 0x%llx, min: 0x%llx, max: 0x%llx, align: 0x%llx, name: %s\n", ++printf("%s: size: 0x%llx, min: 0x%llx, max: 0x%llx, align: 0x%llx, name: %s\n", + __func__, CAST_ULL(size), CAST_ULL(min_addr), CAST_ULL(max_addr), + CAST_ULL(alignment), name); + +@@ -1098,7 +1098,7 @@ void cvmx_bootmem_phy_named_block_print(void) + int name_length = CVMX_BOOTMEM_DESC_GET_FIELD(named_block_name_len); + u64 named_block_addr = named_block_array_addr; + +- debug("%s: desc addr: 0x%llx\n", ++printf("%s: desc addr: 0x%llx\n", + __func__, CAST_ULL(cvmx_bootmem_desc_addr)); + + if (__cvmx_bootmem_check_version(3)) +@@ -1136,7 +1136,7 @@ s64 cvmx_bootmem_phy_mem_list_init(u64 mem_size, + s64 addr; + int i; + +- debug("%s (arg desc ptr: %p, cvmx_bootmem_desc: 0x%llx)\n", ++printf("%s (arg desc ptr: %p, cvmx_bootmem_desc: 0x%llx)\n", + __func__, desc_buffer, CAST_ULL(cvmx_bootmem_desc_addr)); + + /* +@@ -1144,13 +1144,13 @@ s64 cvmx_bootmem_phy_mem_list_init(u64 mem_size, + * compatible with 32 bit applications + */ + if (!desc_buffer) { +- debug("ERROR: no memory for cvmx_bootmem descriptor provided\n"); ++printf("ERROR: no memory for cvmx_bootmem descriptor provided\n"); + return 0; + } + + if (mem_size > OCTEON_MAX_PHY_MEM_SIZE) { + mem_size = OCTEON_MAX_PHY_MEM_SIZE; +- debug("ERROR: requested memory size too large, truncating to maximum size\n"); ++printf("ERROR: requested memory size too large, truncating to maximum size\n"); + } + + if (cvmx_bootmem_desc_addr) +@@ -1209,11 +1209,11 @@ frees_done: + if (addr >= 0) + CVMX_BOOTMEM_DESC_SET_FIELD(named_block_array_addr, addr); + +- debug("%s: named_block_array_addr: 0x%llx)\n", ++printf("%s: named_block_array_addr: 0x%llx)\n", + __func__, CAST_ULL(addr)); + + if (addr < 0) { +- debug("FATAL ERROR: unable to allocate memory for bootmem descriptor!\n"); ++printf("FATAL ERROR: unable to allocate memory for bootmem descriptor!\n"); + return 0; + } + +@@ -1240,7 +1240,7 @@ s64 cvmx_bootmem_phy_mem_list_init_multi(u8 node_mask, + + mem_sizes[0] = gd->ram_size / (1024 * 1024); + +- debug("cvmx_bootmem_phy_mem_list_init (arg desc ptr: %p, cvmx_bootmem_desc: 0x%llx)\n", ++printf("cvmx_bootmem_phy_mem_list_init (arg desc ptr: %p, cvmx_bootmem_desc: 0x%llx)\n", + desc_buffer, CAST_ULL(cvmx_bootmem_desc_addr)); + + /* +@@ -1248,7 +1248,7 @@ s64 cvmx_bootmem_phy_mem_list_init_multi(u8 node_mask, + * compatible with 32 bit applications + */ + if (!desc_buffer) { +- debug("ERROR: no memory for cvmx_bootmem descriptor provided\n"); ++printf("ERROR: no memory for cvmx_bootmem descriptor provided\n"); + return 0; + } + +@@ -1256,7 +1256,7 @@ s64 cvmx_bootmem_phy_mem_list_init_multi(u8 node_mask, + if ((mem_sizes[node] * 1024 * 1024) > OCTEON_MAX_PHY_MEM_SIZE) { + mem_sizes[node] = OCTEON_MAX_PHY_MEM_SIZE / + (1024 * 1024); +- debug("ERROR node#%lld: requested memory size too large, truncating to maximum size\n", ++printf("ERROR node#%lld: requested memory size too large, truncating to maximum size\n", + CAST_ULL(node)); + } + } +@@ -1319,7 +1319,7 @@ s64 cvmx_bootmem_phy_mem_list_init_multi(u8 node_mask, + } + } + +- debug("%s: Initialize the named block\n", __func__); ++printf("%s: Initialize the named block\n", __func__); + + /* Initialize the named block structure */ + CVMX_BOOTMEM_DESC_SET_FIELD(named_block_name_len, CVMX_BOOTMEM_NAME_LEN); +@@ -1335,11 +1335,11 @@ s64 cvmx_bootmem_phy_mem_list_init_multi(u8 node_mask, + if (addr >= 0) + CVMX_BOOTMEM_DESC_SET_FIELD(named_block_array_addr, addr); + +- debug("cvmx_bootmem_phy_mem_list_init: named_block_array_addr: 0x%llx)\n", ++printf("cvmx_bootmem_phy_mem_list_init: named_block_array_addr: 0x%llx)\n", + CAST_ULL(addr)); + + if (addr < 0) { +- debug("FATAL ERROR: unable to allocate memory for bootmem descriptor!\n"); ++printf("FATAL ERROR: unable to allocate memory for bootmem descriptor!\n"); + return 0; + } + +@@ -1363,7 +1363,7 @@ int cvmx_bootmem_reserve_memory(u64 start_addr, u64 size, + static unsigned int block_num; + char block_name[CVMX_BOOTMEM_NAME_LEN]; + +- debug("%s: start %#llx, size: %#llx, name: %s, flags:%#x)\n", ++printf("%s: start %#llx, size: %#llx, name: %s, flags:%#x)\n", + __func__, CAST_ULL(start_addr), CAST_ULL(size), name, flags); + + if (__cvmx_bootmem_check_version(3)) +@@ -1395,7 +1395,7 @@ int cvmx_bootmem_reserve_memory(u64 start_addr, u64 size, + name, (unsigned long long)start_addr, + (unsigned int)block_num); + +- debug("%s: Reserving 0x%llx bytes at address 0x%llx with name %s\n", ++printf("%s: Reserving 0x%llx bytes at address 0x%llx with name %s\n", + __func__, CAST_ULL(reserve_size), + CAST_ULL(addr), block_name); + +@@ -1403,14 +1403,14 @@ int cvmx_bootmem_reserve_memory(u64 start_addr, u64 size, + addr, 0, 0, + block_name, + flags) == -1) { +- debug("%s: Failed to reserve 0x%llx bytes at address 0x%llx\n", ++printf("%s: Failed to reserve 0x%llx bytes at address 0x%llx\n", + __func__, CAST_ULL(reserve_size), + (unsigned long long)addr); + rc = 0; + break; + } + +- debug("%s: Reserved 0x%llx bytes at address 0x%llx with name %s\n", ++printf("%s: Reserved 0x%llx bytes at address 0x%llx with name %s\n", + __func__, CAST_ULL(reserve_size), + CAST_ULL(addr), block_name); + } +diff --git a/arch/mips/mach-octeon/cvmx-helper-cfg.c b/arch/mips/mach-octeon/cvmx-helper-cfg.c +index 6b7dd8ac4..cdee1e660 100644 +--- a/arch/mips/mach-octeon/cvmx-helper-cfg.c ++++ b/arch/mips/mach-octeon/cvmx-helper-cfg.c +@@ -362,7 +362,7 @@ static int cvmx_pko_queue_alloc(u64 port, int count) + ret_val = cvmx_allocate_global_resource_range(CVMX_GR_TAG_PKO_QUEUES, + port, count, 1); + +- debug("%s: pko_e_port=%i q_base=%i q_count=%i\n", ++printf("%s: pko_e_port=%i q_base=%i q_count=%i\n", + __func__, (int)port, ret_val, (int)count); + + if (ret_val == -1) +@@ -390,7 +390,7 @@ int cvmx_pko_queue_free(uint64_t port) + + init_cvmx_pko_que_range(); + if (port >= CVMX_HELPER_CFG_MAX_PKO_QUEUES) { +- debug("ERROR: %s port=%d > %d", __func__, (int)port, ++printf("ERROR: %s port=%d > %d", __func__, (int)port, + CVMX_HELPER_CFG_MAX_PKO_QUEUES); + return -1; + } +@@ -425,7 +425,7 @@ void cvmx_pko_queue_show(void) + for (i = 0; i < CVMX_HELPER_CFG_MAX_PKO_PORT; i++) + if (cvmx_pko_queue_table[i].ccppp_queue_base != + CVMX_HELPER_CFG_INVALID_VALUE) +- debug("port=%d que_base=%d que_num=%d\n", i, ++printf("port=%d que_base=%d que_num=%d\n", i, + (int)cvmx_pko_queue_table[i].ccppp_queue_base, + (int)cvmx_pko_queue_table[i].ccppp_num_queues); + } +@@ -435,16 +435,16 @@ void cvmx_helper_cfg_show_cfg(void) + int i, j; + + for (i = 0; i < cvmx_helper_get_number_of_interfaces(); i++) { +- debug("%s: interface%d mode %10s nports%4d\n", __func__, i, ++printf("%s: interface%d mode %10s nports%4d\n", __func__, i, + cvmx_helper_interface_mode_to_string(cvmx_helper_interface_get_mode(i)), + cvmx_helper_interface_enumerate(i)); + + for (j = 0; j < cvmx_helper_interface_enumerate(i); j++) { +- debug("\tpknd[%i][%d]%d", i, j, ++printf("\tpknd[%i][%d]%d", i, j, + __cvmx_helper_cfg_pknd(i, j)); +- debug(" pko_port_base[%i][%d]%d", i, j, ++printf(" pko_port_base[%i][%d]%d", i, j, + __cvmx_helper_cfg_pko_port_base(i, j)); +- debug(" pko_port_num[%i][%d]%d\n", i, j, ++printf(" pko_port_num[%i][%d]%d\n", i, j, + __cvmx_helper_cfg_pko_port_num(i, j)); + } + } +@@ -452,7 +452,7 @@ void cvmx_helper_cfg_show_cfg(void) + for (i = 0; i < CVMX_HELPER_CFG_MAX_PKO_PORT; i++) { + if (__cvmx_helper_cfg_pko_queue_base(i) != + CVMX_HELPER_CFG_INVALID_VALUE) { +- debug("%s: pko_port%d qbase%d nqueues%d interface%d index%d\n", ++printf("%s: pko_port%d qbase%d nqueues%d interface%d index%d\n", + __func__, i, __cvmx_helper_cfg_pko_queue_base(i), + __cvmx_helper_cfg_pko_queue_num(i), + __cvmx_helper_cfg_pko_port_interface(i), +@@ -1045,7 +1045,7 @@ int __cvmx_helper_init_port_config_data_local(void) + if (cvmx_import_app_config) { + rv = (*cvmx_import_app_config)(); + if (rv != 0) { +- debug("failed to import config\n"); ++printf("failed to import config\n"); + return -1; + } + } +@@ -1056,7 +1056,7 @@ int __cvmx_helper_init_port_config_data_local(void) + if (cvmx_import_app_config) { + rv = (*cvmx_import_app_config)(); + if (rv != 0) { +- debug("failed to import config\n"); ++printf("failed to import config\n"); + return -1; + } + } +@@ -1078,7 +1078,7 @@ int cvmx_pko_alloc_iport_and_queues(int interface, int port, int port_cnt, int q + int rv, p, port_start, cnt; + + if (dbg) +- debug("%s: intf %d/%d pcnt %d qcnt %d\n", __func__, interface, port, port_cnt, ++printf("%s: intf %d/%d pcnt %d qcnt %d\n", __func__, interface, port, port_cnt, + queue_cnt); + + if (!port_cfg_data_initialized) +@@ -1283,7 +1283,7 @@ int __cvmx_helper_init_port_config_data(int node) + if (init_req) { + rv = cvmx_pko_alloc_iport_and_queues(interface, port, 1, 1); + if (rv < 0) { +- debug("cvm_pko_alloc_iport_and_queues failed.\n"); ++printf("cvm_pko_alloc_iport_and_queues failed.\n"); + return rv; + } + } +diff --git a/arch/mips/mach-octeon/cvmx-helper-fdt.c b/arch/mips/mach-octeon/cvmx-helper-fdt.c +index 87bc6d2ad..53f3dba82 100644 +--- a/arch/mips/mach-octeon/cvmx-helper-fdt.c ++++ b/arch/mips/mach-octeon/cvmx-helper-fdt.c +@@ -249,7 +249,7 @@ int cvmx_sfp_set_ipd_port(struct cvmx_fdt_sfp_info *sfp, int ipd_port) + sfp->ipd_port[i] = -1; + break; + default: +- debug("%s: Interface mode %s for interface 0x%x, ipd_port %d not supported for QSFP\n", ++printf("%s: Interface mode %s for interface 0x%x, ipd_port %d not supported for QSFP\n", + __func__, cvmx_helper_interface_mode_to_string(mode), xiface, + ipd_port); + return -1; +@@ -290,7 +290,7 @@ static int cvmx_fdt_parse_vsc7224_channels(const void *fdt_addr, int of_offset, + bool is_qsfp; + const char *mac_str; + +- debug("%s(%p, %d, %s)\n", __func__, fdt_addr, of_offset, vsc7224->name); ++printf("%s(%p, %d, %s)\n", __func__, fdt_addr, of_offset, vsc7224->name); + do { + /* Walk through all channels */ + of_offset = fdt_node_offset_by_compatible(fdt_addr, of_offset, +@@ -298,7 +298,7 @@ static int cvmx_fdt_parse_vsc7224_channels(const void *fdt_addr, int of_offset, + if (of_offset == -FDT_ERR_NOTFOUND) { + break; + } else if (of_offset < 0) { +- debug("%s: Failed finding compatible channel\n", ++printf("%s: Failed finding compatible channel\n", + __func__); + err = -1; + break; +@@ -307,44 +307,44 @@ static int cvmx_fdt_parse_vsc7224_channels(const void *fdt_addr, int of_offset, + break; + reg = cvmx_fdt_get_int(fdt_addr, of_offset, "reg", -1); + if (reg < 0 || reg > 3) { +- debug("%s: channel reg is either not present or out of range\n", ++printf("%s: channel reg is either not present or out of range\n", + __func__); + err = -1; + break; + } + is_tx = cvmx_fdt_get_bool(fdt_addr, of_offset, "direction-tx"); + +- debug("%s(%s): Adding %cx channel %d\n", ++printf("%s(%s): Adding %cx channel %d\n", + __func__, vsc7224->name, is_tx ? 't' : 'r', + reg); + tap_values = (const uint32_t *)fdt_getprop(fdt_addr, of_offset, "taps", &len); + if (!tap_values) { +- debug("%s: Error: no taps defined for vsc7224 channel %d\n", ++printf("%s: Error: no taps defined for vsc7224 channel %d\n", + __func__, reg); + err = -1; + break; + } + + if (vsc7224->channel[reg]) { +- debug("%s: Error: channel %d already assigned at %p\n", ++printf("%s: Error: channel %d already assigned at %p\n", + __func__, reg, + vsc7224->channel[reg]); + err = -1; + break; + } + if (len % 16) { +- debug("%s: Error: tap format error for channel %d\n", ++printf("%s: Error: tap format error for channel %d\n", + __func__, reg); + err = -1; + break; + } + num_taps = len / 16; +- debug("%s: Adding %d taps\n", __func__, num_taps); ++printf("%s: Adding %d taps\n", __func__, num_taps); + + channel = __cvmx_fdt_alloc(sizeof(*channel) + + num_taps * sizeof(struct cvmx_vsc7224_tap)); + if (!channel) { +- debug("%s: Out of memory\n", __func__); ++printf("%s: Out of memory\n", __func__); + err = -1; + break; + } +@@ -363,7 +363,7 @@ static int cvmx_fdt_parse_vsc7224_channels(const void *fdt_addr, int of_offset, + channel->taps[i].main_tap = fdt32_to_cpu(tap_values[i * 4 + 1]); + channel->taps[i].pre_tap = fdt32_to_cpu(tap_values[i * 4 + 2]); + channel->taps[i].post_tap = fdt32_to_cpu(tap_values[i * 4 + 3]); +- debug("%s: tap %d: len: %d, main_tap: 0x%x, pre_tap: 0x%x, post_tap: 0x%x\n", ++printf("%s: tap %d: len: %d, main_tap: 0x%x, pre_tap: 0x%x, post_tap: 0x%x\n", + __func__, i, channel->taps[i].len, channel->taps[i].main_tap, + channel->taps[i].pre_tap, channel->taps[i].post_tap); + } +@@ -377,34 +377,34 @@ static int cvmx_fdt_parse_vsc7224_channels(const void *fdt_addr, int of_offset, + is_qsfp = true; + mac_str = "qsfp-mac"; + } else { +- debug("%s: Error: MAC not found for %s channel %d\n", __func__, ++printf("%s: Error: MAC not found for %s channel %d\n", __func__, + vsc7224->name, reg); + return -1; + } + of_mac = cvmx_fdt_lookup_phandle(fdt_addr, of_offset, mac_str); + if (of_mac < 0) { +- debug("%s: Error %d with MAC %s phandle for %s\n", __func__, of_mac, ++printf("%s: Error %d with MAC %s phandle for %s\n", __func__, of_mac, + mac_str, vsc7224->name); + return -1; + } + +- debug("%s: Found mac at offset %d\n", __func__, of_mac); ++printf("%s: Found mac at offset %d\n", __func__, of_mac); + err = cvmx_helper_cfg_get_xiface_index_by_fdt_node_offset(of_mac, &xiface, &index); + if (!err) { + channel->xiface = xiface; + channel->index = index; + channel->ipd_port = cvmx_helper_get_ipd_port(xiface, index); + +- debug("%s: Found MAC, xiface: 0x%x, index: %d, ipd port: %d\n", __func__, ++printf("%s: Found MAC, xiface: 0x%x, index: %d, ipd port: %d\n", __func__, + xiface, index, channel->ipd_port); + if (channel->ipd_port >= 0) { + cvmx_helper_cfg_set_vsc7224_chan_info(xiface, index, channel); +- debug("%s: Storing config channel for xiface 0x%x, index %d\n", ++printf("%s: Storing config channel for xiface 0x%x, index %d\n", + __func__, xiface, index); + } + sfp_info = cvmx_helper_cfg_get_sfp_info(xiface, index); + if (!sfp_info) { +- debug("%s: Warning: no (Q)SFP+ slot found for xinterface 0x%x, index %d for channel %d\n", ++printf("%s: Warning: no (Q)SFP+ slot found for xinterface 0x%x, index %d for channel %d\n", + __func__, xiface, index, channel->lane); + continue; + } +@@ -415,10 +415,10 @@ static int cvmx_fdt_parse_vsc7224_channels(const void *fdt_addr, int of_offset, + sfp_info->vsc7224_chan->prev = channel; + sfp_info->vsc7224_chan = channel; + sfp_info->is_vsc7224 = true; +- debug("%s: Registering VSC7224 %s channel %d with SFP %s\n", __func__, ++printf("%s: Registering VSC7224 %s channel %d with SFP %s\n", __func__, + vsc7224->name, channel->lane, sfp_info->name); + if (!sfp_info->mod_abs_changed) { +- debug("%s: Registering cvmx_sfp_vsc7224_mod_abs_changed at %p for xinterface 0x%x, index %d\n", ++printf("%s: Registering cvmx_sfp_vsc7224_mod_abs_changed at %p for xinterface 0x%x, index %d\n", + __func__, &cvmx_sfp_vsc7224_mod_abs_changed, xiface, index); + cvmx_sfp_register_mod_abs_changed( + sfp_info, +@@ -448,21 +448,21 @@ int __cvmx_fdt_parse_vsc7224(const void *fdt_addr) + int of_parent; + static bool parsed; + +- debug("%s(%p)\n", __func__, fdt_addr); ++printf("%s(%p)\n", __func__, fdt_addr); + + if (parsed) { +- debug("%s: Already parsed\n", __func__); ++printf("%s: Already parsed\n", __func__); + return 0; + } + do { + of_offset = fdt_node_offset_by_compatible(fdt_addr, of_offset, + "vitesse,vsc7224"); +- debug("%s: of_offset: %d\n", __func__, of_offset); ++printf("%s: of_offset: %d\n", __func__, of_offset); + if (of_offset == -FDT_ERR_NOTFOUND) { + break; + } else if (of_offset < 0) { + err = -1; +- debug("%s: Error %d parsing FDT\n", ++printf("%s: Error %d parsing FDT\n", + __func__, of_offset); + break; + } +@@ -470,7 +470,7 @@ int __cvmx_fdt_parse_vsc7224(const void *fdt_addr) + vsc7224 = __cvmx_fdt_alloc(sizeof(*vsc7224)); + + if (!vsc7224) { +- debug("%s: Out of memory!\n", __func__); ++printf("%s: Out of memory!\n", __func__); + return -1; + } + vsc7224->of_offset = of_offset; +@@ -479,17 +479,17 @@ int __cvmx_fdt_parse_vsc7224(const void *fdt_addr) + of_parent = fdt_parent_offset(fdt_addr, of_offset); + vsc7224->i2c_bus = cvmx_fdt_get_i2c_bus(fdt_addr, of_parent); + if (vsc7224->i2c_addr < 0) { +- debug("%s: Error: reg field missing\n", __func__); ++printf("%s: Error: reg field missing\n", __func__); + err = -1; + break; + } + if (!vsc7224->i2c_bus) { +- debug("%s: Error getting i2c bus\n", __func__); ++printf("%s: Error getting i2c bus\n", __func__); + err = -1; + break; + } + vsc7224->name = fdt_get_name(fdt_addr, of_offset, NULL); +- debug("%s: Adding %s\n", __func__, vsc7224->name); ++printf("%s: Adding %s\n", __func__, vsc7224->name); + if (fdt_getprop(fdt_addr, of_offset, "reset", NULL)) { + gpio_info = cvmx_fdt_gpio_get_info_phandle(fdt_addr, of_offset, "reset"); + vsc7224->reset_gpio = gpio_info; +@@ -498,16 +498,16 @@ int __cvmx_fdt_parse_vsc7224(const void *fdt_addr) + gpio_info = cvmx_fdt_gpio_get_info_phandle(fdt_addr, of_offset, "los"); + vsc7224->los_gpio = gpio_info; + } +- debug("%s: Parsing channels\n", __func__); ++printf("%s: Parsing channels\n", __func__); + err = cvmx_fdt_parse_vsc7224_channels(fdt_addr, of_offset, vsc7224); + if (err) { +- debug("%s: Error parsing VSC7224 channels\n", __func__); ++printf("%s: Error parsing VSC7224 channels\n", __func__); + break; + } + } while (of_offset > 0); + + if (err) { +- debug("%s(): Error\n", __func__); ++printf("%s(): Error\n", __func__); + if (vsc7224) { + if (vsc7224->reset_gpio) + __cvmx_fdt_free(vsc7224->reset_gpio, sizeof(*vsc7224->reset_gpio)); +@@ -545,29 +545,29 @@ int __cvmx_fdt_parse_avsp5410(const void *fdt_addr) + bool is_qsfp; + const char *mac_str; + +- debug("%s(%p)\n", __func__, fdt_addr); ++printf("%s(%p)\n", __func__, fdt_addr); + + if (parsed) { +- debug("%s: Already parsed\n", __func__); ++printf("%s: Already parsed\n", __func__); + return 0; + } + + do { + of_offset = fdt_node_offset_by_compatible(fdt_addr, of_offset, + "avago,avsp-5410"); +- debug("%s: of_offset: %d\n", __func__, of_offset); ++printf("%s: of_offset: %d\n", __func__, of_offset); + if (of_offset == -FDT_ERR_NOTFOUND) { + break; + } else if (of_offset < 0) { + err = -1; +- debug("%s: Error %d parsing FDT\n", __func__, of_offset); ++printf("%s: Error %d parsing FDT\n", __func__, of_offset); + break; + } + + avsp5410 = __cvmx_fdt_alloc(sizeof(*avsp5410)); + + if (!avsp5410) { +- debug("%s: Out of memory!\n", __func__); ++printf("%s: Out of memory!\n", __func__); + return -1; + } + avsp5410->of_offset = of_offset; +@@ -576,17 +576,17 @@ int __cvmx_fdt_parse_avsp5410(const void *fdt_addr) + of_parent = fdt_parent_offset(fdt_addr, of_offset); + avsp5410->i2c_bus = cvmx_fdt_get_i2c_bus(fdt_addr, of_parent); + if (avsp5410->i2c_addr < 0) { +- debug("%s: Error: reg field missing\n", __func__); ++printf("%s: Error: reg field missing\n", __func__); + err = -1; + break; + } + if (!avsp5410->i2c_bus) { +- debug("%s: Error getting i2c bus\n", __func__); ++printf("%s: Error getting i2c bus\n", __func__); + err = -1; + break; + } + avsp5410->name = fdt_get_name(fdt_addr, of_offset, NULL); +- debug("%s: Adding %s\n", __func__, avsp5410->name); ++printf("%s: Adding %s\n", __func__, avsp5410->name); + + /* Now find out which interface it's mapped to */ + avsp5410->ipd_port = -1; +@@ -598,43 +598,43 @@ int __cvmx_fdt_parse_avsp5410(const void *fdt_addr) + is_qsfp = true; + mac_str = "qsfp-mac"; + } else { +- debug("%s: Error: MAC not found for %s\n", __func__, avsp5410->name); ++printf("%s: Error: MAC not found for %s\n", __func__, avsp5410->name); + return -1; + } + of_mac = cvmx_fdt_lookup_phandle(fdt_addr, of_offset, mac_str); + if (of_mac < 0) { +- debug("%s: Error %d with MAC %s phandle for %s\n", __func__, of_mac, ++printf("%s: Error %d with MAC %s phandle for %s\n", __func__, of_mac, + mac_str, avsp5410->name); + return -1; + } + +- debug("%s: Found mac at offset %d\n", __func__, of_mac); ++printf("%s: Found mac at offset %d\n", __func__, of_mac); + err = cvmx_helper_cfg_get_xiface_index_by_fdt_node_offset(of_mac, &xiface, &index); + if (!err) { + avsp5410->xiface = xiface; + avsp5410->index = index; + avsp5410->ipd_port = cvmx_helper_get_ipd_port(xiface, index); + +- debug("%s: Found MAC, xiface: 0x%x, index: %d, ipd port: %d\n", __func__, ++printf("%s: Found MAC, xiface: 0x%x, index: %d, ipd port: %d\n", __func__, + xiface, index, avsp5410->ipd_port); + if (avsp5410->ipd_port >= 0) { + cvmx_helper_cfg_set_avsp5410_info(xiface, index, avsp5410); +- debug("%s: Storing config phy for xiface 0x%x, index %d\n", ++printf("%s: Storing config phy for xiface 0x%x, index %d\n", + __func__, xiface, index); + } + sfp_info = cvmx_helper_cfg_get_sfp_info(xiface, index); + if (!sfp_info) { +- debug("%s: Warning: no (Q)SFP+ slot found for xinterface 0x%x, index %d\n", ++printf("%s: Warning: no (Q)SFP+ slot found for xinterface 0x%x, index %d\n", + __func__, xiface, index); + continue; + } + + sfp_info->is_avsp5410 = true; + sfp_info->avsp5410 = avsp5410; +- debug("%s: Registering AVSP5410 %s with SFP %s\n", __func__, avsp5410->name, ++printf("%s: Registering AVSP5410 %s with SFP %s\n", __func__, avsp5410->name, + sfp_info->name); + if (!sfp_info->mod_abs_changed) { +- debug("%s: Registering cvmx_sfp_avsp5410_mod_abs_changed at %p for xinterface 0x%x, index %d\n", ++printf("%s: Registering cvmx_sfp_avsp5410_mod_abs_changed at %p for xinterface 0x%x, index %d\n", + __func__, &cvmx_sfp_avsp5410_mod_abs_changed, xiface, index); + cvmx_sfp_register_mod_abs_changed( + sfp_info, +@@ -645,7 +645,7 @@ int __cvmx_fdt_parse_avsp5410(const void *fdt_addr) + } while (of_offset > 0); + + if (err) { +- debug("%s(): Error\n", __func__); ++printf("%s(): Error\n", __func__); + if (avsp5410) { + if (avsp5410->i2c_bus) + cvmx_fdt_free_i2c_bus(avsp5410->i2c_bus); +@@ -710,21 +710,21 @@ static int cvmx_parse_sfp_eeprom(const void *fdt_addr, int of_offset, + int of_eeprom; + int of_diag; + +- debug("%s(%p, %d, %s)\n", __func__, fdt_addr, of_offset, sfp_info->name); ++printf("%s(%p, %d, %s)\n", __func__, fdt_addr, of_offset, sfp_info->name); + of_eeprom = cvmx_fdt_lookup_phandle(fdt_addr, of_offset, "eeprom"); + if (of_eeprom < 0) { +- debug("%s: Missing \"eeprom\" from device tree for %s\n", __func__, sfp_info->name); ++printf("%s: Missing \"eeprom\" from device tree for %s\n", __func__, sfp_info->name); + return -1; + } + + sfp_info->i2c_bus = cvmx_fdt_get_i2c_bus(fdt_addr, fdt_parent_offset(fdt_addr, of_eeprom)); + sfp_info->i2c_eeprom_addr = cvmx_fdt_get_int(fdt_addr, of_eeprom, "reg", 0x50); + +- debug("%s(%p, %d, %s, %d)\n", __func__, fdt_addr, of_offset, sfp_info->name, ++printf("%s(%p, %d, %s, %d)\n", __func__, fdt_addr, of_offset, sfp_info->name, + sfp_info->i2c_eeprom_addr); + + if (!sfp_info->i2c_bus) { +- debug("%s: Error: could not determine i2c bus for eeprom for %s\n", __func__, ++printf("%s: Error: could not determine i2c bus for eeprom for %s\n", __func__, + sfp_info->name); + return -1; + } +@@ -754,15 +754,15 @@ struct cvmx_fdt_sfp_info *cvmx_helper_fdt_parse_sfp_info(const void *fdt_addr, i + } else if (!fdt_node_check_compatible(fdt_addr, of_offset, "ethernet,qsfp-slot")) { + is_qsfp = true; + } else { +- debug("%s: Error: incompatible sfp/qsfp slot, compatible=%s\n", __func__, ++printf("%s: Error: incompatible sfp/qsfp slot, compatible=%s\n", __func__, + (char *)fdt_getprop(fdt_addr, of_offset, "compatible", NULL)); + goto error_exit; + } + +- debug("%s: %ssfp module found at offset %d\n", __func__, is_qsfp ? "q" : "", of_offset); ++printf("%s: %ssfp module found at offset %d\n", __func__, is_qsfp ? "q" : "", of_offset); + sfp_info = __cvmx_fdt_alloc(sizeof(*sfp_info)); + if (!sfp_info) { +- debug("%s: Error: out of memory\n", __func__); ++printf("%s: Error: out of memory\n", __func__); + goto error_exit; + } + sfp_info->name = fdt_get_name(fdt_addr, of_offset, NULL); +@@ -776,14 +776,14 @@ struct cvmx_fdt_sfp_info *cvmx_helper_fdt_parse_sfp_info(const void *fdt_addr, i + else + err = cvmx_parse_sfp(fdt_addr, of_offset, sfp_info); + if (err) { +- debug("%s: Error in %s parsing %ssfp GPIO info\n", __func__, sfp_info->name, ++printf("%s: Error in %s parsing %ssfp GPIO info\n", __func__, sfp_info->name, + is_qsfp ? "q" : ""); + goto error_exit; + } +- debug("%s: Parsing %ssfp module eeprom\n", __func__, is_qsfp ? "q" : ""); ++printf("%s: Parsing %ssfp module eeprom\n", __func__, is_qsfp ? "q" : ""); + err = cvmx_parse_sfp_eeprom(fdt_addr, of_offset, sfp_info); + if (err) { +- debug("%s: Error parsing eeprom info for %s\n", __func__, sfp_info->name); ++printf("%s: Error parsing eeprom info for %s\n", __func__, sfp_info->name); + goto error_exit; + } + +@@ -819,20 +819,20 @@ static int cvmx_fdt_parse_cs4343_slice(const void *fdt_addr, int of_offset, + reg_offset = cvmx_fdt_get_int(fdt_addr, of_offset, "slice_offset", -1); + + if (reg < 0 || reg >= 4) { +- debug("%s(%p, %d, %p): Error: reg %d undefined or out of range\n", __func__, ++printf("%s(%p, %d, %p): Error: reg %d undefined or out of range\n", __func__, + fdt_addr, of_offset, phy_info, reg); + return -1; + } + if (reg_offset % 0x1000 || reg_offset > 0x3000 || reg_offset < 0) { +- debug("%s(%p, %d, %p): Error: reg_offset 0x%x undefined or out of range\n", ++printf("%s(%p, %d, %p): Error: reg_offset 0x%x undefined or out of range\n", + __func__, fdt_addr, of_offset, phy_info, reg_offset); + return -1; + } + if (!phy_info->cs4343_info) { +- debug("%s: Error: phy info cs4343 datastructure is NULL\n", __func__); ++printf("%s: Error: phy info cs4343 datastructure is NULL\n", __func__); + return -1; + } +- debug("%s(%p, %d, %p): %s, reg: %d, slice offset: 0x%x\n", __func__, fdt_addr, of_offset, ++printf("%s(%p, %d, %p): %s, reg: %d, slice offset: 0x%x\n", __func__, fdt_addr, of_offset, + phy_info, fdt_get_name(fdt_addr, of_offset, NULL), reg, reg_offset); + slice = &phy_info->cs4343_info->slice[reg]; + slice->name = fdt_get_name(fdt_addr, of_offset, NULL); +@@ -914,7 +914,7 @@ int cvmx_fdt_parse_cs4343(const void *fdt_addr, int of_offset, struct cvmx_phy_i + int err = -1; + int reg; + +- debug("%s(%p, %d, %p): %s (%s)\n", __func__, ++printf("%s(%p, %d, %p): %s (%s)\n", __func__, + fdt_addr, of_offset, phy_info, + fdt_get_name(fdt_addr, of_offset, NULL), + (const char *)fdt_getprop(fdt_addr, of_offset, "compatible", NULL)); +@@ -922,7 +922,7 @@ int cvmx_fdt_parse_cs4343(const void *fdt_addr, int of_offset, struct cvmx_phy_i + if (!phy_info->cs4343_info) + phy_info->cs4343_info = __cvmx_fdt_alloc(sizeof(struct cvmx_cs4343_info)); + if (!phy_info->cs4343_info) { +- debug("%s: Error: out of memory!\n", __func__); ++printf("%s: Error: out of memory!\n", __func__); + return -1; + } + cs4343 = phy_info->cs4343_info; +@@ -943,7 +943,7 @@ int cvmx_fdt_parse_cs4343(const void *fdt_addr, int of_offset, struct cvmx_phy_i + fdt_node_offset_by_compatible(fdt_addr, of_offset, "cortina,cs4343-slice"); + while (of_slice > 0 && fdt_parent_offset(fdt_addr, of_slice) == + of_offset) { +- debug("%s: Parsing slice %s\n", __func__, ++printf("%s: Parsing slice %s\n", __func__, + fdt_get_name(fdt_addr, of_slice, NULL)); + err = cvmx_fdt_parse_cs4343_slice(fdt_addr, of_slice, + phy_info); +@@ -954,7 +954,7 @@ int cvmx_fdt_parse_cs4343(const void *fdt_addr, int of_offset, struct cvmx_phy_i + "cortina,cs4343-slice"); + } + } else { +- debug("%s: Error: unknown compatible string %s for %s\n", __func__, ++printf("%s: Error: unknown compatible string %s for %s\n", __func__, + (const char *)fdt_getprop(fdt_addr, of_offset, + "compatible", NULL), + fdt_get_name(fdt_addr, of_offset, NULL)); +diff --git a/arch/mips/mach-octeon/cvmx-helper-util.c b/arch/mips/mach-octeon/cvmx-helper-util.c +index 4625b4591..711b0b08c 100644 +--- a/arch/mips/mach-octeon/cvmx-helper-util.c ++++ b/arch/mips/mach-octeon/cvmx-helper-util.c +@@ -202,20 +202,20 @@ int cvmx_helper_dump_packet(cvmx_wqe_t *work) + cvmx_pki_dump_wqe(wqe); + cvmx_wqe_pki_errata_20776(work); + } else { +- debug("WORD0 = %lx\n", (unsigned long)work->word0.u64); +- debug("WORD1 = %lx\n", (unsigned long)work->word1.u64); +- debug("WORD2 = %lx\n", (unsigned long)work->word2.u64); +- debug("Packet Length: %u\n", cvmx_wqe_get_len(work)); +- debug(" Input Port: %u\n", cvmx_wqe_get_port(work)); +- debug(" QoS: %u\n", cvmx_wqe_get_qos(work)); +- debug(" Buffers: %u\n", cvmx_wqe_get_bufs(work)); ++printf("WORD0 = %lx\n", (unsigned long)work->word0.u64); ++printf("WORD1 = %lx\n", (unsigned long)work->word1.u64); ++printf("WORD2 = %lx\n", (unsigned long)work->word2.u64); ++printf("Packet Length: %u\n", cvmx_wqe_get_len(work)); ++printf(" Input Port: %u\n", cvmx_wqe_get_port(work)); ++printf(" QoS: %u\n", cvmx_wqe_get_qos(work)); ++printf(" Buffers: %u\n", cvmx_wqe_get_bufs(work)); + } + + if (cvmx_wqe_get_bufs(work) == 0) { + int wqe_pool; + + if (octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE)) { +- debug("%s: ERROR: Unexpected bufs==0 in WQE\n", __func__); ++printf("%s: ERROR: Unexpected bufs==0 in WQE\n", __func__); + return -1; + } + wqe_pool = (int)cvmx_fpa_get_wqe_pool(); +@@ -255,40 +255,40 @@ int cvmx_helper_dump_packet(cvmx_wqe_t *work) + bptr.u64 = buffer_ptr.u64; + /* XXX- assumes cache-line aligned buffer */ + start_of_buffer = (bptr.addr >> 7) << 7; +- debug(" Buffer Start:%llx\n", (unsigned long long)start_of_buffer); +- debug(" Buffer Data: %llx\n", (unsigned long long)bptr.addr); +- debug(" Buffer Size: %u\n", bptr.size); ++printf(" Buffer Start:%llx\n", (unsigned long long)start_of_buffer); ++printf(" Buffer Data: %llx\n", (unsigned long long)bptr.addr); ++printf(" Buffer Size: %u\n", bptr.size); + data_address = (uint8_t *)cvmx_phys_to_ptr(bptr.addr); + end_of_data = data_address + bptr.size; + } else { + start_of_buffer = ((buffer_ptr.s.addr >> 7) - buffer_ptr.s.back) << 7; +- debug(" Buffer Start:%llx\n", (unsigned long long)start_of_buffer); +- debug(" Buffer I : %u\n", buffer_ptr.s.i); +- debug(" Buffer Back: %u\n", buffer_ptr.s.back); +- debug(" Buffer Pool: %u\n", buffer_ptr.s.pool); +- debug(" Buffer Data: %llx\n", (unsigned long long)buffer_ptr.s.addr); +- debug(" Buffer Size: %u\n", buffer_ptr.s.size); ++printf(" Buffer Start:%llx\n", (unsigned long long)start_of_buffer); ++printf(" Buffer I : %u\n", buffer_ptr.s.i); ++printf(" Buffer Back: %u\n", buffer_ptr.s.back); ++printf(" Buffer Pool: %u\n", buffer_ptr.s.pool); ++printf(" Buffer Data: %llx\n", (unsigned long long)buffer_ptr.s.addr); ++printf(" Buffer Size: %u\n", buffer_ptr.s.size); + data_address = (uint8_t *)cvmx_phys_to_ptr(buffer_ptr.s.addr); + end_of_data = data_address + buffer_ptr.s.size; + } + +- debug("\t\t"); ++printf("\t\t"); + count = 0; + while (data_address < end_of_data) { + if (remaining_bytes == 0) + break; + + remaining_bytes--; +- debug("%02x", (unsigned int)*data_address); ++printf("%02x", (unsigned int)*data_address); + data_address++; + if (remaining_bytes && count == 7) { +- debug("\n\t\t"); ++printf("\n\t\t"); + count = 0; + } else { + count++; + } + } +- debug("\n"); ++printf("\n"); + + if (remaining_bytes) { + if (octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE) && +@@ -784,7 +784,7 @@ int __cvmx_helper_setup_gmx(int xiface, int num_ports) + case CVMX_HELPER_INTERFACE_MODE_XAUI: + case CVMX_HELPER_INTERFACE_MODE_RXAUI: + if (num_ports > 4) { +- debug("%s: Illegal num_ports\n", __func__); ++printf("%s: Illegal num_ports\n", __func__); + return -1; + } + +@@ -934,7 +934,7 @@ int cvmx_helper_get_ipd_port(int xiface, int index) + return ipd_port + index; + } + +- debug("ERROR: %s: interface %u:%u bad mode\n", ++printf("ERROR: %s: interface %u:%u bad mode\n", + __func__, xi.node, xi.interface); + return -1; + } else if (cvmx_helper_interface_get_mode(xiface) == +@@ -997,12 +997,12 @@ void cvmx_helper_show_stats(int port) + + /* PIP stats */ + cvmx_pip_get_port_stats(port, 0, &status); +- debug("port %d: the number of packets - ipd: %d\n", port, ++printf("port %d: the number of packets - ipd: %d\n", port, + (int)status.packets); + + /* PKO stats */ + cvmx_pko_get_port_status(port, 0, &pko_status); +- debug("port %d: the number of packets - pko: %d\n", port, ++printf("port %d: the number of packets - pko: %d\n", port, + (int)pko_status.packets); + + /* TODO: other stats */ +@@ -1086,7 +1086,7 @@ int cvmx_helper_get_interface_num(int ipd_port) + else if (ipd_port < 48) + return 7; + +- debug("%s: Illegal IPD port number %d\n", __func__, ipd_port); ++printf("%s: Illegal IPD port number %d\n", __func__, ipd_port); + return -1; + } + +@@ -1183,7 +1183,7 @@ int cvmx_helper_get_interface_index_num(int ipd_port) + else if (ipd_port < 48) + return ipd_port & 1; + +- debug("%s: Illegal IPD port number\n", __func__); ++printf("%s: Illegal IPD port number\n", __func__); + + return -1; + } +@@ -1203,21 +1203,21 @@ void cvmx_print_buffer_u8(unsigned int addr, const uint8_t *buffer, + while (count) { + unsigned int linelen = count < 16 ? count : 16; + +- debug("%08x:", addr); ++printf("%08x:", addr); + + for (i = 0; i < linelen; i++) +- debug(" %0*x", 2, buffer[i]); ++printf(" %0*x", 2, buffer[i]); + + while (i++ < 17) +- debug(" "); ++printf(" "); + + for (i = 0; i < linelen; i++) { + if (buffer[i] >= 0x20 && buffer[i] < 0x7f) +- debug("%c", buffer[i]); ++printf("%c", buffer[i]); + else +- debug("."); ++printf("."); + } +- debug("\n"); ++printf("\n"); + addr += linelen; + buffer += linelen; + count -= linelen; +diff --git a/arch/mips/mach-octeon/cvmx-helper.c b/arch/mips/mach-octeon/cvmx-helper.c +index 529e03a14..7f6086f5e 100644 +--- a/arch/mips/mach-octeon/cvmx-helper.c ++++ b/arch/mips/mach-octeon/cvmx-helper.c +@@ -428,7 +428,7 @@ int __cvmx_helper_init_interface(int xiface, int num_ipd_ports, int has_fcs, + (cvmx_helper_link_info_t *)__cvmx_phys_addr_to_ptr(addr, sz); + if (!piface->cvif_ipd_port_link_info) { + if (sz != 0) +- debug("iface %d failed to alloc link info\n", xi.interface); ++printf("iface %d failed to alloc link info\n", xi.interface); + return -1; + } + +@@ -1776,7 +1776,7 @@ int cvmx_helper_shutdown_packet_io_global_cn78xx(int node) + } + + if (result > 0) +- debug("%s: Purged %d packets from SSO\n", __func__, result); ++printf("%s: Purged %d packets from SSO\n", __func__, result); + + /* + * No need to wait for PKO queues to drain, +@@ -1887,7 +1887,7 @@ int cvmx_helper_shutdown_packet_io_global(void) + /* Step 2: Wait for the PKO queues to drain */ + result = __cvmx_helper_pko_drain(); + if (result < 0) { +- debug("WARNING: %s: Failed to drain some PKO queues\n", ++printf("WARNING: %s: Failed to drain some PKO queues\n", + __func__); + } + +@@ -1946,12 +1946,12 @@ int cvmx_helper_shutdown_packet_io_global(void) + interface * 0x800 + index * 0x100 + 0x880); + if (CVMX_WAIT_FOR_FIELD64(CVMX_DBG_DATA, union cvmx_dbg_data, + data & 7, ==, 0, timeout * 1000000)) { +- debug("GMX RX path timeout waiting for idle\n"); ++printf("GMX RX path timeout waiting for idle\n"); + result = -1; + } + if (CVMX_WAIT_FOR_FIELD64(CVMX_DBG_DATA, union cvmx_dbg_data, + data & 0xf, ==, 0, timeout * 1000000)) { +- debug("GMX TX path timeout waiting for idle\n"); ++printf("GMX TX path timeout waiting for idle\n"); + result = -1; + } + } +@@ -1980,13 +1980,13 @@ int cvmx_helper_shutdown_packet_io_global(void) + if (CVMX_WAIT_FOR_FIELD64(CVMX_GMXX_PRTX_CFG(index, interface), + union cvmx_gmxx_prtx_cfg, rx_idle, ==, 1, + timeout * 1000000)) { +- debug("GMX RX path timeout waiting for idle\n"); ++printf("GMX RX path timeout waiting for idle\n"); + result = -1; + } + if (CVMX_WAIT_FOR_FIELD64(CVMX_GMXX_PRTX_CFG(index, interface), + union cvmx_gmxx_prtx_cfg, tx_idle, ==, 1, + timeout * 1000000)) { +- debug("GMX TX path timeout waiting for idle\n"); ++printf("GMX TX path timeout waiting for idle\n"); + result = -1; + } + /* For SGMII some PHYs require that the PCS +@@ -2016,13 +2016,13 @@ int cvmx_helper_shutdown_packet_io_global(void) + if (CVMX_WAIT_FOR_FIELD64(CVMX_AGL_GMX_PRTX_CFG(port), + union cvmx_agl_gmx_prtx_cfg, rx_idle, ==, 1, + timeout * 1000000)) { +- debug("AGL RX path timeout waiting for idle\n"); ++printf("AGL RX path timeout waiting for idle\n"); + result = -1; + } + if (CVMX_WAIT_FOR_FIELD64(CVMX_AGL_GMX_PRTX_CFG(port), + union cvmx_agl_gmx_prtx_cfg, tx_idle, ==, 1, + timeout * 1000000)) { +- debug("AGL TX path timeout waiting for idle\n"); ++printf("AGL TX path timeout waiting for idle\n"); + result = -1; + } + } break; +@@ -2136,7 +2136,7 @@ int cvmx_helper_shutdown_packet_io_global(void) + if (OCTEON_IS_OCTEON2() || OCTEON_IS_MODEL(OCTEON_CN70XX)) { + if (CVMX_WAIT_FOR_FIELD64(CVMX_IPD_CTL_STATUS, union cvmx_ipd_ctl_status, rst_done, + ==, 0, 1000)) { +- debug("IPD reset timeout waiting for idle\n"); ++printf("IPD reset timeout waiting for idle\n"); + result = -1; + } + } +diff --git a/arch/mips/mach-octeon/cvmx-pcie.c b/arch/mips/mach-octeon/cvmx-pcie.c +index f42d44cbe..94f33e1c5 100644 +--- a/arch/mips/mach-octeon/cvmx-pcie.c ++++ b/arch/mips/mach-octeon/cvmx-pcie.c +@@ -913,7 +913,7 @@ static uint32_t cvmx_pcie_config_read32_retry(int node, int pcie_port, int bus, + mdelay(10); + } while (--timeout); + +- debug("N%d.PCIe%d: Config read failed, can't communicate with device\n", ++printf("N%d.PCIe%d: Config read failed, can't communicate with device\n", + node, pcie_port); + + return -1; +@@ -2048,7 +2048,7 @@ int cvmx_pcie_rc_shutdown(int pcie_port) + if (CVMX_WAIT_FOR_FIELD64_NODE(node, CVMX_PEMX_CPL_LUT_VALID(pcie_port), + cvmx_pemx_cpl_lut_valid_t, tag, ==, + 0, 2000)) +- debug("PCIe: Port %d shutdown timeout\n", pcie_port); ++printf("PCIe: Port %d shutdown timeout\n", pcie_port); + + if (OCTEON_IS_OCTEON3()) { + ciu_soft_prst_reg = CVMX_RST_SOFT_PRSTX(pcie_port); +diff --git a/arch/mips/mach-octeon/cvmx-qlm.c b/arch/mips/mach-octeon/cvmx-qlm.c +index 970e34aaf..a97396429 100644 +--- a/arch/mips/mach-octeon/cvmx-qlm.c ++++ b/arch/mips/mach-octeon/cvmx-qlm.c +@@ -106,10 +106,10 @@ int cvmx_qlm_interface(int xiface) + if (xi.interface == 0) + return 0; + +- debug("Warning: %s: Invalid interface %d\n", ++printf("Warning: %s: Invalid interface %d\n", + __func__, xi.interface); + } else if (octeon_has_feature(OCTEON_FEATURE_BGX)) { +- debug("Warning: not supported\n"); ++printf("Warning: not supported\n"); + return -1; + } + +@@ -406,7 +406,7 @@ static const __cvmx_qlm_jtag_field_t *__cvmx_qlm_lookup_field(const char *name) + ptr++; + } + +- debug("%s: Illegal field name %s\n", __func__, name); ++printf("%s: Illegal field name %s\n", __func__, name); + return NULL; + } + +@@ -533,10 +533,10 @@ void __cvmx_qlm_speed_tweak(void) + */ + if (cvmx_qlm_get_gbaud_mhz(qlm) == 6250) { + #ifdef CVMX_QLM_DUMP_STATE +- debug("%s:%d: QLM%d: Applying workaround for Errata G-16467\n", ++printf("%s:%d: QLM%d: Applying workaround for Errata G-16467\n", + __func__, __LINE__, qlm); + cvmx_qlm_display_registers(qlm); +- debug("\n"); ++printf("\n"); + #endif + cvmx_qlm_jtag_set(qlm, -1, "cfg_cdr_trunc", 0); + /* Hold the QLM in reset */ +@@ -555,10 +555,10 @@ void __cvmx_qlm_speed_tweak(void) + cvmx_qlm_jtag_set(qlm, -1, "serdes_pll_byp", 1); + cvmx_qlm_jtag_set(qlm, -1, "spdsel_byp", 1); + #ifdef CVMX_QLM_DUMP_STATE +- debug("%s:%d: QLM%d: Done applying workaround for Errata G-16467\n", ++printf("%s:%d: QLM%d: Done applying workaround for Errata G-16467\n", + __func__, __LINE__, qlm); + cvmx_qlm_display_registers(qlm); +- debug("\n\n"); ++printf("\n\n"); + #endif + /* + * The QLM will be taken out of reset later +@@ -671,7 +671,7 @@ int cvmx_qlm_get_gbaud_mhz_node(int node, int qlm) + pem = 3; + break; + default: +- debug("QLM%d: Should be in PCIe mode\n", qlm); ++printf("QLM%d: Should be in PCIe mode\n", qlm); + break; + } + pemx_cfg.u64 = csr_rd_node(node, CVMX_PEMX_CFG(pem)); +@@ -1443,7 +1443,7 @@ enum cvmx_qlm_mode __cvmx_qlm_get_mode_cn73xx(int qlm) + return qlm_mode[qlm]; + + if (qlm > 6) { +- debug("Invalid QLM(%d) passed\n", qlm); ++printf("Invalid QLM(%d) passed\n", qlm); + return -1; + } + +@@ -1698,7 +1698,7 @@ enum cvmx_qlm_mode __cvmx_qlm_get_mode_cnf75xx(int qlm) + return qlm_mode[qlm]; + + if (qlm > 9) { +- debug("Invalid QLM(%d) passed\n", qlm); ++printf("Invalid QLM(%d) passed\n", qlm); + return -1; + } + +@@ -1824,7 +1824,7 @@ int cvmx_qlm_measure_clock_cn7xxx(int node, int qlm) + if (qlm >= 8 || node > 1) + return -1; /* FIXME for OCI */ + } else { +- debug("%s: Unsupported OCTEON model\n", __func__); ++printf("%s: Unsupported OCTEON model\n", __func__); + return -1; + } + +@@ -2019,7 +2019,7 @@ int __cvmx_qlm_rx_equalization(int node, int qlm, int lane) + pmode_1.u64 = csr_rd_node(node, CVMX_GSERX_LANE_PX_MODE_1(lmode.s.lmode, qlm)); + if (pmode_1.s.vma_mm == 1) { + #ifdef DEBUG_QLM +- debug("N%d:QLM%d: VMA Manual (manual DFE) selected. Not completing Rx equalization\n", ++printf("N%d:QLM%d: VMA Manual (manual DFE) selected. Not completing Rx equalization\n", + node, qlm); + #endif + return 0; +@@ -2061,7 +2061,7 @@ int __cvmx_qlm_rx_equalization(int node, int qlm, int lane) + (1 << max_lanes) - 1, 500)) { + #ifdef DEBUG_QLM + eie_detsts.u64 = csr_rd_node(node, CVMX_GSERX_RX_EIE_DETSTS(qlm)); +- debug("ERROR: %d:QLM%d: CDR Lock not detected for all 4 lanes. CDR_LOCK(0x%x)\n", ++printf("ERROR: %d:QLM%d: CDR Lock not detected for all 4 lanes. CDR_LOCK(0x%x)\n", + node, qlm, eie_detsts.s.cdrlock); + #endif + return -1; +@@ -2072,7 +2072,7 @@ int __cvmx_qlm_rx_equalization(int node, int qlm, int lane) + 500)) { + #ifdef DEBUG_QLM + eie_detsts.u64 = csr_rd_node(node, CVMX_GSERX_RX_EIE_DETSTS(qlm)); +- debug("ERROR: %d:QLM%d: CDR Lock not detected for Lane%d CDR_LOCK(0x%x)\n", ++printf("ERROR: %d:QLM%d: CDR Lock not detected for Lane%d CDR_LOCK(0x%x)\n", + node, qlm, lane, eie_detsts.s.cdrlock); + #endif + return -1; +@@ -2187,12 +2187,12 @@ int __cvmx_qlm_rx_equalization(int node, int qlm, int lane) + /* Report status */ + if (fail & lane_mask) { + #ifdef DEBUG_QLM +- debug("%d:QLM%d: Lane%d RX equalization lost CDR Lock or entered Electrical Idle\n", ++printf("%d:QLM%d: Lane%d RX equalization lost CDR Lock or entered Electrical Idle\n", + node, qlm, l); + #endif + } else if ((pending & lane_mask) || !rxx_eer.s.rxt_esv) { + #ifdef DEBUG_QLM +- debug("%d:QLM%d: Lane %d RX equalization timeout\n", node, qlm, l); ++printf("%d:QLM%d: Lane %d RX equalization timeout\n", node, qlm, l); + #endif + fail |= 1 << l; + } else { +@@ -2204,8 +2204,8 @@ int __cvmx_qlm_rx_equalization(int node, int qlm, int lane) + cvmx_gserx_lanex_rx_aeq_out_2_t rx_aeq_out_2; + cvmx_gserx_lanex_rx_vma_status_0_t rx_vma_status_0; + #endif +- debug("%d:QLM%d: Lane%d: RX equalization completed.\n", node, qlm, l); +- debug(" Tx Direction Hints TXPRE: %s, TXMAIN: %s, TXPOST: %s, Figure of Merit: %d\n", ++printf("%d:QLM%d: Lane%d: RX equalization completed.\n", node, qlm, l); ++printf(" Tx Direction Hints TXPRE: %s, TXMAIN: %s, TXPOST: %s, Figure of Merit: %d\n", + dir_label[(rxx_eer.s.rxt_esm) & 0x3], + dir_label[((rxx_eer.s.rxt_esm) >> 2) & 0x3], + dir_label[((rxx_eer.s.rxt_esm) >> 4) & 0x3], rxx_eer.s.rxt_esm >> 6); +@@ -2216,13 +2216,13 @@ int __cvmx_qlm_rx_equalization(int node, int qlm, int lane) + rx_aeq_out_2.u64 = csr_rd_node(node, CVMX_GSERX_LANEX_RX_AEQ_OUT_2(l, qlm)); + rx_vma_status_0.u64 = + csr_rd_node(node, CVMX_GSERX_LANEX_RX_VMA_STATUS_0(l, qlm)); +- debug(" DFE Tap1:%lu, Tap2:%ld, Tap3:%ld, Tap4:%ld, Tap5:%ld\n", ++printf(" DFE Tap1:%lu, Tap2:%ld, Tap3:%ld, Tap4:%ld, Tap5:%ld\n", + (unsigned int long)cvmx_bit_extract(rx_aeq_out_1.u64, 0, 5), + (unsigned int long)cvmx_bit_extract_smag(rx_aeq_out_1.u64, 5, 9), + (unsigned int long)cvmx_bit_extract_smag(rx_aeq_out_1.u64, 10, 14), + (unsigned int long)cvmx_bit_extract_smag(rx_aeq_out_0.u64, 0, 4), + (unsigned int long)cvmx_bit_extract_smag(rx_aeq_out_0.u64, 5, 9)); +- debug(" Pre-CTLE Gain:%lu, Post-CTLE Gain:%lu, CTLE Peak:%lu, CTLE Pole:%lu\n", ++printf(" Pre-CTLE Gain:%lu, Post-CTLE Gain:%lu, CTLE Peak:%lu, CTLE Pole:%lu\n", + (unsigned int long)cvmx_bit_extract(rx_aeq_out_2.u64, 4, 4), + (unsigned int long)cvmx_bit_extract(rx_aeq_out_2.u64, 0, 4), + (unsigned int long)cvmx_bit_extract(rx_vma_status_0.u64, 2, 4), +@@ -2315,13 +2315,13 @@ void cvmx_qlm_display_registers(int qlm) + int lane; + const __cvmx_qlm_jtag_field_t *ptr = cvmx_qlm_jtag_get_field(); + +- debug("%29s", "Field[:]"); ++printf("%29s", "Field[:]"); + for (lane = 0; lane < num_lanes; lane++) +- debug("\t Lane %d", lane); +- debug("\n"); ++printf("\t Lane %d", lane); ++printf("\n"); + + while (ptr && ptr->name) { +- debug("%20s[%3d:%3d]", ptr->name, ptr->stop_bit, ptr->start_bit); ++printf("%20s[%3d:%3d]", ptr->name, ptr->stop_bit, ptr->start_bit); + for (lane = 0; lane < num_lanes; lane++) { + u64 val; + int tx_byp = 0; +@@ -2334,15 +2334,15 @@ void cvmx_qlm_display_registers(int qlm) + strncmp(ptr->name, "tcoeff_", 7) == 0) { + tx_byp = cvmx_qlm_jtag_get(qlm, lane, "serdes_tx_byp"); + if (tx_byp == 0) { +- debug("\t \t"); ++printf("\t \t"); + continue; + } + } + val = cvmx_qlm_jtag_get(qlm, lane, ptr->name); +- debug("\t%4llu (0x%04llx)", (unsigned long long)val, ++printf("\t%4llu (0x%04llx)", (unsigned long long)val, + (unsigned long long)val); + } +- debug("\n"); ++printf("\n"); + ptr++; + } + } +diff --git a/arch/mips/mach-octeon/dram.c b/arch/mips/mach-octeon/dram.c +index 4679260f1..1285221d8 100644 +--- a/arch/mips/mach-octeon/dram.c ++++ b/arch/mips/mach-octeon/dram.c +@@ -23,18 +23,18 @@ int dram_init(void) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + return ret; + } + + ret = ram_get_info(dev, &ram); + if (ret) { +- debug("Cannot get DRAM size: %d\n", ret); ++printf("Cannot get DRAM size: %d\n", ret); + return ret; + } + + gd->ram_size = ram.size; +- debug("SDRAM base=%lx, size=%lx\n", ++printf("SDRAM base=%lx, size=%lx\n", + (unsigned long)ram.base, (unsigned long)ram.size); + } else { + /* +@@ -57,13 +57,13 @@ void board_add_ram_info(int use_default) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + return; + } + + ret = ram_get_info(dev, &ram); + if (ret) { +- debug("Cannot get DRAM size: %d\n", ret); ++printf("Cannot get DRAM size: %d\n", ret); + return; + } + +diff --git a/arch/mips/mach-octeon/include/mach/cvmx-helper-cfg.h b/arch/mips/mach-octeon/include/mach/cvmx-helper-cfg.h +index d4bd910b0..ddfb6c804 100644 +--- a/arch/mips/mach-octeon/include/mach/cvmx-helper-cfg.h ++++ b/arch/mips/mach-octeon/include/mach/cvmx-helper-cfg.h +@@ -35,7 +35,7 @@ + #define cvmx_helper_cfg_assert(cond) \ + do { \ + if (!(cond)) { \ +- debug("cvmx_helper_cfg_assert (%s) at %s:%d\n", #cond, __FILE__, \ ++printf("cvmx_helper_cfg_assert (%s) at %s:%d\n", #cond, __FILE__, \ + __LINE__); \ + } \ + } while (0) +diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pip.h b/arch/mips/mach-octeon/include/mach/cvmx-pip.h +index 013f533fb..00c0c2ae6 100644 +--- a/arch/mips/mach-octeon/include/mach/cvmx-pip.h ++++ b/arch/mips/mach-octeon/include/mach/cvmx-pip.h +@@ -195,7 +195,7 @@ static inline int cvmx_pip_config_watcher(int index, int type, u16 match, u16 ma + int qos) + { + if (index >= CVMX_PIP_NUM_WATCHERS) { +- debug("ERROR: pip watcher %d is > than supported\n", index); ++printf("ERROR: pip watcher %d is > than supported\n", index); + return -1; + } + if (octeon_has_feature(OCTEON_FEATURE_PKI)) { +@@ -220,18 +220,18 @@ static inline int cvmx_pip_config_watcher(int index, int type, u16 match, u16 ma + } else if (type == 0x4 /*CVMX_PIP_QOS_WATCH_ETHERTYPE*/) { + qos_watcher[index].field = CVMX_PKI_PCAM_TERM_ETHTYPE0; + if (match == 0x8100) { +- debug("ERROR: default vlan entry already exist, cant set watcher\n"); ++printf("ERROR: default vlan entry already exist, cant set watcher\n"); + return -1; + } + qos_watcher[index].data = (u32)(match << 16); + qos_watcher[index].data_mask = (u32)(mask << 16); + qos_watcher[index].advance = 4; + } else { +- debug("ERROR: Unsupported watcher type %d\n", type); ++printf("ERROR: Unsupported watcher type %d\n", type); + return -1; + } + if (grp >= 32) { +- debug("ERROR: grp %d out of range for backward compat 78xx\n", grp); ++printf("ERROR: grp %d out of range for backward compat 78xx\n", grp); + return -1; + } + qos_watcher[index].sso_grp = (u8)(grp << 3 | qos); +@@ -256,7 +256,7 @@ static inline int __cvmx_pip_set_tag_type(int node, int style, int tag_type, int + style_cfg.parm_cfg.tag_type = (enum cvmx_sso_tag_type)tag_type; + style_num = cvmx_pki_style_alloc(node, -1); + if (style_num < 0) { +- debug("ERROR: style not available to set tag type\n"); ++printf("ERROR: style not available to set tag type\n"); + return -1; + } + cvmx_pki_write_style_config(node, style_num, CVMX_PKI_CLUSTER_ALL, &style_cfg); +@@ -275,7 +275,7 @@ static inline int __cvmx_pip_set_tag_type(int node, int style, int tag_type, int + pcam_offset = cvmx_pki_pcam_entry_alloc(node, CVMX_PKI_FIND_AVAL_ENTRY, bank, + CVMX_PKI_CLUSTER_ALL); + if (pcam_offset < 0) { +- debug("ERROR: pcam entry not available to enable qos watcher\n"); ++printf("ERROR: pcam entry not available to enable qos watcher\n"); + cvmx_pki_style_free(node, style_num); + return -1; + } +@@ -312,7 +312,7 @@ static inline int __cvmx_pip_set_tag_type(int node, int style, int tag_type, int + pcam_offset = cvmx_pki_pcam_entry_alloc(node, CVMX_PKI_FIND_AVAL_ENTRY, bank, + CVMX_PKI_CLUSTER_ALL); + if (pcam_offset < 0) { +- debug("ERROR: pcam entry not available to enable qos watcher\n"); ++printf("ERROR: pcam entry not available to enable qos watcher\n"); + cvmx_pki_style_free(node, style_num); + return -1; + } +@@ -333,7 +333,7 @@ static inline int __cvmx_pip_enable_watcher_78xx(int node, int index, int style) + int bank; + + if (!qos_watcher[index].configured) { +- debug("ERROR: qos watcher %d should be configured before enable\n", index); ++printf("ERROR: qos watcher %d should be configured before enable\n", index); + return -1; + } + /* All other style parameters remain same except grp and qos and qps base */ +@@ -344,7 +344,7 @@ static inline int __cvmx_pip_enable_watcher_78xx(int node, int index, int style) + qpg_cfg.grp_bad = qos_watcher[index].sso_grp; + qpg_offset = cvmx_helper_pki_set_qpg_entry(node, &qpg_cfg); + if (qpg_offset == -1) { +- debug("Warning: no new qpg entry available to enable watcher\n"); ++printf("Warning: no new qpg entry available to enable watcher\n"); + return -1; + } + /* try to reserve the style, if it is not configured already, reserve +@@ -352,7 +352,7 @@ static inline int __cvmx_pip_enable_watcher_78xx(int node, int index, int style) + style_cfg.parm_cfg.qpg_base = qpg_offset; + style_num = cvmx_pki_style_alloc(node, -1); + if (style_num < 0) { +- debug("ERROR: style not available to enable qos watcher\n"); ++printf("ERROR: style not available to enable qos watcher\n"); + cvmx_pki_qpg_entry_free(node, qpg_offset, 1); + return -1; + } +@@ -362,7 +362,7 @@ static inline int __cvmx_pip_enable_watcher_78xx(int node, int index, int style) + pcam_offset = cvmx_pki_pcam_entry_alloc(node, CVMX_PKI_FIND_AVAL_ENTRY, bank, + CVMX_PKI_CLUSTER_ALL); + if (pcam_offset < 0) { +- debug("ERROR: pcam entry not available to enable qos watcher\n"); ++printf("ERROR: pcam entry not available to enable qos watcher\n"); + cvmx_pki_style_free(node, style_num); + cvmx_pki_qpg_entry_free(node, qpg_offset, 1); + return -1; +@@ -406,7 +406,7 @@ static inline void cvmx_pip_config_port(u64 ipd_port, cvmx_pip_prt_cfgx_t port_c + cvmx_pki_get_port_config(ipd_port, &pki_prt_cfg); + style = pki_prt_cfg.pkind_cfg.initial_style; + if (port_cfg.s.ih_pri || port_cfg.s.vlan_len || port_cfg.s.pad_len) +- debug("Warning: 78xx: use different config for this option\n"); ++printf("Warning: 78xx: use different config for this option\n"); + pki_prt_cfg.style_cfg.parm_cfg.minmax_sel = port_cfg.s.len_chk_sel; + pki_prt_cfg.style_cfg.parm_cfg.lenerr_en = port_cfg.s.lenerr_en; + pki_prt_cfg.style_cfg.parm_cfg.maxerr_en = port_cfg.s.maxerr_en; +@@ -431,7 +431,7 @@ static inline void cvmx_pip_config_port(u64 ipd_port, cvmx_pip_prt_cfgx_t port_c + /* need to implement for 78xx*/ + } + if (port_cfg.s.tag_inc) +- debug("Warning: 78xx uses differnet method for tag generation\n"); ++printf("Warning: 78xx uses differnet method for tag generation\n"); + pki_prt_cfg.style_cfg.parm_cfg.rawdrp = port_cfg.s.rawdrp; + pki_prt_cfg.pkind_cfg.parse_en.inst_hdr = port_cfg.s.inst_hdr; + if (port_cfg.s.hg_qos) +@@ -441,7 +441,7 @@ static inline void cvmx_pip_config_port(u64 ipd_port, cvmx_pip_prt_cfgx_t port_c + else if (port_cfg.s.qos_diff) + pki_prt_cfg.style_cfg.parm_cfg.qpg_qos = CVMX_PKI_QPG_QOS_DIFFSERV; + if (port_cfg.s.qos_vod) +- debug("Warning: 78xx needs pcam entries installed to achieve qos_vod\n"); ++printf("Warning: 78xx needs pcam entries installed to achieve qos_vod\n"); + if (port_cfg.s.qos) { + cvmx_pki_read_qpg_entry(xp.node, pki_prt_cfg.style_cfg.parm_cfg.qpg_base, + &qpg_cfg); +@@ -450,7 +450,7 @@ static inline void cvmx_pip_config_port(u64 ipd_port, cvmx_pip_prt_cfgx_t port_c + qpg_cfg.grp_bad |= port_cfg.s.qos; + qpg_offset = cvmx_helper_pki_set_qpg_entry(xp.node, &qpg_cfg); + if (qpg_offset == -1) +- debug("Warning: no new qpg entry available, will not modify qos\n"); ++printf("Warning: no new qpg entry available, will not modify qos\n"); + else + pki_prt_cfg.style_cfg.parm_cfg.qpg_base = qpg_offset; + } +@@ -462,7 +462,7 @@ static inline void cvmx_pip_config_port(u64 ipd_port, cvmx_pip_prt_cfgx_t port_c + qpg_cfg.grp_bad |= (u8)(port_tag_cfg.s.grp << 3); + qpg_offset = cvmx_helper_pki_set_qpg_entry(xp.node, &qpg_cfg); + if (qpg_offset == -1) +- debug("Warning: no new qpg entry available, will not modify group\n"); ++printf("Warning: no new qpg entry available, will not modify group\n"); + else + pki_prt_cfg.style_cfg.parm_cfg.qpg_base = qpg_offset; + } +@@ -875,7 +875,7 @@ static inline void cvmx_pip_set_bsel_pos(int bit, int pos, int val) + return; + + if (bit < 0 || bit > 3) { +- debug("ERROR: cvmx_pip_set_bsel_pos: Invalid Bit-Select Extractor (%d) passed\n", ++printf("ERROR: cvmx_pip_set_bsel_pos: Invalid Bit-Select Extractor (%d) passed\n", + bit); + return; + } +@@ -915,7 +915,7 @@ static inline void cvmx_pip_set_bsel_pos(int bit, int pos, int val) + bsel_pos.s.pos7 = val & 0x7f; + break; + default: +- debug("Warning: cvmx_pip_set_bsel_pos: Invalid pos(%d)\n", pos); ++printf("Warning: cvmx_pip_set_bsel_pos: Invalid pos(%d)\n", pos); + break; + } + csr_wr(CVMX_PIP_BSEL_EXT_POSX(bit), bsel_pos.u64); +diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pki.h b/arch/mips/mach-octeon/include/mach/cvmx-pki.h +index c1feb55a1..e47af816e 100644 +--- a/arch/mips/mach-octeon/include/mach/cvmx-pki.h ++++ b/arch/mips/mach-octeon/include/mach/cvmx-pki.h +@@ -518,7 +518,7 @@ static inline int cvmx_pki_attach_cluster_to_group(int node, u64 cluster_group, + cvmx_pki_icgx_cfg_t pki_cl_grp; + + if (cluster_group >= CVMX_PKI_NUM_CLUSTER_GROUP) { +- debug("ERROR: config cluster group %d", (int)cluster_group); ++printf("ERROR: config cluster group %d", (int)cluster_group); + return -1; + } + pki_cl_grp.u64 = cvmx_read_csr_node(node, CVMX_PKI_ICGX_CFG(cluster_group)); +@@ -563,7 +563,7 @@ static inline void cvmx_pki_write_ltype_map(int node, enum cvmx_pki_layer_type l + cvmx_pki_ltypex_map_t ltype_map; + + if (layer > CVMX_PKI_LTYPE_E_MAX || backend > CVMX_PKI_BELTYPE_MAX) { +- debug("ERROR: invalid ltype beltype mapping\n"); ++printf("ERROR: invalid ltype beltype mapping\n"); + return; + } + ltype_map.u64 = cvmx_read_csr_node(node, CVMX_PKI_LTYPEX_MAP(layer)); +@@ -582,7 +582,7 @@ static inline int cvmx_pki_parse_enable(int node, unsigned int cl_grp) + cvmx_pki_icgx_cfg_t pki_cl_grp; + + if (cl_grp >= CVMX_PKI_NUM_CLUSTER_GROUP) { +- debug("ERROR: pki parse en group %d", (int)cl_grp); ++printf("ERROR: pki parse en group %d", (int)cl_grp); + return -1; + } + pki_cl_grp.u64 = cvmx_read_csr_node(node, CVMX_PKI_ICGX_CFG(cl_grp)); +diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pow.h b/arch/mips/mach-octeon/include/mach/cvmx-pow.h +index 0680ca258..86213f0ef 100644 +--- a/arch/mips/mach-octeon/include/mach/cvmx-pow.h ++++ b/arch/mips/mach-octeon/include/mach/cvmx-pow.h +@@ -1044,7 +1044,7 @@ static inline void cvmx_pow_tag_sw_wait(void) + + if (CVMX_ENABLE_POW_CHECKS) { + if (cvmx_unlikely(get_timer(start_cycle) > TIMEOUT_MS)) { +- debug("WARNING: %s: Tag switch is taking a long time, possible deadlock\n", ++printf("WARNING: %s: Tag switch is taking a long time, possible deadlock\n", + __func__); + } + } +@@ -1858,7 +1858,7 @@ static inline void cvmx_pow_set_priority(u64 core_num, const u8 priority[]) + prio_mask |= 1 << priority[i]; + + if (prio_mask ^ ((1 << cvmx_pop(prio_mask)) - 1)) { +- debug("ERROR: POW static priorities should be contiguous (0x%llx)\n", ++printf("ERROR: POW static priorities should be contiguous (0x%llx)\n", + (unsigned long long)prio_mask); + return; + } +@@ -1974,7 +1974,7 @@ static inline void cvmx_pow_get_priority(u64 core_num, u8 priority[]) + prio_mask |= 1 << priority[i]; + + if (prio_mask ^ ((1 << cvmx_pop(prio_mask)) - 1)) { +- debug("ERROR:%s: POW static priorities should be contiguous (0x%llx)\n", ++printf("ERROR:%s: POW static priorities should be contiguous (0x%llx)\n", + __func__, (unsigned long long)prio_mask); + return; + } +@@ -1987,7 +1987,7 @@ static inline void cvmx_sso_get_group_priority(int node, cvmx_xgrp_t xgrp, int * + cvmx_sso_grpx_pri_t grp_pri; + + if (!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE)) { +- debug("ERROR: %s is not supported on this chip)\n", __func__); ++printf("ERROR: %s is not supported on this chip)\n", __func__); + return; + } + +@@ -2064,7 +2064,7 @@ static inline void cvmx_pow_tag_sw_desched_nocheck(u32 tag, cvmx_pow_tag_type_t + cvmx_wqe_t *wqp = cvmx_pow_get_current_wqp(); + + if (!wqp) { +- debug("ERROR: Failed to get WQE, %s\n", __func__); ++printf("ERROR: Failed to get WQE, %s\n", __func__); + return; + } + group &= 0x1f; +@@ -2236,7 +2236,7 @@ static inline void cvmx_sso_set_group_core_affinity(cvmx_xgrp_t xgrp, + int bit_pos = xgrp.xgrp % 64; + + if (!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE)) { +- debug("ERROR: %s is not supported on this chip)\n", __func__); ++printf("ERROR: %s is not supported on this chip)\n", __func__); + return; + } + cvmx_coremask_for_each_core(core, core_mask) +@@ -2297,7 +2297,7 @@ static inline void cvmx_sso_set_group_priority(int node, cvmx_xgrp_t xgrp, int p + cvmx_sso_grpx_pri_t grp_pri; + + if (!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE)) { +- debug("ERROR: %s is not supported on this chip)\n", __func__); ++printf("ERROR: %s is not supported on this chip)\n", __func__); + return; + } + if (weight <= 0) +@@ -2441,7 +2441,7 @@ static inline void cvmx_pow_set_xgrp_mask(u64 core_num, u8 mask_set, const u64 x + u64 reg_addr; + + if (!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE)) { +- debug("ERROR: %s is not supported on this chip)\n", __func__); ++printf("ERROR: %s is not supported on this chip)\n", __func__); + return; + } + +@@ -2492,7 +2492,7 @@ static inline void cvmx_pow_get_xgrp_mask(u64 core_num, u8 mask_set, u64 *xgrp_m + u64 reg_addr; + + if (!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE)) { +- debug("ERROR: %s is not supported on this chip)\n", __func__); ++printf("ERROR: %s is not supported on this chip)\n", __func__); + return; + } + +@@ -2529,7 +2529,7 @@ static inline void cvmx_pow_tag_sw_node(cvmx_wqe_t *wqp, u32 tag, cvmx_pow_tag_t + cvmx_pow_tag_req_t tag_req; + + if (cvmx_unlikely(!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE))) { +- debug("ERROR: %s is supported on OCTEON3 only\n", __func__); ++printf("ERROR: %s is supported on OCTEON3 only\n", __func__); + return; + } + CVMX_SYNCWS; +@@ -2581,7 +2581,7 @@ static inline void cvmx_pow_tag_sw_full_node(cvmx_wqe_t *wqp, u32 tag, cvmx_pow_ + u16 gxgrp; + + if (cvmx_unlikely(!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE))) { +- debug("ERROR: %s is supported on OCTEON3 only\n", __func__); ++printf("ERROR: %s is supported on OCTEON3 only\n", __func__); + return; + } + /* Ensure that there is not a pending tag switch, as a tag switch cannot be +@@ -2657,7 +2657,7 @@ static inline void cvmx_pow_work_submit_node(cvmx_wqe_t *wqp, u32 tag, cvmx_pow_ + u16 group; + + if (cvmx_unlikely(!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE))) { +- debug("ERROR: %s is supported on OCTEON3 only\n", __func__); ++printf("ERROR: %s is supported on OCTEON3 only\n", __func__); + return; + } + group = node; +@@ -2700,7 +2700,7 @@ static inline void cvmx_pow_tag_sw_desched_node(cvmx_wqe_t *wqe, u32 tag, + u16 group; + + if (cvmx_unlikely(!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE))) { +- debug("ERROR: %s is supported on OCTEON3 only\n", __func__); ++printf("ERROR: %s is supported on OCTEON3 only\n", __func__); + return; + } + /* Need to make sure any writes to the work queue entry are complete */ +@@ -2763,7 +2763,7 @@ static inline void cvmx_sso_update_wqp_group(cvmx_wqe_t *wqp, u8 xgrp) + int group = node << 8 | xgrp; + + if (!octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE)) { +- debug("ERROR: %s is not supported on this chip)\n", __func__); ++printf("ERROR: %s is not supported on this chip)\n", __func__); + return; + } + wqp->word1.cn78xx.grp = group; +diff --git a/arch/mips/mach-octeon/include/mach/cvmx-wqe.h b/arch/mips/mach-octeon/include/mach/cvmx-wqe.h +index c9e3c8312..493f1c1f9 100644 +--- a/arch/mips/mach-octeon/include/mach/cvmx-wqe.h ++++ b/arch/mips/mach-octeon/include/mach/cvmx-wqe.h +@@ -873,7 +873,7 @@ static inline void cvmx_wqe_set_channel(cvmx_wqe_t *work, int channel) + if (octeon_has_feature(OCTEON_FEATURE_CN78XX_WQE)) + work->word0.pki.channel = channel; + else +- debug("%s: ERROR: not supported for model\n", __func__); ++printf("%s: ERROR: not supported for model\n", __func__); + } + + static inline int cvmx_wqe_get_aura(cvmx_wqe_t *work) +@@ -1021,7 +1021,7 @@ static inline int cvmx_wqe_is_l3_bcast(cvmx_wqe_t *work) + + return wqe->word2.is_l3_bcast; + } +- debug("%s: ERROR: not supported for model\n", __func__); ++printf("%s: ERROR: not supported for model\n", __func__); + return 0; + } + +@@ -1032,7 +1032,7 @@ static inline int cvmx_wqe_is_l3_mcast(cvmx_wqe_t *work) + + return wqe->word2.is_l3_mcast; + } +- debug("%s: ERROR: not supported for model\n", __func__); ++printf("%s: ERROR: not supported for model\n", __func__); + return 0; + } + +diff --git a/arch/mips/mach-octeon/include/mach/octeon_ddr.h b/arch/mips/mach-octeon/include/mach/octeon_ddr.h +index 0b5be06da..c7f6efa87 100644 +--- a/arch/mips/mach-octeon/include/mach/octeon_ddr.h ++++ b/arch/mips/mach-octeon/include/mach/octeon_ddr.h +@@ -686,7 +686,7 @@ enum ddr_type { + octeon_is_cpuid(OCTEON_CNF75XX)) \ + ddr_dll_ctl3.cn73xx.field = (expr); \ + else \ +- debug("%s(): " #field \ ++printf("%s(): " #field \ + "not set for unknown chip\n", \ + __func__); \ + } while (0) +diff --git a/arch/mips/mach-octeon/octeon_fdt.c b/arch/mips/mach-octeon/octeon_fdt.c +index 199f69251..ae2d83d37 100644 +--- a/arch/mips/mach-octeon/octeon_fdt.c ++++ b/arch/mips/mach-octeon/octeon_fdt.c +@@ -195,7 +195,7 @@ int __octeon_fdt_patch_rename(void *fdt, const char *fdt_key, + strsep(&mode, ","); + qlm_key_len = strlen(qlm); + +- debug("In %s: Patching FDT header at 0x%p with key \"%s\"\n", __func__, fdt, fdt_key); ++printf("In %s: Patching FDT header at 0x%p with key \"%s\"\n", __func__, fdt, fdt_key); + if (!fdt || fdt_check_header(fdt) != 0) { + printf("%s: Invalid device tree\n", __func__); + return -1; +@@ -216,7 +216,7 @@ int __octeon_fdt_patch_rename(void *fdt, const char *fdt_key, + if (!val) + continue; + +- debug("fdt found trim name %s, comparing key \"%s\"(%d) with \"%s\"(%d)\n", ++printf("fdt found trim name %s, comparing key \"%s\"(%d) with \"%s\"(%d)\n", + trim_name, fdt_key, fdt_key_len, val, len); + val_comma = strchr(val, ','); + if (!val_comma || (val_comma - val) != qlm_key_len) +@@ -224,14 +224,14 @@ int __octeon_fdt_patch_rename(void *fdt, const char *fdt_key, + if (strncmp(val, qlm, qlm_key_len) != 0) + continue; /* Not this QLM. */ + +- debug("fdt key number \"%s\" matches\n", val); ++printf("fdt key number \"%s\" matches\n", val); + if (!fdt_stringlist_contains(val, len, fdt_key)) { +- debug("Key \"%s\" does not match \"%s\"\n", val, fdt_key); ++printf("Key \"%s\" does not match \"%s\"\n", val, fdt_key); + /* This QLM, but wrong mode. Delete it. */ + /* See if there's an alias that needs deleting */ + val = fdt_getprop(fdt, offset, "cavium,qlm-trim-alias", NULL); + if (val) { +- debug("Trimming alias \"%s\"\n", val); ++printf("Trimming alias \"%s\"\n", val); + aliases = fdt_path_offset(fdt, "/aliases"); + if (aliases) { + aprop = fdt_getprop(fdt, aliases, val, NULL); +@@ -249,7 +249,7 @@ int __octeon_fdt_patch_rename(void *fdt, const char *fdt_key, + puts("Error: could not find /aliases in device tree\n"); + } + } +- debug("fdt trimming matching key %s\n", fdt_key); ++printf("fdt trimming matching key %s\n", fdt_key); + next_offset = fdt_parent_offset(fdt, offset); + rc = fdt_nop_node(fdt, offset); + if (rc) +@@ -257,7 +257,7 @@ int __octeon_fdt_patch_rename(void *fdt, const char *fdt_key, + } + } + +- debug("%s: Starting pass 2 for key %s\n", __func__, fdt_key); ++printf("%s: Starting pass 2 for key %s\n", __func__, fdt_key); + /* Second pass: Rewrite names and remove key properties. */ + offset = -1; + for (offset = fdt_next_node(fdt, offset, NULL); offset >= 0; offset = next_offset) { +@@ -268,19 +268,19 @@ int __octeon_fdt_patch_rename(void *fdt, const char *fdt_key, + + if (!val) + continue; +- debug("Searching stringlist %s for %s\n", val, fdt_key); ++printf("Searching stringlist %s for %s\n", val, fdt_key); + if (fdt_stringlist_contains(val, len, fdt_key)) { + char new_name[64]; + const char *name; + const char *at; + int reg; + +- debug("Found key %s at offset 0x%x\n", fdt_key, offset); ++printf("Found key %s at offset 0x%x\n", fdt_key, offset); + fdt_nop_property(fdt, offset, trim_name); + + if (rename) { + name = fdt_get_name(fdt, offset, NULL); +- debug(" name: %s\n", name); ++printf(" name: %s\n", name); + if (!name) + continue; + at = strchr(name, '@'); +@@ -291,9 +291,9 @@ int __octeon_fdt_patch_rename(void *fdt, const char *fdt_key, + if (reg == -1) + continue; + +- debug(" reg: %d\n", reg); ++printf(" reg: %d\n", reg); + len = at - name + 1; +- debug(" len: %d\n", len); ++printf(" len: %d\n", len); + if (len + 9 >= sizeof(new_name)) + continue; + +@@ -304,7 +304,7 @@ int __octeon_fdt_patch_rename(void *fdt, const char *fdt_key, + cpu_node, reg); + else + sprintf(new_name + len, "%x", reg); +- debug("Renaming cpu node %d %s to %s\n", cpu_node, name, new_name); ++printf("Renaming cpu node %d %s to %s\n", cpu_node, name, new_name); + fdt_set_name(fdt, offset, new_name); + } + if (callback) +@@ -364,7 +364,7 @@ void __octeon_fixup_fdt_mac_addr(void) + bool env_mac_addr_valid; + const char *p; + +- debug("%s: env ethaddr: %s\n", __func__, (p = env_get("ethaddr")) ? p : "not set"); ++printf("%s: env ethaddr: %s\n", __func__, (p = env_get("ethaddr")) ? p : "not set"); + if (eth_env_get_enetaddr("ethaddr", mac_addr)) { + mac = convert_mac(mac_addr); + env_mac_addr_valid = true; +@@ -373,7 +373,7 @@ void __octeon_fixup_fdt_mac_addr(void) + env_mac_addr_valid = false; + } + +- debug("%s: mac_addr: %pM, board mac: %pM, env valid: %s\n", __func__, mac_addr, ++printf("%s: mac_addr: %pM, board mac: %pM, env valid: %s\n", __func__, mac_addr, + gd->arch.mac_desc.mac_addr_base, env_mac_addr_valid ? "true" : "false"); + + if (env_mac_addr_valid && memcmp(mac_addr, (void *)gd->arch.mac_desc.mac_addr_base, 6)) +@@ -626,10 +626,10 @@ int octeon_fdt_compat_vendor(const void *fdt, int nodeoffset, const char *vendor + + len = strlen(vendor); + +- debug("%s(%p, %d, %s (%p)) strlist: %s (%p), len: %d\n", __func__, fdt, nodeoffset, vendor, ++printf("%s(%p, %d, %s (%p)) strlist: %s (%p), len: %d\n", __func__, fdt, nodeoffset, vendor, + vendor, strlist, strlist, len); + while (listlen >= len) { +- debug(" Comparing %d bytes of %s and %s\n", len, vendor, strlist); ++printf(" Comparing %d bytes of %s and %s\n", len, vendor, strlist); + if ((memcmp(vendor, strlist, len) == 0) && + ((strlist[len] == ',') || (strlist[len] == '\0'))) + return 0; +@@ -668,14 +668,14 @@ int octeon_fdt_node_check_compatible(const void *fdt, int node_offset, + const char *const *strlist) + { + while (*strlist && **strlist) { +- debug("%s: Checking %s\n", __func__, *strlist); ++printf("%s: Checking %s\n", __func__, *strlist); + if (!fdt_node_check_compatible(fdt, node_offset, *strlist)) { +- debug("%s: match found\n", __func__); ++printf("%s: match found\n", __func__); + return 0; + } + strlist++; + } +- debug("%s: No match found\n", __func__); ++printf("%s: No match found\n", __func__); + return 1; + } + +@@ -707,7 +707,7 @@ int octeon_fdt_i2c_get_bus(const void *fdt, int node_offset) + #ifdef CONFIG_OCTEON_I2C_FDT + bus = i2c_get_bus_num_fdt(node_offset); + if (bus >= 0) { +- debug("%s: Found bus 0x%x\n", __func__, bus); ++printf("%s: Found bus 0x%x\n", __func__, bus); + return bus; + } + #endif +@@ -730,7 +730,7 @@ int octeon_fdt_i2c_get_bus(const void *fdt, int node_offset) + break; + } + +- debug("%s: bus 0x%x\n", __func__, bus); ++printf("%s: bus 0x%x\n", __func__, bus); + return bus; + } + +@@ -779,7 +779,7 @@ int octeon_fdt_read_gpio(const void *fdt, int phandle, int pin) + + type = cvmx_fdt_get_gpio_type(fdt, phandle, &num_pins); + if ((pin & 0xff) >= num_pins) { +- debug("%s: pin number %d out of range\n", __func__, pin); ++printf("%s: pin number %d out of range\n", __func__, pin); + return -1; + } + switch (type) { +@@ -867,7 +867,7 @@ int octeon_fdt_set_gpio(const void *fdt, int phandle, int pin, int val) + + type = cvmx_fdt_get_gpio_type(fdt, phandle, &num_pins); + if ((pin & 0xff) >= num_pins) { +- debug("%s: pin number %d out of range\n", __func__, pin); ++printf("%s: pin number %d out of range\n", __func__, pin); + return -1; + } + switch (type) { +@@ -932,7 +932,7 @@ int octeon_fdt_get_gpio_info(int fdt_node, enum octeon_gpio_type *type, + *type = GPIO_TYPE_UNKNOWN; + + if (!octeon_fdt_node_check_compatible(fdt, fdt_node, octeon_gpio_list)) { +- debug("%s: Found Octeon compatible GPIO\n", __func__); ++printf("%s: Found Octeon compatible GPIO\n", __func__); + *type = GPIO_TYPE_OCTEON; + if (i2c_bus) + *i2c_bus = -1; +@@ -942,25 +942,25 @@ int octeon_fdt_get_gpio_info(int fdt_node, enum octeon_gpio_type *type, + } + #ifdef CONFIG_PCA9555 + if (!octeon_fdt_node_check_compatible(fdt, fdt_node, pca9555_gpio_list)) { +- debug("%s: Found PCA9555 type compatible GPIO\n", __func__); ++printf("%s: Found PCA9555 type compatible GPIO\n", __func__); + *type = GPIO_TYPE_PCA9555; + } + #endif + #ifdef CONFIG_PCA9554 + if (!octeon_fdt_node_check_compatible(fdt, fdt_node, pca9554_gpio_list)) { +- debug("%s: Found PCA9555 type compatible GPIO\n", __func__); ++printf("%s: Found PCA9555 type compatible GPIO\n", __func__); + *type = GPIO_TYPE_PCA9554; + } + #endif + #ifdef CONFIG_PCA953X + if (!octeon_fdt_node_check_compatible(fdt, fdt_node, pca953x_gpio_list)) { +- debug("%s: Found PCA953x compatible GPIO", __func__); ++printf("%s: Found PCA953x compatible GPIO", __func__); + *type = GPIO_TYPE_PCA953X; + } + #endif + #ifdef CONFIG_PCA9698 + if (!octeon_fdt_node_check_compatible(fdt, fdt_node, pca9698_gpio_list)) { +- debug("%s: Found PCA9698 compatible GPIO", __func__); ++printf("%s: Found PCA9698 compatible GPIO", __func__); + *type = GPIO_TYPE_PCA9698; + } + #endif +@@ -1025,16 +1025,16 @@ struct phy_device *octeon_fdt_get_phy_gpio_info(int fdt_node, enum octeon_gpio_t + vitesse_vsc8488_gpio_list)) { + phydev = octeon_fdt_get_phy_device_from_node(fdt_node); + if (phydev) { +- debug("%s: Found Vitesse VSC848X compatible GPIO\n", __func__); ++printf("%s: Found Vitesse VSC848X compatible GPIO\n", __func__); + *type = GPIO_TYPE_VSC8488; + return phydev; + } + +- debug("%s: Error: phy device not found!\n", __func__); ++printf("%s: Error: phy device not found!\n", __func__); + return NULL; + } + +- debug("%s: No compatible Vitesse PHY type found\n", __func__); ++printf("%s: No compatible Vitesse PHY type found\n", __func__); + #endif + return NULL; + } +diff --git a/arch/mips/mach-octeon/octeon_qlm.c b/arch/mips/mach-octeon/octeon_qlm.c +index 763692781..1487d7e1a 100644 +--- a/arch/mips/mach-octeon/octeon_qlm.c ++++ b/arch/mips/mach-octeon/octeon_qlm.c +@@ -191,7 +191,7 @@ static int octeon_configure_qlm_cn61xx(int qlm, int speed, int mode, int rc, int + if (qlm < 3) { + qlm_cfg.u64 = csr_rd(CVMX_MIO_QLMX_CFG(qlm)); + } else { +- debug("WARNING: Invalid QLM(%d) passed\n", qlm); ++printf("WARNING: Invalid QLM(%d) passed\n", qlm); + return -1; + } + +@@ -217,7 +217,7 @@ static int octeon_configure_qlm_cn61xx(int qlm, int speed, int mode, int rc, int + */ + qlm0.u64 = csr_rd(CVMX_MIO_QLMX_CFG(0)); + if (qlm0.s.qlm_spd != 0xf && qlm0.s.qlm_cfg == 0) { +- debug("Invalid mode(%d) for QLM(%d) as QLM1 is PCIe mode\n", ++printf("Invalid mode(%d) for QLM(%d) as QLM1 is PCIe mode\n", + mode, qlm); + qlm_cfg.s.qlm_spd = 0xf; + break; +@@ -255,7 +255,7 @@ static int octeon_configure_qlm_cn61xx(int qlm, int speed, int mode, int rc, int + __set_qlm_pcie_mode_61xx(1, rc); + return 0; + } else if (mode > 1) { +- debug("Invalid mode(%d) for QLM(%d).\n", mode, qlm); ++printf("Invalid mode(%d) for QLM(%d).\n", mode, qlm); + qlm_cfg.s.qlm_spd = 0xf; + break; + } +@@ -310,7 +310,7 @@ static int octeon_configure_qlm_cn61xx(int qlm, int speed, int mode, int rc, int + return 0; + } + default: +- debug("WARNING: Invalid QLM(%d) passed\n", qlm); ++printf("WARNING: Invalid QLM(%d) passed\n", qlm); + qlm_cfg.s.qlm_spd = 0xf; + } + csr_wr(CVMX_MIO_QLMX_CFG(qlm), qlm_cfg.u64); +@@ -344,7 +344,7 @@ static int __dlm_setup_pll_cn70xx(int qlm, int baud_mhz, int ref_clk_sel, int re + cvmx_gserx_dlmx_mpll_multiplier_t mpll_multiplier; + int gmx_ref_clk = 100; + +- debug("%s(%d, %d, %d, %d, %d)\n", __func__, qlm, baud_mhz, ref_clk_sel, ref_clk_input, ++printf("%s(%d, %d, %d, %d, %d)\n", __func__, qlm, baud_mhz, ref_clk_sel, ref_clk_input, + is_sff7000_rxaui); + if (ref_clk_sel == 1) + gmx_ref_clk = 125; +@@ -443,7 +443,7 @@ static int __dlm_setup_pll_cn70xx(int qlm, int baud_mhz, int ref_clk_sel, int re + mpll_multiplier.s.mpll_multiplier = 56; + else + mpll_multiplier.s.mpll_multiplier = 45; +- debug("%s: Setting mpll multiplier to %u for DLM%d, baud %d, clock rate %uMHz\n", ++printf("%s: Setting mpll multiplier to %u for DLM%d, baud %d, clock rate %uMHz\n", + __func__, mpll_multiplier.s.mpll_multiplier, qlm, baud_mhz, gmx_ref_clk); + + csr_wr(CVMX_GSERX_DLMX_MPLL_MULTIPLIER(qlm, 0), mpll_multiplier.u64); +@@ -498,7 +498,7 @@ static int __dlm0_setup_tx_cn70xx(int speed, int ref_clk_sel) + cvmx_gserx_dlmx_tx_data_en_t data_en; + cvmx_gserx_dlmx_tx_reset_t tx_reset; + +- debug("%s(%d, %d)\n", __func__, speed, ref_clk_sel); ++printf("%s(%d, %d)\n", __func__, speed, ref_clk_sel); + mode0.u64 = csr_rd(CVMX_GMXX_INF_MODE(0)); + mode1.u64 = csr_rd(CVMX_GMXX_INF_MODE(1)); + +@@ -511,7 +511,7 @@ static int __dlm0_setup_tx_cn70xx(int speed, int ref_clk_sel) + * data rate (see Table 21-1). + */ + rate.u64 = csr_rd(CVMX_GSERX_DLMX_TX_RATE(0, 0)); +- debug("%s: speed: %d\n", __func__, speed); ++printf("%s: speed: %d\n", __func__, speed); + switch (speed) { + case 1250: + case 2500: +@@ -571,7 +571,7 @@ static int __dlm0_setup_tx_cn70xx(int speed, int ref_clk_sel) + printf("%s: Invalid rate %d\n", __func__, speed); + return -1; + } +- debug("%s: tx 0 rate: %d, tx 1 rate: %d\n", __func__, rate.s.tx0_rate, rate.s.tx1_rate); ++printf("%s: tx 0 rate: %d, tx 1 rate: %d\n", __func__, rate.s.tx0_rate, rate.s.tx1_rate); + csr_wr(CVMX_GSERX_DLMX_TX_RATE(0, 0), rate.u64); + + /* 2. Set GSER0_DLM0_TX_EN[TXn_EN] = 1 */ +@@ -640,7 +640,7 @@ static int __dlm0_setup_rx_cn70xx(int speed, int ref_clk_sel) + cvmx_gserx_dlmx_rx_data_en_t data_en; + cvmx_gserx_dlmx_rx_reset_t rx_reset; + +- debug("%s(%d, %d)\n", __func__, speed, ref_clk_sel); ++printf("%s(%d, %d)\n", __func__, speed, ref_clk_sel); + mode0.u64 = csr_rd(CVMX_GMXX_INF_MODE(0)); + mode1.u64 = csr_rd(CVMX_GMXX_INF_MODE(1)); + +@@ -709,7 +709,7 @@ static int __dlm0_setup_rx_cn70xx(int speed, int ref_clk_sel) + printf("%s: Invalid rate %d\n", __func__, speed); + return -1; + } +- debug("%s: rx 0 rate: %d, rx 1 rate: %d\n", __func__, rate.s.rx0_rate, rate.s.rx1_rate); ++printf("%s: rx 0 rate: %d, rx 1 rate: %d\n", __func__, rate.s.rx0_rate, rate.s.rx1_rate); + csr_wr(CVMX_GSERX_DLMX_RX_RATE(0, 0), rate.u64); + + /* 2. Set GSER0_DLM0_RX_PLL_EN[RXn_PLL_EN] = 1 */ +@@ -836,7 +836,7 @@ static int __sata_dlm_init_cn70xx(int qlm, int baud_mhz, int ref_clk_sel, int re + cvmx_sata_uctl_ctl_t uctl_ctl; + int sata_ref_clk; + +- debug("%s(%d, %d, %d, %d)\n", __func__, qlm, baud_mhz, ref_clk_sel, ref_clk_input); ++printf("%s(%d, %d, %d, %d)\n", __func__, qlm, baud_mhz, ref_clk_sel, ref_clk_input); + + switch (ref_clk_sel) { + case 0: +@@ -1299,12 +1299,12 @@ static int __dlm2_sata_uahc_init_cn70xx(int baud_mhz) + + /* Set-u global capabilities reg (GBL_CAP) */ + gbl_cap.u32 = csr_rd32(CVMX_SATA_UAHC_GBL_CAP); +- debug("%s: SATA_UAHC_GBL_CAP before: 0x%x\n", __func__, gbl_cap.u32); ++printf("%s: SATA_UAHC_GBL_CAP before: 0x%x\n", __func__, gbl_cap.u32); + gbl_cap.s.sss = 1; + gbl_cap.s.smps = 1; + csr_wr32(CVMX_SATA_UAHC_GBL_CAP, gbl_cap.u32); + gbl_cap.u32 = csr_rd32(CVMX_SATA_UAHC_GBL_CAP); +- debug("%s: SATA_UAHC_GBL_CAP after: 0x%x\n", __func__, gbl_cap.u32); ++printf("%s: SATA_UAHC_GBL_CAP after: 0x%x\n", __func__, gbl_cap.u32); + + /* Set-up global hba control reg (interrupt enables) */ + /* Set-up port SATA control registers (speed limitation) */ +@@ -1316,25 +1316,25 @@ static int __dlm2_sata_uahc_init_cn70xx(int baud_mhz) + spd = 3; + + sctl.u32 = csr_rd32(CVMX_SATA_UAHC_PX_SCTL(0)); +- debug("%s: SATA_UAHC_P0_SCTL before: 0x%x\n", __func__, sctl.u32); ++printf("%s: SATA_UAHC_P0_SCTL before: 0x%x\n", __func__, sctl.u32); + sctl.s.spd = spd; + csr_wr32(CVMX_SATA_UAHC_PX_SCTL(0), sctl.u32); + sctl.u32 = csr_rd32(CVMX_SATA_UAHC_PX_SCTL(0)); +- debug("%s: SATA_UAHC_P0_SCTL after: 0x%x\n", __func__, sctl.u32); ++printf("%s: SATA_UAHC_P0_SCTL after: 0x%x\n", __func__, sctl.u32); + sctl.u32 = csr_rd32(CVMX_SATA_UAHC_PX_SCTL(1)); +- debug("%s: SATA_UAHC_P1_SCTL before: 0x%x\n", __func__, sctl.u32); ++printf("%s: SATA_UAHC_P1_SCTL before: 0x%x\n", __func__, sctl.u32); + sctl.s.spd = spd; + csr_wr32(CVMX_SATA_UAHC_PX_SCTL(1), sctl.u32); + sctl.u32 = csr_rd32(CVMX_SATA_UAHC_PX_SCTL(1)); +- debug("%s: SATA_UAHC_P1_SCTL after: 0x%x\n", __func__, sctl.u32); ++printf("%s: SATA_UAHC_P1_SCTL after: 0x%x\n", __func__, sctl.u32); + + /* Set-up ports implemented reg. */ + pi.u32 = csr_rd32(CVMX_SATA_UAHC_GBL_PI); +- debug("%s: SATA_UAHC_GBL_PI before: 0x%x\n", __func__, pi.u32); ++printf("%s: SATA_UAHC_GBL_PI before: 0x%x\n", __func__, pi.u32); + pi.s.pi = 3; + csr_wr32(CVMX_SATA_UAHC_GBL_PI, pi.u32); + pi.u32 = csr_rd32(CVMX_SATA_UAHC_GBL_PI); +- debug("%s: SATA_UAHC_GBL_PI after: 0x%x\n", __func__, pi.u32); ++printf("%s: SATA_UAHC_GBL_PI after: 0x%x\n", __func__, pi.u32); + + retry0: + /* Clear port SERR and IS registers */ +@@ -1343,7 +1343,7 @@ retry0: + + /* Set spin-up, power on, FIS RX enable, start, active */ + cmd.u32 = csr_rd32(CVMX_SATA_UAHC_PX_CMD(0)); +- debug("%s: SATA_UAHC_P0_CMD before: 0x%x\n", __func__, cmd.u32); ++printf("%s: SATA_UAHC_P0_CMD before: 0x%x\n", __func__, cmd.u32); + cmd.s.fre = 1; + cmd.s.sud = 1; + cmd.s.pod = 1; +@@ -1352,7 +1352,7 @@ retry0: + cmd.s.fbscp = 1; /* Enable FIS-based switching */ + csr_wr32(CVMX_SATA_UAHC_PX_CMD(0), cmd.u32); + cmd.u32 = csr_rd32(CVMX_SATA_UAHC_PX_CMD(0)); +- debug("%s: SATA_UAHC_P0_CMD after: 0x%x\n", __func__, cmd.u32); ++printf("%s: SATA_UAHC_P0_CMD after: 0x%x\n", __func__, cmd.u32); + + sctl0.u32 = csr_rd32(CVMX_SATA_UAHC_PX_SCTL(0)); + sctl0.s.det = 1; +@@ -1436,7 +1436,7 @@ retry1: + + /* Set spin-up, power on, FIS RX enable, start, active */ + cmd.u32 = csr_rd32(CVMX_SATA_UAHC_PX_CMD(1)); +- debug("%s: SATA_UAHC_P1_CMD before: 0x%x\n", __func__, cmd.u32); ++printf("%s: SATA_UAHC_P1_CMD before: 0x%x\n", __func__, cmd.u32); + cmd.s.fre = 1; + cmd.s.sud = 1; + cmd.s.pod = 1; +@@ -1445,7 +1445,7 @@ retry1: + cmd.s.fbscp = 1; /* Enable FIS-based switching */ + csr_wr32(CVMX_SATA_UAHC_PX_CMD(1), cmd.u32); + cmd.u32 = csr_rd32(CVMX_SATA_UAHC_PX_CMD(1)); +- debug("%s: SATA_UAHC_P1_CMD after: 0x%x\n", __func__, cmd.u32); ++printf("%s: SATA_UAHC_P1_CMD after: 0x%x\n", __func__, cmd.u32); + + /* check status */ + done = get_timer(0); +@@ -1522,7 +1522,7 @@ static int __sata_bist_cn70xx(int qlm, int baud_mhz, int ref_clk_sel, int ref_cl + u64 done; + int result = -1; + +- debug("%s(%d, %d, %d, %d)\n", __func__, qlm, baud_mhz, ref_clk_sel, ref_clk_input); ++printf("%s(%d, %d, %d, %d)\n", __func__, qlm, baud_mhz, ref_clk_sel, ref_clk_input); + bist_status.u64 = csr_rd(CVMX_SATA_UCTL_BIST_STATUS); + + { +@@ -1568,7 +1568,7 @@ static int __sata_bist_cn70xx(int qlm, int baud_mhz, int ref_clk_sel, int ref_cl + return -1; + } + +- debug("%s: Initializing UAHC\n", __func__); ++printf("%s: Initializing UAHC\n", __func__); + if (__dlm2_sata_uahc_init_cn70xx(baud_mhz)) { + printf("ERROR: Failed to initialize SATA UAHC CSRs\n"); + return -1; +@@ -1587,7 +1587,7 @@ static int __sata_bist_cn70xx(int qlm, int baud_mhz, int ref_clk_sel, int ref_cl + + static int __setup_sata(int qlm, int baud_mhz, int ref_clk_sel, int ref_clk_input) + { +- debug("%s(%d, %d, %d, %d)\n", __func__, qlm, baud_mhz, ref_clk_sel, ref_clk_input); ++printf("%s(%d, %d, %d, %d)\n", __func__, qlm, baud_mhz, ref_clk_sel, ref_clk_input); + return __sata_bist_cn70xx(qlm, baud_mhz, ref_clk_sel, ref_clk_input); + } + +@@ -1600,10 +1600,10 @@ static int __dlmx_setup_pcie_cn70xx(int qlm, enum cvmx_qlm_mode mode, int gen2, + cvmx_gserx_dlmx_ref_clkdiv2_t ref_clkdiv2; + static const u8 ref_clk_mult[2] = { 35, 56 }; /* 100 & 125 MHz ref clock supported. */ + +- debug("%s(%d, %d, %d, %d, %d, %d)\n", __func__, qlm, mode, gen2, rc, ref_clk_sel, ++printf("%s(%d, %d, %d, %d, %d, %d)\n", __func__, qlm, mode, gen2, rc, ref_clk_sel, + ref_clk_input); + if (rc == 0) { +- debug("Skipping initializing PCIe dlm %d in endpoint mode\n", qlm); ++printf("Skipping initializing PCIe dlm %d in endpoint mode\n", qlm); + return 0; + } + +@@ -1679,7 +1679,7 @@ static int __dlmx_setup_pcie_cn70xx(int qlm, enum cvmx_qlm_mode mode, int gen2, + */ + mpll_multiplier.u64 = csr_rd(CVMX_GSERX_DLMX_MPLL_MULTIPLIER(qlm, 0)); + mpll_multiplier.s.mpll_multiplier = ref_clk_mult[ref_clk_sel]; +- debug("%s: Setting MPLL multiplier to %d\n", __func__, ++printf("%s: Setting MPLL multiplier to %d\n", __func__, + (int)mpll_multiplier.s.mpll_multiplier); + csr_wr(CVMX_GSERX_DLMX_MPLL_MULTIPLIER(qlm, 0), mpll_multiplier.u64); + /* 5. Clear GSER0_DLM(1..2)_TEST_POWERDOWN. Configurations that only +@@ -1887,7 +1887,7 @@ static int __dlmx_setup_pcie_cn70xx(int qlm, enum cvmx_qlm_mode mode, int gen2, + static int octeon_configure_qlm_cn70xx(int qlm, int speed, int mode, int rc, int gen2, + int ref_clk_sel, int ref_clk_input) + { +- debug("%s(%d, %d, %d, %d, %d, %d, %d)\n", __func__, qlm, speed, mode, rc, gen2, ref_clk_sel, ++printf("%s(%d, %d, %d, %d, %d, %d, %d)\n", __func__, qlm, speed, mode, rc, gen2, ref_clk_sel, + ref_clk_input); + switch (qlm) { + case 0: { +@@ -1897,59 +1897,59 @@ static int octeon_configure_qlm_cn70xx(int qlm, int speed, int mode, int rc, int + inf_mode0.u64 = csr_rd(CVMX_GMXX_INF_MODE(0)); + inf_mode1.u64 = csr_rd(CVMX_GMXX_INF_MODE(1)); + if (inf_mode0.s.en || inf_mode1.s.en) { +- debug("DLM0 already configured\n"); ++printf("DLM0 already configured\n"); + return -1; + } + + switch (mode) { + case CVMX_QLM_MODE_SGMII_SGMII: +- debug(" Mode SGMII SGMII\n"); ++printf(" Mode SGMII SGMII\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_SGMII; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_SGMII; + break; + case CVMX_QLM_MODE_SGMII_QSGMII: +- debug(" Mode SGMII QSGMII\n"); ++printf(" Mode SGMII QSGMII\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_SGMII; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_QSGMII; + break; + case CVMX_QLM_MODE_SGMII_DISABLED: +- debug(" Mode SGMII Disabled\n"); ++printf(" Mode SGMII Disabled\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_SGMII; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_DISABLED; + break; + case CVMX_QLM_MODE_DISABLED_SGMII: +- debug("Mode Disabled SGMII\n"); ++printf("Mode Disabled SGMII\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_DISABLED; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_SGMII; + break; + case CVMX_QLM_MODE_QSGMII_SGMII: +- debug(" Mode QSGMII SGMII\n"); ++printf(" Mode QSGMII SGMII\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_QSGMII; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_SGMII; + break; + case CVMX_QLM_MODE_QSGMII_QSGMII: +- debug(" Mode QSGMII QSGMII\n"); ++printf(" Mode QSGMII QSGMII\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_QSGMII; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_QSGMII; + break; + case CVMX_QLM_MODE_QSGMII_DISABLED: +- debug(" Mode QSGMII Disabled\n"); ++printf(" Mode QSGMII Disabled\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_QSGMII; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_DISABLED; + break; + case CVMX_QLM_MODE_DISABLED_QSGMII: +- debug("Mode Disabled QSGMII\n"); ++printf("Mode Disabled QSGMII\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_DISABLED; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_QSGMII; + break; + case CVMX_QLM_MODE_RXAUI: +- debug(" Mode RXAUI\n"); ++printf(" Mode RXAUI\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_RXAUI; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_DISABLED; + + break; + default: +- debug(" Mode Disabled Disabled\n"); ++printf(" Mode Disabled Disabled\n"); + inf_mode0.s.mode = CVMX_GMX_INF_MODE_DISABLED; + inf_mode1.s.mode = CVMX_GMX_INF_MODE_DISABLED; + break; +@@ -1984,7 +1984,7 @@ static int octeon_configure_qlm_cn70xx(int qlm, int speed, int mode, int rc, int + case 1: + switch (mode) { + case CVMX_QLM_MODE_PCIE: /* PEM0 on DLM1 & DLM2 */ +- debug(" Mode PCIe\n"); ++printf(" Mode PCIe\n"); + if (__dlmx_setup_pcie_cn70xx(1, mode, gen2, rc, ref_clk_sel, ref_clk_input)) + return -1; + if (__dlmx_setup_pcie_cn70xx(2, mode, gen2, rc, ref_clk_sel, ref_clk_input)) +@@ -1993,44 +1993,44 @@ static int octeon_configure_qlm_cn70xx(int qlm, int speed, int mode, int rc, int + case CVMX_QLM_MODE_PCIE_1X2: /* PEM0 on DLM1 */ + case CVMX_QLM_MODE_PCIE_2X1: /* PEM0 & PEM1 on DLM1 */ + case CVMX_QLM_MODE_PCIE_1X1: /* PEM0 on DLM1, only 1 lane */ +- debug(" Mode PCIe 1x2, 2x1 or 1x1\n"); ++printf(" Mode PCIe 1x2, 2x1 or 1x1\n"); + if (__dlmx_setup_pcie_cn70xx(qlm, mode, gen2, rc, ref_clk_sel, + ref_clk_input)) + return -1; + break; + case CVMX_QLM_MODE_DISABLED: +- debug(" Mode disabled\n"); ++printf(" Mode disabled\n"); + break; + default: +- debug("DLM1 illegal mode specified\n"); ++printf("DLM1 illegal mode specified\n"); + return -1; + } + break; + case 2: + switch (mode) { + case CVMX_QLM_MODE_SATA_2X1: +- debug("%s: qlm 2, mode is SATA 2x1\n", __func__); ++printf("%s: qlm 2, mode is SATA 2x1\n", __func__); + /* DLM2 is SATA, PCIE2 is disabled */ + if (__setup_sata(qlm, speed, ref_clk_sel, ref_clk_input)) + return -1; + break; + case CVMX_QLM_MODE_PCIE: +- debug(" Mode PCIe\n"); ++printf(" Mode PCIe\n"); + /* DLM2 is PCIE0, PCIE1-2 are disabled. */ + /* Do nothing, its initialized in DLM1 */ + break; + case CVMX_QLM_MODE_PCIE_1X2: /* PEM1 on DLM2 */ + case CVMX_QLM_MODE_PCIE_2X1: /* PEM1 & PEM2 on DLM2 */ +- debug(" Mode PCIe 1x2 or 2x1\n"); ++printf(" Mode PCIe 1x2 or 2x1\n"); + if (__dlmx_setup_pcie_cn70xx(qlm, mode, gen2, rc, ref_clk_sel, + ref_clk_input)) + return -1; + break; + case CVMX_QLM_MODE_DISABLED: +- debug(" Mode Disabled\n"); ++printf(" Mode Disabled\n"); + break; + default: +- debug("DLM2 illegal mode specified\n"); ++printf("DLM2 illegal mode specified\n"); + return -1; + } + default: +@@ -2382,7 +2382,7 @@ void octeon_qlm_tune_per_lane_v3(int node, int qlm, int baud_mhz, int lane, int + return; + } + +- debug("N%d.QLM%d: Lane %d: TX_SWING=%d, TX_PRE=%d, TX_POST=%d, TX_GAIN=%d, TX_VBOOST=%d\n", ++printf("N%d.QLM%d: Lane %d: TX_SWING=%d, TX_PRE=%d, TX_POST=%d, TX_GAIN=%d, TX_VBOOST=%d\n", + node, qlm, lane, tx_swing, tx_pre, tx_post, tx_gain, tx_vboost); + + /* Complete the Tx swing and Tx equilization programming */ +@@ -3286,11 +3286,11 @@ static int __set_qlm_ref_clk_cn78xx(int node, int qlm, int lane_mode, int ref_cl + { + if (ref_clk_sel > 3 || ref_clk_sel < 0 || + !refclk_settings_cn78xx[lane_mode][ref_clk_sel].valid) { +- debug("%s: Invalid reference clock %d for lane mode %d for node %d, QLM %d\n", ++printf("%s: Invalid reference clock %d for lane mode %d for node %d, QLM %d\n", + __func__, ref_clk_sel, lane_mode, node, qlm); + return -1; + } +- debug("%s(%d, %d, 0x%x, %d)\n", __func__, node, qlm, lane_mode, ref_clk_sel); ++printf("%s(%d, %d, 0x%x, %d)\n", __func__, node, qlm, lane_mode, ref_clk_sel); + ref_clk_cn78xx[node][qlm][lane_mode] = ref_clk_sel; + return 0; + } +@@ -3583,7 +3583,7 @@ static void __qlm_setup_pll_cn78xx(int node, int qlm) + pmode_1.u64 = 0; + ref_clk = ref_clk_cn78xx[node][qlm][lane_mode]; + clk_settings = &refclk_settings_cn78xx[lane_mode][ref_clk]; +- debug("%s(%d, %d): lane_mode: 0x%x, ref_clk: %d\n", __func__, node, qlm, lane_mode, ++printf("%s(%d, %d): lane_mode: 0x%x, ref_clk: %d\n", __func__, node, qlm, lane_mode, + ref_clk); + + if (!clk_settings->valid) { +@@ -4122,10 +4122,10 @@ int octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int r + int num_ports = 0; + int lane_to_sds = 0; + +- debug("%s(node: %d, qlm: %d, baud_mhz: %d, mode: %d, rc: %d, gen3: %d, ref_clk_sel: %d, ref_clk_input: %d\n", ++printf("%s(node: %d, qlm: %d, baud_mhz: %d, mode: %d, rc: %d, gen3: %d, ref_clk_sel: %d, ref_clk_input: %d\n", + __func__, node, qlm, baud_mhz, mode, rc, gen3, ref_clk_sel, ref_clk_input); + if (OCTEON_IS_MODEL(OCTEON_CN76XX) && qlm > 4) { +- debug("%s: qlm %d not present on CN76XX\n", __func__, qlm); ++printf("%s: qlm %d not present on CN76XX\n", __func__, qlm); + return -1; + } + +@@ -4138,7 +4138,7 @@ int octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int r + /* If PEM is in EP, no need to do anything */ + + if (cfg.s.pcie && rc == 0) { +- debug("%s: node %d, qlm %d is in PCIe endpoint mode, returning\n", ++printf("%s: node %d, qlm %d is in PCIe endpoint mode, returning\n", + __func__, node, qlm); + return 0; + } +@@ -4355,7 +4355,7 @@ int octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int r + lane_to_sds = 1; + num_ports = 4; + lane_mode = __get_lane_mode_for_speed_and_ref_clk(ref_clk_sel, baud_mhz, &alt_pll); +- debug("%s: SGMII lane mode: %d, alternate PLL: %s\n", __func__, lane_mode, ++printf("%s: SGMII lane mode: %d, alternate PLL: %s\n", __func__, lane_mode, + alt_pll ? "true" : "false"); + if (lane_mode == -1) + return -1; +@@ -4366,7 +4366,7 @@ int octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int r + lane_to_sds = 0xe4; + num_ports = 1; + lane_mode = __get_lane_mode_for_speed_and_ref_clk(ref_clk_sel, baud_mhz, &alt_pll); +- debug("%s: XAUI lane mode: %d\n", __func__, lane_mode); ++printf("%s: XAUI lane mode: %d\n", __func__, lane_mode); + if (lane_mode == -1) + return -1; + break; +@@ -4375,7 +4375,7 @@ int octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int r + lmac_type = 2; + lane_to_sds = 0; + num_ports = 2; +- debug("%s: RXAUI lane mode: %d\n", __func__, lane_mode); ++printf("%s: RXAUI lane mode: %d\n", __func__, lane_mode); + lane_mode = __get_lane_mode_for_speed_and_ref_clk(ref_clk_sel, baud_mhz, &alt_pll); + if (lane_mode == -1) + return -1; +@@ -4387,7 +4387,7 @@ int octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int r + lane_to_sds = 1; + num_ports = 4; + lane_mode = __get_lane_mode_for_speed_and_ref_clk(ref_clk_sel, baud_mhz, &alt_pll); +- debug("%s: XFI/10G_KR lane mode: %d\n", __func__, lane_mode); ++printf("%s: XFI/10G_KR lane mode: %d\n", __func__, lane_mode); + if (lane_mode == -1) + return -1; + break; +@@ -4398,7 +4398,7 @@ int octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int r + lane_to_sds = 0xe4; + num_ports = 1; + lane_mode = __get_lane_mode_for_speed_and_ref_clk(ref_clk_sel, baud_mhz, &alt_pll); +- debug("%s: XLAUI/40G_KR4 lane mode: %d\n", __func__, lane_mode); ++printf("%s: XLAUI/40G_KR4 lane mode: %d\n", __func__, lane_mode); + if (lane_mode == -1) + return -1; + break; +@@ -4417,7 +4417,7 @@ int octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int r + } + + if (alt_pll) { +- debug("%s: alternate PLL settings used for node %d, qlm %d, lane mode %d, reference clock %d\n", ++printf("%s: alternate PLL settings used for node %d, qlm %d, lane mode %d, reference clock %d\n", + __func__, node, qlm, lane_mode, ref_clk_sel); + if (__set_qlm_ref_clk_cn78xx(node, qlm, lane_mode, ref_clk_sel)) { + printf("%s: Error: reference clock %d is not supported for node %d, qlm %d\n", +@@ -4647,7 +4647,7 @@ static int octeon_configure_qlm_cn73xx(int qlm, int baud_mhz, int mode, int rc, + int enable_training = 0; + int additional_lmacs = 0; + +- debug("%s(qlm: %d, baud_mhz: %d, mode: %d, rc: %d, gen3: %d, ref_clk_sel: %d, ref_clk_input: %d\n", ++printf("%s(qlm: %d, baud_mhz: %d, mode: %d, rc: %d, gen3: %d, ref_clk_sel: %d, ref_clk_input: %d\n", + __func__, qlm, baud_mhz, mode, rc, gen3, ref_clk_sel, ref_clk_input); + + /* Don't configure QLM4 if it is not in SATA mode */ +@@ -4669,7 +4669,7 @@ static int octeon_configure_qlm_cn73xx(int qlm, int baud_mhz, int mode, int rc, + if (cfg.s.pcie && rc == 0 && + (mode == CVMX_QLM_MODE_PCIE || mode == CVMX_QLM_MODE_PCIE_1X8 || + mode == CVMX_QLM_MODE_PCIE_1X2)) { +- debug("%s: qlm %d is in PCIe endpoint mode, returning\n", __func__, qlm); ++printf("%s: qlm %d is in PCIe endpoint mode, returning\n", __func__, qlm); + return 0; + } + +@@ -5080,13 +5080,13 @@ static int octeon_configure_qlm_cn73xx(int qlm, int baud_mhz, int mode, int rc, + + if (is_pcie == 0) + lane_mode = __get_lane_mode_for_speed_and_ref_clk(ref_clk_sel, baud_mhz, &alt_pll); +- debug("%s: %d lane mode: %d, alternate PLL: %s\n", __func__, mode, lane_mode, ++printf("%s: %d lane mode: %d, alternate PLL: %s\n", __func__, mode, lane_mode, + alt_pll ? "true" : "false"); + if (lane_mode == -1) + return -1; + + if (alt_pll) { +- debug("%s: alternate PLL settings used for qlm %d, lane mode %d, reference clock %d\n", ++printf("%s: alternate PLL settings used for qlm %d, lane mode %d, reference clock %d\n", + __func__, qlm, lane_mode, ref_clk_sel); + if (__set_qlm_ref_clk_cn78xx(0, qlm, lane_mode, ref_clk_sel)) { + printf("%s: Error: reference clock %d is not supported for qlm %d, lane mode: 0x%x\n", +@@ -5362,7 +5362,7 @@ static int octeon_configure_qlm_cnf75xx(int qlm, int baud_mhz, int mode, int rc, + int port = (qlm == 3) ? 1 : 0; + cvmx_sriox_status_reg_t status_reg; + +- debug("%s(qlm: %d, baud_mhz: %d, mode: %d, rc: %d, gen3: %d, ref_clk_sel: %d, ref_clk_input: %d\n", ++printf("%s(qlm: %d, baud_mhz: %d, mode: %d, rc: %d, gen3: %d, ref_clk_sel: %d, ref_clk_input: %d\n", + __func__, qlm, baud_mhz, mode, rc, gen3, ref_clk_sel, ref_clk_input); + if (qlm > 8) { + printf("Invalid qlm%d passed\n", qlm); +@@ -5378,12 +5378,12 @@ static int octeon_configure_qlm_cnf75xx(int qlm, int baud_mhz, int mode, int rc, + + /* If PEM is in EP, no need to do anything */ + if (cfg.s.pcie && rc == 0) { +- debug("%s: qlm %d is in PCIe endpoint mode, returning\n", __func__, qlm); ++printf("%s: qlm %d is in PCIe endpoint mode, returning\n", __func__, qlm); + return 0; + } + + if (cfg.s.srio && rc == 0) { +- debug("%s: qlm %d is in SRIO endpoint mode, returning\n", __func__, qlm); ++printf("%s: qlm %d is in SRIO endpoint mode, returning\n", __func__, qlm); + return 0; + } + +@@ -5501,7 +5501,7 @@ static int octeon_configure_qlm_cnf75xx(int qlm, int baud_mhz, int mode, int rc, + int spd = 0xf; + + if (cvmx_fuse_read(1601)) { +- debug("SRIO is not supported on cnf73xx model\n"); ++printf("SRIO is not supported on cnf73xx model\n"); + return -1; + } + +@@ -5636,13 +5636,13 @@ static int octeon_configure_qlm_cnf75xx(int qlm, int baud_mhz, int mode, int rc, + &alt_pll); + } + +- debug("%s: %d lane mode: %d, alternate PLL: %s\n", __func__, mode, lane_mode, ++printf("%s: %d lane mode: %d, alternate PLL: %s\n", __func__, mode, lane_mode, + alt_pll ? "true" : "false"); + if (lane_mode == -1) + return -1; + + if (alt_pll) { +- debug("%s: alternate PLL settings used for qlm %d, lane mode %d, reference clock %d\n", ++printf("%s: alternate PLL settings used for qlm %d, lane mode %d, reference clock %d\n", + __func__, qlm, lane_mode, ref_clk_sel); + if (__set_qlm_ref_clk_cn78xx(0, qlm, lane_mode, ref_clk_sel)) { + printf("%s: Error: reference clock %d is not supported for qlm %d\n", +@@ -5795,7 +5795,7 @@ int octeon_configure_qlm(int qlm, int speed, int mode, int rc, int pcie_mode, in + { + int node = 0; // ToDo: corrently only node 0 is supported + +- debug("%s(%d, %d, %d, %d, %d, %d, %d)\n", __func__, qlm, speed, mode, rc, pcie_mode, ++printf("%s(%d, %d, %d, %d, %d, %d, %d)\n", __func__, qlm, speed, mode, rc, pcie_mode, + ref_clk_sel, ref_clk_input); + if (OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)) + return octeon_configure_qlm_cn61xx(qlm, speed, mode, rc, pcie_mode); +diff --git a/arch/nds32/cpu/n1213/ag101/timer.c b/arch/nds32/cpu/n1213/ag101/timer.c +index 394fc10ec..098c60782 100644 +--- a/arch/nds32/cpu/n1213/ag101/timer.c ++++ b/arch/nds32/cpu/n1213/ag101/timer.c +@@ -25,7 +25,7 @@ int timer_init(void) + struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; + unsigned int cr; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + /* disable timers */ + writel(0, &tmr->cr); +@@ -80,12 +80,12 @@ void reset_timer_masked(void) + #endif + timestamp = 0; /* start "advancing" time stamp from 0 */ + +- debug("%s(): lastdec = %lx\n", __func__, lastdec); ++printf("%s(): lastdec = %lx\n", __func__, lastdec); + } + + void reset_timer(void) + { +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + reset_timer_masked(); + } + +@@ -104,7 +104,7 @@ ulong get_timer_masked(void) + (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ); + #endif + +- debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec); ++printf("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec); + + if (lastdec >= now) { + /* +@@ -127,7 +127,7 @@ ulong get_timer_masked(void) + + lastdec = now; + +- debug("%s() returns %lx\n", __func__, timestamp); ++printf("%s() returns %lx\n", __func__, timestamp); + + return timestamp; + } +@@ -137,13 +137,13 @@ ulong get_timer_masked(void) + */ + ulong get_timer(ulong base) + { +- debug("%s(%lx)\n", __func__, base); ++printf("%s(%lx)\n", __func__, base); + return get_timer_masked() - base; + } + + void set_timer(ulong t) + { +- debug("%s(%lx)\n", __func__, t); ++printf("%s(%lx)\n", __func__, t); + timestamp = t; + } + +@@ -159,7 +159,7 @@ void __udelay(unsigned long usec) + #endif + unsigned long now, last = readl(&tmr->timer3_counter); + +- debug("%s(%lu)\n", __func__, usec); ++printf("%s(%lu)\n", __func__, usec); + while (tmo > 0) { + now = readl(&tmr->timer3_counter); + if (now > last) /* count down timer overflow */ +@@ -176,7 +176,7 @@ void __udelay(unsigned long usec) + */ + unsigned long long get_ticks(void) + { +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + return get_timer(0); + } + +@@ -186,7 +186,7 @@ unsigned long long get_ticks(void) + */ + ulong get_tbclk(void) + { +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + #ifdef CONFIG_FTTMR010_EXT_CLK + return CONFIG_SYS_HZ; + #else +diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c +index b3b8bc290..6d95c0a8f 100644 +--- a/arch/nds32/lib/bootm.c ++++ b/arch/nds32/lib/bootm.c +@@ -70,12 +70,12 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) + + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + +- debug("## Transferring control to Linux (at address %08lx) ...\n", ++printf("## Transferring control to Linux (at address %08lx) ...\n", + (ulong)theKernel); + + if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) { + #ifdef CONFIG_OF_LIBFDT +- debug("using: FDT\n"); ++printf("using: FDT\n"); + if (image_setup_linux(images)) { + printf("FDT creation failed! hanging..."); + hang(); +diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c +index 2c8f9731c..220787389 100644 +--- a/arch/nios2/lib/bootm.c ++++ b/arch/nios2/lib/bootm.c +@@ -44,8 +44,8 @@ int do_bootm_linux(int flag, int argc, char *const argv[], + disable_interrupts(); + flush_dcache_all(); + +- debug("bootargs=%s @ 0x%lx\n", commandline, (ulong)&commandline); +- debug("initrd=0x%lx-0x%lx\n", (ulong)initrd_start, (ulong)initrd_end); ++printf("bootargs=%s @ 0x%lx\n", commandline, (ulong)&commandline); ++printf("initrd=0x%lx-0x%lx\n", (ulong)initrd_start, (ulong)initrd_end); + /* kernel parameters passing + * r4 : NIOS magic + * r5 : initrd start +diff --git a/arch/powerpc/cpu/mpc83xx/law.c b/arch/powerpc/cpu/mpc83xx/law.c +index 5e02f4094..9560e3f9e 100644 +--- a/arch/powerpc/cpu/mpc83xx/law.c ++++ b/arch/powerpc/cpu/mpc83xx/law.c +@@ -28,8 +28,8 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) + */ + ecm->bar = start & 0xfffff000; + ecm->ar = (LAWAR_EN | (id << 20) | (LAWAR_SIZE & law_sz_enc)); +- debug("DDR:bar=0x%08x\n", ecm->bar); +- debug("DDR:ar=0x%08x\n", ecm->ar); ++printf("DDR:bar=0x%08x\n", ecm->bar); ++printf("DDR:ar=0x%08x\n", ecm->ar); + + /* recalculate size based on what was actually covered by the law */ + law_sz = 1ull << __ilog2_u64(law_sz); +@@ -45,8 +45,8 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) + ecm = &immap->sysconf.ddrlaw[1]; + ecm->bar = start & 0xfffff000; + ecm->ar = (LAWAR_EN | (id << 20) | (LAWAR_SIZE & law_sz_enc)); +- debug("DDR:bar=0x%08x\n", ecm->bar); +- debug("DDR:ar=0x%08x\n", ecm->ar); ++printf("DDR:bar=0x%08x\n", ecm->bar); ++printf("DDR:ar=0x%08x\n", ecm->ar); + } else { + return 0; + } +diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c +index a861e8dd2..9026b4d3c 100644 +--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c ++++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c +@@ -174,7 +174,7 @@ long int spd_sdram() + #endif + /* Check the memory type */ + if (spd.mem_type != SPD_MEMTYPE_DDR && spd.mem_type != SPD_MEMTYPE_DDR2) { +- debug("DDR: Module mem type is %02X\n", spd.mem_type); ++printf("DDR: Module mem type is %02X\n", spd.mem_type); + return 0; + } + +@@ -232,9 +232,9 @@ long int spd_sdram() + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) + | (spd.ncol_addr - 8) ); +- debug("\n"); +- debug("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds); +- debug("cs0_config = 0x%08x\n",ddr->cs_config[0]); ++printf("\n"); ++printf("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds); ++printf("cs0_config = 0x%08x\n",ddr->cs_config[0]); + + if (n_ranks == 2) { + ddr->csbnds[1].csbnds = ( (banksize(spd.row_dens) >> 8) +@@ -245,8 +245,8 @@ long int spd_sdram() + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) + | (spd.ncol_addr - 8) ); +- debug("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds); +- debug("cs1_config = 0x%08x\n",ddr->cs_config[1]); ++printf("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds); ++printf("cs1_config = 0x%08x\n",ddr->cs_config[1]); + } + + #else +@@ -257,9 +257,9 @@ long int spd_sdram() + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) + | (spd.ncol_addr - 8) ); +- debug("\n"); +- debug("cs2_bnds = 0x%08x\n",ddr->csbnds[2].csbnds); +- debug("cs2_config = 0x%08x\n",ddr->cs_config[2]); ++printf("\n"); ++printf("cs2_bnds = 0x%08x\n",ddr->csbnds[2].csbnds); ++printf("cs2_config = 0x%08x\n",ddr->cs_config[2]); + + if (n_ranks == 2) { + ddr->csbnds[3].csbnds = ( (banksize(spd.row_dens) >> 8) +@@ -270,8 +270,8 @@ long int spd_sdram() + | ((spd.nbanks == 8 ? 1 : 0) << 14) + | ((spd.nrow_addr - 12) << 8) + | (spd.ncol_addr - 8) ); +- debug("cs3_bnds = 0x%08x\n",ddr->csbnds[3].csbnds); +- debug("cs3_config = 0x%08x\n",ddr->cs_config[3]); ++printf("cs3_bnds = 0x%08x\n",ddr->csbnds[3].csbnds); ++printf("cs3_config = 0x%08x\n",ddr->cs_config[3]); + } + #endif + +@@ -290,8 +290,8 @@ long int spd_sdram() + */ + ecm->bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; + ecm->ar = (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & law_size)); +- debug("DDR:bar=0x%08x\n", ecm->bar); +- debug("DDR:ar=0x%08x\n", ecm->ar); ++printf("DDR:bar=0x%08x\n", ecm->bar); ++printf("DDR:ar=0x%08x\n", ecm->ar); + + /* + * Find the largest CAS by locating the highest 1 bit +@@ -322,13 +322,13 @@ long int spd_sdram() + spd.cas_lat); + return 0; + } +- debug("DDR: caslat SPD bit is %d\n", caslat); ++printf("DDR: caslat SPD bit is %d\n", caslat); + + max_bus_clk = 1000 *10 / (((spd.clk_cycle & 0xF0) >> 4) * 10 + + (spd.clk_cycle & 0x0f)); + max_data_rate = max_bus_clk * 2; + +- debug("DDR:Module maximum data rate is: %d MHz\n", max_data_rate); ++printf("DDR:Module maximum data rate is: %d MHz\n", max_data_rate); + + ddrc_clk = gd->mem_clk / 1000000; + effective_data_rate = 0; +@@ -428,8 +428,8 @@ long int spd_sdram() + } + } + +- debug("DDR:Effective data rate is: %dMHz\n", effective_data_rate); +- debug("DDR:The MSB 1 of CAS Latency is: %d\n", caslat); ++printf("DDR:Effective data rate is: %dMHz\n", effective_data_rate); ++printf("DDR:The MSB 1 of CAS Latency is: %d\n", caslat); + + /* + * Errata DDR6 work around: input enable 2 cycles earlier. +@@ -445,7 +445,7 @@ long int spd_sdram() + + sync(); + +- debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); ++printf("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg); + } + + /* +@@ -458,8 +458,8 @@ long int spd_sdram() + caslat_ctrl = (2 * caslat - 1) & 0x0f; + } + +- debug("DDR: effective data rate is %d MHz\n", effective_data_rate); +- debug("DDR: caslat SPD bit is %d, controller field is 0x%x\n", ++printf("DDR: effective data rate is %d MHz\n", effective_data_rate); ++printf("DDR: caslat SPD bit is %d, controller field is 0x%x\n", + caslat, caslat_ctrl); + + /* +@@ -478,7 +478,7 @@ long int spd_sdram() + | ((taxpd_clk & 0xf) << 8) /* ODT_PD_EXIT */ + | ((tmrd_clk & 0xf) << 0) /* MRS_CYC */ + ); +- debug("DDR: timing_cfg_0 = 0x%08x\n", ddr->timing_cfg_0); ++printf("DDR: timing_cfg_0 = 0x%08x\n", ddr->timing_cfg_0); + } + + /* +@@ -637,8 +637,8 @@ long int spd_sdram() + | ((four_act & 0x1f) << 0) /* FOUR_ACT */ + ); + +- debug("DDR:timing_cfg_1=0x%08x\n", ddr->timing_cfg_1); +- debug("DDR:timing_cfg_2=0x%08x\n", ddr->timing_cfg_2); ++printf("DDR:timing_cfg_1=0x%08x\n", ddr->timing_cfg_1); ++printf("DDR:timing_cfg_2=0x%08x\n", ddr->timing_cfg_2); + + /* Check DIMM data bus width */ + if (spd.dataw_lsb < 64) { +@@ -646,17 +646,17 @@ long int spd_sdram() + burstlen = 0x03; /* 32 bit data bus, burst len is 8 */ + else + burstlen = 0x02; /* 32 bit data bus, burst len is 4 */ +- debug("\n DDR DIMM: data bus width is 32 bit"); ++printf("\n DDR DIMM: data bus width is 32 bit"); + } else { + burstlen = 0x02; /* Others act as 64 bit bus, burst len is 4 */ +- debug("\n DDR DIMM: data bus width is 64 bit"); ++printf("\n DDR DIMM: data bus width is 64 bit"); + } + + /* Is this an ECC DDR chip? */ + if (spd.config == 0x02) +- debug(" with ECC\n"); ++printf(" with ECC\n"); + else +- debug(" without ECC\n"); ++printf(" without ECC\n"); + + /* Burst length is always 4 for 64 bit data bus, 8 for 32 bit data bus, + Burst type is sequential +@@ -703,13 +703,13 @@ long int spd_sdram() + | (burstlen << 0) /* Burst length */ + ); + } +- debug("DDR:sdram_mode=0x%08x\n", ddr->sdram_mode); ++printf("DDR:sdram_mode=0x%08x\n", ddr->sdram_mode); + + /* + * Clear EMRS2 and EMRS3. + */ + ddr->sdram_mode2 = 0; +- debug("DDR: sdram_mode2 = 0x%08x\n", ddr->sdram_mode2); ++printf("DDR: sdram_mode2 = 0x%08x\n", ddr->sdram_mode2); + + switch (spd.refresh) { + case 0x00: +@@ -746,7 +746,7 @@ long int spd_sdram() + * If auto-charge is used, set BSTOPRE = 0 + */ + ddr->sdram_interval = ((refresh_clk & 0x3fff) << 16) | 0x100; +- debug("DDR:sdram_interval=0x%08x\n", ddr->sdram_interval); ++printf("DDR:sdram_interval=0x%08x\n", ddr->sdram_interval); + + /* + * SDRAM Cfg 2 +@@ -764,13 +764,13 @@ long int spd_sdram() + | (1 << 12) /* 1 refresh at a time */ + ); + +- debug("DDR: sdram_cfg2 = 0x%08x\n", ddr->sdram_cfg2); ++printf("DDR: sdram_cfg2 = 0x%08x\n", ddr->sdram_cfg2); + } + + #ifdef CONFIG_SYS_DDR_SDRAM_CLK_CNTL /* Optional platform specific value */ + ddr->sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; + #endif +- debug("DDR:sdram_clk_cntl=0x%08x\n", ddr->sdram_clk_cntl); ++printf("DDR:sdram_clk_cntl=0x%08x\n", ddr->sdram_clk_cntl); + + sync(); + isync(); +@@ -829,10 +829,10 @@ long int spd_sdram() + (0 << ECC_ERROR_MAN_SBEC_SHIFT); + } + +- debug("DDR:err_disable=0x%08x\n", ddr->err_disable); +- debug("DDR:err_sbe=0x%08x\n", ddr->err_sbe); ++printf("DDR:err_disable=0x%08x\n", ddr->err_disable); ++printf("DDR:err_sbe=0x%08x\n", ddr->err_sbe); + #endif +- debug(" DDRC ECC mode: %s\n", ddrc_ecc_enable ? "ON":"OFF"); ++printf(" DDRC ECC mode: %s\n", ddrc_ecc_enable ? "ON":"OFF"); + + #if defined(CONFIG_DDR_2T_TIMING) + /* +@@ -846,7 +846,7 @@ long int spd_sdram() + isync(); + udelay(500); + +- debug("DDR:sdram_cfg=0x%08x\n", ddr->sdram_cfg); ++printf("DDR:sdram_cfg=0x%08x\n", ddr->sdram_cfg); + return memsize; /*in MBytes*/ + } + #endif /* CONFIG_SPD_EEPROM */ +@@ -917,7 +917,7 @@ void ddr_enable_ecc(unsigned int dram_size) + #if defined(CONFIG_DDR_ECC_INIT_VIA_DMA) + dma_meminit(pattern[0], dram_size); + #else +- debug("ddr init: CPU FP write method\n"); ++printf("ddr init: CPU FP write method\n"); + size = dram_size; + for (p = 0; p < (u64*)(size); p++) { + ppcDWstore((u32*)p, pattern); +@@ -928,8 +928,8 @@ void ddr_enable_ecc(unsigned int dram_size) + t_end = get_tbms(); + icache_disable(); + +- debug("\nREADY!!\n"); +- debug("ddr init duration: %ld ms\n", t_end - t_start); ++printf("\nREADY!!\n"); ++printf("ddr init duration: %ld ms\n", t_end - t_start); + + /* Clear All ECC Errors */ + if ((ddr->err_detect & ECC_ERROR_DETECT_MME) == ECC_ERROR_DETECT_MME) +diff --git a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c +index b972cf3b5..00da9d9c3 100644 +--- a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c +@@ -85,7 +85,7 @@ void fsl_serdes_init(void) + if (serdes1_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c +index 34b58bb7f..6657c6b65 100644 +--- a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c +@@ -50,7 +50,7 @@ void fsl_serdes_init(void) + if (serdes1_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c +index fc25bb28a..469f23bcd 100644 +--- a/arch/powerpc/cpu/mpc85xx/cpu.c ++++ b/arch/powerpc/cpu/mpc85xx/cpu.c +@@ -471,7 +471,7 @@ int dram_init(void) + lbc_sdram_init(); + #endif + +- debug("DDR: "); ++printf("DDR: "); + gd->ram_size = dram_size; + + return 0; +diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c +index 7d168e3c9..f902b669b 100644 +--- a/arch/powerpc/cpu/mpc85xx/fdt.c ++++ b/arch/powerpc/cpu/mpc85xx/fdt.c +@@ -263,14 +263,14 @@ static inline void ft_fixup_l2cache(void *blob) + + off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); + if (off < 0) { +- debug("no cpu node fount\n"); ++printf("no cpu node fount\n"); + return; + } + + ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); + + if (ph == NULL) { +- debug("no next-level-cache property\n"); ++printf("no next-level-cache property\n"); + return ; + } + +@@ -320,7 +320,7 @@ static inline void ft_fixup_l2cache(void *blob) + ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); + + if (ph == NULL) { +- debug("no next-level-cache property\n"); ++printf("no next-level-cache property\n"); + goto next; + } + +@@ -360,7 +360,7 @@ static inline void ft_fixup_l2cache(void *blob) + ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0); + + if (ph == NULL) { +- debug("no next-level-cache property\n"); ++printf("no next-level-cache property\n"); + goto next; + } + l3_off = *ph; +diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +index ee5015ec8..12c8cd2b9 100644 +--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +@@ -224,14 +224,14 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift, + */ + #ifdef CONFIG_SYS_FSL_ERRATUM_A007186 + sfp_spfr0 = in_be32(&sfp_regs->fsl_spfr0); +- debug("A007186: sfp_spfr0= %x\n", sfp_spfr0); ++printf("A007186: sfp_spfr0= %x\n", sfp_spfr0); + + sel = (sfp_spfr0 >> FUSE_VAL_SHIFT) & FUSE_VAL_MASK; + + if (has_erratum_a007186() && (sel == 0x01 || sel == 0x02)) { + for (pll_num = 0; pll_num < SRDS_MAX_BANK; pll_num++) { + pll_status = in_be32(&srds_regs->bank[pll_num].pllcr0); +- debug("A007186: pll_num=%x pllcr0=%x\n", ++printf("A007186: pll_num=%x pllcr0=%x\n", + pll_num, pll_status); + /* STEP 1 */ + /* Read factory pre-set SerDes calibration values +@@ -240,19 +240,19 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift, + switch (pll_status & SRDS_PLLCR0_FRATE_SEL_MASK) { + case SRDS_PLLCR0_FRATE_SEL_3_0: + case SRDS_PLLCR0_FRATE_SEL_3_072: +- debug("A007186: 3.0/3.072 protocol rate\n"); ++printf("A007186: 3.0/3.072 protocol rate\n"); + bc = (sfp_spfr0 >> BC1_SHIFT) & BC_MASK; + dc = (sfp_spfr0 >> DC1_SHIFT) & DC_MASK; + fc = (sfp_spfr0 >> FC1_SHIFT) & FC_MASK; + break; + case SRDS_PLLCR0_FRATE_SEL_3_125: +- debug("A007186: 3.125 protocol rate\n"); ++printf("A007186: 3.125 protocol rate\n"); + bc = (sfp_spfr0 >> BC2_SHIFT) & BC_MASK; + dc = (sfp_spfr0 >> DC2_SHIFT) & DC_MASK; + fc = (sfp_spfr0 >> FC2_SHIFT) & FC_MASK; + break; + case SRDS_PLLCR0_FRATE_SEL_3_75: +- debug("A007186: 3.75 protocol rate\n"); ++printf("A007186: 3.75 protocol rate\n"); + bc = (sfp_spfr0 >> BC1_SHIFT) & BC_MASK; + dc = (sfp_spfr0 >> DC1_SHIFT) & DC_MASK; + fc = (sfp_spfr0 >> FC1_SHIFT) & FC_MASK; +@@ -270,14 +270,14 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift, + ((fc << CR1_FCAP_SHIFT) & FCAP_MASK)); + out_be32(&srds_regs->bank[pll_num].pllcr1, + (pll_cr_upd | pll_cr1)); +- debug("A007186: pll_num=%x Updated PLLCR1=%x\n", ++printf("A007186: pll_num=%x Updated PLLCR1=%x\n", + pll_num, (pll_cr_upd | pll_cr1)); + /* Write SRDSxPLLnCR0[24:26] = DC + */ + pll_cr0 = in_be32(&srds_regs->bank[pll_num].pllcr0); + out_be32(&srds_regs->bank[pll_num].pllcr0, + pll_cr0 | (dc << CR0_DCBIAS_SHIFT)); +- debug("A007186: pll_num=%x, Updated PLLCR0=%x\n", ++printf("A007186: pll_num=%x, Updated PLLCR0=%x\n", + pll_num, (pll_cr0 | (dc << CR0_DCBIAS_SHIFT))); + /* Write SRDSxPLLnCR1[3] = 1 + * Write SRDSxPLLnCR1[6] = 1 +@@ -286,28 +286,28 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift, + pll_cr_upd = (BCAP_OVD_MASK | BYP_CAL_MASK); + out_be32(&srds_regs->bank[pll_num].pllcr1, + (pll_cr_upd | pll_cr1)); +- debug("A007186: pll_num=%x Updated PLLCR1=%x\n", ++printf("A007186: pll_num=%x Updated PLLCR1=%x\n", + pll_num, (pll_cr_upd | pll_cr1)); + + /* STEP 3 */ + /* Read the status Registers */ + /* Verify SRDSxPLLnSR2[8] = BC */ + pll_sr2 = in_be32(&srds_regs->bank[pll_num].pllsr2); +- debug("A007186: pll_num=%x pllsr2=%x\n", ++printf("A007186: pll_num=%x pllsr2=%x\n", + pll_num, pll_sr2); + bc_status = (pll_sr2 >> 23) & BC_MASK; + if (bc_status != bc) +- debug("BC mismatch\n"); ++printf("BC mismatch\n"); + fc_status = (pll_sr2 >> 16) & FC_MASK; + if (fc_status != fc) +- debug("FC mismatch\n"); ++printf("FC mismatch\n"); + pll_cr0 = in_be32(&srds_regs->bank[pll_num].pllcr0); + out_be32(&srds_regs->bank[pll_num].pllcr0, pll_cr0 | + 0x02000000); + pll_sr2 = in_be32(&srds_regs->bank[pll_num].pllsr2); + dc_status = (pll_sr2 >> 17) & DC_MASK; + if (dc_status != dc) +- debug("DC mismatch\n"); ++printf("DC mismatch\n"); + pll_cr0 = in_be32(&srds_regs->bank[pll_num].pllcr0); + out_be32(&srds_regs->bank[pll_num].pllcr0, pll_cr0 & + 0xfdffffff); +@@ -318,13 +318,13 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift, + */ + udelay(750); + pll_status = in_be32(&srds_regs->bank[pll_num].pllcr0); +- debug("A007186: pll_num=%x pllcr0=%x\n", ++printf("A007186: pll_num=%x pllcr0=%x\n", + pll_num, pll_status); + + if ((pll_status & SRDS_PLLCR0_PLL_LCK) == 0) + printf("A007186 Serdes PLL not locked\n"); + else +- debug("A007186 Serdes PLL locked\n"); ++printf("A007186 Serdes PLL locked\n"); + } + } + #endif +@@ -337,7 +337,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift, + for (lane = 0; lane < SRDS_MAX_LANES; lane++) { + enum srds_prtcl lane_prtcl = serdes_get_prtcl(sd, cfg, lane); + if (unlikely(lane_prtcl >= SERDES_PRCTL_COUNT)) +- debug("Unknown SerDes lane protocol %d\n", lane_prtcl); ++printf("Unknown SerDes lane protocol %d\n", lane_prtcl); + else + serdes_prtcl_map[lane_prtcl] = 1; + } +diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +index f5126e2c8..460de6bb3 100644 +--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +@@ -529,7 +529,7 @@ void fsl_serdes_init(void) + + srds_regs = (void *)(CONFIG_SYS_FSL_CORENET_SERDES_ADDR); + cfg = (in_be32(&gur->rcwsr[4]) & FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; +- debug("Using SERDES configuration 0x%x, lane settings:\n", cfg); ++printf("Using SERDES configuration 0x%x, lane settings:\n", cfg); + + if (!is_serdes_prtcl_valid(cfg)) { + printf("SERDES[PRTCL] = 0x%x is not valid\n", cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c +index 4ad762683..e47f67481 100644 +--- a/arch/powerpc/cpu/mpc85xx/interrupts.c ++++ b/arch/powerpc/cpu/mpc85xx/interrupts.c +@@ -49,29 +49,29 @@ void interrupt_init_cpu(unsigned *decrementer_count) + + #ifdef CONFIG_INTERRUPTS + pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */ +- debug("iivpr1@%x = %x\n", (uint)&pic->iivpr1, pic->iivpr1); ++printf("iivpr1@%x = %x\n", (uint)&pic->iivpr1, pic->iivpr1); + + pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */ +- debug("iivpr2@%x = %x\n", (uint)&pic->iivpr2, pic->iivpr2); ++printf("iivpr2@%x = %x\n", (uint)&pic->iivpr2, pic->iivpr2); + + pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */ +- debug("iivpr3@%x = %x\n", (uint)&pic->iivpr3, pic->iivpr3); ++printf("iivpr3@%x = %x\n", (uint)&pic->iivpr3, pic->iivpr3); + + #ifdef CONFIG_PCI1 + pic->iivpr8 = 0x810008; /* enable pci1 interrupts */ +- debug("iivpr8@%x = %x\n", (uint)&pic->iivpr8, pic->iivpr8); ++printf("iivpr8@%x = %x\n", (uint)&pic->iivpr8, pic->iivpr8); + #endif + #if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2) + pic->iivpr9 = 0x810009; /* enable pci1 interrupts */ +- debug("iivpr9@%x = %x\n", (uint)&pic->iivpr9, pic->iivpr9); ++printf("iivpr9@%x = %x\n", (uint)&pic->iivpr9, pic->iivpr9); + #endif + #ifdef CONFIG_PCIE1 + pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */ +- debug("iivpr10@%x = %x\n", (uint)&pic->iivpr10, pic->iivpr10); ++printf("iivpr10@%x = %x\n", (uint)&pic->iivpr10, pic->iivpr10); + #endif + #ifdef CONFIG_PCIE3 + pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */ +- debug("iivpr11@%x = %x\n", (uint)&pic->iivpr11, pic->iivpr11); ++printf("iivpr11@%x = %x\n", (uint)&pic->iivpr11, pic->iivpr11); + #endif + + pic->ctpr=0; /* 40080 clear current task priority register */ +diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c +index e552378e7..0e56fe7b4 100644 +--- a/arch/powerpc/cpu/mpc85xx/liodn.c ++++ b/arch/powerpc/cpu/mpc85xx/liodn.c +@@ -248,7 +248,7 @@ static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl) + "fsl,srio port %d: %s\n", + portid, fdt_strerror(off)); + } else { +- debug("WARNING: couldn't set fsl,liodn for srio: %s.\n", ++printf("WARNING: couldn't set fsl,liodn for srio: %s.\n", + fdt_strerror(off)); + } + } +@@ -326,7 +326,7 @@ static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz) + "%s: %s\n", + tbl[i].compat, fdt_strerror(off)); + } else { +- debug("WARNING: could not set fsl,liodn for %s: %s.\n", ++printf("WARNING: could not set fsl,liodn for %s: %s.\n", + tbl[i].compat, fdt_strerror(off)); + } + } +@@ -362,7 +362,7 @@ static void fdt_fixup_liodn_tbl_fman(void *blob, + printf("WARNING unable to set fsl,liodn for FMan Port: %s\n", + fdt_strerror(off)); + } else { +- debug("WARNING: could not set fsl,liodn for FMan Portport: %s.\n", ++printf("WARNING: could not set fsl,liodn for FMan Portport: %s.\n", + fdt_strerror(off)); + } + } +diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c +index 653efe09f..64becafbf 100644 +--- a/arch/powerpc/cpu/mpc85xx/mp.c ++++ b/arch/powerpc/cpu/mpc85xx/mp.c +@@ -226,7 +226,7 @@ u32 determine_mp_bootpg(unsigned int *pagesize) + while ((check % 3) != 1) + check--; + bootpg = check << 13; +- debug("Boot page (8K) at 0x%08x\n", bootpg); ++printf("Boot page (8K) at 0x%08x\n", bootpg); + break; + } else { + bootpg &= 0xfffff000; /* align to 4KB */ +@@ -234,7 +234,7 @@ u32 determine_mp_bootpg(unsigned int *pagesize) + while ((check % 3) != 0) + check--; + bootpg = check << 12; +- debug("Boot page (4K) at 0x%08x\n", bootpg); ++printf("Boot page (4K) at 0x%08x\n", bootpg); + } + break; + default: +@@ -278,7 +278,7 @@ static void plat_mp_up(unsigned long bootpg, unsigned int pagesize) + if (pagesize == 8192) + brsize = LAW_SIZE_8K; + out_be32(&ccm->bstrar, LAW_EN | e.trgt_id << 20 | brsize); +- debug("BRSIZE is 0x%x\n", brsize); ++printf("BRSIZE is 0x%x\n", brsize); + + /* readback to sync write */ + in_be32(&ccm->bstrar); +diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c +index 111692f15..5bab1d670 100644 +--- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c +@@ -107,8 +107,8 @@ void fsl_serdes_init(void) + srds2_io_sel = (pordevsr & GUTS_PORDEVSR_SERDES2_IO_SEL) + >> GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT; + +- debug("PORDEVSR[SRDS1_IO_SEL] = %x\n", srds1_io_sel); +- debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_io_sel); ++printf("PORDEVSR[SRDS1_IO_SEL] = %x\n", srds1_io_sel); ++printf("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_io_sel); + + switch (srds2_io_sel) { + case 1: /* Lane A - SATA1, Lane E - SATA2 */ +diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c +index f3b5450ad..d344f2bff 100644 +--- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c +@@ -62,7 +62,7 @@ void fsl_serdes_init(void) + serdes2_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c +index 2a5c3e320..8ec297497 100644 +--- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c +@@ -41,7 +41,7 @@ void fsl_serdes_init(void) + if (serdes1_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg); ++printf("PORDEVSR[IO_SEL] = %x\n", srds1_cfg); + + if (srds1_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c +index 81b66c3fa..7fde82c02 100644 +--- a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c +@@ -41,7 +41,7 @@ void fsl_serdes_init(void) + if (serdes1_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c +index 1b4e61491..cf50e0338 100644 +--- a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c +@@ -45,7 +45,7 @@ void fsl_serdes_init(void) + if (serdes1_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c +index 8cba4222c..af4b1f6b8 100644 +--- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c +@@ -61,7 +61,7 @@ void fsl_serdes_init(void) + serdes2_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c +index 6b8e447e9..c79077c26 100644 +--- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c +@@ -62,7 +62,7 @@ void fsl_serdes_init(void) + if (serdes1_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c +index bf5cac619..86b818071 100644 +--- a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c +@@ -44,7 +44,7 @@ void fsl_serdes_init(void) + if (serdes1_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c +index f36b1b64e..2abc8ba34 100644 +--- a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c ++++ b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c +@@ -49,7 +49,7 @@ void fsl_serdes_init(void) + if (serdes1_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c +index 98b42bff7..897931aad 100644 +--- a/arch/powerpc/cpu/mpc86xx/cpu.c ++++ b/arch/powerpc/cpu/mpc86xx/cpu.c +@@ -70,7 +70,7 @@ checkcpu(void) + printf("e600 Core %d", (msscr0 & 0x20) ? 1 : 0); + if (gur->pordevsr & MPC86xx_PORDEVSR_CORE1TE) + puts("\n Core1Translation Enabled"); +- debug(" (MSSCR0=%x, PORDEVSR=%x)", msscr0, gur->pordevsr); ++printf(" (MSSCR0=%x, PORDEVSR=%x)", msscr0, gur->pordevsr); + + printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr); + +diff --git a/arch/powerpc/cpu/mpc86xx/interrupts.c b/arch/powerpc/cpu/mpc86xx/interrupts.c +index 5a916600e..453b109ef 100644 +--- a/arch/powerpc/cpu/mpc86xx/interrupts.c ++++ b/arch/powerpc/cpu/mpc86xx/interrupts.c +@@ -46,28 +46,28 @@ void interrupt_init_cpu(unsigned *decrementer_count) + pic->gcr = MPC86xx_PICGCR_MODE; + + *decrementer_count = get_tbclk() / CONFIG_SYS_HZ; +- debug("interrupt init: tbclk() = %ld MHz, decrementer_count = %d\n", ++printf("interrupt init: tbclk() = %ld MHz, decrementer_count = %d\n", + (get_tbclk() / 1000000), + *decrementer_count); + + #ifdef CONFIG_INTERRUPTS + + pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */ +- debug("iivpr1@%p = %x\n", &pic->iivpr1, pic->iivpr1); ++printf("iivpr1@%p = %x\n", &pic->iivpr1, pic->iivpr1); + + pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */ +- debug("iivpr2@%p = %x\n", &pic->iivpr2, pic->iivpr2); ++printf("iivpr2@%p = %x\n", &pic->iivpr2, pic->iivpr2); + + pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */ +- debug("iivpr3@%p = %x\n", &pic->iivpr3, pic->iivpr3); ++printf("iivpr3@%p = %x\n", &pic->iivpr3, pic->iivpr3); + + #if defined(CONFIG_PCI1) || defined(CONFIG_PCIE1) + pic->iivpr8 = 0x810008; /* enable pcie1 interrupts */ +- debug("iivpr8@%p = %x\n", &pic->iivpr8, pic->iivpr8); ++printf("iivpr8@%p = %x\n", &pic->iivpr8, pic->iivpr8); + #endif + #if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2) + pic->iivpr9 = 0x810009; /* enable pcie2 interrupts */ +- debug("iivpr9@%p = %x\n", &pic->iivpr9, pic->iivpr9); ++printf("iivpr9@%p = %x\n", &pic->iivpr9, pic->iivpr9); + #endif + + pic->ctpr = 0; /* 40080 clear current task priority register */ +diff --git a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c +index ecc88ba43..07aa6db30 100644 +--- a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c ++++ b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c +@@ -58,7 +58,7 @@ void fsl_serdes_init(void) + serdes2_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c +index 4df446618..6ea4c1fa4 100644 +--- a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c ++++ b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c +@@ -67,7 +67,7 @@ void fsl_serdes_init(void) + serdes2_prtcl_map & (1 << NONE)) + return; + +- debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); ++printf("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); + + if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); +diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +index 522994995..73a8b6432 100644 +--- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c ++++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +@@ -167,7 +167,7 @@ static int pamu_config_spaace(uint32_t liodn, + } + + while (sec_addr < end_addr) { +- debug("sec_addr < end_addr is %llx < %llx\n", sec_addr, ++printf("sec_addr < end_addr is %llx < %llx\n", sec_addr, + end_addr); + paace = &ppaact[liodn]; + if (!paace) +@@ -184,7 +184,7 @@ static int pamu_config_spaace(uint32_t liodn, + else if (win_size < PAMU_PAGE_SIZE) + win_size = PAMU_PAGE_SIZE; + +- debug("win_size is %llx\n", win_size); ++printf("win_size is %llx\n", win_size); + + swse = map_addrspace_size_to_wse(win_size); + index = sec_addr >> size_shift; +@@ -199,7 +199,7 @@ static int pamu_config_spaace(uint32_t liodn, + + paace = sec + fspi_idx + index - 1; + +- debug("SPAACT:Writing at location %p, index %d\n", paace, ++printf("SPAACT:Writing at location %p, index %d\n", paace, + index); + + pamu_setup_default_xfer_to_host_spaace(paace); +@@ -211,8 +211,8 @@ static int pamu_config_spaace(uint32_t liodn, + paace->domain_attr.to_host.snpid = snoopid; + + if (paace->addr_bitfields & PAACE_V_VALID) { +- debug("Reached overlap condition\n"); +- debug("%d < %d\n", get_bf(paace->win_bitfields, ++printf("Reached overlap condition\n"); ++printf("%d < %d\n", get_bf(paace->win_bitfields, + PAACE_WIN_SWSE), swse); + if (get_bf(paace->win_bitfields, PAACE_WIN_SWSE) < swse) + set_bf(paace->win_bitfields, PAACE_WIN_SWSE, +@@ -391,9 +391,9 @@ int config_pamu(struct pamu_addr_tbl *tbl, int num_entries, uint32_t liodn) + + sizebit = __ilog2_roundup_64(size); + size = 1ull << sizebit; +- debug("min start_addr is %llx\n", min_addr); +- debug("max end_addr is %llx\n", max_addr); +- debug("size found is %llx\n", size); ++printf("min start_addr is %llx\n", min_addr); ++printf("max end_addr is %llx\n", max_addr); ++printf("size found is %llx\n", size); + + if (size < PAMU_PAGE_SIZE) + size = PAMU_PAGE_SIZE; +@@ -406,8 +406,8 @@ int config_pamu(struct pamu_addr_tbl *tbl, int num_entries, uint32_t liodn) + if (!size) + return -1; + } +- debug("PAACT :Base addr is %llx\n", min_addr); +- debug("PAACT : Size is %llx\n", size); ++printf("PAACT :Base addr is %llx\n", min_addr); ++printf("PAACT : Size is %llx\n", size); + num_windows = get_win_cnt(size); + /* For a single window, no spaact entries are required + * sec_sub_window count = 0 */ +@@ -422,11 +422,11 @@ int config_pamu(struct pamu_addr_tbl *tbl, int num_entries, uint32_t liodn) + if (ret < 0) + return ret; + +- debug("configured ppace\n"); ++printf("configured ppace\n"); + + if (num_sec_windows) { + subwin_size = size >> count_lsb_zeroes(num_sec_windows); +- debug("subwin_size is %llx\n", subwin_size); ++printf("subwin_size is %llx\n", subwin_size); + + for (i = 0; i < num_entries; i++) { + ret = pamu_config_spaace(liodn, +diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c +index d917e9dfb..21f49d9ef 100644 +--- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c ++++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c +@@ -37,9 +37,9 @@ void construct_pamu_addr_table(struct pamu_addr_tbl *tbl, int *num_entries) + + i++; + #endif +- debug("PAMU address\t\t\tsize\n"); ++printf("PAMU address\t\t\tsize\n"); + for (j = 0; j < i ; j++) +- debug("%llx \t\t\t%llx\n", tbl->start_addr[j], tbl->size[j]); ++printf("%llx \t\t\t%llx\n", tbl->start_addr[j], tbl->size[j]); + + *num_entries = i; + } +diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c +index c73cf9319..81e5a51c7 100644 +--- a/arch/powerpc/cpu/mpc8xxx/srio.c ++++ b/arch/powerpc/cpu/mpc8xxx/srio.c +@@ -297,9 +297,9 @@ void srio_boot_master(int port) + out_be32((void *)&srio->impl.port[port - 1].ptaacr, + SRIO_PORT_ACCEPT_ALL); + +- debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n", port); ++printf("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n", port); + /* configure inbound window for slave's u-boot image */ +- debug("SRIOBOOT - MASTER: Inbound window for slave's image; " ++printf("SRIOBOOT - MASTER: Inbound window for slave's image; " + "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n", + (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, + (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1, +@@ -313,7 +313,7 @@ void srio_boot_master(int port) + | atmu_size_mask(CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE)); + + /* configure inbound window for slave's u-boot image */ +- debug("SRIOBOOT - MASTER: Inbound window for slave's image; " ++printf("SRIOBOOT - MASTER: Inbound window for slave's image; " + "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n", + (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, + (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2, +@@ -327,7 +327,7 @@ void srio_boot_master(int port) + | atmu_size_mask(CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE)); + + /* configure inbound window for slave's ucode and ENV */ +- debug("SRIOBOOT - MASTER: Inbound window for slave's ucode and ENV; " ++printf("SRIOBOOT - MASTER: Inbound window for slave's ucode and ENV; " + "Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n", + (u64)CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS, + (u64)CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS, +@@ -345,16 +345,16 @@ void srio_boot_master_release_slave(int port) + { + struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR; + u32 escsr; +- debug("SRIOBOOT - MASTER: " ++printf("SRIOBOOT - MASTER: " + "Check the port status and release slave core ...\n"); + + escsr = in_be32((void *)&srio->lp_serial.port[port - 1].pescsr); + if (escsr & 0x2) { + if (escsr & 0x10100) { +- debug("SRIOBOOT - MASTER: Port [ %d ] is error.\n", ++printf("SRIOBOOT - MASTER: Port [ %d ] is error.\n", + port); + } else { +- debug("SRIOBOOT - MASTER: " ++printf("SRIOBOOT - MASTER: " + "Port [ %d ] is ready, now release slave's core ...\n", + port); + /* +@@ -439,10 +439,10 @@ void srio_boot_master_release_slave(int port) + + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET, + CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK); + } +- debug("SRIOBOOT - MASTER: " ++printf("SRIOBOOT - MASTER: " + "Release slave successfully! Now the slave should start up!\n"); + } + } else +- debug("SRIOBOOT - MASTER: Port [ %d ] is not ready.\n", port); ++printf("SRIOBOOT - MASTER: Port [ %d ] is not ready.\n", port); + } + #endif +diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c +index 31c17b5bb..4bbd95046 100644 +--- a/arch/powerpc/lib/bootm.c ++++ b/arch/powerpc/lib/bootm.c +@@ -55,7 +55,7 @@ static void boot_jump_linux(bootm_headers_t *images) + + kernel = (void (*)(struct bd_info *, ulong, ulong, ulong, + ulong, ulong, ulong))images->ep; +- debug("## Transferring control to Linux (at address %08lx) ...\n", ++printf("## Transferring control to Linux (at address %08lx) ...\n", + (ulong)kernel); + + bootstage_mark(BOOTSTAGE_ID_RUN_OS); +@@ -83,7 +83,7 @@ static void boot_jump_linux(bootm_headers_t *images) + * r8: 0 + * r9: 0 + */ +- debug(" Booting using OF flat tree...\n"); ++printf(" Booting using OF flat tree...\n"); + WATCHDOG_RESET (); + (*kernel) ((struct bd_info *)of_flat_tree, 0, 0, EPAPR_MAGIC, + env_get_bootm_mapsize(), 0, 0); +@@ -107,7 +107,7 @@ static void boot_jump_linux(bootm_headers_t *images) + ulong initrd_end = images->initrd_end; + struct bd_info *kbd = images->kbd; + +- debug(" Booting using board info...\n"); ++printf(" Booting using board info...\n"); + WATCHDOG_RESET (); + (*kernel) (kbd, initrd_start, initrd_end, + cmd_start, cmd_end, 0, 0); +@@ -151,7 +151,7 @@ void arch_lmb_reserve(struct lmb *lmb) + * pointer. + */ + sp = get_sp(); +- debug("## Current stack ends at 0x%08lx\n", sp); ++printf("## Current stack ends at 0x%08lx\n", sp); + + /* adjust sp by 4K to be safe */ + sp -= 4096; +diff --git a/arch/powerpc/lib/extable.c b/arch/powerpc/lib/extable.c +index 7e9d4f22f..6afe6da75 100644 +--- a/arch/powerpc/lib/extable.c ++++ b/arch/powerpc/lib/extable.c +@@ -54,7 +54,7 @@ search_exception_table(unsigned long addr) + ret = search_one_table(__start___ex_table, __stop___ex_table-1, addr); + /* if the serial port does not hang in exception, printf can be used */ + #if !defined(CONFIG_SYS_SERIAL_HANG_IN_EXCEPTION) +- debug("Bus Fault @ 0x%08lx, fixup 0x%08lx\n", addr, ret); ++printf("Bus Fault @ 0x%08lx, fixup 0x%08lx\n", addr, ret); + #endif + if (ret) return ret; + +diff --git a/arch/powerpc/lib/spl.c b/arch/powerpc/lib/spl.c +index d4a605752..0874f0e02 100644 +--- a/arch/powerpc/lib/spl.c ++++ b/arch/powerpc/lib/spl.c +@@ -16,7 +16,7 @@ + #ifdef CONFIG_SPL_OS_BOOT + void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) + { +- debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg); ++printf("Entering kernel arg pointer: 0x%p\n", spl_image->arg); + typedef void (*image_entry_arg_t)(void *, ulong r4, ulong r5, ulong r6, + ulong r7, ulong r8, ulong r9) + __attribute__ ((noreturn)); +diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c +index c894ac10b..6bc31a78b 100644 +--- a/arch/riscv/cpu/cpu.c ++++ b/arch/riscv/cpu/cpu.c +@@ -37,7 +37,7 @@ static inline bool supports_extension(char ext) + + uclass_find_first_device(UCLASS_CPU, &dev); + if (!dev) { +- debug("unable to find the RISC-V cpu device\n"); ++printf("unable to find the RISC-V cpu device\n"); + return false; + } + if (!cpu_get_desc(dev, desc, sizeof(desc))) { +diff --git a/arch/riscv/cpu/fu540/spl.c b/arch/riscv/cpu/fu540/spl.c +index 45657b790..fedd4adaf 100644 +--- a/arch/riscv/cpu/fu540/spl.c ++++ b/arch/riscv/cpu/fu540/spl.c +@@ -15,7 +15,7 @@ int spl_soc_init(void) + /* DDR init */ + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + return ret; + } + +diff --git a/arch/riscv/cpu/fu740/spl.c b/arch/riscv/cpu/fu740/spl.c +index 55e30346f..dbe35070b 100644 +--- a/arch/riscv/cpu/fu740/spl.c ++++ b/arch/riscv/cpu/fu740/spl.c +@@ -18,7 +18,7 @@ int spl_soc_init(void) + /* DDR init */ + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + return ret; + } + +diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c +index 8dd182054..5d3b2e741 100644 +--- a/arch/riscv/lib/bootm.c ++++ b/arch/riscv/lib/bootm.c +@@ -66,7 +66,7 @@ static void boot_prep_linux(bootm_headers_t *images) + { + if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) { + #ifdef CONFIG_OF_LIBFDT +- debug("using: FDT\n"); ++printf("using: FDT\n"); + if (image_setup_linux(images)) { + printf("FDT creation failed! hanging..."); + hang(); +@@ -90,7 +90,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) + + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + +- debug("## Transferring control to kernel (at address %08lx) ...\n", ++printf("## Transferring control to kernel (at address %08lx) ...\n", + (ulong)kernel); + + announce_and_cleanup(fake); +diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c +index 8baee07be..bb5dd1ab6 100644 +--- a/arch/riscv/lib/spl.c ++++ b/arch/riscv/lib/spl.c +@@ -52,7 +52,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + (image_entry_riscv_t)spl_image->entry_point; + invalidate_icache_all(); + +- debug("image entry point: 0x%lX\n", spl_image->entry_point); ++printf("image entry point: 0x%lX\n", spl_image->entry_point); + #ifdef CONFIG_SPL_SMP + ret = smp_call_function(spl_image->entry_point, (ulong)fdt_blob, 0, 0); + if (ret) +diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c +index 48636ab63..c166a7ab2 100644 +--- a/arch/sandbox/cpu/cpu.c ++++ b/arch/sandbox/cpu/cpu.c +@@ -107,7 +107,7 @@ void *phys_to_virt(phys_addr_t paddr) + state = state_get_current(); + list_for_each_entry(mentry, &state->mapmem_head, sibling_node) { + if (mentry->tag == paddr) { +- debug("%s: Used map from %lx to %p\n", __func__, ++printf("%s: Used map from %lx to %p\n", __func__, + (ulong)paddr, mentry->ptr); + return mentry->ptr; + } +@@ -128,7 +128,7 @@ struct sandbox_mapmem_entry *find_tag(const void *ptr) + + list_for_each_entry(mentry, &state->mapmem_head, sibling_node) { + if (mentry->ptr == ptr) { +- debug("%s: Used map from %p to %lx\n", __func__, ptr, ++printf("%s: Used map from %p to %lx\n", __func__, ptr, + mentry->tag); + return mentry; + } +@@ -154,7 +154,7 @@ phys_addr_t virt_to_phys(void *ptr) + __func__, ptr, (ulong)gd->ram_size); + os_abort(); + } +- debug("%s: Used map from %p to %lx\n", __func__, ptr, mentry->tag); ++printf("%s: Used map from %p to %lx\n", __func__, ptr, mentry->tag); + + return mentry->tag; + } +@@ -216,7 +216,7 @@ phys_addr_t map_to_sysmem(const void *ptr) + mentry->tag = state->next_tag++; + mentry->ptr = (void *)ptr; + list_add_tail(&mentry->sibling_node, &state->mapmem_head); +- debug("%s: Added map from %p to %lx\n", __func__, ptr, ++printf("%s: Added map from %p to %lx\n", __func__, ptr, + (ulong)mentry->tag); + } + +diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c +index f63cfd38e..b3fe6058c 100644 +--- a/arch/sandbox/cpu/state.c ++++ b/arch/sandbox/cpu/state.c +@@ -105,7 +105,7 @@ int sandbox_read_state_nodes(struct sandbox_state *state, + int node; + int ret; + +- debug(" - read %s\n", io->name); ++printf(" - read %s\n", io->name); + if (!io->read) + return 0; + +@@ -115,7 +115,7 @@ int sandbox_read_state_nodes(struct sandbox_state *state, + node = fdt_node_offset_by_compatible(blob, node, io->compat); + if (node < 0) + return 0; /* No more */ +- debug(" - read node '%s'\n", fdt_get_name(blob, node, NULL)); ++printf(" - read node '%s'\n", fdt_get_name(blob, node, NULL)); + ret = io->read(blob, node); + if (ret) { + printf("Unable to read state for '%s'\n", io->compat); +@@ -129,7 +129,7 @@ int sandbox_read_state_nodes(struct sandbox_state *state, + * node, to set up the global state. + */ + if (count == 0) { +- debug(" - read global\n"); ++printf(" - read global\n"); + ret = io->read(NULL, -1); + if (ret) { + printf("Unable to read global state for '%s'\n", +@@ -167,7 +167,7 @@ int sandbox_read_state(struct sandbox_state *state, const char *fname) + } + + if (state->read_state && fname) { +- debug("Read sandbox state from '%s'%s\n", fname, ++printf("Read sandbox state from '%s'%s\n", fname, + got_err ? " (with errors)" : ""); + } + +@@ -224,7 +224,7 @@ int sandbox_write_state_node(struct sandbox_state *state, + fdt_strerror(node)); + return -EIO; + } +- debug("Write state for '%s' to node %d\n", io->compat, node); ++printf("Write state for '%s' to node %d\n", io->compat, node); + ret = io->write(blob, node); + if (ret) { + printf("Unable to write state for '%s'\n", io->compat); +@@ -296,7 +296,7 @@ int sandbox_write_state(struct sandbox_state *state, const char *fname) + } + os_close(fd); + +- debug("Wrote sandbox state to '%s'%s\n", fname, ++printf("Wrote sandbox state to '%s'%s\n", fname, + got_err ? " (with errors)" : ""); + + return 0; +diff --git a/arch/sandbox/lib/pci_io.c b/arch/sandbox/lib/pci_io.c +index 203814194..8842442c2 100644 +--- a/arch/sandbox/lib/pci_io.c ++++ b/arch/sandbox/lib/pci_io.c +@@ -35,7 +35,7 @@ int pci_map_physmem(phys_addr_t paddr, unsigned long *lenp, + return 0; + } + +- debug("%s: failed: addr=%pap\n", __func__, &paddr); ++printf("%s: failed: addr=%pap\n", __func__, &paddr); + return -ENOSYS; + } + +@@ -67,7 +67,7 @@ static int pci_io_read(unsigned int addr, ulong *valuep, pci_size_t size) + } + } + +- debug("%s: failed: addr=%x\n", __func__, addr); ++printf("%s: failed: addr=%x\n", __func__, addr); + return -ENOSYS; + } + +@@ -88,7 +88,7 @@ static int pci_io_write(unsigned int addr, ulong value, pci_size_t size) + } + } + +- debug("%s: failed: addr=%x, value=%lx\n", __func__, addr, value); ++printf("%s: failed: addr=%x, value=%lx\n", __func__, addr, value); + return -ENOSYS; + } + +diff --git a/arch/x86/cpu/apollolake/cpu_common.c b/arch/x86/cpu/apollolake/cpu_common.c +index 5d7d26b14..625653699 100644 +--- a/arch/x86/cpu/apollolake/cpu_common.c ++++ b/arch/x86/cpu/apollolake/cpu_common.c +@@ -43,7 +43,7 @@ void enable_pm_timer_emulation(const struct udevice *pmc) + + /* Set PM1 timer IO port and enable */ + msr.lo = EMULATE_PM_TMR_EN | (upriv->acpi_base + R_ACPI_PM1_TMR); +- debug("PM timer %x %x\n", msr.hi, msr.lo); ++printf("PM timer %x %x\n", msr.hi, msr.lo); + msr_write(MSR_EMULATE_PM_TIMER, msr); + } + +diff --git a/arch/x86/cpu/apollolake/fsp_bindings.c b/arch/x86/cpu/apollolake/fsp_bindings.c +index 319c78b95..d81c50fac 100644 +--- a/arch/x86/cpu/apollolake/fsp_bindings.c ++++ b/arch/x86/cpu/apollolake/fsp_bindings.c +@@ -53,7 +53,7 @@ static int read_u16_prop(ofnode node, char *name, size_t count, u16 *dst) + int ret; + + if (ARRAY_SIZE(buf) < count) { +- debug("ERROR: %s buffer to small!\n", __func__); ++printf("ERROR: %s buffer to small!\n", __func__); + return -ENOSPC; + } + +@@ -104,7 +104,7 @@ static int read_u64_prop(ofnode node, char *name, size_t count, u64 *dst) + if (count == 0) { + ofnode_read_u64(node, name, dst); + } else { +- debug("ERROR: %s u64 arrays not supported!\n", __func__); ++printf("ERROR: %s u64 arrays not supported!\n", __func__); + return -EINVAL; + } + +diff --git a/arch/x86/cpu/apollolake/punit.c b/arch/x86/cpu/apollolake/punit.c +index 5ed796357..ce419cd38 100644 +--- a/arch/x86/cpu/apollolake/punit.c ++++ b/arch/x86/cpu/apollolake/punit.c +@@ -42,7 +42,7 @@ static int punit_init(struct udevice *dev) + reg = readl(MCHBAR_REG(BIOS_RESET_CPL)); + if (reg == 0xffffffff) { + /* P-unit not found */ +- debug("Punit MMIO not available\n"); ++printf("Punit MMIO not available\n"); + return -ENOENT; + } + +@@ -65,12 +65,12 @@ static int punit_init(struct udevice *dev) + start = get_timer(0); + while (!(readl(MCHBAR_REG(BIOS_RESET_CPL)) & PCODE_INIT_DONE)) { + if (get_timer(start) > 1) { +- debug("PCODE Init Done timeout\n"); ++printf("PCODE Init Done timeout\n"); + return -ETIMEDOUT; + } + udelay(100); + } +- debug("PUNIT init complete\n"); ++printf("PUNIT init complete\n"); + + return 0; + } +diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c +index 07757b88a..b1151c5a9 100644 +--- a/arch/x86/cpu/baytrail/acpi.c ++++ b/arch/x86/cpu/baytrail/acpi.c +@@ -186,7 +186,7 @@ enum acpi_sleep_state chipset_prev_sleep_state(void) + pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); + gen_pmcon1 = readl(PMC_BASE_ADDRESS + GEN_PMCON1); + +- debug("PM1_STS = 0x%x PM1_CNT = 0x%x GEN_PMCON1 = 0x%x\n", ++printf("PM1_STS = 0x%x PM1_CNT = 0x%x GEN_PMCON1 = 0x%x\n", + pm1_sts, pm1_cnt, gen_pmcon1); + + if (pm1_sts & WAK_STS) +diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c +index 309a50a11..76eef2946 100644 +--- a/arch/x86/cpu/baytrail/cpu.c ++++ b/arch/x86/cpu/baytrail/cpu.c +@@ -96,7 +96,7 @@ static int cpu_x86_baytrail_probe(struct udevice *dev) + { + if (!ll_boot_init()) + return 0; +- debug("Init BayTrail core\n"); ++printf("Init BayTrail core\n"); + + /* + * On BayTrail the turbo disable bit is actually scoped at the +diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c +index fb3f946c4..0dae3a630 100644 +--- a/arch/x86/cpu/baytrail/fsp_configs.c ++++ b/arch/x86/cpu/baytrail/fsp_configs.c +@@ -44,7 +44,7 @@ void fsp_update_configs(struct fsp_config_data *config, + + node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP); + if (node < 0) { +- debug("%s: Cannot find FSP node\n", __func__); ++printf("%s: Cannot find FSP node\n", __func__); + return; + } + +@@ -127,7 +127,7 @@ void fsp_update_configs(struct fsp_config_data *config, + node = fdtdec_next_compatible(blob, node, + COMPAT_INTEL_BAYTRAIL_FSP_MDP); + if (node < 0) { +- debug("%s: Cannot find FSP memory-down-params node\n", ++printf("%s: Cannot find FSP memory-down-params node\n", + __func__); + } else { + mem->dram_speed = fdtdec_get_int(blob, node, +diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c +index 243298fd5..95d8956a6 100644 +--- a/arch/x86/cpu/braswell/fsp_configs.c ++++ b/arch/x86/cpu/braswell/fsp_configs.c +@@ -58,14 +58,14 @@ void fsp_update_configs(struct fsp_config_data *config, + + node = fdt_node_offset_by_compatible(blob, 0, "intel,braswell-fsp"); + if (node < 0) { +- debug("%s: Cannot find FSP node\n", __func__); ++printf("%s: Cannot find FSP node\n", __func__); + return; + } + + node = fdt_node_offset_by_compatible(blob, node, + "intel,braswell-fsp-memory"); + if (node < 0) { +- debug("%s: Cannot find FSP memory node\n", __func__); ++printf("%s: Cannot find FSP memory node\n", __func__); + return; + } + +@@ -96,7 +96,7 @@ void fsp_update_configs(struct fsp_config_data *config, + node = fdt_node_offset_by_compatible(blob, node, + "intel,braswell-fsp-silicon"); + if (node < 0) { +- debug("%s: Cannot find FSP silicon node\n", __func__); ++printf("%s: Cannot find FSP silicon node\n", __func__); + return; + } + +diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c +index 3832a97f2..bfbee27ac 100644 +--- a/arch/x86/cpu/broadwell/cpu.c ++++ b/arch/x86/cpu/broadwell/cpu.c +@@ -59,7 +59,7 @@ void set_max_freq(void) + perf_ctl.hi = 0; + msr_write(MSR_IA32_PERF_CTL, perf_ctl); + +- debug("CPU: frequency set to %d MHz\n", ++printf("CPU: frequency set to %d MHz\n", + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); + } + +diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c +index 2049dbfe2..255cd555b 100644 +--- a/arch/x86/cpu/broadwell/cpu_full.c ++++ b/arch/x86/cpu/broadwell/cpu_full.c +@@ -120,7 +120,7 @@ static u32 pcode_mailbox_read(u32 command) + + ret = pcode_ready(); + if (ret) { +- debug("PCODE: mailbox timeout on wait ready\n"); ++printf("PCODE: mailbox timeout on wait ready\n"); + return ret; + } + +@@ -129,7 +129,7 @@ static u32 pcode_mailbox_read(u32 command) + + ret = pcode_ready(); + if (ret) { +- debug("PCODE: mailbox timeout on completion\n"); ++printf("PCODE: mailbox timeout on completion\n"); + return ret; + } + +@@ -143,7 +143,7 @@ static int pcode_mailbox_write(u32 command, u32 data) + + ret = pcode_ready(); + if (ret) { +- debug("PCODE: mailbox timeout on wait ready\n"); ++printf("PCODE: mailbox timeout on wait ready\n"); + return ret; + } + +@@ -154,7 +154,7 @@ static int pcode_mailbox_write(u32 command, u32 data) + + ret = pcode_ready(); + if (ret) { +- debug("PCODE: mailbox timeout on completion\n"); ++printf("PCODE: mailbox timeout on completion\n"); + return ret; + } + +@@ -167,7 +167,7 @@ static void initialize_vr_config(struct udevice *dev) + int ramp, min_vid; + msr_t msr; + +- debug("Initializing VR config\n"); ++printf("Initializing VR config\n"); + + /* Configure VR_CURRENT_CONFIG */ + msr = msr_read(MSR_VR_CURRENT_CONFIG); +@@ -254,7 +254,7 @@ static int calibrate_24mhz_bclk(void) + + err_code = readl(MCHBAR_REG(BIOS_MAILBOX_INTERFACE)) & 0xff; + +- debug("PCODE: 24MHz BLCK calibration response: %d\n", err_code); ++printf("PCODE: 24MHz BLCK calibration response: %d\n", err_code); + + /* Read the calibrated value */ + writel(MAILBOX_RUN_BUSY | MAILBOX_BIOS_CMD_READ_CALIBRATION, +@@ -264,7 +264,7 @@ static int calibrate_24mhz_bclk(void) + if (ret) + return ret; + +- debug("PCODE: 24MHz BLCK calibration value: 0x%08x\n", ++printf("PCODE: 24MHz BLCK calibration value: 0x%08x\n", + readl(MCHBAR_REG(BIOS_MAILBOX_DATA))); + + return 0; +@@ -279,7 +279,7 @@ static void configure_pch_power_sharing(void) + pch_power = pcode_mailbox_read(MAILBOX_BIOS_CMD_READ_PCH_POWER); + pch_power_ext = pcode_mailbox_read(MAILBOX_BIOS_CMD_READ_PCH_POWER_EXT); + +- debug("PCH Power: PCODE Levels 0x%08x 0x%08x\n", pch_power, ++printf("PCH Power: PCODE Levels 0x%08x 0x%08x\n", pch_power, + pch_power_ext); + + pmsync = readl(RCB_REG(PMSYNC_CONFIG)); +@@ -354,7 +354,7 @@ static void set_max_ratio(void) + } + msr_write(MSR_IA32_PERF_CTL, perf_ctl); + +- debug("cpu: frequency set to %d\n", ++printf("cpu: frequency set to %d\n", + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); + } + +@@ -369,7 +369,7 @@ int broadwell_init(struct udevice *dev) + msr = msr_read(CORE_THREAD_COUNT_MSR); + num_threads = (msr.lo >> 0) & 0xffff; + num_cores = (msr.lo >> 16) & 0xffff; +- debug("CPU has %u cores, %u threads enabled\n", num_cores, ++printf("CPU has %u cores, %u threads enabled\n", num_cores, + num_threads); + + priv->ht_disabled = num_threads == num_cores; +@@ -520,7 +520,7 @@ static void set_energy_perf_bias(u8 policy) + msr.lo |= policy & 0xf; + msr_write(MSR_IA32_ENERGY_PERFORMANCE_BIAS, msr); + +- debug("cpu: energy policy set to %u\n", policy); ++printf("cpu: energy policy set to %u\n", policy); + } + + /* All CPUs including BSP will run the following function */ +@@ -581,7 +581,7 @@ void cpu_set_power_limits(int power_limit_1_time) + max_power = msr.hi & 0x7fff; + max_time = (msr.hi >> 16) & 0x7f; + +- debug("CPU TDP: %u Watts\n", tdp / power_unit); ++printf("CPU TDP: %u Watts\n", tdp / power_unit); + + if (power_limit_time_msr_to_sec[max_time] > power_limit_1_time) + power_limit_1_time = power_limit_time_msr_to_sec[max_time]; +diff --git a/arch/x86/cpu/broadwell/lpc.c b/arch/x86/cpu/broadwell/lpc.c +index d2638a4e7..a98129893 100644 +--- a/arch/x86/cpu/broadwell/lpc.c ++++ b/arch/x86/cpu/broadwell/lpc.c +@@ -55,7 +55,7 @@ static int broadwell_lpc_probe(struct udevice *dev) + if (!(gd->flags & GD_FLG_RELOC)) { + ret = lpc_common_early_init(dev); + if (ret) { +- debug("%s: lpc_early_init() failed\n", __func__); ++printf("%s: lpc_early_init() failed\n", __func__); + return ret; + } + +diff --git a/arch/x86/cpu/broadwell/me.c b/arch/x86/cpu/broadwell/me.c +index ae16ce264..c59d7f606 100644 +--- a/arch/x86/cpu/broadwell/me.c ++++ b/arch/x86/cpu/broadwell/me.c +@@ -38,7 +38,7 @@ int intel_me_hsio_version(struct udevice *dev, uint16_t *versionp, + udelay(ME_DELAY); + } + if (!count) { +- debug("ERROR: ME failed to respond\n"); ++printf("ERROR: ME failed to respond\n"); + return -ETIMEDOUT; + } + +@@ -47,7 +47,7 @@ int intel_me_hsio_version(struct udevice *dev, uint16_t *versionp, + *versionp = hsiover >> 16; + *checksump = hsiover & 0xffff; + +- debug("ME: HSIO Version : %d (CRC 0x%04x)\n", ++printf("ME: HSIO Version : %d (CRC 0x%04x)\n", + *versionp, *checksump); + + /* Reset registers to normal behavior */ +diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c +index f012db9de..9728fdab1 100644 +--- a/arch/x86/cpu/broadwell/pch.c ++++ b/arch/x86/cpu/broadwell/pch.c +@@ -153,7 +153,7 @@ int enable_alt_smi(struct udevice *pch, u32 mask) + + ret = pch_get_gpio_base(pch, &gpiobase); + if (ret) { +- debug("%s: invalid GPIOBASE address (%08x)\n", __func__, ++printf("%s: invalid GPIOBASE address (%08x)\n", __func__, + gpiobase); + return -EINVAL; + } +@@ -191,7 +191,7 @@ static int pch_power_options(struct udevice *dev) + state = "undefined"; + } + dm_pci_write_config16(dev, GEN_PMCON_3, reg16); +- debug("Set power %s after power failure.\n", state); ++printf("Set power %s after power failure.\n", state); + + /* GPE setup based on device tree configuration */ + ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), +@@ -320,11 +320,11 @@ static void pch_enable_mphy(struct udevice *dev) + strap19 >>= 30; + if (strap19 == 3) { + data_or |= (1 << 3); +- debug("Enable ULX MPHY PG control in single domain\n"); ++printf("Enable ULX MPHY PG control in single domain\n"); + } else if (strap19 == 0) { +- debug("Enable ULX MPHY PG control in split domains\n"); ++printf("Enable ULX MPHY PG control in split domains\n"); + } else { +- debug("Invalid PCH Soft Strap 19 configuration\n"); ++printf("Invalid PCH Soft Strap 19 configuration\n"); + } + } else { + data_or |= (1 << 3); +@@ -355,7 +355,7 @@ static void pch_init_deep_sx(bool deep_sx_enable_ac, bool deep_sx_enable_dc) + /* Power Management init */ + static void pch_pm_init(struct udevice *dev) + { +- debug("PCH PM init\n"); ++printf("PCH PM init\n"); + + pch_init_deep_sx(false, false); + pch_enable_mphy(dev); +@@ -453,7 +453,7 @@ static void systemagent_init(void) + * that BIOS has initialized memory and power management + */ + setbits_8(MCHBAR_REG(BIOS_RESET_CPL), 3); +- debug("Set BIOS_RESET_CPL\n"); ++printf("Set BIOS_RESET_CPL\n"); + + /* Configure turbo power limits 1ms after reset complete bit */ + mdelay(1); +diff --git a/arch/x86/cpu/broadwell/pinctrl_broadwell.c b/arch/x86/cpu/broadwell/pinctrl_broadwell.c +index 85bd37101..e9995998d 100644 +--- a/arch/x86/cpu/broadwell/pinctrl_broadwell.c ++++ b/arch/x86/cpu/broadwell/pinctrl_broadwell.c +@@ -52,7 +52,7 @@ static int broadwell_pinctrl_read_configs(struct udevice *dev, + int count = 0; + int node; + +- debug("%s: starting\n", __func__); ++printf("%s: starting\n", __func__); + for (node = fdt_first_subnode(blob, dev_of_offset(dev)); + node > 0; + node = fdt_next_subnode(blob, node)) { +@@ -87,11 +87,11 @@ static int broadwell_pinctrl_read_configs(struct udevice *dev, + if (fdtdec_get_int(blob, node, "pirq-apic", -1) == + PIRQ_APIC_ROUTE) + conf->pirq_apic_route = true; +- debug("config: phandle=%d\n", phandle); ++printf("config: phandle=%d\n", phandle); + count++; + conf++; + } +- debug("%s: Found %d configurations\n", __func__, count); ++printf("%s: Found %d configurations\n", __func__, count); + + return count; + } +@@ -128,21 +128,21 @@ static int broadwell_pinctrl_read_pins(struct udevice *dev, + + /* There are three cells per pin */ + count = len / (sizeof(u32) * 3); +- debug("Found %d GPIOs to configure\n", count); ++printf("Found %d GPIOs to configure\n", count); + for (i = 0; i < count; i++) { + uint gpio = fdt32_to_cpu(prop[i * 3]); + uint phandle = fdt32_to_cpu(prop[i * 3 + 1]); + int val; + + if (gpio >= num_gpios) { +- debug("%s: GPIO %d out of range\n", __func__, ++printf("%s: GPIO %d out of range\n", __func__, + gpio); + return -EDOM; + } + val = broadwell_pinctrl_lookup_phandle(conf, conf_count, + phandle); + if (val < 0) { +- debug("%s: Cannot find phandle %d\n", __func__, ++printf("%s: Cannot find phandle %d\n", __func__, + phandle); + return -EINVAL; + } +@@ -192,7 +192,7 @@ static void broadwell_pinctrl_commit(struct pch_lp_gpio_regs *regs, + /* PIRQ to IO-APIC map */ + if (pin->pirq_apic_route) + pirq2apic |= gpio_conf[gpio] >> PIRQ_SHIFT; +- debug("gpio %d: conf %d, mode_gpio %d, dir_input %d, output_high %d\n", ++printf("gpio %d: conf %d, mode_gpio %d, dir_input %d, output_high %d\n", + gpio, confnum, pin->mode_gpio, pin->dir_input, + pin->output_high); + } +@@ -222,7 +222,7 @@ static int broadwell_pinctrl_probe(struct udevice *dev) + return ret; + if (!pch) + return -ENODEV; +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + + /* Only init once, before relocation */ + if (gd->flags & GD_FLG_RELOC) +@@ -235,7 +235,7 @@ static int broadwell_pinctrl_probe(struct udevice *dev) + */ + ret = pch_get_gpio_base(pch, &gpiobase); + if (ret) { +- debug("%s: invalid GPIOBASE address (%08x)\n", __func__, ++printf("%s: invalid GPIOBASE address (%08x)\n", __func__, + gpiobase); + return -EINVAL; + } +@@ -243,7 +243,7 @@ static int broadwell_pinctrl_probe(struct udevice *dev) + conf_count = broadwell_pinctrl_read_configs(dev, conf, + ARRAY_SIZE(conf)); + if (conf_count < 0) { +- debug("%s: Cannot read configs: err=%d\n", __func__, ret); ++printf("%s: Cannot read configs: err=%d\n", __func__, ret); + return conf_count; + } + +@@ -254,14 +254,14 @@ static int broadwell_pinctrl_probe(struct udevice *dev) + ret = broadwell_pinctrl_read_pins(dev, conf, conf_count, gpio_conf, + MAX_GPIOS); + if (ret) { +- debug("%s: Cannot read pin settings: err=%d\n", __func__, ret); ++printf("%s: Cannot read pin settings: err=%d\n", __func__, ret); + return ret; + } + + regs = (struct pch_lp_gpio_regs *)gpiobase; + broadwell_pinctrl_commit(regs, conf, gpio_conf, ARRAY_SIZE(conf)); + +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + + return 0; + } +diff --git a/arch/x86/cpu/broadwell/power_state.c b/arch/x86/cpu/broadwell/power_state.c +index 62fd2e8d2..cd1e72693 100644 +--- a/arch/x86/cpu/broadwell/power_state.c ++++ b/arch/x86/cpu/broadwell/power_state.c +@@ -43,22 +43,22 @@ static int prev_sleep_state(struct chipset_power_state *ps) + + static void dump_power_state(struct chipset_power_state *ps) + { +- debug("PM1_STS: %04x\n", ps->pm1_sts); +- debug("PM1_EN: %04x\n", ps->pm1_en); +- debug("PM1_CNT: %08x\n", ps->pm1_cnt); +- debug("TCO_STS: %04x %04x\n", ps->tco1_sts, ps->tco2_sts); ++printf("PM1_STS: %04x\n", ps->pm1_sts); ++printf("PM1_EN: %04x\n", ps->pm1_en); ++printf("PM1_CNT: %08x\n", ps->pm1_cnt); ++printf("TCO_STS: %04x %04x\n", ps->tco1_sts, ps->tco2_sts); + +- debug("GPE0_STS: %08x %08x %08x %08x\n", ++printf("GPE0_STS: %08x %08x %08x %08x\n", + ps->gpe0_sts[0], ps->gpe0_sts[1], + ps->gpe0_sts[2], ps->gpe0_sts[3]); +- debug("GPE0_EN: %08x %08x %08x %08x\n", ++printf("GPE0_EN: %08x %08x %08x %08x\n", + ps->gpe0_en[0], ps->gpe0_en[1], + ps->gpe0_en[2], ps->gpe0_en[3]); + +- debug("GEN_PMCON: %04x %04x %04x\n", ++printf("GEN_PMCON: %04x %04x %04x\n", + ps->gen_pmcon1, ps->gen_pmcon2, ps->gen_pmcon3); + +- debug("Previous Sleep State: S%d\n", ++printf("Previous Sleep State: S%d\n", + ps->prev_sleep_state); + } + +diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c +index 6c04dde99..00548ad5b 100644 +--- a/arch/x86/cpu/broadwell/refcode.c ++++ b/arch/x86/cpu/broadwell/refcode.c +@@ -78,17 +78,17 @@ static int cpu_run_reference_code(void) + int size; + + hdr = (struct rmodule_header *)CONFIG_X86_REFCODE_ADDR; +- debug("Extracting code from rmodule at %p\n", hdr); ++printf("Extracting code from rmodule at %p\n", hdr); + if (hdr->magic != RMODULE_MAGIC) { +- debug("Invalid rmodule magic\n"); ++printf("Invalid rmodule magic\n"); + return -EINVAL; + } + if (hdr->module_link_start_address != 0) { +- debug("Link start address must be 0\n"); ++printf("Link start address must be 0\n"); + return -EPERM; + } + if (hdr->module_entry_point != 0) { +- debug("Entry point must be 0\n"); ++printf("Entry point must be 0\n"); + return -EPERM; + } + +@@ -101,24 +101,24 @@ static int cpu_run_reference_code(void) + dest = (char *)CONFIG_X86_REFCODE_RUN_ADDR; + + size = hdr->payload_end_offset - hdr->payload_begin_offset; +- debug("Copying refcode from %p to %p, size %x\n", src, dest, size); ++printf("Copying refcode from %p to %p, size %x\n", src, dest, size); + memcpy(dest, src, size); + + size = hdr->bss_end - hdr->bss_begin; +- debug("Zeroing BSS at %p, size %x\n", dest + hdr->bss_begin, size); ++printf("Zeroing BSS at %p, size %x\n", dest + hdr->bss_begin, size); + memset(dest + hdr->bss_begin, '\0', size); + + func = (asmlinkage int (*)(void *))dest; +- debug("Running reference code at %p\n", func); ++printf("Running reference code at %p\n", func); + #ifdef DEBUG + print_buffer(CONFIG_X86_REFCODE_RUN_ADDR, (void *)func, 1, 0x40, 0); + #endif + ret = func(pei_data); + if (ret != 0) { +- debug("Reference code returned %d\n", ret); ++printf("Reference code returned %d\n", ret); + return -EL2HLT; + } +- debug("Refereence code completed\n"); ++printf("Refereence code completed\n"); + + return 0; + } +diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c +index be3c9e764..fc9834f14 100644 +--- a/arch/x86/cpu/broadwell/sata.c ++++ b/arch/x86/cpu/broadwell/sata.c +@@ -48,7 +48,7 @@ static void broadwell_sata_init(struct udevice *dev) + u16 reg16; + int port; + +- debug("SATA: Initializing controller in AHCI mode.\n"); ++printf("SATA: Initializing controller in AHCI mode.\n"); + + /* Set timings */ + dm_pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE); +@@ -82,7 +82,7 @@ static void broadwell_sata_init(struct udevice *dev) + /* Initialize AHCI memory-mapped space */ + dm_pci_read_config32(dev, PCI_BASE_ADDRESS_5, ®32); + abar = (u8 *)reg32; +- debug("ABAR: %p\n", abar); ++printf("ABAR: %p\n", abar); + + /* CAP (HBA Capabilities) : enable power management */ + clrsetbits_le32(abar + 0x00, 0x00020060 /* SXS+EMS+PMS */, +diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c +index c104a849a..d54d37d3c 100644 +--- a/arch/x86/cpu/broadwell/sdram.c ++++ b/arch/x86/cpu/broadwell/sdram.c +@@ -49,7 +49,7 @@ static unsigned long get_top_of_ram(struct udevice *dev) + dm_pci_read_config32(dev, DPR, &dpr); + tom = dpr & ~((1 << 20) - 1); + +- debug("dpt %08x tom %08x\n", dpr, tom); ++printf("dpt %08x tom %08x\n", dpr, tom); + /* Subtract DMA Protected Range size if enabled */ + if (dpr & DPR_EPM) + tom -= (dpr & DPR_SIZE_MASK) << 16; +@@ -94,7 +94,7 @@ static int prepare_mrc_cache(struct pei_data *pei_data) + + pei_data->saved_data = mrc_cache->data; + pei_data->saved_data_size = mrc_cache->data_size; +- debug("%s: at %p, size %x checksum %04x\n", __func__, ++printf("%s: at %p, size %x checksum %04x\n", __func__, + pei_data->saved_data, pei_data->saved_data_size, + mrc_cache->checksum); + +@@ -115,7 +115,7 @@ int dram_init(void) + /* Print ME state before MRC */ + ret = syscon_get_by_driver_data(X86_SYSCON_ME, &me_dev); + if (ret) { +- debug("Cannot get ME (err=%d)\n", ret); ++printf("Cannot get ME (err=%d)\n", ret); + return ret; + } + intel_me_status(me_dev); +@@ -123,7 +123,7 @@ int dram_init(void) + /* Save ME HSIO version */ + ret = uclass_first_device_err(UCLASS_PCH, &pch_dev); + if (ret) { +- debug("Cannot get PCH (err=%d)\n", ret); ++printf("Cannot get PCH (err=%d)\n", ret); + return ret; + } + power_state_get(pch_dev, &ps); +@@ -135,13 +135,13 @@ int dram_init(void) + + ret = uclass_first_device_err(UCLASS_NORTHBRIDGE, &dev); + if (ret) { +- debug("Cannot get Northbridge (err=%d)\n", ret); ++printf("Cannot get Northbridge (err=%d)\n", ret); + return ret; + } + size = 256; + ret = mrc_locate_spd(dev, size, &spd_data); + if (ret) { +- debug("Cannot locate SPD (err=%d)\n", ret); ++printf("Cannot locate SPD (err=%d)\n", ret); + return ret; + } + memcpy(pei_data->spd_data[0][0], spd_data, size); +@@ -149,25 +149,25 @@ int dram_init(void) + + ret = prepare_mrc_cache(pei_data); + if (ret) +- debug("prepare_mrc_cache failed: %d\n", ret); ++printf("prepare_mrc_cache failed: %d\n", ret); + +- debug("PEI version %#x\n", pei_data->pei_version); ++printf("PEI version %#x\n", pei_data->pei_version); + ret = mrc_common_init(dev, pei_data, true); + if (ret) { +- debug("mrc_common_init() failed(err=%d)\n", ret); ++printf("mrc_common_init() failed(err=%d)\n", ret); + return ret; + } +- debug("Memory init done\n"); ++printf("Memory init done\n"); + + ret = sdram_find(dev); + if (ret) { +- debug("sdram_find() failed (err=%d)\n", ret); ++printf("sdram_find() failed (err=%d)\n", ret); + return ret; + } + gd->ram_size = gd->arch.meminfo.total_32bit_memory; +- debug("RAM size %llx\n", (unsigned long long)gd->ram_size); ++printf("RAM size %llx\n", (unsigned long long)gd->ram_size); + +- debug("MRC output data length %#x at %p\n", pei_data->data_to_save_size, ++printf("MRC output data length %#x at %p\n", pei_data->data_to_save_size, + pei_data->data_to_save); + /* S3 resume: don't save scrambler seed or MRC data */ + if (pei_data->boot_mode != SLEEP_STATE_S3) { +@@ -194,7 +194,7 @@ int misc_init_r(void) + if (ret) + printf("Unable to save MRC data: %d\n", ret); + else +- debug("Saved MRC cache data\n"); ++printf("Saved MRC cache data\n"); + + return 0; + } +diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c +index 9c4edfcbf..97e8da90b 100644 +--- a/arch/x86/cpu/cpu.c ++++ b/arch/x86/cpu/cpu.c +@@ -171,7 +171,7 @@ int default_print_cpuinfo(void) + cpu_vendor_name(gd->arch.x86_vendor), gd->arch.x86_device); + + if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) { +- debug("ACPI previous sleep state: %s\n", ++printf("ACPI previous sleep state: %s\n", + acpi_ss_string(gd->arch.prev_sleep_state)); + } + +@@ -248,7 +248,7 @@ int last_stage_init(void) + static int x86_init_cpus(void) + { + if (IS_ENABLED(CONFIG_SMP)) { +- debug("Init additional CPUs\n"); ++printf("Init additional CPUs\n"); + x86_mp_init(); + } else { + struct udevice *dev; +@@ -290,7 +290,7 @@ int cpu_init_r(void) + + /* Set up pin control if available */ + ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev); +- debug("%s, pinctrl=%p, ret=%d\n", __func__, dev, ret); ++printf("%s, pinctrl=%p, ret=%d\n", __func__, dev, ret); + + return 0; + } +diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c +index 9a73b768e..41c7b4ca4 100644 +--- a/arch/x86/cpu/efi/payload.c ++++ b/arch/x86/cpu/efi/payload.c +@@ -44,7 +44,7 @@ ulong board_get_usable_ram_top(ulong total_size) + ret = efi_info_get(EFIET_MEMORY_MAP, (void **)&map, &size); + if (ret) { + /* We should have stopped in dram_init(), something is wrong */ +- debug("%s: Missing memory map\n", __func__); ++printf("%s: Missing memory map\n", __func__); + goto err; + } + +@@ -106,7 +106,7 @@ int dram_init_banksize(void) + ret = efi_info_get(EFIET_MEMORY_MAP, (void **)&map, &size); + if (ret) { + /* We should have stopped in dram_init(), something is wrong */ +- debug("%s: Missing memory map\n", __func__); ++printf("%s: Missing memory map\n", __func__); + return -ENXIO; + } + end = (struct efi_mem_desc *)((ulong)map + size); +@@ -152,7 +152,7 @@ int reserve_arch(void) + { + struct efi_info_hdr *hdr; + +- debug("table=%lx\n", gd->arch.table); ++printf("table=%lx\n", gd->arch.table); + if (!gd->arch.table) + return 0; + +@@ -160,7 +160,7 @@ int reserve_arch(void) + + gd->start_addr_sp -= hdr->total_size; + memcpy((void *)gd->start_addr_sp, hdr, hdr->total_size); +- debug("Stashing EFI table at %lx to %lx, size %x\n", ++printf("Stashing EFI table at %lx to %lx, size %x\n", + gd->arch.table, gd->start_addr_sp, hdr->total_size); + gd->arch.table = gd->start_addr_sp; + +diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c +index 96d05e2eb..19279d142 100644 +--- a/arch/x86/cpu/intel_common/cpu.c ++++ b/arch/x86/cpu/intel_common/cpu.c +@@ -51,7 +51,7 @@ int cpu_common_init(void) + + ret = microcode_update_intel(); + if (ret && ret != -EEXIST) { +- debug("%s: Microcode update failure (err=%d)\n", __func__, ret); ++printf("%s: Microcode update failure (err=%d)\n", __func__, ret); + return ret; + } + +@@ -106,7 +106,7 @@ int cpu_set_flex_ratio_to_tdp_nominal(void) + clrsetbits_le32(RCB_REG(SOFT_RESET_DATA), 0x3f << 6, + (nominal_ratio & 0x3f) << 6); + +- debug("CPU: Soft reset to set up flex ratio\n"); ++printf("CPU: Soft reset to set up flex ratio\n"); + + /* Set soft reset control to use register value */ + setbits_le32(RCB_REG(SOFT_RESET_CTRL), 1); +@@ -162,7 +162,7 @@ void cpu_set_perf_control(uint clk_ratio) + perf_ctl.lo = (clk_ratio & 0xff) << 8; + perf_ctl.hi = 0; + msr_write(MSR_IA32_PERF_CTL, perf_ctl); +- debug("CPU: frequency set to %d MHz\n", clk_ratio * INTEL_BCLK_MHZ); ++printf("CPU: frequency set to %d MHz\n", clk_ratio * INTEL_BCLK_MHZ); + } + + bool cpu_config_tdp_levels(void) +diff --git a/arch/x86/cpu/intel_common/me_status.c b/arch/x86/cpu/intel_common/me_status.c +index abc5f6fbc..915ec0b13 100644 +--- a/arch/x86/cpu/intel_common/me_status.c ++++ b/arch/x86/cpu/intel_common/me_status.c +@@ -138,67 +138,67 @@ static const char *const me_progress_policy_values[] = { + static void _intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes) + { + /* Check Current States */ +- debug("ME: FW Partition Table : %s\n", ++printf("ME: FW Partition Table : %s\n", + hfs->fpt_bad ? "BAD" : "OK"); +- debug("ME: Bringup Loader Failure : %s\n", ++printf("ME: Bringup Loader Failure : %s\n", + hfs->ft_bup_ld_flr ? "YES" : "NO"); +- debug("ME: Firmware Init Complete : %s\n", ++printf("ME: Firmware Init Complete : %s\n", + hfs->fw_init_complete ? "YES" : "NO"); +- debug("ME: Manufacturing Mode : %s\n", ++printf("ME: Manufacturing Mode : %s\n", + hfs->mfg_mode ? "YES" : "NO"); +- debug("ME: Boot Options Present : %s\n", ++printf("ME: Boot Options Present : %s\n", + hfs->boot_options_present ? "YES" : "NO"); +- debug("ME: Update In Progress : %s\n", ++printf("ME: Update In Progress : %s\n", + hfs->update_in_progress ? "YES" : "NO"); +- debug("ME: Current Working State : %s\n", ++printf("ME: Current Working State : %s\n", + me_cws_values[hfs->working_state]); +- debug("ME: Current Operation State : %s\n", ++printf("ME: Current Operation State : %s\n", + me_opstate_values[hfs->operation_state]); +- debug("ME: Current Operation Mode : %s\n", ++printf("ME: Current Operation Mode : %s\n", + me_opmode_values[hfs->operation_mode]); +- debug("ME: Error Code : %s\n", ++printf("ME: Error Code : %s\n", + me_error_values[hfs->error_code]); +- debug("ME: Progress Phase : %s\n", ++printf("ME: Progress Phase : %s\n", + me_progress_values[gmes->progress_code]); +- debug("ME: Power Management Event : %s\n", ++printf("ME: Power Management Event : %s\n", + me_pmevent_values[gmes->current_pmevent]); + +- debug("ME: Progress Phase State : "); ++printf("ME: Progress Phase State : "); + switch (gmes->progress_code) { + case ME_GMES_PHASE_ROM: /* ROM Phase */ +- debug("%s", me_progress_rom_values[gmes->current_state]); ++printf("%s", me_progress_rom_values[gmes->current_state]); + break; + + case ME_GMES_PHASE_BUP: /* Bringup Phase */ + if (gmes->current_state < ARRAY_SIZE(me_progress_bup_values) && + me_progress_bup_values[gmes->current_state]) +- debug("%s", ++printf("%s", + me_progress_bup_values[gmes->current_state]); + else +- debug("0x%02x", gmes->current_state); ++printf("0x%02x", gmes->current_state); + break; + + case ME_GMES_PHASE_POLICY: /* Policy Module Phase */ + if (gmes->current_state < + ARRAY_SIZE(me_progress_policy_values) && + me_progress_policy_values[gmes->current_state]) +- debug("%s", ++printf("%s", + me_progress_policy_values[gmes->current_state]); + else +- debug("0x%02x", gmes->current_state); ++printf("0x%02x", gmes->current_state); + break; + + case ME_GMES_PHASE_HOST: /* Host Communication Phase */ + if (!gmes->current_state) +- debug("Host communication established"); ++printf("Host communication established"); + else +- debug("0x%02x", gmes->current_state); ++printf("0x%02x", gmes->current_state); + break; + + default: +- debug("Unknown 0x%02x", gmes->current_state); ++printf("Unknown 0x%02x", gmes->current_state); + } +- debug("\n"); ++printf("\n"); + } + + void intel_me_status(struct udevice *me_dev) +diff --git a/arch/x86/cpu/intel_common/microcode.c b/arch/x86/cpu/intel_common/microcode.c +index 4d8e1d210..af3c4c3b1 100644 +--- a/arch/x86/cpu/intel_common/microcode.c ++++ b/arch/x86/cpu/intel_common/microcode.c +@@ -115,7 +115,7 @@ static void microcode_read_cpu(struct microcode_update *cpu) + rdmsr(0x17, low, high); + cpu->processor_flags = 1 << ((high >> 18) & 7); + } +- debug("microcode: sig=%#x pf=%#x revision=%#x\n", ++printf("microcode: sig=%#x pf=%#x revision=%#x\n", + cpu->processor_signature, cpu->processor_flags, + cpu->update_revision); + } +@@ -140,7 +140,7 @@ int microcode_update_intel(void) + node = fdtdec_next_compatible(blob, node, + COMPAT_INTEL_MICROCODE); + if (node < 0) { +- debug("%s: Found %d updates\n", __func__, count); ++printf("%s: Found %d updates\n", __func__, count); + return count ? 0 : skipped ? -EEXIST : -ENOENT; + } + +@@ -151,18 +151,18 @@ int microcode_update_intel(void) + * in the build system. In that case it will have + * already been updated in car_init(). + */ +- debug("%s: Microcode data not available\n", __func__); ++printf("%s: Microcode data not available\n", __func__); + skipped++; + continue; + } + if (ret) { +- debug("%s: Unable to decode update: %d\n", __func__, ++printf("%s: Unable to decode update: %d\n", __func__, + ret); + return ret; + } + if (!(update.processor_signature == cpu.processor_signature && + (update.processor_flags & cpu.processor_flags))) { +- debug("%s: Skipping non-matching update, sig=%x, pf=%x\n", ++printf("%s: Skipping non-matching update, sig=%x, pf=%x\n", + __func__, update.processor_signature, + update.processor_flags); + skipped++; +@@ -171,7 +171,7 @@ int microcode_update_intel(void) + address = (ulong)update.data + UCODE_HEADER_LEN; + wrmsr(MSR_IA32_UCODE_WRITE, address, 0); + rev = microcode_read_rev(); +- debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n", ++printf("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n", + rev, update.date_code & 0xffff, + (update.date_code >> 24) & 0xff, + (update.date_code >> 16) & 0xff); +diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c +index a97b0b7ce..9ddd3316e 100644 +--- a/arch/x86/cpu/intel_common/mrc.c ++++ b/arch/x86/cpu/intel_common/mrc.c +@@ -84,7 +84,7 @@ int mrc_add_memory_area(struct memory_info *info, uint64_t start, + info->total_memory += ptr->size; + if (ptr->start < (1ULL << 32)) + info->total_32bit_memory += ptr->size; +- debug("%d: memory %llx size %llx, total now %llx / %llx\n", ++printf("%d: memory %llx size %llx, total now %llx / %llx\n", + info->num_areas, ptr->start, ptr->size, + info->total_32bit_memory, info->total_memory); + info->num_areas++; +@@ -105,27 +105,27 @@ void report_memory_config(void) + addr_decode_ch[0] = readl(MCHBAR_REG(0x5004)); + addr_decode_ch[1] = readl(MCHBAR_REG(0x5008)); + +- debug("memcfg DDR3 clock %d MHz\n", ++printf("memcfg DDR3 clock %d MHz\n", + (readl(MCHBAR_REG(0x5e04)) * 13333 * 2 + 50) / 100); +- debug("memcfg channel assignment: A: %d, B % d, C % d\n", ++printf("memcfg channel assignment: A: %d, B % d, C % d\n", + addr_decoder_common & 3, + (addr_decoder_common >> 2) & 3, + (addr_decoder_common >> 4) & 3); + + for (i = 0; i < ARRAY_SIZE(addr_decode_ch); i++) { + u32 ch_conf = addr_decode_ch[i]; +- debug("memcfg channel[%d] config (%8.8x):\n", i, ch_conf); +- debug(" ECC %s\n", ecc_decoder[(ch_conf >> 24) & 3]); +- debug(" enhanced interleave mode %s\n", ++printf("memcfg channel[%d] config (%8.8x):\n", i, ch_conf); ++printf(" ECC %s\n", ecc_decoder[(ch_conf >> 24) & 3]); ++printf(" enhanced interleave mode %s\n", + ((ch_conf >> 22) & 1) ? "on" : "off"); +- debug(" rank interleave %s\n", ++printf(" rank interleave %s\n", + ((ch_conf >> 21) & 1) ? "on" : "off"); +- debug(" DIMMA %d MB width x%d %s rank%s\n", ++printf(" DIMMA %d MB width x%d %s rank%s\n", + ((ch_conf >> 0) & 0xff) * 256, + ((ch_conf >> 19) & 1) ? 16 : 8, + ((ch_conf >> 17) & 1) ? "dual" : "single", + ((ch_conf >> 16) & 1) ? "" : ", selected"); +- debug(" DIMMB %d MB width x%d %s rank%s\n", ++printf(" DIMMB %d MB width x%d %s rank%s\n", + ((ch_conf >> 8) & 0xff) * 256, + ((ch_conf >> 20) & 1) ? 16 : 8, + ((ch_conf >> 18) & 1) ? "dual" : "single", +@@ -145,11 +145,11 @@ int mrc_locate_spd(struct udevice *dev, int size, const void **spd_datap) + ret = gpio_request_list_by_name(dev, "board-id-gpios", desc, + ARRAY_SIZE(desc), GPIOD_IS_IN); + if (ret < 0) { +- debug("%s: gpio ret=%d\n", __func__, ret); ++printf("%s: gpio ret=%d\n", __func__, ret); + return ret; + } + spd_index = dm_gpio_get_values_as_int(desc, ret); +- debug("spd index %d\n", spd_index); ++printf("spd index %d\n", spd_index); + + node = fdt_first_subnode(blob, dev_of_offset(dev)); + if (node < 0) +@@ -167,7 +167,7 @@ int mrc_locate_spd(struct udevice *dev, int size, const void **spd_datap) + return -EINVAL; + } + +- debug("Using SDRAM SPD data for '%s'\n", ++printf("Using SDRAM SPD data for '%s'\n", + fdt_get_name(blob, spd_node, NULL)); + return 0; + } +@@ -196,16 +196,16 @@ static int sdram_initialise(struct udevice *dev, struct udevice *me_dev, + const char *data; + + report_platform_info(dev); +- debug("Starting UEFI PEI System Agent\n"); ++printf("Starting UEFI PEI System Agent\n"); + +- debug("PEI data at %p:\n", pei_data); ++printf("PEI data at %p:\n", pei_data); + + data = (char *)CONFIG_X86_MRC_ADDR; + if (data) { + int rv; + ulong start; + +- debug("Calling MRC at %p\n", data); ++printf("Calling MRC at %p\n", data); + post_code(POST_PRE_MRC); + start = get_timer(0); + if (use_asm_linkage) { +@@ -234,14 +234,14 @@ static int sdram_initialise(struct udevice *dev, struct udevice *me_dev, + printf("Nonzero MRC return value.\n"); + return -EFAULT; + } +- debug("MRC execution time %lu ms\n", get_timer(start)); ++printf("MRC execution time %lu ms\n", get_timer(start)); + } else { + printf("UEFI PEI System Agent not found.\n"); + return -ENOSYS; + } + + version = readl(MCHBAR_REG(MCHBAR_PEI_VERSION)); +- debug("System Agent Version %d.%d.%d Build %d\n", ++printf("System Agent Version %d.%d.%d Build %d\n", + version >> 24 , (version >> 16) & 0xff, + (version >> 8) & 0xff, version & 0xff); + +diff --git a/arch/x86/cpu/intel_common/report_platform.c b/arch/x86/cpu/intel_common/report_platform.c +index a3612817c..5d9d856ff 100644 +--- a/arch/x86/cpu/intel_common/report_platform.c ++++ b/arch/x86/cpu/intel_common/report_platform.c +@@ -30,11 +30,11 @@ static void report_cpu_info(void) + } + + cpuidr = cpuid(1); +- debug("CPU id(%x): %s\n", cpuidr.eax, cpu_name); ++printf("CPU id(%x): %s\n", cpuidr.eax, cpu_name); + aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0; + txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0; + vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0; +- debug("AES %ssupported, TXT %ssupported, VT %ssupported\n", ++printf("AES %ssupported, TXT %ssupported, VT %ssupported\n", + mode[aes], mode[txt], mode[vt]); + } + +@@ -79,7 +79,7 @@ static void report_pch_info(struct udevice *dev) + } + } + dm_pci_read_config8(dev, 8, &rev_id); +- debug("PCH type: %s, device id: %x, rev id %x\n", pch_type, dev_id, ++printf("PCH type: %s, device id: %x, rev id %x\n", pch_type, dev_id, + rev_id); + } + +diff --git a/arch/x86/cpu/ioapic.c b/arch/x86/cpu/ioapic.c +index 4f99de6ec..e478cc09e 100644 +--- a/arch/x86/cpu/ioapic.c ++++ b/arch/x86/cpu/ioapic.c +@@ -25,11 +25,11 @@ void io_apic_set_id(int ioapic_id) + { + int bsp_lapicid = lapicid(); + +- debug("IOAPIC: Initialising IOAPIC at %08x\n", IO_APIC_ADDR); +- debug("IOAPIC: Bootstrap Processor Local APIC = %#02x\n", bsp_lapicid); ++printf("IOAPIC: Initialising IOAPIC at %08x\n", IO_APIC_ADDR); ++printf("IOAPIC: Bootstrap Processor Local APIC = %#02x\n", bsp_lapicid); + + if (ioapic_id) { +- debug("IOAPIC: ID = 0x%02x\n", ioapic_id); ++printf("IOAPIC: ID = 0x%02x\n", ioapic_id); + /* Set IOAPIC ID if it has been specified */ + io_apic_write(0x00, (io_apic_read(0x00) & 0xf0ffffff) | + (ioapic_id << 24)); +diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c +index 766b2451a..21334fa19 100644 +--- a/arch/x86/cpu/irq.c ++++ b/arch/x86/cpu/irq.c +@@ -182,7 +182,7 @@ static int create_pirq_routing_table(struct udevice *dev) + priv->link_base = fdt_addr_to_cpu(cell[0]); + priv->link_num = fdt_addr_to_cpu(cell[1]); + if (priv->link_num > CONFIG_MAX_PIRQ_LINKS) { +- debug("Limiting supported PIRQ link number from %d to %d\n", ++printf("Limiting supported PIRQ link number from %d to %d\n", + priv->link_num, CONFIG_MAX_PIRQ_LINKS); + priv->link_num = CONFIG_MAX_PIRQ_LINKS; + } +@@ -274,7 +274,7 @@ static int create_pirq_routing_table(struct udevice *dev) + pr.pin = fdt_addr_to_cpu(cell[1]); + pr.pirq = fdt_addr_to_cpu(cell[2]); + +- debug("irq_info %d: b.d.f %x.%x.%x INT%c PIRQ%c\n", ++printf("irq_info %d: b.d.f %x.%x.%x INT%c PIRQ%c\n", + i, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf), + PCI_FUNC(pr.bdf), 'A' + pr.pin - 1, + 'A' + pr.pirq); +@@ -282,11 +282,11 @@ static int create_pirq_routing_table(struct udevice *dev) + slot = check_dup_entry(slot_base, irq_entries, + PCI_BUS(pr.bdf), PCI_DEV(pr.bdf)); + if (slot) { +- debug("found entry for bus %d device %d, ", ++printf("found entry for bus %d device %d, ", + PCI_BUS(pr.bdf), PCI_DEV(pr.bdf)); + + if (slot->irq[pr.pin - 1].link) { +- debug("skipping\n"); ++printf("skipping\n"); + + /* + * Sanity test on the routed PIRQ pin +@@ -297,13 +297,13 @@ static int create_pirq_routing_table(struct udevice *dev) + */ + if (slot->irq[pr.pin - 1].link != + pirq_linkno_to_reg(priv, pr.pirq)) +- debug("WARNING: Inconsistent PIRQ routing information\n"); ++printf("WARNING: Inconsistent PIRQ routing information\n"); + continue; + } + } else { + slot = slot_base + irq_entries++; + } +- debug("writing INT%c\n", 'A' + pr.pin - 1); ++printf("writing INT%c\n", 'A' + pr.pin - 1); + fill_irq_info(priv, slot, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf), + pr.pin, pr.pirq); + } +@@ -340,7 +340,7 @@ int irq_router_probe(struct udevice *dev) + + ret = create_pirq_routing_table(dev); + if (ret) { +- debug("Failed to create pirq routing table\n"); ++printf("Failed to create pirq routing table\n"); + return ret; + } + /* Route PIRQ */ +diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c +index 0540b0216..8c6e7a97b 100644 +--- a/arch/x86/cpu/ivybridge/bd82x6x.c ++++ b/arch/x86/cpu/ivybridge/bd82x6x.c +@@ -205,7 +205,7 @@ static int bd82x6x_get_gpio_base(struct udevice *dev, u32 *gbasep) + */ + dm_pci_read_config32(dev, GPIO_BASE, &base); + if (base == 0x00000000 || base == 0xffffffff) { +- debug("%s: unexpected BASE value\n", __func__); ++printf("%s: unexpected BASE value\n", __func__); + return -ENODEV; + } + +diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c +index a02f4f960..463f18428 100644 +--- a/arch/x86/cpu/ivybridge/cpu.c ++++ b/arch/x86/cpu/ivybridge/cpu.c +@@ -138,17 +138,17 @@ int checkcpu(void) + + /* TODO: cmos_post_init() */ + if (readl(MCHBAR_REG(SSKPD)) == 0xCAFE) { +- debug("soft reset detected\n"); ++printf("soft reset detected\n"); + boot_mode = PEI_BOOT_SOFT_RESET; + + /* System is not happy after keyboard reset... */ +- debug("Issuing CF9 warm reset\n"); ++printf("Issuing CF9 warm reset\n"); + reset_cpu(); + } + + ret = cpu_common_init(); + if (ret) { +- debug("%s: cpu_common_init() failed\n", __func__); ++printf("%s: cpu_common_init() failed\n", __func__); + return ret; + } + +@@ -159,7 +159,7 @@ int checkcpu(void) + pm1_cnt = inl(DEFAULT_PMBASE + PM1_CNT); + + if ((pm1_sts & WAK_STS) && ((pm1_cnt >> 10) & 7) == 5) { +- debug("Resume from S3 detected, but disabled.\n"); ++printf("Resume from S3 detected, but disabled.\n"); + } else { + /* + * TODO: An indication of life might be possible here (e.g. +@@ -171,7 +171,7 @@ int checkcpu(void) + /* Enable SPD ROMs and DDR-III DRAM */ + ret = uclass_first_device_err(UCLASS_I2C, &dev); + if (ret) { +- debug("%s: Failed to get I2C (ret=%d)\n", __func__, ret); ++printf("%s: Failed to get I2C (ret=%d)\n", __func__, ret); + return ret; + } + +diff --git a/arch/x86/cpu/ivybridge/early_me.c b/arch/x86/cpu/ivybridge/early_me.c +index bee1671ba..0ee3d2103 100644 +--- a/arch/x86/cpu/ivybridge/early_me.c ++++ b/arch/x86/cpu/ivybridge/early_me.c +@@ -35,7 +35,7 @@ int intel_early_me_init(struct udevice *me_dev) + struct me_uma uma; + struct me_hfs hfs; + +- debug("Intel ME early init\n"); ++printf("Intel ME early init\n"); + + /* Wait for ME UMA SIZE VALID bit to be set */ + for (count = ME_RETRY; count > 0; --count) { +@@ -56,7 +56,7 @@ int intel_early_me_init(struct udevice *me_dev) + return -EBADF; + } + +- debug("Intel ME firmware is ready\n"); ++printf("Intel ME firmware is ready\n"); + + return 0; + } +@@ -67,11 +67,11 @@ int intel_early_me_uma_size(struct udevice *me_dev) + + pci_read_dword_ptr(me_dev, &uma, PCI_ME_UMA); + if (uma.valid) { +- debug("ME: Requested %uMB UMA\n", uma.size); ++printf("ME: Requested %uMB UMA\n", uma.size); + return uma.size; + } + +- debug("ME: Invalid UMA size\n"); ++printf("ME: Invalid UMA size\n"); + return -EINVAL; + } + +@@ -111,7 +111,7 @@ int intel_early_me_init_done(struct udevice *dev, struct udevice *me_dev, + did.uma_base = (mebase_l >> 20) | (mebase_h << 12); + + /* Send message to ME */ +- debug("ME: Sending Init Done with status: %d, UMA base: 0x%04x\n", ++printf("ME: Sending Init Done with status: %d, UMA base: 0x%04x\n", + status, did.uma_base); + + pci_write_dword_ptr(me_dev, &did, PCI_ME_H_GS); +@@ -129,7 +129,7 @@ int intel_early_me_init_done(struct udevice *dev, struct udevice *me_dev, + } + + /* Return the requested BIOS action */ +- debug("ME: Requested BIOS Action: %s\n", me_ack_values[hfs.ack_data]); ++printf("ME: Requested BIOS Action: %s\n", me_ack_values[hfs.ack_data]); + + /* Check status after acknowledgement */ + intel_me_status(me_dev); +diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c +index 3c4ea6c26..ec1e81846 100644 +--- a/arch/x86/cpu/ivybridge/fsp_configs.c ++++ b/arch/x86/cpu/ivybridge/fsp_configs.c +@@ -21,7 +21,7 @@ void fsp_update_configs(struct fsp_config_data *config, + + node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_IVYBRIDGE_FSP); + if (node < 0) { +- debug("%s: Cannot find FSP node\n", __func__); ++printf("%s: Cannot find FSP node\n", __func__); + return; + } + +diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c +index f931d2be1..2bef1fe50 100644 +--- a/arch/x86/cpu/ivybridge/lpc.c ++++ b/arch/x86/cpu/ivybridge/lpc.c +@@ -47,18 +47,18 @@ static int pch_enable_apic(struct udevice *pch) + + writel(0, IO_APIC_INDEX); + reg32 = readl(IO_APIC_DATA); +- debug("PCH APIC ID = %x\n", (reg32 >> 24) & 0x0f); ++printf("PCH APIC ID = %x\n", (reg32 >> 24) & 0x0f); + if (reg32 != (1 << 25)) { + printf("APIC Error - cannot write to registers\n"); + return -EPERM; + } + +- debug("Dumping IOAPIC registers\n"); ++printf("Dumping IOAPIC registers\n"); + for (i = 0; i < 3; i++) { + writel(i, IO_APIC_INDEX); +- debug(" reg 0x%04x:", i); ++printf(" reg 0x%04x:", i); + reg32 = readl(IO_APIC_DATA); +- debug(" 0x%08x\n", reg32); ++printf(" 0x%08x\n", reg32); + } + + /* Select Boot Configuration register. */ +@@ -176,7 +176,7 @@ static int pch_power_options(struct udevice *pch) + reg16 |= (1 << 12); /* Disable SLP stretch after SUS well */ + + dm_pci_write_config16(pch, GEN_PMCON_3, reg16); +- debug("Set power %s after power failure.\n", state); ++printf("Set power %s after power failure.\n", state); + + /* Set up NMI on errors. */ + reg8 = inb(0x61); +@@ -189,10 +189,10 @@ static int pch_power_options(struct udevice *pch) + /* TODO(sjg@chromium.org): Make this configurable */ + nmi_option = NMI_OFF; + if (nmi_option) { +- debug("NMI sources enabled.\n"); ++printf("NMI sources enabled.\n"); + reg8 &= ~(1 << 7); /* Set NMI. */ + } else { +- debug("NMI sources disabled.\n"); ++printf("NMI sources disabled.\n"); + /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); + } +@@ -245,7 +245,7 @@ static void pch_rtc_init(struct udevice *pch) + reg8 &= ~RTC_BATTERY_DEAD; + dm_pci_write_config8(pch, GEN_PMCON_3, reg8); + } +- debug("rtc_failed = 0x%x\n", rtc_failed); ++printf("rtc_failed = 0x%x\n", rtc_failed); + + /* TODO: Handle power failure */ + if (rtc_failed) +@@ -255,7 +255,7 @@ static void pch_rtc_init(struct udevice *pch) + /* CougarPoint PCH Power Management init */ + static void cpt_pm_init(struct udevice *pch) + { +- debug("CougarPoint PM init\n"); ++printf("CougarPoint PM init\n"); + dm_pci_write_config8(pch, 0xa9, 0x47); + setbits_le32(RCB_REG(0x2238), (1 << 6) | (1 << 0)); + +@@ -299,7 +299,7 @@ static void cpt_pm_init(struct udevice *pch) + /* PantherPoint PCH Power Management init */ + static void ppt_pm_init(struct udevice *pch) + { +- debug("PantherPoint PM init\n"); ++printf("PantherPoint PM init\n"); + dm_pci_write_config8(pch, 0xa9, 0x47); + setbits_le32(RCB_REG(0x2238), 1 << 0); + setbits_le32(RCB_REG(0x228c), 1 << 0); +@@ -387,7 +387,7 @@ static void pch_disable_smm_only_flashing(struct udevice *pch) + { + u8 reg8; + +- debug("Enabling BIOS updates outside of SMM... "); ++printf("Enabling BIOS updates outside of SMM... "); + dm_pci_read_config8(pch, 0xdc, ®8); /* BIOS_CNTL */ + reg8 &= ~(1 << 5); + dm_pci_write_config8(pch, 0xdc, reg8); +@@ -428,7 +428,7 @@ static int lpc_init_extra(struct udevice *dev) + { + struct udevice *pch = dev->parent; + +- debug("pch: lpc_init\n"); ++printf("pch: lpc_init\n"); + dm_pci_write_bar32(pch, 0, 0); + dm_pci_write_bar32(pch, 1, 0xff800000); + dm_pci_write_bar32(pch, 2, 0xfec00000); +@@ -483,7 +483,7 @@ static int bd82x6x_lpc_early_init(struct udevice *dev) + set_spi_speed(); + + /* Setting up Southbridge. In the northbridge code. */ +- debug("Setting up static southbridge registers\n"); ++printf("Setting up static southbridge registers\n"); + dm_pci_write_config32(dev->parent, PCH_RCBA_BASE, + RCB_BASE_ADDRESS | 1); + dm_pci_write_config32(dev->parent, PMBASE, DEFAULT_PMBASE | 1); +@@ -491,7 +491,7 @@ static int bd82x6x_lpc_early_init(struct udevice *dev) + /* Enable ACPI BAR */ + dm_pci_write_config8(dev->parent, ACPI_CNTL, 0x80); + +- debug("Disabling watchdog reboot\n"); ++printf("Disabling watchdog reboot\n"); + setbits_le32(RCB_REG(GCS), 1 >> 5); /* No reset */ + outw(1 << 11, DEFAULT_PMBASE | 0x60 | 0x08); /* halt timer */ + +@@ -508,7 +508,7 @@ static int bd82x6x_lpc_probe(struct udevice *dev) + if (!(gd->flags & GD_FLG_RELOC)) { + ret = lpc_common_early_init(dev); + if (ret) { +- debug("%s: lpc_early_init() failed\n", __func__); ++printf("%s: lpc_early_init() failed\n", __func__); + return ret; + } + +diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c +index 3906a6979..a3cafe56c 100644 +--- a/arch/x86/cpu/ivybridge/model_206ax.c ++++ b/arch/x86/cpu/ivybridge/model_206ax.c +@@ -44,7 +44,7 @@ static void enable_vmx(void) + msr = msr_read(MSR_IA32_FEATURE_CONTROL); + + if (msr.lo & (1 << 0)) { +- debug("VMX is locked, so %s will do nothing\n", __func__); ++printf("VMX is locked, so %s will do nothing\n", __func__); + /* VMX locked. If we set it again we get an illegal + * instruction + */ +@@ -57,7 +57,7 @@ static void enable_vmx(void) + msr.hi = 0; + msr.lo = 0; + +- debug("%s VMX\n", enable ? "Enabling" : "Disabling"); ++printf("%s VMX\n", enable ? "Enabling" : "Disabling"); + + /* + * Even though the Intel manual says you must set the lock bit in +@@ -183,7 +183,7 @@ void set_power_limits(u8 power_limit_1_time) + max_power = msr.hi & 0x7fff; + max_time = (msr.hi >> 16) & 0x7f; + +- debug("CPU TDP: %u Watts\n", tdp / power_unit); ++printf("CPU TDP: %u Watts\n", tdp / power_unit); + + if (power_limit_time_msr_to_sec[max_time] > power_limit_1_time) + power_limit_1_time = power_limit_time_msr_to_sec[max_time]; +@@ -354,7 +354,7 @@ static void set_energy_perf_bias(u8 policy) + msr.lo |= policy & 0xf; + msr_write(IA32_ENERGY_PERFORMANCE_BIAS, msr); + +- debug("model_x06ax: energy policy set to %u\n", policy); ++printf("model_x06ax: energy policy set to %u\n", policy); + } + + static void configure_mca(void) +@@ -391,7 +391,7 @@ static int model_206ax_init(struct udevice *dev) + /* Thermal throttle activation offset */ + ret = cpu_configure_thermal_target(dev); + if (ret) { +- debug("Cannot set thermal target\n"); ++printf("Cannot set thermal target\n"); + if (ret != -ENOENT) + return ret; + } +diff --git a/arch/x86/cpu/ivybridge/northbridge.c b/arch/x86/cpu/ivybridge/northbridge.c +index 994f8a4ff..25ccf6ab1 100644 +--- a/arch/x86/cpu/ivybridge/northbridge.c ++++ b/arch/x86/cpu/ivybridge/northbridge.c +@@ -74,7 +74,7 @@ static void add_fixed_resources(struct udevice *dev, int index) + u32 pcie_config_base, pcie_config_size; + + if (get_pcie_bar(dev, &pcie_config_base, &pcie_config_size)) { +- debug("Adding PCIe config bar base=0x%08x size=0x%x\n", ++printf("Adding PCIe config bar base=0x%08x size=0x%x\n", + pcie_config_base, pcie_config_size); + } + } +@@ -134,7 +134,7 @@ static void northbridge_init(struct udevice *dev, int rev) + * that BIOS has initialized memory and power management + */ + setbits_8(MCHBAR_REG(BIOS_RESET_CPL), 1); +- debug("Set BIOS_RESET_CPL\n"); ++printf("Set BIOS_RESET_CPL\n"); + + /* Configure turbo power limits 1ms after reset complete bit */ + mdelay(1); +@@ -158,7 +158,7 @@ static void northbridge_init(struct udevice *dev, int rev) + static void sandybridge_setup_northbridge_bars(struct udevice *dev) + { + /* Set up all hardcoded northbridge BARs */ +- debug("Setting up static registers\n"); ++printf("Setting up static registers\n"); + dm_pci_write_config32(dev, EPBAR, DEFAULT_EPBAR | 1); + dm_pci_write_config32(dev, EPBAR + 4, (0LL + DEFAULT_EPBAR) >> 32); + dm_pci_write_config32(dev, MCHBAR, MCH_BASE_ADDRESS | 1); +diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c +index f47ecdffa..78b0577e4 100644 +--- a/arch/x86/cpu/ivybridge/sata.c ++++ b/arch/x86/cpu/ivybridge/sata.c +@@ -46,7 +46,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch) + u32 reg32; + u16 reg16; + +- debug("SATA: Initializing...\n"); ++printf("SATA: Initializing...\n"); + + /* SATA configuration */ + port_map = fdtdec_get_int(blob, node, "intel,sata-port-map", 0); +@@ -57,7 +57,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch) + if (!mode || !strcmp(mode, "ahci")) { + ulong abar; + +- debug("SATA: Controller in AHCI mode\n"); ++printf("SATA: Controller in AHCI mode\n"); + + /* Set timings */ + dm_pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | +@@ -74,7 +74,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch) + + /* Initialize AHCI memory-mapped space */ + abar = dm_pci_read_bar32(dev, 5); +- debug("ABAR: %08lx\n", abar); ++printf("ABAR: %08lx\n", abar); + /* CAP (HBA Capabilities) : enable power management */ + reg32 = readl(abar + 0x00); + reg32 |= 0x0c006000; /* set PSC+SSC+SALP+SSS */ +@@ -98,7 +98,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch) + reg32 &= ~0x00000005; + writel(reg32, abar + 0xa0); + } else if (!strcmp(mode, "combined")) { +- debug("SATA: Controller in combined mode\n"); ++printf("SATA: Controller in combined mode\n"); + + /* No AHCI: clear AHCI base */ + dm_pci_write_bar32(dev, 5, 0x00000000); +@@ -122,7 +122,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch) + + common_sata_init(dev, port_map); + } else { +- debug("SATA: Controller in plain-ide mode\n"); ++printf("SATA: Controller in plain-ide mode\n"); + + /* No AHCI: clear AHCI base */ + dm_pci_write_bar32(dev, 5, 0x00000000); +diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c +index dd6b8753d..106f49a7b 100644 +--- a/arch/x86/cpu/ivybridge/sdram.c ++++ b/arch/x86/cpu/ivybridge/sdram.c +@@ -64,7 +64,7 @@ static int read_seed_from_cmos(struct pei_data *pei_data) + + ret = uclass_get_device(UCLASS_RTC, 0, &dev); + if (ret) { +- debug("Cannot find RTC: err=%d\n", ret); ++printf("Cannot find RTC: err=%d\n", ret); + return -ENODEV; + } + +@@ -80,13 +80,13 @@ static int read_seed_from_cmos(struct pei_data *pei_data) + &pei_data->scrambler_seed_s3); + } + if (ret) { +- debug("Failed to read from RTC %s\n", dev->name); ++printf("Failed to read from RTC %s\n", dev->name); + return ret; + } + +- debug("Read scrambler seed 0x%08x from CMOS 0x%02x\n", ++printf("Read scrambler seed 0x%08x from CMOS 0x%02x\n", + pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED); +- debug("Read S3 scrambler seed 0x%08x from CMOS 0x%02x\n", ++printf("Read S3 scrambler seed 0x%08x from CMOS 0x%02x\n", + pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); + + /* Compute seed checksum and compare */ +@@ -100,7 +100,7 @@ static int read_seed_from_cmos(struct pei_data *pei_data) + seed_checksum |= rtc_read8(dev, CMOS_OFFSET_MRC_SEED_CHK + 1) << 8; + + if (checksum != seed_checksum) { +- debug("%s: invalid seed checksum\n", __func__); ++printf("%s: invalid seed checksum\n", __func__); + pei_data->scrambler_seed = 0; + pei_data->scrambler_seed_s3 = 0; + return -EINVAL; +@@ -127,7 +127,7 @@ static int prepare_mrc_cache(struct pei_data *pei_data) + + pei_data->mrc_input = mrc_cache->data; + pei_data->mrc_input_len = mrc_cache->data_size; +- debug("%s: at %p, size %x checksum %04x\n", __func__, ++printf("%s: at %p, size %x checksum %04x\n", __func__, + pei_data->mrc_input, pei_data->mrc_input_len, + mrc_cache->checksum); + +@@ -142,17 +142,17 @@ static int write_seeds_to_cmos(struct pei_data *pei_data) + + ret = uclass_get_device(UCLASS_RTC, 0, &dev); + if (ret) { +- debug("Cannot find RTC: err=%d\n", ret); ++printf("Cannot find RTC: err=%d\n", ret); + return -ENODEV; + } + + /* Save the MRC seed values to CMOS */ + rtc_write32(dev, CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed); +- debug("Save scrambler seed 0x%08x to CMOS 0x%02x\n", ++printf("Save scrambler seed 0x%08x to CMOS 0x%02x\n", + pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED); + + rtc_write32(dev, CMOS_OFFSET_MRC_SEED_S3, pei_data->scrambler_seed_s3); +- debug("Save s3 scrambler seed 0x%08x to CMOS 0x%02x\n", ++printf("Save s3 scrambler seed 0x%08x to CMOS 0x%02x\n", + pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); + + /* Save a simple checksum of the seed values */ +@@ -213,7 +213,7 @@ static int copy_spd(struct udevice *dev, struct pei_data *peid) + + ret = mrc_locate_spd(dev, sizeof(peid->spd_data[0]), &data); + if (ret) { +- debug("%s: Could not locate SPD (ret=%d)\n", __func__, ret); ++printf("%s: Could not locate SPD (ret=%d)\n", __func__, ret); + return ret; + } + +@@ -281,7 +281,7 @@ static int sdram_find(struct udevice *dev) + dm_pci_read_config32(dev, 0xa0, &val); + tom |= val; + +- debug("TOUUD %llx TOLUD %08x TOM %llx\n", touud, tolud, tom); ++printf("TOUUD %llx TOLUD %08x TOM %llx\n", touud, tolud, tom); + + /* ME UMA needs excluding if total memory <4GB */ + dm_pci_read_config32(dev, 0x74, &val); +@@ -289,7 +289,7 @@ static int sdram_find(struct udevice *dev) + dm_pci_read_config32(dev, 0x70, &val); + me_base |= val; + +- debug("MEBASE %llx\n", me_base); ++printf("MEBASE %llx\n", me_base); + + /* TODO: Get rid of all this shifting by 10 bits */ + tomk = tolud >> 10; +@@ -300,17 +300,17 @@ static int sdram_find(struct udevice *dev) + tolud += uma_size << 10; + /* UMA starts at old TOLUD */ + uma_memory_base = tomk * 1024ULL; +- debug("ME UMA base %llx size %uM\n", me_base, uma_size >> 10); ++printf("ME UMA base %llx size %uM\n", me_base, uma_size >> 10); + } + + /* Graphics memory comes next */ + dm_pci_read_config16(dev, GGC, &ggc); + if (!(ggc & 2)) { +- debug("IGD decoded, subtracting "); ++printf("IGD decoded, subtracting "); + + /* Graphics memory */ + uma_size = ((ggc >> 3) & 0x1f) * 32 * 1024ULL; +- debug("%uM UMA", uma_size >> 10); ++printf("%uM UMA", uma_size >> 10); + tomk -= uma_size; + uma_memory_base = tomk * 1024ULL; + +@@ -318,7 +318,7 @@ static int sdram_find(struct udevice *dev) + uma_size = ((ggc >> 8) & 0x3) * 1024ULL; + tomk -= uma_size; + uma_memory_base = tomk * 1024ULL; +- debug(" and %uM GTT\n", uma_size >> 10); ++printf(" and %uM GTT\n", uma_size >> 10); + } + + /* Calculate TSEG size from its base which must be below GTT */ +@@ -326,9 +326,9 @@ static int sdram_find(struct udevice *dev) + uma_size = (uma_memory_base - tseg_base) >> 10; + tomk -= uma_size; + uma_memory_base = tomk * 1024ULL; +- debug("TSEG base 0x%08x size %uM\n", tseg_base, uma_size >> 10); ++printf("TSEG base 0x%08x size %uM\n", tseg_base, uma_size >> 10); + +- debug("Available memory below 4GB: %lluM\n", tomk >> 10); ++printf("Available memory below 4GB: %lluM\n", tomk >> 10); + + /* Report the memory regions */ + mrc_add_memory_area(info, 1 << 20, 2 << 28); +@@ -349,7 +349,7 @@ static int sdram_find(struct udevice *dev) + * is remapped above TOM, TOUUD will account for both + */ + if (touud > (1ULL << 32ULL)) { +- debug("Available memory above 4GB: %lluM\n", ++printf("Available memory above 4GB: %lluM\n", + (touud >> 20) - 4096); + } + +@@ -463,29 +463,29 @@ int dram_init(void) + /* We need the pinctrl set up early */ + ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev); + if (ret) { +- debug("%s: Could not get pinconf (ret=%d)\n", __func__, ret); ++printf("%s: Could not get pinconf (ret=%d)\n", __func__, ret); + return ret; + } + + ret = uclass_first_device_err(UCLASS_NORTHBRIDGE, &dev); + if (ret) { +- debug("%s: Could not get northbridge (ret=%d)\n", __func__, ++printf("%s: Could not get northbridge (ret=%d)\n", __func__, + ret); + return ret; + } + ret = syscon_get_by_driver_data(X86_SYSCON_ME, &me_dev); + if (ret) { +- debug("%s: Could not get ME (ret=%d)\n", __func__, ret); ++printf("%s: Could not get ME (ret=%d)\n", __func__, ret); + return ret; + } + ret = copy_spd(dev, pei_data); + if (ret) { +- debug("%s: Could not get SPD (ret=%d)\n", __func__, ret); ++printf("%s: Could not get SPD (ret=%d)\n", __func__, ret); + return ret; + } + pei_data->boot_mode = gd->arch.pei_boot_mode; +- debug("Boot mode %d\n", gd->arch.pei_boot_mode); +- debug("mrc_input %p\n", pei_data->mrc_input); ++printf("Boot mode %d\n", gd->arch.pei_boot_mode); ++printf("mrc_input %p\n", pei_data->mrc_input); + + /* + * Do not pass MRC data in for recovery mode boot, +@@ -495,12 +495,12 @@ int dram_init(void) + pei_data->boot_mode == PEI_BOOT_RESUME) { + ret = prepare_mrc_cache(pei_data); + if (ret) +- debug("prepare_mrc_cache failed: %d\n", ret); ++printf("prepare_mrc_cache failed: %d\n", ret); + } + + /* If MRC data is not found we cannot continue S3 resume. */ + if (pei_data->boot_mode == PEI_BOOT_RESUME && !pei_data->mrc_input) { +- debug("Giving up in sdram_initialize: No MRC data\n"); ++printf("Giving up in sdram_initialize: No MRC data\n"); + sysreset_walk_halt(SYSRESET_COLD); + } + +@@ -510,29 +510,29 @@ int dram_init(void) + /* Wait for ME to be ready */ + ret = intel_early_me_init(me_dev); + if (ret) { +- debug("%s: Could not init ME (ret=%d)\n", __func__, ret); ++printf("%s: Could not init ME (ret=%d)\n", __func__, ret); + return ret; + } + ret = intel_early_me_uma_size(me_dev); + if (ret < 0) { +- debug("%s: Could not get UMA size (ret=%d)\n", __func__, ret); ++printf("%s: Could not get UMA size (ret=%d)\n", __func__, ret); + return ret; + } + + ret = mrc_common_init(dev, pei_data, false); + if (ret) { +- debug("%s: mrc_common_init() failed (ret=%d)\n", __func__, ret); ++printf("%s: mrc_common_init() failed (ret=%d)\n", __func__, ret); + return ret; + } + + ret = sdram_find(dev); + if (ret) { +- debug("%s: sdram_find() failed (ret=%d)\n", __func__, ret); ++printf("%s: sdram_find() failed (ret=%d)\n", __func__, ret); + return ret; + } + gd->ram_size = gd->arch.meminfo.total_32bit_memory; + +- debug("MRC output data length %#x at %p\n", pei_data->mrc_output_len, ++printf("MRC output data length %#x at %p\n", pei_data->mrc_output_len, + pei_data->mrc_output); + + post_system_agent_init(dev, me_dev, pei_data); +@@ -550,7 +550,7 @@ int dram_init(void) + mrc->len = pei_data->mrc_output_len; + ret = write_seeds_to_cmos(pei_data); + if (ret) +- debug("Failed to write seeds to CMOS: %d\n", ret); ++printf("Failed to write seeds to CMOS: %d\n", ret); + } + + writew(0xCAFE, MCHBAR_REG(SSKPD)); +diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c +index c0691454f..98f9bafd9 100644 +--- a/arch/x86/cpu/lapic.c ++++ b/arch/x86/cpu/lapic.c +@@ -125,7 +125,7 @@ int lapic_remote_read(int apicid, int reg, unsigned long *pvalue) + void lapic_setup(void) + { + /* Only Pentium Pro and later have those MSR stuff */ +- debug("Setting up local apic: "); ++printf("Setting up local apic: "); + + /* Enable the local apic */ + enable_lapic(); +@@ -152,8 +152,8 @@ void lapic_setup(void) + (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING | + LAPIC_DELIVERY_MODE_NMI)); + +- debug("apic_id: 0x%02lx, ", lapicid()); ++printf("apic_id: 0x%02lx, ", lapicid()); + +- debug("done.\n"); ++printf("done.\n"); + post_code(POST_LAPIC); + } +diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c +index c09762aee..840888e82 100644 +--- a/arch/x86/cpu/mp_init.c ++++ b/arch/x86/cpu/mp_init.c +@@ -249,11 +249,11 @@ static void ap_init(unsigned int cpu_index) + apic_id = lapicid(); + ret = find_cpu_by_apic_id(apic_id, &dev); + if (ret) { +- debug("Unknown CPU apic_id %x\n", apic_id); ++printf("Unknown CPU apic_id %x\n", apic_id); + goto done; + } + +- debug("AP: slot %d apic_id %x, dev %s\n", cpu_index, apic_id, ++printf("AP: slot %d apic_id %x, dev %s\n", cpu_index, apic_id, + dev ? dev->name : "(apic_id not found)"); + + /* +@@ -334,7 +334,7 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus) + + /* Copy in the code */ + code_len = ap_start16_code_end - ap_start16; +- debug("Copying SIPI code to %x: %d bytes\n", AP_DEFAULT_BASE, ++printf("Copying SIPI code to %x: %d bytes\n", AP_DEFAULT_BASE, + code_len); + memcpy((void *)AP_DEFAULT_BASE, ap_start16, code_len); + +@@ -343,10 +343,10 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus) + params16->ap_start = (uint32_t)ap_start; + params16->gdt = (uint32_t)gd->arch.gdt; + params16->gdt_limit = X86_GDT_SIZE - 1; +- debug("gdt = %x, gdt_limit = %x\n", params16->gdt, params16->gdt_limit); ++printf("gdt = %x, gdt_limit = %x\n", params16->gdt, params16->gdt_limit); + + params = (struct sipi_params *)sipi_params; +- debug("SIPI 32-bit params at %p\n", params); ++printf("SIPI 32-bit params at %p\n", params); + params->idt_ptr = (uint32_t)x86_get_idt(); + + params->stack_size = CONFIG_AP_STACK_SIZE; +@@ -358,7 +358,7 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus) + #if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) && \ + !defined(CONFIG_INTEL_MID) + params->microcode_ptr = ucode_base; +- debug("Microcode at %x\n", params->microcode_ptr); ++printf("Microcode at %x\n", params->microcode_ptr); + #endif + params->msr_table_ptr = (u32)msr_save; + ret = save_bsp_msrs(msr_save, sizeof(msr_save)); +@@ -370,7 +370,7 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus) + + *ap_countp = ¶ms->ap_count; + atomic_set(*ap_countp, 0); +- debug("SIPI vector is ready\n"); ++printf("SIPI vector is ready\n"); + + return 0; + } +@@ -385,7 +385,7 @@ static int check_cpu_devices(int expected_cpus) + + ret = uclass_find_device(UCLASS_CPU, i, &dev); + if (ret) { +- debug("Cannot find CPU %d in device tree\n", i); ++printf("Cannot find CPU %d in device tree\n", i); + return ret; + } + } +@@ -401,16 +401,16 @@ static int apic_wait_timeout(int total_delay, const char *msg) + if (!(lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY)) + return 0; + +- debug("Waiting for %s...", msg); ++printf("Waiting for %s...", msg); + while (lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY) { + udelay(50); + total += 50; + if (total >= total_delay) { +- debug("timed out: aborting\n"); ++printf("timed out: aborting\n"); + return -ETIMEDOUT; + } + } +- debug("done\n"); ++printf("done\n"); + + return 0; + } +@@ -446,7 +446,7 @@ static int start_aps(int num_aps, atomic_t *ap_count) + return -ENOSPC; + } + +- debug("Attempting to start %d APs\n", num_aps); ++printf("Attempting to start %d APs\n", num_aps); + + if (apic_wait_timeout(1000, "ICR not to be busy")) + return -ETIMEDOUT; +@@ -455,7 +455,7 @@ static int start_aps(int num_aps, atomic_t *ap_count) + lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(0)); + lapic_write(LAPIC_ICR, LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT | + LAPIC_DM_INIT); +- debug("Waiting for 10ms after sending INIT\n"); ++printf("Waiting for 10ms after sending INIT\n"); + mdelay(10); + + /* Send 1st SIPI */ +@@ -483,7 +483,7 @@ static int start_aps(int num_aps, atomic_t *ap_count) + + /* Wait for CPUs to check in */ + if (wait_for_aps(ap_count, num_aps, 10000, 50)) { +- debug("Not all APs checked in: %d/%d\n", ++printf("Not all APs checked in: %d/%d\n", + atomic_read(ap_count), num_aps); + return -EIO; + } +@@ -517,7 +517,7 @@ static int bsp_do_flight_plan(struct udevice *cpu, struct mp_flight_plan *plan, + /* Wait for the APs to check in */ + if (wait_for_aps(&rec->cpus_entered, num_aps, + timeout_us, step_us)) { +- debug("MP record %d timeout\n", i); ++printf("MP record %d timeout\n", i); + ret = -ETIMEDOUT; + } + } +@@ -547,7 +547,7 @@ static int get_bsp(struct udevice **devp, int *cpu_countp) + int ret; + + cpu_get_name(processor_name); +- debug("CPU: %s\n", processor_name); ++printf("CPU: %s\n", processor_name); + + apic_id = lapicid(); + ret = find_cpu_by_apic_id(apic_id, &dev); +@@ -850,12 +850,12 @@ int mp_init(void) + + ret = get_bsp(&cpu, &num_cpus); + if (ret < 0) { +- debug("Cannot init boot CPU: err=%d\n", ret); ++printf("Cannot init boot CPU: err=%d\n", ret); + return ret; + } + + if (num_cpus < 2) +- debug("Warning: Only 1 CPU is detected\n"); ++printf("Warning: Only 1 CPU is detected\n"); + + ret = check_cpu_devices(num_cpus); + if (ret) +@@ -885,7 +885,7 @@ int mp_init(void) + ret = start_aps(num_aps, ap_count); + if (ret) { + mdelay(1000); +- debug("%d/%d eventually checked in?\n", atomic_read(ap_count), ++printf("%d/%d eventually checked in?\n", atomic_read(ap_count), + num_aps); + return ret; + } +@@ -893,7 +893,7 @@ int mp_init(void) + /* Walk the flight plan for the BSP */ + ret = bsp_do_flight_plan(cpu, &mp_info, num_aps); + if (ret) { +- debug("CPU init failed: err=%d\n", ret); ++printf("CPU init failed: err=%d\n", ret); + return ret; + } + gd->flags |= GD_FLG_SMP_READY; +diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c +index 166aff380..3ecb3dba2 100644 +--- a/arch/x86/cpu/mtrr.c ++++ b/arch/x86/cpu/mtrr.c +@@ -145,25 +145,25 @@ int mtrr_commit(bool do_caches) + int ret; + int i; + +- debug("%s: enabled=%d, count=%d\n", __func__, gd->arch.has_mtrr, ++printf("%s: enabled=%d, count=%d\n", __func__, gd->arch.has_mtrr, + gd->arch.mtrr_req_count); + if (!gd->arch.has_mtrr) + return -ENOSYS; + +- debug("open\n"); ++printf("open\n"); + mtrr_open(&state, do_caches); +- debug("open done\n"); ++printf("open done\n"); + qsort(req, gd->arch.mtrr_req_count, sizeof(*req), h_comp_mtrr); + for (i = 0; i < gd->arch.mtrr_req_count; i++, req++) + set_var_mtrr(i, req->type, req->start, req->size); + + /* Clear the ones that are unused */ +- debug("clear\n"); ++printf("clear\n"); + for (; i < mtrr_get_var_count(); i++) + wrmsrl(MTRR_PHYS_MASK_MSR(i), 0); +- debug("close\n"); ++printf("close\n"); + mtrr_close(&state, do_caches); +- debug("mtrr done\n"); ++printf("mtrr done\n"); + + if (gd->flags & GD_FLG_RELOC) { + ret = mtrr_copy_to_aps(); +@@ -179,7 +179,7 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size) + struct mtrr_request *req; + uint64_t mask; + +- debug("%s: count=%d\n", __func__, gd->arch.mtrr_req_count); ++printf("%s: count=%d\n", __func__, gd->arch.mtrr_req_count); + if (!gd->arch.has_mtrr) + return -ENOSYS; + +@@ -189,12 +189,12 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size) + req->type = type; + req->start = start; + req->size = size; +- debug("%d: type=%d, %08llx %08llx\n", gd->arch.mtrr_req_count - 1, ++printf("%d: type=%d, %08llx %08llx\n", gd->arch.mtrr_req_count - 1, + req->type, req->start, req->size); + mask = ~(req->size - 1); + mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; + mask |= MTRR_PHYS_MASK_VALID; +- debug(" %016llx %016llx\n", req->start | req->type, mask); ++printf(" %016llx %016llx\n", req->start | req->type, mask); + + return 0; + } +@@ -232,7 +232,7 @@ int mtrr_set_next_var(uint type, uint64_t start, uint64_t size) + return mtrr; + + set_var_mtrr(mtrr, type, start, size); +- debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); ++printf("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); + + return 0; + } +diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c +index d4f9290ca..654de49c6 100644 +--- a/arch/x86/cpu/pci.c ++++ b/arch/x86/cpu/pci.c +@@ -93,7 +93,7 @@ void pci_assign_irqs(int bus, int device, u8 irq[4]) + if (!line) + continue; + +- debug("Assigning IRQ %d to PCI device %d.%x.%d (INT%c)\n", ++printf("Assigning IRQ %d to PCI device %d.%x.%d (INT%c)\n", + line, bus, device, func, 'A' + pin - 1); + + pci_write_config8(bdf, PCI_INTERRUPT_LINE, line); +diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c +index 2287dce12..e6134ca18 100644 +--- a/arch/x86/cpu/quark/dram.c ++++ b/arch/x86/cpu/quark/dram.c +@@ -35,7 +35,7 @@ static __maybe_unused int prepare_mrc_cache(struct mrc_params *mrc_params) + if (!cache) + return -ENOENT; + +- debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__, ++printf("%s: mrc cache at %p, size %x checksum %04x\n", __func__, + cache->data, cache->data_size, cache->checksum); + + /* copy mrc cache to the mrc_params */ +@@ -52,7 +52,7 @@ static int mrc_configure_params(struct mrc_params *mrc_params) + + node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_QRK_MRC); + if (node < 0) { +- debug("%s: Cannot find MRC node\n", __func__); ++printf("%s: Cannot find MRC node\n", __func__); + return -EINVAL; + } + +@@ -111,13 +111,13 @@ static int mrc_configure_params(struct mrc_params *mrc_params) + mrc_params->params.rrd = fdtdec_get_int(blob, node, "dram-rrd", 0); + mrc_params->params.faw = fdtdec_get_int(blob, node, "dram-faw", 0); + +- debug("MRC dram_width %d\n", mrc_params->dram_width); +- debug("MRC rank_enables %d\n", mrc_params->rank_enables); +- debug("MRC ddr_speed %d\n", mrc_params->ddr_speed); +- debug("MRC flags: %s\n", ++printf("MRC dram_width %d\n", mrc_params->dram_width); ++printf("MRC rank_enables %d\n", mrc_params->rank_enables); ++printf("MRC ddr_speed %d\n", mrc_params->ddr_speed); ++printf("MRC flags: %s\n", + (mrc_params->scrambling_enables) ? "SCRAMBLE_EN" : ""); + +- debug("MRC density=%d tCL=%d tRAS=%d tWTR=%d tRRD=%d tFAW=%d\n", ++printf("MRC density=%d tCL=%d tRAS=%d tWTR=%d tRRD=%d tFAW=%d\n", + mrc_params->params.density, mrc_params->params.cl, + mrc_params->params.ras, mrc_params->params.wtr, + mrc_params->params.rrd, mrc_params->params.faw); +diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c +index d28b28089..47b384102 100644 +--- a/arch/x86/cpu/slimbootloader/serial.c ++++ b/arch/x86/cpu/slimbootloader/serial.c +@@ -26,10 +26,10 @@ static int slimbootloader_serial_of_to_plat(struct udevice *dev) + + data = hob_get_guid_hob_data(gd->arch.hob_list, NULL, &guid); + if (!data) { +- debug("failed to get serial port information\n"); ++printf("failed to get serial port information\n"); + return -ENOENT; + } +- debug("type:%d base=0x%08x baudrate=%d stride=%d clk=%d\n", ++printf("type:%d base=0x%08x baudrate=%d stride=%d clk=%d\n", + data->type, + data->base, + data->baud, +diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c +index ec5b87cfd..96d510c5a 100644 +--- a/arch/x86/cpu/slimbootloader/slimbootloader.c ++++ b/arch/x86/cpu/slimbootloader/slimbootloader.c +@@ -31,17 +31,17 @@ static void tsc_init(void) + panic("hob list not found!"); + + gd->arch.tsc_base = rdtsc(); +- debug("tsc_base=0x%llx\n", gd->arch.tsc_base); ++printf("tsc_base=0x%llx\n", gd->arch.tsc_base); + + data = hob_get_guid_hob_data(gd->arch.hob_list, NULL, &guid); + if (!data) { +- debug("performance info hob not found\n"); ++printf("performance info hob not found\n"); + return; + } + + /* frequency is in KHz, so to Hz */ + gd->arch.clock_rate = data->frequency * 1000; +- debug("freq=0x%lx\n", gd->arch.clock_rate); ++printf("freq=0x%lx\n", gd->arch.clock_rate); + } + + int arch_cpu_init(void) +diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c +index acf97e3af..db2acfae7 100644 +--- a/arch/x86/cpu/tangier/pinmux.c ++++ b/arch/x86/cpu/tangier/pinmux.c +@@ -113,7 +113,7 @@ static int mrfld_pinconfig_protected(unsigned int pin, u32 mask, u32 bits) + + v = (value & ~mask) | (bits & mask); + +- debug("scu: v: 0x%x p: 0x%x bits: %d, mask: %d bufcfg: 0x%p\n", ++printf("scu: v: 0x%x p: 0x%x bits: %d, mask: %d bufcfg: 0x%p\n", + v, (u32)bufcfg, bits, mask, bufcfg); + + ret = scu_ipc_raw_command(IPCMSG_INDIRECT_WRITE, 0, &v, 4, +diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c +index afb08476e..94e9c6bab 100644 +--- a/arch/x86/cpu/tangier/sdram.c ++++ b/arch/x86/cpu/tangier/sdram.c +@@ -186,7 +186,7 @@ static phys_size_t sfi_get_ram_size(void) + ram += mentry->pages << 12; + } + +- debug("sfi: RAM size %llu\n", ram); ++printf("sfi: RAM size %llu\n", ram); + return ram; + } + +diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c +index e2c84cdde..883b40e8c 100644 +--- a/arch/x86/cpu/turbo.c ++++ b/arch/x86/cpu/turbo.c +@@ -81,7 +81,7 @@ int turbo_get_state(void) + + set_global_turbo_state(turbo_state); + #ifndef CONFIG_TPL_BUILD +- debug("Turbo is %s\n", turbo_state_desc[turbo_state]); ++printf("Turbo is %s\n", turbo_state_desc[turbo_state]); + #endif + return turbo_state; + } +@@ -99,6 +99,6 @@ void turbo_enable(void) + + /* Update cached turbo state */ + set_global_turbo_state(TURBO_ENABLED); +- debug("Turbo has been enabled\n"); ++printf("Turbo has been enabled\n"); + } + } +diff --git a/arch/x86/lib/acpi.c b/arch/x86/lib/acpi.c +index 155fffabf..7892543a8 100644 +--- a/arch/x86/lib/acpi.c ++++ b/arch/x86/lib/acpi.c +@@ -14,16 +14,16 @@ static struct acpi_rsdp *acpi_valid_rsdp(struct acpi_rsdp *rsdp) + if (strncmp((char *)rsdp, RSDP_SIG, sizeof(RSDP_SIG) - 1) != 0) + return NULL; + +- debug("Looking on %p for valid checksum\n", rsdp); ++printf("Looking on %p for valid checksum\n", rsdp); + + if (table_compute_checksum((void *)rsdp, 20) != 0) + return NULL; +- debug("acpi rsdp checksum 1 passed\n"); ++printf("acpi rsdp checksum 1 passed\n"); + + if ((rsdp->revision > 1) && + (table_compute_checksum((void *)rsdp, rsdp->length) != 0)) + return NULL; +- debug("acpi rsdp checksum 2 passed\n"); ++printf("acpi rsdp checksum 2 passed\n"); + + return rsdp; + } +@@ -46,11 +46,11 @@ struct acpi_fadt *acpi_find_fadt(void) + if (!rsdp) + return NULL; + +- debug("RSDP found at %p\n", rsdp); ++printf("RSDP found at %p\n", rsdp); + rsdt = (struct acpi_rsdt *)(uintptr_t)rsdp->rsdt_address; + + end = (char *)rsdt + rsdt->header.length; +- debug("RSDT found at %p ends at %p\n", rsdt, end); ++printf("RSDT found at %p ends at %p\n", rsdt, end); + + for (i = 0; ((char *)&rsdt->entry[i]) < end; i++) { + fadt = (struct acpi_fadt *)(uintptr_t)rsdt->entry[i]; +@@ -62,7 +62,7 @@ struct acpi_fadt *acpi_find_fadt(void) + if (!fadt) + return NULL; + +- debug("FADT found at %p\n", fadt); ++printf("FADT found at %p\n", fadt); + return fadt; + } + +@@ -71,18 +71,18 @@ void *acpi_find_wakeup_vector(struct acpi_fadt *fadt) + struct acpi_facs *facs; + void *wake_vec; + +- debug("Trying to find the wakeup vector...\n"); ++printf("Trying to find the wakeup vector...\n"); + + facs = (struct acpi_facs *)(uintptr_t)fadt->firmware_ctrl; + + if (!facs) { +- debug("No FACS found, wake up from S3 not possible.\n"); ++printf("No FACS found, wake up from S3 not possible.\n"); + return NULL; + } + +- debug("FACS found at %p\n", facs); ++printf("FACS found at %p\n", facs); + wake_vec = (void *)(uintptr_t)facs->firmware_waking_vector; +- debug("OS waking vector is %p\n", wake_vec); ++printf("OS waking vector is %p\n", wake_vec); + + return wake_vec; + } +diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c +index 5ec31301d..fb0b257cc 100644 +--- a/arch/x86/lib/acpi_table.c ++++ b/arch/x86/lib/acpi_table.c +@@ -418,7 +418,7 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) + break; + } + +- debug("UART type %u @ %lx\n", spcr->interface_type, serial_address); ++printf("UART type %u @ %lx\n", spcr->interface_type, serial_address); + + /* Fill GAS */ + spcr->serial_port.space_id = space_id; +@@ -530,18 +530,18 @@ ulong write_acpi_tables(ulong start_addr) + + start = map_sysmem(start_addr, 0); + +- debug("ACPI: Writing ACPI tables at %lx\n", start_addr); ++printf("ACPI: Writing ACPI tables at %lx\n", start_addr); + + acpi_reset_items(); + acpi_setup_base_tables(ctx, start); + +- debug("ACPI: * FACS\n"); ++printf("ACPI: * FACS\n"); + facs = ctx->current; + acpi_inc_align(ctx, sizeof(struct acpi_facs)); + + acpi_create_facs(facs); + +- debug("ACPI: * DSDT\n"); ++printf("ACPI: * DSDT\n"); + dsdt = ctx->current; + + /* Put the table header first */ +@@ -575,7 +575,7 @@ ulong write_acpi_tables(ulong start_addr) + + if (*gnvs == ACPI_GNVS_ADDR) { + *gnvs = map_to_sysmem(ctx->current); +- debug("Fix up global NVS in DSDT to %#08x\n", ++printf("Fix up global NVS in DSDT to %#08x\n", + *gnvs); + break; + } +@@ -610,18 +610,18 @@ ulong write_acpi_tables(ulong start_addr) + + acpi_inc_align(ctx, sizeof(struct acpi_global_nvs)); + +- debug("ACPI: * FADT\n"); ++printf("ACPI: * FADT\n"); + fadt = ctx->current; + acpi_inc_align(ctx, sizeof(struct acpi_fadt)); + acpi_create_fadt(fadt, facs, dsdt); + acpi_add_table(ctx, fadt); + +- debug("ACPI: * SSDT\n"); ++printf("ACPI: * SSDT\n"); + ssdt = (struct acpi_table_header *)ctx->current; + if (!acpi_create_ssdt(ctx, ssdt, OEM_TABLE_ID)) + acpi_add_table(ctx, ssdt); + +- debug("ACPI: * MCFG\n"); ++printf("ACPI: * MCFG\n"); + mcfg = ctx->current; + acpi_create_mcfg(mcfg); + acpi_inc_align(ctx, mcfg->header.length); +@@ -630,7 +630,7 @@ ulong write_acpi_tables(ulong start_addr) + if (IS_ENABLED(CONFIG_TPM_V2)) { + struct acpi_tpm2 *tpm2; + +- debug("ACPI: * TPM2\n"); ++printf("ACPI: * TPM2\n"); + tpm2 = (struct acpi_tpm2 *)ctx->current; + ret = acpi_create_tpm2(tpm2); + if (!ret) { +@@ -641,14 +641,14 @@ ulong write_acpi_tables(ulong start_addr) + } + } + +- debug("ACPI: * MADT\n"); ++printf("ACPI: * MADT\n"); + madt = ctx->current; + acpi_create_madt(madt); + acpi_inc_align(ctx, madt->header.length); + acpi_add_table(ctx, madt); + + if (IS_ENABLED(CONFIG_TPM_V1)) { +- debug("ACPI: * TCPA\n"); ++printf("ACPI: * TCPA\n"); + tcpa = (struct acpi_tcpa *)ctx->current; + ret = acpi_create_tcpa(tcpa); + if (ret) { +@@ -660,14 +660,14 @@ ulong write_acpi_tables(ulong start_addr) + } + } + +- debug("ACPI: * CSRT\n"); ++printf("ACPI: * CSRT\n"); + csrt = ctx->current; + if (!acpi_create_csrt(csrt)) { + acpi_inc_align(ctx, csrt->header.length); + acpi_add_table(ctx, csrt); + } + +- debug("ACPI: * SPCR\n"); ++printf("ACPI: * SPCR\n"); + spcr = ctx->current; + acpi_create_spcr(spcr); + acpi_inc_align(ctx, spcr->header.length); +@@ -676,10 +676,10 @@ ulong write_acpi_tables(ulong start_addr) + acpi_write_dev_tables(ctx); + + addr = map_to_sysmem(ctx->current); +- debug("current = %lx\n", addr); ++printf("current = %lx\n", addr); + + acpi_rsdp_addr = (unsigned long)ctx->rsdp; +- debug("ACPI: done\n"); ++printf("ACPI: done\n"); + + return addr; + } +diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c +index fbdc3b04e..cd34b589b 100644 +--- a/arch/x86/lib/bios.c ++++ b/arch/x86/lib/bios.c +@@ -40,7 +40,7 @@ static void setup_realmode_code(void) + realmode_call = PTR_TO_REAL_MODE(asm_realmode_call); + realmode_interrupt = PTR_TO_REAL_MODE(__realmode_interrupt); + +- debug("Real mode stub @%x: %d bytes\n", REALMODE_BASE, ++printf("Real mode stub @%x: %d bytes\n", REALMODE_BASE, + asm_realmode_code_size); + } + +@@ -76,7 +76,7 @@ static int int_exception_handler(void) + }; + struct eregs *regs = ®_info; + +- debug("Oops, exception %d while executing option rom\n", regs->vector); ++printf("Oops, exception %d while executing option rom\n", regs->vector); + cpu_hlt(); + + return 0; +@@ -84,7 +84,7 @@ static int int_exception_handler(void) + + static int int_unknown_handler(void) + { +- debug("Unsupported software interrupt #0x%x eax 0x%x\n", ++printf("Unsupported software interrupt #0x%x eax 0x%x\n", + M.x86.intno, M.x86.R_EAX); + + return -1; +@@ -194,7 +194,7 @@ static u8 vbe_get_mode_info(struct vbe_mode_info *mi) + u16 buffer_adr; + char *buffer; + +- debug("VBE: Getting information about VESA mode %04x\n", ++printf("VBE: Getting information about VESA mode %04x\n", + mi->video_mode); + buffer = PTR_TO_REAL_MODE(asm_realmode_buffer); + buffer_seg = (((unsigned long)buffer) >> 4) & 0xff00; +@@ -212,7 +212,7 @@ static u8 vbe_set_mode(struct vbe_mode_info *mi) + { + int video_mode = mi->video_mode; + +- debug("VBE: Setting VESA mode %#04x\n", video_mode); ++printf("VBE: Setting VESA mode %#04x\n", video_mode); + /* request linear framebuffer mode */ + video_mode |= (1 << 14); + /* don't clear the framebuffer, we do that later */ +@@ -231,13 +231,13 @@ static void vbe_set_graphics(int vesa_mode, struct vbe_mode_info *mode_info) + vbe_get_mode_info(mode_info); + + framebuffer = (unsigned char *)(ulong)mode_info->vesa.phys_base_ptr; +- debug("VBE: resolution: %dx%d@%d\n", ++printf("VBE: resolution: %dx%d@%d\n", + le16_to_cpu(mode_info->vesa.x_resolution), + le16_to_cpu(mode_info->vesa.y_resolution), + mode_info->vesa.bits_per_pixel); +- debug("VBE: framebuffer: %p\n", framebuffer); ++printf("VBE: framebuffer: %p\n", framebuffer); + if (!framebuffer) { +- debug("VBE: Mode does not support linear framebuffer\n"); ++printf("VBE: Mode does not support linear framebuffer\n"); + return; + } + +@@ -270,12 +270,12 @@ void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode, + /* Make sure the code is placed. */ + setup_realmode_code(); + +- debug("Calling Option ROM at %lx, pci device %#x...", addr, num_dev); ++printf("Calling Option ROM at %lx, pci device %#x...", addr, num_dev); + + /* Option ROM entry point is at OPROM start + 3 */ + realmode_call(addr + 0x0003, num_dev, 0xffff, 0x0000, 0xffff, 0x0, + 0x0); +- debug("done\n"); ++printf("done\n"); + + #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE + if (vesa_mode != -1) +@@ -298,14 +298,14 @@ asmlinkage int interrupt_handler(u32 intnumber, u32 gsfs, u32 dses, + flags = stackflags; + + #ifdef CONFIG_REALMODE_DEBUG +- debug("oprom: INT# 0x%x\n", intnumber); +- debug("oprom: eax: %08x ebx: %08x ecx: %08x edx: %08x\n", ++printf("oprom: INT# 0x%x\n", intnumber); ++printf("oprom: eax: %08x ebx: %08x ecx: %08x edx: %08x\n", + eax, ebx, ecx, edx); +- debug("oprom: ebp: %08x esp: %08x edi: %08x esi: %08x\n", ++printf("oprom: ebp: %08x esp: %08x edi: %08x esi: %08x\n", + ebp, esp, edi, esi); +- debug("oprom: ip: %04x cs: %04x flags: %08x\n", ++printf("oprom: ip: %04x cs: %04x flags: %08x\n", + ip, cs, flags); +- debug("oprom: stackflags = %04x\n", stackflags); ++printf("oprom: stackflags = %04x\n", stackflags); + #endif + + /* +@@ -348,7 +348,7 @@ asmlinkage int interrupt_handler(u32 intnumber, u32 gsfs, u32 dses, + if (ret) { + flags &= ~1; /* no error: clear carry */ + } else { +- debug("int%02x call returned error\n", intnumber); ++printf("int%02x call returned error\n", intnumber); + flags |= 1; /* error: set carry */ + } + *(volatile u16 *)&stackflags = flags; +diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c +index d6b4da7e2..1d0e91322 100644 +--- a/arch/x86/lib/bios_interrupts.c ++++ b/arch/x86/lib/bios_interrupts.c +@@ -33,7 +33,7 @@ int int10_handler(void) + case 0x02: /* Set cursor position */ + if (cursor_row != ((M.x86.R_EDX >> 8) & 0xff) || + cursor_col >= (M.x86.R_EDX & 0xff)) { +- debug("\n"); ++printf("\n"); + } + cursor_row = (M.x86.R_EDX >> 8) & 0xff; + cursor_col = M.x86.R_EDX & 0xff; +@@ -46,7 +46,7 @@ int int10_handler(void) + res = 1; + break; + case 0x06: /* Scroll up */ +- debug("\n"); ++printf("\n"); + res = 1; + break; + case 0x08: /* Get Character and Mode at Cursor Position */ +@@ -55,7 +55,7 @@ int int10_handler(void) + break; + case 0x09: /* Write Character and attribute */ + case 0x0e: /* Write Character */ +- debug("%c", M.x86.R_EAX & 0xff); ++printf("%c", M.x86.R_EAX & 0xff); + res = 1; + break; + case 0x0f: /* Get video mode */ +@@ -147,7 +147,7 @@ int int1a_handler(void) + */ + busdevfn = (PCI_BUS(bdf) << 8) | PCI_DEV(bdf) << 3 | + PCI_FUNC(bdf); +- debug("0x%x: return 0x%x\n", func, busdevfn); ++printf("0x%x: return 0x%x\n", func, busdevfn); + M.x86.R_EBX = busdevfn; + retval = 1; + } else { +@@ -169,7 +169,7 @@ int int1a_handler(void) + + ret = dm_pci_bus_find_bdf(bdf, &dev); + if (ret) { +- debug("%s: Device %x not found\n", __func__, bdf); ++printf("%s: Device %x not found\n", __func__, bdf); + break; + } + +@@ -200,7 +200,7 @@ int int1a_handler(void) + break; + } + #ifdef CONFIG_REALMODE_DEBUG +- debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n", func, ++printf("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n", func, + bus, devfn, reg, M.x86.R_ECX); + #endif + M.x86.R_EAX &= 0xffff00ff; /* Clear AH */ +diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c +index 733dd7125..b9cd75813 100644 +--- a/arch/x86/lib/bootm.c ++++ b/arch/x86/lib/bootm.c +@@ -80,7 +80,7 @@ static int boot_prep_linux(bootm_headers_t *images) + + #ifdef CONFIG_OF_LIBFDT + if (images->ft_len) { +- debug("using: FDT\n"); ++printf("using: FDT\n"); + if (image_setup_linux(images)) { + puts("FDT creation failed! hanging..."); + hang(); +@@ -201,7 +201,7 @@ int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit) + /* Subcommand: GO */ + static int boot_jump_linux(bootm_headers_t *images) + { +- debug("## Transferring control to Linux (at address %08lx, kernel %08lx) ...\n", ++printf("## Transferring control to Linux (at address %08lx, kernel %08lx) ...\n", + images->ep, images->os.load); + + return boot_linux_kernel(images->ep, images->os.load, +diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c +index 6365b0a50..85a02daf5 100644 +--- a/arch/x86/lib/fsp/fsp_common.c ++++ b/arch/x86/lib/fsp/fsp_common.c +@@ -38,12 +38,12 @@ int fsp_init_phase_pci(void) + u32 status; + + /* call into FspNotify */ +- debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); ++printf("Calling into FSP (notify phase INIT_PHASE_PCI): "); + status = fsp_notify(NULL, INIT_PHASE_PCI); + if (status) +- debug("fail, error code %x\n", status); ++printf("fail, error code %x\n", status); + else +- debug("OK\n"); ++printf("OK\n"); + + return status ? -EPERM : 0; + } +@@ -53,12 +53,12 @@ void board_final_init(void) + u32 status; + + /* call into FspNotify */ +- debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); ++printf("Calling into FSP (notify phase INIT_PHASE_BOOT): "); + status = fsp_notify(NULL, INIT_PHASE_BOOT); + if (status) +- debug("fail, error code %x\n", status); ++printf("fail, error code %x\n", status); + else +- debug("OK\n"); ++printf("OK\n"); + } + + void board_final_cleanup(void) +@@ -69,12 +69,12 @@ void board_final_cleanup(void) + return; + + /* call into FspNotify */ +- debug("Calling into FSP (notify phase INIT_PHASE_END_FIRMWARE): "); ++printf("Calling into FSP (notify phase INIT_PHASE_END_FIRMWARE): "); + status = fsp_notify(NULL, INIT_PHASE_END_FIRMWARE); + if (status) +- debug("fail, error code %x\n", status); ++printf("fail, error code %x\n", status); + else +- debug("OK\n"); ++printf("OK\n"); + } + + int fsp_save_s3_stack(void) +@@ -87,14 +87,14 @@ int fsp_save_s3_stack(void) + + ret = uclass_get_device(UCLASS_RTC, 0, &dev); + if (ret) { +- debug("Cannot find RTC: err=%d\n", ret); ++printf("Cannot find RTC: err=%d\n", ret); + return -ENODEV; + } + + /* Save the stack address to CMOS */ + ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp); + if (ret) { +- debug("Save stack address to CMOS: err=%d\n", ret); ++printf("Save stack address to CMOS: err=%d\n", ret); + return -EIO; + } + +diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c +index 02fd05c9f..c20538ff2 100644 +--- a/arch/x86/lib/fsp/fsp_graphics.c ++++ b/arch/x86/lib/fsp/fsp_graphics.c +@@ -51,7 +51,7 @@ static int save_vesa_mode(struct vesa_mode_info *vesa) + * interface (eg: HDMI) on the board. + */ + if (!ginfo) { +- debug("FSP graphics hand-off block not found\n"); ++printf("FSP graphics hand-off block not found\n"); + return -ENXIO; + } + +@@ -62,7 +62,7 @@ static int save_vesa_mode(struct vesa_mode_info *vesa) + vesa->phys_base_ptr = ginfo->fb_base; + + if (ginfo->pixel_format >= pixel_bitmask) { +- debug("FSP set unknown framebuffer format: %d\n", ++printf("FSP set unknown framebuffer format: %d\n", + ginfo->pixel_format); + return -EINVAL; + } +diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c +index fd4d98ef6..ed3f3af65 100644 +--- a/arch/x86/lib/fsp/fsp_support.c ++++ b/arch/x86/lib/fsp/fsp_support.c +@@ -63,7 +63,7 @@ u32 fsp_get_usable_lowmem_top(const void *hob_list) + * otherwise the subsequent call to fsp_notify() will fail. + */ + if (top > (u32)hob_list) { +- debug("Adjust memory top address due to a buggy FSP\n"); ++printf("Adjust memory top address due to a buggy FSP\n"); + top = (u32)mem_base; + } + #endif +diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c +index 209261718..a4382ceb2 100644 +--- a/arch/x86/lib/fsp1/fsp_common.c ++++ b/arch/x86/lib/fsp1/fsp_common.c +@@ -36,7 +36,7 @@ static void *fsp_prepare_mrc_cache(void) + if (!cache) + return NULL; + +- debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__, ++printf("%s: mrc cache at %p, size %x checksum %04x\n", __func__, + cache->data, cache->data_size, cache->checksum); + + return cache->data; +@@ -64,12 +64,12 @@ int arch_fsp_init(void) + prev_sleep_state == ACPI_S3) { + if (nvs == NULL) { + /* If waking from S3 and no cache then */ +- debug("No MRC cache found in S3 resume path\n"); ++printf("No MRC cache found in S3 resume path\n"); + post_code(POST_RESUME_FAILURE); + /* Clear Sleep Type */ + chipset_clear_sleep_state(); + /* Reboot */ +- debug("Rebooting..\n"); ++printf("Rebooting..\n"); + outb(SYS_RST | RST_CPU, IO_PORT_RESET); + /* Should not reach here.. */ + panic("Reboot System"); +diff --git a/arch/x86/lib/fsp2/fsp_meminit.c b/arch/x86/lib/fsp2/fsp_meminit.c +index 022e2cb64..86d86eaa8 100644 +--- a/arch/x86/lib/fsp2/fsp_meminit.c ++++ b/arch/x86/lib/fsp2/fsp_meminit.c +@@ -72,7 +72,7 @@ int fsp_memory_init(bool s3wake, bool use_spi_flash) + ret = fsp_locate_fsp(FSP_M, &entry, use_spi_flash, &dev, &hdr, NULL); + if (ret) + return log_msg_ret("locate FSP", ret); +- debug("Found FSP_M at %x, size %x\n", hdr->img_base, hdr->img_size); ++printf("Found FSP_M at %x, size %x\n", hdr->img_base, hdr->img_size); + + /* Copy over the default config */ + fsp_upd = (struct fspm_upd *)(hdr->img_base + hdr->cfg_region_off); +diff --git a/arch/x86/lib/i8259.c b/arch/x86/lib/i8259.c +index a0e3c0925..efa80c593 100644 +--- a/arch/x86/lib/i8259.c ++++ b/arch/x86/lib/i8259.c +@@ -116,14 +116,14 @@ void configure_irq_trigger(int int_num, bool is_level_triggered) + { + u16 int_bits = inb(ELCR1) | (((u16)inb(ELCR2)) << 8); + +- debug("%s: current interrupts are 0x%x\n", __func__, int_bits); ++printf("%s: current interrupts are 0x%x\n", __func__, int_bits); + if (is_level_triggered) + int_bits |= (1 << int_num); + else + int_bits &= ~(1 << int_num); + + /* Write new values */ +- debug("%s: try to set interrupts 0x%x\n", __func__, int_bits); ++printf("%s: try to set interrupts 0x%x\n", __func__, int_bits); + outb((u8)(int_bits & 0xff), ELCR1); + outb((u8)(int_bits >> 8), ELCR2); + } +diff --git a/arch/x86/lib/mpspec.c b/arch/x86/lib/mpspec.c +index 8e97d9ff3..a44bb4b31 100644 +--- a/arch/x86/lib/mpspec.c ++++ b/arch/x86/lib/mpspec.c +@@ -227,7 +227,7 @@ u32 mptable_finalize(struct mp_config_table *mc) + mc->mpc_checksum = table_compute_checksum(mc, mc->mpc_length); + end = mp_next_mpe_entry(mc); + +- debug("Write the MP table at: %lx - %lx\n", (ulong)mc, end); ++printf("Write the MP table at: %lx - %lx\n", (ulong)mc, end); + + return end; + } +@@ -300,7 +300,7 @@ static int mptable_add_intsrc(struct mp_config_table *mc, + + ret = uclass_first_device_err(UCLASS_IRQ, &dev); + if (ret && ret != -ENODEV) { +- debug("%s: Cannot find irq router node\n", __func__); ++printf("%s: Cannot find irq router node\n", __func__); + return ret; + } + +@@ -331,7 +331,7 @@ static int mptable_add_intsrc(struct mp_config_table *mc, + + if (check_dup_entry(intsrc_base, intsrc_entries, + bus, dev, pr.pin)) { +- debug("found entry for bus %d device %d INT%c, skipping\n", ++printf("found entry for bus %d device %d INT%c, skipping\n", + bus, dev, 'A' + pr.pin - 1); + cell += sizeof(struct pirq_routing) / sizeof(u32); + continue; +@@ -351,7 +351,7 @@ static int mptable_add_intsrc(struct mp_config_table *mc, + } + + /* Legacy Interrupts */ +- debug("Writing ISA IRQs\n"); ++printf("Writing ISA IRQs\n"); + mptable_add_isa_interrupts(mc, bus_isa, apicid, 0); + + return 0; +@@ -398,7 +398,7 @@ ulong write_mp_table(ulong addr) + /* Write I/O interrupt assignment entry */ + ret = mptable_add_intsrc(mc, bus_isa, ioapic_id); + if (ret) +- debug("Failed to write I/O interrupt assignment table\n"); ++printf("Failed to write I/O interrupt assignment table\n"); + + /* Write local interrupt assignment entry */ + mptable_add_lintsrc(mc, bus_isa); +diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c +index b52691568..1ad4c6f94 100644 +--- a/arch/x86/lib/mrccache.c ++++ b/arch/x86/lib/mrccache.c +@@ -66,7 +66,7 @@ struct mrc_data_container *mrccache_find_current(struct mrc_region *entry) + } + + if (id-- == 0) { +- debug("%s: No valid MRC cache found.\n", __func__); ++printf("%s: No valid MRC cache found.\n", __func__); + return NULL; + } + +@@ -77,7 +77,7 @@ struct mrc_data_container *mrccache_find_current(struct mrc_region *entry) + return NULL; + } + +- debug("%s: picked entry %u from cache block\n", __func__, id); ++printf("%s: picked entry %u from cache block\n", __func__, id); + + return cache; + } +@@ -112,9 +112,9 @@ static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry, + if ((ulong)cache + mrc_block_size(data_size) > end_addr) { + /* Crossed the boundary */ + cache = NULL; +- debug("%s: no available entries found\n", __func__); ++printf("%s: no available entries found\n", __func__); + } else { +- debug("%s: picked next entry from cache block at %p\n", ++printf("%s: picked next entry from cache block at %p\n", + __func__, cache); + } + +@@ -142,17 +142,17 @@ static int mrccache_update(struct udevice *sf, struct mrc_region *entry, + int ret; + + if (!is_mrc_cache(cur)) { +- debug("%s: Cache data not valid\n", __func__); ++printf("%s: Cache data not valid\n", __func__); + return -EINVAL; + } + + /* Find the last used block */ + base_addr = entry->base + entry->offset; +- debug("Updating MRC cache data\n"); ++printf("Updating MRC cache data\n"); + cache = mrccache_find_current(entry); + if (cache && (cache->data_size == cur->data_size) && + (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) { +- debug("MRC data in flash is up to date. No update\n"); ++printf("MRC data in flash is up to date. No update\n"); + return -EEXIST; + } + +@@ -165,12 +165,12 @@ static int mrccache_update(struct udevice *sf, struct mrc_region *entry, + * again at block 0. + */ + if (!cache) { +- debug("Erasing the MRC cache region of %x bytes at %x\n", ++printf("Erasing the MRC cache region of %x bytes at %x\n", + entry->length, entry->offset); + + ret = spi_flash_erase_dm(sf, entry->offset, entry->length); + if (ret) { +- debug("Failed to erase flash region\n"); ++printf("Failed to erase flash region\n"); + return ret; + } + cache = (struct mrc_data_container *)base_addr; +@@ -178,11 +178,11 @@ static int mrccache_update(struct udevice *sf, struct mrc_region *entry, + + /* Write the data out */ + offset = (ulong)cache - base_addr + entry->offset; +- debug("Write MRC cache update to flash at %lx\n", offset); ++printf("Write MRC cache update to flash at %lx\n", offset); + ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur), + cur); + if (ret) { +- debug("Failed to write to SPI flash\n"); ++printf("Failed to write to SPI flash\n"); + return log_msg_ret("Cannot update mrccache", ret); + } + +@@ -197,7 +197,7 @@ static void mrccache_setup(struct mrc_output *mrc, void *data) + cache->signature = MRC_DATA_SIGNATURE; + cache->data_size = mrc->len; + checksum = compute_ip_checksum(mrc->buf, cache->data_size); +- debug("Saving %d bytes for MRC output data, checksum %04x\n", ++printf("Saving %d bytes for MRC output data, checksum %04x\n", + cache->data_size, checksum); + cache->checksum = checksum; + cache->reserved = 0; +@@ -285,7 +285,7 @@ int mrccache_get_region(enum mrc_type_t type, struct udevice **devp, + + if (devp) + *devp = dev; +- debug("MRC cache type %d in '%s', offset %x, len %x, base %x\n", ++printf("MRC cache type %d in '%s', offset %x, len %x, base %x\n", + type, dev ? dev->name : ofnode_get_name(node), entry->offset, + entry->length, entry->base); + +@@ -315,9 +315,9 @@ static int mrccache_save_type(enum mrc_type_t type) + + ret = mrccache_update(sf, &entry, cache); + if (!ret) +- debug("Saved MRC data with checksum %04x\n", cache->checksum); ++printf("Saved MRC data with checksum %04x\n", cache->checksum); + else if (ret == -EEXIST) +- debug("MRC data is the same as last time, skipping save\n"); ++printf("MRC data is the same as last time, skipping save\n"); + + return 0; + } +diff --git a/arch/x86/lib/pinctrl_ich6.c b/arch/x86/lib/pinctrl_ich6.c +index fd5e311b2..8a3f5a528 100644 +--- a/arch/x86/lib/pinctrl_ich6.c ++++ b/arch/x86/lib/pinctrl_ich6.c +@@ -98,7 +98,7 @@ static int ich6_pinctrl_cfg_pin(s32 gpiobase, s32 iobase, int pin_node) + invert = fdtdec_get_bool(gd->fdt_blob, pin_node, "invert"); + if (invert) + setio_32(gpiobase + GPI_INV, 1 << gpio_offset[1]); +- debug("gpio %#x bit %d, is_gpio %d, dir %d, val %d, invert %d\n", ++printf("gpio %#x bit %d, is_gpio %d, dir %d, val %d, invert %d\n", + gpio_offset[0], gpio_offset[1], is_gpio, dir, val, + invert); + } +@@ -144,7 +144,7 @@ static int ich6_pinctrl_cfg_pin(s32 gpiobase, s32 iobase, int pin_node) + IOPAD_PULL_STRENGTH_MASK, + val << IOPAD_PULL_STRENGTH_SHIFT); + +- debug("%s: pad cfg [0x%x]: %08x\n", __func__, pad_offset, ++printf("%s: pad cfg [0x%x]: %08x\n", __func__, pad_offset, + readl(iobase_addr)); + } + +@@ -159,7 +159,7 @@ static int ich6_pinctrl_probe(struct udevice *dev) + u32 gpiobase; + u32 iobase = -1; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + ret = uclass_first_device(UCLASS_PCH, &pch); + if (ret) + return ret; +@@ -173,7 +173,7 @@ static int ich6_pinctrl_probe(struct udevice *dev) + */ + ret = pch_get_gpio_base(pch, &gpiobase); + if (ret) { +- debug("%s: invalid GPIOBASE address (%08x)\n", __func__, ++printf("%s: invalid GPIOBASE address (%08x)\n", __func__, + gpiobase); + return -EINVAL; + } +@@ -184,7 +184,7 @@ static int ich6_pinctrl_probe(struct udevice *dev) + */ + ret = pch_get_io_base(pch, &iobase); + if (ret && ret != -ENOSYS) { +- debug("%s: invalid IOBASE address (%08x)\n", __func__, iobase); ++printf("%s: invalid IOBASE address (%08x)\n", __func__, iobase); + return -EINVAL; + } + +@@ -194,12 +194,12 @@ static int ich6_pinctrl_probe(struct udevice *dev) + /* Configure the pin */ + ret = ich6_pinctrl_cfg_pin(gpiobase, iobase, pin_node); + if (ret != 0) { +- debug("%s: invalid configuration for the pin %d\n", ++printf("%s: invalid configuration for the pin %d\n", + __func__, pin_node); + return ret; + } + } +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + + return 0; + } +diff --git a/arch/x86/lib/pirq_routing.c b/arch/x86/lib/pirq_routing.c +index caeaec928..4752ecaf1 100644 +--- a/arch/x86/lib/pirq_routing.c ++++ b/arch/x86/lib/pirq_routing.c +@@ -65,7 +65,7 @@ void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num) + + /* Set PCI IRQs */ + for (i = 0; i < num; i++) { +- debug("PIRQ Entry %d Dev: %d.%x.%d\n", i, ++printf("PIRQ Entry %d Dev: %d.%x.%d\n", i, + irq->bus, irq->devfn >> 3, irq->devfn & 7); + + for (intx = 0; intx < MAX_INTX_ENTRIES; intx++) { +@@ -73,11 +73,11 @@ void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num) + int bitmap = irq->irq[intx].bitmap; + int irq = 0; + +- debug("INT%c link: %x bitmap: %x ", ++printf("INT%c link: %x bitmap: %x ", + 'A' + intx, link, bitmap); + + if (!bitmap || !link) { +- debug("not routed\n"); ++printf("not routed\n"); + irq_slot[intx] = irq; + continue; + } +@@ -94,7 +94,7 @@ void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num) + irq = pirq[link]; + } + +- debug("IRQ: %d\n", irq); ++printf("IRQ: %d\n", irq); + irq_slot[intx] = irq; + + /* Assign IRQ in the interrupt router */ +@@ -108,7 +108,7 @@ void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num) + } + + for (i = 0; i < CONFIG_MAX_PIRQ_LINKS; i++) +- debug("PIRQ%c: %d\n", 'A' + i, pirq[i]); ++printf("PIRQ%c: %d\n", 'A' + i, pirq[i]); + } + + u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt) +@@ -118,7 +118,7 @@ u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt) + /* Align the table to be 16 byte aligned */ + addr = ALIGN(addr, 16); + +- debug("Copying Interrupt Routing Table to 0x%x\n", addr); ++printf("Copying Interrupt Routing Table to 0x%x\n", addr); + memcpy((void *)(uintptr_t)addr, rt, rt->size); + + /* +diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c +index 6fe515164..5fc997d46 100644 +--- a/arch/x86/lib/relocate.c ++++ b/arch/x86/lib/relocate.c +@@ -80,13 +80,13 @@ static void do_elf_reloc_fixups64(unsigned int text_base, uintptr_t size, + *offset_ptr_ram = gd->reloc_off + + re_src->r_addend; + } else { +- debug(" %p: %lx: rom reloc %lx, ram %p, value %lx, limit %lX\n", ++printf(" %p: %lx: rom reloc %lx, ram %p, value %lx, limit %lX\n", + re_src, (ulong)re_src->r_info, + (ulong)re_src->r_offset, offset_ptr_ram, + (ulong)*offset_ptr_ram, text_base + size); + } + } else { +- debug(" %p: %lx: rom reloc %lx, last %p\n", re_src, ++printf(" %p: %lx: rom reloc %lx, last %p\n", re_src, + (ulong)re_src->r_info, (ulong)re_src->r_offset, + last_offset); + } +@@ -127,12 +127,12 @@ static void do_elf_reloc_fixups32(unsigned int text_base, uintptr_t size, + *offset_ptr_ram <= text_base + size) { + *offset_ptr_ram += gd->reloc_off; + } else { +- debug(" %p: rom reloc %x, ram %p, value %x, limit %lX\n", ++printf(" %p: rom reloc %x, ram %p, value %x, limit %lX\n", + re_src, re_src->r_offset, offset_ptr_ram, + *offset_ptr_ram, text_base + size); + } + } else { +- debug(" %p: rom reloc %x, last %p\n", re_src, ++printf(" %p: rom reloc %x, last %p\n", re_src, + re_src->r_offset, last_offset); + } + last_offset = offset_ptr_rom; +diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c +index b18c1cd60..b9b17e394 100644 +--- a/arch/x86/lib/spl.c ++++ b/arch/x86/lib/spl.c +@@ -41,7 +41,7 @@ static int set_max_freq(void) + * Burst Mode has been factory-configured as disabled and is not + * available in this physical processor package + */ +- debug("Burst Mode is factory-disabled\n"); ++printf("Burst Mode is factory-disabled\n"); + return -ENOENT; + } + +@@ -73,25 +73,25 @@ static int x86_spl_init(void) + #endif + int ret; + +- debug("%s starting\n", __func__); ++printf("%s starting\n", __func__); + if (IS_ENABLED(TPL)) + ret = x86_cpu_reinit_f(); + else + ret = x86_cpu_init_f(); + ret = spl_init(); + if (ret) { +- debug("%s: spl_init() failed\n", __func__); ++printf("%s: spl_init() failed\n", __func__); + return ret; + } + ret = arch_cpu_init(); + if (ret) { +- debug("%s: arch_cpu_init() failed\n", __func__); ++printf("%s: arch_cpu_init() failed\n", __func__); + return ret; + } + #ifndef CONFIG_TPL + ret = arch_cpu_init_dm(); + if (ret) { +- debug("%s: arch_cpu_init_dm() failed\n", __func__); ++printf("%s: arch_cpu_init_dm() failed\n", __func__); + return ret; + } + #endif +@@ -99,19 +99,19 @@ static int x86_spl_init(void) + #if !defined(CONFIG_TPL) && !CONFIG_IS_ENABLED(CPU) + ret = print_cpuinfo(); + if (ret) { +- debug("%s: print_cpuinfo() failed\n", __func__); ++printf("%s: print_cpuinfo() failed\n", __func__); + return ret; + } + #endif + ret = dram_init(); + if (ret) { +- debug("%s: dram_init() failed\n", __func__); ++printf("%s: dram_init() failed\n", __func__); + return ret; + } + if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) { + ret = mrccache_spl_save(); + if (ret) +- debug("%s: Failed to write to mrccache (err=%d)\n", ++printf("%s: Failed to write to mrccache (err=%d)\n", + __func__, ret); + } + +@@ -122,7 +122,7 @@ static int x86_spl_init(void) + /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */ + ret = interrupt_init(); + if (ret) { +- debug("%s: interrupt_init() failed\n", __func__); ++printf("%s: interrupt_init() failed\n", __func__); + return ret; + } + +@@ -141,18 +141,18 @@ static int x86_spl_init(void) + (1ULL << 32) - CONFIG_XIP_ROM_SIZE, + CONFIG_XIP_ROM_SIZE); + if (ret) { +- debug("%s: SPI cache setup failed (err=%d)\n", __func__, ret); ++printf("%s: SPI cache setup failed (err=%d)\n", __func__, ret); + return ret; + } + mtrr_commit(true); + # else + ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit); + if (ret) +- debug("Could not find PUNIT (err=%d)\n", ret); ++printf("Could not find PUNIT (err=%d)\n", ret); + + ret = set_max_freq(); + if (ret) +- debug("Failed to set CPU frequency (err=%d)\n", ret); ++printf("Failed to set CPU frequency (err=%d)\n", ret); + # endif + #endif + +@@ -185,7 +185,7 @@ void board_init_f_r(void) + { + init_cache_f_r(); + gd->flags &= ~GD_FLG_SERIAL_READY; +- debug("cache status %d\n", dcache_status()); ++printf("cache status %d\n", dcache_status()); + board_init_r(gd, 0); + } + +@@ -226,7 +226,7 @@ static int spl_board_load_image(struct spl_image_info *spl_image, + 0x100000); + } + +- debug("Loading to %lx\n", spl_image->load_addr); ++printf("Loading to %lx\n", spl_image->load_addr); + + return 0; + } +@@ -244,7 +244,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + + printf("Jumping to 64-bit U-Boot: Note many features are missing\n"); + ret = cpu_jump_to_64bit_uboot(spl_image->entry_point); +- debug("ret=%d\n", ret); ++printf("ret=%d\n", ret); + hang(); + } + #endif +diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c +index 1779bb3e1..f7b5d31ee 100644 +--- a/arch/x86/lib/tables.c ++++ b/arch/x86/lib/tables.c +@@ -84,7 +84,7 @@ int write_tables(void) + + rom_table_start = ROM_TABLE_ADDR; + +- debug("Writing tables to %x:\n", rom_table_start); ++printf("Writing tables to %x:\n", rom_table_start); + for (i = 0; i < ARRAY_SIZE(table_list); i++) { + const struct table_info *table = &table_list[i]; + int size = table->size ? : CONFIG_ROM_TABLE_SIZE; +@@ -113,7 +113,7 @@ int write_tables(void) + } + } + +- debug("- wrote '%s' to %x, end %x\n", table->name, ++printf("- wrote '%s' to %x, end %x\n", table->name, + rom_table_start, rom_table_end); + if (rom_table_end - rom_table_start > size) { + log_err("Out of space for configuration tables: need %x, have %x\n", +@@ -149,7 +149,7 @@ int write_tables(void) + } + } + +- debug("- done writing tables\n"); ++printf("- done writing tables\n"); + + return 0; + } +diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c +index b3e5f9c91..f9fd7642f 100644 +--- a/arch/x86/lib/tpl.c ++++ b/arch/x86/lib/tpl.c +@@ -28,25 +28,25 @@ static int x86_tpl_init(void) + { + int ret; + +- debug("%s starting\n", __func__); ++printf("%s starting\n", __func__); + ret = x86_cpu_init_tpl(); + if (ret) { +- debug("%s: x86_cpu_init_tpl() failed\n", __func__); ++printf("%s: x86_cpu_init_tpl() failed\n", __func__); + return ret; + } + ret = spl_init(); + if (ret) { +- debug("%s: spl_init() failed\n", __func__); ++printf("%s: spl_init() failed\n", __func__); + return ret; + } + ret = arch_cpu_init(); + if (ret) { +- debug("%s: arch_cpu_init() failed\n", __func__); ++printf("%s: arch_cpu_init() failed\n", __func__); + return ret; + } + ret = arch_cpu_init_dm(); + if (ret) { +- debug("%s: arch_cpu_init_dm() failed\n", __func__); ++printf("%s: arch_cpu_init_dm() failed\n", __func__); + return ret; + } + preloader_console_init(); +@@ -60,7 +60,7 @@ void board_init_f(ulong flags) + + ret = x86_tpl_init(); + if (ret) { +- debug("Error %d\n", ret); ++printf("Error %d\n", ret); + panic("x86_tpl_init fail"); + } + +@@ -99,7 +99,7 @@ static int spl_board_load_image(struct spl_image_info *spl_image, + spl_image->os = IH_OS_U_BOOT; + spl_image->name = "U-Boot"; + +- debug("Loading to %lx\n", spl_image->load_addr); ++printf("Loading to %lx\n", spl_image->load_addr); + + return 0; + } +@@ -112,7 +112,7 @@ int spl_spi_load_image(void) + + void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + { +- debug("Jumping to %s at %lx\n", spl_phase_name(spl_next_phase()), ++printf("Jumping to %s at %lx\n", spl_phase_name(spl_next_phase()), + (ulong)spl_image->entry_point); + #ifdef DEBUG + print_buffer(spl_image->entry_point, (void *)spl_image->entry_point, 1, +diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c +index 78bf7d622..e9a864637 100644 +--- a/board/BuR/common/common.c ++++ b/board/BuR/common/common.c +@@ -142,7 +142,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) + + return -1; + } +- debug("lcd-settings in env complete, taking over.\n"); ++printf("lcd-settings in env complete, taking over.\n"); + memcpy((void *)panel, + (void *)&pnltmp, + sizeof(struct am335x_lcdpanel)); +@@ -202,7 +202,7 @@ void lcdpower(int on) + else + gpio_direction_output(pin & 0x7F, !swval); + +- debug("switched pin %d to %d\n", pin & 0x7F, swval); ++printf("switched pin %d to %d\n", pin & 0x7F, swval); + } + pin >>= 8; + } +diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c +index 8b2f94f95..0918e2239 100644 +--- a/board/CZ.NIC/turris_omnia/turris_omnia.c ++++ b/board/CZ.NIC/turris_omnia/turris_omnia.c +@@ -246,7 +246,7 @@ static int omnia_get_ram_size_gb(void) + if (!ram_size) { + /* Get the board config from EEPROM */ + if (omnia_read_eeprom(&oep)) { +- debug("Memory config in EEPROM: 0x%02x\n", oep.ramsize); ++printf("Memory config in EEPROM: 0x%02x\n", oep.ramsize); + + if (oep.ramsize == 0x2) + ram_size = 2; +diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c +index c6376cdf6..83a708ccf 100644 +--- a/board/Marvell/gplugd/gplugd.c ++++ b/board/Marvell/gplugd/gplugd.c +@@ -128,7 +128,7 @@ void reset_phy(void) + + /* reset the phy */ + miiphy_reset(name, phy_adr); +- debug("88E3015 Initialized on %s\n", name); ++printf("88E3015 Initialized on %s\n", name); + } + #endif /* CONFIG_RESET_PHY_R */ + #endif /* CONFIG_ARMADA100_FEC */ +diff --git a/board/Marvell/octeon_ebb7304/board.c b/board/Marvell/octeon_ebb7304/board.c +index 9aac5f0b0..f25d413ac 100644 +--- a/board/Marvell/octeon_ebb7304/board.c ++++ b/board/Marvell/octeon_ebb7304/board.c +@@ -289,12 +289,12 @@ void __fixup_xcv(void) + char fdt_key[16]; + int i; + +- debug("%s: BGX %d\n", __func__, (int)bgx); ++printf("%s: BGX %d\n", __func__, (int)bgx); + + for (i = 0; i < 3; i++) { + snprintf(fdt_key, sizeof(fdt_key), + bgx == i ? "%d,xcv" : "%d,not-xcv", i); +- debug("%s: trimming bgx %lu with key %s\n", ++printf("%s: trimming bgx %lu with key %s\n", + __func__, bgx, fdt_key); + + octeon_fdt_patch_rename((void *)gd->fdt_blob, fdt_key, +@@ -412,7 +412,7 @@ void __fixup_fdt(void) + break; + } + sprintf(fdt_key, "%d,%s", qlm, type_str); +- debug("Patching qlm %d for %s for mode %d%s\n", qlm, fdt_key, mode, ++printf("Patching qlm %d for %s for mode %d%s\n", qlm, fdt_key, mode, + no_phy[qlm] ? ", removing PHY" : ""); + octeon_fdt_patch_rename((void *)gd->fdt_blob, fdt_key, NULL, true, + no_phy[qlm] ? kill_fdt_phy : NULL, NULL); +@@ -462,13 +462,13 @@ static void board_configure_qlms(void) + /* RGMII PHY reset GPIO */ + ret = dm_gpio_lookup_name("gpio-controllerA27", &desc); + if (ret) +- debug("gpio ret=%d\n", ret); ++printf("gpio ret=%d\n", ret); + ret = dm_gpio_request(&desc, "rgmii_phy_reset"); + if (ret) +- debug("gpio_request ret=%d\n", ret); ++printf("gpio_request ret=%d\n", ret); + ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT); + if (ret) +- debug("gpio dir ret=%d\n", ret); ++printf("gpio dir ret=%d\n", ret); + + /* Put RGMII PHY in reset */ + dm_gpio_set_value(&desc, 0); +@@ -710,7 +710,7 @@ static void board_configure_qlms(void) + if (mode[qlm] == -1) + continue; + +- debug("Configuring qlm%d with speed(%d), mode(%d), RC(%d), Gen(%d), REF_CLK(%d), CLK_SOURCE(%d)\n", ++printf("Configuring qlm%d with speed(%d), mode(%d), RC(%d), Gen(%d), REF_CLK(%d), CLK_SOURCE(%d)\n", + qlm, speed[qlm], mode[qlm], pcie_rc[qlm], + pcie_gen[qlm] + 1, + ref_clock_sel[qlm], ref_clock_input[qlm]); +diff --git a/board/Marvell/octeon_nic23/board.c b/board/Marvell/octeon_nic23/board.c +index 9f5eb2e2a..bff01db4f 100644 +--- a/board/Marvell/octeon_nic23/board.c ++++ b/board/Marvell/octeon_nic23/board.c +@@ -49,7 +49,7 @@ int board_fix_fdt(void *fdt) + */ + rev4 = true; + +- debug("%s() rev4: %s\n", __func__, rev4 ? "true" : "false"); ++printf("%s() rev4: %s\n", __func__, rev4 ? "true" : "false"); + /* Patch the PHY configuration based on board revision */ + rc = octeon_fdt_patch_rename(fdt, + rev4 ? "4,nor-flash" : "4,no-nor-flash", +@@ -93,7 +93,7 @@ void board_configure_qlms(void) + octeon_qlm_tune_v3(0, 5, 103125, 0x19, 0x0, -1, -1); + octeon_qlm_set_channel_v3(0, 5, 0); + octeon_qlm_dfe_disable(0, 5, -1, 103125, CVMX_QLM_MODE_XFI_1X2); +- debug("QLM 4 reference clock: %d\n" ++printf("QLM 4 reference clock: %d\n" + "DLM 5 reference clock: %d\n", + cvmx_qlm_measure_clock(4), cvmx_qlm_measure_clock(5)); + } +diff --git a/board/Marvell/octeontx/board-fdt.c b/board/Marvell/octeontx/board-fdt.c +index 0b05ef11e..882bfcf5a 100644 +--- a/board/Marvell/octeontx/board-fdt.c ++++ b/board/Marvell/octeontx/board-fdt.c +@@ -85,11 +85,11 @@ void fdt_parse_phy_info(void) + snprintf(bgxname, sizeof(bgxname), "rgx%d", rgx_id); + node = fdt_subnode_offset(fdt, offset, bgxname); + if (node < 0) { +- debug("bgx%d/rgx0 node not found\n", bgx_id); ++printf("bgx%d/rgx0 node not found\n", bgx_id); + return; + } + } +- debug("bgx%d node found\n", bgx_id); ++printf("bgx%d node found\n", bgx_id); + + /* + * loop through each of the bgx/rgx nodes +@@ -99,7 +99,7 @@ void fdt_parse_phy_info(void) + /* Check for reg property */ + val = fdt_getprop(fdt, subnode, "reg", &len); + if (val) { +- debug("lmacid = %d\n", lmacid); ++printf("lmacid = %d\n", lmacid); + lmac_reg[lmacid] = 1; + } + /* check for phy-handle property */ +@@ -107,7 +107,7 @@ void fdt_parse_phy_info(void) + if (val) { + phandle = fdt32_to_cpu(*val); + if (!phandle) { +- debug("phandle not valid %d\n", lmacid); ++printf("phandle not valid %d\n", lmacid); + } else { + phy_offset = fdt_node_offset_by_phandle + (fdt, phandle); +@@ -117,7 +117,7 @@ void fdt_parse_phy_info(void) + (fdt, phy_offset); + } + } else { +- debug("phy-handle prop not found %d\n", ++printf("phy-handle prop not found %d\n", + lmacid); + } + /* check for autonegotiation property */ +@@ -254,12 +254,12 @@ void fdt_board_get_ethaddr(int bgx, int lmac, unsigned char *eth) + /* check for local-mac-address */ + mac = fdt_getprop(fdt, subnode, "local-mac-address", &len); + if (mac) { +- debug("%s mac %pM\n", __func__, mac); ++printf("%s mac %pM\n", __func__, mac); + memcpy(eth, mac, ARP_HLEN); + } else { + memset(eth, 0, ARP_HLEN); + } +- debug("%s eth %pM\n", __func__, eth); ++printf("%s eth %pM\n", __func__, eth); + return; + } + } +@@ -294,7 +294,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) + return ret; + } + +- debug("%s deleted bdk node\n", __func__); ++printf("%s deleted bdk node\n", __func__); + } + + return 0; +diff --git a/board/Marvell/octeontx/board.c b/board/Marvell/octeontx/board.c +index 059ebf8f1..00bc6e97d 100644 +--- a/board/Marvell/octeontx/board.c ++++ b/board/Marvell/octeontx/board.c +@@ -80,18 +80,18 @@ void board_late_probe_devices(void) + err = dm_pci_find_device(PCI_VENDOR_ID_CAVIUM, + PCI_DEVICE_ID_CAVIUM_BGX, i, &dev); + if (err) +- debug("%s BGX%d device not found\n", __func__, i); ++printf("%s BGX%d device not found\n", __func__, i); + } + if (otx_is_soc(CN81XX)) { + err = dm_pci_find_device(PCI_VENDOR_ID_CAVIUM, + PCI_DEVICE_ID_CAVIUM_RGX, 0, &dev); + if (err) +- debug("%s RGX device not found\n", __func__); ++printf("%s RGX device not found\n", __func__); + } + err = dm_pci_find_device(PCI_VENDOR_ID_CAVIUM, + PCI_DEVICE_ID_CAVIUM_NIC, 0, &dev); + if (err) +- debug("NIC PF device not found\n"); ++printf("NIC PF device not found\n"); + } + + /** +diff --git a/board/Marvell/octeontx2/board-fdt.c b/board/Marvell/octeontx2/board-fdt.c +index a4771af4c..feef4cab2 100644 +--- a/board/Marvell/octeontx2/board-fdt.c ++++ b/board/Marvell/octeontx2/board-fdt.c +@@ -76,7 +76,7 @@ int fdt_get_board_mac_cnt(void) + mac_count = simple_strtol(str, NULL, 10); + if (!mac_count) + mac_count = simple_strtol(str, NULL, 16); +- debug("fdt: MAC_NUM %d\n", mac_count); ++printf("fdt: MAC_NUM %d\n", mac_count); + } else { + printf("Error: cannot retrieve mac count prop from fdt\n"); + } +@@ -85,7 +85,7 @@ int fdt_get_board_mac_cnt(void) + if (str) { + if (simple_strtol(str, NULL, 10) >= 0) + mac_count = simple_strtol(str, NULL, 10); +- debug("fdt: MAC_NUM %d\n", mac_count); ++printf("fdt: MAC_NUM %d\n", mac_count); + } else { + printf("Error: cannot retrieve mac num override prop\n"); + } +@@ -184,7 +184,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) + printf("WARNING : could not remove cavium, bdk node\n"); + return ret; + } +- debug("%s deleted 'cavium,bdk' node\n", __func__); ++printf("%s deleted 'cavium,bdk' node\n", __func__); + /* + * Add a new node at root level which would have + * necessary info +diff --git a/board/Marvell/octeontx2/board.c b/board/Marvell/octeontx2/board.c +index 9b973a4ac..345d63432 100644 +--- a/board/Marvell/octeontx2/board.c ++++ b/board/Marvell/octeontx2/board.c +@@ -55,7 +55,7 @@ void octeontx2_board_get_mac_addr(u8 index, u8 *mac_addr) + } else { + memset(mac_addr, 0, ARP_HLEN); + } +- debug("%s mac %pM\n", __func__, mac_addr); ++printf("%s mac %pM\n", __func__, mac_addr); + } + + void board_quiesce_devices(void) +@@ -122,12 +122,12 @@ void board_late_probe_devices(void) + err = dm_pci_find_device(PCI_VENDOR_ID_CAVIUM, + PCI_DEVICE_ID_CAVIUM_CGX, i, &dev); + if (err) +- debug("%s CGX%d device not found\n", __func__, i); ++printf("%s CGX%d device not found\n", __func__, i); + } + err = dm_pci_find_device(PCI_VENDOR_ID_CAVIUM, + PCI_DEVICE_ID_CAVIUM_RVU_AF, 0, &dev); + if (err) +- debug("NIC AF device not found\n"); ++printf("NIC AF device not found\n"); + } + + /** +@@ -141,7 +141,7 @@ int board_late_init(void) + bool save_env = false; + const char *str; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + /* + * Now that pci_init initializes env device. +diff --git a/board/Synology/common/legacy.c b/board/Synology/common/legacy.c +index 3c89e92ae..012c8dbe6 100644 +--- a/board/Synology/common/legacy.c ++++ b/board/Synology/common/legacy.c +@@ -49,7 +49,7 @@ void setup_board_tags(struct tag **in_params) + struct tag *params; + int i; + +- debug("Synology board tags...\n"); ++printf("Synology board tags...\n"); + + params = *in_params; + t = (struct tag_mv_uboot *)¶ms->u; +diff --git a/board/advantech/imx8qm_rom7720_a1/spl.c b/board/advantech/imx8qm_rom7720_a1/spl.c +index 8493bb015..757c8903c 100644 +--- a/board/advantech/imx8qm_rom7720_a1/spl.c ++++ b/board/advantech/imx8qm_rom7720_a1/spl.c +@@ -198,7 +198,7 @@ void spl_board_prepare_for_boot(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +diff --git a/board/amlogic/vim3/vim3.c b/board/amlogic/vim3/vim3.c +index 6cd5f2e11..b11c197c2 100644 +--- a/board/amlogic/vim3/vim3.c ++++ b/board/amlogic/vim3/vim3.c +@@ -79,7 +79,7 @@ int meson_ft_board_setup(void *blob, struct bd_info *bd) + printf("vim3: failed to read i2c reg (%d)\n", ret); + return 0; + } +- debug("MCU_USB_PCIE_SWITCH_REG: %d\n", ret); ++printf("MCU_USB_PCIE_SWITCH_REG: %d\n", ret); + + /* + * If in PCIe mode, alter DT +diff --git a/board/armltd/integrator/pci.c b/board/armltd/integrator/pci.c +index 28efc33f1..fd0c10138 100644 +--- a/board/armltd/integrator/pci.c ++++ b/board/armltd/integrator/pci.c +@@ -375,13 +375,13 @@ void pci_init_board(void) + V3_LB_MAP_TYPE_MEM_MULTIPLE); + + /* Dump PCI to local address space mappings */ +- debug("LB_BASE0 = %08x\n", v3_readl(V3_LB_BASE0)); +- debug("LB_MAP0 = %04x\n", v3_readw(V3_LB_MAP0)); +- debug("LB_BASE1 = %08x\n", v3_readl(V3_LB_BASE1)); +- debug("LB_MAP1 = %04x\n", v3_readw(V3_LB_MAP1)); +- debug("LB_BASE2 = %04x\n", v3_readw(V3_LB_BASE2)); +- debug("LB_MAP2 = %04x\n", v3_readw(V3_LB_MAP2)); +- debug("LB_IO_BASE = %04x\n", v3_readw(V3_LB_IO_BASE)); ++printf("LB_BASE0 = %08x\n", v3_readl(V3_LB_BASE0)); ++printf("LB_MAP0 = %04x\n", v3_readw(V3_LB_MAP0)); ++printf("LB_BASE1 = %08x\n", v3_readl(V3_LB_BASE1)); ++printf("LB_MAP1 = %04x\n", v3_readw(V3_LB_MAP1)); ++printf("LB_BASE2 = %04x\n", v3_readw(V3_LB_BASE2)); ++printf("LB_MAP2 = %04x\n", v3_readw(V3_LB_MAP2)); ++printf("LB_IO_BASE = %04x\n", v3_readw(V3_LB_IO_BASE)); + + /* + * Allow accesses to PCI Configuration space and set up A1, A0 for +diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c +index 733b190e5..12298e3b6 100644 +--- a/board/armltd/vexpress64/pcie.c ++++ b/board/armltd/vexpress64/pcie.c +@@ -89,7 +89,7 @@ static void xr3pci_set_atr_entry(unsigned long base, unsigned long src_addr, + writel((u32)(trsl_addr >> 32), base + XR3PCI_ATR_TRSL_ADDR_HIGH); + writel(trsl_param, base + XR3PCI_ATR_TRSL_PARAM); + +- debug("ATR entry: 0x%010lx %s 0x%010lx [0x%010llx] (param: 0x%06x)\n", ++printf("ATR entry: 0x%010lx %s 0x%010lx [0x%010llx] (param: 0x%06x)\n", + src_addr, (trsl_param & 0x400000) ? "<-" : "->", trsl_addr, + ((u64)1) << window_size, trsl_param); + } +diff --git a/board/avionic-design/common/tamonten-ng.c b/board/avionic-design/common/tamonten-ng.c +index 29bde6022..595c5f51e 100644 +--- a/board/avionic-design/common/tamonten-ng.c ++++ b/board/avionic-design/common/tamonten-ng.c +@@ -57,7 +57,7 @@ void pmu_write(uchar reg, uchar data) + + ret = i2c_get_chip_for_busnum(4, PMU_I2C_ADDRESS, 1, &dev); + if (ret) { +- debug("%s: Cannot find PMIC I2C chip\n", __func__); ++printf("%s: Cannot find PMIC I2C chip\n", __func__); + return; + } + dm_i2c_write(dev, reg, &data, 1); +diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c +index 12266b22a..b669ddd96 100644 +--- a/board/beacon/imx8mm/spl.c ++++ b/board/beacon/imx8mm/spl.c +@@ -46,14 +46,14 @@ static void spl_dram_init(void) + + void spl_board_init(void) + { +- debug("Normal Boot\n"); ++printf("Normal Boot\n"); + } + + #ifdef CONFIG_SPL_LOAD_FIT + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -135,7 +135,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c +index b5263ccfd..ef221e4eb 100644 +--- a/board/beacon/imx8mn/spl.c ++++ b/board/beacon/imx8mn/spl.c +@@ -49,7 +49,7 @@ void spl_board_init(void) + struct udevice *dev; + int ret; + +- debug("Normal Boot\n"); ++printf("Normal Boot\n"); + + ret = uclass_get_device_by_name(UCLASS_CLK, + "clock-controller@30380000", +@@ -62,7 +62,7 @@ void spl_board_init(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -118,7 +118,7 @@ void board_init_f(ulong dummy) + + ret = spl_init(); + if (ret) { +- debug("spl_init() failed: %d\n", ret); ++printf("spl_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c +index 076ac9414..4868a1808 100644 +--- a/board/broadcom/bcmstb/bcmstb.c ++++ b/board/broadcom/bcmstb/bcmstb.c +@@ -108,17 +108,17 @@ uint64_t get_ticks(void) + + int board_late_init(void) + { +- debug("Arguments from prior stage bootloader:\n"); +- debug("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0); +- debug("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1); +- debug("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2); +- debug("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3); +- debug("Stack Pointer Register: 0x%x\n", bcmstb_boot_parameters.sp); +- debug("Link Register: 0x%x\n", bcmstb_boot_parameters.lr); +- debug("Assuming timer frequency register at: 0x%p\n", ++printf("Arguments from prior stage bootloader:\n"); ++printf("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0); ++printf("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1); ++printf("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2); ++printf("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3); ++printf("Stack Pointer Register: 0x%x\n", bcmstb_boot_parameters.sp); ++printf("Link Register: 0x%x\n", bcmstb_boot_parameters.lr); ++printf("Assuming timer frequency register at: 0x%p\n", + (void *)BCMSTB_TIMER_FREQUENCY); +- debug("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz); +- debug("Prior stage provided DTB at: 0x%p\n", ++printf("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz); ++printf("Prior stage provided DTB at: 0x%p\n", + (void *)prior_stage_fdt_address); + + /* +diff --git a/board/cloudengines/pogo_e02/pogo_e02.c b/board/cloudengines/pogo_e02/pogo_e02.c +index 039fd6e3d..d1642e81d 100644 +--- a/board/cloudengines/pogo_e02/pogo_e02.c ++++ b/board/cloudengines/pogo_e02/pogo_e02.c +@@ -102,6 +102,6 @@ void reset_phy(void) + /* reset the phy */ + miiphy_reset(name, devadr); + +- debug("88E1116 Initialized on %s\n", name); ++printf("88E1116 Initialized on %s\n", name); + } + #endif /* CONFIG_RESET_PHY_R */ +diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c +index 64d0860d2..39bc4de9c 100644 +--- a/board/compal/paz00/paz00.c ++++ b/board/compal/paz00/paz00.c +@@ -45,7 +45,7 @@ void pin_mux_mmc(void) + /* this is a weak define that we are overriding */ + void pin_mux_display(void) + { +- debug("init display pinmux\n"); ++printf("init display pinmux\n"); + + /* EN_VDD_PANEL GPIO A4 */ + pinmux_tristate_disable(PMUX_PINGRP_DAP2); +diff --git a/board/compulab/cm_t335/spl.c b/board/compulab/cm_t335/spl.c +index 33264dfa7..31ac22beb 100644 +--- a/board/compulab/cm_t335/spl.c ++++ b/board/compulab/cm_t335/spl.c +@@ -98,7 +98,7 @@ static void probe_sdram_size(long size) + puts("Failed configuring DRAM, resetting...\n\n"); + reset_cpu(); + } +- debug("%s: setting DRAM size to %ldM\n", __func__, size >> 20); ++printf("%s: setting DRAM size to %ldM\n", __func__, size >> 20); + config_ddr(303, &ioregs, &ddr3_data, + &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); + } +diff --git a/board/compulab/imx8mm-cl-iot-gate/spl.c b/board/compulab/imx8mm-cl-iot-gate/spl.c +index 8f592457d..202631a67 100644 +--- a/board/compulab/imx8mm-cl-iot-gate/spl.c ++++ b/board/compulab/imx8mm-cl-iot-gate/spl.c +@@ -77,7 +77,7 @@ void spl_board_init(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -162,7 +162,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/congatec/cgtqmx8/spl.c b/board/congatec/cgtqmx8/spl.c +index 2a5d4c1bc..6004a1009 100644 +--- a/board/congatec/cgtqmx8/spl.c ++++ b/board/congatec/cgtqmx8/spl.c +@@ -59,7 +59,7 @@ void spl_board_init(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +diff --git a/board/d-link/dns325/dns325.c b/board/d-link/dns325/dns325.c +index 055783f63..154ae3720 100644 +--- a/board/d-link/dns325/dns325.c ++++ b/board/d-link/dns325/dns325.c +@@ -130,6 +130,6 @@ void reset_phy(void) + /* reset the phy */ + miiphy_reset(name, devadr); + +- debug("88E1116 Initialized on %s\n", name); ++printf("88E1116 Initialized on %s\n", name); + } + #endif /* CONFIG_RESET_PHY_R */ +diff --git a/board/dfi/dfi-bt700/dfi-bt700.c b/board/dfi/dfi-bt700/dfi-bt700.c +index 87506a77a..0f21e742c 100644 +--- a/board/dfi/dfi-bt700/dfi-bt700.c ++++ b/board/dfi/dfi-bt700/dfi-bt700.c +@@ -38,13 +38,13 @@ int board_late_init(void) + + ret = dm_gpio_lookup_name("F10", &desc); + if (ret) +- debug("gpio ret=%d\n", ret); ++printf("gpio ret=%d\n", ret); + ret = dm_gpio_request(&desc, "xhci_hub_reset"); + if (ret) +- debug("gpio_request ret=%d\n", ret); ++printf("gpio_request ret=%d\n", ret); + ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT); + if (ret) +- debug("gpio dir ret=%d\n", ret); ++printf("gpio dir ret=%d\n", ret); + + /* Pull xHCI hub reset to low (active low) */ + dm_gpio_set_value(&desc, 0); +diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c +index ac1af718d..33407f6c7 100644 +--- a/board/dhelectronics/dh_stm32mp1/board.c ++++ b/board/dhelectronics/dh_stm32mp1/board.c +@@ -304,13 +304,13 @@ static void board_key_check(void) + + node = ofnode_path("/config"); + if (!ofnode_valid(node)) { +- debug("%s: no /config node?\n", __func__); ++printf("%s: no /config node?\n", __func__); + return; + } + #ifdef CONFIG_FASTBOOT + if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0, + &gpio, GPIOD_IS_IN)) { +- debug("%s: could not find a /config/st,fastboot-gpios\n", ++printf("%s: could not find a /config/st,fastboot-gpios\n", + __func__); + } else { + if (dm_gpio_get_value(&gpio)) { +@@ -324,7 +324,7 @@ static void board_key_check(void) + #ifdef CONFIG_CMD_STM32PROG + if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0, + &gpio, GPIOD_IS_IN)) { +- debug("%s: could not find a /config/st,stm32prog-gpios\n", ++printf("%s: could not find a /config/st,stm32prog-gpios\n", + __func__); + } else { + if (dm_gpio_get_value(&gpio)) { +@@ -356,7 +356,7 @@ int g_dnl_board_usb_cable_connected(void) + DM_DRIVER_GET(dwc2_udc_otg), + &dwc2_udc_otg); + if (!ret) +- debug("dwc2_udc_otg init failed\n"); ++printf("dwc2_udc_otg init failed\n"); + + return dwc2_udc_B_session_valid(dwc2_udc_otg); + } +@@ -393,7 +393,7 @@ static int get_led(struct udevice **dev, char *led_string) + } + ret = led_get_by_label(led_name, dev); + if (ret) { +- debug("%s: get=%d\n", __func__, ret); ++printf("%s: get=%d\n", __func__, ret); + return ret; + } + +@@ -521,7 +521,7 @@ static void sysconf_init(void) + pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n"); + } + } else { +- debug("VDD unknown"); ++printf("VDD unknown"); + } + } + #endif +@@ -675,7 +675,7 @@ int board_interface_eth_init(struct udevice *dev, + case PHY_INTERFACE_MODE_MII: + value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII | + SYSCFG_PMCSETR_ETH_REF_CLK_SEL; +- debug("%s: PHY_INTERFACE_MODE_MII\n", __func__); ++printf("%s: PHY_INTERFACE_MODE_MII\n", __func__); + break; + case PHY_INTERFACE_MODE_GMII: + if (eth_clk_sel_reg) +@@ -683,7 +683,7 @@ int board_interface_eth_init(struct udevice *dev, + SYSCFG_PMCSETR_ETH_CLK_SEL; + else + value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII; +- debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__); ++printf("%s: PHY_INTERFACE_MODE_GMII\n", __func__); + break; + case PHY_INTERFACE_MODE_RMII: + if (eth_ref_clk_sel_reg) +@@ -691,7 +691,7 @@ int board_interface_eth_init(struct udevice *dev, + SYSCFG_PMCSETR_ETH_REF_CLK_SEL; + else + value = SYSCFG_PMCSETR_ETH_SEL_RMII; +- debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__); ++printf("%s: PHY_INTERFACE_MODE_RMII\n", __func__); + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: +@@ -702,10 +702,10 @@ int board_interface_eth_init(struct udevice *dev, + SYSCFG_PMCSETR_ETH_CLK_SEL; + else + value = SYSCFG_PMCSETR_ETH_SEL_RGMII; +- debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__); ++printf("%s: PHY_INTERFACE_MODE_RGMII\n", __func__); + break; + default: +- debug("%s: Do not manage %d interface\n", ++printf("%s: Do not manage %d interface\n", + __func__, interface_type); + /* Do not manage others interfaces */ + return -EINVAL; +diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c +index f806d1e76..caac6898d 100644 +--- a/board/eets/pdu001/board.c ++++ b/board/eets/pdu001/board.c +@@ -147,17 +147,17 @@ static void set_mpu_and_core_voltage(void) + /* first update the MPU voltage */ + if (!regulator_get_by_devname(VDD_MPU_REGULATOR, &dev)) { + if (regulator_set_value(dev, mpu_vdd)) +- debug("failed to set MPU voltage\n"); ++printf("failed to set MPU voltage\n"); + } else { +- debug("invalid MPU voltage ragulator %s\n", VDD_MPU_REGULATOR); ++printf("invalid MPU voltage ragulator %s\n", VDD_MPU_REGULATOR); + } + + /* second update the CORE voltage */ + if (!regulator_get_by_devname(VDD_CORE_REGULATOR, &dev)) { + if (regulator_set_value(dev, DEFAULT_CORE_VOLTAGE)) +- debug("failed to set CORE voltage\n"); ++printf("failed to set CORE voltage\n"); + } else { +- debug("invalid CORE voltage ragulator %s\n", ++printf("invalid CORE voltage ragulator %s\n", + VDD_CORE_REGULATOR); + } + } +diff --git a/board/emulation/common/qemu_mtdparts.c b/board/emulation/common/qemu_mtdparts.c +index 60212e97a..f32ef8c84 100644 +--- a/board/emulation/common/qemu_mtdparts.c ++++ b/board/emulation/common/qemu_mtdparts.c +@@ -57,7 +57,7 @@ void board_mtdparts_default(const char **mtdids, const char **mtdparts) + /* probe all MTD devices */ + for (uclass_first_device(UCLASS_MTD, &dev); dev; + uclass_next_device(&dev)) { +- debug("mtd device = %s\n", dev->name); ++printf("mtd device = %s\n", dev->name); + } + + mtd = get_mtd_device_nm("nor0"); +@@ -78,5 +78,5 @@ void board_mtdparts_default(const char **mtdids, const char **mtdparts) + mtd_initialized = true; + *mtdids = ids; + *mtdparts = parts; +- debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts); ++printf("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts); + } +diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c +index aa68bef46..3f9f7d3d5 100644 +--- a/board/emulation/qemu-arm/qemu-arm.c ++++ b/board/emulation/qemu-arm/qemu-arm.c +@@ -131,7 +131,7 @@ efi_status_t platform_get_rng_device(struct udevice **dev) + } + + if (status != EFI_SUCCESS) { +- debug("No rng device found\n"); ++printf("No rng device found\n"); + return EFI_DEVICE_ERROR; + } + +@@ -140,7 +140,7 @@ efi_status_t platform_get_rng_device(struct udevice **dev) + if (ret) + return EFI_DEVICE_ERROR; + } else { +- debug("Couldn't get child device\n"); ++printf("Couldn't get child device\n"); + return EFI_DEVICE_ERROR; + } + +diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c +index dcfd3f20b..6d1e17fa4 100644 +--- a/board/emulation/qemu-riscv/qemu-riscv.c ++++ b/board/emulation/qemu-riscv/qemu-riscv.c +@@ -33,7 +33,7 @@ int board_late_init(void) + + chosen_node = ofnode_path("/chosen"); + if (!ofnode_valid(chosen_node)) { +- debug("No chosen node found, can't get kernel start address\n"); ++printf("No chosen node found, can't get kernel start address\n"); + return 0; + } + +@@ -45,7 +45,7 @@ int board_late_init(void) + (u32 *)&kernel_start); + #endif + if (ret) { +- debug("Can't find kernel start address in device tree\n"); ++printf("Can't find kernel start address in device tree\n"); + return 0; + } + +diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c +index df9149e0d..4b507051a 100644 +--- a/board/engicam/common/board.c ++++ b/board/engicam/common/board.c +@@ -121,7 +121,7 @@ static int fixup_enet_clock(enum engicam_boards board_detected) + } + + /* set gpr1[21] to select anatop clock */ +- debug("fixup_enet_clock %d\n", clk_internal); ++printf("fixup_enet_clock %d\n", clk_internal); + clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, clk_internal << 21); + + if (!clk_internal) { +diff --git a/board/engicam/imx8mm/spl.c b/board/engicam/imx8mm/spl.c +index f9be769ec..0a916a6e6 100644 +--- a/board/engicam/imx8mm/spl.c ++++ b/board/engicam/imx8mm/spl.c +@@ -41,14 +41,14 @@ static void spl_dram_init(void) + + void spl_board_init(void) + { +- debug("Normal Boot\n"); ++printf("Normal Boot\n"); + } + + #ifdef CONFIG_SPL_LOAD_FIT + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -88,7 +88,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c +index 41c49e5da..ec2b2785c 100644 +--- a/board/firefly/firefly-rk3288/firefly-rk3288.c ++++ b/board/firefly/firefly-rk3288/firefly-rk3288.c +@@ -23,7 +23,7 @@ static int setup_led(void) + return 0; + ret = led_get_by_label(led_name, &dev); + if (ret) { +- debug("%s: get=%d\n", __func__, ret); ++printf("%s: get=%d\n", __func__, ret); + return ret; + } + ret = led_set_state(dev, LEDST_ON); +@@ -40,7 +40,7 @@ void spl_board_init(void) + + ret = setup_led(); + if (ret) { +- debug("LED ret=%d\n", ret); ++printf("LED ret=%d\n", ret); + hang(); + } + } +diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c +index 93e7d776f..2d4c82b43 100644 +--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c ++++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c +@@ -23,13 +23,13 @@ int board_early_init_f(void) + + ret = regulator_get_by_platname("vcc5v0_host", ®ulator); + if (ret) { +- debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); ++printf("%s vcc5v0_host init fail! ret %d\n", __func__, ret); + goto out; + } + + ret = regulator_set_enable(regulator, true); + if (ret) +- debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret); ++printf("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret); + out: + return 0; + } +diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c +index 733940860..65a8211fd 100644 +--- a/board/freescale/common/arm_sleep.c ++++ b/board/freescale/common/arm_sleep.c +@@ -123,7 +123,7 @@ int fsl_dp_resume(void) + + /* Get the entry address and jump to kernel */ + start_addr = in_le32(&scfg->sparecr[3]); +- debug("Entry address is 0x%08x\n", start_addr); ++printf("Entry address is 0x%08x\n", start_addr); + kernel_resume = (void (*)(void))start_addr; + secure_ram_addr(_do_nonsec_entry)(kernel_resume, 0, 0, 0); + +diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c +index cafb24971..fd3997354 100644 +--- a/board/freescale/common/fsl_chain_of_trust.c ++++ b/board/freescale/common/fsl_chain_of_trust.c +@@ -159,7 +159,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + * may return back in case of non-fatal failures. + */ + +- debug("image entry point: 0x%lX\n", spl_image->entry_point); ++printf("image entry point: 0x%lX\n", spl_image->entry_point); + image_entry(); + } + #endif /* ifdef CONFIG_SPL_FRAMEWORK */ +diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c +index 564a8b3b5..120251074 100644 +--- a/board/freescale/common/fsl_validate.c ++++ b/board/freescale/common/fsl_validate.c +@@ -91,7 +91,7 @@ int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr) + flash_addr = flash_info[i].start[0]; + addr = flash_info[i].start[0] + csf_flash_offset; + if (memcmp((u8 *)addr, barker_code, ESBC_BARKER_LEN) == 0) { +- debug("Barker found on addr %x\n", addr); ++printf("Barker found on addr %x\n", addr); + found = 1; + break; + } +@@ -173,7 +173,7 @@ static int get_ie_info_addr(uintptr_t *ie_addr) + *ie_addr = (uintptr_t)sg_tbl->src_addr; + #endif + +- debug("IE Table address is %lx\n", *ie_addr); ++printf("IE Table address is %lx\n", *ie_addr); + return 0; + } + #endif /* CONFIG_ESBC_HDR_LS */ +diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c +index 214339578..a4471e42e 100644 +--- a/board/freescale/common/ics307_clk.c ++++ b/board/freescale/common/ics307_clk.c +@@ -89,7 +89,7 @@ unsigned long ics307_sysclk_calculator(unsigned long out_freq) + result = (s_rdw - 2) | (s_vdw - 8) << 7 | s_odp << 16 | + CLK2 << 19 | TTL << 21 | CRYSTAL << 22; + +- debug("ICS307-02: RDW: %ld, VDW: %ld, OD: %d\n", s_rdw - 2, s_vdw - 8, ++printf("ICS307-02: RDW: %ld, VDW: %ld, OD: %d\n", s_rdw - 2, s_vdw - 8, + ics307_s_to_od[s_odp]); + return result; + } +@@ -124,7 +124,7 @@ static unsigned long ics307_clk_freq(u8 cw0, u8 cw1, u8 cw2) + + freq = input_freq * 2 * (vdw + 8) / ((rdw + 2) * od); + +- debug("ICS307: CW[0-2]: %02X %02X %02X => %lu Hz\n", cw0, cw1, cw2, ++printf("ICS307: CW[0-2]: %02X %02X %02X => %lu Hz\n", cw0, cw1, cw2, + freq); + return freq; + } +diff --git a/board/freescale/common/idt8t49n222a_serdes_clk.c b/board/freescale/common/idt8t49n222a_serdes_clk.c +index bb3cdac84..44e1fca72 100644 +--- a/board/freescale/common/idt8t49n222a_serdes_clk.c ++++ b/board/freescale/common/idt8t49n222a_serdes_clk.c +@@ -23,7 +23,7 @@ static int check_pll_status(u8 idt_addr) + } + + if (val & 0x04) { +- debug("idt8t49n222a PLL is LOCKED: %x\n", val); ++printf("idt8t49n222a PLL is LOCKED: %x\n", val); + } else { + printf("idt8t49n222a PLL is not LOCKED: %x\n", val); + return -1; +@@ -39,23 +39,23 @@ int set_serdes_refclk(u8 idt_addr, u8 serdes_num, + u8 dev_id = 0; + int i, ret; + +- debug("IDT:Configuring idt8t49n222a device at I2C address: 0x%2x\n", ++printf("IDT:Configuring idt8t49n222a device at I2C address: 0x%2x\n", + idt_addr); + + ret = i2c_read(idt_addr, DEVICE_ID_REG, 1, &dev_id, 1); + if (ret < 0) { +- debug("IDT:0x%x could not read DEV_ID from device.\n", ++printf("IDT:0x%x could not read DEV_ID from device.\n", + idt_addr); + return ret; + } + + if ((dev_id != 0x00) && (dev_id != 0x24) && (dev_id != 0x2a)) { +- debug("IDT: device at address 0x%x is not idt8t49n222a.\n", ++printf("IDT: device at address 0x%x is not idt8t49n222a.\n", + idt_addr); + } + + if (serdes_num != 1 && serdes_num != 2) { +- debug("serdes_num should be 1 for SerDes1 and" ++printf("serdes_num should be 1 for SerDes1 and" + " 2 for SerDes2.\n"); + return -1; + } +@@ -63,7 +63,7 @@ int set_serdes_refclk(u8 idt_addr, u8 serdes_num, + if ((refclk1 == SERDES_REFCLK_122_88 && refclk2 != SERDES_REFCLK_122_88) + || (refclk1 != SERDES_REFCLK_122_88 + && refclk2 == SERDES_REFCLK_122_88)) { +- debug("Only one refclk at 122.88MHz is not supported." ++printf("Only one refclk at 122.88MHz is not supported." + " Please set both refclk1 & refclk2 to 122.88MHz" + " or both not to 122.88MHz.\n"); + return -1; +@@ -72,7 +72,7 @@ int set_serdes_refclk(u8 idt_addr, u8 serdes_num, + if (refclk1 != SERDES_REFCLK_100 && refclk1 != SERDES_REFCLK_122_88 + && refclk1 != SERDES_REFCLK_125 + && refclk1 != SERDES_REFCLK_156_25) { +- debug("refclk1 should be 100MHZ, 122.88MHz, 125MHz" ++printf("refclk1 should be 100MHZ, 122.88MHz, 125MHz" + " or 156.25MHz.\n"); + return -1; + } +@@ -80,13 +80,13 @@ int set_serdes_refclk(u8 idt_addr, u8 serdes_num, + if (refclk2 != SERDES_REFCLK_100 && refclk2 != SERDES_REFCLK_122_88 + && refclk2 != SERDES_REFCLK_125 + && refclk2 != SERDES_REFCLK_156_25) { +- debug("refclk2 should be 100MHZ, 122.88MHz, 125MHz" ++printf("refclk2 should be 100MHZ, 122.88MHz, 125MHz" + " or 156.25MHz.\n"); + return -1; + } + + if (feedback != 0 && feedback != 1) { +- debug("valid values for feedback are 0(default) or 1.\n"); ++printf("valid values for feedback are 0(default) or 1.\n"); + return -1; + } + +diff --git a/board/freescale/common/mc34vr500.c b/board/freescale/common/mc34vr500.c +index d6b4c65a3..29469cc15 100644 +--- a/board/freescale/common/mc34vr500.c ++++ b/board/freescale/common/mc34vr500.c +@@ -26,7 +26,7 @@ int mc34vr500_get_sw_volt(uint8_t sw) + int sw_volt; + int ret; + +- debug("%s: Get SW%u volt from swxvolt_addr = 0x%x\n", ++printf("%s: Get SW%u volt from swxvolt_addr = 0x%x\n", + __func__, sw + 1, swxvolt_addr[sw]); + if (sw > SW4) { + printf("%s: Unsupported SW(sw%d)\n", __func__, sw + 1); +@@ -49,12 +49,12 @@ int mc34vr500_get_sw_volt(uint8_t sw) + return ret; + } + +- debug("%s: SW%d step point swxvolt = %u\n", __func__, sw + 1, swxvolt); ++printf("%s: SW%d step point swxvolt = %u\n", __func__, sw + 1, swxvolt); + spb = swx_set_point_base[sw]; + /* The base of SW volt is 625mV and increase by step 25mV */ + sw_volt = 625 + (swxvolt - spb) * 25; + +- debug("%s: SW%u volt = %dmV\n", __func__, sw + 1, sw_volt); ++printf("%s: SW%u volt = %dmV\n", __func__, sw + 1, sw_volt); + return sw_volt; + } + +@@ -65,7 +65,7 @@ int mc34vr500_set_sw_volt(uint8_t sw, int sw_volt) + uint8_t spb; + int ret; + +- debug("%s: Set SW%u volt to %dmV\n", __func__, sw + 1, sw_volt); ++printf("%s: Set SW%u volt to %dmV\n", __func__, sw + 1, sw_volt); + /* The least SW volt is 625mV, and only 4 SW outputs */ + if (sw > SW4 || sw_volt < 625) + return -EINVAL; +@@ -83,7 +83,7 @@ int mc34vr500_set_sw_volt(uint8_t sw, int sw_volt) + spb = swx_set_point_base[sw]; + /* The base of SW volt is 625mV and increase by step 25mV */ + swxvolt = (sw_volt - 625) / 25 + spb; +- debug("%s: SW%d step point swxvolt = %u\n", __func__, sw + 1, swxvolt); ++printf("%s: SW%d step point swxvolt = %u\n", __func__, sw + 1, swxvolt); + if (swxvolt > 63) + return -EINVAL; + +diff --git a/board/freescale/common/mpc85xx_sleep.c b/board/freescale/common/mpc85xx_sleep.c +index d2bb173c1..149156570 100644 +--- a/board/freescale/common/mpc85xx_sleep.c ++++ b/board/freescale/common/mpc85xx_sleep.c +@@ -89,7 +89,7 @@ int fsl_dp_resume(void) + + /* Get the entry address and jump to kernel */ + start_addr = in_be32(&scfg->sparecr[1]); +- debug("Entry address is 0x%08x\n", start_addr); ++printf("Entry address is 0x%08x\n", start_addr); + kernel_resume = (void (*)(void))start_addr; + kernel_resume(); + +diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c +index ee8ed616c..e04cf03f4 100644 +--- a/board/freescale/common/ns_access.c ++++ b/board/freescale/common/ns_access.c +@@ -235,7 +235,7 @@ void set_pcie_ns_access(int pcie, u16 val) + return; + #endif + default: +- debug("The PCIE%d doesn't exist!\n", pcie); ++printf("The PCIE%d doesn't exist!\n", pcie); + return; + } + } +diff --git a/board/freescale/common/sgmii_riser.c b/board/freescale/common/sgmii_riser.c +index 231579301..815a6cd9b 100644 +--- a/board/freescale/common/sgmii_riser.c ++++ b/board/freescale/common/sgmii_riser.c +@@ -78,7 +78,7 @@ void fsl_sgmii_riser_fdt_fixup(void *fdt) + sprintf(enet, "ethernet%d", etsec_num++); + path = fdt_getprop(fdt, node, enet, NULL); + if (!path) { +- debug("No alias for %s\n", enet); ++printf("No alias for %s\n", enet); + continue; + } + +diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c +index 13ef101e7..d2b1d1b57 100644 +--- a/board/freescale/common/vid.c ++++ b/board/freescale/common/vid.c +@@ -220,7 +220,7 @@ static int read_voltage_from_INA220(int i2caddress) + return -1; + } + +- debug("VID: bus voltage reads 0x%04x\n", vol_mon); ++printf("VID: bus voltage reads 0x%04x\n", vol_mon); + /* LSB = 4mv */ + voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4; + udelay(WAIT_FOR_ADC); +@@ -259,7 +259,7 @@ static int read_voltage_from_IR(int i2caddress) + printf("VID: Core voltage sensor error\n"); + return -1; + } +- debug("VID: bus voltage reads 0x%02x\n", vol_mon); ++printf("VID: bus voltage reads 0x%02x\n", vol_mon); + /* Resolution is 1/128V. We scale up here to get 1/128mV + * and divide at the end + */ +@@ -329,7 +329,7 @@ static int get_pmbus_multiplier(DEVICE_HANDLE_T dev) + break; + } + +- debug("VID: calculated multiplier is %d\n", multiplier); ++printf("VID: calculated multiplier is %d\n", multiplier); + return multiplier; + } + #endif +@@ -480,12 +480,12 @@ static int set_voltage_to_IR(int i2caddress, int vdd) + wait = wait_for_new_voltage(vdd, i2caddress); + if (wait < 0) + return -1; +- debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC); ++printf("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC); + + vdd_last = wait_for_voltage_stable(i2caddress); + if (vdd_last < 0) + return -1; +- debug("VID: Current voltage is %d mV\n", vdd_last); ++printf("VID: Current voltage is %d mV\n", vdd_last); + return vdd_last; + } + #endif +@@ -636,7 +636,7 @@ int adjust_vdd(ulong vdd_override) + + ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); + if (ret) { +- debug("VID: I2C failed to switch channel\n"); ++printf("VID: I2C failed to switch channel\n"); + ret = -1; + goto exit; + } +@@ -650,7 +650,7 @@ int adjust_vdd(ulong vdd_override) + goto exit; + } else { + i2caddress = ret; +- debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); ++printf("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); + } + + ret = vid_get_device(i2caddress, &dev); +@@ -674,25 +674,25 @@ int adjust_vdd(ulong vdd_override) + + /* check override variable for overriding VDD */ + vdd_string = env_get(CONFIG_VID_FLS_ENV); +- debug("VID: Initial VDD value is %d mV\n", ++printf("VID: Initial VDD value is %d mV\n", + DIV_ROUND_UP(vdd_target, 10)); + if (vdd_override == 0 && vdd_string && + !strict_strtoul(vdd_string, 10, &vdd_string_override)) + vdd_override = vdd_string_override; + if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) { + vdd_target = vdd_override * 10; /* convert to 1/10 mV */ +- debug("VID: VDD override is %lu\n", vdd_override); ++printf("VID: VDD override is %lu\n", vdd_override); + } else if (vdd_override != 0) { + printf("VID: Invalid VDD value.\n"); + } + if (vdd_target == 0) { +- debug("VID: VID not used\n"); ++printf("VID: VID not used\n"); + ret = 0; + goto exit; + } else { + /* divide and round up by 10 to get a value in mV */ + vdd_target = DIV_ROUND_UP(vdd_target, 10); +- debug("VID: vid = %d mV\n", vdd_target); ++printf("VID: vid = %d mV\n", vdd_target); + } + + /* +@@ -705,7 +705,7 @@ int adjust_vdd(ulong vdd_override) + goto exit; + } + vdd_current = vdd_last; +- debug("VID: Core voltage is currently at %d mV\n", vdd_last); ++printf("VID: Core voltage is currently at %d mV\n", vdd_last); + + #if defined(CONFIG_VOL_MONITOR_LTC3882_SET) || \ + defined(CONFIG_VOL_MONITOR_ISL68233_SET) +@@ -757,7 +757,7 @@ static int print_vdd(void) + + ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); + if (ret) { +- debug("VID : I2c failed to switch channel\n"); ++printf("VID : I2c failed to switch channel\n"); + return -1; + } + #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ +@@ -768,7 +768,7 @@ static int print_vdd(void) + goto exit; + } else { + i2caddress = ret; +- debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); ++printf("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); + } + #endif + +diff --git a/board/freescale/common/vsc3316_3308.c b/board/freescale/common/vsc3316_3308.c +index c51f3c5ac..57d9ff9b5 100644 +--- a/board/freescale/common/vsc3316_3308.c ++++ b/board/freescale/common/vsc3316_3308.c +@@ -29,7 +29,7 @@ int vsc_if_enable(unsigned int vsc_addr) + { + u8 data; + +- debug("VSC:Configuring VSC at I2C address 0x%2x" ++printf("VSC:Configuring VSC at I2C address 0x%2x" + " for 2-wire interface\n", vsc_addr); + + /* enable 2-wire Serial InterFace (I2C) */ +@@ -59,7 +59,7 @@ int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2], + u8 rev_id = 0; + int ret; + +- debug("VSC:Initializing VSC3316 at I2C address 0x%2x" ++printf("VSC:Initializing VSC3316 at I2C address 0x%2x" + " for Tx\n", vsc_addr); + + #if CONFIG_IS_ENABLED(DM_I2C) +@@ -182,7 +182,7 @@ int vsc3308_config_adjust(unsigned int vsc_addr, const int8_t con_arr[][2], + u8 rev_id = 0; + int ret; + +- debug("VSC:Initializing VSC3308 at I2C address 0x%x for Tx\n", ++printf("VSC:Initializing VSC3308 at I2C address 0x%x for Tx\n", + vsc_addr); + + #if CONFIG_IS_ENABLED(DM_I2C) +@@ -383,7 +383,7 @@ int vsc3308_config(unsigned int vsc_addr, const int8_t con_arr[][2], + u8 rev_id = 0; + int ret; + +- debug("VSC:Initializing VSC3308 at I2C address 0x%x" ++printf("VSC:Initializing VSC3308 at I2C address 0x%x" + " for Tx\n", vsc_addr); + #if CONFIG_IS_ENABLED(DM_I2C) + int bus_num = 0; +@@ -505,7 +505,7 @@ int vsc3308_config(unsigned int vsc_addr, const int8_t con_arr[][2], + + void vsc_wp_config(unsigned int vsc_addr) + { +- debug("VSC:Configuring VSC at address:0x%x for WP\n", vsc_addr); ++printf("VSC:Configuring VSC at address:0x%x for WP\n", vsc_addr); + + /* For new crosspoint configuration to occur, WP bit of + * CORE_CONFIG_REG should be set 1 and then reset to 0 */ +diff --git a/board/freescale/common/zm7300.c b/board/freescale/common/zm7300.c +index 03679e723..8ad210b1e 100644 +--- a/board/freescale/common/zm7300.c ++++ b/board/freescale/common/zm7300.c +@@ -91,7 +91,7 @@ u8 dpm_rrp(uchar r) + ret[2] = r; + i2c_read(I2C_DPM_ADDR, 0, -3, ret, 2); + if (ret[1] == DPM_SUCCESS) { /* the DPM returned success as status */ +- debug("RRP_OPCODE returned success data is %x\n", ret[0]); ++printf("RRP_OPCODE returned success data is %x\n", ret[0]); + return ret[0]; + } else { + return -1; +@@ -108,7 +108,7 @@ int dpm_wrm(u8 r, u8 d) + ret[2] = d; + i2c_read(I2C_DPM_ADDR, 0, -3, ret, 1); + if (ret[0] == DPM_SUCCESS) { /* the DPM returned success as status */ +- debug("WRM_OPCODE returned success data is %x\n", ret[0]); ++printf("WRM_OPCODE returned success data is %x\n", ret[0]); + return ret[0]; + } else { + return -1; +@@ -130,7 +130,7 @@ int dpm_wrp(u8 r, u8 d) + ret[6] = d; + i2c_read(I2C_DPM_ADDR, 0, -7, ret, 1); + if (ret[0] == DPM_SUCCESS) { /* the DPM returned success as status */ +- debug("WRP_OPCODE returned success data is %x\n", ret[0]); ++printf("WRP_OPCODE returned success data is %x\n", ret[0]); + return 0; + } else { + return -1; +@@ -180,7 +180,7 @@ int zm_write_voltage(int voltage) + ret = zm_write(reg, vid); + if (ret != -1) { + voltage_read = hex_to_1_10mv[ret]; +- debug("voltage set to %dmV\n", voltage_read/10); ++printf("voltage set to %dmV\n", voltage_read/10); + return voltage_read; + } + return -1; +@@ -198,7 +198,7 @@ int zm_read_voltage(void) + ret = zm_read(reg); + if (ret != -1) { + voltage = hex_to_1_10mv[ret]; +- debug("Voltage read is %dmV\n", voltage/10); ++printf("Voltage read is %dmV\n", voltage/10); + return voltage; + } else { + return -1; +diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c +index 2c440673e..f5296719d 100644 +--- a/board/freescale/corenet_ds/ddr.c ++++ b/board/freescale/corenet_ds/ddr.c +@@ -280,7 +280,7 @@ int dram_init(void) + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; + +- debug(" DDR: "); ++printf(" DDR: "); + gd->ram_size = dram_size; + + return 0; +diff --git a/board/freescale/corenet_ds/eth_superhydra.c b/board/freescale/corenet_ds/eth_superhydra.c +index de7b692f3..ddc5c81c3 100644 +--- a/board/freescale/corenet_ds/eth_superhydra.c ++++ b/board/freescale/corenet_ds/eth_superhydra.c +@@ -312,7 +312,7 @@ void fdt_fixup_board_enet(void *fdt) + slot = lane_to_slot[lane]; + sprintf(alias, "hydra_sg_slot%u", slot); + fdt_status_okay_by_alias(fdt, alias); +- debug("Enabled MDIO node %s (slot %i)\n", ++printf("Enabled MDIO node %s (slot %i)\n", + alias, slot); + } + break; +@@ -321,7 +321,7 @@ void fdt_fixup_board_enet(void *fdt) + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_ID: + fdt_status_okay_by_alias(fdt, "hydra_rg"); +- debug("Enabled MDIO node hydra_rg\n"); ++printf("Enabled MDIO node hydra_rg\n"); + break; + default: + break; +@@ -335,7 +335,7 @@ void fdt_fixup_board_enet(void *fdt) + slot = lane_to_slot[lane]; + sprintf(alias, "hydra_xg_slot%u", slot); + fdt_status_okay_by_alias(fdt, alias); +- debug("Enabled MDIO node %s (slot %i)\n", alias, slot); ++printf("Enabled MDIO node %s (slot %i)\n", alias, slot); + } + + #if CONFIG_SYS_NUM_FMAN == 2 +@@ -351,7 +351,7 @@ void fdt_fixup_board_enet(void *fdt) + slot = lane_to_slot[lane]; + sprintf(alias, "hydra_sg_slot%u", slot); + fdt_status_okay_by_alias(fdt, alias); +- debug("Enabled MDIO node %s (slot %i)\n", ++printf("Enabled MDIO node %s (slot %i)\n", + alias, slot); + } + break; +@@ -360,7 +360,7 @@ void fdt_fixup_board_enet(void *fdt) + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_ID: + fdt_status_okay_by_alias(fdt, "hydra_rg"); +- debug("Enabled MDIO node hydra_rg\n"); ++printf("Enabled MDIO node hydra_rg\n"); + break; + default: + break; +@@ -374,7 +374,7 @@ void fdt_fixup_board_enet(void *fdt) + slot = lane_to_slot[lane]; + sprintf(alias, "hydra_xg_slot%u", slot); + fdt_status_okay_by_alias(fdt, alias); +- debug("Enabled MDIO node %s (slot %i)\n", alias, slot); ++printf("Enabled MDIO node %s (slot %i)\n", alias, slot); + } + #endif /* CONFIG_SYS_NUM_FMAN == 2 */ + #endif /* CONFIG_FMAN_ENET */ +@@ -528,7 +528,7 @@ int board_eth_init(struct bd_info *bis) + break; + slot = lane_to_slot[lane]; + mdio_mux[i].mask = BRDCFG1_EMI1_SEL_MASK; +- debug("FM1@DTSEC%u expects SGMII in slot %u\n", ++printf("FM1@DTSEC%u expects SGMII in slot %u\n", + idx + 1, slot); + switch (slot) { + case 1: +@@ -572,7 +572,7 @@ int board_eth_init(struct bd_info *bis) + * second on-board RGMII port. The other DTSECs cannot + * be routed to RGMII. + */ +- debug("FM1@DTSEC%u is RGMII at address %u\n", ++printf("FM1@DTSEC%u is RGMII at address %u\n", + idx + 1, 0); + fm_info_set_phy_address(i, 0); + mdio_mux[i].mask = BRDCFG1_EMI1_SEL_MASK; +@@ -645,7 +645,7 @@ int board_eth_init(struct bd_info *bis) + */ + lane = serdes_get_first_lane(XAUI_FM1); + if (lane >= 0) { +- debug("FM1@TGEC1 expects XAUI in slot %u\n", lane_to_slot[lane]); ++printf("FM1@TGEC1 expects XAUI in slot %u\n", lane_to_slot[lane]); + mdio_mux[i].mask = BRDCFG1_EMI2_SEL_MASK; + mdio_mux[i].val = BRDCFG1_EMI2_SEL_SLOT2; + super_hydra_mdio_set_mux("SUPER_HYDRA_FM1_TGEC_MDIO", +@@ -666,7 +666,7 @@ int board_eth_init(struct bd_info *bis) + break; + slot = lane_to_slot[lane]; + mdio_mux[i].mask = BRDCFG1_EMI1_SEL_MASK; +- debug("FM2@DTSEC%u expects SGMII in slot %u\n", ++printf("FM2@DTSEC%u expects SGMII in slot %u\n", + idx + 1, slot); + switch (slot) { + case 1: +@@ -722,7 +722,7 @@ int board_eth_init(struct bd_info *bis) + * second on-board RGMII port. The other DTSECs cannot + * be routed to RGMII. + */ +- debug("FM2@DTSEC%u is RGMII at address %u\n", ++printf("FM2@DTSEC%u is RGMII at address %u\n", + idx + 1, 1); + fm_info_set_phy_address(i, 1); + mdio_mux[i].mask = BRDCFG1_EMI1_SEL_MASK; +@@ -764,7 +764,7 @@ int board_eth_init(struct bd_info *bis) + */ + lane = serdes_get_first_lane(XAUI_FM2); + if (lane >= 0) { +- debug("FM2@TGEC1 expects XAUI in slot %u\n", lane_to_slot[lane]); ++printf("FM2@TGEC1 expects XAUI in slot %u\n", lane_to_slot[lane]); + mdio_mux[i].mask = BRDCFG1_EMI2_SEL_MASK; + mdio_mux[i].val = BRDCFG1_EMI2_SEL_SLOT1; + super_hydra_mdio_set_mux("SUPER_HYDRA_FM2_TGEC_MDIO", +diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c +index 4ef7f6f18..48b5d397a 100644 +--- a/board/freescale/imx8mm_evk/spl.c ++++ b/board/freescale/imx8mm_evk/spl.c +@@ -58,7 +58,7 @@ void spl_board_init(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -146,7 +146,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c +index 03f2a56e8..d2f5fdc26 100644 +--- a/board/freescale/imx8mn_evk/spl.c ++++ b/board/freescale/imx8mn_evk/spl.c +@@ -104,7 +104,7 @@ int power_init_board(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -154,7 +154,7 @@ void board_init_f(ulong dummy) + + ret = spl_init(); + if (ret) { +- debug("spl_init() failed: %d\n", ret); ++printf("spl_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c +index a7564e9b1..d1ccb5993 100644 +--- a/board/freescale/imx8mp_evk/spl.c ++++ b/board/freescale/imx8mp_evk/spl.c +@@ -109,7 +109,7 @@ int power_init_board(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -128,7 +128,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_init() failed: %d\n", ret); ++printf("spl_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c +index e8e0efe48..f8e25c9aa 100644 +--- a/board/freescale/imx8mq_evk/spl.c ++++ b/board/freescale/imx8mq_evk/spl.c +@@ -206,7 +206,7 @@ void spl_board_init(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -234,7 +234,7 @@ void board_init_f(ulong dummy) + + ret = spl_init(); + if (ret) { +- debug("spl_init() failed: %d\n", ret); ++printf("spl_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/freescale/imx8qm_mek/spl.c b/board/freescale/imx8qm_mek/spl.c +index 944ba745c..4b78d27a0 100644 +--- a/board/freescale/imx8qm_mek/spl.c ++++ b/board/freescale/imx8qm_mek/spl.c +@@ -51,7 +51,7 @@ void spl_board_prepare_for_boot(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +diff --git a/board/freescale/imx8qxp_mek/spl.c b/board/freescale/imx8qxp_mek/spl.c +index ae6b64ff6..7d7fe7d3b 100644 +--- a/board/freescale/imx8qxp_mek/spl.c ++++ b/board/freescale/imx8qxp_mek/spl.c +@@ -69,7 +69,7 @@ void spl_board_prepare_for_boot(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +diff --git a/board/freescale/imxrt1020-evk/imxrt1020-evk.c b/board/freescale/imxrt1020-evk/imxrt1020-evk.c +index 479e66bdd..721ba5b23 100644 +--- a/board/freescale/imxrt1020-evk/imxrt1020-evk.c ++++ b/board/freescale/imxrt1020-evk/imxrt1020-evk.c +@@ -24,7 +24,7 @@ int dram_init(void) + + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) { +- debug("DRAM init failed: %d\n", rv); ++printf("DRAM init failed: %d\n", rv); + return rv; + } + +@@ -41,7 +41,7 @@ int dram_init_banksize(void) + #ifdef CONFIG_SPL_OS_BOOT + int spl_start_uboot(void) + { +- debug("SPL: booting kernel\n"); ++printf("SPL: booting kernel\n"); + /* break into full u-boot on 'c' */ + return serial_tstc() && serial_getc() == 'c'; + } +@@ -54,7 +54,7 @@ int spl_dram_init(void) + + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) +- debug("DRAM init failed: %d\n", rv); ++printf("DRAM init failed: %d\n", rv); + return rv; + } + +diff --git a/board/freescale/imxrt1050-evk/imxrt1050-evk.c b/board/freescale/imxrt1050-evk/imxrt1050-evk.c +index eb492390d..deffae478 100644 +--- a/board/freescale/imxrt1050-evk/imxrt1050-evk.c ++++ b/board/freescale/imxrt1050-evk/imxrt1050-evk.c +@@ -24,7 +24,7 @@ int dram_init(void) + + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) { +- debug("DRAM init failed: %d\n", rv); ++printf("DRAM init failed: %d\n", rv); + return rv; + } + +@@ -41,7 +41,7 @@ int dram_init_banksize(void) + #ifdef CONFIG_SPL_OS_BOOT + int spl_start_uboot(void) + { +- debug("SPL: booting kernel\n"); ++printf("SPL: booting kernel\n"); + /* break into full u-boot on 'c' */ + return serial_tstc() && serial_getc() == 'c'; + } +@@ -54,7 +54,7 @@ int spl_dram_init(void) + + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) +- debug("DRAM init failed: %d\n", rv); ++printf("DRAM init failed: %d\n", rv); + return rv; + } + +diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c +index 66fe1519c..557172c99 100644 +--- a/board/freescale/ls1021aqds/ddr.c ++++ b/board/freescale/ls1021aqds/ddr.c +@@ -66,7 +66,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb); + + /* force DDR bus width to 32 bits */ +diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c +index aa1f6025c..2fb3ebb09 100644 +--- a/board/freescale/ls1021aqds/ls1021aqds.c ++++ b/board/freescale/ls1021aqds/ls1021aqds.c +@@ -260,17 +260,17 @@ void config_etseccm_source(int etsec_gtx_125_mux) + switch (etsec_gtx_125_mux) { + case GE0_CLK125: + out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE0_CLK125); +- debug("etseccm set to GE0_CLK125\n"); ++printf("etseccm set to GE0_CLK125\n"); + break; + + case GE2_CLK125: + out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125); +- debug("etseccm set to GE2_CLK125\n"); ++printf("etseccm set to GE2_CLK125\n"); + break; + + case GE1_CLK125: + out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE1_CLK125); +- debug("etseccm set to GE1_CLK125\n"); ++printf("etseccm set to GE1_CLK125\n"); + break; + + default: +diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c +index 23947bdb8..4c914c4dd 100644 +--- a/board/freescale/ls1043aqds/ddr.c ++++ b/board/freescale/ls1043aqds/ddr.c +@@ -66,7 +66,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb); + + /* force DDR bus width to 32 bits */ +diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c +index c3efe8a0b..750f22ead 100644 +--- a/board/freescale/ls1043aqds/eth.c ++++ b/board/freescale/ls1043aqds/eth.c +@@ -447,7 +447,7 @@ int board_eth_init(struct bd_info *bis) + break; + + slot = lane_to_slot[lane]; +- debug("FM1@DTSEC%u expects SGMII in slot %u\n", ++printf("FM1@DTSEC%u expects SGMII in slot %u\n", + idx + 1, slot); + if (QIXIS_READ(present2) & (1 << (slot - 1))) + fm_disable_port(i); +diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c +index 5b131d1d6..577f6b712 100644 +--- a/board/freescale/ls1043aqds/ls1043aqds.c ++++ b/board/freescale/ls1043aqds/ls1043aqds.c +@@ -365,7 +365,7 @@ void board_retimer_init(void) + + /* Read device revision and ID */ + dm_i2c_read(dev, 1, ®, 1); +- debug("Retimer version id = 0x%x\n", reg); ++printf("Retimer version id = 0x%x\n", reg); + + /* Enable Broadcast. All writes target all channel register sets */ + reg = 0x0c; +@@ -412,7 +412,7 @@ void board_retimer_init(void) + + /* Read device revision and ID */ + i2c_read(I2C_RETIMER_ADDR, 1, 1, ®, 1); +- debug("Retimer version id = 0x%x\n", reg); ++printf("Retimer version id = 0x%x\n", reg); + + /* Enable Broadcast. All writes target all channel register sets */ + reg = 0x0c; +diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c +index 08b43ff5e..5eb24f1ae 100644 +--- a/board/freescale/ls1043ardb/ddr.c ++++ b/board/freescale/ls1043ardb/ddr.c +@@ -67,7 +67,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb); + + /* force DDR bus width to 32 bits */ +diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c +index 9a96de271..b77e80ffc 100644 +--- a/board/freescale/ls1046aqds/ddr.c ++++ b/board/freescale/ls1046aqds/ddr.c +@@ -63,7 +63,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb); + + popts->data_bus_width = 0; /* 64b data bus */ +diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c +index 33db552ad..9d3a505f2 100644 +--- a/board/freescale/ls1046aqds/eth.c ++++ b/board/freescale/ls1046aqds/eth.c +@@ -382,7 +382,7 @@ int board_eth_init(struct bd_info *bis) + break; + + slot = lane_to_slot[lane]; +- debug("FM1@DTSEC%u expects SGMII in slot %u\n", ++printf("FM1@DTSEC%u expects SGMII in slot %u\n", + idx + 1, slot); + if (QIXIS_READ(present2) & (1 << (slot - 1))) + fm_disable_port(i); +diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c +index befb556bd..fe007f2d2 100644 +--- a/board/freescale/ls1046ardb/ddr.c ++++ b/board/freescale/ls1046ardb/ddr.c +@@ -66,7 +66,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb); + + popts->data_bus_width = 0; /* 64-bit data bus */ +diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c +index 995c42960..63e08d80a 100644 +--- a/board/freescale/ls1088a/ddr.c ++++ b/board/freescale/ls1088a/ddr.c +@@ -26,7 +26,7 @@ static void fsl_ddr_setup_0v9_volt(memctl_options_t *popts) + + if (vdd == 900) { + popts->ddr_cdr1 |= DDR_CDR1_V0PT9_EN; +- debug("VID: configure DDR to support 900 mV\n"); ++printf("VID: configure DDR to support 900 mV\n"); + } + } + #endif +@@ -82,7 +82,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" + "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, wrlvl_ctrl_3 0x%x\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb, + pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2, +diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c +index 140733de6..db7913607 100644 +--- a/board/freescale/ls1088a/eth_ls1088aqds.c ++++ b/board/freescale/ls1088a/eth_ls1088aqds.c +@@ -154,7 +154,7 @@ static void sgmii_configure_repeater(int dpmac) + goto error; + + bus = mdio_get_current_dev(); +- debug("Reading from bus %s\n", bus->name); ++printf("Reading from bus %s\n", bus->name); + + ret = miiphy_write(dev, phy_addr, 0x1f, 3); + if (ret > 0) +diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c +index f5dc449d8..f10fb3faa 100644 +--- a/board/freescale/ls1088a/ls1088a.c ++++ b/board/freescale/ls1088a/ls1088a.c +@@ -461,7 +461,7 @@ void board_retimer_init(void) + #else + dm_i2c_read(dev, 1, ®, 1); + #endif +- debug("Retimer version id = 0x%x\n", reg); ++printf("Retimer version id = 0x%x\n", reg); + + /* Enable Broadcast. All writes target all channel register sets */ + reg = 0x0c; +@@ -549,7 +549,7 @@ void board_retimer_init(void) + #else + dm_i2c_read(dev, 1, ®, 1); + #endif +- debug("Retimer version id = 0x%x\n", reg); ++printf("Retimer version id = 0x%x\n", reg); + + /* Enable Broadcast. All writes target all channel register sets */ + reg = 0x0c; +@@ -789,7 +789,7 @@ int set_serdes_volt(int svdd) + #endif + + if (ret) { +- debug("VID: I2C failed to set the SVDD CPLD BRDCFG4\n"); ++printf("VID: I2C failed to set the SVDD CPLD BRDCFG4\n"); + return -1; + } + +@@ -805,7 +805,7 @@ int board_adjust_vdd(int vdd) + { + int ret = 0; + +- debug("%s: vdd = %d\n", __func__, vdd); ++printf("%s: vdd = %d\n", __func__, vdd); + + /* Special settings to be performed when voltage is 900mV */ + if (vdd == 900) { +diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c +index 2767d058c..35920668c 100644 +--- a/board/freescale/ls2080aqds/ddr.c ++++ b/board/freescale/ls2080aqds/ddr.c +@@ -79,7 +79,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" + "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, wrlvl_ctrl_3 0x%x\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb, + pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2, +diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c +index 914cd0a9a..2b670f3b7 100644 +--- a/board/freescale/ls2080aqds/eth.c ++++ b/board/freescale/ls2080aqds/eth.c +@@ -168,7 +168,7 @@ static void sgmii_configure_repeater(int serdes_port) + goto error; + + bus = mdio_get_current_dev(); +- debug("Reading from bus %s\n", bus->name); ++printf("Reading from bus %s\n", bus->name); + + ret = miiphy_write(dev[mii_bus], riser_phy_addr[dpmac], 0x1f, + 3); +diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c +index 07fa84733..0e805cad8 100644 +--- a/board/freescale/ls2080ardb/ddr.c ++++ b/board/freescale/ls2080ardb/ddr.c +@@ -79,7 +79,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" + "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, wrlvl_ctrl_3 0x%x\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb, + pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2, +diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c b/board/freescale/lx2160a/eth_lx2160aqds.c +index 437f0bc4c..96d92963b 100644 +--- a/board/freescale/lx2160a/eth_lx2160aqds.c ++++ b/board/freescale/lx2160a/eth_lx2160aqds.c +@@ -622,7 +622,7 @@ int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle) + } + + sprintf(dpmac_str, "dpmac@%x", dpmac_id); +- debug("dpmac_str = %s\n", dpmac_str); ++printf("dpmac_str = %s\n", dpmac_str); + + offset = fdt_subnode_offset(fdt, offset, dpmac_str); + if (offset < 0) { +@@ -666,7 +666,7 @@ int fdt_get_ioslot_offset(void *fdt, struct mii_dev *mii_dev, int fpga_offset) + /*Get the real MDIO bus num and ioslot info from bus's priv data*/ + priv = mii_dev->priv; + +- debug("real_bus_num = %d, ioslot = %d\n", ++printf("real_bus_num = %d, ioslot = %d\n", + priv->realbusnum, priv->ioslot); + + if (priv->realbusnum == EMI1) +@@ -714,7 +714,7 @@ int fdt_create_phy_node(void *fdt, int offset, u8 phyaddr, int *subnodeoffset, + int ret; + + sprintf(phy_node_name, "ethernet-phy@%x", phyaddr); +- debug("phy_node_name = %s\n", phy_node_name); ++printf("phy_node_name = %s\n", phy_node_name); + + *subnodeoffset = fdt_add_subnode(fdt, offset, phy_node_name); + if (*subnodeoffset <= 0) { +@@ -726,7 +726,7 @@ int fdt_create_phy_node(void *fdt, int offset, u8 phyaddr, int *subnodeoffset, + + sprintf(phy_id_compatible_str, "ethernet-phy-id%04x.%04x,", + phy_dev->phy_id >> 16, phy_dev->phy_id & 0xFFFF); +- debug("phy_id_compatible_str %s\n", phy_id_compatible_str); ++printf("phy_id_compatible_str %s\n", phy_id_compatible_str); + + ret = fdt_setprop_string(fdt, *subnodeoffset, "compatible", + phy_id_compatible_str); +@@ -799,7 +799,7 @@ int fdt_fixup_board_phy(void *fdt) + + list_for_each(entry, mii_devs) { + mii_dev = list_entry(entry, struct mii_dev, link); +- debug("mii_dev name : %s\n", mii_dev->name); ++printf("mii_dev name : %s\n", mii_dev->name); + offset = fdt_get_ioslot_offset(fdt, mii_dev, fpga_offset); + if (offset < 0) + continue; +diff --git a/board/freescale/lx2160a/eth_lx2162aqds.c b/board/freescale/lx2160a/eth_lx2162aqds.c +index b742c1ff5..11f9def68 100644 +--- a/board/freescale/lx2160a/eth_lx2162aqds.c ++++ b/board/freescale/lx2160a/eth_lx2162aqds.c +@@ -631,7 +631,7 @@ int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle) + } + + sprintf(dpmac_str, "dpmac@%x", dpmac_id); +- debug("dpmac_str = %s\n", dpmac_str); ++printf("dpmac_str = %s\n", dpmac_str); + + offset = fdt_subnode_offset(fdt, offset, dpmac_str); + if (offset < 0) { +@@ -675,7 +675,7 @@ int fdt_get_ioslot_offset(void *fdt, struct mii_dev *mii_dev, int fpga_offset) + /*Get the real MDIO bus num and ioslot info from bus's priv data*/ + priv = mii_dev->priv; + +- debug("real_bus_num = %d, ioslot = %d\n", ++printf("real_bus_num = %d, ioslot = %d\n", + priv->realbusnum, priv->ioslot); + + if (priv->realbusnum == EMI1) +@@ -723,7 +723,7 @@ int fdt_create_phy_node(void *fdt, int offset, u8 phyaddr, int *subnodeoffset, + int ret; + + sprintf(phy_node_name, "ethernet-phy@%x", phyaddr); +- debug("phy_node_name = %s\n", phy_node_name); ++printf("phy_node_name = %s\n", phy_node_name); + + *subnodeoffset = fdt_add_subnode(fdt, offset, phy_node_name); + if (*subnodeoffset <= 0) { +@@ -735,7 +735,7 @@ int fdt_create_phy_node(void *fdt, int offset, u8 phyaddr, int *subnodeoffset, + + sprintf(phy_id_compatible_str, "ethernet-phy-id%04x.%04x,", + phy_dev->phy_id >> 16, phy_dev->phy_id & 0xFFFF); +- debug("phy_id_compatible_str %s\n", phy_id_compatible_str); ++printf("phy_id_compatible_str %s\n", phy_id_compatible_str); + + ret = fdt_setprop_string(fdt, *subnodeoffset, "compatible", + phy_id_compatible_str); +@@ -811,7 +811,7 @@ int fdt_fixup_board_phy(void *fdt) + + list_for_each(entry, mii_devs) { + mii_dev = list_entry(entry, struct mii_dev, link); +- debug("mii_dev name : %s\n", mii_dev->name); ++printf("mii_dev name : %s\n", mii_dev->name); + offset = fdt_get_ioslot_offset(fdt, mii_dev, fpga_offset); + if (offset < 0) + continue; +diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c +index 7b379464c..fb62b8029 100644 +--- a/board/freescale/mpc8568mds/mpc8568mds.c ++++ b/board/freescale/mpc8568mds/mpc8568mds.c +@@ -305,7 +305,7 @@ void pci_init_board(void) + porpllsr = in_be32(&gur->porpllsr); + io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; + +- debug(" %s: devdisr=%x, io_sel=%x\n", __func__, devdisr, io_sel); ++printf(" %s: devdisr=%x, io_sel=%x\n", __func__, devdisr, io_sel); + + pci_speed = 66666000; + pci_32 = 1; +diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c +index 910058cef..a15404ba5 100644 +--- a/board/freescale/p2041rdb/ddr.c ++++ b/board/freescale/p2041rdb/ddr.c +@@ -137,7 +137,7 @@ int dram_init(void) + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; + +- debug(" DDR: "); ++printf(" DDR: "); + gd->ram_size = dram_size; + + return 0; +diff --git a/board/freescale/t102xrdb/ddr.c b/board/freescale/t102xrdb/ddr.c +index 818c20cf1..1ffb41297 100644 +--- a/board/freescale/t102xrdb/ddr.c ++++ b/board/freescale/t102xrdb/ddr.c +@@ -99,11 +99,11 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb); +- debug("\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, ", ++printf("\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, ", + pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2); +- debug("wrlvl_ctrl_3 0x%x\n", pbsp->wrlvl_ctl_3); ++printf("wrlvl_ctrl_3 0x%x\n", pbsp->wrlvl_ctl_3); + + /* + * Factors to consider for half-strength driver enable: +diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c +index 8351f7ce9..af7c8339f 100644 +--- a/board/freescale/t104xrdb/ddr.c ++++ b/board/freescale/t104xrdb/ddr.c +@@ -67,7 +67,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" + "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, " + "wrlvl_ctrl_3 0x%x\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb, +diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c +index 780043483..a406e60fe 100644 +--- a/board/freescale/t104xrdb/t104xrdb.c ++++ b/board/freescale/t104xrdb/t104xrdb.c +@@ -119,7 +119,7 @@ int misc_init_r(void) + } + /* Mask all CPLD interrupt sources, except QSGMII interrupts */ + if (CPLD_READ(sw_ver) < 0x03) { +- debug("CPLD SW version 0x%02x doesn't support int_mask\n", ++printf("CPLD SW version 0x%02x doesn't support int_mask\n", + CPLD_READ(sw_ver)); + } else { + CPLD_WRITE(int_mask, CPLD_INT_MASK_ALL & +diff --git a/board/freescale/t208xqds/ddr.c b/board/freescale/t208xqds/ddr.c +index 56471b398..d39ad2383 100644 +--- a/board/freescale/t208xqds/ddr.c ++++ b/board/freescale/t208xqds/ddr.c +@@ -72,7 +72,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" + "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, " + "wrlvl_ctrl_3 0x%x\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb, +diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c +index 705387af3..236b03fb8 100644 +--- a/board/freescale/t208xqds/eth_t208xqds.c ++++ b/board/freescale/t208xqds/eth_t208xqds.c +@@ -635,7 +635,7 @@ int board_eth_init(struct bd_info *bis) + if (lane < 0) + break; + slot = lane_to_slot[lane]; +- debug("FM1@DTSEC%u expects SGMII in slot %u\n", ++printf("FM1@DTSEC%u expects SGMII in slot %u\n", + idx + 1, slot); + if (QIXIS_READ(present2) & (1 << (slot - 1))) + fm_disable_port(i); +diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c +index fd3217f24..2abb1d320 100644 +--- a/board/freescale/t208xqds/t208xqds.c ++++ b/board/freescale/t208xqds/t208xqds.c +@@ -357,7 +357,7 @@ unsigned long get_board_sys_clk(void) + + val = freq * base; + if (val) { +- debug("SYS Clock measurement is: %d\n", val); ++printf("SYS Clock measurement is: %d\n", val); + return val; + } else { + printf("Warning: SYS clock measurement is invalid, "); +@@ -395,7 +395,7 @@ unsigned long get_board_ddr_clk(void) + + val = freq * base; + if (val) { +- debug("DDR Clock measurement is: %d\n", val); ++printf("DDR Clock measurement is: %d\n", val); + return val; + } else { + printf("Warning: DDR clock measurement is invalid, "); +diff --git a/board/freescale/t208xrdb/ddr.c b/board/freescale/t208xrdb/ddr.c +index 1fbab36e1..474c3ec84 100644 +--- a/board/freescale/t208xrdb/ddr.c ++++ b/board/freescale/t208xrdb/ddr.c +@@ -65,7 +65,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" + "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, " + "wrlvl_ctrl_3 0x%x\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb, +diff --git a/board/freescale/t4rdb/ddr.c b/board/freescale/t4rdb/ddr.c +index 57cbde154..08988bd1f 100644 +--- a/board/freescale/t4rdb/ddr.c ++++ b/board/freescale/t4rdb/ddr.c +@@ -73,7 +73,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, + panic("DIMM is not supported by this board"); + } + found: +- debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" ++printf("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" + "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x,\n" + "wrlvl_ctrl_3 0x%x\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb, +diff --git a/board/friendlyarm/nanopi2/board.c b/board/friendlyarm/nanopi2/board.c +index c0fe2d546..562120c35 100644 +--- a/board/friendlyarm/nanopi2/board.c ++++ b/board/friendlyarm/nanopi2/board.c +@@ -470,7 +470,7 @@ int splash_screen_prepare(void) + int err; + char *env_cmd = env_get("load_splash"); + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + if (env_cmd) { + err = run_command(env_cmd, 0); +diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c +index 8a3a6e348..2b536fcd8 100644 +--- a/board/gardena/smart-gateway-mt7688/board.c ++++ b/board/gardena/smart-gateway-mt7688/board.c +@@ -171,7 +171,7 @@ static void factory_data_env_config(void) + printf("F-Data:Values don't match env values -> saving\n"); + env_save(); + } else { +- debug("F-Data:Values match current env values\n"); ++printf("F-Data:Values match current env values\n"); + } + + err_spi_flash: +diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c +index 4627a156f..d2f2bf25a 100644 +--- a/board/gateworks/gw_ventana/common.c ++++ b/board/gateworks/gw_ventana/common.c +@@ -1555,7 +1555,7 @@ void setup_pmic(void) + + /* configure PFUZE100 PMIC */ + if (!i2c_probe(CONFIG_POWER_PFUZE100_I2C_ADDR)) { +- debug("probed PFUZE100@0x%x\n", CONFIG_POWER_PFUZE100_I2C_ADDR); ++printf("probed PFUZE100@0x%x\n", CONFIG_POWER_PFUZE100_I2C_ADDR); + power_pfuze100_init(i2c_pmic); + p = pmic_get("PFUZE100"); + if (p && !pmic_probe(p)) { +@@ -1578,7 +1578,7 @@ void setup_pmic(void) + + /* configure LTC3676 PMIC */ + else if (!i2c_probe(CONFIG_POWER_LTC3676_I2C_ADDR)) { +- debug("probed LTC3676@0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR); ++printf("probed LTC3676@0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR); + power_ltc3676_init(i2c_pmic); + p = pmic_get("LTC3676_PMIC"); + if (!p || pmic_probe(p)) +@@ -1733,7 +1733,7 @@ int board_mmc_getcd(struct mmc *mmc) + } + + if (gpio) { +- debug("%s: gpio%d=%d\n", __func__, gpio, gpio_get_value(gpio)); ++printf("%s: gpio%d=%d\n", __func__, gpio, gpio_get_value(gpio)); + return !gpio_get_value(gpio); + } + +diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c +index b9862c7df..11be7f113 100644 +--- a/board/gateworks/gw_ventana/eeprom.c ++++ b/board/gateworks/gw_ventana/eeprom.c +@@ -197,9 +197,9 @@ static int do_econfig(struct cmd_tbl *cmdtp, int flag, int argc, + memcpy(info->config, econfig_bytes, sizeof(econfig_bytes)); + for (chksum = 0, i = 0; i < sizeof(*info)-2; i++) + chksum += buf[i]; +- debug("old chksum:0x%04x\n", ++printf("old chksum:0x%04x\n", + (info->chksum[0] << 8) | info->chksum[1]); +- debug("new chksum:0x%04x\n", chksum); ++printf("new chksum:0x%04x\n", chksum); + info->chksum[0] = chksum >> 8; + info->chksum[1] = chksum & 0xff; + +diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c +index ffed6b5fc..0ff8eb90e 100644 +--- a/board/gateworks/gw_ventana/gsc.c ++++ b/board/gateworks/gw_ventana/gsc.c +@@ -36,7 +36,7 @@ int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len) + ret = i2c_read(chip, addr, alen, buf, len); + if (!ret) + break; +- debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, ++printf("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, + n, ret); + if (ret != -ENODEV) + break; +@@ -55,7 +55,7 @@ int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) + ret = i2c_write(chip, addr, alen, buf, len); + if (!ret) + break; +- debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, ++printf("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr, + n, ret); + if (ret != -ENODEV) + break; +diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c +index 1ed9c1a39..b3f88ffce 100644 +--- a/board/gateworks/gw_ventana/gw_ventana.c ++++ b/board/gateworks/gw_ventana/gw_ventana.c +@@ -132,7 +132,7 @@ int mv88e61xx_hw_reset(struct phy_device *phydev) + struct mii_dev *bus = phydev->bus; + + /* GPIO[0] output, CLK125 */ +- debug("enabling RGMII_REFCLK\n"); ++printf("enabling RGMII_REFCLK\n"); + bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0, + 0x1a /*MV_SCRATCH_MISC*/, + (1 << 15) | (0x62 /*MV_GPIO_DIR*/ << 8) | 0xfe); +@@ -141,7 +141,7 @@ int mv88e61xx_hw_reset(struct phy_device *phydev) + (1 << 15) | (0x68 /*MV_GPIO01_CNTL*/ << 8) | 7); + + /* RGMII delay - Physical Control register bit[15:14] */ +- debug("setting port%d RGMII rx/tx delay\n", CONFIG_MV88E61XX_CPU_PORT); ++printf("setting port%d RGMII rx/tx delay\n", CONFIG_MV88E61XX_CPU_PORT); + /* forced 1000mbps full-duplex link */ + bus->write(bus, 0x10 + CONFIG_MV88E61XX_CPU_PORT, 0, 1, 0xc0fe); + phydev->autoneg = AUTONEG_DISABLE; +@@ -398,7 +398,7 @@ void board_pci_fixup_dev(struct udevice *bus, struct udevice *udev) + pci_dev_t dev = dm_pci_get_bdf(udev); + int i; + +- debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, ++printf("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, + PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device); + + /* store array of devs for later use in device-tree fixup */ +@@ -430,7 +430,7 @@ void board_pci_fixup_dev(struct udevice *bus, struct udevice *udev) + (device & 0xfff0) == 0x8600 && + PCI_DEV(dev) == 0 && PCI_FUNC(dev) == 0) { + ulong val; +- debug("configuring PLX 860X downstream PERST#\n"); ++printf("configuring PLX 860X downstream PERST#\n"); + pci_bus_read_config(bus, dev, 0x62c, &val, PCI_SIZE_32); + val |= 0xaaa8; /* GPIO1-7 outputs */ + pci_bus_write_config(bus, dev, 0x62c, val, PCI_SIZE_32); +@@ -1188,7 +1188,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) + + /* remove no-1-8-v if UHS-I support is present */ + if (gpio_cfg[board_type].usd_vsel) { +- debug("Enabling UHS-I support\n"); ++printf("Enabling UHS-I support\n"); + i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-usdhc", + USDHC3_ADDR); + if (i) +diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c +index a4f64395a..a2372122e 100644 +--- a/board/gateworks/gw_ventana/gw_ventana_spl.c ++++ b/board/gateworks/gw_ventana/gw_ventana_spl.c +@@ -528,7 +528,7 @@ static void spl_dram_init(int width, int size_mb, int board_model) + ; + else + calib = &mx6sdl_64x16_mmdc_calib; +- debug("1gB density\n"); ++printf("1gB density\n"); + } else if (width == 16 && size_mb == 256) { + /* 1x 2Gb density chip - same calib as 2x 2Gb */ + mem = &mt41k128m16jt_125; +@@ -536,19 +536,19 @@ static void spl_dram_init(int width, int size_mb, int board_model) + calib = &mx6dq_128x32_mmdc_calib; + else + calib = &mx6sdl_128x32_mmdc_calib; +- debug("2gB density\n"); ++printf("2gB density\n"); + } else if (width == 16 && size_mb == 512) { + mem = &mt41k256m16ha_125; + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_256x16_mmdc_calib; + else + calib = &mx6sdl_256x16_mmdc_calib; +- debug("4gB density\n"); ++printf("4gB density\n"); + } else if (width == 16 && size_mb == 1024) { + mem = &mt41k512m16ha_125; + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_512x32_mmdc_calib; +- debug("8gB density\n"); ++printf("8gB density\n"); + } else if (width == 32 && size_mb == 256) { + /* Same calib as width==16, size==128 */ + mem = &mt41k64m16jt_125; +@@ -556,29 +556,29 @@ static void spl_dram_init(int width, int size_mb, int board_model) + ; + else + calib = &mx6sdl_64x16_mmdc_calib; +- debug("1gB density\n"); ++printf("1gB density\n"); + } else if (width == 32 && size_mb == 512) { + mem = &mt41k128m16jt_125; + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_128x32_mmdc_calib; + else + calib = &mx6sdl_128x32_mmdc_calib; +- debug("2gB density\n"); ++printf("2gB density\n"); + } else if (width == 32 && size_mb == 1024) { + mem = &mt41k256m16ha_125; + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_256x32_mmdc_calib; + else + calib = &mx6sdl_256x32_mmdc_calib; +- debug("4gB density\n"); ++printf("4gB density\n"); + } else if (width == 32 && size_mb == 2048) { + mem = &mt41k512m16ha_125; + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_512x32_mmdc_calib; +- debug("8gB density\n"); ++printf("8gB density\n"); + } else if (width == 64 && size_mb == 512) { + mem = &mt41k64m16jt_125; +- debug("1gB density\n"); ++printf("1gB density\n"); + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_64x64_mmdc_calib; + else +@@ -589,13 +589,13 @@ static void spl_dram_init(int width, int size_mb, int board_model) + calib = &mx6dq_128x64_mmdc_calib; + else + calib = &mx6sdl_128x64_mmdc_calib; +- debug("2gB density\n"); ++printf("2gB density\n"); + } else if (width == 64 && size_mb == 2048) { + switch(board_model) { + case GW5905: + /* 8xMT41K128M16 (2GiB) fly-by mirrored 2-chipsels */ + mem = &mt41k128m16jt_125; +- debug("2gB density - 2 chipsel\n"); ++printf("2gB density - 2 chipsel\n"); + if (!is_cpu_type(MXC_CPU_MX6Q)) { + calib = &mx6sdl_128x64x2_mmdc_calib; + sysinfo.ncs = 2; +@@ -609,7 +609,7 @@ static void spl_dram_init(int width, int size_mb, int board_model) + calib = &mx6dq_256x64_mmdc_calib; + else + calib = &mx6sdl_256x64_mmdc_calib; +- debug("4gB density\n"); ++printf("4gB density\n"); + break; + } + } else if (width == 64 && size_mb == 4096) { +@@ -617,7 +617,7 @@ static void spl_dram_init(int width, int size_mb, int board_model) + case GW5903: + /* 8xMT41K256M16 (4GiB) fly-by mirrored 2-chipsels */ + mem = &mt41k256m16ha_125; +- debug("4gB density - 2 chipsel\n"); ++printf("4gB density - 2 chipsel\n"); + if (!is_cpu_type(MXC_CPU_MX6Q)) { + calib = &mx6sdl_256x64x2_mmdc_calib; + sysinfo.ncs = 2; +@@ -629,7 +629,7 @@ static void spl_dram_init(int width, int size_mb, int board_model) + mem = &mt41k512m16ha_125; + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_512x64_mmdc_calib; +- debug("8gB density\n"); ++printf("8gB density\n"); + break; + } + } +@@ -766,11 +766,11 @@ int spl_start_uboot(void) + { + unsigned char ret = 1; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + #ifdef CONFIG_SPL_ENV_SUPPORT + env_init(); + env_load(); +- debug("boot_os=%s\n", env_get("boot_os")); ++printf("boot_os=%s\n", env_get("boot_os")); + if (env_get_yesno("boot_os") == 1) + ret = 0; + #else +@@ -781,7 +781,7 @@ int spl_start_uboot(void) + if (!ret) + gsc_boot_wd_disable(); + +- debug("%s booting %s\n", __func__, ret ? "uboot" : "linux"); ++printf("%s booting %s\n", __func__, ret ? "uboot" : "linux"); + return ret; + } + #endif +diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c +index ea500d4f8..a1c6dd51d 100644 +--- a/board/gateworks/venice/spl.c ++++ b/board/gateworks/venice/spl.c +@@ -141,7 +141,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/gdsys/a38x/hre.c b/board/gdsys/a38x/hre.c +index de5411a6b..bf6cad1ea 100644 +--- a/board/gdsys/a38x/hre.c ++++ b/board/gdsys/a38x/hre.c +@@ -400,7 +400,7 @@ static const uint8_t *hre_execute_op(struct udevice *tpm, const uint8_t **ip, + dst_spec = (ins >> 12) & 0x3f; + data_size = (ins & 0x7ff); + +- debug("HRE: ins=%08x (op=%02x, s=%02x, d=%02x, L=%d)\n", ins, ++printf("HRE: ins=%08x (op=%02x, s=%02x, d=%02x, L=%d)\n", ins, + opcode, src_spec, dst_spec, data_size); + + if ((opcode & 0x80) && (data_size + 4) > *code_size) +diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c +index 23080c179..56f32f025 100644 +--- a/board/google/gru/gru.c ++++ b/board/google/gru/gru.c +@@ -47,7 +47,7 @@ int board_early_init_r(void) + ret = uclass_get_device_by_driver(UCLASS_CLK, + DM_DRIVER_GET(clk_rk3399), &clk); + if (ret) { +- debug("%s: CLK init failed: %d\n", __func__, ret); ++printf("%s: CLK init failed: %d\n", __func__, ret); + return ret; + } + +diff --git a/board/google/imx8mq_phanbell/spl.c b/board/google/imx8mq_phanbell/spl.c +index eec3f3d93..793516e6b 100644 +--- a/board/google/imx8mq_phanbell/spl.c ++++ b/board/google/imx8mq_phanbell/spl.c +@@ -143,7 +143,7 @@ void spl_board_init(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -171,7 +171,7 @@ void board_init_f(ulong dummy) + + ret = spl_init(); + if (ret) { +- debug("spl_init() failed: %d\n", ret); ++printf("spl_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/google/veyron/veyron.c b/board/google/veyron/veyron.c +index 32dbcdc4d..76beb7f5f 100644 +--- a/board/google/veyron/veyron.c ++++ b/board/google/veyron/veyron.c +@@ -30,7 +30,7 @@ static int veyron_init(void) + + ret = regulator_get_by_platname("vdd_arm", &dev); + if (ret) { +- debug("Cannot set regulator name\n"); ++printf("Cannot set regulator name\n"); + return ret; + } + +@@ -54,7 +54,7 @@ static int veyron_init(void) + + ret = regulator_get_by_platname("vcc33_sd", &dev); + if (ret) { +- debug("Cannot get regulator name\n"); ++printf("Cannot get regulator name\n"); + return ret; + } + +@@ -64,7 +64,7 @@ static int veyron_init(void) + + ret = regulators_enable_boot_on(false); + if (ret) { +- debug("%s: Cannot enable boot on regulators\n", __func__); ++printf("%s: Cannot enable boot on regulators\n", __func__); + return ret; + } + +@@ -91,7 +91,7 @@ int board_early_init_r(void) + */ + ret = rockchip_get_clk(&dev); + if (ret) { +- debug("CLK init failed: %d\n", ret); ++printf("CLK init failed: %d\n", ret); + return ret; + } + +diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c +index c9a2d60ee..1c4f0b609 100644 +--- a/board/hisilicon/hikey/hikey.c ++++ b/board/hisilicon/hikey/hikey.c +@@ -129,7 +129,7 @@ int board_uart_init(void) + hi6220_pinmux_config(PERIPH_ID_UART3); + break; + default: +- debug("%s: Unsupported UART selected\n", __func__); ++printf("%s: Unsupported UART selected\n", __func__); + return -1; + } + +@@ -438,7 +438,7 @@ int board_mmc_init(struct bd_info *bis) + ret = init_dwmmc(); + + if (ret) +- debug("init_dwmmc failed\n"); ++printf("init_dwmmc failed\n"); + + return ret; + } +diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c +index b02e3f0d4..a0baf6fd0 100644 +--- a/board/intel/minnowmax/minnowmax.c ++++ b/board/intel/minnowmax/minnowmax.c +@@ -26,14 +26,14 @@ int misc_init_r(void) + + ret = uclass_find_device_by_name(UCLASS_GPIO, GPIO_BANKE_NAME, &dev); + if (ret) { +- debug("%s: GPIO %s device cannot be not found (ret=%d)\n", ++printf("%s: GPIO %s device cannot be not found (ret=%d)\n", + __func__, GPIO_BANKE_NAME, ret); + return ret; + } + + ret = device_probe(dev); + if (ret) { +- debug("%s: GPIO %s device probe failed (ret=%d)\n", ++printf("%s: GPIO %s device probe failed (ret=%d)\n", + __func__, GPIO_BANKE_NAME, ret); + return ret; + } +diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c +index 103c4531a..73fd15cda 100644 +--- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c ++++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c +@@ -119,18 +119,18 @@ static void spl_dram_print_cal(struct mx6_ddr_sysinfo const *sysinfo) + + mmdc_read_calibration(sysinfo, &calibration); + +- debug(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); +- debug(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); +- debug(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); +- debug(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); +- debug(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); +- debug(".p0_mpwldectrl1\t= 0x%08X\n", calibration.p0_mpwldectrl1); +- debug(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); +- debug(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); +- debug(".p1_mprddlctl\t= 0x%08X\n", calibration.p1_mprddlctl); +- debug(".p1_mpwrdlctl\t= 0x%08X\n", calibration.p1_mpwrdlctl); +- debug(".p1_mpwldectrl0\t= 0x%08X\n", calibration.p1_mpwldectrl0); +- debug(".p1_mpwldectrl1\t= 0x%08X\n", calibration.p1_mpwldectrl1); ++printf(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); ++printf(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); ++printf(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); ++printf(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); ++printf(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); ++printf(".p0_mpwldectrl1\t= 0x%08X\n", calibration.p0_mpwldectrl1); ++printf(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); ++printf(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); ++printf(".p1_mprddlctl\t= 0x%08X\n", calibration.p1_mprddlctl); ++printf(".p1_mpwrdlctl\t= 0x%08X\n", calibration.p1_mpwrdlctl); ++printf(".p1_mpwldectrl0\t= 0x%08X\n", calibration.p1_mpwldectrl0); ++printf(".p1_mpwldectrl1\t= 0x%08X\n", calibration.p1_mpwldectrl1); + } + + static void spl_dram_perform_cal(struct mx6_ddr_sysinfo const *sysinfo) +@@ -194,7 +194,7 @@ void board_boot_order(u32 *spl_boot_list) + + reg = (reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT; + +- debug("%s: boot device: 0x%x (0x4 SD, 0x6 eMMC)\n", __func__, reg); ++printf("%s: boot device: 0x%x (0x4 SD, 0x6 eMMC)\n", __func__, reg); + if (boot_device == BOOT_DEVICE_MMC1) + if (reg == IMX6_BMODE_MMC || reg == IMX6_BMODE_EMMC) + boot_device = BOOT_DEVICE_MMC2; +diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c +index ecc8c786b..89715f1a2 100644 +--- a/board/keymile/km83xx/km83xx.c ++++ b/board/keymile/km83xx/km83xx.c +@@ -217,21 +217,21 @@ int post_hotkeys_pressed(void) + (struct km_bec_fpga *)CONFIG_SYS_KMBEC_FPGA_BASE; + int testpin_reg = in_8(&base->CONFIG_TESTPIN_REG); + testpin = (testpin_reg & CONFIG_TESTPIN_MASK) != 0; +- debug("post_hotkeys_pressed: %d\n", !testpin); ++printf("post_hotkeys_pressed: %d\n", !testpin); + return testpin; + } + + ulong post_word_load(void) + { + void* addr = (ulong *) (CPM_POST_WORD_ADDR); +- debug("post_word_load 0x%08lX: 0x%08X\n", (ulong)addr, in_le32(addr)); ++printf("post_word_load 0x%08lX: 0x%08X\n", (ulong)addr, in_le32(addr)); + return in_le32(addr); + + } + void post_word_store(ulong value) + { + void* addr = (ulong *) (CPM_POST_WORD_ADDR); +- debug("post_word_store 0x%08lX: 0x%08lX\n", (ulong)addr, value); ++printf("post_word_store 0x%08lX: 0x%08lX\n", (ulong)addr, value); + out_le32(addr, value); + } + +@@ -239,7 +239,7 @@ int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset) + { + *vstart = CONFIG_SYS_MEMTEST_START; + *size = CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START; +- debug("arch_memory_test_prepare 0x%08X 0x%08X\n", *vstart, *size); ++printf("arch_memory_test_prepare 0x%08X 0x%08X\n", *vstart, *size); + + return 0; + } +diff --git a/board/keymile/kmp204x/ddr.c b/board/keymile/kmp204x/ddr.c +index 77a00c55c..c0b361e5b 100644 +--- a/board/keymile/kmp204x/ddr.c ++++ b/board/keymile/kmp204x/ddr.c +@@ -63,7 +63,7 @@ int dram_init(void) + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; + +- debug(" DDR: "); ++printf(" DDR: "); + gd->ram_size = dram_size; + + return 0; +diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c +index 0e1b4a0a4..56d630b11 100644 +--- a/board/kosagi/novena/novena.c ++++ b/board/kosagi/novena/novena.c +@@ -94,7 +94,7 @@ int drv_keyboard_init(void) + + error = input_init(&button_input, 0); + if (error) { +- debug("%s: Cannot set up input\n", __func__); ++printf("%s: Cannot set up input\n", __func__); + return -1; + } + input_add_tables(&button_input, false); +diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c +index a96a877f5..d7d02326d 100644 +--- a/board/kosagi/novena/video.c ++++ b/board/kosagi/novena/video.c +@@ -70,18 +70,18 @@ static int it6251_is_stable(void) + + rpclkcnt = (i2c_reg_read(caddr, 0x13) & 0xff) | + ((i2c_reg_read(caddr, 0x14) << 8) & 0x0f00); +- debug("RPCLKCnt: %d\n", rpclkcnt); ++printf("RPCLKCnt: %d\n", rpclkcnt); + + status = i2c_reg_read(caddr, IT6251_SYSTEM_STATUS); +- debug("System status: 0x%02x\n", status); ++printf("System status: 0x%02x\n", status); + + clkcnt = (i2c_reg_read(laddr, IT6251_REG_PCLK_CNT_LOW) & 0xff) | + ((i2c_reg_read(laddr, IT6251_REG_PCLK_CNT_HIGH) << 8) & + 0x0f00); +- debug("Clock: 0x%02x\n", clkcnt); ++printf("Clock: 0x%02x\n", clkcnt); + + refstate = i2c_reg_read(laddr, IT6251_REF_STATE); +- debug("Ref Link State: 0x%02x\n", refstate); ++printf("Ref Link State: 0x%02x\n", refstate); + + if ((refstate & 0x1f) != 0) + return 0; +diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c +index e3a59dbec..c3dcd0173 100644 +--- a/board/liebherr/display5/display5.c ++++ b/board/liebherr/display5/display5.c +@@ -162,7 +162,7 @@ int board_init(void) + struct gpio_desc phy_int_gbe, spi2_wp; + int ret; + +- debug("board init\n"); ++printf("board init\n"); + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +@@ -171,11 +171,11 @@ int board_init(void) + + get_board_id(gpio_table_sw_names, &gpio_table_sw_ids_names[0], + ARRAY_SIZE(gpio_table_sw_names), &sw_ids_valid, &unit_id); +- debug("SWx unit_id 0x%x\n", unit_id); ++printf("SWx unit_id 0x%x\n", unit_id); + + get_board_id(gpio_table_hw_names, &gpio_table_hw_ids_names[0], + ARRAY_SIZE(gpio_table_hw_names), &hw_ids_valid, &cpu_id); +- debug("HWx cpu_id 0x%x\n", cpu_id); ++printf("HWx cpu_id 0x%x\n", cpu_id); + + if (hw_ids_valid && sw_ids_valid) + printf("ID: unit type 0x%x rev 0x%x\n", unit_id, cpu_id); +diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c +index 39f70f578..c439b801b 100644 +--- a/board/liebherr/display5/spl.c ++++ b/board/liebherr/display5/spl.c +@@ -205,18 +205,18 @@ static void spl_dram_print_cal(struct mx6_ddr_sysinfo const *sysinfo) + + mmdc_read_calibration(sysinfo, &calibration); + +- debug(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); +- debug(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); +- debug(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); +- debug(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); +- debug(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); +- debug(".p0_mpwldectrl1\t= 0x%08X\n", calibration.p0_mpwldectrl1); +- debug(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); +- debug(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); +- debug(".p1_mprddlctl\t= 0x%08X\n", calibration.p1_mprddlctl); +- debug(".p1_mpwrdlctl\t= 0x%08X\n", calibration.p1_mpwrdlctl); +- debug(".p1_mpwldectrl0\t= 0x%08X\n", calibration.p1_mpwldectrl0); +- debug(".p1_mpwldectrl1\t= 0x%08X\n", calibration.p1_mpwldectrl1); ++printf(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); ++printf(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); ++printf(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); ++printf(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); ++printf(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); ++printf(".p0_mpwldectrl1\t= 0x%08X\n", calibration.p0_mpwldectrl1); ++printf(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); ++printf(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); ++printf(".p1_mprddlctl\t= 0x%08X\n", calibration.p1_mprddlctl); ++printf(".p1_mpwrdlctl\t= 0x%08X\n", calibration.p1_mpwrdlctl); ++printf(".p1_mpwldectrl0\t= 0x%08X\n", calibration.p1_mpwldectrl0); ++printf(".p1_mpwldectrl1\t= 0x%08X\n", calibration.p1_mpwldectrl1); + } + + static void spl_dram_perform_cal(struct mx6_ddr_sysinfo const *sysinfo) +diff --git a/board/liebherr/xea/xea.c b/board/liebherr/xea/xea.c +index cd11b0ada..60d402e23 100644 +--- a/board/liebherr/xea/xea.c ++++ b/board/liebherr/xea/xea.c +@@ -126,7 +126,7 @@ int spl_start_uboot(void) + if (serial_tstc() && serial_getc() == 'c') + return 1; + +- debug("%s: btiva0: %d btiva1: %d\n", __func__, boot_tiva0, boot_tiva1); ++printf("%s: btiva0: %d btiva1: %d\n", __func__, boot_tiva0, boot_tiva1); + return !boot_tiva0 || !boot_tiva1; + } + #else +diff --git a/board/mediatek/mt8512/mt8512.c b/board/mediatek/mt8512/mt8512.c +index ac3adb801..505387612 100644 +--- a/board/mediatek/mt8512/mt8512.c ++++ b/board/mediatek/mt8512/mt8512.c +@@ -16,6 +16,6 @@ int board_init(void) + /* address of boot parameters */ + gd->bd->bi_boot_params = gd->ram_base + 0x100; + +- debug("gd->fdt_blob is %p\n", gd->fdt_blob); ++printf("gd->fdt_blob is %p\n", gd->fdt_blob); + return 0; + } +diff --git a/board/mediatek/mt8518/mt8518_ap1.c b/board/mediatek/mt8518/mt8518_ap1.c +index fce5de676..838c19c40 100644 +--- a/board/mediatek/mt8518/mt8518_ap1.c ++++ b/board/mediatek/mt8518/mt8518_ap1.c +@@ -16,7 +16,7 @@ int board_init(void) + /* address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + +- debug("gd->fdt_blob is %p\n", gd->fdt_blob); ++printf("gd->fdt_blob is %p\n", gd->fdt_blob); + return 0; + } + +diff --git a/board/mscc/ocelot/ocelot.c b/board/mscc/ocelot/ocelot.c +index c462890bb..8ed37a9d7 100644 +--- a/board/mscc/ocelot/ocelot.c ++++ b/board/mscc/ocelot/ocelot.c +@@ -29,7 +29,7 @@ void mscc_switch_reset(bool enter) + /* Nasty workaround to avoid GPIO19 (DDR!) being reset */ + mscc_gpio_set_alternate(19, 2); + +- debug("applying SwC reset\n"); ++printf("applying SwC reset\n"); + + writel(ICPU_RESET_CORE_RST_PROTECT, BASE_CFG + ICPU_RESET); + writel(PERF_SOFT_RST_SOFT_CHIP_RST, BASE_DEVCPU_GCB + PERF_SOFT_RST); +diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c +index 6848e3400..6565212a5 100644 +--- a/board/nvidia/cardhu/cardhu.c ++++ b/board/nvidia/cardhu/cardhu.c +@@ -48,7 +48,7 @@ void board_sdmmc_voltage_init(void) + + ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); + if (ret) { +- debug("%s: Cannot find PMIC I2C chip\n", __func__); ++printf("%s: Cannot find PMIC I2C chip\n", __func__); + return; + } + +@@ -96,7 +96,7 @@ int tegra_pcie_board_init(void) + + err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); + if (err) { +- debug("failed to find PMU bus\n"); ++printf("failed to find PMU bus\n"); + return err; + } + +@@ -106,7 +106,7 @@ int tegra_pcie_board_init(void) + + err = dm_i2c_write(dev, addr, data, 1); + if (err) { +- debug("failed to set VDD supply\n"); ++printf("failed to set VDD supply\n"); + return err; + } + +@@ -123,7 +123,7 @@ int tegra_pcie_board_init(void) + + err = dm_i2c_write(dev, addr, data, 1); + if (err) { +- debug("failed to set AVDD supply\n"); ++printf("failed to set AVDD supply\n"); + return err; + } + +diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c +index 72511e401..37711a399 100644 +--- a/board/nvidia/dalmore/dalmore.c ++++ b/board/nvidia/dalmore/dalmore.c +@@ -47,7 +47,7 @@ void board_sdmmc_voltage_init(void) + + ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); + if (ret) { +- debug("%s: Cannot find PMIC I2C chip\n", __func__); ++printf("%s: Cannot find PMIC I2C chip\n", __func__); + return; + } + +@@ -75,7 +75,7 @@ void board_sdmmc_voltage_init(void) + + ret = i2c_get_chip_for_busnum(0, BAT_I2C_ADDRESS, 1, &dev); + if (ret) { +- debug("%s: Cannot find charger I2C chip\n", __func__); ++printf("%s: Cannot find charger I2C chip\n", __func__); + return; + } + ret = dm_i2c_write(dev, reg, data_buffer, 1); +diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c +index d34953126..2cb689bb5 100644 +--- a/board/nvidia/jetson-tk1/jetson-tk1.c ++++ b/board/nvidia/jetson-tk1/jetson-tk1.c +@@ -62,7 +62,7 @@ int tegra_pcie_board_init(void) + ret = uclass_get_device_by_driver(UCLASS_PMIC, + DM_DRIVER_GET(pmic_as3722), &dev); + if (ret) { +- debug("%s: Failed to find PMIC\n", __func__); ++printf("%s: Failed to find PMIC\n", __func__); + return ret; + } + +diff --git a/board/nvidia/nyan-big/nyan-big.c b/board/nvidia/nyan-big/nyan-big.c +index 06a36f8ed..d6fd225ea 100644 +--- a/board/nvidia/nyan-big/nyan-big.c ++++ b/board/nvidia/nyan-big/nyan-big.c +@@ -54,7 +54,7 @@ int tegra_lcd_pmic_init(int board_id) + ret = uclass_get_device_by_driver(UCLASS_PMIC, + DM_DRIVER_GET(pmic_as3722), &dev); + if (ret) { +- debug("%s: Failed to find PMIC\n", __func__); ++printf("%s: Failed to find PMIC\n", __func__); + return ret; + } + +diff --git a/board/nvidia/p2371-0000/p2371-0000.c b/board/nvidia/p2371-0000/p2371-0000.c +index b819b049f..8b0a0210a 100644 +--- a/board/nvidia/p2371-0000/p2371-0000.c ++++ b/board/nvidia/p2371-0000/p2371-0000.c +@@ -18,7 +18,7 @@ void pin_mux_mmc(void) + int ret; + + /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ +- debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); ++printf("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c +index 7423a97ad..5e4299b63 100644 +--- a/board/nvidia/p2371-2180/p2371-2180.c ++++ b/board/nvidia/p2371-2180/p2371-2180.c +@@ -24,7 +24,7 @@ void pin_mux_mmc(void) + int ret; + + /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ +- debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); ++printf("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +@@ -67,7 +67,7 @@ int tegra_pcie_board_init(void) + int ret; + + /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ +- debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); ++printf("%s: Set LDO1 for PEX power to 1.05V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +@@ -98,7 +98,7 @@ static void ft_mac_address_setup(void *fdt) + if (!path) + return; + +- debug("ethernet alias found: %s\n", path); ++printf("ethernet alias found: %s\n", path); + + offset = fdt_path_offset(fdt, path); + if (offset < 0) { +@@ -110,7 +110,7 @@ static void ft_mac_address_setup(void *fdt) + err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, + ETH_ALEN); + if (!err) +- debug("Local MAC address set: %pM\n", local_mac); ++printf("Local MAC address set: %pM\n", local_mac); + } + + if (eth_env_get_enetaddr("ethaddr", mac)) { +@@ -118,7 +118,7 @@ static void ft_mac_address_setup(void *fdt) + err = fdt_setprop(fdt, offset, "mac-address", mac, + ETH_ALEN); + if (!err) +- debug("MAC address set: %pM\n", mac); ++printf("MAC address set: %pM\n", mac); + } + } + } +diff --git a/board/nvidia/p2571/p2571.c b/board/nvidia/p2571/p2571.c +index a4c4259ee..a6ef1816b 100644 +--- a/board/nvidia/p2571/p2571.c ++++ b/board/nvidia/p2571/p2571.c +@@ -19,7 +19,7 @@ void pin_mux_mmc(void) + int ret; + + /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ +- debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); ++printf("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c +index 508c4d27b..97fd5ccf2 100644 +--- a/board/nvidia/p2771-0000/p2771-0000.c ++++ b/board/nvidia/p2771-0000/p2771-0000.c +@@ -20,7 +20,7 @@ void pin_mux_mmc(void) + int ret; + + /* Turn on MAX77620 LDO3 to 3.3V for SD card power */ +- debug("%s: Set LDO3 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); ++printf("%s: Set LDO3 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +@@ -43,7 +43,7 @@ int tegra_pcie_board_init(void) + int ret; + + /* Turn on MAX77620 LDO7 to 1.05V for PEX power */ +- debug("%s: Set LDO7 for PEX power to 1.05V\n", __func__); ++printf("%s: Set LDO7 for PEX power to 1.05V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +@@ -74,7 +74,7 @@ static void ft_mac_address_setup(void *fdt) + if (!path) + return; + +- debug("ethernet alias found: %s\n", path); ++printf("ethernet alias found: %s\n", path); + + offset = fdt_path_offset(fdt, path); + if (offset < 0) { +@@ -86,7 +86,7 @@ static void ft_mac_address_setup(void *fdt) + err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, + ETH_ALEN); + if (!err) +- debug("Local MAC address set: %pM\n", local_mac); ++printf("Local MAC address set: %pM\n", local_mac); + } + + if (eth_env_get_enetaddr("ethaddr", mac)) { +@@ -94,7 +94,7 @@ static void ft_mac_address_setup(void *fdt) + err = fdt_setprop(fdt, offset, "mac-address", mac, + ETH_ALEN); + if (!err) +- debug("MAC address set: %pM\n", mac); ++printf("MAC address set: %pM\n", mac); + } + } + } +diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c +index e6b66966c..8b754a123 100644 +--- a/board/nvidia/p3450-0000/p3450-0000.c ++++ b/board/nvidia/p3450-0000/p3450-0000.c +@@ -23,7 +23,7 @@ void pin_mux_mmc(void) + int ret; + + /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ +- debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); ++printf("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +@@ -66,7 +66,7 @@ int tegra_pcie_board_init(void) + int ret; + + /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ +- debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); ++printf("%s: Set LDO1 for PEX power to 1.05V\n", __func__); + ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); + if (ret) { + printf("%s: Cannot find MAX77620 I2C chip\n", __func__); +@@ -97,7 +97,7 @@ static void ft_mac_address_setup(void *fdt) + if (!path) + return; + +- debug("ethernet alias found: %s\n", path); ++printf("ethernet alias found: %s\n", path); + + offset = fdt_path_offset(fdt, path); + if (offset < 0) { +@@ -109,7 +109,7 @@ static void ft_mac_address_setup(void *fdt) + err = fdt_setprop(fdt, offset, "local-mac-address", local_mac, + ETH_ALEN); + if (!err) +- debug("Local MAC address set: %pM\n", local_mac); ++printf("Local MAC address set: %pM\n", local_mac); + } + + if (eth_env_get_enetaddr("ethaddr", mac)) { +@@ -117,7 +117,7 @@ static void ft_mac_address_setup(void *fdt) + err = fdt_setprop(fdt, offset, "mac-address", mac, + ETH_ALEN); + if (!err) +- debug("MAC address set: %pM\n", mac); ++printf("MAC address set: %pM\n", mac); + } + } + } +diff --git a/board/nvidia/venice2/as3722_init.c b/board/nvidia/venice2/as3722_init.c +index ba676547d..7e966d240 100644 +--- a/board/nvidia/venice2/as3722_init.c ++++ b/board/nvidia/venice2/as3722_init.c +@@ -31,11 +31,11 @@ void tegra_i2c_ll_write_data(uint data, uint config) + + void pmic_enable_cpu_vdd(void) + { +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + #ifdef AS3722_SD1VOLTAGE_DATA + /* Set up VDD_CORE, for boards where OTP is incorrect*/ +- debug("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__); ++printf("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__); + /* Configure VDD_CORE via the AS3722 PMIC on the PWR I2C bus */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(AS3722_SD1VOLTAGE_DATA, I2C_SEND_2_BYTES); +@@ -46,7 +46,7 @@ void pmic_enable_cpu_vdd(void) + udelay(10 * 1000); + #endif + +- debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__); ++printf("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__); + /* + * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus. + * First set VDD to 1.0V, then enable the VDD regulator. +@@ -59,7 +59,7 @@ void pmic_enable_cpu_vdd(void) + */ + udelay(10 * 1000); + +- debug("%s: Setting VDD_GPU to 1.0V via AS3722 reg 6/4D\n", __func__); ++printf("%s: Setting VDD_GPU to 1.0V via AS3722 reg 6/4D\n", __func__); + /* + * Bring up VDD_GPU via the AS3722 PMIC on the PWR I2C bus. + * First set VDD to 1.0V, then enable the VDD regulator. +@@ -72,7 +72,7 @@ void pmic_enable_cpu_vdd(void) + */ + udelay(10 * 1000); + +- debug("%s: Set VPP_FUSE to 1.2V via AS3722 reg 0x12/4E\n", __func__); ++printf("%s: Set VPP_FUSE to 1.2V via AS3722 reg 0x12/4E\n", __func__); + /* + * Bring up VPP_FUSE via the AS3722 PMIC on the PWR I2C bus. + * First set VDD to 1.2V, then enable the VDD regulator. +@@ -85,7 +85,7 @@ void pmic_enable_cpu_vdd(void) + */ + udelay(10 * 1000); + +- debug("%s: Set VDD_SDMMC to 3.3V via AS3722 reg 0x16/4E\n", __func__); ++printf("%s: Set VDD_SDMMC to 3.3V via AS3722 reg 0x16/4E\n", __func__); + /* + * Bring up VDD_SDMMC via the AS3722 PMIC on the PWR I2C bus. + * First set it to bypass 3.3V straight thru, then enable the regulator +diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c +index 64f0780f6..35378ece0 100644 +--- a/board/phytec/phycore_imx8mm/spl.c ++++ b/board/phytec/phycore_imx8mm/spl.c +@@ -58,7 +58,7 @@ void spl_board_init(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -109,7 +109,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c +index f9fa8d1e1..e9f4ac546 100644 +--- a/board/phytec/phycore_imx8mp/spl.c ++++ b/board/phytec/phycore_imx8mp/spl.c +@@ -113,7 +113,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c +index f588fc3b0..794523b4d 100644 +--- a/board/phytec/phycore_rk3288/phycore-rk3288.c ++++ b/board/phytec/phycore_rk3288/phycore-rk3288.c +@@ -113,7 +113,7 @@ void spl_board_init(void) + if (of_machine_is_compatible("phytec,rk3288-phycore-som")) { + ret = phycore_init(); + if (ret) { +- debug("Failed to set up phycore power settings: %d\n", ++printf("Failed to set up phycore power settings: %d\n", + ret); + return; + } +diff --git a/board/phytium/durian/durian.c b/board/phytium/durian/durian.c +index ef13f7cff..dd9ed6956 100644 +--- a/board/phytium/durian/durian.c ++++ b/board/phytium/durian/durian.c +@@ -47,7 +47,7 @@ void reset_cpu(void) + struct arm_smccc_res res; + + arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res); +- debug("reset cpu error, %lx\n", res.a0); ++printf("reset cpu error, %lx\n", res.a0); + } + + static struct mm_region durian_mem_map[] = { +diff --git a/board/renesas/rcar-common/gen3-spl.c b/board/renesas/rcar-common/gen3-spl.c +index b02a946a2..3ec057f08 100644 +--- a/board/renesas/rcar-common/gen3-spl.c ++++ b/board/renesas/rcar-common/gen3-spl.c +@@ -36,7 +36,7 @@ u32 spl_boot_device(void) + + void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + { +- debug("image entry point: 0x%lx\n", spl_image->entry_point); ++printf("image entry point: 0x%lx\n", spl_image->entry_point); + if (spl_image->os == IH_OS_ARM_TRUSTED_FIRMWARE) { + typedef void (*image_entry_arg_t)(int, int, int, int) + __attribute__ ((noreturn)); +diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c +index abb76585c..36bd87b33 100644 +--- a/board/rockchip/evb_rk3399/evb-rk3399.c ++++ b/board/rockchip/evb_rk3399/evb-rk3399.c +@@ -18,13 +18,13 @@ int board_early_init_f(void) + + ret = regulator_get_by_platname("vcc5v0_host", ®ulator); + if (ret) { +- debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); ++printf("%s vcc5v0_host init fail! ret %d\n", __func__, ret); + goto out; + } + + ret = regulator_set_enable(regulator, true); + if (ret) +- debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret); ++printf("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret); + + out: + return 0; +diff --git a/board/ronetix/imx8mq-cm/spl.c b/board/ronetix/imx8mq-cm/spl.c +index c32a06f12..54fb6915d 100644 +--- a/board/ronetix/imx8mq-cm/spl.c ++++ b/board/ronetix/imx8mq-cm/spl.c +@@ -152,7 +152,7 @@ void board_init_f(ulong dummy) + + ret = spl_init(); + if (ret) { +- debug("spl_init() failed: %d\n", ret); ++printf("spl_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c +index b43242fd3..033b1d484 100644 +--- a/board/samsung/arndale/arndale.c ++++ b/board/samsung/arndale/arndale.c +@@ -81,7 +81,7 @@ static int board_uart_init(void) + for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { + err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); + if (err) { +- debug("UART%d not configured\n", ++printf("UART%d not configured\n", + (uart_id - PERIPH_ID_UART0)); + return err; + } +@@ -96,7 +96,7 @@ int board_early_init_f(void) + + err = board_uart_init(); + if (err) { +- debug("UART init failed\n"); ++printf("UART init failed\n"); + return err; + } + return err; +diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c +index 104d2a657..d89ff1113 100644 +--- a/board/samsung/common/board.c ++++ b/board/samsung/common/board.c +@@ -93,7 +93,7 @@ static void boot_temp_check(void) + puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n"); + break; + default: +- debug("EXYNOS_TMU: Unknown TMU state\n"); ++printf("EXYNOS_TMU: Unknown TMU state\n"); + } + } + #endif +@@ -103,7 +103,7 @@ int board_init(void) + gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); + #if defined CONFIG_EXYNOS_TMU + if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { +- debug("%s: Failed to init TMU\n", __func__); ++printf("%s: Failed to init TMU\n", __func__); + return -1; + } + boot_temp_check(); +@@ -154,7 +154,7 @@ static int board_uart_init(void) + for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { + err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); + if (err) { +- debug("UART%d not configured\n", ++printf("UART%d not configured\n", + (uart_id - PERIPH_ID_UART0)); + ret |= err; + } +@@ -174,7 +174,7 @@ int board_early_init_f(void) + #endif + err = board_uart_init(); + if (err) { +- debug("UART init failed\n"); ++printf("UART init failed\n"); + return err; + } + +@@ -203,7 +203,7 @@ static int decode_sromc(const void *blob, struct fdt_sromc *config) + + node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC); + if (node < 0) { +- debug("Could not find SROMC node\n"); ++printf("Could not find SROMC node\n"); + return node; + } + +@@ -213,7 +213,7 @@ static int decode_sromc(const void *blob, struct fdt_sromc *config) + err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing, + FDT_SROM_TIMING_COUNT); + if (err < 0) { +- debug("Could not decode SROMC configuration Error: %s\n", ++printf("Could not decode SROMC configuration Error: %s\n", + fdt_strerror(err)); + return -FDT_ERR_NOTFOUND; + } +@@ -231,25 +231,25 @@ int board_eth_init(struct bd_info *bis) + + node = decode_sromc(gd->fdt_blob, &config); + if (node < 0) { +- debug("%s: Could not find sromc configuration\n", __func__); ++printf("%s: Could not find sromc configuration\n", __func__); + return 0; + } + node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215); + if (node < 0) { +- debug("%s: Could not find lan9215 configuration\n", __func__); ++printf("%s: Could not find lan9215 configuration\n", __func__); + return 0; + } + + /* We now have a node, so any problems from now on are errors */ + base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg"); + if (base_addr == FDT_ADDR_T_NONE) { +- debug("%s: Could not find lan9215 address\n", __func__); ++printf("%s: Could not find lan9215 address\n", __func__); + return -1; + } + + /* Ethernet needs data bus width of 16 bits */ + if (config.width != 2) { +- debug("%s: Unsupported bus width %d\n", __func__, ++printf("%s: Unsupported bus width %d\n", __func__, + config.width); + return -1; + } +diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c +index 1318ea716..f14a06f24 100644 +--- a/board/samsung/common/exynos5-dt.c ++++ b/board/samsung/common/exynos5-dt.c +@@ -49,12 +49,12 @@ static int exynos_set_regulator(const char *name, uint uv) + + ret = regulator_get_by_platname(name, &dev); + if (ret) { +- debug("%s: Cannot find regulator %s\n", __func__, name); ++printf("%s: Cannot find regulator %s\n", __func__, name); + return ret; + } + ret = regulator_set_value(dev, uv); + if (ret) { +- debug("%s: Cannot set regulator %s\n", __func__, name); ++printf("%s: Cannot set regulator %s\n", __func__, name); + return ret; + } + +diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c +index b32b82fc2..a8efc5b5e 100644 +--- a/board/samsung/goni/goni.c ++++ b/board/samsung/goni/goni.c +@@ -196,7 +196,7 @@ struct dwc2_plat_otg_data s5pc110_otg_data = { + + int board_usb_init(int index, enum usb_init_type init) + { +- debug("USB_udc_probe\n"); ++printf("USB_udc_probe\n"); + return dwc2_udc_probe(&s5pc110_otg_data); + } + #endif +diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c +index 90aab62d3..693bb8523 100644 +--- a/board/samsung/odroid/odroid.c ++++ b/board/samsung/odroid/odroid.c +@@ -508,7 +508,7 @@ int board_usb_init(int index, enum usb_init_type init) + gpio_direction_output(EXYNOS4X12_GPIO_X34, 1); + + /* Power off and on BUCK8 for LAN9730 */ +- debug("LAN9730 - Turning power buck 8 OFF and ON.\n"); ++printf("LAN9730 - Turning power buck 8 OFF and ON.\n"); + + ret = regulator_get_by_platname("VCC_P3V3_2.85V", &dev); + if (ret) { +@@ -534,7 +534,7 @@ int board_usb_init(int index, enum usb_init_type init) + return ret; + } + #endif +- debug("USB_udc_probe\n"); ++printf("USB_udc_probe\n"); + return dwc2_udc_probe(&s5pc210_otg_data); + } + #endif +diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c +index 8811cbb9a..5f5c5972f 100644 +--- a/board/samsung/smdkv310/smdkv310.c ++++ b/board/samsung/smdkv310/smdkv310.c +@@ -130,25 +130,25 @@ static int board_uart_init(void) + + err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE); + if (err) { +- debug("UART0 not configured\n"); ++printf("UART0 not configured\n"); + return err; + } + + err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE); + if (err) { +- debug("UART1 not configured\n"); ++printf("UART1 not configured\n"); + return err; + } + + err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE); + if (err) { +- debug("UART2 not configured\n"); ++printf("UART2 not configured\n"); + return err; + } + + err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); + if (err) { +- debug("UART3 not configured\n"); ++printf("UART3 not configured\n"); + return err; + } + +@@ -161,7 +161,7 @@ int board_early_init_f(void) + int err; + err = board_uart_init(); + if (err) { +- debug("UART init failed\n"); ++printf("UART init failed\n"); + return err; + } + return err; +diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c +index d06687620..ebe7bd51e 100644 +--- a/board/samsung/trats/trats.c ++++ b/board/samsung/trats/trats.c +@@ -165,7 +165,7 @@ int exynos_power_init(void) + + pb = p_bat->pbat; + chrg = p_muic->chrg->chrg_type(p_muic); +- debug("CHARGER TYPE: %d\n", chrg); ++printf("CHARGER TYPE: %d\n", chrg); + + if (!p_chrg->chrg->chrg_bat_present(p_chrg)) { + puts("No battery detected\n"); +@@ -202,7 +202,7 @@ static unsigned int get_hw_revision(void) + for (i = 0; i < 4; i++) + hwrev |= (gpio_get_value(EXYNOS4_GPIO_E10 + i) << i); + +- debug("hwrev 0x%x\n", hwrev); ++printf("hwrev 0x%x\n", hwrev); + + return hwrev; + } +@@ -287,7 +287,7 @@ struct dwc2_plat_otg_data s5pc210_otg_data = { + + int board_usb_init(int index, enum usb_init_type init) + { +- debug("USB_udc_probe\n"); ++printf("USB_udc_probe\n"); + return dwc2_udc_probe(&s5pc210_otg_data); + } + +diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c +index 59e6fbf4b..c99e2ef0e 100644 +--- a/board/samsung/trats2/trats2.c ++++ b/board/samsung/trats2/trats2.c +@@ -174,7 +174,7 @@ int exynos_power_init(void) + + pb = p_bat->pbat; + chrg = p_muic->chrg->chrg_type(p_muic); +- debug("CHARGER TYPE: %d\n", chrg); ++printf("CHARGER TYPE: %d\n", chrg); + + if (!p_chrg->chrg->chrg_bat_present(p_chrg)) { + puts("No battery detected\n"); +@@ -263,7 +263,7 @@ struct dwc2_plat_otg_data s5pc210_otg_data = { + + int board_usb_init(int index, enum usb_init_type init) + { +- debug("USB_udc_probe\n"); ++printf("USB_udc_probe\n"); + return dwc2_udc_probe(&s5pc210_otg_data); + } + +diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c +index 9ef11b847..4f6333db2 100644 +--- a/board/samsung/universal_c210/universal.c ++++ b/board/samsung/universal_c210/universal.c +@@ -126,7 +126,7 @@ static unsigned int get_hw_revision(void) + hwrev = 0x3; /* 1.79V 0.01V */ + #undef IS_RANGE + +- debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev); ++printf("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev); + + adc_power_control(0); + +@@ -203,7 +203,7 @@ struct dwc2_plat_otg_data s5pc210_otg_data = { + + int board_usb_init(int index, enum usb_init_type init) + { +- debug("USB_udc_probe\n"); ++printf("USB_udc_probe\n"); + return dwc2_udc_probe(&s5pc210_otg_data); + } + +diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c +index bd4b528d0..e3473f0cd 100644 +--- a/board/sbc8548/sbc8548.c ++++ b/board/sbc8548/sbc8548.c +@@ -69,7 +69,7 @@ local_bus_init(void) + lbc_mhz = sysinfo.freq_localbus / 1000000; + clkdiv = sysinfo.freq_systembus / sysinfo.freq_localbus; + +- debug("LCRR=0x%x, CD=%d, MHz=%d\n", lcrr, clkdiv, lbc_mhz); ++printf("LCRR=0x%x, CD=%d, MHz=%d\n", lcrr, clkdiv, lbc_mhz); + + out_be32(&gur->lbiuiplldcr1, 0x00078080); + if (clkdiv == 16) { +diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c +index a67092daf..34869ce5c 100644 +--- a/board/sbc8641d/sbc8641d.c ++++ b/board/sbc8641d/sbc8641d.c +@@ -52,7 +52,7 @@ int dram_init(void) + dram_size = fixed_sdram (); + #endif + +- debug(" DDR: "); ++printf(" DDR: "); + gd->ram_size = dram_size; + + return 0; +diff --git a/board/siemens/capricorn/board.c b/board/siemens/capricorn/board.c +index dcbab8e4d..2f1a61244 100644 +--- a/board/siemens/capricorn/board.c ++++ b/board/siemens/capricorn/board.c +@@ -179,35 +179,35 @@ int setup_gpr_fec(void) + printf("Error in setting up SC_C %d\n\r", SC_C_TXCLK); + + sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_TXCLK, &test); +- debug("TEST SC_C %d-->%d\n\r", SC_C_TXCLK, test); ++printf("TEST SC_C %d-->%d\n\r", SC_C_TXCLK, test); + + err = sc_misc_set_control(ipc_handle, SC_R_ENET_1, SC_C_CLKDIV, 0); + if (err != SC_ERR_NONE) + printf("Error in setting up SC_C %d\n\r", SC_C_CLKDIV); + + sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_CLKDIV, &test); +- debug("TEST SC_C %d-->%d\n\r", SC_C_CLKDIV, test); ++printf("TEST SC_C %d-->%d\n\r", SC_C_CLKDIV, test); + + err = sc_misc_set_control(ipc_handle, SC_R_ENET_1, SC_C_DISABLE_50, 0); + if (err != SC_ERR_NONE) + printf("Error in setting up SC_C %d\n\r", SC_C_DISABLE_50); + + sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_TXCLK, &test); +- debug("TEST SC_C %d-->%d\n\r", SC_C_DISABLE_50, test); ++printf("TEST SC_C %d-->%d\n\r", SC_C_DISABLE_50, test); + + err = sc_misc_set_control(ipc_handle, SC_R_ENET_1, SC_C_DISABLE_125, 1); + if (err != SC_ERR_NONE) + printf("Error in setting up SC_C %d\n\r", SC_C_DISABLE_125); + + sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_TXCLK, &test); +- debug("TEST SC_C %d-->%d\n\r", SC_C_DISABLE_125, test); ++printf("TEST SC_C %d-->%d\n\r", SC_C_DISABLE_125, test); + + err = sc_misc_set_control(ipc_handle, SC_R_ENET_1, SC_C_SEL_125, 1); + if (err != SC_ERR_NONE) + printf("Error in setting up SC_C %d\n\r", SC_C_SEL_125); + + sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_SEL_125, &test); +- debug("TEST SC_C %d-->%d\n\r", SC_C_SEL_125, test); ++printf("TEST SC_C %d-->%d\n\r", SC_C_SEL_125, test); + + return 0; + } +diff --git a/board/siemens/common/factoryset.c b/board/siemens/common/factoryset.c +index 2e3ae1a54..656ec3fbf 100644 +--- a/board/siemens/common/factoryset.c ++++ b/board/siemens/common/factoryset.c +@@ -134,7 +134,7 @@ int get_factory_record_val(unsigned char *eeprom_buf, int size, uchar *record, + endpos - pos, name, buf, len); + /* fix buffer */ + eeprom_buf[endpos] = tmp; +- debug("%s: %s.%s = %s\n", ++printf("%s: %s.%s = %s\n", + __func__, record, name, buf); + return ret; + } +@@ -200,7 +200,7 @@ int factoryset_read_eeprom(int i2c_addr) + * times. Furthermore, fetch eeprom take longer time, so we fetch + * data after every time we got a record from eeprom + */ +- debug("Read eeprom page :\n"); ++printf("Read eeprom page :\n"); + for (i = 0; i < pages; i++) { + #if CONFIG_IS_ENABLED(DM_I2C) + ret = dm_i2c_read(dev, (OFF_PG + i) * EEPR_PG_SZ, +@@ -283,26 +283,26 @@ int factoryset_read_eeprom(int i2c_addr) + if (0 <= get_factory_record_val(cp, size, (uchar *)"DISP1", + (uchar *)"name", factory_dat.disp_name, + MAX_STRING_LENGTH)) { +- debug("display name: %s\n", factory_dat.disp_name); ++printf("display name: %s\n", factory_dat.disp_name); + } + #endif + if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV", + (uchar *)"num", factory_dat.serial, + MAX_STRING_LENGTH)) { +- debug("serial number: %s\n", factory_dat.serial); ++printf("serial number: %s\n", factory_dat.serial); + } + if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV", + (uchar *)"ver", buf, + MAX_STRING_LENGTH)) { + factory_dat.version = simple_strtoul((char *)buf, + NULL, 16); +- debug("version number: %d\n", factory_dat.version); ++printf("version number: %d\n", factory_dat.version); + } + /* Get ASN from factory set if available */ + if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV", + (uchar *)"id", factory_dat.asn, + MAX_STRING_LENGTH)) { +- debug("factoryset asn: %s\n", factory_dat.asn); ++printf("factoryset asn: %s\n", factory_dat.asn); + } else { + factory_dat.asn[0] = 0; + } +@@ -311,7 +311,7 @@ int factoryset_read_eeprom(int i2c_addr) + (uchar *)"ver", + factory_dat.comp_version, + MAX_STRING_LENGTH)) { +- debug("factoryset COMP/ver: %s\n", factory_dat.comp_version); ++printf("factoryset COMP/ver: %s\n", factory_dat.comp_version); + } else { + strcpy((char *)factory_dat.comp_version, "1.0"); + } +@@ -355,11 +355,11 @@ static int factoryset_mac_env_set(void) + uint8_t mac_addr[6]; + + /* Set mac from factoryset or try reading E-fuse */ +- debug("FactorySet: Set mac address\n"); ++printf("FactorySet: Set mac address\n"); + if (is_valid_ethaddr(factory_dat.mac)) { + memcpy(mac_addr, factory_dat.mac, 6); + } else { +- debug("Warning: FactorySet: not set. Fallback to E-fuse\n"); ++printf("Warning: FactorySet: not set. Fallback to E-fuse\n"); + if (get_mac_from_efuse(mac_addr) < 0) + return -1; + } +diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c +index a6e1737be..507c2881f 100644 +--- a/board/siemens/corvus/board.c ++++ b/board/siemens/corvus/board.c +@@ -122,7 +122,7 @@ void spl_board_init(void) + if (at91_get_gpio_value(AT91_PIN_PB7) == 0) { + u32 boot_device; + +- debug("Recovery button pressed\n"); ++printf("Recovery button pressed\n"); + boot_device = spl_boot_device(); + switch (boot_device) { + #ifdef CONFIG_SPL_NAND_SUPPORT +diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c +index b5e9b4242..475f66dde 100644 +--- a/board/siemens/pxm2/board.c ++++ b/board/siemens/pxm2/board.c +@@ -457,7 +457,7 @@ int board_late_init(void) + if (ret) + printf("error setting board id\n"); + } +- debug("PXM50: %d\n", factory_dat.pxm50); ++printf("PXM50: %d\n", factory_dat.pxm50); + #endif + + return 0; +diff --git a/board/sifive/unleashed/spl.c b/board/sifive/unleashed/spl.c +index fe27316b2..b60333097 100644 +--- a/board/sifive/unleashed/spl.c ++++ b/board/sifive/unleashed/spl.c +@@ -29,7 +29,7 @@ int spl_board_init_f(void) + + ret = spl_soc_init(); + if (ret) { +- debug("FU540 SPL init failed: %d\n", ret); ++printf("FU540 SPL init failed: %d\n", ret); + return ret; + } + +@@ -40,14 +40,14 @@ int spl_board_init_f(void) + udelay(2000); + ret = gpio_request(GEM_PHY_RESET, "gem_phy_reset"); + if (ret) { +- debug("gem_phy_reset gpio request failed: %d\n", ret); ++printf("gem_phy_reset gpio request failed: %d\n", ret); + return ret; + } + + /* Set GPIO 12 (PHY NRESET) */ + ret = gpio_direction_output(GEM_PHY_RESET, 1); + if (ret) { +- debug("gem_phy_reset gpio direction set failed: %d\n", ret); ++printf("gem_phy_reset gpio direction set failed: %d\n", ret); + return ret; + } + +@@ -73,7 +73,7 @@ u32 spl_boot_device(void) + case MODE_SELECT_SD: + return BOOT_DEVICE_MMC1; + default: +- debug("Unsupported boot device 0x%x but trying MMC1\n", ++printf("Unsupported boot device 0x%x but trying MMC1\n", + boot_device); + return BOOT_DEVICE_MMC1; + } +diff --git a/board/sifive/unleashed/unleashed.c b/board/sifive/unleashed/unleashed.c +index a4e78220c..05dee41b7 100644 +--- a/board/sifive/unleashed/unleashed.c ++++ b/board/sifive/unleashed/unleashed.c +@@ -61,7 +61,7 @@ static u32 fu540_read_serialnum(void) + DM_DRIVER_GET(sifive_otp), &dev); + + if (ret) { +- debug("%s: could not find otp device\n", __func__); ++printf("%s: could not find otp device\n", __func__); + return serial; + } + +@@ -120,7 +120,7 @@ int board_init(void) + /* enable all cache ways */ + ret = cache_enable_ways(); + if (ret) { +- debug("%s: could not enable cache ways\n", __func__); ++printf("%s: could not enable cache ways\n", __func__); + return ret; + } + +diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c +index 5e1333b09..15c688ea4 100644 +--- a/board/sifive/unmatched/spl.c ++++ b/board/sifive/unmatched/spl.c +@@ -28,7 +28,7 @@ int spl_board_init_f(void) + + ret = spl_soc_init(); + if (ret) { +- debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret); ++printf("HiFive Unmatched FU740 SPL init failed: %d\n", ret); + return ret; + } + +@@ -39,14 +39,14 @@ int spl_board_init_f(void) + udelay(2000); + ret = gpio_request(GEM_PHY_RESET, "gem_phy_reset"); + if (ret) { +- debug("gem_phy_reset gpio request failed: %d\n", ret); ++printf("gem_phy_reset gpio request failed: %d\n", ret); + return ret; + } + + /* Set GPIO 12 (PHY NRESET) */ + ret = gpio_direction_output(GEM_PHY_RESET, 1); + if (ret) { +- debug("gem_phy_reset gpio direction set failed: %d\n", ret); ++printf("gem_phy_reset gpio direction set failed: %d\n", ret); + return ret; + } + +@@ -70,7 +70,7 @@ u32 spl_boot_device(void) + case MODE_SELECT_SD: + return BOOT_DEVICE_MMC1; + default: +- debug("Unsupported boot device 0x%x but trying MMC1\n", ++printf("Unsupported boot device 0x%x but trying MMC1\n", + boot_device); + return BOOT_DEVICE_MMC1; + } +diff --git a/board/sifive/unmatched/unmatched.c b/board/sifive/unmatched/unmatched.c +index 6d6055958..7ad9ff5c1 100644 +--- a/board/sifive/unmatched/unmatched.c ++++ b/board/sifive/unmatched/unmatched.c +@@ -17,7 +17,7 @@ int board_init(void) + /* enable all cache ways */ + ret = cache_enable_ways(); + if (ret) { +- debug("%s: could not enable cache ways\n", __func__); ++printf("%s: could not enable cache ways\n", __func__); + return ret; + } + return 0; +diff --git a/board/spear/x600/fpga.c b/board/spear/x600/fpga.c +index 5140694b9..995f8d210 100644 +--- a/board/spear/x600/fpga.c ++++ b/board/spear/x600/fpga.c +@@ -33,7 +33,7 @@ static void fpga_reset(int assert) + /* + * On x600 we have no means to toggle the FPGA reset signal + */ +- debug("%s:%d: RESET (%d)\n", __func__, __LINE__, assert); ++printf("%s:%d: RESET (%d)\n", __func__, __LINE__, assert); + } + + /* +@@ -41,7 +41,7 @@ static void fpga_reset(int assert) + */ + static int fpga_pgm_fn(int assert, int flush, int cookie) + { +- debug("%s:%d: FPGA PROG (%d)\n", __func__, __LINE__, assert); ++printf("%s:%d: FPGA PROG (%d)\n", __func__, __LINE__, assert); + + gpio_set_value(CONFIG_SYS_FPGA_PROG, assert); + +@@ -56,7 +56,7 @@ static int fpga_init_fn(int cookie) + { + static int state; + +- debug("%s:%d: init (state=%d)\n", __func__, __LINE__, state); ++printf("%s:%d: init (state=%d)\n", __func__, __LINE__, state); + + /* + * On x600, the FPGA INIT signal is not connected to the SoC. +@@ -97,7 +97,7 @@ static int fpga_done_fn(int cookie) + */ + static int fpga_pre_config_fn(int cookie) + { +- debug("%s:%d: FPGA pre-configuration\n", __func__, __LINE__); ++printf("%s:%d: FPGA pre-configuration\n", __func__, __LINE__); + fpga_reset(true); + + return 0; +@@ -111,7 +111,7 @@ static int fpga_post_config_fn(int cookie) + { + int rc = 0; + +- debug("%s:%d: FPGA post configuration\n", __func__, __LINE__); ++printf("%s:%d: FPGA post configuration\n", __func__, __LINE__); + + fpga_reset(true); + udelay(100); +@@ -184,7 +184,7 @@ static xilinx_desc fpga[CONFIG_FPGA_COUNT] = { + */ + static void fpga_serialslave_init(void) + { +- debug("%s:%d: Initialize serial slave interface\n", __func__, __LINE__); ++printf("%s:%d: Initialize serial slave interface\n", __func__, __LINE__); + fpga_pgm_fn(false, false, 0); /* make sure program pin is inactive */ + } + +@@ -258,7 +258,7 @@ int x600_init_fpga(void) + fpga_init(); + fpga_serialslave_init(); + +- debug("%s:%d: Adding fpga 0\n", __func__, __LINE__); ++printf("%s:%d: Adding fpga 0\n", __func__, __LINE__); + fpga_add(fpga_xilinx, &fpga[0]); + + return 0; +diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c +index 46fcf907f..542283f21 100644 +--- a/board/st/stm32f429-discovery/stm32f429-discovery.c ++++ b/board/st/stm32f429-discovery/stm32f429-discovery.c +@@ -29,7 +29,7 @@ int dram_init(void) + + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) { +- debug("DRAM init failed: %d\n", rv); ++printf("DRAM init failed: %d\n", rv); + return rv; + } + +diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c b/board/st/stm32f429-evaluation/stm32f429-evaluation.c +index 3b6df1f3a..06bbcf92e 100644 +--- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c ++++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c +@@ -23,7 +23,7 @@ int dram_init(void) + + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) { +- debug("DRAM init failed: %d\n", rv); ++printf("DRAM init failed: %d\n", rv); + return rv; + } + +diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c b/board/st/stm32f469-discovery/stm32f469-discovery.c +index c5df9b0d9..d1d8f1a91 100644 +--- a/board/st/stm32f469-discovery/stm32f469-discovery.c ++++ b/board/st/stm32f469-discovery/stm32f469-discovery.c +@@ -23,7 +23,7 @@ int dram_init(void) + + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) { +- debug("DRAM init failed: %d\n", rv); ++printf("DRAM init failed: %d\n", rv); + return rv; + } + +diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c +index efa38a0e2..9d703349e 100644 +--- a/board/st/stm32f746-disco/stm32f746-disco.c ++++ b/board/st/stm32f746-disco/stm32f746-disco.c +@@ -35,7 +35,7 @@ int dram_init(void) + struct udevice *dev; + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) { +- debug("DRAM init failed: %d\n", rv); ++printf("DRAM init failed: %d\n", rv); + return rv; + } + +@@ -52,7 +52,7 @@ int dram_init_banksize(void) + #ifdef CONFIG_SPL_OS_BOOT + int spl_start_uboot(void) + { +- debug("SPL: booting kernel\n"); ++printf("SPL: booting kernel\n"); + /* break into full u-boot on 'c' */ + return serial_tstc() && serial_getc() == 'c'; + } +@@ -64,7 +64,7 @@ int spl_dram_init(void) + int rv; + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) +- debug("DRAM init failed: %d\n", rv); ++printf("DRAM init failed: %d\n", rv); + return rv; + } + void spl_board_init(void) +diff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c +index 4091d5f9f..a7f4fb7da 100644 +--- a/board/st/stm32h743-disco/stm32h743-disco.c ++++ b/board/st/stm32h743-disco/stm32h743-disco.c +@@ -19,7 +19,7 @@ int dram_init(void) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + return ret; + } + +diff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c +index 4091d5f9f..a7f4fb7da 100644 +--- a/board/st/stm32h743-eval/stm32h743-eval.c ++++ b/board/st/stm32h743-eval/stm32h743-eval.c +@@ -19,7 +19,7 @@ int dram_init(void) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + return ret; + } + +diff --git a/board/st/stm32h750-art-pi/stm32h750-art-pi.c b/board/st/stm32h750-art-pi/stm32h750-art-pi.c +index 5785b2e57..44e25b051 100644 +--- a/board/st/stm32h750-art-pi/stm32h750-art-pi.c ++++ b/board/st/stm32h750-art-pi/stm32h750-art-pi.c +@@ -19,7 +19,7 @@ int dram_init(void) + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { +- debug("DRAM init failed: %d\n", ret); ++printf("DRAM init failed: %d\n", ret); + return ret; + } + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index a5b0e4f15..a4bbf0513 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -239,12 +239,12 @@ int board_init(void) + + #ifndef CONFIG_ARM64 + asm volatile("mrc p15, 0, %0, c0, c1, 1" : "=r"(id_pfr1)); +- debug("id_pfr1: 0x%08x\n", id_pfr1); ++printf("id_pfr1: 0x%08x\n", id_pfr1); + /* Generic Timer Extension available? */ + if ((id_pfr1 >> CPUID_ARM_GENTIMER_SHIFT) & 0xf) { + uint32_t freq; + +- debug("Setting CNTFRQ\n"); ++printf("Setting CNTFRQ\n"); + + /* + * CNTFRQ is a secure register, so we will crash if we try to +@@ -254,7 +254,7 @@ int board_init(void) + */ + asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq)); + if (freq != COUNTER_FREQUENCY) { +- debug("arch timer frequency is %d Hz, should be %d, fixing ...\n", ++printf("arch timer frequency is %d Hz, should be %d, fixing ...\n", + freq, COUNTER_FREQUENCY); + #ifdef CONFIG_NON_SECURE + printf("arch timer frequency is wrong, but cannot adjust it\n"); +diff --git a/board/synopsys/hsdk/clk-lib.c b/board/synopsys/hsdk/clk-lib.c +index bd43179fc..bc4ff0ce9 100644 +--- a/board/synopsys/hsdk/clk-lib.c ++++ b/board/synopsys/hsdk/clk-lib.c +@@ -70,7 +70,7 @@ int soc_clk_ctl(const char *name, ulong *rate, enum clk_ctl_ops ctl) + else if (ctl & CLK_PRINT) + printf("HSDK: clock '%s' rate %lu Hz\n", name, priv_rate); + else +- debug("HSDK: clock '%s' rate %lu MHz\n", name, mhz_rate); ++printf("HSDK: clock '%s' rate %lu MHz\n", name, mhz_rate); + + return 0; + } +diff --git a/board/synopsys/hsdk/env-lib.c b/board/synopsys/hsdk/env-lib.c +index 235f29565..1304c92c9 100644 +--- a/board/synopsys/hsdk/env-lib.c ++++ b/board/synopsys/hsdk/env-lib.c +@@ -23,10 +23,10 @@ static int env_read_common(u32 index, const struct env_map_common *map) + if (!env_get_yesno(map[index].env_name)) { + if (map[index].type == ENV_HEX) { + val = (u32)env_get_hex(map[index].env_name, 0); +- debug("ENV: %s: = %#x\n", map[index].env_name, val); ++printf("ENV: %s: = %#x\n", map[index].env_name, val); + } else { + val = (u32)env_get_ulong(map[index].env_name, 10, 0); +- debug("ENV: %s: = %d\n", map[index].env_name, val); ++printf("ENV: %s: = %d\n", map[index].env_name, val); + } + + map[index].val->val = val; +@@ -54,10 +54,10 @@ static int env_read_core(u32 index, const struct env_map_percpu *map) + if (!env_get_yesno(command)) { + if (map[index].type == ENV_HEX) { + val = (u32)env_get_hex(command, 0); +- debug("ENV: %s: = %#x\n", command, val); ++printf("ENV: %s: = %#x\n", command, val); + } else { + val = (u32)env_get_ulong(command, 10, 0); +- debug("ENV: %s: = %d\n", command, val); ++printf("ENV: %s: = %d\n", command, val); + } + + (*map[index].val)[i].val = val; +@@ -283,7 +283,7 @@ int args_envs_enumerate(const struct env_map_common *map, int enum_by, + if (i < 0) + return i; + +- debug("ARG: found '%s' with index %d\n", map[i].env_name, i); ++printf("ARG: found '%s' with index %d\n", map[i].env_name, i); + + if (i < 0) { + pr_err("unknown arg: %s\n", argv[0]); +@@ -293,7 +293,7 @@ int args_envs_enumerate(const struct env_map_common *map, int enum_by, + if (arg_read_set(map, i, argc, argv)) + return -EINVAL; + +- debug("ARG: value.s '%s' == %#x\n", argv[1], map[i].val->val); ++printf("ARG: value.s '%s' == %#x\n", argv[1], map[i].val->val); + + argc -= enum_by; + argv += enum_by; +diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c +index 892b94bb0..404277673 100644 +--- a/board/synopsys/hsdk/hsdk.c ++++ b/board/synopsys/hsdk/hsdk.c +@@ -494,13 +494,13 @@ static noinline void do_init_slave_cpu(u32 cpu_id) + /* Use global unique place for each slave cpu stack */ + arc_write_uncached_32(&cross_cpu_data.stack_ptr, stack_ptr); + +- debug("CPU %u: stack pool base: %p\n", cpu_id, slave_stack); +- debug("CPU %u: current slave stack base: %x\n", cpu_id, stack_ptr); ++printf("CPU %u: stack pool base: %p\n", cpu_id, slave_stack); ++printf("CPU %u: current slave stack base: %x\n", cpu_id, stack_ptr); + slave_cpu_set_boot_addr((u32)hsdk_core_init_f); + + smp_kick_cpu_x(cpu_id); + +- debug("CPU %u: cross-cpu flag: %x [before timeout]\n", cpu_id, ++printf("CPU %u: cross-cpu flag: %x [before timeout]\n", cpu_id, + arc_read_uncached_32(&cross_cpu_data.ready_flag)); + + while (!arc_read_uncached_32(&cross_cpu_data.ready_flag) && attempts--) +@@ -521,9 +521,9 @@ static noinline void do_init_slave_cpu(u32 cpu_id) + pr_err("CPU %u status is unexpected: %d\n", cpu_id, + arc_read_uncached_32(&cross_cpu_data.status[cpu_id])); + +- debug("CPU %u: cross-cpu flag: %x [after timeout]\n", cpu_id, ++printf("CPU %u: cross-cpu flag: %x [after timeout]\n", cpu_id, + arc_read_uncached_32(&cross_cpu_data.ready_flag)); +- debug("CPU %u: status: %d [after timeout]\n", cpu_id, ++printf("CPU %u: status: %d [after timeout]\n", cpu_id, + arc_read_uncached_32(&cross_cpu_data.status[cpu_id])); + } + +@@ -532,7 +532,7 @@ static void do_init_slave_cpus(void) + clear_cross_cpu_data(); + sync_cross_cpu_data(); + +- debug("cross_cpu_data location: %#x\n", (u32)&cross_cpu_data); ++printf("cross_cpu_data location: %#x\n", (u32)&cross_cpu_data); + + for (u32 i = MASTER_CPU_ID + 1; i < NR_CPUS; i++) + if (is_cpu_used(i)) +diff --git a/board/technexion/pico-imx8mq/spl.c b/board/technexion/pico-imx8mq/spl.c +index 8b853a914..64d0be818 100644 +--- a/board/technexion/pico-imx8mq/spl.c ++++ b/board/technexion/pico-imx8mq/spl.c +@@ -186,7 +186,7 @@ void spl_board_init(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -214,7 +214,7 @@ void board_init_f(ulong dummy) + + ret = spl_init(); + if (ret) { +- debug("spl_init() failed: %d\n", ret); ++printf("spl_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/theadorable/fpga.c b/board/theadorable/fpga.c +index bc8379ccc..ae76eab65 100644 +--- a/board/theadorable/fpga.c ++++ b/board/theadorable/fpga.c +@@ -23,7 +23,7 @@ static int fpga_pre_fn(int cookie) + int gpio_done = COOKIE2DONE(cookie); + int ret; + +- debug("%s (%d): cookie=%08x gpio_config=%d gpio_done=%d\n", ++printf("%s (%d): cookie=%08x gpio_config=%d gpio_done=%d\n", + __func__, __LINE__, cookie, gpio_config, gpio_done); + + /* Configure config pin */ +@@ -48,7 +48,7 @@ static int fpga_config_fn(int assert, int flush, int cookie) + { + int gpio_config = COOKIE2CONFIG(cookie); + +- debug("%s (%d): cookie=%08x gpio_config=%d\n", ++printf("%s (%d): cookie=%08x gpio_config=%d\n", + __func__, __LINE__, cookie, gpio_config); + + if (assert) +@@ -73,7 +73,7 @@ static int fpga_write_fn(const void *buf, size_t len, int flush, int cookie) + * This results in the fastest and easiest way to program the + * bitstream into the FPGA. + */ +- debug("%s (%d): cookie=%08x spi_bus=%d spi_dev=%d\n", ++printf("%s (%d): cookie=%08x spi_bus=%d spi_dev=%d\n", + __func__, __LINE__, cookie, spi_bus, spi_dev); + + if (spi_bus == 0) { +@@ -107,7 +107,7 @@ static int fpga_done_fn(int cookie) + int gpio_done = COOKIE2DONE(cookie); + unsigned long ts; + +- debug("%s (%d): cookie=%08x gpio_done=%d\n", ++printf("%s (%d): cookie=%08x gpio_done=%d\n", + __func__, __LINE__, cookie, gpio_done); + + ts = get_timer(0); +diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c +index deeba3084..38ec20f0c 100644 +--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c ++++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c +@@ -55,23 +55,23 @@ static int setup_boottargets(void) + char *env_default, *env; + + if (!boot_device) { +- debug("%s: /chosen/u-boot,spl-boot-device not set\n", ++printf("%s: /chosen/u-boot,spl-boot-device not set\n", + __func__); + return -1; + } +- debug("%s: booted from %s\n", __func__, boot_device); ++printf("%s: booted from %s\n", __func__, boot_device); + + env_default = env_get_default("boot_targets"); + env = env_get("boot_targets"); + if (!env) { +- debug("%s: boot_targets does not exist\n", __func__); ++printf("%s: boot_targets does not exist\n", __func__); + return -1; + } +- debug("%s: boot_targets current: %s - default: %s\n", ++printf("%s: boot_targets current: %s - default: %s\n", + __func__, env, env_default); + + if (strcmp(env_default, env) != 0) { +- debug("%s: boot_targets not default, don't change it\n", ++printf("%s: boot_targets not default, don't change it\n", + __func__); + return 0; + } +@@ -88,12 +88,12 @@ static int setup_boottargets(void) + if (!strcmp(boot_device, "/mmc@fe320000")) { + char *mmc0, *mmc1; + +- debug("%s: booted from SD-Card\n", __func__); ++printf("%s: booted from SD-Card\n", __func__); + mmc0 = strstr(env, "mmc0"); + mmc1 = strstr(env, "mmc1"); + + if (!mmc0 || !mmc1) { +- debug("%s: only one mmc boot_target found\n", __func__); ++printf("%s: only one mmc boot_target found\n", __func__); + return -1; + } + +@@ -104,7 +104,7 @@ static int setup_boottargets(void) + if (mmc0 < mmc1) { + mmc0[3] = '1'; + mmc1[3] = '0'; +- debug("%s: set boot_targets to: %s\n", __func__, env); ++printf("%s: set boot_targets to: %s\n", __func__, env); + env_set("boot_targets", env); + } + } +diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c +index de92eb098..20bc2034c 100644 +--- a/board/ti/common/board_detect.c ++++ b/board/ti/common/board_detect.c +@@ -485,7 +485,7 @@ int __maybe_unused ti_i2c_eeprom_am6_get(int bus_addr, int dev_addr, + + eeprom_addr += sizeof(record.header); + +- debug("%s: dev_addr=0x%02x header.id=%u header.len=%u\n", ++printf("%s: dev_addr=0x%02x header.id=%u header.len=%u\n", + __func__, dev_addr, record.header.id, + record.header.len); + +@@ -532,7 +532,7 @@ int __maybe_unused ti_i2c_eeprom_am6_get_base(int bus_addr, int dev_addr) + */ + #if !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_CPU_V7R)) + if (ep->header == TI_EEPROM_HEADER_MAGIC) { +- debug("%s: EEPROM has already been read\n", __func__); ++printf("%s: EEPROM has already been read\n", __func__); + return 0; + } + #endif +diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c +index b9a9f1955..45bd802d7 100644 +--- a/board/ti/j721e/evm.c ++++ b/board/ti/j721e/evm.c +@@ -310,7 +310,7 @@ static int probe_daughtercards(void) + DAUGHTER_CARD_NO_OF_MAC_ADDR, + &mac_addr_cnt); + if (ret) { +- debug("%s: No daughtercard EEPROM at 0x%02x found %d\n", ++printf("%s: No daughtercard EEPROM at 0x%02x found %d\n", + __func__, i2c_addr, ret); + eeprom_read_success = false; + /* Skip to the next daughtercard to probe */ +diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c +index fda8d5f3c..7e41ed0a7 100644 +--- a/board/ti/panda/panda.c ++++ b/board/ti/panda/panda.c +@@ -233,7 +233,7 @@ int misc_init_r(void) + + if (phy_type == 1) { + /* ULPI PHY supplied by auxclk3 derived from sys_clk */ +- debug("ULPI PHY supplied by auxclk3\n"); ++printf("ULPI PHY supplied by auxclk3\n"); + + auxclk = readl(&scrm->auxclk3); + /* Select sys_clk */ +@@ -248,7 +248,7 @@ int misc_init_r(void) + writel(auxclk, &scrm->auxclk3); + } else { + /* ULPI PHY supplied by auxclk1 derived from PER dpll */ +- debug("ULPI PHY supplied by auxclk1\n"); ++printf("ULPI PHY supplied by auxclk1\n"); + + auxclk = readl(&scrm->auxclk1); + /* Select per DPLL */ +diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c +index b97617cfc..7777db050 100644 +--- a/board/toradex/apalis-tk1/apalis-tk1.c ++++ b/board/toradex/apalis-tk1/apalis-tk1.c +@@ -197,7 +197,7 @@ void tegra_pcie_board_port_reset(struct tegra_pcie_port *port) + DM_DRIVER_GET(pmic_as3722), + &dev); + if (ret) { +- debug("%s: Failed to find PMIC\n", __func__); ++printf("%s: Failed to find PMIC\n", __func__); + return; + } + +diff --git a/board/toradex/apalis-tk1/as3722_init.c b/board/toradex/apalis-tk1/as3722_init.c +index 68169f554..662e59ee4 100644 +--- a/board/toradex/apalis-tk1/as3722_init.c ++++ b/board/toradex/apalis-tk1/as3722_init.c +@@ -30,11 +30,11 @@ void tegra_i2c_ll_write_data(uint data, uint config) + + void pmic_enable_cpu_vdd(void) + { +- debug("%s entry\n", __func__); ++printf("%s entry\n", __func__); + + #ifdef AS3722_SD1VOLTAGE_DATA + /* Set up VDD_CORE, for boards where OTP is incorrect*/ +- debug("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__); ++printf("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__); + /* Configure VDD_CORE via the AS3722 PMIC on the PWR I2C bus */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(AS3722_SD1VOLTAGE_DATA, I2C_SEND_2_BYTES); +@@ -68,7 +68,7 @@ void pmic_enable_cpu_vdd(void) + tegra_i2c_ll_write_data(0x0019, I2C_SEND_2_BYTES); + udelay(10 * 1000); + +- debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__); ++printf("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__); + /* + * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus. + * First set VDD to 1.0V, then enable the VDD regulator. +@@ -81,7 +81,7 @@ void pmic_enable_cpu_vdd(void) + */ + udelay(10 * 1000); + +- debug("%s: Setting VDD_GPU to 1.0V via AS3722 reg 6/4D\n", __func__); ++printf("%s: Setting VDD_GPU to 1.0V via AS3722 reg 6/4D\n", __func__); + /* + * Bring up VDD_GPU via the AS3722 PMIC on the PWR I2C bus. + * First set VDD to 1.0V, then enable the VDD regulator. +@@ -94,7 +94,7 @@ void pmic_enable_cpu_vdd(void) + */ + udelay(10 * 1000); + +- debug("%s: Set VPP_FUSE to 1.2V via AS3722 reg 0x12/4E\n", __func__); ++printf("%s: Set VPP_FUSE to 1.2V via AS3722 reg 0x12/4E\n", __func__); + /* + * Bring up VPP_FUSE via the AS3722 PMIC on the PWR I2C bus. + * First set VDD to 1.2V, then enable the VDD regulator. +@@ -107,7 +107,7 @@ void pmic_enable_cpu_vdd(void) + */ + udelay(10 * 1000); + +- debug("%s: Set VDD_SDMMC1 to 3.3V via AS3722 reg 0x11/4E\n", __func__); ++printf("%s: Set VDD_SDMMC1 to 3.3V via AS3722 reg 0x11/4E\n", __func__); + /* + * Bring up VDD_SDMMC1 via the AS3722 PMIC on the PWR I2C bus. + * First set it to value closest to 3.3V, then enable the regulator +@@ -123,7 +123,7 @@ void pmic_enable_cpu_vdd(void) + */ + udelay(10 * 1000); + +- debug("%s: Set VDD_SDMMC3 to 3.3V via AS3722 reg 0x16/4E\n", __func__); ++printf("%s: Set VDD_SDMMC3 to 3.3V via AS3722 reg 0x16/4E\n", __func__); + /* + * Bring up VDD_SDMMC3 via the AS3722 PMIC on the PWR I2C bus. + * First set it to bypass 3.3V straight thru, then enable the regulator +diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c +index 0396eea56..e0d6413f5 100644 +--- a/board/toradex/apalis_t30/apalis_t30.c ++++ b/board/toradex/apalis_t30/apalis_t30.c +@@ -84,7 +84,7 @@ int tegra_pcie_board_init(void) + + err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); + if (err) { +- debug("%s: Cannot find PMIC I2C chip\n", __func__); ++printf("%s: Cannot find PMIC I2C chip\n", __func__); + return err; + } + +@@ -94,7 +94,7 @@ int tegra_pcie_board_init(void) + + err = dm_i2c_write(dev, addr, data, 1); + if (err) { +- debug("failed to set VDD supply\n"); ++printf("failed to set VDD supply\n"); + return err; + } + +@@ -104,7 +104,7 @@ int tegra_pcie_board_init(void) + + err = dm_i2c_write(dev, addr, data, 1); + if (err) { +- debug("failed to enable VDD supply\n"); ++printf("failed to enable VDD supply\n"); + return err; + } + +@@ -114,7 +114,7 @@ int tegra_pcie_board_init(void) + + err = dm_i2c_write(dev, addr, data, 1); + if (err) { +- debug("failed to set AVDD supply\n"); ++printf("failed to set AVDD supply\n"); + return err; + } + +diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c +index 73ef4d2db..40f6aac6f 100644 +--- a/board/toradex/colibri_t20/colibri_t20.c ++++ b/board/toradex/colibri_t20/colibri_t20.c +@@ -37,7 +37,7 @@ int arch_misc_init(void) + + err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); + if (err) { +- debug("%s: Cannot find PMIC I2C chip\n", __func__); ++printf("%s: Cannot find PMIC I2C chip\n", __func__); + return err; + } + +@@ -45,7 +45,7 @@ int arch_misc_init(void) + + err = dm_i2c_read(dev, addr, data, 1); + if (err) { +- debug("failed to get PMU_SUPPLYENE\n"); ++printf("failed to get PMU_SUPPLYENE\n"); + return err; + } + +@@ -54,7 +54,7 @@ int arch_misc_init(void) + + err = dm_i2c_write(dev, addr, data, 1); + if (err) { +- debug("failed to set PMU_SUPPLYENE\n"); ++printf("failed to set PMU_SUPPLYENE\n"); + return err; + } + +diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c +index 97d6a31da..ee5c1b25a 100644 +--- a/board/toradex/verdin-imx8mm/spl.c ++++ b/board/toradex/verdin-imx8mm/spl.c +@@ -69,7 +69,7 @@ void spl_board_init(void) + int board_fit_config_name_match(const char *name) + { + /* Just empty function now - can't decide what to choose */ +- debug("%s: %s\n", __func__, name); ++printf("%s: %s\n", __func__, name); + + return 0; + } +@@ -153,7 +153,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + +diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c +index 17b4662c1..d8a7b5098 100644 +--- a/board/tqc/tqm834x/tqm834x.c ++++ b/board/tqc/tqm834x/tqm834x.c +@@ -101,16 +101,16 @@ int dram_init(void) + SYNC; + + /* size detection */ +- debug("\n"); ++printf("\n"); + size = 0; + for(cs = 0; cs < 4; ++cs) { +- debug("\nDetecting Bank%d\n", cs); ++printf("\nDetecting Bank%d\n", cs); + + bank_size = get_ddr_bank_size(cs, + (long *)(CONFIG_SYS_SDRAM_BASE + size)); + size += bank_size; + +- debug("DDR Bank%d size: %ld MiB\n\n", cs, bank_size >> 20); ++printf("DDR Bank%d size: %ld MiB\n\n", cs, bank_size >> 20); + + /* exit if less than one bank */ + if(size < DDR_MAX_SIZE_PER_CS) break; +@@ -181,9 +181,9 @@ static int detect_num_flash_banks(void) + + /* Get bank 1 and 2 information */ + bank1_size = flash_get_size(CONFIG_SYS_FLASH_BASE, 0); +- debug("Bank1 size: %lu\n", bank1_size); ++printf("Bank1 size: %lu\n", bank1_size); + bank2_size = flash_get_size(CONFIG_SYS_FLASH_BASE + bank1_size, 1); +- debug("Bank2 size: %lu\n", bank2_size); ++printf("Bank2 size: %lu\n", bank2_size); + total_size = bank1_size + bank2_size; + + if (bank2_size > 0) { +@@ -237,7 +237,7 @@ static int detect_num_flash_banks(void) + } + } + +- debug("Number of flash banks detected: %d\n", cfi_flash_num_flash_banks); ++printf("Number of flash banks detected: %d\n", cfi_flash_num_flash_banks); + + /* set OR0 and BR0 */ + set_lbc_or(0, OR_GPCM_CSNT | OR_GPCM_ACS_DIV4 | OR_GPCM_SCY_5 | +@@ -284,13 +284,13 @@ static long int get_ddr_bank_size(short cs, long *base) + /* set sdram bank configuration */ + set_cs_config(cs, CSCONFIG_EN | conf[i].col | conf[i].row); + +- debug("Getting RAM size...\n"); ++printf("Getting RAM size...\n"); + size = get_ram_size(base, DDR_MAX_SIZE_PER_CS); + + if((size == conf[i].size) && (i == detected + 1)) + detected = i; + +- debug("Trying %ld x %ld (%ld MiB) at addr %p, detected: %ld MiB\n", ++printf("Trying %ld x %ld (%ld MiB) at addr %p, detected: %ld MiB\n", + conf[i].row, + conf[i].col, + conf[i].size >> 20, +@@ -300,12 +300,12 @@ static long int get_ddr_bank_size(short cs, long *base) + + if(detected == -1){ + /* disable empty cs */ +- debug("\nNo valid configurations for CS%d, disabling...\n", cs); ++printf("\nNo valid configurations for CS%d, disabling...\n", cs); + set_cs_config(cs, 0); + return 0; + } + +- debug("\nDetected configuration %ld x %ld (%ld MiB) at addr %p\n", ++printf("\nDetected configuration %ld x %ld (%ld MiB) at addr %p\n", + conf[detected].row, conf[detected].col, conf[detected].size >> 20, base); + + /* configure cs ro detected params */ +@@ -322,7 +322,7 @@ static long int get_ddr_bank_size(short cs, long *base) + */ + static void set_cs_bounds(short cs, ulong base, ulong size) + { +- debug("Setting bounds %08lx, %08lx for cs %d\n", base, size, cs); ++printf("Setting bounds %08lx, %08lx for cs %d\n", base, size, cs); + if(size == 0){ + im->ddr.csbnds[cs].csbnds = 0x00000000; + } else { +@@ -340,7 +340,7 @@ static void set_cs_bounds(short cs, ulong base, ulong size) + */ + static void set_cs_config(short cs, long config) + { +- debug("Setting config %08lx for cs %d\n", config, cs); ++printf("Setting config %08lx for cs %d\n", config, cs); + im->ddr.cs_config[cs] = config; + SYNC; + } +diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c +index da995dd0f..4937b2e91 100644 +--- a/board/wandboard/wandboard.c ++++ b/board/wandboard/wandboard.c +@@ -368,13 +368,13 @@ int power_init_board(void) + + ret = pmic_get("pfuze100@8", &dev); + if (ret < 0) { +- debug("pmic_get() ret %d\n", ret); ++printf("pmic_get() ret %d\n", ret); + return 0; + } + + reg = pmic_reg_read(dev, PFUZE100_DEVICEID); + if (reg < 0) { +- debug("pmic_reg_read() ret %d\n", reg); ++printf("pmic_reg_read() ret %d\n", reg); + return 0; + } + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); +diff --git a/board/work-microwave/work_92105/work_92105_display.c b/board/work-microwave/work_92105/work_92105_display.c +index fecbbbdb5..c810eea1e 100644 +--- a/board/work-microwave/work_92105/work_92105_display.c ++++ b/board/work-microwave/work_92105/work_92105_display.c +@@ -225,7 +225,7 @@ void work_92105_display_init(void) + claim_err = spi_claim_bus(slave); + + if (claim_err) +- debug("Failed to claim SPI bus: %d\n", claim_err); ++printf("Failed to claim SPI bus: %d\n", claim_err); + + /* enable backlight */ + i2c_write(0x2c, 0x01, 1, &enable_backlight, 1); +diff --git a/board/xes/xpedite517x/ddr.c b/board/xes/xpedite517x/ddr.c +index a3fd2fc8c..09228f05f 100644 +--- a/board/xes/xpedite517x/ddr.c ++++ b/board/xes/xpedite517x/ddr.c +@@ -105,10 +105,10 @@ void fsl_ddr_board_options(memctl_options_t *popts, + for (i = 0; i < ARRAY_SIZE(bopts_ctrl[ctrl_num]); i++) { + if ((bopts[i].datarate_mhz_low <= datarate) && + (bopts[i].datarate_mhz_high >= datarate)) { +- debug("controller %d:\n", ctrl_num); +- debug(" clk_adjust = %d\n", bopts[i].clk_adjust); +- debug(" cpo = %d\n", bopts[i].cpo_override); +- debug(" write_data_delay = %d\n", ++printf("controller %d:\n", ctrl_num); ++printf(" clk_adjust = %d\n", bopts[i].clk_adjust); ++printf(" cpo = %d\n", bopts[i].cpo_override); ++printf(" write_data_delay = %d\n", + bopts[i].write_data_delay); + popts->clk_adjust = bopts[i].clk_adjust; + popts->cpo_override = bopts[i].cpo_override; +diff --git a/board/xes/xpedite537x/ddr.c b/board/xes/xpedite537x/ddr.c +index f55102a07..98099a7f1 100644 +--- a/board/xes/xpedite537x/ddr.c ++++ b/board/xes/xpedite537x/ddr.c +@@ -215,10 +215,10 @@ void fsl_ddr_board_options(memctl_options_t *popts, + for (i = 0; i < ARRAY_SIZE(bopts_ctrl[ctrl_num]); i++) { + if ((bopts[i].datarate_mhz_low <= datarate) && + (bopts[i].datarate_mhz_high >= datarate)) { +- debug("controller %d:\n", ctrl_num); +- debug(" clk_adjust = %d\n", bopts[i].clk_adjust); +- debug(" cpo = %d\n", bopts[i].cpo_override); +- debug(" write_data_delay = %d\n", ++printf("controller %d:\n", ctrl_num); ++printf(" clk_adjust = %d\n", bopts[i].clk_adjust); ++printf(" cpo = %d\n", bopts[i].cpo_override); ++printf(" write_data_delay = %d\n", + bopts[i].write_data_delay); + popts->clk_adjust = bopts[i].clk_adjust; + popts->cpo_override = bopts[i].cpo_override; +diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c +index 92b61d83c..e95d5dd1a 100644 +--- a/board/xilinx/common/board.c ++++ b/board/xilinx/common/board.c +@@ -32,7 +32,7 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) + if (!ofnode_valid(eeprom)) + return -ENODEV; + +- debug("%s: Path to EEPROM %s\n", __func__, ++printf("%s: Path to EEPROM %s\n", __func__, + ofnode_read_chosen_string("xlnx,eeprom")); + + ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev); +@@ -41,9 +41,9 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) + + ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6); + if (ret) +- debug("%s: I2C EEPROM MAC address read failed\n", __func__); ++printf("%s: I2C EEPROM MAC address read failed\n", __func__); + else +- debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr); ++printf("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr); + + return ret; + } +@@ -114,12 +114,12 @@ static int xilinx_read_eeprom_legacy(struct udevice *dev, char *name, + if (!eeprom_content) + return -ENOMEM; + +- debug("%s: I2C EEPROM read pass data at %p\n", __func__, ++printf("%s: I2C EEPROM read pass data at %p\n", __func__, + eeprom_content); + + ret = dm_i2c_read(dev, 0, (uchar *)eeprom_content, size); + if (ret) { +- debug("%s: I2C EEPROM read failed\n", __func__); ++printf("%s: I2C EEPROM read failed\n", __func__); + free(eeprom_content); + return ret; + } +@@ -177,13 +177,13 @@ static int xilinx_read_eeprom_fru(struct udevice *dev, char *name, + if (!fru_content) + return -ENOMEM; + +- debug("%s: I2C EEPROM read pass data at %p\n", __func__, ++printf("%s: I2C EEPROM read pass data at %p\n", __func__, + fru_content); + + ret = dm_i2c_read(dev, 0, (uchar *)fru_content, + eeprom_size); + if (ret) { +- debug("%s: I2C EEPROM read failed\n", __func__); ++printf("%s: I2C EEPROM read failed\n", __func__); + free(fru_content); + return ret; + } +@@ -197,7 +197,7 @@ static int xilinx_read_eeprom_fru(struct udevice *dev, char *name, + } + + if (desc->header == EEPROM_HEADER_MAGIC) { +- debug("Information already filled\n"); ++printf("Information already filled\n"); + return -EINVAL; + } + +@@ -222,7 +222,7 @@ static bool xilinx_detect_fru(u8 *buffer) + + checksum = fru_checksum((u8 *)buffer, sizeof(struct fru_common_hdr)); + if (checksum) { +- debug("%s Common header CRC FAIL\n", __func__); ++printf("%s Common header CRC FAIL\n", __func__); + return false; + } + +@@ -236,7 +236,7 @@ static bool xilinx_detect_fru(u8 *buffer) + if (all_zeros) + return false; + +- debug("%s Common header CRC PASS\n", __func__); ++printf("%s Common header CRC PASS\n", __func__); + return true; + } + +@@ -258,11 +258,11 @@ static int xilinx_read_eeprom_single(char *name, + + ret = dm_i2c_read(dev, 0, buffer, sizeof(buffer)); + if (ret) { +- debug("%s: I2C EEPROM read failed\n", __func__); ++printf("%s: I2C EEPROM read failed\n", __func__); + return ret; + } + +- debug("%s: i2c memory detected: %s\n", __func__, name); ++printf("%s: i2c memory detected: %s\n", __func__, name); + + if (CONFIG_IS_ENABLED(CMD_FRU) && xilinx_detect_fru(buffer)) + return xilinx_read_eeprom_fru(dev, name, desc); +@@ -288,7 +288,7 @@ __maybe_unused int xilinx_read_eeprom(void) + if (!board_info) + return -ENOMEM; + +- debug("%s: Highest ID %d, board_info %p\n", __func__, ++printf("%s: Highest ID %d, board_info %p\n", __func__, + highest_id, board_info); + + for (id = 0; id <= highest_id; id++) { +@@ -333,7 +333,7 @@ void *board_fdt_blob_setup(void) + if (fdt_magic(fdt_blob) == FDT_MAGIC) + return fdt_blob; + +- debug("DTB is not passed via %p\n", fdt_blob); ++printf("DTB is not passed via %p\n", fdt_blob); + } + + if (IS_ENABLED(CONFIG_SPL_BUILD)) { +@@ -353,7 +353,7 @@ void *board_fdt_blob_setup(void) + if (fdt_magic(fdt_blob) == FDT_MAGIC) + return fdt_blob; + +- debug("DTB is also not passed via %p\n", fdt_blob); ++printf("DTB is also not passed via %p\n", fdt_blob); + + return NULL; + } +@@ -433,7 +433,7 @@ int board_late_init_xilinx(void) + + int __maybe_unused board_fit_config_name_match(const char *name) + { +- debug("%s: Check %s, default %s\n", __func__, name, DEVICE_TREE); ++printf("%s: Check %s, default %s\n", __func__, name, DEVICE_TREE); + + if (!strcmp(name, DEVICE_TREE)) + return 0; +diff --git a/board/xilinx/common/fru_ops.c b/board/xilinx/common/fru_ops.c +index 6ed63bb7e..c99b8a73d 100644 +--- a/board/xilinx/common/fru_ops.c ++++ b/board/xilinx/common/fru_ops.c +@@ -72,7 +72,7 @@ static u8 fru_gen_type_len(u8 *addr, char *name) + member->type_len = FRU_TYPELEN_TYPE_ASCII8 << FRU_TYPELEN_TYPE_SHIFT; + member->type_len |= len; + +- debug("%lx/%lx: Add %s to 0x%lx (len 0x%x)\n", (ulong)addr, ++printf("%lx/%lx: Add %s to 0x%lx (len 0x%x)\n", (ulong)addr, + (ulong)&member->type_len, name, (ulong)&member->name, len); + memcpy(&member->name, name, len); + +@@ -106,7 +106,7 @@ int fru_generate(unsigned long addr, char *manufacturer, char *board_name, + /* board info is just right after header */ + board_info = (void *)((u8 *)header + sizeof(*header)); + +- debug("header %lx, board_info %lx\n", (ulong)header, (ulong)board_info); ++printf("header %lx, board_info %lx\n", (ulong)header, (ulong)board_info); + + board_info->ver = 1; /* 1.0 spec */ + board_info->lang_code = 0; /* English */ +@@ -151,7 +151,7 @@ int fru_generate(unsigned long addr, char *manufacturer, char *board_name, + *member = 0; /* Clear before calculation */ + *member = 0 - fru_checksum((u8 *)board_info, len); + +- debug("checksum %x(addr %x)\n", *member, len); ++printf("checksum %x(addr %x)\n", *member, len); + + env_set_hex("fru_addr", addr); + env_set_hex("filesize", (unsigned long)member - addr + 1); +@@ -289,26 +289,26 @@ static int fru_display_board(struct fru_board_data *brd, int verbose) + if (type <= FRU_TYPELEN_TYPE_ASCII8 && + (brd->lang_code == FRU_LANG_CODE_ENGLISH || + brd->lang_code == FRU_LANG_CODE_ENGLISH_1)) +- debug("Type code: %s\n", typecode[type]); ++printf("Type code: %s\n", typecode[type]); + else +- debug("Type code: %s\n", typecode[type + 1]); ++printf("Type code: %s\n", typecode[type + 1]); + + if (!len) { +- debug("%s not found\n", boardinfo[i]); ++printf("%s not found\n", boardinfo[i]); + continue; + } + + switch (type) { + case FRU_TYPELEN_TYPE_BINARY: +- debug("Length: %d\n", len); ++printf("Length: %d\n", len); + printf(" %s: 0x%x\n", boardinfo[i], *data); + break; + case FRU_TYPELEN_TYPE_ASCII8: +- debug("Length: %d\n", len); ++printf("Length: %d\n", len); + printf(" %s: %s\n", boardinfo[i], data); + break; + default: +- debug("Unsupported type %x\n", type); ++printf("Unsupported type %x\n", type); + } + + data += FRU_BOARD_MAX_LEN; +diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c +index a427ac94a..0652fda0a 100644 +--- a/board/xilinx/microblaze-generic/microblaze-generic.c ++++ b/board/xilinx/microblaze-generic/microblaze-generic.c +@@ -51,7 +51,7 @@ int board_late_init(void) + #endif + + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { +- debug("Saved variables - Skipping\n"); ++printf("Saved variables - Skipping\n"); + return 0; + } + +diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c +index 6045eb2ba..5047b106c 100644 +--- a/board/xilinx/versal/board.c ++++ b/board/xilinx/versal/board.c +@@ -51,7 +51,7 @@ int board_early_init_r(void) + if (current_el() != 3) + return 0; + +- debug("iou_switch ctrl div0 %x\n", ++printf("iou_switch ctrl div0 %x\n", + readl(&crlapb_base->iou_switch_ctrl)); + + writel(IOU_SWITCH_CTRL_CLKACT_BIT | +@@ -63,7 +63,7 @@ int board_early_init_r(void) + val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; + writel(val, &crlapb_base->timestamp_ref_ctrl); + +- debug("ref ctrl 0x%x\n", ++printf("ref ctrl 0x%x\n", + readl(&crlapb_base->timestamp_ref_ctrl)); + + /* Clear reset of timestamp reg */ +@@ -76,16 +76,16 @@ int board_early_init_r(void) + writel(COUNTER_FREQUENCY, + &iou_scntr_secure->base_frequency_id_register); + +- debug("counter val 0x%x\n", ++printf("counter val 0x%x\n", + readl(&iou_scntr_secure->base_frequency_id_register)); + + writel(IOU_SCNTRS_CONTROL_EN, + &iou_scntr_secure->counter_control_register); + +- debug("scntrs control 0x%x\n", ++printf("scntrs control 0x%x\n", + readl(&iou_scntr_secure->counter_control_register)); +- debug("timer 0x%llx\n", get_ticks()); +- debug("timer 0x%llx\n", get_ticks()); ++printf("timer 0x%llx\n", get_ticks()); ++printf("timer 0x%llx\n", get_ticks()); + + return 0; + } +@@ -117,7 +117,7 @@ int board_late_init(void) + char *env_targets; + + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { +- debug("Saved variables - Skipping\n"); ++printf("Saved variables - Skipping\n"); + return 0; + } + +@@ -155,7 +155,7 @@ int board_late_init(void) + puts("Boot from EMMC but without SD1 enabled!\n"); + return -1; + } +- debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); ++printf("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); + mode = "mmc"; + bootseq = dev_seq(dev); + break; +@@ -166,7 +166,7 @@ int board_late_init(void) + puts("Boot from SD0 but without SD0 enabled!\n"); + return -1; + } +- debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); ++printf("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); + + mode = "mmc"; + bootseq = dev_seq(dev); +@@ -181,7 +181,7 @@ int board_late_init(void) + puts("Boot from SD1 but without SD1 enabled!\n"); + return -1; + } +- debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); ++printf("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); + + mode = "mmc"; + bootseq = dev_seq(dev); +@@ -194,7 +194,7 @@ int board_late_init(void) + + if (bootseq >= 0) { + bootseq_len = snprintf(NULL, 0, "%i", bootseq); +- debug("Bootseq len: %x\n", bootseq_len); ++printf("Bootseq len: %x\n", bootseq_len); + } + + /* +diff --git a/board/xilinx/versal/cmds.c b/board/xilinx/versal/cmds.c +index f5735d0c6..20a9aa106 100644 +--- a/board/xilinx/versal/cmds.c ++++ b/board/xilinx/versal/cmds.c +@@ -22,26 +22,26 @@ static int do_versal_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc, + int ret; + + if (argc != cmdtp->maxargs) { +- debug("pdi_load: incorrect parameters passed\n"); ++printf("pdi_load: incorrect parameters passed\n"); + return CMD_RET_USAGE; + } + + addr = simple_strtol(argv[2], NULL, 16); + if (!addr) { +- debug("pdi_load: zero pdi_data address\n"); ++printf("pdi_load: zero pdi_data address\n"); + return CMD_RET_USAGE; + } + + len = simple_strtoul(argv[3], NULL, 16); + if (!len) { +- debug("pdi_load: zero size\n"); ++printf("pdi_load: zero size\n"); + return CMD_RET_USAGE; + } + + pdi_buf = (ulong *)ALIGN((ulong)addr, ARCH_DMA_MINALIGN); + if ((ulong)addr != (ulong)pdi_buf) { + memcpy((void *)pdi_buf, (void *)addr, len); +- debug("Pdi addr:0x%lx aligned to 0x%lx\n", ++printf("Pdi addr:0x%lx aligned to 0x%lx\n", + addr, (ulong)pdi_buf); + } + +diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c +index e2e9b3f0f..039f5068a 100644 +--- a/board/xilinx/zynq/board.c ++++ b/board/xilinx/zynq/board.c +@@ -40,7 +40,7 @@ int board_late_init(void) + char *env_targets; + + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { +- debug("Saved variables - Skipping\n"); ++printf("Saved variables - Skipping\n"); + return 0; + } + +diff --git a/board/xilinx/zynq/bootimg.c b/board/xilinx/zynq/bootimg.c +index 2f55078dd..249d13df2 100644 +--- a/board/xilinx/zynq/bootimg.c ++++ b/board/xilinx/zynq/bootimg.c +@@ -33,7 +33,7 @@ static int zynq_islastpartition(struct headerarray *head) + { + int index; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + if (head->fields[ZYNQ_PART_HDR_CHKSUM_WORD_COUNT] != 0xFFFFFFFF) + return -1; + +@@ -53,7 +53,7 @@ int zynq_get_part_count(struct partition_hdr *part_hdr_info) + u32 count; + struct headerarray *hap; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + for (count = 0; count < ZYNQ_MAX_PARTITION_NUMBER; count++) { + hap = (struct headerarray *)&part_hdr_info[count]; +@@ -93,7 +93,7 @@ int zynq_validate_hdr(struct partition_hdr *header) + u32 index; + u32 checksum; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + hap = (struct headerarray *)header; + +diff --git a/board/xilinx/zynq/cmds.c b/board/xilinx/zynq/cmds.c +index 6c697caa6..52500b251 100644 +--- a/board/xilinx/zynq/cmds.c ++++ b/board/xilinx/zynq/cmds.c +@@ -65,7 +65,7 @@ static void zynq_extract_ppk(u32 fsbl_len) + u32 padsize; + u8 *ppkptr; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + /* + * Extract the authenticated PPK from OCM i.e at end of the FSBL +@@ -198,7 +198,7 @@ static int zynq_authenticate_part(u8 *buffer, u32 size) + u8 *signature_ptr; + u32 status; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + signature_ptr = (u8 *)(buffer + size - ZYNQ_RSA_SIGNATURE_SIZE); + +@@ -320,7 +320,7 @@ static int zynq_verify_image(u32 src_ptr) + part_total_size = hdr_ptr->partitionwordlen; + + if (part_data_len != part_img_len) { +- debug("Encrypted\n"); ++printf("Encrypted\n"); + encrypt_part_flag = true; + } + +@@ -328,7 +328,7 @@ static int zynq_verify_image(u32 src_ptr) + part_chksum_flag = true; + + if (part_attr & ZYNQ_ATTRIBUTE_RSA_PRESENT_MASK) { +- debug("RSA Signed\n"); ++printf("RSA Signed\n"); + signed_part_flag = true; + size = part_total_size << WORD_LENGTH_SHIFT; + } else { +@@ -374,7 +374,7 @@ static int zynq_verify_image(u32 src_ptr) + printf("PART_CHKSUM_FAIL\n"); + return -1; + } +- debug("Partition Validation Done\n"); ++printf("Partition Validation Done\n"); + } + + if (signed_part_flag) { +@@ -384,11 +384,11 @@ static int zynq_verify_image(u32 src_ptr) + printf("AUTHENTICATION_FAIL\n"); + return -1; + } +- debug("Authentication Done\n"); ++printf("Authentication Done\n"); + } + + if (encrypt_part_flag) { +- debug("DECRYPTION\n"); ++printf("DECRYPTION\n"); + + part_dst_addr = part_load_addr; + +diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c +index ee4d0c85e..9441afbd9 100644 +--- a/board/xilinx/zynqmp/zynqmp.c ++++ b/board/xilinx/zynqmp/zynqmp.c +@@ -195,7 +195,7 @@ static char *zynqmp_get_silicon_idcode_name(void) + + ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); + if (ret) { +- debug("%s: Getting chipid failed\n", __func__); ++printf("%s: Getting chipid failed\n", __func__); + return "unknown"; + } + +@@ -210,7 +210,7 @@ static char *zynqmp_get_silicon_idcode_name(void) + + idcode = ret_payload[1]; + idcode2 = ret_payload[2] >> ZYNQMP_CSU_VERSION_EMPTY_SHIFT; +- debug("%s, IDCODE: 0x%0x, IDCODE2: 0x%0x\r\n", __func__, idcode, ++printf("%s, IDCODE: 0x%0x, IDCODE2: 0x%0x\r\n", __func__, idcode, + idcode2); + + for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { +@@ -271,7 +271,7 @@ static char *zynqmp_get_silicon_idcode_name(void) + } else if (zynqmp_devices[i].variants & ZYNQMP_VARIANT_DR) { + strncat(name, "dr", 2); + } else { +- debug("Variant not identified\n"); ++printf("Variant not identified\n"); + } + + return strdup(name); +@@ -526,7 +526,7 @@ static int set_fdtfile(void) + if (compatible && fdt_compat_len) { + char *name; + +- debug("Compatible: %s\n", compatible); ++printf("Compatible: %s\n", compatible); + + name = strchr(compatible, ','); + if (!name) +@@ -565,7 +565,7 @@ int board_late_init(void) + #endif + + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { +- debug("Saved variables - Skipping\n"); ++printf("Saved variables - Skipping\n"); + return 0; + } + +@@ -605,7 +605,7 @@ int board_late_init(void) + puts("Boot from EMMC but without SD0 enabled!\n"); + return -1; + } +- debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); ++printf("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); + + mode = "mmc"; + bootseq = dev_seq(dev); +@@ -619,7 +619,7 @@ int board_late_init(void) + puts("Boot from SD0 but without SD0 enabled!\n"); + return -1; + } +- debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); ++printf("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); + + mode = "mmc"; + bootseq = dev_seq(dev); +@@ -637,7 +637,7 @@ int board_late_init(void) + puts("Boot from SD1 but without SD1 enabled!\n"); + return -1; + } +- debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); ++printf("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); + + mode = "mmc"; + bootseq = dev_seq(dev); +@@ -656,7 +656,7 @@ int board_late_init(void) + + if (bootseq >= 0) { + bootseq_len = snprintf(NULL, 0, "%i", bootseq); +- debug("Bootseq len: %x\n", bootseq_len); ++printf("Bootseq len: %x\n", bootseq_len); + env_set_hex("bootseq", bootseq); + } + +diff --git a/cmd/axi.c b/cmd/axi.c +index c72197ee8..556db1ab0 100644 +--- a/cmd/axi.c ++++ b/cmd/axi.c +@@ -67,7 +67,7 @@ static int axi_set_cur_bus(unsigned int busnum) + + ret = uclass_get_device_by_seq(UCLASS_AXI, busnum, &bus); + if (ret) { +- debug("%s: No bus %d\n", __func__, busnum); ++printf("%s: No bus %d\n", __func__, busnum); + return ret; + } + axi_cur_bus = bus; +diff --git a/cmd/bcb.c b/cmd/bcb.c +index 6b6f1e9a2..a9cca98a3 100644 +--- a/cmd/bcb.c ++++ b/cmd/bcb.c +@@ -150,7 +150,7 @@ static int __bcb_load(int devnum, const char *partp) + + bcb_dev = desc->devnum; + bcb_part = part; +- debug("%s: Loaded from mmc %d:%d\n", __func__, bcb_dev, bcb_part); ++printf("%s: Loaded from mmc %d:%d\n", __func__, bcb_dev, bcb_part); + + return CMD_RET_SUCCESS; + err_read_fail: +diff --git a/cmd/bmp.c b/cmd/bmp.c +index 6040fa5d9..848946af1 100644 +--- a/cmd/bmp.c ++++ b/cmd/bmp.c +@@ -79,7 +79,7 @@ struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp, + return NULL; + } + +- debug("Gzipped BMP image detected!\n"); ++printf("Gzipped BMP image detected!\n"); + + *alloc_addr = dst; + return bmp; +diff --git a/cmd/booti.c b/cmd/booti.c +index 3df70ea9c..45a7c759c 100644 +--- a/cmd/booti.c ++++ b/cmd/booti.c +@@ -40,11 +40,11 @@ static int booti_start(struct cmd_tbl *cmdtp, int flag, int argc, + /* Setup Linux kernel Image entry point */ + if (!argc) { + ld = image_load_addr; +- debug("* kernel: default image load address = 0x%08lx\n", ++printf("* kernel: default image load address = 0x%08lx\n", + image_load_addr); + } else { + ld = simple_strtoul(argv[0], NULL, 16); +- debug("* kernel: cmdline image address = 0x%08lx\n", ld); ++printf("* kernel: cmdline image address = 0x%08lx\n", ld); + } + + temp = map_sysmem(ld, 0); +@@ -61,7 +61,7 @@ static int booti_start(struct cmd_tbl *cmdtp, int flag, int argc, + return -EINVAL; + } + +- debug("kernel image compression type %d size = 0x%08lx address = 0x%08lx\n", ++printf("kernel image compression type %d size = 0x%08lx address = 0x%08lx\n", + ctype, comp_len, (ulong)dest); + decomp_len = comp_len * 10; + ret = image_decomp(ctype, 0, ld, IH_TYPE_KERNEL, +diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c +index 409ef9a84..11dbda3dc 100644 +--- a/cmd/bootmenu.c ++++ b/cmd/bootmenu.c +@@ -256,7 +256,7 @@ static char *bootmenu_choice_entry(void *data) + } + + /* never happens */ +- debug("bootmenu: this should not happen"); ++printf("bootmenu: this should not happen"); + return NULL; + } + +@@ -493,7 +493,7 @@ cleanup: + } + + if (title && command) { +- debug("Starting entry '%s'\n", title); ++printf("Starting entry '%s'\n", title); + free(title); + run_command(command, 0); + free(command); +diff --git a/cmd/bootz.c b/cmd/bootz.c +index 7556cd275..89b31cbe0 100644 +--- a/cmd/bootz.c ++++ b/cmd/bootz.c +@@ -36,11 +36,11 @@ static int bootz_start(struct cmd_tbl *cmdtp, int flag, int argc, + /* Setup Linux kernel zImage entry point */ + if (!argc) { + images->ep = image_load_addr; +- debug("* kernel: default image load address = 0x%08lx\n", ++printf("* kernel: default image load address = 0x%08lx\n", + image_load_addr); + } else { + images->ep = simple_strtoul(argv[0], NULL, 16); +- debug("* kernel: cmdline image address = 0x%08lx\n", ++printf("* kernel: cmdline image address = 0x%08lx\n", + images->ep); + } + +diff --git a/cmd/cros_ec.c b/cmd/cros_ec.c +index eb5053d64..7d7b04292 100644 +--- a/cmd/cros_ec.c ++++ b/cmd/cros_ec.c +@@ -33,9 +33,9 @@ static int cros_ec_decode_region(int argc, char *const argv[]) + else if (0 == strcmp(*argv, "ro")) + return EC_FLASH_REGION_RO; + +- debug("%s: Invalid region '%s'\n", __func__, *argv); ++printf("%s: Invalid region '%s'\n", __func__, *argv); + } else { +- debug("%s: Missing region parameter\n", __func__); ++printf("%s: Missing region parameter\n", __func__); + } + + return -1; +@@ -76,7 +76,7 @@ static int do_read_write(struct udevice *dev, int is_write, int argc, + + ret = cros_ec_flash_offset(dev, region, &offset, ®ion_size); + if (ret) { +- debug("%s: Could not read region info\n", __func__); ++printf("%s: Could not read region info\n", __func__); + return ret; + } + if (size == -1U) +@@ -86,7 +86,7 @@ static int do_read_write(struct udevice *dev, int is_write, int argc, + cros_ec_flash_write(dev, (uint8_t *)addr, offset, size) : + cros_ec_flash_read(dev, (uint8_t *)addr, offset, size); + if (ret) { +- debug("%s: Could not %s region\n", __func__, ++printf("%s: Could not %s region\n", __func__, + is_write ? "write" : "read"); + return ret; + } +@@ -290,7 +290,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + char id[MSG_BYTES]; + + if (cros_ec_read_id(dev, id, sizeof(id))) { +- debug("%s: Could not read KBC ID\n", __func__); ++printf("%s: Could not read KBC ID\n", __func__); + return 1; + } + printf("%s\n", id); +@@ -298,7 +298,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + struct ec_response_mkbp_info info; + + if (cros_ec_info(dev, &info)) { +- debug("%s: Could not read KBC info\n", __func__); ++printf("%s: Could not read KBC info\n", __func__); + return 1; + } + printf("rows = %u\n", info.rows); +@@ -317,7 +317,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + enum ec_current_image image; + + if (cros_ec_read_current_image(dev, &image)) { +- debug("%s: Could not read KBC image\n", __func__); ++printf("%s: Could not read KBC image\n", __func__); + return 1; + } + printf("%d\n", image); +@@ -326,7 +326,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + int i; + + if (cros_ec_read_hash(dev, EC_VBOOT_HASH_OFFSET_ACTIVE, &hash)) { +- debug("%s: Could not read KBC hash\n", __func__); ++printf("%s: Could not read KBC hash\n", __func__); + return 1; + } + +@@ -359,7 +359,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + } + + if (cros_ec_reboot(dev, cmd, 0)) { +- debug("%s: Could not reboot KBC\n", __func__); ++printf("%s: Could not reboot KBC\n", __func__); + return 1; + } + } else if (0 == strcmp("events", cmd)) { +@@ -374,7 +374,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + events = simple_strtol(argv[2], NULL, 0); + + if (cros_ec_clear_host_events(dev, events)) { +- debug("%s: Could not clear host events\n", __func__); ++printf("%s: Could not clear host events\n", __func__); + return 1; + } + } else if (0 == strcmp("read", cmd)) { +@@ -392,12 +392,12 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + if (region == -1) + return CMD_RET_USAGE; + if (cros_ec_flash_offset(dev, region, &offset, &size)) { +- debug("%s: Could not read region info\n", __func__); ++printf("%s: Could not read region info\n", __func__); + ret = -1; + } else { + ret = cros_ec_flash_erase(dev, offset, size); + if (ret) { +- debug("%s: Could not erase region\n", ++printf("%s: Could not erase region\n", + __func__); + } + } +@@ -409,7 +409,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + return CMD_RET_USAGE; + ret = cros_ec_flash_offset(dev, region, &offset, &size); + if (ret) { +- debug("%s: Could not read region info\n", __func__); ++printf("%s: Could not read region info\n", __func__); + } else { + printf("Region: %s\n", region == EC_FLASH_REGION_RO ? + "RO" : "RW"); +@@ -463,7 +463,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + EC_VBNV_BLOCK_SIZE); + } + if (ret) { +- debug("%s: Could not %s VbNvContext\n", __func__, ++printf("%s: Could not %s VbNvContext\n", __func__, + argc <= 2 ? "read" : "write"); + } + } else if (0 == strcmp("test", cmd)) { +@@ -519,7 +519,7 @@ static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc, + } + + if (ret) { +- debug("%s: Could not access LDO%d\n", __func__, index); ++printf("%s: Could not access LDO%d\n", __func__, index); + return ret; + } + } else if (!strcmp("sku", cmd)) { +diff --git a/cmd/disk.c b/cmd/disk.c +index 2726115e8..bdda8f02b 100644 +--- a/cmd/disk.c ++++ b/cmd/disk.c +@@ -54,7 +54,7 @@ int common_diskboot(struct cmd_tbl *cmdtp, const char *intf, int argc, + "Name: %.32s Type: %.32s\n", intf, dev, part, info.name, + info.type); + +- debug("First Block: " LBAFU ", # of blocks: " LBAFU ++printf("First Block: " LBAFU ", # of blocks: " LBAFU + ", Block Size: %ld\n", + info.start, info.size, info.blksz); + +diff --git a/cmd/efi.c b/cmd/efi.c +index f2ed26bd4..fbb755878 100644 +--- a/cmd/efi.c ++++ b/cmd/efi.c +@@ -92,7 +92,7 @@ static void *efi_build_mem_table(struct efi_entry_memmap *map, int size, + + base = malloc(size + sizeof(*desc)); + if (!base) { +- debug("%s: Cannot allocate %#x bytes\n", __func__, size); ++printf("%s: Cannot allocate %#x bytes\n", __func__, size); + return NULL; + } + end = (struct efi_mem_desc *)((ulong)map + size); +diff --git a/cmd/flash.c b/cmd/flash.c +index 240871e80..81149fe4c 100644 +--- a/cmd/flash.c ++++ b/cmd/flash.c +@@ -412,7 +412,7 @@ int flash_sect_erase(ulong addr_first, ulong addr_last) + ++bank, ++info) { + if (s_first[bank]>=0) { + erased += s_last[bank] - s_first[bank] + 1; +- debug("Erase Flash from 0x%08lx to 0x%08lx in Bank # %ld ", ++printf("Erase Flash from 0x%08lx to 0x%08lx in Bank # %ld ", + info->start[s_first[bank]], + (s_last[bank] == info->sector_count) ? + info->start[0] + info->size - 1 : +@@ -612,7 +612,7 @@ int flash_sect_protect(int p, ulong addr_first, ulong addr_last) + } + + if (s_first[bank]>=0 && s_first[bank]<=s_last[bank]) { +- debug("%sProtecting sectors %d..%d in bank %ld\n", ++printf("%sProtecting sectors %d..%d in bank %ld\n", + p ? "" : "Un-", s_first[bank], + s_last[bank], bank + 1); + protected += s_last[bank] - s_first[bank] + 1; +diff --git a/cmd/fpga.c b/cmd/fpga.c +index 51410a8e4..5fc155bf3 100644 +--- a/cmd/fpga.c ++++ b/cmd/fpga.c +@@ -29,7 +29,7 @@ static long do_fpga_get_device(char *arg) + if (dev == FPGA_INVALID_DEVICE && arg) + dev = simple_strtol(arg, NULL, 16); + +- debug("%s: device = %ld\n", __func__, dev); ++printf("%s: device = %ld\n", __func__, dev); + + return dev; + } +@@ -41,10 +41,10 @@ static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size, + size_t local_data_size; + long local_fpga_data; + +- debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs); ++printf("%s %d, %d\n", __func__, argc, cmdtp->maxargs); + + if (argc != cmdtp->maxargs) { +- debug("fpga: incorrect parameters passed\n"); ++printf("fpga: incorrect parameters passed\n"); + return CMD_RET_USAGE; + } + +@@ -52,14 +52,14 @@ static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size, + + local_fpga_data = simple_strtol(argv[1], NULL, 16); + if (!local_fpga_data) { +- debug("fpga: zero fpga_data address\n"); ++printf("fpga: zero fpga_data address\n"); + return CMD_RET_USAGE; + } + *fpga_data = local_fpga_data; + + local_data_size = simple_strtoul(argv[2], NULL, 16); + if (!local_data_size) { +- debug("fpga: zero size\n"); ++printf("fpga: zero size\n"); + return CMD_RET_USAGE; + } + *data_size = local_data_size; +@@ -78,7 +78,7 @@ int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) + memset(&fpga_sec_info, 0, sizeof(fpga_sec_info)); + + if (argc < 5) { +- debug("fpga: incorrect parameters passed\n"); ++printf("fpga: incorrect parameters passed\n"); + return CMD_RET_USAGE; + } + +@@ -100,13 +100,13 @@ int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) + + if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH && + fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) { +- debug("fpga: Use for NonSecure bitstream\n"); ++printf("fpga: Use for NonSecure bitstream\n"); + return CMD_RET_USAGE; + } + + if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY && + !fpga_sec_info.userkey_addr) { +- debug("fpga: User key not provided\n"); ++printf("fpga: User key not provided\n"); + return CMD_RET_USAGE; + } + +@@ -244,23 +244,23 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc, + ulong dev = do_fpga_get_device(argv[0]); + char *datastr = env_get("fpgadata"); + +- debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr); ++printf("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr); + + if (dev == FPGA_INVALID_DEVICE) { +- debug("fpga: Invalid fpga device\n"); ++printf("fpga: Invalid fpga device\n"); + return CMD_RET_USAGE; + } + + if (argc == 0 && !datastr) { +- debug("fpga: No datastr passed\n"); ++printf("fpga: No datastr passed\n"); + return CMD_RET_USAGE; + } + + if (argc == 2) { + datastr = argv[1]; +- debug("fpga: Full command with two args\n"); ++printf("fpga: Full command with two args\n"); + } else if (argc == 1 && !datastr) { +- debug("fpga: Dev is setup - fpgadata passed\n"); ++printf("fpga: Dev is setup - fpgadata passed\n"); + datastr = argv[0]; + } + +@@ -268,17 +268,17 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc, + if (fit_parse_subimage(datastr, (ulong)fpga_data, + &fit_addr, &fit_uname)) { + fpga_data = (void *)fit_addr; +- debug("* fpga: subimage '%s' from FIT image ", ++printf("* fpga: subimage '%s' from FIT image ", + fit_uname); +- debug("at 0x%08lx\n", fit_addr); ++printf("at 0x%08lx\n", fit_addr); + } else + #endif + { + fpga_data = (void *)simple_strtoul(datastr, NULL, 16); +- debug("* fpga: cmdline image address = 0x%08lx\n", ++printf("* fpga: cmdline image address = 0x%08lx\n", + (ulong)fpga_data); + } +- debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data); ++printf("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data); + if (!fpga_data) { + puts("Zero fpga_data address\n"); + return CMD_RET_USAGE; +@@ -399,7 +399,7 @@ static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc, + fpga_cmd = find_cmd_tbl(argv[1], fpga_commands, + ARRAY_SIZE(fpga_commands)); + if (!fpga_cmd) { +- debug("fpga: non existing command\n"); ++printf("fpga: non existing command\n"); + return CMD_RET_USAGE; + } + +@@ -407,7 +407,7 @@ static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc, + argv += 2; + + if (argc > fpga_cmd->maxargs) { +- debug("fpga: more parameters passed\n"); ++printf("fpga: more parameters passed\n"); + return CMD_RET_USAGE; + } + +diff --git a/cmd/gpio.c b/cmd/gpio.c +index 4fdb3135f..33620845f 100644 +--- a/cmd/gpio.c ++++ b/cmd/gpio.c +@@ -87,7 +87,7 @@ static int do_gpio_status(bool all, const char *gpio_name) + flags |= FLAG_SHOW_ALL; + bank_name = gpio_get_bank_info(dev, &num_bits); + if (!num_bits) { +- debug("GPIO device %s has no bits\n", dev->name); ++printf("GPIO device %s has no bits\n", dev->name); + continue; + } + banklen = bank_name ? strlen(bank_name) : 0; +diff --git a/cmd/gpt.c b/cmd/gpt.c +index 17f2b839d..3639098ce 100644 +--- a/cmd/gpt.c ++++ b/cmd/gpt.c +@@ -64,22 +64,22 @@ static int extract_env(const char *str, char **env) + e = env_get(s); + if (e == NULL) { + #ifdef CONFIG_RANDOM_UUID +- debug("%s unset. ", str); ++printf("%s unset. ", str); + gen_rand_uuid_str(uuid_str, UUID_STR_FORMAT_GUID); + env_set(s, uuid_str); + + e = env_get(s); + if (e) { +- debug("Set to random.\n"); ++printf("Set to random.\n"); + ret = 0; + } else { +- debug("Can't get random UUID.\n"); ++printf("Can't get random UUID.\n"); + } + #else +- debug("%s unset.\n", str); ++printf("%s unset.\n", str); + #endif + } else { +- debug("%s get from environment.\n", str); ++printf("%s get from environment.\n", str); + ret = 0; + } + +@@ -176,7 +176,7 @@ static int calc_parts_list_len(int numparts) + partlistlen += numparts * (strlen("uuid=;") + UUID_STR_LEN + 1); + /* for the terminating null */ + partlistlen++; +- debug("Length of partitions_list is %d for %d partitions\n", partlistlen, ++printf("Length of partitions_list is %d for %d partitions\n", partlistlen, + numparts); + return partlistlen; + } +@@ -422,7 +422,7 @@ static int set_gpt_info(struct blk_desc *dev_desc, + lbaint_t offset = 0; + int max_str_part = calc_parts_list_len(MAX_SEARCH_PARTITIONS); + +- debug("%s: lba num: 0x%x %d\n", __func__, ++printf("%s: lba num: 0x%x %d\n", __func__, + (unsigned int)dev_desc->lba, (unsigned int)dev_desc->lba); + + if (str_part == NULL) +@@ -705,7 +705,7 @@ static int gpt_enumerate(struct blk_desc *desc) + } + if (*part_list) + part_list[strlen(part_list) - 1] = 0; +- debug("setenv gpt_partition_list %s\n", part_list); ++printf("setenv gpt_partition_list %s\n", part_list); + + return env_set("gpt_partition_list", part_list); + } +@@ -858,7 +858,7 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, + * Uncomment the following line to print a string that 'gpt write' + * or 'gpt verify' will accept as input. + */ +- debug("OLD partitions_list is %s with %u chars\n", partitions_list, ++printf("OLD partitions_list is %s with %u chars\n", partitions_list, + (unsigned)strlen(partitions_list)); + + /* set_gpt_info allocates new_partitions and str_disk_guid */ +@@ -918,7 +918,7 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, + ret = create_gpt_partitions_list(numparts, disk_guid, partitions_list); + if (ret < 0) + goto out; +- debug("NEW partitions_list is %s with %u chars\n", partitions_list, ++printf("NEW partitions_list is %s with %u chars\n", partitions_list, + (unsigned)strlen(partitions_list)); + + ret = set_gpt_info(dev_desc, partitions_list, &str_disk_guid, +@@ -930,14 +930,14 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, + if (ret < 0) + goto out; + +- debug("Writing new partition table\n"); ++printf("Writing new partition table\n"); + ret = gpt_restore(dev_desc, disk_guid, new_partitions, numparts); + if (ret < 0) { + printf("Writing new partition table failed\n"); + goto out; + } + +- debug("Reading back new partition table\n"); ++printf("Reading back new partition table\n"); + /* + * Empty the existing disk_partitions list, as otherwise the memory in + * the original list is unreachable. +diff --git a/cmd/i2c.c b/cmd/i2c.c +index 5d0e20787..f3a35bb2b 100644 +--- a/cmd/i2c.c ++++ b/cmd/i2c.c +@@ -140,7 +140,7 @@ static int cmd_i2c_set_bus_num(unsigned int busnum) + + ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); + if (ret) { +- debug("%s: No bus %d\n", __func__, busnum); ++printf("%s: No bus %d\n", __func__, busnum); + return ret; + } + i2c_cur_bus = bus; +diff --git a/cmd/mem.c b/cmd/mem.c +index 1eb83b757..7a624dadb 100644 +--- a/cmd/mem.c ++++ b/cmd/mem.c +@@ -818,7 +818,7 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr, + pattern = (vu_long) 0xaaaaaaaa; + anti_pattern = (vu_long) 0x55555555; + +- debug("%s:%d: length = 0x%.8lx\n", __func__, __LINE__, num_words); ++printf("%s:%d: length = 0x%.8lx\n", __func__, __LINE__, num_words); + /* + * Write the default pattern at each of the + * power-of-two offsets. +@@ -1099,7 +1099,7 @@ static int do_mem_mtest(struct cmd_tbl *cmdtp, int flag, int argc, + } + + printf("Testing %08lx ... %08lx:\n", start, end); +- debug("%s:%d: start %#08lx end %#08lx\n", __func__, __LINE__, ++printf("%s:%d: start %#08lx end %#08lx\n", __func__, __LINE__, + start, end); + + buf = map_sysmem(start, end - start); +@@ -1112,7 +1112,7 @@ static int do_mem_mtest(struct cmd_tbl *cmdtp, int flag, int argc, + } + + printf("Iteration: %6d\r", iteration + 1); +- debug("\n"); ++printf("\n"); + if (IS_ENABLED(CONFIG_SYS_ALT_MEMTEST)) { + errs = mem_test_alt(buf, start, end, dummy); + if (errs == -1UL) +diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c +index ed373a8c4..6fb7140ed 100644 +--- a/cmd/mtdparts.c ++++ b/cmd/mtdparts.c +@@ -236,7 +236,7 @@ static void index_partitions(void) + struct list_head *dentry; + struct mtd_device *dev; + +- debug("--- index partitions ---\n"); ++printf("--- index partitions ---\n"); + + if (current_mtd_dev) { + mtddevnum = 0; +@@ -245,7 +245,7 @@ static void index_partitions(void) + if (dev == current_mtd_dev) { + mtddevnum += current_mtd_partnum; + env_set_ulong("mtddevnum", mtddevnum); +- debug("=> mtddevnum %d,\n", mtddevnum); ++printf("=> mtddevnum %d,\n", mtddevnum); + break; + } + mtddevnum += dev->num_parts; +@@ -255,17 +255,17 @@ static void index_partitions(void) + if (part) { + env_set("mtddevname", part->name); + +- debug("=> mtddevname %s\n", part->name); ++printf("=> mtddevname %s\n", part->name); + } else { + env_set("mtddevname", NULL); + +- debug("=> mtddevname NULL\n"); ++printf("=> mtddevname NULL\n"); + } + } else { + env_set("mtddevnum", NULL); + env_set("mtddevname", NULL); + +- debug("=> mtddevnum NULL\n=> mtddevname NULL\n"); ++printf("=> mtddevnum NULL\n=> mtddevname NULL\n"); + } + } + +@@ -276,7 +276,7 @@ static void current_save(void) + { + char buf[16]; + +- debug("--- current_save ---\n"); ++printf("--- current_save ---\n"); + + if (current_mtd_dev) { + sprintf(buf, "%s%d,%d", MTD_DEV_TYPE(current_mtd_dev->id->type), +@@ -285,12 +285,12 @@ static void current_save(void) + env_set("partition", buf); + strncpy(last_partition, buf, 16); + +- debug("=> partition %s\n", buf); ++printf("=> partition %s\n", buf); + } else { + env_set("partition", NULL); + last_partition[0] = '\0'; + +- debug("=> partition NULL\n"); ++printf("=> partition NULL\n"); + } + index_partitions(); + } +@@ -525,7 +525,7 @@ static int part_sort_add(struct mtd_device *dev, struct part_info *part) + part->dev = dev; + + if (list_empty(&dev->parts)) { +- debug("part_sort_add: list empty\n"); ++printf("part_sort_add: list empty\n"); + list_add(&part->link, &dev->parts); + dev->num_parts++; + index_partitions(); +@@ -618,7 +618,7 @@ static int part_parse(const char *const partdef, const char **ret, struct part_i + /* fetch the partition size */ + if (*p == '-') { + /* assign all remaining space to this partition */ +- debug("'-': remaining size assigned\n"); ++printf("'-': remaining size assigned\n"); + size = SIZE_REMAINING; + p++; + } else { +@@ -703,7 +703,7 @@ static int part_parse(const char *const partdef, const char **ret, struct part_i + part->name[name_len - 1] = '\0'; + INIT_LIST_HEAD(&part->link); + +- debug("+ partition: name %-22s size 0x%08llx offset 0x%08llx mask flags %d\n", ++printf("+ partition: name %-22s size 0x%08llx offset 0x%08llx mask flags %d\n", + part->name, part->size, + part->offset, part->mask_flags); + +@@ -855,7 +855,7 @@ static int device_parse(const char *const mtd_dev, const char **ret, struct mtd_ + u64 offset; + int err = 1; + +- debug("===device_parse===\n"); ++printf("===device_parse===\n"); + + assert(retdev); + *retdev = NULL; +@@ -879,10 +879,10 @@ static int device_parse(const char *const mtd_dev, const char **ret, struct mtd_ + } + + pend = strchr(p, ';'); +- debug("dev type = %d (%s), dev num = %d, mtd-id = %s\n", ++printf("dev type = %d (%s), dev num = %d, mtd-id = %s\n", + id->type, MTD_DEV_TYPE(id->type), + id->num, id->mtd_id); +- debug("parsing partitions %.*s\n", (int)(pend ? pend - p : strlen(p)), p); ++printf("parsing partitions %.*s\n", (int)(pend ? pend - p : strlen(p)), p); + + /* parse partitions */ + num_parts = 0; +@@ -921,7 +921,7 @@ static int device_parse(const char *const mtd_dev, const char **ret, struct mtd_ + return 1; + } + +- debug("\ntotal partitions: %d\n", num_parts); ++printf("\ntotal partitions: %d\n", num_parts); + + /* check for next device presence */ + if (p) { +@@ -962,7 +962,7 @@ static int device_parse(const char *const mtd_dev, const char **ret, struct mtd_ + + *retdev = dev; + +- debug("===\n\n"); ++printf("===\n\n"); + return 0; + } + +@@ -1014,13 +1014,13 @@ static struct mtdids* id_find_by_mtd_id(const char *mtd_id, unsigned int mtd_id_ + struct list_head *entry; + struct mtdids *id; + +- debug("--- id_find_by_mtd_id: '%.*s' (len = %d)\n", ++printf("--- id_find_by_mtd_id: '%.*s' (len = %d)\n", + mtd_id_len, mtd_id, mtd_id_len); + + list_for_each(entry, &mtdids) { + id = list_entry(entry, struct mtdids, link); + +- debug("entry: '%s' (len = %zu)\n", ++printf("entry: '%s' (len = %zu)\n", + id->mtd_id, strlen(id->mtd_id)); + + if (mtd_id_len != strlen(id->mtd_id)) +@@ -1095,7 +1095,7 @@ static int generate_mtdparts(char *buf, u32 buflen) + u32 len, part_cnt; + u32 maxlen = buflen - 1; + +- debug("--- generate_mtdparts ---\n"); ++printf("--- generate_mtdparts ---\n"); + + if (list_empty(&devices)) { + buf[0] = '\0'; +@@ -1308,7 +1308,7 @@ static void list_partitions(void) + { + struct part_info *part; + +- debug("\n---list_partitions---\n"); ++printf("\n---list_partitions---\n"); + print_partition_table(); + + /* current_mtd_dev is not NULL only when we have non empty device list */ +@@ -1354,7 +1354,7 @@ int find_dev_and_part(const char *id, struct mtd_device **dev, + u8 type, dnum, pnum; + const char *p; + +- debug("--- find_dev_and_part ---\nid = %s\n", id); ++printf("--- find_dev_and_part ---\nid = %s\n", id); + + list_for_each(dentry, &devices) { + *part_num = 0; +@@ -1415,7 +1415,7 @@ static int delete_partition(const char *id) + + if (find_dev_and_part(id, &dev, &pnum, &part) == 0) { + +- debug("delete_partition: device = %s%d, partition %d = (%s) 0x%08llx@0x%08llx\n", ++printf("delete_partition: device = %s%d, partition %d = (%s) 0x%08llx@0x%08llx\n", + MTD_DEV_TYPE(dev->id->type), dev->id->num, pnum, + part->name, part->size, part->offset); + +@@ -1503,7 +1503,7 @@ static int spread_partitions(void) + list_for_each(pentry, &dev->parts) { + part = list_entry(pentry, struct part_info, link); + +- debug("spread_partitions: device = %s%d, partition %d =" ++printf("spread_partitions: device = %s%d, partition %d =" + " (%s) 0x%08llx@0x%08llx\n", + MTD_DEV_TYPE(dev->id->type), dev->id->num, + part_num, part->name, part->size, +@@ -1559,7 +1559,7 @@ static int parse_mtdparts(const char *const mtdparts) + int err = 1; + char tmp_parts[MTDPARTS_MAXLEN]; + +- debug("\n---parse_mtdparts---\nmtdparts = %s\n\n", mtdparts); ++printf("\n---parse_mtdparts---\nmtdparts = %s\n\n", mtdparts); + + /* delete all devices and partitions */ + if (mtd_devices_init() != 0) { +@@ -1581,7 +1581,7 @@ static int parse_mtdparts(const char *const mtdparts) + if ((device_parse(p, &p, &dev) != 0) || (!dev)) + break; + +- debug("+ device: %s\t%d\t%s\n", MTD_DEV_TYPE(dev->id->type), ++printf("+ device: %s\t%d\t%s\n", MTD_DEV_TYPE(dev->id->type), + dev->id->num, dev->id->mtd_id); + + /* check if parsed device is already on the list */ +@@ -1622,12 +1622,12 @@ static int parse_mtdids(const char *const ids) + u64 size; + int ret = 1; + +- debug("\n---parse_mtdids---\nmtdids = %s\n\n", ids); ++printf("\n---parse_mtdids---\nmtdids = %s\n\n", ids); + + /* clean global mtdids list */ + list_for_each_safe(entry, n, &mtdids) { + id_tmp = list_entry(entry, struct mtdids, link); +- debug("mtdids del: %d %d\n", id_tmp->type, id_tmp->num); ++printf("mtdids del: %d %d\n", id_tmp->type, id_tmp->num); + list_del(entry); + free(id_tmp); + } +@@ -1693,7 +1693,7 @@ static int parse_mtdids(const char *const ids) + id->mtd_id[mtd_id_len - 1] = '\0'; + INIT_LIST_HEAD(&id->link); + +- debug("+ id %s%d\t%16lld bytes\t%s\n", ++printf("+ id %s%d\t%16lld bytes\t%s\n", + MTD_DEV_TYPE(id->type), id->num, + id->size, id->mtd_id); + +@@ -1729,7 +1729,7 @@ int mtdparts_init(void) + char tmp_ep[PARTITION_MAXLEN + 1]; + char tmp_parts[MTDPARTS_MAXLEN]; + +- debug("\n---mtdparts_init---\n"); ++printf("\n---mtdparts_init---\n"); + if (!initialized) { + INIT_LIST_HEAD(&mtdids); + INIT_LIST_HEAD(&devices); +@@ -1755,18 +1755,18 @@ int mtdparts_init(void) + if (current_partition) + strncpy(tmp_ep, current_partition, PARTITION_MAXLEN); + +- debug("last_ids : %s\n", last_ids); +- debug("env_ids : %s\n", ids); +- debug("last_parts: %s\n", last_parts); +- debug("env_parts : %s\n\n", parts); ++printf("last_ids : %s\n", last_ids); ++printf("env_ids : %s\n", ids); ++printf("last_parts: %s\n", last_parts); ++printf("env_parts : %s\n\n", parts); + +- debug("last_partition : %s\n", last_partition); +- debug("env_partition : %s\n", current_partition); ++printf("last_partition : %s\n", last_partition); ++printf("env_partition : %s\n", current_partition); + + /* if mtdids variable is empty try to use defaults */ + if (!ids) { + if (mtdids_default) { +- debug("mtdids variable not defined, using default\n"); ++printf("mtdids variable not defined, using default\n"); + ids = mtdids_default; + env_set("mtdids", (char *)ids); + } else { +@@ -1828,7 +1828,7 @@ int mtdparts_init(void) + current_mtd_partnum = 0; + current_save(); + +- debug("mtdparts_init: current_mtd_dev = %s%d, current_mtd_partnum = %d\n", ++printf("mtdparts_init: current_mtd_dev = %s%d, current_mtd_partnum = %d\n", + MTD_DEV_TYPE(current_mtd_dev->id->type), + current_mtd_dev->id->num, current_mtd_partnum); + } +@@ -1847,7 +1847,7 @@ int mtdparts_init(void) + struct mtd_device *cdev; + u8 pnum; + +- debug("--- getting current partition: %s\n", tmp_ep); ++printf("--- getting current partition: %s\n", tmp_ep); + + if (find_dev_and_part(tmp_ep, &cdev, &pnum, &p) == 0) { + current_mtd_dev = cdev; +@@ -1855,7 +1855,7 @@ int mtdparts_init(void) + current_save(); + } + } else if (env_get("partition") == NULL) { +- debug("no partition variable set, setting...\n"); ++printf("no partition variable set, setting...\n"); + current_save(); + } + +@@ -1879,7 +1879,7 @@ static struct part_info* mtd_part_info(struct mtd_device *dev, unsigned int part + if (!dev) + return NULL; + +- debug("\n--- mtd_part_info: partition number %d for device %s%d (%s)\n", ++printf("\n--- mtd_part_info: partition number %d for device %s%d (%s)\n", + part_num, MTD_DEV_TYPE(dev->id->type), + dev->id->num, dev->id->mtd_id); + +@@ -2022,12 +2022,12 @@ static int do_mtdparts(struct cmd_tbl *cmdtp, int flag, int argc, + } + sprintf(tmpbuf, "%s:%s(%s)%s", + id->mtd_id, argv[3], argv[4], argv[5] ? argv[5] : ""); +- debug("add tmpbuf: %s\n", tmpbuf); ++printf("add tmpbuf: %s\n", tmpbuf); + + if ((device_parse(tmpbuf, NULL, &dev) != 0) || (!dev)) + return 1; + +- debug("+ %s\t%d\t%s\n", MTD_DEV_TYPE(dev->id->type), ++printf("+ %s\t%d\t%s\n", MTD_DEV_TYPE(dev->id->type), + dev->id->num, dev->id->mtd_id); + + p = list_entry(dev->parts.next, struct part_info, link); +@@ -2038,7 +2038,7 @@ static int do_mtdparts(struct cmd_tbl *cmdtp, int flag, int argc, + + if (!strcmp(&argv[1][3], ".spread")) { + spread_partition(mtd, p, &next_offset); +- debug("increased %s to %llu bytes\n", p->name, p->size); ++printf("increased %s to %llu bytes\n", p->name, p->size); + } + #endif + +@@ -2061,7 +2061,7 @@ static int do_mtdparts(struct cmd_tbl *cmdtp, int flag, int argc, + + /* mtdparts del part-id */ + if ((argc == 3) && (strcmp(argv[1], "del") == 0)) { +- debug("del: part-id = %s\n", argv[2]); ++printf("del: part-id = %s\n", argv[2]); + + return delete_partition(argv[2]); + } +diff --git a/cmd/nvedit.c b/cmd/nvedit.c +index d14ba10ce..13c0ef3ce 100644 +--- a/cmd/nvedit.c ++++ b/cmd/nvedit.c +@@ -232,7 +232,7 @@ static int _do_env_set(int flag, int argc, char *const argv[], int env_flag) + char *name, *value, *s; + struct env_entry e, *ep; + +- debug("Initial value for argc=%d\n", argc); ++printf("Initial value for argc=%d\n", argc); + + #if CONFIG_IS_ENABLED(CMD_NVEDIT_EFI) + if (argc > 1 && argv[1][0] == '-' && argv[1][1] == 'e') +@@ -253,7 +253,7 @@ static int _do_env_set(int flag, int argc, char *const argv[], int env_flag) + } + } + } +- debug("Final value for argc=%d\n", argc); ++printf("Final value for argc=%d\n", argc); + name = argv[1]; + + if (strchr(name, '=')) { +@@ -837,7 +837,7 @@ static int do_env_default(struct cmd_tbl *cmdtp, int flag, + { + int all = 0, env_flag = H_INTERACTIVE; + +- debug("Initial value for argc=%d\n", argc); ++printf("Initial value for argc=%d\n", argc); + while (--argc > 0 && **++argv == '-') { + char *arg = *argv; + +@@ -854,7 +854,7 @@ static int do_env_default(struct cmd_tbl *cmdtp, int flag, + } + } + } +- debug("Final value for argc=%d\n", argc); ++printf("Final value for argc=%d\n", argc); + if (all && (argc == 0)) { + /* Reset the whole environment */ + env_set_default("## Resetting to default environment\n", +@@ -876,7 +876,7 @@ static int do_env_delete(struct cmd_tbl *cmdtp, int flag, + int env_flag = H_INTERACTIVE; + int ret = 0; + +- debug("Initial value for argc=%d\n", argc); ++printf("Initial value for argc=%d\n", argc); + while (argc > 1 && **(argv + 1) == '-') { + char *arg = *++argv; + +@@ -891,7 +891,7 @@ static int do_env_delete(struct cmd_tbl *cmdtp, int flag, + } + } + } +- debug("Final value for argc=%d\n", argc); ++printf("Final value for argc=%d\n", argc); + + env_id++; + +diff --git a/cmd/pxe_utils.c b/cmd/pxe_utils.c +index 9a30629e2..fc1872e3d 100644 +--- a/cmd/pxe_utils.c ++++ b/cmd/pxe_utils.c +@@ -332,7 +332,7 @@ static int label_localboot(struct pxe_label *label) + env_set("bootargs", bootargs); + } + +- debug("running: %s\n", localcmd); ++printf("running: %s\n", localcmd); + + return run_command_list(localcmd, strlen(localcmd), 0); + } +diff --git a/cmd/setexpr.c b/cmd/setexpr.c +index e828be397..6e8139720 100644 +--- a/cmd/setexpr.c ++++ b/cmd/setexpr.c +@@ -147,7 +147,7 @@ static char *substitute(char *string, int *slen, int ssize, + if (p == NULL) + return NULL; + +- debug("## Match at pos %ld: match len %d, subst len %d\n", ++printf("## Match at pos %ld: match len %d, subst len %d\n", + (long)(p - string), olen, nlen); + + /* make sure replacement matches */ +@@ -164,7 +164,7 @@ static char *substitute(char *string, int *slen, int ssize, + + tail = ssize - (p + len - string); + +- debug("## tail len %d\n", tail); ++printf("## tail len %d\n", tail); + + memmove(p + nlen, p + olen, tail); + } +@@ -200,11 +200,11 @@ int setexpr_regex_sub(char *data, uint data_size, char *nbuf, uint nbuf_size, + + res = slre_match(&slre, datap, len - (datap - data), caps); + +- debug("Result: %d\n", res); ++printf("Result: %d\n", res); + + for (i = 0; i <= slre.num_caps; i++) { + if (caps[i].len > 0) { +- debug("Substring %d: [%.*s]\n", i, ++printf("Substring %d: [%.*s]\n", i, + caps[i].len, caps[i].ptr); + } + } +@@ -218,7 +218,7 @@ int setexpr_regex_sub(char *data, uint data_size, char *nbuf, uint nbuf_size, + } + } + +- debug("## MATCH ## %s\n", data); ++printf("## MATCH ## %s\n", data); + + if (!s) + return 1; +@@ -234,7 +234,7 @@ int setexpr_regex_sub(char *data, uint data_size, char *nbuf, uint nbuf_size, + } + strcpy(nbuf, s); + +- debug("## SUBST(1) ## %s\n", nbuf); ++printf("## SUBST(1) ## %s\n", nbuf); + + /* + * Handle back references +@@ -261,7 +261,7 @@ int setexpr_regex_sub(char *data, uint data_size, char *nbuf, uint nbuf_size, + + backref[1] += i; + +- debug("## BACKREF %d: replace \"%.*s\" by \"%.*s\" in \"%s\"\n", ++printf("## BACKREF %d: replace \"%.*s\" by \"%.*s\" in \"%s\"\n", + i, + 2, backref, + caps[i].len, caps[i].ptr, +@@ -282,7 +282,7 @@ int setexpr_regex_sub(char *data, uint data_size, char *nbuf, uint nbuf_size, + return 1; + } + } +- debug("## SUBST(2) ## %s\n", nbuf); ++printf("## SUBST(2) ## %s\n", nbuf); + + datap = substitute(datap, &len, data_size - (datap - data), + old, olen, nbuf, nlen); +@@ -290,14 +290,14 @@ int setexpr_regex_sub(char *data, uint data_size, char *nbuf, uint nbuf_size, + if (datap == NULL) + return 1; + +- debug("## REMAINDER: %s\n", datap); ++printf("## REMAINDER: %s\n", datap); + +- debug("## RESULT: %s\n", data); ++printf("## RESULT: %s\n", data); + + if (!global) + break; + } +- debug("## FINAL (now env_set()) : %s\n", data); ++printf("## FINAL (now env_set()) : %s\n", data); + + return 0; + } +@@ -337,8 +337,8 @@ static int regex_sub_var(const char *name, const char *r, const char *s, + t = value; + } + +- debug("REGEX on %s=%s\n", name, t); +- debug("REGEX=\"%s\", SUBST=\"%s\", GLOBAL=%d\n", r, s ? s : "", ++printf("REGEX on %s=%s\n", name, t); ++printf("REGEX=\"%s\", SUBST=\"%s\", GLOBAL=%d\n", r, s ? s : "", + global); + + len = strlen(t); +diff --git a/cmd/sf.c b/cmd/sf.c +index 46346fb9d..08eafa463 100644 +--- a/cmd/sf.c ++++ b/cmd/sf.c +@@ -173,14 +173,14 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, + { + char *ptr = (char *)buf; + +- debug("offset=%#x, sector_size=%#x, len=%#zx\n", ++printf("offset=%#x, sector_size=%#x, len=%#zx\n", + offset, flash->sector_size, len); + /* Read the entire sector so to allow for rewriting */ + if (spi_flash_read(flash, offset, flash->sector_size, cmp_buf)) + return "read"; + /* Compare only what is meaningful (len) */ + if (memcmp(cmp_buf, buf, len) == 0) { +- debug("Skip region %x size %zx: no change\n", ++printf("Skip region %x size %zx: no change\n", + offset, len); + *skipped += len; + return NULL; +diff --git a/cmd/source.c b/cmd/source.c +index 71f71528a..d0c2d80d6 100644 +--- a/cmd/source.c ++++ b/cmd/source.c +@@ -155,7 +155,7 @@ int image_source_script(ulong addr, const char *fit_uname) + return 1; + } + +- debug("** Script length: %ld\n", len); ++printf("** Script length: %ld\n", len); + return run_command_list((char *)data, len, 0); + } + +@@ -171,16 +171,16 @@ static int do_source(struct cmd_tbl *cmdtp, int flag, int argc, + /* Find script image */ + if (argc < 2) { + addr = CONFIG_SYS_LOAD_ADDR; +- debug("* source: default load address = 0x%08lx\n", addr); ++printf("* source: default load address = 0x%08lx\n", addr); + #if defined(CONFIG_FIT) + } else if (fit_parse_subimage(argv[1], image_load_addr, &addr, + &fit_uname)) { +- debug("* source: subimage '%s' from FIT image at 0x%08lx\n", ++printf("* source: subimage '%s' from FIT image at 0x%08lx\n", + fit_uname, addr); + #endif + } else { + addr = simple_strtoul(argv[1], NULL, 16); +- debug("* source: cmdline image address = 0x%08lx\n", addr); ++printf("* source: cmdline image address = 0x%08lx\n", addr); + } + + printf ("## Executing script at %08lx\n", addr); +diff --git a/cmd/spl.c b/cmd/spl.c +index 472703f8f..a0e152288 100644 +--- a/cmd/spl.c ++++ b/cmd/spl.c +@@ -79,14 +79,14 @@ static int call_bootm(int argc, char *const argv[], const char *subcommand[]) + */ + while (subcommand[i] != NULL) { + bootm_argv[1] = (char *)subcommand[i]; +- debug("args %d: %s %s ", argc, bootm_argv[0], bootm_argv[1]); ++printf("args %d: %s %s ", argc, bootm_argv[0], bootm_argv[1]); + for (j = 0; j < argc; j++) +- debug("%s ", bootm_argv[j + 2]); +- debug("\n"); ++printf("%s ", bootm_argv[j + 2]); ++printf("\n"); + + ret = do_bootm(find_cmd("do_bootm"), 0, argc+2, + bootm_argv); +- debug("Subcommand retcode: %d\n", ret); ++printf("Subcommand retcode: %d\n", ret); + i++; + } + +diff --git a/cmd/test.c b/cmd/test.c +index fa7c48fb9..98026a275 100644 +--- a/cmd/test.c ++++ b/cmd/test.c +@@ -63,10 +63,10 @@ static int do_test(struct cmd_tbl *cmdtp, int flag, int argc, + + #ifdef DEBUG + { +- debug("test(%d):", argc); ++printf("test(%d):", argc); + left = 1; + while (argv[left]) +- debug(" '%s'", argv[left++]); ++printf(" '%s'", argv[left++]); + } + #endif + +diff --git a/cmd/ti/ddr3.c b/cmd/ti/ddr3.c +index 6b43a7386..f07a512bd 100644 +--- a/cmd/ti/ddr3.c ++++ b/cmd/ti/ddr3.c +@@ -194,7 +194,7 @@ static int ddr_memory_ecc_err(u32 addr, u32 ecc_err) + u32 ecc_ctrl = readl(&emif->emif_ecc_ctrl_reg); + u32 val1, val2, val3; + +- debug("Disabling D-Cache before ECC test\n"); ++printf("Disabling D-Cache before ECC test\n"); + dcache_disable(); + invalidate_dcache_all(); + +@@ -225,7 +225,7 @@ static int ddr_memory_ecc_err(u32 addr, u32 ecc_err) + + ddr_check_ecc_status(); + +- debug("Enabling D-cache back after ECC test\n"); ++printf("Enabling D-cache back after ECC test\n"); + enable_caches(); + + return 0; +diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c +index a3ccb12f5..2cdc63a20 100644 +--- a/cmd/tpm_test.c ++++ b/cmd/tpm_test.c +@@ -59,7 +59,7 @@ static uint32_t tpm_get_flags(struct udevice *dev, uint8_t *disable, + *deactivated = pflags.deactivated; + if (nvlocked) + *nvlocked = pflags.nv_locked; +- debug("TPM: Got flags disable=%d, deactivated=%d, nvlocked=%d\n", ++printf("TPM: Got flags disable=%d, deactivated=%d, nvlocked=%d\n", + pflags.disable, pflags.deactivated, pflags.nv_locked); + + return 0; +@@ -67,7 +67,7 @@ static uint32_t tpm_get_flags(struct udevice *dev, uint8_t *disable, + + static uint32_t tpm_nv_write_value_lock(struct udevice *dev, uint32_t index) + { +- debug("TPM: Write lock 0x%x\n", index); ++printf("TPM: Write lock 0x%x\n", index); + + return tpm_nv_write_value(dev, index, NULL, 0); + } +diff --git a/cmd/tsi148.c b/cmd/tsi148.c +index 2eae14f87..51afc93c7 100644 +--- a/cmd/tsi148.c ++++ b/cmd/tsi148.c +@@ -63,10 +63,10 @@ int tsi148_init(void) + val &= ~0xf; + dev->uregs = (TSI148 *)val; + +- debug("Tsi148: Base : %p\n", dev->uregs); ++printf("Tsi148: Base : %p\n", dev->uregs); + + /* check mapping */ +- debug("Tsi148: Read via mapping, PCI_ID = %08X\n", ++printf("Tsi148: Read via mapping, PCI_ID = %08X\n", + readl(&dev->uregs->pci_id)); + if (((LPCI_DEVICE << 16) | LPCI_VENDOR) != readl(&dev->uregs->pci_id)) { + printf("Tsi148: Cannot read PCI-ID via Mapping: %08x\n", +@@ -75,7 +75,7 @@ int tsi148_init(void) + goto break_30; + } + +- debug("Tsi148: PCI_BS = %08X\n", readl(&dev->uregs->pci_mbarl)); ++printf("Tsi148: PCI_BS = %08X\n", readl(&dev->uregs->pci_mbarl)); + + dev->pci_bs = readl(&dev->uregs->pci_mbarl); + +@@ -115,7 +115,7 @@ int tsi148_init(void) + __raw_writel(val, &dev->uregs->vstat); + eieio(); + +- debug("Tsi148: register struct size %08x\n", sizeof(TSI148)); ++printf("Tsi148: register struct size %08x\n", sizeof(TSI148)); + + return 0; + +@@ -151,7 +151,7 @@ int tsi148_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr, + goto exit_10; + } + +- debug("Tsi148: Using image %d\n", i); ++printf("Tsi148: Using image %d\n", i); + + printf("Tsi148: Pci addr %08x\n", pciAddr); + +@@ -199,15 +199,15 @@ int tsi148_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr, + + __raw_writel(htonl(ctl), &dev->uregs->outbound[i].otat); + +- debug("Tsi148: window-addr =%p\n", ++printf("Tsi148: window-addr =%p\n", + &dev->uregs->outbound[i].otsau); +- debug("Tsi148: pci slave window[%d] attr =%08x\n", ++printf("Tsi148: pci slave window[%d] attr =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->outbound[i].otat))); +- debug("Tsi148: pci slave window[%d] start =%08x\n", ++printf("Tsi148: pci slave window[%d] start =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->outbound[i].otsal))); +- debug("Tsi148: pci slave window[%d] end =%08x\n", ++printf("Tsi148: pci slave window[%d] end =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->outbound[i].oteal))); +- debug("Tsi148: pci slave window[%d] offset=%08x\n", ++printf("Tsi148: pci slave window[%d] offset=%08x\n", + i, ntohl(__raw_readl(&dev->uregs->outbound[i].otofl))); + + return 0; +@@ -276,7 +276,7 @@ int tsi148_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr, + goto exit_10; + } + +- debug("Tsi148: Using image %d\n", i); ++printf("Tsi148: Using image %d\n", i); + + __raw_writel(htonl(vmeAddr), &dev->uregs->inbound[i].itsal); + __raw_writel(0x00000000, &dev->uregs->inbound[i].itsau); +@@ -292,15 +292,15 @@ int tsi148_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr, + ctl |= 0x80000000; /* enable */ + __raw_writel(htonl(ctl), &dev->uregs->inbound[i].itat); + +- debug("Tsi148: window-addr =%p\n", ++printf("Tsi148: window-addr =%p\n", + &dev->uregs->inbound[i].itsau); +- debug("Tsi148: vme slave window[%d] attr =%08x\n", ++printf("Tsi148: vme slave window[%d] attr =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->inbound[i].itat))); +- debug("Tsi148: vme slave window[%d] start =%08x\n", ++printf("Tsi148: vme slave window[%d] start =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->inbound[i].itsal))); +- debug("Tsi148: vme slave window[%d] end =%08x\n", ++printf("Tsi148: vme slave window[%d] end =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->inbound[i].iteal))); +- debug("Tsi148: vme slave window[%d] offset=%08x\n", ++printf("Tsi148: vme slave window[%d] offset=%08x\n", + i, ntohl(__raw_readl(&dev->uregs->inbound[i].itofl))); + + return 0; +diff --git a/cmd/ubifs.c b/cmd/ubifs.c +index a26b653d6..15c135223 100644 +--- a/cmd/ubifs.c ++++ b/cmd/ubifs.c +@@ -24,7 +24,7 @@ int cmd_ubifs_mount(char *vol_name) + { + int ret; + +- debug("Using volume %s\n", vol_name); ++printf("Using volume %s\n", vol_name); + + if (ubifs_initialized == 0) { + ubifs_init(); +@@ -94,7 +94,7 @@ static int do_ubifs_ls(struct cmd_tbl *cmdtp, int flag, int argc, + + if (argc == 2) + filename = argv[1]; +- debug("Using filename %s\n", filename); ++printf("Using filename %s\n", filename); + + ret = ubifs_ls(filename); + if (ret) { +@@ -133,7 +133,7 @@ static int do_ubifs_load(struct cmd_tbl *cmdtp, int flag, int argc, + if (endp == argv[3]) + return CMD_RET_USAGE; + } +- debug("Loading file '%s' to address 0x%08x (size %d)\n", filename, addr, size); ++printf("Loading file '%s' to address 0x%08x (size %d)\n", filename, addr, size); + + ret = ubifs_load(filename, addr, size); + if (ret) { +diff --git a/common/autoboot.c b/common/autoboot.c +index b42148c72..92dbaaabc 100644 +--- a/common/autoboot.c ++++ b/common/autoboot.c +@@ -345,7 +345,7 @@ const char *bootdelay_process(void) + bootdelay = fdtdec_get_config_int(gd->fdt_blob, "bootdelay", + bootdelay); + +- debug("### main_loop entered: bootdelay=%d\n\n", bootdelay); ++printf("### main_loop entered: bootdelay=%d\n\n", bootdelay); + + if (IS_ENABLED(CONFIG_AUTOBOOT_MENU_SHOW)) + bootdelay = menu_show(bootdelay); +@@ -370,7 +370,7 @@ const char *bootdelay_process(void) + + void autoboot_command(const char *s) + { +- debug("### main_loop: bootcmd=\"%s\"\n", s ? s : ""); ++printf("### main_loop: bootcmd=\"%s\"\n", s ? s : ""); + + if (s && (stored_bootdelay == -2 || + (stored_bootdelay != -1 && !abortboot(stored_bootdelay)))) { +diff --git a/common/board_f.c b/common/board_f.c +index 203e96579..46639dd53 100644 +--- a/common/board_f.c ++++ b/common/board_f.c +@@ -149,7 +149,7 @@ static int display_text_info(void) + text_base = CONFIG_SYS_MONITOR_BASE; + #endif + +- debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", ++printf("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", + text_base, bss_start, bss_end); + #endif + +@@ -165,7 +165,7 @@ static int print_resetinfo(void) + + ret = uclass_first_device_err(UCLASS_SYSRESET, &dev); + if (ret) { +- debug("%s: No sysreset device found (error: %d)\n", ++printf("%s: No sysreset device found (error: %d)\n", + __func__, ret); + /* Not all boards have sysreset drivers available during early + * boot, so don't fail if one can't be found. +@@ -189,14 +189,14 @@ static int print_cpuinfo(void) + + dev = cpu_get_current_dev(); + if (!dev) { +- debug("%s: Could not get CPU device\n", ++printf("%s: Could not get CPU device\n", + __func__); + return -ENODEV; + } + + ret = cpu_get_desc(dev, desc, sizeof(desc)); + if (ret) { +- debug("%s: Could not get CPU description (err = %d)\n", ++printf("%s: Could not get CPU description (err = %d)\n", + dev->name, ret); + return ret; + } +@@ -218,16 +218,16 @@ static int show_dram_config(void) + unsigned long long size; + int i; + +- debug("\nRAM Configuration:\n"); ++printf("\nRAM Configuration:\n"); + for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + size += gd->bd->bi_dram[i].size; +- debug("Bank #%d: %llx ", i, ++printf("Bank #%d: %llx ", i, + (unsigned long long)(gd->bd->bi_dram[i].start)); + #ifdef DEBUG + print_size(gd->bd->bi_dram[i].size, "\n"); + #endif + } +- debug("\nDRAM: "); ++printf("\nDRAM: "); + + print_size(size, ""); + board_add_ram_info(0); +@@ -283,7 +283,7 @@ static int setup_spl_handoff(void) + #if CONFIG_IS_ENABLED(HANDOFF) + gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF, + sizeof(struct spl_handoff)); +- debug("Found SPL hand-off info %p\n", gd->spl_handoff); ++printf("Found SPL hand-off info %p\n", gd->spl_handoff); + #endif + + return 0; +@@ -319,11 +319,11 @@ __weak ulong board_get_usable_ram_top(ulong total_size) + + static int setup_dest_addr(void) + { +- debug("Monitor len: %08lX\n", gd->mon_len); ++printf("Monitor len: %08lX\n", gd->mon_len); + /* + * Ram is setup, size stored in gd !! + */ +- debug("Ram size: %08lX\n", (ulong)gd->ram_size); ++printf("Ram size: %08lX\n", (ulong)gd->ram_size); + #if defined(CONFIG_SYS_MEM_TOP_HIDE) + /* + * Subtract specified amount of memory to hide so that it won't +@@ -343,7 +343,7 @@ static int setup_dest_addr(void) + gd->ram_top = gd->ram_base + get_effective_memsize(); + gd->ram_top = board_get_usable_ram_top(gd->mon_len); + gd->relocaddr = gd->ram_top; +- debug("Ram top: %08lX\n", (ulong)gd->ram_top); ++printf("Ram top: %08lX\n", (ulong)gd->ram_top); + #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) + /* + * We need to make sure the location we intend to put secondary core +@@ -351,7 +351,7 @@ static int setup_dest_addr(void) + */ + if (gd->relocaddr > determine_mp_bootpg(NULL)) { + gd->relocaddr = determine_mp_bootpg(NULL); +- debug("Reserving MP boot page to %08lx\n", gd->relocaddr); ++printf("Reserving MP boot page to %08lx\n", gd->relocaddr); + } + #endif + return 0; +@@ -365,7 +365,7 @@ static int reserve_pram(void) + + reg = env_get_ulong("pram", 10, CONFIG_PRAM); + gd->relocaddr -= (reg << 10); /* size is in kB */ +- debug("Reserving %ldk for protected RAM at %08lx\n", reg, ++printf("Reserving %ldk for protected RAM at %08lx\n", reg, + gd->relocaddr); + return 0; + } +@@ -393,7 +393,7 @@ static int reserve_video(void) + ret = video_reserve(&addr); + if (ret) + return ret; +- debug("Reserving %luk for video at: %08lx\n", ++printf("Reserving %luk for video at: %08lx\n", + ((unsigned long)gd->relocaddr - addr) >> 10, addr); + gd->relocaddr = addr; + #elif defined(CONFIG_LCD) +@@ -414,7 +414,7 @@ static int reserve_trace(void) + #ifdef CONFIG_TRACE + gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; + gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); +- debug("Reserving %luk for trace data at: %08lx\n", ++printf("Reserving %luk for trace data at: %08lx\n", + (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); + #endif + +@@ -435,7 +435,7 @@ static int reserve_uboot(void) + gd->relocaddr &= ~(65536 - 1); + #endif + +- debug("Reserving %ldk for U-Boot at: %08lx\n", ++printf("Reserving %ldk for U-Boot at: %08lx\n", + gd->mon_len >> 10, gd->relocaddr); + } + +@@ -470,7 +470,7 @@ static int reserve_noncached(void) + MMU_SECTION_SIZE; + gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY, + MMU_SECTION_SIZE); +- debug("Reserving %dM for noncached_alloc() at: %08lx\n", ++printf("Reserving %dM for noncached_alloc() at: %08lx\n", + CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp); + + return 0; +@@ -481,7 +481,7 @@ static int reserve_noncached(void) + static int reserve_malloc(void) + { + gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN); +- debug("Reserving %dk for malloc() at: %08lx\n", ++printf("Reserving %dk for malloc() at: %08lx\n", + TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); + #ifdef CONFIG_SYS_NONCACHED_MEMORY + reserve_noncached(); +@@ -498,7 +498,7 @@ static int reserve_board(void) + gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp, + sizeof(struct bd_info)); + memset(gd->bd, '\0', sizeof(struct bd_info)); +- debug("Reserving %zu Bytes for Board Info at: %08lx\n", ++printf("Reserving %zu Bytes for Board Info at: %08lx\n", + sizeof(struct bd_info), gd->start_addr_sp); + } + return 0; +@@ -508,7 +508,7 @@ static int reserve_global_data(void) + { + gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t)); + gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); +- debug("Reserving %zu Bytes for Global Data at: %08lx\n", ++printf("Reserving %zu Bytes for Global Data at: %08lx\n", + sizeof(gd_t), gd->start_addr_sp); + return 0; + } +@@ -526,7 +526,7 @@ static int reserve_fdt(void) + + gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size); + gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); +- debug("Reserving %lu Bytes for FDT at: %08lx\n", ++printf("Reserving %lu Bytes for FDT at: %08lx\n", + gd->fdt_size, gd->start_addr_sp); + } + } +@@ -541,7 +541,7 @@ static int reserve_bootstage(void) + + gd->start_addr_sp = reserve_stack_aligned(size); + gd->new_bootstage = map_sysmem(gd->start_addr_sp, size); +- debug("Reserving %#x Bytes for bootstage at: %08lx\n", size, ++printf("Reserving %#x Bytes for bootstage at: %08lx\n", size, + gd->start_addr_sp); + #endif + +@@ -580,7 +580,7 @@ static int reserve_bloblist(void) + + static int display_new_sp(void) + { +- debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); ++printf("New Stack Pointer is: %08lx\n", gd->start_addr_sp); + + return 0; + } +@@ -639,7 +639,7 @@ static int reloc_bootstage(void) + if (gd->new_bootstage) { + int size = bootstage_get_size(); + +- debug("Copying bootstage from %p to %p, size %x\n", ++printf("Copying bootstage from %p to %p, size %x\n", + gd->bootstage, gd->new_bootstage, size); + memcpy(gd->new_bootstage, gd->bootstage, size); + gd->bootstage = gd->new_bootstage; +@@ -658,7 +658,7 @@ static int reloc_bloblist(void) + if (gd->new_bloblist) { + int size = CONFIG_BLOBLIST_SIZE; + +- debug("Copying bloblist from %p to %p, size %x\n", ++printf("Copying bloblist from %p to %p, size %x\n", + gd->bloblist, gd->new_bloblist, size); + bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC, + gd->bloblist, size); +@@ -672,7 +672,7 @@ static int reloc_bloblist(void) + static int setup_reloc(void) + { + if (gd->flags & GD_FLG_SKIP_RELOC) { +- debug("Skipping relocation due to flag\n"); ++printf("Skipping relocation due to flag\n"); + return 0; + } + +@@ -691,8 +691,8 @@ static int setup_reloc(void) + #endif + memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); + +- debug("Relocation Offset is: %08lx\n", gd->reloc_off); +- debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", ++printf("Relocation Offset is: %08lx\n", gd->reloc_off); ++printf("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", + gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), + gd->start_addr_sp); + +@@ -755,7 +755,7 @@ static int initf_bootstage(void) + + ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE); + if (ret && ret != -ENOENT) { +- debug("Failed to unstash bootstage: err=%d\n", ret); ++printf("Failed to unstash bootstage: err=%d\n", ret); + return ret; + } + } +diff --git a/common/board_r.c b/common/board_r.c +index 3f8240477..9d9201bde 100644 +--- a/common/board_r.c ++++ b/common/board_r.c +@@ -219,7 +219,7 @@ static int initr_malloc(void) + ulong malloc_start; + + #if CONFIG_VAL(SYS_MALLOC_F_LEN) +- debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, ++printf("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, + gd->malloc_ptr / 1024); + #endif + /* The malloc area is immediately below the monitor copy in DRAM */ +@@ -308,7 +308,7 @@ __weak int power_init_board(void) + + static int initr_announce(void) + { +- debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr); ++printf("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr); + return 0; + } + +@@ -533,7 +533,7 @@ static int initr_net(void) + puts("Net: "); + eth_initialize(); + #if defined(CONFIG_RESET_PHY_R) +- debug("Reset Ethernet PHY\n"); ++printf("Reset Ethernet PHY\n"); + reset_phy(); + #endif + return 0; +diff --git a/common/boot_fit.c b/common/boot_fit.c +index dfc2a3117..1f9a395aa 100644 +--- a/common/boot_fit.c ++++ b/common/boot_fit.c +@@ -24,20 +24,20 @@ static int fdt_offset(const void *fit) + + images = fdt_path_offset(fit, FIT_IMAGES_PATH); + if (images < 0) { +- debug("%s: Cannot find /images node: %d\n", __func__, images); ++printf("%s: Cannot find /images node: %d\n", __func__, images); + return -EINVAL; + } + + fdt_name = fdt_getprop(fit, node, FIT_FDT_PROP, &fdt_len); + if (!fdt_name) { +- debug("%s: Cannot find fdt name property: %d\n", ++printf("%s: Cannot find fdt name property: %d\n", + __func__, fdt_len); + return -EINVAL; + } + + fdt_node = fdt_subnode_offset(fit, images, fdt_name); + if (fdt_node < 0) { +- debug("%s: Cannot find fdt node '%s': %d\n", ++printf("%s: Cannot find fdt node '%s': %d\n", + __func__, fdt_name, fdt_node); + return -EINVAL; + } +@@ -67,7 +67,7 @@ void *locate_dtb_in_fit(const void *fit) + header = (struct image_header *)fit; + + if (image_get_magic(header) != FDT_MAGIC) { +- debug("No FIT image appended to U-boot\n"); ++printf("No FIT image appended to U-boot\n"); + return NULL; + } + +diff --git a/common/bootm.c b/common/bootm.c +index ea71522d0..5ccabde1d 100644 +--- a/common/bootm.c ++++ b/common/bootm.c +@@ -402,15 +402,15 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress) + + flush_cache(flush_start, ALIGN(load_end, ARCH_DMA_MINALIGN) - flush_start); + +- debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, load_end); ++printf(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, load_end); + bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED); + + no_overlap = (os.comp == IH_COMP_NONE && load == image_start); + + if (!no_overlap && load < blob_end && load_end > blob_start) { +- debug("images.os.start = 0x%lX, images.os.end = 0x%lx\n", ++printf("images.os.start = 0x%lX, images.os.end = 0x%lx\n", + blob_start, blob_end); +- debug("images.os.load = 0x%lx, load_end = 0x%lx\n", load, ++printf("images.os.load = 0x%lx, load_end = 0x%lx\n", load, + load_end); + + /* Check what type of image this is. */ +@@ -511,7 +511,7 @@ static int fixup_silent_linux(char *buf, int maxlen) + else if (want_silent == -1 && !(gd->flags & GD_FLG_SILENT)) + return 0; + +- debug("before silent fix-up: %s\n", cmdline); ++printf("before silent fix-up: %s\n", cmdline); + if (*cmdline) { + char *start = strstr(cmdline, CONSOLE_ARG); + +@@ -539,7 +539,7 @@ static int fixup_silent_linux(char *buf, int maxlen) + return -ENOSPC; + strcpy(buf, CONSOLE_ARG); + } +- debug("after silent fix-up: %s\n", buf); ++printf("after silent fix-up: %s\n", buf); + + return 0; + } +@@ -946,7 +946,7 @@ static const void *boot_get_kernel(struct cmd_tbl *cmdtp, int flag, int argc, + return NULL; + } + +- debug(" kernel data at 0x%08lx, len = 0x%08lx (%ld)\n", ++printf(" kernel data at 0x%08lx, len = 0x%08lx (%ld)\n", + *os_data, *os_len, *os_len); + + return buf; +diff --git a/common/bootm_os.c b/common/bootm_os.c +index 0b6325db6..3e90ee3b0 100644 +--- a/common/bootm_os.c ++++ b/common/bootm_os.c +@@ -621,7 +621,7 @@ int boot_selected_os(int argc, char *const argv[], int state, + state == BOOTM_STATE_OS_FAKE_GO) /* We expect to return */ + return 0; + bootstage_error(BOOTSTAGE_ID_BOOT_OS_RETURNED); +- debug("\n## Control returned to monitor - resetting...\n"); ++printf("\n## Control returned to monitor - resetting...\n"); + + return BOOTM_ERR_RESET; + } +diff --git a/common/bootstage.c b/common/bootstage.c +index 462110568..f6622405c 100644 +--- a/common/bootstage.c ++++ b/common/bootstage.c +@@ -69,7 +69,7 @@ int bootstage_relocate(void) + * Duplicate all strings. They may point to an old location in the + * program .text section that can eventually get trashed. + */ +- debug("Relocating %d records\n", data->rec_count); ++printf("Relocating %d records\n", data->rec_count); + for (i = 0; i < data->rec_count; i++) { + const char *from = data->record[i].name; + +@@ -397,7 +397,7 @@ int bootstage_stash(void *base, int size) + int i; + + if (hdr + 1 > (struct bootstage_hdr *)end) { +- debug("%s: Not enough space for bootstage hdr\n", __func__); ++printf("%s: Not enough space for bootstage hdr\n", __func__); + return -ENOSPC; + } + +@@ -424,13 +424,13 @@ int bootstage_stash(void *base, int size) + + /* Check for buffer overflow */ + if (ptr > end) { +- debug("%s: Not enough space for bootstage stash\n", __func__); ++printf("%s: Not enough space for bootstage stash\n", __func__); + return -ENOSPC; + } + + /* Update total data size */ + hdr->size = ptr - (char *)base; +- debug("Stashed %d records\n", hdr->count); ++printf("Stashed %d records\n", hdr->count); + + return 0; + } +@@ -448,35 +448,35 @@ int bootstage_unstash(const void *base, int size) + end = (char *)(~(uintptr_t)0); + + if (hdr + 1 > (struct bootstage_hdr *)end) { +- debug("%s: Not enough space for bootstage hdr\n", __func__); ++printf("%s: Not enough space for bootstage hdr\n", __func__); + return -EPERM; + } + + if (hdr->magic != BOOTSTAGE_MAGIC) { +- debug("%s: Invalid bootstage magic\n", __func__); ++printf("%s: Invalid bootstage magic\n", __func__); + return -ENOENT; + } + + if (ptr + hdr->size > end) { +- debug("%s: Bootstage data runs past buffer end\n", __func__); ++printf("%s: Bootstage data runs past buffer end\n", __func__); + return -ENOSPC; + } + + if (hdr->count * sizeof(*rec) > hdr->size) { +- debug("%s: Bootstage has %d records needing %lu bytes, but " ++printf("%s: Bootstage has %d records needing %lu bytes, but " + "only %d bytes is available\n", __func__, hdr->count, + (ulong)hdr->count * sizeof(*rec), hdr->size); + return -ENOSPC; + } + + if (hdr->version != BOOTSTAGE_VERSION) { +- debug("%s: Bootstage data version %#0x unrecognised\n", ++printf("%s: Bootstage data version %#0x unrecognised\n", + __func__, hdr->version); + return -EINVAL; + } + + if (data->rec_count + hdr->count > RECORD_COUNT) { +- debug("%s: Bootstage has %d records, we have space for %d\n" ++printf("%s: Bootstage has %d records, we have space for %d\n" + "Please increase CONFIG_(SPL_)BOOTSTAGE_RECORD_COUNT\n", + __func__, hdr->count, RECORD_COUNT - data->rec_count); + return -ENOSPC; +@@ -503,7 +503,7 @@ int bootstage_unstash(const void *base, int size) + /* Mark the records as read */ + data->rec_count += hdr->count; + data->next_id = hdr->next_id; +- debug("Unstashed %d records\n", hdr->count); ++printf("Unstashed %d records\n", hdr->count); + + return 0; + } +diff --git a/common/bouncebuf.c b/common/bouncebuf.c +index 6d98920de..941b22e92 100644 +--- a/common/bouncebuf.c ++++ b/common/bouncebuf.c +@@ -19,13 +19,13 @@ static int addr_aligned(struct bounce_buffer *state) + + /* Check if start is aligned */ + if ((ulong)state->user_buffer & align_mask) { +- debug("Unaligned buffer address %p\n", state->user_buffer); ++printf("Unaligned buffer address %p\n", state->user_buffer); + return 0; + } + + /* Check if length is aligned */ + if (state->len != state->len_aligned) { +- debug("Unaligned buffer length %zu\n", state->len); ++printf("Unaligned buffer length %zu\n", state->len); + return 0; + } + +diff --git a/common/cli_simple.c b/common/cli_simple.c +index e80ba488a..bd5643d91 100644 +--- a/common/cli_simple.c ++++ b/common/cli_simple.c +@@ -331,7 +331,7 @@ int cli_simple_run_command_list(char *cmd, int flag) + *next = '\0'; + /* run only non-empty commands */ + if (*line) { +- debug("** exec: \"%s\"\n", line); ++printf("** exec: \"%s\"\n", line); + if (cli_simple_run_command(line, 0) < 0) { + rcode = 1; + break; +diff --git a/common/command.c b/common/command.c +index 95af73f17..91831f12d 100644 +--- a/common/command.c ++++ b/common/command.c +@@ -579,7 +579,7 @@ static int cmd_call(struct cmd_tbl *cmdtp, int flag, int argc, + + result = cmdtp->cmd_rep(cmdtp, flag, argc, argv, repeatable); + if (result) +- debug("Command failed, result=%d\n", result); ++printf("Command failed, result=%d\n", result); + return result; + } + +diff --git a/common/common_fit.c b/common/common_fit.c +index cde2dc45e..2f6638e8e 100644 +--- a/common/common_fit.c ++++ b/common/common_fit.c +@@ -42,7 +42,7 @@ int fit_find_config_node(const void *fdt) + + conf = fdt_path_offset(fdt, FIT_CONFS_PATH); + if (conf < 0) { +- debug("%s: Cannot find /configurations node: %d\n", __func__, ++printf("%s: Cannot find /configurations node: %d\n", __func__, + conf); + return -EINVAL; + } +@@ -72,13 +72,13 @@ int fit_find_config_node(const void *fdt) + if (board_fit_config_name_match(name)) + continue; + +- debug("Selecting config '%s'\n", name); ++printf("Selecting config '%s'\n", name); + + return node; + } + + if (dflt_conf_node != -ENOENT) { +- debug("Selecting default config '%s'\n", dflt_conf_desc); ++printf("Selecting default config '%s'\n", dflt_conf_desc); + return dflt_conf_node; + } + +diff --git a/common/cros_ec.c b/common/cros_ec.c +index 249d1f194..1a113583a 100644 +--- a/common/cros_ec.c ++++ b/common/cros_ec.c +@@ -21,7 +21,7 @@ struct udevice *board_get_cros_ec_dev(void) + + ret = uclass_get_device(UCLASS_CROS_EC, 0, &dev); + if (ret) { +- debug("%s: Error %d\n", __func__, ret); ++printf("%s: Error %d\n", __func__, ret); + return NULL; + } + return dev; +diff --git a/common/dfu.c b/common/dfu.c +index 16bd1ba58..12b9543cd 100644 +--- a/common/dfu.c ++++ b/common/dfu.c +@@ -92,7 +92,7 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget) + unsigned long current_time = get_timer(start_time); + + if (current_time > wait_time) { +- debug("Inactivity timeout, abort DFU\n"); ++printf("Inactivity timeout, abort DFU\n"); + goto exit; + } + } +diff --git a/common/dlmalloc.c b/common/dlmalloc.c +index 11729e8c8..f7dc2ec7c 100644 +--- a/common/dlmalloc.c ++++ b/common/dlmalloc.c +@@ -625,7 +625,7 @@ void mem_malloc_init(ulong start, ulong size) + malloc_init(); + #endif + +- debug("using memory %#lx-%#lx for malloc()\n", mem_malloc_start, ++printf("using memory %#lx-%#lx for malloc()\n", mem_malloc_start, + mem_malloc_end); + #ifdef CONFIG_SYS_MALLOC_CLEAR_ON_INIT + memset((void *)mem_malloc_start, 0x0, size); +@@ -734,7 +734,7 @@ static void malloc_init(void) + { + int i, j; + +- debug("bins (av_ array) are at %p\n", (void *)av_); ++printf("bins (av_ array) are at %p\n", (void *)av_); + + av_[0] = NULL; av_[1] = NULL; + for (i = 2, j = 2; i < NAV * 2 + 2; i += 2, j++) { +@@ -745,7 +745,7 @@ static void malloc_init(void) + * we can see there are alright. + */ + if (i < 10) +- debug("av_[%d]=%lx av_[%d]=%lx\n", ++printf("av_[%d]=%lx av_[%d]=%lx\n", + i, (ulong)av_[i], + i + 1, (ulong)av_[i + 1]); + } +diff --git a/common/edid.c b/common/edid.c +index fa85bcd6a..f92163a2e 100644 +--- a/common/edid.c ++++ b/common/edid.c +@@ -125,7 +125,7 @@ static void decode_timing(u8 *buf, struct display_timing *timing) + if (EDID_DETAILED_TIMING_FLAG_INTERLACED(*t)) + timing->flags = DISPLAY_FLAGS_INTERLACED; + +- debug("Detailed mode clock %u Hz, %d mm x %d mm\n" ++printf("Detailed mode clock %u Hz, %d mm x %d mm\n" + " %04x %04x %04x %04x hborder %x\n" + " %04x %04x %04x %04x vborder %x\n", + timing->pixelclock.typ, +@@ -203,17 +203,17 @@ int edid_get_timing_validate(u8 *buf, int buf_size, + bool found; + + if (buf_size < sizeof(*edid) || edid_check_info(edid)) { +- debug("%s: Invalid buffer\n", __func__); ++printf("%s: Invalid buffer\n", __func__); + return -EINVAL; + } + + if (!EDID1_INFO_VIDEO_INPUT_DIGITAL(*edid)) { +- debug("%s: Not a digital display\n", __func__); ++printf("%s: Not a digital display\n", __func__); + return -ENOSYS; + } + + if (!EDID1_INFO_FEATURE_PREFERRED_TIMING_MODE(*edid)) { +- debug("%s: No preferred timing\n", __func__); ++printf("%s: No preferred timing\n", __func__); + return -ENOENT; + } + +@@ -242,7 +242,7 @@ int edid_get_timing_validate(u8 *buf, int buf_size, + return -EINVAL; + + if (edid->version != 1 || edid->revision < 4) { +- debug("%s: EDID version %d.%d does not have required info\n", ++printf("%s: EDID version %d.%d does not have required info\n", + __func__, edid->version, edid->revision); + *panel_bits_per_colourp = -1; + } else { +diff --git a/common/fdt_support.c b/common/fdt_support.c +index a9a32df1e..bcfa190c7 100644 +--- a/common/fdt_support.c ++++ b/common/fdt_support.c +@@ -313,10 +313,10 @@ void do_fixup_by_path(void *fdt, const char *path, const char *prop, + { + #if defined(DEBUG) + int i; +- debug("Updating property '%s/%s' = ", path, prop); ++printf("Updating property '%s/%s' = ", path, prop); + for (i = 0; i < len; i++) +- debug(" %.2x", *(u8*)(val+i)); +- debug("\n"); ++printf(" %.2x", *(u8*)(val+i)); ++printf("\n"); + #endif + int rc = fdt_find_and_setprop(fdt, path, prop, val, len, create); + if (rc) +@@ -339,10 +339,10 @@ void do_fixup_by_prop(void *fdt, + int off; + #if defined(DEBUG) + int i; +- debug("Updating property '%s' = ", prop); ++printf("Updating property '%s' = ", prop); + for (i = 0; i < len; i++) +- debug(" %.2x", *(u8*)(val+i)); +- debug("\n"); ++printf(" %.2x", *(u8*)(val+i)); ++printf("\n"); + #endif + off = fdt_node_offset_by_prop_value(fdt, -1, pname, pval, plen); + while (off != -FDT_ERR_NOTFOUND) { +@@ -366,10 +366,10 @@ void do_fixup_by_compat(void *fdt, const char *compat, + int off = -1; + #if defined(DEBUG) + int i; +- debug("Updating property '%s' = ", prop); ++printf("Updating property '%s' = ", prop); + for (i = 0; i < len; i++) +- debug(" %.2x", *(u8*)(val+i)); +- debug("\n"); ++printf(" %.2x", *(u8*)(val+i)); ++printf("\n"); + #endif + off = fdt_node_offset_by_compatible(fdt, -1, compat); + while (off != -FDT_ERR_NOTFOUND) { +@@ -770,7 +770,7 @@ static int fdt_del_subnodes(const void *blob, int parent_offset) + (off >= 0) && (ndepth > 0); + off = fdt_next_node(blob, off, &ndepth)) { + if (ndepth == 1) { +- debug("delete %s: offset: %x\n", ++printf("delete %s: offset: %x\n", + fdt_get_name(blob, off, 0), off); + ret = fdt_del_node((void *)blob, off); + if (ret < 0) { +@@ -849,7 +849,7 @@ static int fdt_node_set_part_info(void *blob, int parent_offset, + + part = list_entry(pentry, struct part_info, link); + +- debug("%2d: %-20s0x%08llx\t0x%08llx\t%d\n", ++printf("%2d: %-20s0x%08llx\t0x%08llx\t%d\n", + part_num, part->name, part->size, + part->offset, part->mask_flags); + +@@ -963,7 +963,7 @@ void fdt_fixup_mtdparts(void *blob, const struct node_info *node_info, + if (prop && !strcmp(prop, "disabled")) + continue; + +- debug("%s: %s, mtd dev type %d\n", ++printf("%s: %s, mtd dev type %d\n", + fdt_get_name(blob, noff, 0), + node_info[i].compat, node_info[i].type); + +@@ -1083,7 +1083,7 @@ static u64 of_bus_default_map(fdt32_t *addr, const fdt32_t *range, + s = fdt_read_number(range + na + pna, ns); + da = fdt_read_number(addr, na); + +- debug("OF: default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); ++printf("OF: default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); + + if (da < cp || da >= (cp + s)) + return OF_BAD_ADDR; +@@ -1138,7 +1138,7 @@ static u64 of_bus_isa_map(fdt32_t *addr, const fdt32_t *range, + s = fdt_read_number(range + na + pna, ns); + da = fdt_read_number(addr + 1, na - 1); + +- debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); ++printf("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); + + if (da < cp || da >= (cp + s)) + return OF_BAD_ADDR; +@@ -1222,11 +1222,11 @@ static int of_translate_one(const void *blob, int parent, struct of_bus *bus, + if (ranges == NULL || rlen == 0) { + offset = fdt_read_number(addr, na); + memset(addr, 0, pna * 4); +- debug("OF: no ranges, 1:1 translation\n"); ++printf("OF: no ranges, 1:1 translation\n"); + goto finish; + } + +- debug("OF: walking ranges...\n"); ++printf("OF: walking ranges...\n"); + + /* Now walk through the ranges */ + rlen /= 4; +@@ -1237,14 +1237,14 @@ static int of_translate_one(const void *blob, int parent, struct of_bus *bus, + break; + } + if (offset == OF_BAD_ADDR) { +- debug("OF: not found !\n"); ++printf("OF: not found !\n"); + return 1; + } + memcpy(addr, ranges + na, 4 * pna); + + finish: + of_dump_addr("OF: parent translation for:", addr, pna); +- debug("OF: with offset: %llu\n", offset); ++printf("OF: with offset: %llu\n", offset); + + /* Translate it into parent bus space */ + return pbus->translate(addr, offset, pna); +@@ -1269,7 +1269,7 @@ static u64 __of_translate_address(const void *blob, int node_offset, + int na, ns, pna, pns; + u64 result = OF_BAD_ADDR; + +- debug("OF: ** translation for device %s **\n", ++printf("OF: ** translation for device %s **\n", + fdt_get_name(blob, node_offset, NULL)); + + /* Get parent & match bus type */ +@@ -1287,7 +1287,7 @@ static u64 __of_translate_address(const void *blob, int node_offset, + } + memcpy(addr, in_addr, na * 4); + +- debug("OF: bus is %s (na=%d, ns=%d) on %s\n", ++printf("OF: bus is %s (na=%d, ns=%d) on %s\n", + bus->name, na, ns, fdt_get_name(blob, parent, NULL)); + of_dump_addr("OF: translating address:", addr, na); + +@@ -1299,7 +1299,7 @@ static u64 __of_translate_address(const void *blob, int node_offset, + + /* If root, we have finished */ + if (parent < 0) { +- debug("OF: reached root node\n"); ++printf("OF: reached root node\n"); + result = fdt_read_number(addr, na); + break; + } +@@ -1313,7 +1313,7 @@ static u64 __of_translate_address(const void *blob, int node_offset, + break; + } + +- debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", ++printf("OF: parent bus is %s (na=%d, ns=%d) on %s\n", + pbus->name, pna, pns, fdt_get_name(blob, parent, NULL)); + + /* Apply bus translation */ +@@ -1377,7 +1377,7 @@ int fdt_get_dma_range(const void *blob, int node, phys_addr_t *cpu, + } + + if (!ranges || parent < 0) { +- debug("no dma-ranges found for node %s\n", ++printf("no dma-ranges found for node %s\n", + fdt_get_name(blob, node, NULL)); + ret = -ENOENT; + goto out; +@@ -1594,7 +1594,7 @@ int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf) + + noff = fdt_node_offset_by_compatible(blob, -1, compat); + if (noff != -FDT_ERR_NOTFOUND) { +- debug("%s: %s\n", fdt_get_name(blob, noff, 0), compat); ++printf("%s: %s\n", fdt_get_name(blob, noff, 0), compat); + add_edid: + ret = fdt_setprop(blob, noff, "edid", edid_buf, 128); + if (ret == -FDT_ERR_NOSPACE) { +@@ -1866,7 +1866,7 @@ int fdt_fixup_display(void *blob, const char *path, const char *display) + off >= 0; + off = fdt_next_subnode(blob, off)) { + uint32_t h = fdt_get_phandle(blob, off); +- debug("%s:0x%x\n", fdt_get_name(blob, off, NULL), ++printf("%s:0x%x\n", fdt_get_name(blob, off, NULL), + fdt32_to_cpu(h)); + if (strcasecmp(fdt_get_name(blob, off, NULL), display) == 0) + return fdt_setprop_u32(blob, toff, "native-mode", h); +diff --git a/common/flash.c b/common/flash.c +index bb82385c1..c4e07613a 100644 +--- a/common/flash.c ++++ b/common/flash.c +@@ -40,7 +40,7 @@ flash_protect(int flag, ulong from, ulong to, flash_info_t *info) + s_end = info->sector_count - 1; /* index of last sector */ + b_end = info->start[0] + info->size - 1; /* bank end address */ + +- debug("%s %s: from 0x%08lX to 0x%08lX\n", __func__, ++printf("%s %s: from 0x%08lX to 0x%08lX\n", __func__, + (flag & FLAG_PROTECT_SET) ? "ON" : + (flag & FLAG_PROTECT_CLEAR) ? "OFF" : "???", + from, to); +@@ -68,7 +68,7 @@ flash_protect(int flag, ulong from, ulong to, flash_info_t *info) + #else + info->protect[i] = 0; + #endif /* CONFIG_SYS_FLASH_PROTECTION */ +- debug("protect off %d\n", i); ++printf("protect off %d\n", i); + } + else if (flag & FLAG_PROTECT_SET) { + #if defined(CONFIG_SYS_FLASH_PROTECTION) +@@ -76,7 +76,7 @@ flash_protect(int flag, ulong from, ulong to, flash_info_t *info) + #else + info->protect[i] = 1; + #endif /* CONFIG_SYS_FLASH_PROTECTION */ +- debug("protect on %d\n", i); ++printf("protect on %d\n", i); + } + } + } +diff --git a/common/hash.c b/common/hash.c +index 90cf46bcb..d4d3729e4 100644 +--- a/common/hash.c ++++ b/common/hash.c +@@ -358,7 +358,7 @@ int hash_lookup_algo(const char *algo_name, struct hash_algo **algop) + } + } + +- debug("Unknown hash algorithm '%s'\n", algo_name); ++printf("Unknown hash algorithm '%s'\n", algo_name); + return -EPROTONOSUPPORT; + } + +@@ -378,7 +378,7 @@ int hash_progressive_lookup_algo(const char *algo_name, + } + } + +- debug("Unknown hash algorithm '%s'\n", algo_name); ++printf("Unknown hash algorithm '%s'\n", algo_name); + return -EPROTONOSUPPORT; + } + +@@ -414,7 +414,7 @@ int hash_block(const char *algo_name, const void *data, unsigned int len, + return ret; + + if (output_size && *output_size < algo->digest_size) { +- debug("Output buffer size %d too small (need %d bytes)", ++printf("Output buffer size %d too small (need %d bytes)", + *output_size, algo->digest_size); + return -ENOSPC; + } +diff --git a/common/image-fdt.c b/common/image-fdt.c +index d50e1ba3f..57fa594b5 100644 +--- a/common/image-fdt.c ++++ b/common/image-fdt.c +@@ -81,7 +81,7 @@ static void boot_fdt_reserve_region(struct lmb *lmb, uint64_t addr, + + ret = lmb_reserve(lmb, addr, size); + if (ret >= 0) { +- debug(" reserving fdt memory region: addr=%llx size=%llx\n", ++printf(" reserving fdt memory region: addr=%llx size=%llx\n", + (unsigned long long)addr, (unsigned long long)size); + } else { + puts("ERROR: reserving fdt memory region failed "); +@@ -219,7 +219,7 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size) + printf(" Using Device Tree in place at %p, end %p\n", + of_start, of_start + of_len - 1); + } else { +- debug("## device tree at %p ... %p (len=%ld [0x%lX])\n", ++printf("## device tree at %p ... %p (len=%ld [0x%lX])\n", + fdt_blob, fdt_blob + *of_size - 1, of_len, of_len); + + printf(" Loading Device Tree to %p, end %p ... ", +@@ -313,17 +313,17 @@ int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch, + + if (fit_parse_conf(select, default_addr, + &fdt_addr, &fit_uname_config)) { +- debug("* fdt: config '%s' from image at 0x%08lx\n", ++printf("* fdt: config '%s' from image at 0x%08lx\n", + fit_uname_config, fdt_addr); + } else if (fit_parse_subimage(select, default_addr, + &fdt_addr, &fit_uname_fdt)) { +- debug("* fdt: subimage '%s' from image at 0x%08lx\n", ++printf("* fdt: subimage '%s' from image at 0x%08lx\n", + fit_uname_fdt, fdt_addr); + } else + #endif + { + fdt_addr = simple_strtoul(select, NULL, 16); +- debug("* fdt: cmdline image address = 0x%08lx\n", ++printf("* fdt: cmdline image address = 0x%08lx\n", + fdt_addr); + } + #if CONFIG_IS_ENABLED(FIT) +@@ -341,7 +341,7 @@ int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch, + return 1; + } + #endif +- debug("## Checking for 'FDT'/'FDT Image' at %08lx\n", ++printf("## Checking for 'FDT'/'FDT Image' at %08lx\n", + fdt_addr); + + /* +@@ -382,7 +382,7 @@ int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch, + goto error; + } + +- debug(" Loading FDT from 0x%08lx to 0x%08lx\n", ++printf(" Loading FDT from 0x%08lx to 0x%08lx\n", + image_data, load); + + memmove((void *)load, +@@ -423,7 +423,7 @@ int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch, + /* + * FDT blob + */ +- debug("* fdt: raw FDT blob\n"); ++printf("* fdt: raw FDT blob\n"); + printf("## Flattened Device Tree blob at %08lx\n", + (long)fdt_addr); + } +@@ -463,7 +463,7 @@ int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch, + goto error; + } + } else { +- debug("## No Flattened Device Tree\n"); ++printf("## No Flattened Device Tree\n"); + goto no_fdt; + } + #ifdef CONFIG_ANDROID_BOOT_IMAGE +@@ -480,14 +480,14 @@ int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch, + if (fdt_check_header(fdt_blob)) + goto no_fdt; + +- debug("## Using FDT in Android image dtb area with idx %u\n", dtb_idx); ++printf("## Using FDT in Android image dtb area with idx %u\n", dtb_idx); + } else if (!android_image_get_second(hdr, &fdt_data, &fdt_len) && + !fdt_check_header((char *)fdt_data)) { + fdt_blob = (char *)fdt_data; + if (fdt_totalsize(fdt_blob) != fdt_len) + goto error; + +- debug("## Using FDT in Android image second area\n"); ++printf("## Using FDT in Android image second area\n"); + } else { + fdt_addr = env_get_hex("fdtaddr", 0); + if (!fdt_addr) +@@ -497,23 +497,23 @@ int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch, + if (fdt_check_header(fdt_blob)) + goto no_fdt; + +- debug("## Using FDT at ${fdtaddr}=Ox%lx\n", fdt_addr); ++printf("## Using FDT at ${fdtaddr}=Ox%lx\n", fdt_addr); + } + #endif + } else { +- debug("## No Flattened Device Tree\n"); ++printf("## No Flattened Device Tree\n"); + goto no_fdt; + } + + *of_flat_tree = fdt_blob; + *of_size = fdt_totalsize(fdt_blob); +- debug(" of_flat_tree at 0x%08lx size 0x%08lx\n", ++printf(" of_flat_tree at 0x%08lx size 0x%08lx\n", + (ulong)*of_flat_tree, *of_size); + + return 0; + + no_fdt: +- debug("Continuing to boot without FDT\n"); ++printf("Continuing to boot without FDT\n"); + return 0; + error: + return 1; +diff --git a/common/image-fit-sig.c b/common/image-fit-sig.c +index 55ddf1879..dfe5be589 100644 +--- a/common/image-fit-sig.c ++++ b/common/image-fit-sig.c +@@ -42,8 +42,8 @@ struct image_region *fit_region_make_list(const void *fit, + { + int i; + +- debug("Hash regions:\n"); +- debug("%10s %10s\n", "Offset", "Size"); ++printf("Hash regions:\n"); ++printf("%10s %10s\n", "Offset", "Size"); + + /* + * Use malloc() except in SPL (to save code size). In SPL the caller +@@ -56,7 +56,7 @@ struct image_region *fit_region_make_list(const void *fit, + if (!region) + return NULL; + for (i = 0; i < count; i++) { +- debug("%10x %10x\n", fdt_regions[i].offset, ++printf("%10x %10x\n", fdt_regions[i].offset, + fdt_regions[i].size); + region[i].data = fit + fdt_regions[i].offset; + region[i].size = fdt_regions[i].size; +@@ -197,7 +197,7 @@ int fit_image_verify_required_sigs(const void *fit, int image_noffset, + *no_sigsp = 1; + sig_node = fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME); + if (sig_node < 0) { +- debug("%s: No signature node found: %s\n", __func__, ++printf("%s: No signature node found: %s\n", __func__, + fdt_strerror(sig_node)); + return 0; + } +@@ -259,7 +259,7 @@ static int fit_config_check_sig(const void *fit, int noffset, + int count; + + config_name = fit_get_name(fit, conf_noffset, NULL); +- debug("%s: fdt=%p, conf='%s', sig='%s'\n", __func__, gd_fdt_blob(), ++printf("%s: fdt=%p, conf='%s', sig='%s'\n", __func__, gd_fdt_blob(), + fit_get_name(fit, noffset, NULL), + fit_get_name(gd_fdt_blob(), required_keynode, NULL)); + *err_msgp = NULL; +@@ -298,15 +298,15 @@ static int fit_config_check_sig(const void *fit, int noffset, + /* Create a list of node names from those strings */ + char *node_inc[count]; + +- debug("Hash nodes (%d):\n", count); ++printf("Hash nodes (%d):\n", count); + found_config = false; + for (name = prop, i = 0; name < end; name += strlen(name) + 1, i++) { +- debug(" '%s'\n", name); ++printf(" '%s'\n", name); + node_inc[i] = (char *)name; + if (!strncmp(FIT_CONFS_PATH, name, strlen(FIT_CONFS_PATH)) && + name[sizeof(FIT_CONFS_PATH) - 1] == '/' && + !strcmp(name + sizeof(FIT_CONFS_PATH), config_name)) { +- debug(" (found config node %s)", config_name); ++printf(" (found config node %s)", config_name); + found_config = true; + } + } +@@ -429,7 +429,7 @@ static int fit_config_verify_required_sigs(const void *fit, int conf_noffset, + /* Work out what we need to verify */ + sig_node = fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME); + if (sig_node < 0) { +- debug("%s: No signature node found: %s\n", __func__, ++printf("%s: No signature node found: %s\n", __func__, + fdt_strerror(sig_node)); + return 0; + } +@@ -439,7 +439,7 @@ static int fit_config_verify_required_sigs(const void *fit, int conf_noffset, + if (reqd_mode && !strcmp(reqd_mode, "any")) + reqd_policy_all = false; + +- debug("%s: required-mode policy set to '%s'\n", __func__, ++printf("%s: required-mode policy set to '%s'\n", __func__, + reqd_policy_all ? "all" : "any"); + + fdt_for_each_subnode(noffset, sig_blob, sig_node) { +diff --git a/common/image-fit.c b/common/image-fit.c +index e614643fe..dd1bf1c3d 100644 +--- a/common/image-fit.c ++++ b/common/image-fit.c +@@ -133,7 +133,7 @@ void *image_get_host_blob(void) + static void fit_get_debug(const void *fit, int noffset, + char *prop_name, int err) + { +- debug("Can't get '%s' property from FIT 0x%08lx, node: offset %d, name %s (%s)\n", ++printf("Can't get '%s' property from FIT 0x%08lx, node: offset %d, name %s (%s)\n", + prop_name, (ulong)fit, noffset, fit_get_name(fit, noffset, NULL), + fdt_strerror(err)); + } +@@ -192,7 +192,7 @@ static void fit_image_print_data(const void *fit, int noffset, const char *p, + bool required; + int ret, i; + +- debug("%s %s node: '%s'\n", p, type, ++printf("%s %s node: '%s'\n", p, type, + fit_get_name(fit, noffset, NULL)); + printf("%s %s algo: ", p, type); + if (fit_image_hash_get_algo(fit, noffset, &algo)) { +@@ -223,7 +223,7 @@ static void fit_image_print_data(const void *fit, int noffset, const char *p, + printf("\n"); + } + +- debug("%s %s len: %d\n", p, type, value_len); ++printf("%s %s len: %d\n", p, type, value_len); + + /* Signatures have a time stamp */ + if (IMAGE_ENABLE_TIMESTAMP && keyname) { +@@ -423,7 +423,7 @@ void fit_print_contents(const void *fit) + /* Find configurations parent node offset */ + confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH); + if (confs_noffset < 0) { +- debug("Can't get configurations parent node '%s' (%s)\n", ++printf("Can't get configurations parent node '%s' (%s)\n", + FIT_CONFS_PATH, fdt_strerror(confs_noffset)); + return; + } +@@ -627,7 +627,7 @@ int fit_get_timestamp(const void *fit, int noffset, time_t *timestamp) + return -1; + } + if (len != sizeof(uint32_t)) { +- debug("FIT timestamp with incorrect size of (%u)\n", len); ++printf("FIT timestamp with incorrect size of (%u)\n", len); + return -2; + } + +@@ -654,14 +654,14 @@ int fit_image_get_node(const void *fit, const char *image_uname) + + images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH); + if (images_noffset < 0) { +- debug("Can't find images parent node '%s' (%s)\n", ++printf("Can't find images parent node '%s' (%s)\n", + FIT_IMAGES_PATH, fdt_strerror(images_noffset)); + return images_noffset; + } + + noffset = fdt_subnode_offset(fit, images_noffset, image_uname); + if (noffset < 0) { +- debug("Can't get node offset for image unit name: '%s' (%s)\n", ++printf("Can't get node offset for image unit name: '%s' (%s)\n", + image_uname, fdt_strerror(noffset)); + } + +@@ -1031,7 +1031,7 @@ int fit_image_get_data_and_size(const void *fit, int noffset, + } + + if (external_data) { +- debug("External Data\n"); ++printf("External Data\n"); + ret = fit_image_get_data_size(fit, noffset, &len); + if (!ret) { + *data = fit + offset; +@@ -1183,7 +1183,7 @@ int fit_set_timestamp(void *fit, int noffset, time_t timestamp) + ret = fdt_setprop(fit, noffset, FIT_TIMESTAMP_PROP, &t, + sizeof(uint32_t)); + if (ret) { +- debug("Can't set '%s' property for '%s' node (%s)\n", ++printf("Can't set '%s' property for '%s' node (%s)\n", + FIT_TIMESTAMP_PROP, fit_get_name(fit, noffset, NULL), + fdt_strerror(ret)); + return ret == -FDT_ERR_NOSPACE ? -ENOSPC : -1; +@@ -1238,7 +1238,7 @@ int calculate_hash(const void *data, int data_len, const char *algo, + md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5); + *value_len = 16; + } else { +- debug("Unsupported hash alogrithm\n"); ++printf("Unsupported hash alogrithm\n"); + return -1; + } + return 0; +@@ -1723,13 +1723,13 @@ int fit_conf_find_compat(const void *fit, const void *fdt) + confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH); + images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH); + if (confs_noffset < 0 || images_noffset < 0) { +- debug("Can't find configurations or images nodes.\n"); ++printf("Can't find configurations or images nodes.\n"); + return -1; + } + + fdt_compat = fdt_getprop(fdt, 0, "compatible", &fdt_compat_len); + if (!fdt_compat) { +- debug("Fdt for comparison has no \"compatible\" property.\n"); ++printf("Fdt for comparison has no \"compatible\" property.\n"); + return -1; + } + +@@ -1757,27 +1757,27 @@ int fit_conf_find_compat(const void *fit, const void *fdt) + } else { /* Otherwise extract it from the kernel FDT. */ + kfdt_name = fdt_getprop(fit, noffset, "fdt", &len); + if (!kfdt_name) { +- debug("No fdt property found.\n"); ++printf("No fdt property found.\n"); + continue; + } + kfdt_noffset = fdt_subnode_offset(fit, images_noffset, + kfdt_name); + if (kfdt_noffset < 0) { +- debug("No image node named \"%s\" found.\n", ++printf("No image node named \"%s\" found.\n", + kfdt_name); + continue; + } + + if (!fit_image_check_comp(fit, kfdt_noffset, + IH_COMP_NONE)) { +- debug("Can't extract compat from \"%s\" " ++printf("Can't extract compat from \"%s\" " + "(compressed)\n", kfdt_name); + continue; + } + + /* search in this config's kernel FDT */ + if (fit_image_get_data(fit, kfdt_noffset, &fdt, &sz)) { +- debug("Failed to get fdt \"%s\".\n", kfdt_name); ++printf("Failed to get fdt \"%s\".\n", kfdt_name); + continue; + } + +@@ -1805,7 +1805,7 @@ int fit_conf_find_compat(const void *fit, const void *fdt) + } + } + if (!best_match_offset) { +- debug("No match found.\n"); ++printf("No match found.\n"); + return -1; + } + +@@ -1821,14 +1821,14 @@ int fit_conf_get_node(const void *fit, const char *conf_uname) + + confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH); + if (confs_noffset < 0) { +- debug("Can't find configurations parent node '%s' (%s)\n", ++printf("Can't find configurations parent node '%s' (%s)\n", + FIT_CONFS_PATH, fdt_strerror(confs_noffset)); + return confs_noffset; + } + + if (conf_uname == NULL) { + /* get configuration unit name from the default property */ +- debug("No configuration specified, trying default...\n"); ++printf("No configuration specified, trying default...\n"); + if (!host_build() && IS_ENABLED(CONFIG_MULTI_DTB_FIT)) { + noffset = fit_find_config_node(fit); + if (noffset < 0) +@@ -1843,7 +1843,7 @@ int fit_conf_get_node(const void *fit, const char *conf_uname) + return len; + } + } +- debug("Found default configuration: '%s'\n", conf_uname); ++printf("Found default configuration: '%s'\n", conf_uname); + } + + s = strchr(conf_uname, '#'); +@@ -1851,7 +1851,7 @@ int fit_conf_get_node(const void *fit, const char *conf_uname) + len = s - conf_uname; + conf_uname_copy = malloc(len + 1); + if (!conf_uname_copy) { +- debug("Can't allocate uname copy: '%s'\n", ++printf("Can't allocate uname copy: '%s'\n", + conf_uname); + return -ENOMEM; + } +@@ -1862,7 +1862,7 @@ int fit_conf_get_node(const void *fit, const char *conf_uname) + + noffset = fdt_subnode_offset(fit, confs_noffset, conf_uname); + if (noffset < 0) { +- debug("Can't get node offset for configuration unit name: '%s' (%s)\n", ++printf("Can't get node offset for configuration unit name: '%s' (%s)\n", + conf_uname, fdt_strerror(noffset)); + } + +@@ -1921,20 +1921,20 @@ int fit_get_node_from_config(bootm_headers_t *images, const char *prop_name, + void *fit_hdr; + int noffset; + +- debug("* %s: using config '%s' from image at 0x%08lx\n", ++printf("* %s: using config '%s' from image at 0x%08lx\n", + prop_name, images->fit_uname_cfg, addr); + + /* Check whether configuration has this property defined */ + fit_hdr = map_sysmem(addr, 0); + cfg_noffset = fit_conf_get_node(fit_hdr, images->fit_uname_cfg); + if (cfg_noffset < 0) { +- debug("* %s: no such config\n", prop_name); ++printf("* %s: no such config\n", prop_name); + return -EINVAL; + } + + noffset = fit_conf_get_prop_node(fit_hdr, cfg_noffset, prop_name); + if (noffset < 0) { +- debug("* %s: no '%s' in config\n", prop_name, prop_name); ++printf("* %s: no '%s' in config\n", prop_name, prop_name); + return -ENOENT; + } + +@@ -2297,7 +2297,7 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr, + if (fdt_noffset < 0) + goto out; + +- debug("fit_uname=%s, fit_uname_config=%s\n", ++printf("fit_uname=%s, fit_uname_config=%s\n", + fit_uname ? fit_uname : "", + fit_uname_config ? fit_uname_config : ""); + +@@ -2354,7 +2354,7 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr, + FIT_FDT_PROP); + } + +- debug("%d: using uname=%s uconfig=%s\n", i, uname, uconfig); ++printf("%d: using uname=%s uconfig=%s\n", i, uname, uconfig); + + ov_noffset = fit_image_load(images, + addr, &uname, &uconfig, +@@ -2365,7 +2365,7 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr, + printf("load of %s failed\n", uname); + continue; + } +- debug("%s loaded at 0x%08lx len=0x%08lx\n", ++printf("%s loaded at 0x%08lx len=0x%08lx\n", + uname, ovload, ovlen); + ov = map_sysmem(ovload, ovlen); + +diff --git a/common/image.c b/common/image.c +index 51854aae5..8f44a407c 100644 +--- a/common/image.c ++++ b/common/image.c +@@ -535,7 +535,7 @@ int image_decomp(int comp, ulong load, ulong image_start, int type, + wsize = ZSTD_DStreamWorkspaceBound(image_len); + workspace = malloc(wsize); + if (!workspace) { +- debug("%s: cannot allocate workspace of size %zu\n", __func__, ++printf("%s: cannot allocate workspace of size %zu\n", __func__, + wsize); + return -1; + } +@@ -997,7 +997,7 @@ int get_table_entry_id(const table_entry_t *table, + #endif + return (t->id); + } +- debug("Invalid %s Type: %s\n", table_name, name); ++printf("Invalid %s Type: %s\n", table_name, name); + + return -1; + } +@@ -1047,21 +1047,21 @@ ulong genimg_get_kernel_addr_fit(char * const img_addr, + /* find out kernel image address */ + if (!img_addr) { + kernel_addr = image_load_addr; +- debug("* kernel: default image load address = 0x%08lx\n", ++printf("* kernel: default image load address = 0x%08lx\n", + image_load_addr); + #if CONFIG_IS_ENABLED(FIT) + } else if (fit_parse_conf(img_addr, image_load_addr, &kernel_addr, + fit_uname_config)) { +- debug("* kernel: config '%s' from image at 0x%08lx\n", ++printf("* kernel: config '%s' from image at 0x%08lx\n", + *fit_uname_config, kernel_addr); + } else if (fit_parse_subimage(img_addr, image_load_addr, &kernel_addr, + fit_uname_kernel)) { +- debug("* kernel: subimage '%s' from image at 0x%08lx\n", ++printf("* kernel: subimage '%s' from image at 0x%08lx\n", + *fit_uname_kernel, kernel_addr); + #endif + } else { + kernel_addr = simple_strtoul(img_addr, NULL, 16); +- debug("* kernel: cmdline image address = 0x%08lx\n", ++printf("* kernel: cmdline image address = 0x%08lx\n", + kernel_addr); + } + +@@ -1198,7 +1198,7 @@ int boot_get_ramdisk(int argc, char *const argv[], bootm_headers_t *images, + * ramdisk argument + */ + if (select && strcmp(select, "-") == 0) { +- debug("## Skipping init Ramdisk\n"); ++printf("## Skipping init Ramdisk\n"); + rd_len = rd_data = 0; + } else if (select || genimg_has_config(images)) { + #if IMAGE_ENABLE_FIT +@@ -1216,19 +1216,19 @@ int boot_get_ramdisk(int argc, char *const argv[], bootm_headers_t *images, + + if (fit_parse_conf(select, default_addr, + &rd_addr, &fit_uname_config)) { +- debug("* ramdisk: config '%s' from image at " ++printf("* ramdisk: config '%s' from image at " + "0x%08lx\n", + fit_uname_config, rd_addr); + } else if (fit_parse_subimage(select, default_addr, + &rd_addr, &fit_uname_ramdisk)) { +- debug("* ramdisk: subimage '%s' from image at " ++printf("* ramdisk: subimage '%s' from image at " + "0x%08lx\n", + fit_uname_ramdisk, rd_addr); + } else + #endif + { + rd_addr = simple_strtoul(select, NULL, 16); +- debug("* ramdisk: cmdline image address = " ++printf("* ramdisk: cmdline image address = " + "0x%08lx\n", + rd_addr); + } +@@ -1334,12 +1334,12 @@ int boot_get_ramdisk(int argc, char *const argv[], bootm_headers_t *images, + } + + if (!rd_data) { +- debug("## No init Ramdisk\n"); ++printf("## No init Ramdisk\n"); + } else { + *rd_start = rd_data; + *rd_end = rd_data + rd_len; + } +- debug(" ramdisk start = 0x%08lx, ramdisk end = 0x%08lx\n", ++printf(" ramdisk start = 0x%08lx, ramdisk end = 0x%08lx\n", + *rd_start, *rd_end); + + return 0; +@@ -1387,12 +1387,12 @@ int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len, + } + + +- debug("## initrd_high = 0x%08lx, copy_to_ram = %d\n", ++printf("## initrd_high = 0x%08lx, copy_to_ram = %d\n", + initrd_high, initrd_copy_to_ram); + + if (rd_data) { + if (!initrd_copy_to_ram) { /* zero-copy ramdisk support */ +- debug(" in-place initrd\n"); ++printf(" in-place initrd\n"); + *initrd_start = rd_data; + *initrd_end = rd_data + rd_len; + lmb_reserve(lmb, rd_data, rd_len); +@@ -1432,7 +1432,7 @@ int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len, + *initrd_start = 0; + *initrd_end = 0; + } +- debug(" ramdisk load start = 0x%08lx, ramdisk load end = 0x%08lx\n", ++printf(" ramdisk load start = 0x%08lx, ramdisk load end = 0x%08lx\n", + *initrd_start, *initrd_end); + + return 0; +@@ -1467,7 +1467,7 @@ int boot_get_fpga(int argc, char *const argv[], bootm_headers_t *images, + + /* Check to see if the images struct has a FIT configuration */ + if (!genimg_has_config(images)) { +- debug("## FIT configuration was not specified\n"); ++printf("## FIT configuration was not specified\n"); + return 0; + } + +@@ -1487,7 +1487,7 @@ int boot_get_fpga(int argc, char *const argv[], bootm_headers_t *images, + uname = fdt_stringlist_get(buf, conf_noffset, FIT_FPGA_PROP, 0, + NULL); + if (!uname) { +- debug("## FPGA image is not specified\n"); ++printf("## FPGA image is not specified\n"); + return 0; + } + fit_img_result = fit_image_load(images, +@@ -1500,7 +1500,7 @@ int boot_get_fpga(int argc, char *const argv[], bootm_headers_t *images, + FIT_LOAD_OPTIONAL_NON_ZERO, + &img_data, &img_len); + +- debug("FPGA image (%s) loaded to 0x%lx/size 0x%lx\n", ++printf("FPGA image (%s) loaded to 0x%lx/size 0x%lx\n", + uname, img_data, img_len); + + if (fit_img_result < 0) { +@@ -1577,7 +1577,7 @@ int boot_get_loadable(int argc, char *const argv[], bootm_headers_t *images, + + /* Check to see if the images struct has a FIT configuration */ + if (!genimg_has_config(images)) { +- debug("## FIT configuration was not specified\n"); ++printf("## FIT configuration was not specified\n"); + return 0; + } + +@@ -1674,7 +1674,7 @@ int boot_get_cmdline(struct lmb *lmb, ulong *cmd_start, ulong *cmd_end) + *cmd_start = (ulong) & cmdline[0]; + *cmd_end = *cmd_start + strlen(cmdline); + +- debug("## cmdline at 0x%08lx ... 0x%08lx\n", *cmd_start, *cmd_end); ++printf("## cmdline at 0x%08lx ... 0x%08lx\n", *cmd_start, *cmd_end); + + return 0; + } +@@ -1705,7 +1705,7 @@ int boot_get_kbd(struct lmb *lmb, struct bd_info **kbd) + + **kbd = *(gd->bd); + +- debug("## kernel board info at 0x%08lx\n", (ulong)*kbd); ++printf("## kernel board info at 0x%08lx\n", (ulong)*kbd); + + #if defined(DEBUG) && defined(CONFIG_CMD_BDI) + do_bdinfo(NULL, 0, 0, NULL); +diff --git a/common/lcd.c b/common/lcd.c +index ab5614ad0..2aa74956a 100644 +--- a/common/lcd.c ++++ b/common/lcd.c +@@ -218,13 +218,13 @@ void lcd_clear(void) + #endif + #endif + /* setup text-console */ +- debug("[LCD] setting up console...\n"); ++printf("[LCD] setting up console...\n"); + lcd_init_console(lcd_base, + panel_info.vl_col, + panel_info.vl_row, + panel_info.vl_rot); + /* Paint the logo and retrieve LCD base address */ +- debug("[LCD] Drawing the logo...\n"); ++printf("[LCD] Drawing the logo...\n"); + if (do_splash) { + if (splash_display() == 0) { + do_splash = 0; +@@ -244,7 +244,7 @@ void lcd_clear(void) + + static int lcd_init(void *lcdbase) + { +- debug("[LCD] Initializing LCD frambuffer at %p\n", lcdbase); ++printf("[LCD] Initializing LCD frambuffer at %p\n", lcdbase); + lcd_ctrl_init(lcdbase); + + /* +@@ -256,7 +256,7 @@ static int lcd_init(void *lcdbase) + if (map_to_sysmem(lcdbase) != gd->fb_base) + lcd_base = map_sysmem(gd->fb_base, 0); + +- debug("[LCD] Using LCD frambuffer at %p\n", lcd_base); ++printf("[LCD] Using LCD frambuffer at %p\n", lcd_base); + + lcd_get_size(&lcd_line_length); + lcd_is_enabled = 1; +@@ -286,7 +286,7 @@ ulong lcd_setmem(ulong addr) + ulong size; + int line_length; + +- debug("LCD panel info: %d x %d, %d bit/pix\n", panel_info.vl_col, ++printf("LCD panel info: %d x %d, %d bit/pix\n", panel_info.vl_col, + panel_info.vl_row, NBITS(panel_info.vl_bpix)); + + size = lcd_get_size(&line_length); +@@ -298,7 +298,7 @@ ulong lcd_setmem(ulong addr) + /* Allocate pages for the frame buffer. */ + addr -= size; + +- debug("Reserving %ldk for LCD Framebuffer at: %08lx\n", ++printf("Reserving %ldk for LCD Framebuffer at: %08lx\n", + size >> 10, addr); + + return addr; +@@ -342,7 +342,7 @@ void lcd_logo_plot(int x, int y) + uchar *fb = (uchar *)(lcd_base + y * lcd_line_length + x * bpix / 8); + ushort *fb16; + +- debug("Logo: width %d height %d colors %d\n", ++printf("Logo: width %d height %d colors %d\n", + BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS); + + if (bpix < 12) { +@@ -582,7 +582,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) + height = get_unaligned_le32(&bmp->header.height); + bmp_bpix = get_unaligned_le16(&bmp->header.bit_count); + hdr_size = get_unaligned_le16(&bmp->header.size); +- debug("hdr_size=%d, bmp_bpix=%d\n", hdr_size, bmp_bpix); ++printf("hdr_size=%d, bmp_bpix=%d\n", hdr_size, bmp_bpix); + + colors = 1 << bmp_bpix; + +@@ -607,7 +607,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) + return 1; + } + +- debug("Display-bmp: %d x %d with %d colors, display %d\n", ++printf("Display-bmp: %d x %d with %d colors, display %d\n", + (int)width, (int)height, (int)colors, 1 << bpix); + + if (bmp_bpix == 8) +@@ -635,7 +635,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) + cmap_base = configuration_get_cmap(); + #ifdef CONFIG_LCD_BMP_RLE8 + u32 compression = get_unaligned_le32(&bmp->header.compression); +- debug("compressed %d %d\n", compression, BMP_BI_RLE8); ++printf("compressed %d %d\n", compression, BMP_BI_RLE8); + if (compression == BMP_BI_RLE8) { + if (bpix != 16) { + /* TODO implement render code for bpix != 16 */ +diff --git a/common/lcd_console.c b/common/lcd_console.c +index 1a246c492..7958549d9 100644 +--- a/common/lcd_console.c ++++ b/common/lcd_console.c +@@ -154,7 +154,7 @@ void lcd_init_console(void *address, int vl_cols, int vl_rows, int vl_rot) + + lcd_init_console_rot(&cons); + +- debug("lcd_console: have %d/%d col/rws on scr %dx%d (%d deg rotated)\n", ++printf("lcd_console: have %d/%d col/rws on scr %dx%d (%d deg rotated)\n", + cons.cols, cons.rows, cons.lcdsizex, cons.lcdsizey, vl_rot); + } + +diff --git a/common/log.c b/common/log.c +index ea407c6db..f53b9f1d3 100644 +--- a/common/log.c ++++ b/common/log.c +@@ -411,7 +411,7 @@ int log_init(void) + + ldev = calloc(1, sizeof(*ldev)); + if (!ldev) { +- debug("%s: Cannot allocate memory\n", __func__); ++printf("%s: Cannot allocate memory\n", __func__); + return -ENOMEM; + } + INIT_LIST_HEAD(&ldev->filter_head); +diff --git a/common/log_syslog.c b/common/log_syslog.c +index 53c4def5d..cc90d10fd 100644 +--- a/common/log_syslog.c ++++ b/common/log_syslog.c +@@ -96,7 +96,7 @@ static int log_syslog_emit(struct log_device *ldev, struct log_rec *rec) + /* Consider trailing 0x00 */ + ptr++; + +- debug("log message: '%s'\n", log_msg); ++printf("log message: '%s'\n", log_msg); + + /* Broadcast message */ + bcast_ip.s_addr = 0xFFFFFFFFL; +diff --git a/common/miiphyutil.c b/common/miiphyutil.c +index 7d4d15ed9..a0d693aa2 100644 +--- a/common/miiphyutil.c ++++ b/common/miiphyutil.c +@@ -318,12 +318,12 @@ int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, + unsigned short tmp; + + if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) { +- debug("PHY ID register 2 read failed\n"); ++printf("PHY ID register 2 read failed\n"); + return -1; + } + reg = tmp; + +- debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg); ++printf("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg); + + if (reg == 0xFFFF) { + /* No physical device present at this address */ +@@ -331,11 +331,11 @@ int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, + } + + if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) { +- debug("PHY ID register 1 read failed\n"); ++printf("PHY ID register 1 read failed\n"); + return -1; + } + reg |= tmp << 16; +- debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); ++printf("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); + + *oui = (reg >> 10); + *model = (unsigned char)((reg >> 4) & 0x0000003F); +@@ -359,11 +359,11 @@ int miiphy_reset(const char *devname, unsigned char addr) + int timeout = 500; + + if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { +- debug("PHY status read failed\n"); ++printf("PHY status read failed\n"); + return -1; + } + if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { +- debug("PHY reset failed\n"); ++printf("PHY reset failed\n"); + return -1; + } + #ifdef CONFIG_PHY_RESET_DELAY +@@ -377,7 +377,7 @@ int miiphy_reset(const char *devname, unsigned char addr) + reg = 0x8000; + while (((reg & 0x8000) != 0) && timeout--) { + if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { +- debug("PHY status read failed\n"); ++printf("PHY status read failed\n"); + return -1; + } + udelay(1000); +diff --git a/common/spl/spl.c b/common/spl/spl.c +index a0a608fd7..a4e617808 100644 +--- a/common/spl/spl.c ++++ b/common/spl/spl.c +@@ -246,7 +246,7 @@ static int spl_load_fit_image(struct spl_image_info *spl_image, + spl_image->os = IH_OS_INVALID; + spl_image->name = genimg_get_os_name(spl_image->os); + +- debug(SPL_TPL_PROMPT "payload image: %32s load addr: 0x%lx size: %d\n", ++printf(SPL_TPL_PROMPT "payload image: %32s load addr: 0x%lx size: %d\n", + spl_image->name, spl_image->load_addr, spl_image->size); + + #ifdef CONFIG_SPL_FIT_SIGNATURE +@@ -262,7 +262,7 @@ static int spl_load_fit_image(struct spl_image_info *spl_image, + /* HACK: U-boot expects FDT at a specific address */ + fdt_hack = spl_image->load_addr + spl_image->size; + fdt_hack = (fdt_hack + 3) & ~3; +- debug("Relocating FDT to %p\n", spl_image->fdt_addr); ++printf("Relocating FDT to %p\n", spl_image->fdt_addr); + memcpy((void *)fdt_hack, spl_image->fdt_addr, dt_len); + } + } +@@ -298,7 +298,7 @@ __weak int spl_parse_legacy_header(struct spl_image_info *spl_image, + const struct image_header *header) + { + /* LEGACY image not supported */ +- debug("Legacy boot image support not enabled, proceeding to other boot methods\n"); ++printf("Legacy boot image support not enabled, proceeding to other boot methods\n"); + return -EINVAL; + } + +@@ -339,7 +339,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image, + spl_image->load_addr = CONFIG_SYS_LOAD_ADDR; + spl_image->entry_point = CONFIG_SYS_LOAD_ADDR; + spl_image->size = end - start; +- debug(SPL_TPL_PROMPT ++printf(SPL_TPL_PROMPT + "payload zImage, load addr: 0x%lx size: %d\n", + spl_image->load_addr, spl_image->size); + return 0; +@@ -348,12 +348,12 @@ int spl_parse_image_header(struct spl_image_info *spl_image, + + #ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT + /* Signature not found - assume u-boot.bin */ +- debug("mkimage signature not found - ih_magic = %x\n", ++printf("mkimage signature not found - ih_magic = %x\n", + header->ih_magic); + spl_set_header_raw_uboot(spl_image); + #else + /* RAW image not supported, proceed to other boot methods. */ +- debug("Raw boot image support not enabled, proceeding to other boot methods\n"); ++printf("Raw boot image support not enabled, proceeding to other boot methods\n"); + return -EINVAL; + #endif + } +@@ -368,7 +368,7 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) + image_entry_noargs_t image_entry = + (image_entry_noargs_t)spl_image->entry_point; + +- debug("image entry point: 0x%lx\n", spl_image->entry_point); ++printf("image entry point: 0x%lx\n", spl_image->entry_point); + image_entry(); + } + +@@ -406,7 +406,7 @@ static int write_spl_handoff(void) + ret = handoff_arch_save(ho); + if (ret) + return ret; +- debug(SPL_TPL_PROMPT "Wrote SPL handoff\n"); ++printf(SPL_TPL_PROMPT "Wrote SPL handoff\n"); + + return 0; + } +@@ -447,7 +447,7 @@ static int spl_common_init(bool setup_malloc) + #endif + ret = bootstage_init(u_boot_first_phase()); + if (ret) { +- debug("%s: Failed to set up bootstage: ret=%d\n", __func__, ++printf("%s: Failed to set up bootstage: ret=%d\n", __func__, + ret); + return ret; + } +@@ -458,7 +458,7 @@ static int spl_common_init(bool setup_malloc) + + ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE); + if (ret) +- debug("%s: Failed to unstash bootstage: ret=%d\n", ++printf("%s: Failed to unstash bootstage: ret=%d\n", + __func__, ret); + } + #endif /* CONFIG_BOOTSTAGE_STASH */ +@@ -467,14 +467,14 @@ static int spl_common_init(bool setup_malloc) + #if CONFIG_IS_ENABLED(LOG) + ret = log_init(); + if (ret) { +- debug("%s: Failed to set up logging\n", __func__); ++printf("%s: Failed to set up logging\n", __func__); + return ret; + } + #endif + if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { + ret = fdtdec_setup(); + if (ret) { +- debug("fdtdec_setup() returned error %d\n", ret); ++printf("fdtdec_setup() returned error %d\n", ret); + return ret; + } + } +@@ -485,7 +485,7 @@ static int spl_common_init(bool setup_malloc) + ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA)); + bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_SPL); + if (ret) { +- debug("dm_init_and_scan() returned error %d\n", ret); ++printf("dm_init_and_scan() returned error %d\n", ret); + return ret; + } + } +@@ -507,7 +507,7 @@ int spl_early_init(void) + { + int ret; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + ret = spl_common_init(true); + if (ret) +@@ -523,7 +523,7 @@ int spl_init(void) + bool setup_malloc = !(IS_ENABLED(CONFIG_SPL_STACK_R) && + IS_ENABLED(CONFIG_SPL_SYS_MALLOC_SIMPLE)); + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (!(gd->flags & GD_FLG_SPL_EARLY_INIT)) { + ret = spl_common_init(setup_malloc); +@@ -627,7 +627,7 @@ void board_init_f(ulong dummy) + + ret = spl_early_init(); + if (ret) { +- debug("spl_early_init() failed: %d\n", ret); ++printf("spl_early_init() failed: %d\n", ret); + hang(); + } + } +@@ -648,7 +648,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) + struct spl_image_info spl_image; + int ret; + +- debug(">>" SPL_TPL_PROMPT "board_init_r()\n"); ++printf(">>" SPL_TPL_PROMPT "board_init_r()\n"); + + spl_set_bd(); + +@@ -671,7 +671,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) + if (CONFIG_IS_ENABLED(BLOBLIST)) { + ret = bloblist_init(); + if (ret) { +- debug("%s: Failed to set up bloblist: ret=%d\n", ++printf("%s: Failed to set up bloblist: ret=%d\n", + __func__, ret); + puts(SPL_TPL_PROMPT "Cannot set up bloblist\n"); + hang(); +@@ -733,31 +733,31 @@ void board_init_r(gd_t *dummy1, ulong dummy2) + #endif + switch (spl_image.os) { + case IH_OS_U_BOOT: +- debug("Jumping to %s...\n", spl_phase_name(spl_next_phase())); ++printf("Jumping to %s...\n", spl_phase_name(spl_next_phase())); + break; + #if CONFIG_IS_ENABLED(ATF) + case IH_OS_ARM_TRUSTED_FIRMWARE: +- debug("Jumping to U-Boot via ARM Trusted Firmware\n"); ++printf("Jumping to U-Boot via ARM Trusted Firmware\n"); + spl_fixup_fdt(spl_image.fdt_addr); + spl_invoke_atf(&spl_image); + break; + #endif + #if CONFIG_IS_ENABLED(OPTEE) + case IH_OS_TEE: +- debug("Jumping to U-Boot via OP-TEE\n"); ++printf("Jumping to U-Boot via OP-TEE\n"); + spl_optee_entry(NULL, NULL, spl_image.fdt_addr, + (void *)spl_image.entry_point); + break; + #endif + #if CONFIG_IS_ENABLED(OPENSBI) + case IH_OS_OPENSBI: +- debug("Jumping to U-Boot via RISC-V OpenSBI\n"); ++printf("Jumping to U-Boot via RISC-V OpenSBI\n"); + spl_invoke_opensbi(&spl_image); + break; + #endif + #ifdef CONFIG_SPL_OS_BOOT + case IH_OS_LINUX: +- debug("Jumping to Linux\n"); ++printf("Jumping to Linux\n"); + #if defined(CONFIG_SYS_SPL_ARGS_ADDR) + spl_fixup_fdt((void *)CONFIG_SYS_SPL_ARGS_ADDR); + #endif +@@ -765,10 +765,10 @@ void board_init_r(gd_t *dummy1, ulong dummy2) + jump_to_image_linux(&spl_image); + #endif + default: +- debug("Unsupported OS image.. Jumping nevertheless..\n"); ++printf("Unsupported OS image.. Jumping nevertheless..\n"); + } + #if CONFIG_VAL(SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE) +- debug("SPL malloc() used 0x%lx bytes (%ld KB)\n", gd->malloc_ptr, ++printf("SPL malloc() used 0x%lx bytes (%ld KB)\n", gd->malloc_ptr, + gd->malloc_ptr / 1024); + #endif + bootstage_mark_name(get_bootstage_id(false), "end phase"); +@@ -776,7 +776,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) + ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR, + CONFIG_BOOTSTAGE_STASH_SIZE); + if (ret) +- debug("Failed to stash bootstage: err=%d\n", ret); ++printf("Failed to stash bootstage: err=%d\n", ret); + #endif + + spl_board_prepare_for_boot(); +@@ -857,7 +857,7 @@ ulong spl_relocate_stack_gd(void) + + #if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_VAL(SYS_MALLOC_F_LEN) + if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) { +- debug("SPL malloc() before relocation used 0x%lx bytes (%ld KB)\n", ++printf("SPL malloc() before relocation used 0x%lx bytes (%ld KB)\n", + gd->malloc_ptr, gd->malloc_ptr / 1024); + ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; + gd->malloc_base = ptr; +diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c +index e1b68dd56..a8a8ae7e5 100644 +--- a/common/spl/spl_atf.c ++++ b/common/spl/spl_atf.c +@@ -247,7 +247,7 @@ uintptr_t spl_fit_images_get_entry(void *blob, int node) + if (ret) + ret = fit_image_get_load(blob, node, &val); + +- debug("%s: entry point 0x%lx\n", __func__, val); ++printf("%s: entry point 0x%lx\n", __func__, val); + return val; + } + +diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c +index c2eb09736..29040e5c1 100644 +--- a/common/spl/spl_fat.c ++++ b/common/spl/spl_fat.c +@@ -86,7 +86,7 @@ int spl_load_image_fat(struct spl_image_info *spl_image, + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + +- debug("Found FIT\n"); ++printf("Found FIT\n"); + load.read = spl_fit_read; + load.bl_len = 1; + load.filename = (void *)filename; +diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c +index caddf5119..62b27ea2c 100644 +--- a/common/spl/spl_fit.c ++++ b/common/spl/spl_fit.c +@@ -91,7 +91,7 @@ static int spl_fit_get_image_name(const struct spl_fit_info *ctx, + + name = fdt_getprop(ctx->fit, ctx->conf_node, type, &len); + if (!name) { +- debug("cannot find property '%s': %d\n", type, len); ++ printf("cannot find property '%s': %d\n", type, len); + return -EINVAL; + } + +@@ -138,7 +138,7 @@ static int spl_fit_get_image_name(const struct spl_fit_info *ctx, + } + + if (!found) { +- debug("no string for index %d\n", index); ++ printf("no string for index %d\n", index); + return -E2BIG; + } + +@@ -169,7 +169,7 @@ static int spl_fit_get_image_node(const struct spl_fit_info *ctx, + if (err) + return err; + +- debug("%s: '%s'\n", type, str); ++ printf("%s: '%s'\n", type, str); + + node = fdt_subnode_offset(ctx->fit, ctx->images_node, str); + if (node < 0) { +@@ -255,12 +255,12 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, + if (fit_image_get_type(fit, node, &type)) + puts("Cannot get image type.\n"); + else +- debug("%s ", genimg_get_type_name(type)); ++ printf("%s ", genimg_get_type_name(type)); + } + + if (IS_ENABLED(CONFIG_SPL_GZIP)) { + fit_image_get_comp(fit, node, &image_comp); +- debug("%s ", genimg_get_comp_name(image_comp)); ++ printf("%s ", genimg_get_comp_name(image_comp)); + } + + if (fit_image_get_load(fit, node, &load_addr)) { +@@ -297,7 +297,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, + nr_sectors, src_ptr) != nr_sectors) + return -EIO; + +- debug("External data: dst=%p, offset=%x, size=%lx\n", ++ printf("External data: dst=%p, offset=%x, size=%lx\n", + src_ptr, offset, (unsigned long)length); + src = src_ptr + overhead; + } else { +@@ -306,7 +306,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, + puts("Cannot get image data/size\n"); + return -ENOENT; + } +- debug("Embedded data: dst=%lx, size=%lx\n", load_addr, ++ printf("Embedded data: dst=%lx, size=%lx\n", load_addr, + (unsigned long)length); + src = (void *)data; /* cast away const */ + } +@@ -377,7 +377,7 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image, + /* Figure out which device tree the board wants to use */ + node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index++); + if (node < 0) { +- debug("%s: cannot find FDT node\n", __func__); ++ printf("%s: cannot find FDT node\n", __func__); + + /* + * U-Boot did not find a device tree inside the FIT image. Use +@@ -406,10 +406,10 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image, + for (; ; index++) { + node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index); + if (node == -E2BIG) { +- debug("%s: No additional FDT node\n", __func__); ++ printf("%s: No additional FDT node\n", __func__); + break; + } else if (node < 0) { +- debug("%s: unable to find FDT node %d\n", ++ printf("%s: unable to find FDT node %d\n", + __func__, index); + continue; + } +@@ -423,7 +423,7 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image, + */ + tmpbuffer = malloc(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ); + if (!tmpbuffer) +- debug("%s: unable to allocate space for overlays\n", ++ printf("%s: unable to allocate space for overlays\n", + __func__); + } + image_info.load_addr = (ulong)tmpbuffer; +@@ -446,7 +446,7 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image, + break; + } + +- debug("%s: DT overlay %s applied\n", __func__, ++ printf("%s: DT overlay %s applied\n", __func__, + fit_get_name(ctx->fit, node, NULL)); + } + free(tmpbuffer); +@@ -559,7 +559,7 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node, + const char *compatible; + int ret; + +- debug("FPGA bitstream at: %x, size: %x\n", ++ printf("FPGA bitstream at: %x, size: %x\n", + (u32)fpga_image->load_addr, fpga_image->size); + + compatible = fdt_getprop(ctx->fit, node, "compatible", NULL); +@@ -634,7 +634,7 @@ static int spl_simple_fit_read(struct spl_fit_info *ctx, + + count = info->read(info, sector, sectors, buf); + ctx->fit = buf; +- debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n", ++ printf("fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n", + sector, sectors, buf, count, size); + + return (count == 0) ? -EIO : 0; +@@ -658,7 +658,7 @@ static int spl_simple_fit_parse(struct spl_fit_info *ctx) + /* find the node holding the images information */ + ctx->images_node = fdt_path_offset(ctx->fit, FIT_IMAGES_PATH); + if (ctx->images_node < 0) { +- debug("%s: Cannot find /images node: %d\n", __func__, ++ printf("%s: Cannot find /images node: %d\n", __func__, + ctx->images_node); + return -EINVAL; + } +@@ -704,7 +704,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, + node = spl_fit_get_image_node(&ctx, FIT_KERNEL_PROP, 0); + + if (node < 0) { +- debug("could not find firmware image, trying loadables...\n"); ++ printf("could not find firmware image, trying loadables...\n"); + node = spl_fit_get_image_node(&ctx, "loadables", 0); + /* + * If we pick the U-Boot image from "loadables", start at +@@ -713,7 +713,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, + index = 1; + } + if (node < 0) { +- debug("%s: Cannot find u-boot image node: %d\n", ++ printf("%s: Cannot find u-boot image node: %d\n", + __func__, node); + return -1; + } +@@ -728,7 +728,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, + * as a U-Boot image, if no OS-type has been declared. + */ + if (!spl_fit_image_get_os(ctx.fit, node, &spl_image->os)) +- debug("Image OS is %s\n", genimg_get_os_name(spl_image->os)); ++ printf("Image OS is %s\n", genimg_get_os_name(spl_image->os)); + else if (!IS_ENABLED(CONFIG_SPL_OS_BOOT)) + spl_image->os = IH_OS_U_BOOT; + +@@ -771,7 +771,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, + spl_fit_upload_fpga(&ctx, node, &image_info); + + if (!spl_fit_image_get_os(ctx.fit, node, &os_type)) +- debug("Loadable is %s\n", genimg_get_os_name(os_type)); ++ printf("Loadable is %s\n", genimg_get_os_name(os_type)); + + if (os_takes_devicetree(os_type)) { + spl_fit_append_fdt(&image_info, info, sector, &ctx); +diff --git a/common/spl/spl_legacy.c b/common/spl/spl_legacy.c +index 82d032680..4636373a8 100644 +--- a/common/spl/spl_legacy.c ++++ b/common/spl/spl_legacy.c +@@ -54,7 +54,7 @@ int spl_parse_legacy_header(struct spl_image_info *spl_image, + + spl_image->os = image_get_os(header); + spl_image->name = image_get_name(header); +- debug(SPL_TPL_PROMPT ++printf(SPL_TPL_PROMPT + "payload image: %32s load addr: 0x%lx size: %d\n", + spl_image->name, spl_image->load_addr, spl_image->size); + +@@ -103,7 +103,7 @@ int spl_load_legacy_img(struct spl_image_info *spl_image, + case IH_COMP_LZMA: + lzma_len = LZMA_LEN; + +- debug("LZMA: Decompressing %08lx to %08lx\n", ++printf("LZMA: Decompressing %08lx to %08lx\n", + dataptr, spl_image->load_addr); + src = malloc(spl_image->size); + if (!src) { +@@ -124,7 +124,7 @@ int spl_load_legacy_img(struct spl_image_info *spl_image, + break; + + default: +- debug("Compression method %s is not supported\n", ++printf("Compression method %s is not supported\n", + genimg_get_comp_short_name(image_get_comp(&hdr))); + return -EINVAL; + } +diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c +index add2785b4..7d38f6b76 100644 +--- a/common/spl/spl_mmc.c ++++ b/common/spl/spl_mmc.c +@@ -35,7 +35,7 @@ static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc, + /* Read the header too to avoid extra memcpy */ + count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors, + (void *)(ulong)spl_image->load_addr); +- debug("read %x sectors to %lx\n", image_size_sectors, ++ printf("read %x sectors to %lx\n", image_size_sectors, + spl_image->load_addr); + if (count != image_size_sectors) + return -EIO; +@@ -74,7 +74,7 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image, + + /* read image header to find the image size & load address */ + count = blk_dread(bd, sector, 1, header); +- debug("hdr read sector %lx, count=%lu\n", sector, count); ++ printf("hdr read sector %lx, count=%lu\n", sector, count); + if (count == 0) { + ret = -EIO; + goto end; +@@ -84,7 +84,7 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image, + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + +- debug("Found FIT\n"); ++ printf("Found FIT\n"); + load.dev = mmc; + load.priv = NULL; + load.filename = NULL; +@@ -334,7 +334,7 @@ int spl_mmc_load(struct spl_image_info *spl_image, + u32 boot_mode; + int err = 0; + __maybe_unused int part = 0; +- ++ printf("load MMC image \n"); + /* Perform peripheral init only once */ + if (!mmc) { + err = spl_mmc_find_device(&mmc, bootdev->boot_device); +@@ -382,7 +382,7 @@ int spl_mmc_load(struct spl_image_info *spl_image, + } + /* Fall through */ + case MMCSD_MODE_RAW: +- debug("spl: mmc boot mode: raw\n"); ++ printf("spl: mmc boot mode: raw\n"); + + if (!spl_start_uboot()) { + err = mmc_load_image_raw_os(spl_image, mmc); +@@ -406,7 +406,7 @@ int spl_mmc_load(struct spl_image_info *spl_image, + #endif + /* If RAW mode fails, try FS mode. */ + case MMCSD_MODE_FS: +- debug("spl: mmc boot mode: fs\n"); ++ printf("spl: mmc boot mode: fs\n"); + + err = spl_mmc_do_fs_boot(spl_image, mmc, filename); + if (!err) +diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c +index 59f4a84a3..fc92cfc43 100644 +--- a/common/spl/spl_nand.c ++++ b/common/spl/spl_nand.c +@@ -79,7 +79,7 @@ static int spl_nand_load_element(struct spl_image_info *spl_image, + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + +- debug("Found FIT\n"); ++printf("Found FIT\n"); + load.dev = NULL; + load.priv = &offset; + load.filename = NULL; +@@ -113,9 +113,9 @@ static int spl_nand_load_image(struct spl_image_info *spl_image, + int *dst __attribute__((unused)); + + #ifdef CONFIG_SPL_NAND_SOFTECC +- debug("spl: nand - using sw ecc\n"); ++printf("spl: nand - using sw ecc\n"); + #else +- debug("spl: nand - using hw ecc\n"); ++printf("spl: nand - using hw ecc\n"); + #endif + nand_init(); + +diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c +index e140a6306..19e174362 100644 +--- a/common/spl/spl_net.c ++++ b/common/spl/spl_net.c +@@ -19,7 +19,7 @@ + static ulong spl_net_load_read(struct spl_load_info *load, ulong sector, + ulong count, void *buf) + { +- debug("%s: sector %lx, count %lx, buf %lx\n", ++printf("%s: sector %lx, count %lx, buf %lx\n", + __func__, sector, count, (ulong)buf); + memcpy(buf, (void *)(image_load_addr + sector), count); + return count; +@@ -51,12 +51,12 @@ static int spl_net_load_image(struct spl_image_info *spl_image, + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + +- debug("Found FIT\n"); ++printf("Found FIT\n"); + load.bl_len = 1; + load.read = spl_net_load_read; + rv = spl_load_simple_fit(spl_image, &load, 0, header); + } else { +- debug("Legacy image\n"); ++printf("Legacy image\n"); + + rv = spl_parse_image_header(spl_image, header); + if (rv) +diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c +index 5270401db..d4b4bcc52 100644 +--- a/common/spl/spl_nor.c ++++ b/common/spl/spl_nor.c +@@ -11,7 +11,7 @@ + static ulong spl_nor_load_read(struct spl_load_info *load, ulong sector, + ulong count, void *buf) + { +- debug("%s: sector %lx, count %lx, buf %p\n", ++printf("%s: sector %lx, count %lx, buf %p\n", + __func__, sector, count, buf); + memcpy(buf, (void *)sector, count); + +@@ -46,7 +46,7 @@ static int spl_nor_load_image(struct spl_image_info *spl_image, + if (image_get_magic(header) == FDT_MAGIC) { + int ret; + +- debug("Found FIT\n"); ++printf("Found FIT\n"); + load.bl_len = 1; + load.read = spl_nor_load_read; + +@@ -94,7 +94,7 @@ static int spl_nor_load_image(struct spl_image_info *spl_image, + #ifdef CONFIG_SPL_LOAD_FIT + header = (const struct image_header *)spl_nor_get_uboot_base(); + if (image_get_magic(header) == FDT_MAGIC) { +- debug("Found FIT format U-Boot\n"); ++printf("Found FIT format U-Boot\n"); + load.bl_len = 1; + load.read = spl_nor_load_read; + return spl_load_simple_fit(spl_image, &load, +diff --git a/common/spl/spl_onenand.c b/common/spl/spl_onenand.c +index 93cbf47e8..0cbcd3bfd 100644 +--- a/common/spl/spl_onenand.c ++++ b/common/spl/spl_onenand.c +@@ -21,7 +21,7 @@ static int spl_onenand_load_image(struct spl_image_info *spl_image, + struct image_header *header; + int ret; + +- debug("spl: onenand\n"); ++printf("spl: onenand\n"); + + header = spl_get_load_buffer(0, CONFIG_SYS_ONENAND_PAGE_SIZE); + /* Load u-boot */ +diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c +index df1d5b43d..16f14e9ac 100644 +--- a/common/spl/spl_ram.c ++++ b/common/spl/spl_ram.c +@@ -24,7 +24,7 @@ + static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector, + ulong count, void *buf) + { +- debug("%s: sector %lx, count %lx, buf %lx\n", ++printf("%s: sector %lx, count %lx, buf %lx\n", + __func__, sector, count, (ulong)buf); + memcpy(buf, (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS + sector), count); + return count; +@@ -46,20 +46,20 @@ static int spl_ram_load_image(struct spl_image_info *spl_image, + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + +- debug("Found FIT\n"); ++printf("Found FIT\n"); + load.bl_len = 1; + load.read = spl_ram_load_read; + spl_load_simple_fit(spl_image, &load, 0, header); + } else { + ulong u_boot_pos = binman_sym(ulong, u_boot_any, image_pos); + +- debug("Legacy image\n"); ++printf("Legacy image\n"); + /* + * Get the header. It will point to an address defined by + * handoff which will tell where the image located inside + * the flash. + */ +- debug("u_boot_pos = %lx\n", u_boot_pos); ++printf("u_boot_pos = %lx\n", u_boot_pos); + if (u_boot_pos == BINMAN_SYM_MISSING) { + /* + * No binman support or no information. For now, fix it +diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c +index ae9c09883..93ffa7dbf 100644 +--- a/common/spl/spl_sdp.c ++++ b/common/spl/spl_sdp.c +@@ -40,7 +40,7 @@ static int spl_sdp_load_image(struct spl_image_info *spl_image, + * code. + */ + ret = spl_sdp_handle(controller_index, spl_image); +- debug("SDP ended\n"); ++printf("SDP ended\n"); + + usb_gadget_release(controller_index); + return ret; +diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c +index 6a4e03328..82ac6594b 100644 +--- a/common/spl/spl_spi.c ++++ b/common/spl/spl_spi.c +@@ -117,7 +117,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, + err = spi_flash_read(flash, payload_offs, sizeof(*header), + (void *)header); + if (err) { +- debug("%s: Failed to read from SPI flash (err=%d)\n", ++printf("%s: Failed to read from SPI flash (err=%d)\n", + __func__, err); + return err; + } +@@ -135,7 +135,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + +- debug("Found FIT\n"); ++printf("Found FIT\n"); + load.dev = flash; + load.priv = NULL; + load.filename = NULL; +diff --git a/common/spl/spl_usb.c b/common/spl/spl_usb.c +index 3648de349..7bb8720b7 100644 +--- a/common/spl/spl_usb.c ++++ b/common/spl/spl_usb.c +@@ -45,7 +45,7 @@ int spl_usb_load(struct spl_image_info *spl_image, + if (!stor_dev) + return -ENODEV; + +- debug("boot mode - FAT\n"); ++printf("boot mode - FAT\n"); + + #ifdef CONFIG_SPL_OS_BOOT + if (spl_start_uboot() || +diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c +index 8ce0a09ef..8db0f6454 100644 +--- a/common/spl/spl_xip.c ++++ b/common/spl/spl_xip.c +@@ -19,7 +19,7 @@ static int spl_xip(struct spl_image_info *spl_image, + spl_image->os = IH_OS_LINUX; + spl_image->load_addr = CONFIG_SYS_LOAD_ADDR; + spl_image->entry_point = CONFIG_SYS_LOAD_ADDR; +- debug("spl: payload xipImage, load addr: 0x%lx\n", ++printf("spl: payload xipImage, load addr: 0x%lx\n", + spl_image->load_addr); + return 0; + } +diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c +index e979f780a..af0b73291 100644 +--- a/common/spl/spl_ymodem.c ++++ b/common/spl/spl_ymodem.c +@@ -120,7 +120,7 @@ int spl_ymodem_load_image(struct spl_image_info *spl_image, + struct spl_load_info load; + struct ymodem_fit_info info; + +- debug("Found FIT\n"); ++printf("Found FIT\n"); + load.dev = NULL; + load.priv = (void *)&info; + load.filename = NULL; +diff --git a/common/splash_source.c b/common/splash_source.c +index 3cf926d91..ae2b51c43 100644 +--- a/common/splash_source.c ++++ b/common/splash_source.c +@@ -42,7 +42,7 @@ static int splash_sf_read_raw(u32 bmp_load_addr, int offset, size_t read_size) + #else + static int splash_sf_read_raw(u32 bmp_load_addr, int offset, size_t read_size) + { +- debug("%s: sf support not available\n", __func__); ++printf("%s: sf support not available\n", __func__); + return -ENOSYS; + } + #endif +@@ -59,7 +59,7 @@ static int splash_nand_read_raw(u32 bmp_load_addr, int offset, size_t read_size) + #else + static int splash_nand_read_raw(u32 bmp_load_addr, int offset, size_t read_size) + { +- debug("%s: nand support not available\n", __func__); ++printf("%s: nand support not available\n", __func__); + return -ENOSYS; + } + #endif +@@ -339,7 +339,7 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr) + + res = fit_check_format(fit_header, IMAGE_SIZE_INVAL); + if (res) { +- debug("Could not find valid FIT image\n"); ++printf("Could not find valid FIT image\n"); + return res; + } + +@@ -350,7 +350,7 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr) + + node_offset = fit_image_get_node(fit_header, splash_file); + if (node_offset < 0) { +- debug("Could not find splash image '%s' in FIT\n", ++printf("Could not find splash image '%s' in FIT\n", + splash_file); + return -ENOENT; + } +diff --git a/common/stdio.c b/common/stdio.c +index d4acc5256..54ff23141 100644 +--- a/common/stdio.c ++++ b/common/stdio.c +@@ -162,7 +162,7 @@ static int stdio_probe_device(const char *name, enum uclass_id id, + if (ret == -ENODEV) + ret = uclass_first_device_err(id, &dev); + if (ret) { +- debug("No %s device for seq %d (%s)\n", uclass_get_name(id), ++printf("No %s device for seq %d (%s)\n", uclass_get_name(id), + seq, name); + return ret; + } +@@ -170,7 +170,7 @@ static int stdio_probe_device(const char *name, enum uclass_id id, + sdev = list_empty(&devs.list) ? NULL : + list_last_entry(&devs.list, struct stdio_dev, list); + if (!sdev || strcmp(sdev->name, name)) { +- debug("Device '%s' did not register with stdio as '%s'\n", ++printf("Device '%s' did not register with stdio as '%s'\n", + dev->name, name); + return -ENOENT; + } +diff --git a/common/usb.c b/common/usb.c +index aad13fd9c..93a93bd5c 100644 +--- a/common/usb.c ++++ b/common/usb.c +@@ -119,7 +119,7 @@ int usb_init(void) + usb_started = 1; + } + +- debug("scan end\n"); ++printf("scan end\n"); + /* if we were not able to find at least one working bus, bail out */ + if (controllers_initialized == 0) + puts("USB error: all controllers failed lowlevel init\n"); +@@ -240,7 +240,7 @@ int usb_control_msg(struct usb_device *dev, unsigned int pipe, + setup_packet->value = cpu_to_le16(value); + setup_packet->index = cpu_to_le16(index); + setup_packet->length = cpu_to_le16(size); +- debug("usb_control_msg: request: 0x%X, requesttype: 0x%X, " \ ++printf("usb_control_msg: request: 0x%X, requesttype: 0x%X, " \ + "value 0x%X index 0x%X length 0x%X\n", + request, requesttype, value, index, size); + dev->status = USB_ST_NOT_PROC; /*not yet processed */ +@@ -339,21 +339,21 @@ usb_set_maxpacket_ep(struct usb_device *dev, int if_idx, int ep_idx) + /* Control => bidirectional */ + dev->epmaxpacketout[b] = ep_wMaxPacketSize; + dev->epmaxpacketin[b] = ep_wMaxPacketSize; +- debug("##Control EP epmaxpacketout/in[%d] = %d\n", ++printf("##Control EP epmaxpacketout/in[%d] = %d\n", + b, dev->epmaxpacketin[b]); + } else { + if ((ep->bEndpointAddress & 0x80) == 0) { + /* OUT Endpoint */ + if (ep_wMaxPacketSize > dev->epmaxpacketout[b]) { + dev->epmaxpacketout[b] = ep_wMaxPacketSize; +- debug("##EP epmaxpacketout[%d] = %d\n", ++printf("##EP epmaxpacketout[%d] = %d\n", + b, dev->epmaxpacketout[b]); + } + } else { + /* IN Endpoint */ + if (ep_wMaxPacketSize > dev->epmaxpacketin[b]) { + dev->epmaxpacketin[b] = ep_wMaxPacketSize; +- debug("##EP epmaxpacketin[%d] = %d\n", ++printf("##EP epmaxpacketin[%d] = %d\n", + b, dev->epmaxpacketin[b]); + } + } /* if out */ +@@ -483,7 +483,7 @@ static int usb_parse_config(struct usb_device *dev, + if_desc[ifno].\ + ep_desc[epno].\ + wMaxPacketSize); +- debug("if %d, ep %d\n", ifno, epno); ++printf("if %d, ep %d\n", ifno, epno); + break; + case USB_DT_SS_ENDPOINT_COMP: + if (head->bLength != USB_DT_SS_EP_COMP_SIZE) { +@@ -508,7 +508,7 @@ static int usb_parse_config(struct usb_device *dev, + if (head->bLength == 0) + return -EINVAL; + +- debug("unknown Description Type : %x\n", ++printf("unknown Description Type : %x\n", + head->bDescriptorType); + + #ifdef DEBUG +@@ -517,8 +517,8 @@ static int usb_parse_config(struct usb_device *dev, + int i; + + for (i = 0; i < head->bLength; i++) +- debug("%02X ", *ch++); +- debug("\n\n\n"); ++printf("%02X ", *ch++); ++printf("\n\n\n"); + } + #endif + break; +@@ -606,7 +606,7 @@ int usb_get_configuration_no(struct usb_device *dev, int cfgno, + + config = (struct usb_config_descriptor *)&buffer[0]; + result = usb_get_descriptor(dev, USB_DT_CONFIG, cfgno, buffer, length); +- debug("get_conf_no %d Result %d, wLength %d\n", cfgno, result, ++printf("get_conf_no %d Result %d, wLength %d\n", cfgno, result, + le16_to_cpu(config->wTotalLength)); + config->wTotalLength = result; /* validated, with CPU byte order */ + +@@ -619,7 +619,7 @@ int usb_get_configuration_no(struct usb_device *dev, int cfgno, + */ + static int usb_set_address(struct usb_device *dev) + { +- debug("set address %d\n", dev->devnum); ++printf("set address %d\n", dev->devnum); + + return usb_control_msg(dev, usb_snddefctrl(dev), USB_REQ_SET_ADDRESS, + 0, (dev->devnum), 0, NULL, 0, USB_CNTL_TIMEOUT); +@@ -669,7 +669,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate) + static int usb_set_configuration(struct usb_device *dev, int configuration) + { + int res; +- debug("set configuration %d\n", configuration); ++printf("set configuration %d\n", configuration); + /* set setup command */ + res = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), + USB_REQ_SET_CONFIGURATION, 0, +@@ -821,17 +821,17 @@ int usb_string(struct usb_device *dev, int index, char *buf, size_t size) + if (!dev->have_langid) { + err = usb_string_sub(dev, 0, 0, tbuf); + if (err < 0) { +- debug("error getting string descriptor 0 " \ ++printf("error getting string descriptor 0 " \ + "(error=%lx)\n", dev->status); + return -EIO; + } else if (tbuf[0] < 4) { +- debug("string descriptor 0 too short\n"); ++printf("string descriptor 0 too short\n"); + return -EIO; + } else { + dev->have_langid = -1; + dev->string_langid = tbuf[2] | (tbuf[3] << 8); + /* always use the first langid listed */ +- debug("USB device number %d default " \ ++printf("USB device number %d default " \ + "language ID 0x%x\n", + dev->devnum, dev->string_langid); + } +@@ -877,7 +877,7 @@ struct usb_device *usb_get_dev_index(int index) + int usb_alloc_new_device(struct udevice *controller, struct usb_device **devp) + { + int i; +- debug("New Device %d\n", dev_index); ++printf("New Device %d\n", dev_index); + if (dev_index == USB_MAX_DEVICE) { + printf("ERROR, too many USB Devices, max=%d\n", USB_MAX_DEVICE); + return -ENOSPC; +@@ -903,7 +903,7 @@ int usb_alloc_new_device(struct udevice *controller, struct usb_device **devp) + void usb_free_device(struct udevice *controller) + { + dev_index--; +- debug("Freeing device node: %d\n", dev_index); ++printf("Freeing device node: %d\n", dev_index); + memset(&usb_dev[dev_index], 0, sizeof(struct usb_device)); + usb_dev[dev_index].devnum = -1; + } +@@ -1138,7 +1138,7 @@ int usb_select_config(struct usb_device *dev) + */ + mdelay(10); + +- debug("new device strings: Mfr=%d, Product=%d, SerialNumber=%d\n", ++printf("new device strings: Mfr=%d, Product=%d, SerialNumber=%d\n", + dev->descriptor.iManufacturer, dev->descriptor.iProduct, + dev->descriptor.iSerialNumber); + memset(dev->mf, 0, sizeof(dev->mf)); +@@ -1153,9 +1153,9 @@ int usb_select_config(struct usb_device *dev) + if (dev->descriptor.iSerialNumber) + usb_string(dev, dev->descriptor.iSerialNumber, + dev->serial, sizeof(dev->serial)); +- debug("Manufacturer %s\n", dev->mf); +- debug("Product %s\n", dev->prod); +- debug("SerialNumber %s\n", dev->serial); ++printf("Manufacturer %s\n", dev->mf); ++printf("Product %s\n", dev->prod); ++printf("SerialNumber %s\n", dev->serial); + + return 0; + } +diff --git a/common/usb_hub.c b/common/usb_hub.c +index ba11a188c..386666cc6 100644 +--- a/common/usb_hub.c ++++ b/common/usb_hub.c +@@ -170,10 +170,10 @@ static void usb_hub_power_on(struct usb_hub_device *hub) + + dev = hub->pusb_dev; + +- debug("enabling power on all ports\n"); ++printf("enabling power on all ports\n"); + for (i = 0; i < dev->maxchild; i++) { + usb_set_port_feature(dev, i + 1, USB_PORT_FEAT_POWER); +- debug("port %d returns %lX\n", i + 1, dev->status); ++printf("port %d returns %lX\n", i + 1, dev->status); + } + + #ifdef CONFIG_SANDBOX +@@ -195,7 +195,7 @@ static void usb_hub_power_on(struct usb_hub_device *hub) + if (env) + pgood_delay = max(pgood_delay, + (unsigned)simple_strtol(env, NULL, 0)); +- debug("pgood_delay=%dms\n", pgood_delay); ++printf("pgood_delay=%dms\n", pgood_delay); + + /* + * Do a minimum delay of the larger value of 100ms or pgood_delay +@@ -209,7 +209,7 @@ static void usb_hub_power_on(struct usb_hub_device *hub) + * usb_hub_configure() later. + */ + hub->connect_timeout = hub->query_delay + 1000; +- debug("devnum=%d poweron: query_delay=%d connect_timeout=%d\n", ++printf("devnum=%d poweron: query_delay=%d connect_timeout=%d\n", + dev->devnum, max(100, (int)pgood_delay), + max(100, (int)pgood_delay) + 1000); + } +@@ -271,10 +271,10 @@ static int usb_hub_port_reset(struct usb_device *dev, int port, + int delay = HUB_SHORT_RESET_TIME; /* start with short reset delay */ + + #if CONFIG_IS_ENABLED(DM_USB) +- debug("%s: resetting '%s' port %d...\n", __func__, dev->dev->name, ++printf("%s: resetting '%s' port %d...\n", __func__, dev->dev->name, + port + 1); + #else +- debug("%s: resetting port %d...\n", __func__, port + 1); ++printf("%s: resetting port %d...\n", __func__, port + 1); + #endif + for (tries = 0; tries < MAX_TRIES; tries++) { + err = usb_set_port_feature(dev, port + 1, USB_PORT_FEAT_RESET); +@@ -284,17 +284,17 @@ static int usb_hub_port_reset(struct usb_device *dev, int port, + mdelay(delay); + + if (usb_get_port_status(dev, port + 1, portsts) < 0) { +- debug("get_port_status failed status %lX\n", ++printf("get_port_status failed status %lX\n", + dev->status); + return -1; + } + portstatus = le16_to_cpu(portsts->wPortStatus); + portchange = le16_to_cpu(portsts->wPortChange); + +- debug("portstatus %x, change %x, %s\n", portstatus, portchange, ++printf("portstatus %x, change %x, %s\n", portstatus, portchange, + portspeed(portstatus)); + +- debug("STAT_C_CONNECTION = %d STAT_CONNECTION = %d" \ ++printf("STAT_C_CONNECTION = %d STAT_CONNECTION = %d" \ + " USB_PORT_STAT_ENABLE %d\n", + (portchange & USB_PORT_STAT_C_CONNECTION) ? 1 : 0, + (portstatus & USB_PORT_STAT_CONNECTION) ? 1 : 0, +@@ -325,9 +325,9 @@ static int usb_hub_port_reset(struct usb_device *dev, int port, + } + + if (tries == MAX_TRIES) { +- debug("Cannot enable port %i after %i retries, " \ ++printf("Cannot enable port %i after %i retries, " \ + "disabling port.\n", port + 1, MAX_TRIES); +- debug("Maybe the USB cable is bad?\n"); ++printf("Maybe the USB cable is bad?\n"); + return -1; + } + +@@ -345,12 +345,12 @@ int usb_hub_port_connect_change(struct usb_device *dev, int port) + /* Check status */ + ret = usb_get_port_status(dev, port + 1, portsts); + if (ret < 0) { +- debug("get_port_status failed\n"); ++printf("get_port_status failed\n"); + return ret; + } + + portstatus = le16_to_cpu(portsts->wPortStatus); +- debug("portstatus %x, change %x, %s\n", ++printf("portstatus %x, change %x, %s\n", + portstatus, + le16_to_cpu(portsts->wPortChange), + portspeed(portstatus)); +@@ -362,7 +362,7 @@ int usb_hub_port_connect_change(struct usb_device *dev, int port) + if (((!(portstatus & USB_PORT_STAT_CONNECTION)) && + (!(portstatus & USB_PORT_STAT_ENABLE))) || + usb_device_has_child_on_port(dev, port)) { +- debug("usb_disconnect(&hub->children[port]);\n"); ++printf("usb_disconnect(&hub->children[port]);\n"); + /* Return now if nothing is connected */ + if (!(portstatus & USB_PORT_STAT_CONNECTION)) + return -ENOTCONN; +@@ -417,7 +417,7 @@ int usb_hub_port_connect_change(struct usb_device *dev, int port) + } + #endif + if (ret < 0) { +- debug("hub: disabling port %d\n", port + 1); ++printf("hub: disabling port %d\n", port + 1); + usb_clear_port_feature(dev, port + 1, USB_PORT_FEAT_ENABLE); + } + +@@ -447,9 +447,9 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) + + ret = usb_get_port_status(dev, i + 1, portsts); + if (ret < 0) { +- debug("get_port_status failed\n"); ++printf("get_port_status failed\n"); + if (get_timer(0) >= hub->connect_timeout) { +- debug("devnum=%d port=%d: timeout\n", ++printf("devnum=%d port=%d: timeout\n", + dev->devnum, i + 1); + /* Remove this device from scanning list */ + list_del(&usb_scan->list); +@@ -461,7 +461,7 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) + + portstatus = le16_to_cpu(portsts->wPortStatus); + portchange = le16_to_cpu(portsts->wPortChange); +- debug("Port %d Status %X Change %X\n", i + 1, portstatus, portchange); ++printf("Port %d Status %X Change %X\n", i + 1, portstatus, portchange); + + /* + * No connection change happened, wait a bit more. +@@ -473,7 +473,7 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) + if (!(portchange & USB_PORT_STAT_C_CONNECTION) && + !(portstatus & USB_PORT_STAT_CONNECTION)) { + if (get_timer(0) >= hub->connect_timeout) { +- debug("devnum=%d port=%d: timeout\n", ++printf("devnum=%d port=%d: timeout\n", + dev->devnum, i + 1); + /* Remove this device from scanning list */ + list_del(&usb_scan->list); +@@ -484,23 +484,23 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) + } + + if (portchange & USB_PORT_STAT_C_RESET) { +- debug("port %d reset change\n", i + 1); ++printf("port %d reset change\n", i + 1); + usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET); + } + + if ((portchange & USB_SS_PORT_STAT_C_BH_RESET) && + usb_hub_is_superspeed(dev)) { +- debug("port %d BH reset change\n", i + 1); ++printf("port %d BH reset change\n", i + 1); + usb_clear_port_feature(dev, i + 1, USB_SS_PORT_FEAT_C_BH_RESET); + } + + /* A new USB device is ready at this point */ +- debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1); ++printf("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1); + + usb_hub_port_connect_change(dev, i); + + if (portchange & USB_PORT_STAT_C_ENABLE) { +- debug("port %d enable change, status %x\n", i + 1, portstatus); ++printf("port %d enable change, status %x\n", i + 1, portstatus); + usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_ENABLE); + /* + * The following hack causes a ghost device problem +@@ -515,7 +515,7 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) + if (!(portstatus & USB_PORT_STAT_ENABLE) && + (portstatus & USB_PORT_STAT_CONNECTION) && + usb_device_has_child_on_port(dev, i)) { +- debug("already running port %i disabled by hub (EMI?), re-enabling...\n", ++printf("already running port %i disabled by hub (EMI?), re-enabling...\n", + i + 1); + usb_hub_port_connect_change(dev, i); + } +@@ -523,12 +523,12 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) + } + + if (portstatus & USB_PORT_STAT_SUSPEND) { +- debug("port %d suspend change\n", i + 1); ++printf("port %d suspend change\n", i + 1); + usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_SUSPEND); + } + + if (portchange & USB_PORT_STAT_C_OVERCURRENT) { +- debug("port %d over-current change\n", i + 1); ++printf("port %d over-current change\n", i + 1); + usb_clear_port_feature(dev, i + 1, + USB_PORT_FEAT_C_OVER_CURRENT); + /* Only power-on this one port */ +@@ -630,7 +630,7 @@ static int usb_hub_configure(struct usb_device *dev) + /* Get the the hub descriptor */ + ret = usb_get_hub_descriptor(dev, buffer, 4); + if (ret < 0) { +- debug("usb_hub_configure: failed to get hub " \ ++printf("usb_hub_configure: failed to get hub " \ + "descriptor, giving up %lX\n", dev->status); + return ret; + } +@@ -641,7 +641,7 @@ static int usb_hub_configure(struct usb_device *dev) + + ret = usb_get_hub_descriptor(dev, buffer, length); + if (ret < 0) { +- debug("usb_hub_configure: failed to get hub " \ ++printf("usb_hub_configure: failed to get hub " \ + "descriptor 2nd giving up %lX\n", dev->status); + return ret; + } +@@ -666,37 +666,37 @@ static int usb_hub_configure(struct usb_device *dev) + descriptor->u.hs.PortPowerCtrlMask[i]; + + dev->maxchild = descriptor->bNbrPorts; +- debug("%d ports detected\n", dev->maxchild); ++printf("%d ports detected\n", dev->maxchild); + + hubCharacteristics = get_unaligned(&hub->desc.wHubCharacteristics); + switch (hubCharacteristics & HUB_CHAR_LPSM) { + case 0x00: +- debug("ganged power switching\n"); ++printf("ganged power switching\n"); + break; + case 0x01: +- debug("individual port power switching\n"); ++printf("individual port power switching\n"); + break; + case 0x02: + case 0x03: +- debug("unknown reserved power switching mode\n"); ++printf("unknown reserved power switching mode\n"); + break; + } + + if (hubCharacteristics & HUB_CHAR_COMPOUND) +- debug("part of a compound device\n"); ++printf("part of a compound device\n"); + else +- debug("standalone hub\n"); ++printf("standalone hub\n"); + + switch (hubCharacteristics & HUB_CHAR_OCPM) { + case 0x00: +- debug("global over-current protection\n"); ++printf("global over-current protection\n"); + break; + case 0x08: +- debug("individual port over-current protection\n"); ++printf("individual port over-current protection\n"); + break; + case 0x10: + case 0x18: +- debug("no over-current protection\n"); ++printf("no over-current protection\n"); + break; + } + +@@ -704,22 +704,22 @@ static int usb_hub_configure(struct usb_device *dev) + case USB_HUB_PR_FS: + break; + case USB_HUB_PR_HS_SINGLE_TT: +- debug("Single TT\n"); ++printf("Single TT\n"); + break; + case USB_HUB_PR_HS_MULTI_TT: + ret = usb_set_interface(dev, 0, 1); + if (ret == 0) { +- debug("TT per port\n"); ++printf("TT per port\n"); + hub->tt.multi = true; + } else { +- debug("Using single TT (err %d)\n", ret); ++printf("Using single TT (err %d)\n", ret); + } + break; + case USB_HUB_PR_SS: + /* USB 3.0 hubs don't have a TT */ + break; + default: +- debug("Unrecognized hub protocol %d\n", ++printf("Unrecognized hub protocol %d\n", + dev->descriptor.bDeviceProtocol); + break; + } +@@ -729,59 +729,59 @@ static int usb_hub_configure(struct usb_device *dev) + case HUB_TTTT_8_BITS: + if (dev->descriptor.bDeviceProtocol != 0) { + hub->tt.think_time = 666; +- debug("TT requires at most %d FS bit times (%d ns)\n", ++printf("TT requires at most %d FS bit times (%d ns)\n", + 8, hub->tt.think_time); + } + break; + case HUB_TTTT_16_BITS: + hub->tt.think_time = 666 * 2; +- debug("TT requires at most %d FS bit times (%d ns)\n", ++printf("TT requires at most %d FS bit times (%d ns)\n", + 16, hub->tt.think_time); + break; + case HUB_TTTT_24_BITS: + hub->tt.think_time = 666 * 3; +- debug("TT requires at most %d FS bit times (%d ns)\n", ++printf("TT requires at most %d FS bit times (%d ns)\n", + 24, hub->tt.think_time); + break; + case HUB_TTTT_32_BITS: + hub->tt.think_time = 666 * 4; +- debug("TT requires at most %d FS bit times (%d ns)\n", ++printf("TT requires at most %d FS bit times (%d ns)\n", + 32, hub->tt.think_time); + break; + } + +- debug("power on to power good time: %dms\n", ++printf("power on to power good time: %dms\n", + descriptor->bPwrOn2PwrGood * 2); +- debug("hub controller current requirement: %dmA\n", ++printf("hub controller current requirement: %dmA\n", + descriptor->bHubContrCurrent); + + for (i = 0; i < dev->maxchild; i++) +- debug("port %d is%s removable\n", i + 1, ++printf("port %d is%s removable\n", i + 1, + hub->desc.u.hs.DeviceRemovable[(i + 1) / 8] & \ + (1 << ((i + 1) % 8)) ? " not" : ""); + + if (sizeof(struct usb_hub_status) > USB_BUFSIZ) { +- debug("usb_hub_configure: failed to get Status - " \ ++printf("usb_hub_configure: failed to get Status - " \ + "too long: %d\n", descriptor->bLength); + return -EFBIG; + } + + ret = usb_get_hub_status(dev, buffer); + if (ret < 0) { +- debug("usb_hub_configure: failed to get Status %lX\n", ++printf("usb_hub_configure: failed to get Status %lX\n", + dev->status); + return ret; + } + + hubsts = (struct usb_hub_status *)buffer; + +- debug("get_hub_status returned status %X, change %X\n", ++printf("get_hub_status returned status %X, change %X\n", + le16_to_cpu(hubsts->wHubStatus), + le16_to_cpu(hubsts->wHubChange)); +- debug("local power source is %s\n", ++printf("local power source is %s\n", + (le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_LOCAL_POWER) ? \ + "lost (inactive)" : "good"); +- debug("%sover-current condition exists\n", ++printf("%sover-current condition exists\n", + (le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_OVERCURRENT) ? \ + "" : "no "); + +@@ -792,7 +792,7 @@ static int usb_hub_configure(struct usb_device *dev) + */ + ret = usb_update_hub_device(dev); + if (ret < 0 && ret != -ENOSYS) { +- debug("%s: failed to update hub device for HCD (%x)\n", ++printf("%s: failed to update hub device for HCD (%x)\n", + __func__, ret); + return ret; + } +@@ -821,7 +821,7 @@ static int usb_hub_configure(struct usb_device *dev) + hub->hub_depth = depth; + + if (usb_hub_is_superspeed(dev)) { +- debug("set hub (%p) depth to %d\n", dev, depth); ++printf("set hub (%p) depth to %d\n", dev, depth); + /* + * This request sets the value that the hub uses to + * determine the index into the 'route string index' +@@ -829,7 +829,7 @@ static int usb_hub_configure(struct usb_device *dev) + */ + ret = usb_set_hub_depth(dev, depth); + if (ret < 0) { +- debug("%s: failed to set hub depth (%lX)\n", ++printf("%s: failed to set hub depth (%lX)\n", + __func__, dev->status); + return ret; + } +@@ -901,15 +901,15 @@ static int usb_hub_check(struct usb_device *dev, int ifnum) + if ((ep->bmAttributes & 3) != 3) + goto err; + /* We found a hub */ +- debug("USB hub found\n"); ++printf("USB hub found\n"); + return 0; + + err: +- debug("USB hub not found: bInterfaceClass=%d, bInterfaceSubClass=%d, bNumEndpoints=%d\n", ++printf("USB hub not found: bInterfaceClass=%d, bInterfaceSubClass=%d, bNumEndpoints=%d\n", + iface->desc.bInterfaceClass, iface->desc.bInterfaceSubClass, + iface->desc.bNumEndpoints); + if (ep) { +- debug(" bEndpointAddress=%#x, bmAttributes=%d", ++printf(" bEndpointAddress=%#x, bmAttributes=%d", + ep->bEndpointAddress, ep->bmAttributes); + } + +@@ -937,7 +937,7 @@ int usb_hub_scan(struct udevice *hub) + + static int usb_hub_post_probe(struct udevice *dev) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + return usb_hub_scan(dev); + } + +diff --git a/common/usb_kbd.c b/common/usb_kbd.c +index afad260d3..922f42e7f 100644 +--- a/common/usb_kbd.c ++++ b/common/usb_kbd.c +@@ -227,7 +227,7 @@ static int usb_kbd_translate(struct usb_kbd_pdata *data, unsigned char scancode, + + /* Report keycode if any */ + if (keycode) { +- debug("%c", keycode); ++printf("%c", keycode); + usb_kbd_put_queue(data, keycode); + return 0; + } +@@ -339,7 +339,7 @@ static int usb_kbd_irq(struct usb_device *dev) + { + if ((dev->irq_status != 0) || + (dev->irq_act_len != USB_KBD_BOOT_REPORT_SIZE)) { +- debug("USB KBD: Error %lX, len %d\n", ++printf("USB KBD: Error %lX, len %d\n", + dev->irq_status, dev->irq_act_len); + return 1; + } +@@ -473,7 +473,7 @@ static int usb_kbd_probe_dev(struct usb_device *dev, unsigned int ifnum) + if (epNum == iface->desc.bNumEndpoints) + return 0; + +- debug("USB KBD: found interrupt EP: 0x%x\n", ep->bEndpointAddress); ++printf("USB KBD: found interrupt EP: 0x%x\n", ep->bEndpointAddress); + + data = malloc(sizeof(struct usb_kbd_pdata)); + if (!data) { +@@ -501,19 +501,19 @@ static int usb_kbd_probe_dev(struct usb_device *dev, unsigned int ifnum) + data->last_report = -1; + + /* We found a USB Keyboard, install it. */ +- debug("USB KBD: set boot protocol\n"); ++printf("USB KBD: set boot protocol\n"); + usb_set_protocol(dev, iface->desc.bInterfaceNumber, 0); + + #if !defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP) && \ + !defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE) +- debug("USB KBD: set idle interval...\n"); ++printf("USB KBD: set idle interval...\n"); + usb_set_idle(dev, iface->desc.bInterfaceNumber, REPEAT_RATE / 4, 0); + #else +- debug("USB KBD: set idle interval=0...\n"); ++printf("USB KBD: set idle interval=0...\n"); + usb_set_idle(dev, iface->desc.bInterfaceNumber, 0, 0); + #endif + +- debug("USB KBD: enable interrupt pipe...\n"); ++printf("USB KBD: enable interrupt pipe...\n"); + #ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE + data->intq = create_int_queue(dev, data->intpipe, 1, + USB_KBD_BOOT_REPORT_SIZE, data->new, +@@ -547,7 +547,7 @@ static int probe_usb_keyboard(struct usb_device *dev) + return -ENOENT; + + /* Register the keyboard */ +- debug("USB KBD: register.\n"); ++printf("USB KBD: register.\n"); + memset(&usb_kbd_dev, 0, sizeof(struct stdio_dev)); + strcpy(usb_kbd_dev.name, DEVNAME); + usb_kbd_dev.flags = DEV_FLAGS_INPUT; +@@ -586,7 +586,7 @@ int drv_usb_kbd_init(void) + { + int error, i; + +- debug("%s: Probing for keyboard\n", __func__); ++printf("%s: Probing for keyboard\n", __func__); + /* Scan all USB Devices */ + for (i = 0; i < USB_MAX_DEVICE; i++) { + struct usb_device *dev; +diff --git a/common/usb_storage.c b/common/usb_storage.c +index 946c6b2b3..420c41fab 100644 +--- a/common/usb_storage.c ++++ b/common/usb_storage.c +@@ -130,7 +130,7 @@ void uhci_show_temp_int_td(void); + + static void usb_show_progress(void) + { +- debug("."); ++printf("."); + } + + /******************************************************************************* +@@ -182,7 +182,7 @@ static unsigned int usb_get_max_lun(struct us_data *us) + 0, us->ifnum, + result, sizeof(char), + USB_CNTL_TIMEOUT * 5); +- debug("Get Max LUN -> len = %i, result = %i\n", len, (int) *result); ++printf("Get Max LUN -> len = %i, result = %i\n", len, (int) *result); + return (len > 0) ? *result : 0; + } + +@@ -200,7 +200,7 @@ static int usb_stor_probe_device(struct usb_device *udev) + return -ENOENT; /* no more devices available */ + #endif + +- debug("\n\nProbing for storage\n"); ++printf("\n\nProbing for storage\n"); + #if CONFIG_IS_ENABLED(BLK) + /* + * We store the us_data in the mass storage device's plat. It +@@ -221,7 +221,7 @@ static int usb_stor_probe_device(struct usb_device *udev) + IF_TYPE_USB, usb_max_devs, 512, 0, + &dev); + if (ret) { +- debug("Cannot bind driver\n"); ++printf("Cannot bind driver\n"); + return ret; + } + +@@ -232,9 +232,9 @@ static int usb_stor_probe_device(struct usb_device *udev) + ret = usb_stor_get_info(udev, data, blkdev); + if (ret == 1) { + usb_max_devs++; +- debug("%s: Found device %p\n", __func__, udev); ++printf("%s: Found device %p\n", __func__, udev); + } else { +- debug("usb_stor_get_info: Invalid device\n"); ++printf("usb_stor_get_info: Invalid device\n"); + ret = device_unbind(dev); + if (ret) + return ret; +@@ -276,11 +276,11 @@ static int usb_stor_probe_device(struct usb_device *udev) + + if (usb_stor_get_info(udev, &usb_stor[start], + &usb_dev_desc[usb_max_devs]) == 1) { +- debug("partype: %d\n", blkdev->part_type); ++printf("partype: %d\n", blkdev->part_type); + part_init(blkdev); +- debug("partype: %d\n", blkdev->part_type); ++printf("partype: %d\n", blkdev->part_type); + usb_max_devs++; +- debug("%s: Found device %p\n", __func__, udev); ++printf("%s: Found device %p\n", __func__, udev); + } + } + #endif +@@ -313,7 +313,7 @@ int usb_stor_scan(int mode) + struct usb_device *dev; + + dev = usb_get_dev_index(i); /* get device */ +- debug("i=%d\n", i); ++printf("i=%d\n", i); + if (usb_stor_probe_device(dev)) + break; + } /* for */ +@@ -389,13 +389,13 @@ static int us_one_transfer(struct us_data *us, int pipe, char *buf, int length) + /* set up the transfer loop */ + do { + /* transfer the data */ +- debug("Bulk xfer 0x%lx(%d) try #%d\n", ++printf("Bulk xfer 0x%lx(%d) try #%d\n", + (ulong)map_to_sysmem(buf), this_xfer, + 11 - maxtry); + result = usb_bulk_msg(us->pusb_dev, pipe, buf, + this_xfer, &partial, + USB_CNTL_TIMEOUT * 5); +- debug("bulk_msg returned %d xferred %d/%d\n", ++printf("bulk_msg returned %d xferred %d/%d\n", + result, partial, this_xfer); + if (us->pusb_dev->status != 0) { + /* if we stall, we need to clear it before +@@ -405,13 +405,13 @@ static int us_one_transfer(struct us_data *us, int pipe, char *buf, int length) + display_int_status(us->pusb_dev->status); + #endif + if (us->pusb_dev->status & USB_ST_STALLED) { +- debug("stalled ->clearing endpoint" \ ++printf("stalled ->clearing endpoint" \ + "halt for pipe 0x%x\n", pipe); + stat = us->pusb_dev->status; + usb_clear_halt(us->pusb_dev, pipe); + us->pusb_dev->status = stat; + if (this_xfer == partial) { +- debug("bulk transferred" \ ++printf("bulk transferred" \ + "with error %lX," \ + " but data ok\n", + us->pusb_dev->status); +@@ -421,17 +421,17 @@ static int us_one_transfer(struct us_data *us, int pipe, char *buf, int length) + return result; + } + if (us->pusb_dev->status & USB_ST_NAK_REC) { +- debug("Device NAKed bulk_msg\n"); ++printf("Device NAKed bulk_msg\n"); + return result; + } +- debug("bulk transferred with error"); ++printf("bulk transferred with error"); + if (this_xfer == partial) { +- debug(" %ld, but data ok\n", ++printf(" %ld, but data ok\n", + us->pusb_dev->status); + return 0; + } + /* if our try counter reaches 0, bail out */ +- debug(" %ld, data %d\n", ++printf(" %ld, data %d\n", + us->pusb_dev->status, partial); + if (!maxtry--) + return result; +@@ -466,34 +466,34 @@ static int usb_stor_BBB_reset(struct us_data *us) + * + * This comment stolen from FreeBSD's /sys/dev/usb/umass.c. + */ +- debug("BBB_reset\n"); ++printf("BBB_reset\n"); + result = usb_control_msg(us->pusb_dev, usb_sndctrlpipe(us->pusb_dev, 0), + US_BBB_RESET, + USB_TYPE_CLASS | USB_RECIP_INTERFACE, + 0, us->ifnum, NULL, 0, USB_CNTL_TIMEOUT * 5); + + if ((result < 0) && (us->pusb_dev->status & USB_ST_STALLED)) { +- debug("RESET:stall\n"); ++printf("RESET:stall\n"); + return -1; + } + + /* long wait for reset */ + mdelay(150); +- debug("BBB_reset result %d: status %lX reset\n", ++printf("BBB_reset result %d: status %lX reset\n", + result, us->pusb_dev->status); + pipe = usb_rcvbulkpipe(us->pusb_dev, us->ep_in); + result = usb_clear_halt(us->pusb_dev, pipe); + /* long wait for reset */ + mdelay(150); +- debug("BBB_reset result %d: status %lX clearing IN endpoint\n", ++printf("BBB_reset result %d: status %lX clearing IN endpoint\n", + result, us->pusb_dev->status); + /* long wait for reset */ + pipe = usb_sndbulkpipe(us->pusb_dev, us->ep_out); + result = usb_clear_halt(us->pusb_dev, pipe); + mdelay(150); +- debug("BBB_reset result %d: status %lX clearing OUT endpoint\n", ++printf("BBB_reset result %d: status %lX clearing OUT endpoint\n", + result, us->pusb_dev->status); +- debug("BBB_reset done\n"); ++printf("BBB_reset done\n"); + return 0; + } + +@@ -506,7 +506,7 @@ static int usb_stor_CB_reset(struct us_data *us) + unsigned char cmd[12]; + int result; + +- debug("CB_reset\n"); ++printf("CB_reset\n"); + memset(cmd, 0xff, sizeof(cmd)); + cmd[0] = SCSI_SEND_DIAG; + cmd[1] = 4; +@@ -518,12 +518,12 @@ static int usb_stor_CB_reset(struct us_data *us) + + /* long wait for reset */ + mdelay(1500); +- debug("CB_reset result %d: status %lX clearing endpoint halt\n", ++printf("CB_reset result %d: status %lX clearing endpoint halt\n", + result, us->pusb_dev->status); + usb_clear_halt(us->pusb_dev, usb_rcvbulkpipe(us->pusb_dev, us->ep_in)); + usb_clear_halt(us->pusb_dev, usb_rcvbulkpipe(us->pusb_dev, us->ep_out)); + +- debug("CB_reset done\n"); ++printf("CB_reset done\n"); + return 0; + } + +@@ -553,7 +553,7 @@ static int usb_stor_BBB_comdat(struct scsi_cmd *srb, struct us_data *us) + #endif + /* sanity checks */ + if (!(srb->cmdlen <= CBWCDBLENGTH)) { +- debug("usb_stor_BBB_comdat:cmdlen too large\n"); ++printf("usb_stor_BBB_comdat:cmdlen too large\n"); + return -1; + } + +@@ -573,7 +573,7 @@ static int usb_stor_BBB_comdat(struct scsi_cmd *srb, struct us_data *us) + result = usb_bulk_msg(us->pusb_dev, pipe, cbw, UMASS_BBB_CBW_SIZE, + &actlen, USB_CNTL_TIMEOUT * 5); + if (result < 0) +- debug("usb_stor_BBB_comdat:usb_bulk_msg error\n"); ++printf("usb_stor_BBB_comdat:usb_bulk_msg error\n"); + return result; + } + +@@ -596,7 +596,7 @@ static int usb_stor_CB_comdat(struct scsi_cmd *srb, struct us_data *us) + pipe = usb_sndbulkpipe(us->pusb_dev, us->ep_out); + + while (retry--) { +- debug("CBI gets a command: Try %d\n", 5 - retry); ++printf("CBI gets a command: Try %d\n", 5 - retry); + #ifdef DEBUG + usb_show_srb(srb); + #endif +@@ -608,32 +608,32 @@ static int usb_stor_CB_comdat(struct scsi_cmd *srb, struct us_data *us) + 0, us->ifnum, + srb->cmd, srb->cmdlen, + USB_CNTL_TIMEOUT * 5); +- debug("CB_transport: control msg returned %d, status %lX\n", ++printf("CB_transport: control msg returned %d, status %lX\n", + result, us->pusb_dev->status); + /* check the return code for the command */ + if (result < 0) { + if (us->pusb_dev->status & USB_ST_STALLED) { + status = us->pusb_dev->status; +- debug(" stall during command found," \ ++printf(" stall during command found," \ + " clear pipe\n"); + usb_clear_halt(us->pusb_dev, + usb_sndctrlpipe(us->pusb_dev, 0)); + us->pusb_dev->status = status; + } +- debug(" error during command %02X" \ ++printf(" error during command %02X" \ + " Stat = %lX\n", srb->cmd[0], + us->pusb_dev->status); + return result; + } + /* transfer the data payload for this command, if one exists*/ + +- debug("CB_transport: control msg returned %d," \ ++printf("CB_transport: control msg returned %d," \ + " direction is %s to go 0x%lx\n", result, + dir_in ? "IN" : "OUT", srb->datalen); + if (srb->datalen) { + result = us_one_transfer(us, pipe, (char *)srb->pdata, + srb->datalen); +- debug("CBI attempted to transfer data," \ ++printf("CBI attempted to transfer data," \ + " result is %d status %lX, len %d\n", + result, us->pusb_dev->status, + us->pusb_dev->act_len); +@@ -667,7 +667,7 @@ static int usb_stor_CBI_get_status(struct scsi_cmd *srb, struct us_data *us) + us->ip_wanted = 0; + return USB_STOR_TRANSPORT_ERROR; + } +- debug("Got interrupt data 0x%x, transferred %d status 0x%lX\n", ++printf("Got interrupt data 0x%x, transferred %d status 0x%lX\n", + us->ip_data, us->pusb_dev->irq_act_len, + us->pusb_dev->irq_status); + /* UFI gives us ASC and ASCQ, like a request sense */ +@@ -719,10 +719,10 @@ static int usb_stor_BBB_transport(struct scsi_cmd *srb, struct us_data *us) + dir_in = US_DIRECTION(srb->cmd[0]); + + /* COMMAND phase */ +- debug("COMMAND phase\n"); ++printf("COMMAND phase\n"); + result = usb_stor_BBB_comdat(srb, us); + if (result < 0) { +- debug("failed to send CBW status %ld\n", ++printf("failed to send CBW status %ld\n", + us->pusb_dev->status); + usb_stor_BBB_reset(us); + return USB_STOR_TRANSPORT_FAILED; +@@ -736,7 +736,7 @@ static int usb_stor_BBB_transport(struct scsi_cmd *srb, struct us_data *us) + /* no data, go immediately to the STATUS phase */ + if (srb->datalen == 0) + goto st; +- debug("DATA phase\n"); ++printf("DATA phase\n"); + if (dir_in) + pipe = pipein; + else +@@ -746,7 +746,7 @@ static int usb_stor_BBB_transport(struct scsi_cmd *srb, struct us_data *us) + &data_actlen, USB_CNTL_TIMEOUT * 5); + /* special handling of STALL in DATA phase */ + if ((result < 0) && (us->pusb_dev->status & USB_ST_STALLED)) { +- debug("DATA:stall\n"); ++printf("DATA:stall\n"); + /* clear the STALL on the endpoint */ + result = usb_stor_BBB_clear_endpt_stall(us, + dir_in ? us->ep_in : us->ep_out); +@@ -755,7 +755,7 @@ static int usb_stor_BBB_transport(struct scsi_cmd *srb, struct us_data *us) + goto st; + } + if (result < 0) { +- debug("usb_bulk_msg error status %ld\n", ++printf("usb_bulk_msg error status %ld\n", + us->pusb_dev->status); + usb_stor_BBB_reset(us); + return USB_STOR_TRANSPORT_FAILED; +@@ -769,14 +769,14 @@ static int usb_stor_BBB_transport(struct scsi_cmd *srb, struct us_data *us) + st: + retry = 0; + again: +- debug("STATUS phase\n"); ++printf("STATUS phase\n"); + result = usb_bulk_msg(us->pusb_dev, pipein, csw, UMASS_BBB_CSW_SIZE, + &actlen, USB_CNTL_TIMEOUT*5); + + /* special handling of STALL in STATUS phase */ + if ((result < 0) && (retry < 1) && + (us->pusb_dev->status & USB_ST_STALLED)) { +- debug("STATUS:stall\n"); ++printf("STATUS:stall\n"); + /* clear the STALL on the endpoint */ + result = usb_stor_BBB_clear_endpt_stall(us, us->ep_in); + if (result >= 0 && (retry++ < 1)) +@@ -784,7 +784,7 @@ again: + goto again; + } + if (result < 0) { +- debug("usb_bulk_msg error status %ld\n", ++printf("usb_bulk_msg error status %ld\n", + us->pusb_dev->status); + usb_stor_BBB_reset(us); + return USB_STOR_TRANSPORT_FAILED; +@@ -800,27 +800,27 @@ again: + if (pipe == 0 && srb->datalen != 0 && srb->datalen - data_actlen != 0) + pipe = srb->datalen - data_actlen; + if (CSWSIGNATURE != le32_to_cpu(csw->dCSWSignature)) { +- debug("!CSWSIGNATURE\n"); ++printf("!CSWSIGNATURE\n"); + usb_stor_BBB_reset(us); + return USB_STOR_TRANSPORT_FAILED; + } else if ((CBWTag - 1) != le32_to_cpu(csw->dCSWTag)) { +- debug("!Tag\n"); ++printf("!Tag\n"); + usb_stor_BBB_reset(us); + return USB_STOR_TRANSPORT_FAILED; + } else if (csw->bCSWStatus > CSWSTATUS_PHASE) { +- debug(">PHASE\n"); ++printf(">PHASE\n"); + usb_stor_BBB_reset(us); + return USB_STOR_TRANSPORT_FAILED; + } else if (csw->bCSWStatus == CSWSTATUS_PHASE) { +- debug("=PHASE\n"); ++printf("=PHASE\n"); + usb_stor_BBB_reset(us); + return USB_STOR_TRANSPORT_FAILED; + } else if (data_actlen > srb->datalen) { +- debug("transferred %dB instead of %ldB\n", ++printf("transferred %dB instead of %ldB\n", + data_actlen, srb->datalen); + return USB_STOR_TRANSPORT_FAILED; + } else if (csw->bCSWStatus == CSWSTATUS_FAILED) { +- debug("FAILED\n"); ++printf("FAILED\n"); + return USB_STOR_TRANSPORT_FAILED; + } + +@@ -841,14 +841,14 @@ static int usb_stor_CB_transport(struct scsi_cmd *srb, struct us_data *us) + /* issue the command */ + do_retry: + result = usb_stor_CB_comdat(srb, us); +- debug("command / Data returned %d, status %lX\n", ++printf("command / Data returned %d, status %lX\n", + result, us->pusb_dev->status); + /* if this is an CBI Protocol, get IRQ */ + if (us->protocol == US_PR_CBI) { + status = usb_stor_CBI_get_status(srb, us); + /* if the status is error, report it */ + if (status == USB_STOR_TRANSPORT_ERROR) { +- debug(" USB CBI Command Error\n"); ++printf(" USB CBI Command Error\n"); + return status; + } + srb->sense_buf[12] = (unsigned char)(us->ip_data >> 8); +@@ -856,7 +856,7 @@ do_retry: + if (!us->ip_data) { + /* if the status is good, report it */ + if (status == USB_STOR_TRANSPORT_GOOD) { +- debug(" USB CBI Command Good\n"); ++printf(" USB CBI Command Good\n"); + return status; + } + } +@@ -864,7 +864,7 @@ do_retry: + /* do we have to issue an auto request? */ + /* HERE we have to check the result */ + if ((result < 0) && !(us->pusb_dev->status & USB_ST_STALLED)) { +- debug("ERROR %lX\n", us->pusb_dev->status); ++printf("ERROR %lX\n", us->pusb_dev->status); + us->transport_reset(us); + return USB_STOR_TRANSPORT_ERROR; + } +@@ -872,7 +872,7 @@ do_retry: + ((srb->cmd[0] == SCSI_REQ_SENSE) || + (srb->cmd[0] == SCSI_INQUIRY))) { + /* do not issue an autorequest after request sense */ +- debug("No auto request and good\n"); ++printf("No auto request and good\n"); + return USB_STOR_TRANSPORT_GOOD; + } + /* issue an request_sense */ +@@ -885,17 +885,17 @@ do_retry: + psrb->cmdlen = 12; + /* issue the command */ + result = usb_stor_CB_comdat(psrb, us); +- debug("auto request returned %d\n", result); ++printf("auto request returned %d\n", result); + /* if this is an CBI Protocol, get IRQ */ + if (us->protocol == US_PR_CBI) + status = usb_stor_CBI_get_status(psrb, us); + + if ((result < 0) && !(us->pusb_dev->status & USB_ST_STALLED)) { +- debug(" AUTO REQUEST ERROR %ld\n", ++printf(" AUTO REQUEST ERROR %ld\n", + us->pusb_dev->status); + return USB_STOR_TRANSPORT_ERROR; + } +- debug("autorequest returned 0x%02X 0x%02X 0x%02X 0x%02X\n", ++printf("autorequest returned 0x%02X 0x%02X 0x%02X 0x%02X\n", + srb->sense_buf[0], srb->sense_buf[2], + srb->sense_buf[12], srb->sense_buf[13]); + /* Check the auto request result */ +@@ -985,7 +985,7 @@ static int usb_inquiry(struct scsi_cmd *srb, struct us_data *ss) + srb->datalen = 36; + srb->cmdlen = 12; + i = ss->transport(srb, ss); +- debug("inquiry returns %d\n", i); ++printf("inquiry returns %d\n", i); + if (i == 0) + break; + } while (--retry); +@@ -1010,7 +1010,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss) + srb->pdata = &srb->sense_buf[0]; + srb->cmdlen = 12; + ss->transport(srb, ss); +- debug("Request Sense returned %02X %02X %02X\n", ++printf("Request Sense returned %02X %02X %02X\n", + srb->sense_buf[2], srb->sense_buf[12], + srb->sense_buf[13]); + srb->pdata = (uchar *)ptr; +@@ -1079,7 +1079,7 @@ static int usb_read_10(struct scsi_cmd *srb, struct us_data *ss, + srb->cmd[7] = ((unsigned char) (blocks >> 8)) & 0xff; + srb->cmd[8] = (unsigned char) blocks & 0xff; + srb->cmdlen = 12; +- debug("read10: start %lx blocks %x\n", start, blocks); ++printf("read10: start %lx blocks %x\n", start, blocks); + return ss->transport(srb, ss); + } + +@@ -1096,7 +1096,7 @@ static int usb_write_10(struct scsi_cmd *srb, struct us_data *ss, + srb->cmd[7] = ((unsigned char) (blocks >> 8)) & 0xff; + srb->cmd[8] = (unsigned char) blocks & 0xff; + srb->cmdlen = 12; +- debug("write10: start %lx blocks %x\n", start, blocks); ++printf("write10: start %lx blocks %x\n", start, blocks); + return ss->transport(srb, ss); + } + +@@ -1149,12 +1149,12 @@ static unsigned long usb_stor_read(struct blk_desc *block_dev, lbaint_t blknr, + #if CONFIG_IS_ENABLED(BLK) + block_dev = dev_get_uclass_plat(dev); + udev = dev_get_parent_priv(dev_get_parent(dev)); +- debug("\nusb_read: udev %d\n", block_dev->devnum); ++printf("\nusb_read: udev %d\n", block_dev->devnum); + #else +- debug("\nusb_read: udev %d\n", block_dev->devnum); ++printf("\nusb_read: udev %d\n", block_dev->devnum); + udev = usb_dev_desc[block_dev->devnum].priv; + if (!udev) { +- debug("%s: No device\n", __func__); ++printf("%s: No device\n", __func__); + return 0; + } + #endif +@@ -1167,7 +1167,7 @@ static unsigned long usb_stor_read(struct blk_desc *block_dev, lbaint_t blknr, + start = blknr; + blks = blkcnt; + +- debug("\nusb_read: dev %d startblk " LBAF ", blccnt " LBAF " buffer %lx\n", ++printf("\nusb_read: dev %d startblk " LBAF ", blccnt " LBAF " buffer %lx\n", + block_dev->devnum, start, blks, buf_addr); + + do { +@@ -1184,7 +1184,7 @@ retry_it: + srb->datalen = block_dev->blksz * smallblks; + srb->pdata = (unsigned char *)buf_addr; + if (usb_read_10(srb, ss, start, smallblks)) { +- debug("Read ERROR\n"); ++printf("Read ERROR\n"); + ss->flags &= ~USB_READY; + usb_request_sense(srb, ss); + if (retry--) +@@ -1197,13 +1197,13 @@ retry_it: + buf_addr += srb->datalen; + } while (blks != 0); + +- debug("usb_read: end startblk " LBAF ", blccnt %x buffer %lx\n", ++printf("usb_read: end startblk " LBAF ", blccnt %x buffer %lx\n", + start, smallblks, buf_addr); + + usb_lock_async(udev, 0); + usb_disable_asynch(0); /* asynch transfer allowed */ + if (blkcnt >= ss->max_xfer_blk) +- debug("\n"); ++printf("\n"); + return blkcnt; + } + +@@ -1233,12 +1233,12 @@ static unsigned long usb_stor_write(struct blk_desc *block_dev, lbaint_t blknr, + #if CONFIG_IS_ENABLED(BLK) + block_dev = dev_get_uclass_plat(dev); + udev = dev_get_parent_priv(dev_get_parent(dev)); +- debug("\nusb_read: udev %d\n", block_dev->devnum); ++printf("\nusb_read: udev %d\n", block_dev->devnum); + #else +- debug("\nusb_read: udev %d\n", block_dev->devnum); ++printf("\nusb_read: udev %d\n", block_dev->devnum); + udev = usb_dev_desc[block_dev->devnum].priv; + if (!udev) { +- debug("%s: No device\n", __func__); ++printf("%s: No device\n", __func__); + return 0; + } + #endif +@@ -1252,7 +1252,7 @@ static unsigned long usb_stor_write(struct blk_desc *block_dev, lbaint_t blknr, + start = blknr; + blks = blkcnt; + +- debug("\nusb_write: dev %d startblk " LBAF ", blccnt " LBAF " buffer %lx\n", ++printf("\nusb_write: dev %d startblk " LBAF ", blccnt " LBAF " buffer %lx\n", + block_dev->devnum, start, blks, buf_addr); + + do { +@@ -1271,7 +1271,7 @@ retry_it: + srb->datalen = block_dev->blksz * smallblks; + srb->pdata = (unsigned char *)buf_addr; + if (usb_write_10(srb, ss, start, smallblks)) { +- debug("Write ERROR\n"); ++printf("Write ERROR\n"); + ss->flags &= ~USB_READY; + usb_request_sense(srb, ss); + if (retry--) +@@ -1284,13 +1284,13 @@ retry_it: + buf_addr += srb->datalen; + } while (blks != 0); + +- debug("usb_write: end startblk " LBAF ", blccnt %x buffer %lx\n", ++printf("usb_write: end startblk " LBAF ", blccnt %x buffer %lx\n", + start, smallblks, buf_addr); + + usb_lock_async(udev, 0); + usb_disable_asynch(0); /* asynch transfer allowed */ + if (blkcnt >= ss->max_xfer_blk) +- debug("\n"); ++printf("\n"); + return blkcnt; + + } +@@ -1311,7 +1311,7 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum, + iface->desc.bInterfaceClass != USB_CLASS_MASS_STORAGE || + iface->desc.bInterfaceSubClass < US_SC_MIN || + iface->desc.bInterfaceSubClass > US_SC_MAX) { +- debug("Not mass storage\n"); ++printf("Not mass storage\n"); + /* if it's not a mass storage, we go no further */ + return 0; + } +@@ -1319,7 +1319,7 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum, + memset(ss, 0, sizeof(struct us_data)); + + /* At this point, we know we've got a live one */ +- debug("\n\nUSB Mass Storage device detected\n"); ++printf("\n\nUSB Mass Storage device detected\n"); + + /* Initialize the us_data structure with some useful info */ + ss->flags = flags; +@@ -1330,21 +1330,21 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum, + ss->protocol = iface->desc.bInterfaceProtocol; + + /* set the handler pointers based on the protocol */ +- debug("Transport: "); ++printf("Transport: "); + switch (ss->protocol) { + case US_PR_CB: +- debug("Control/Bulk\n"); ++printf("Control/Bulk\n"); + ss->transport = usb_stor_CB_transport; + ss->transport_reset = usb_stor_CB_reset; + break; + + case US_PR_CBI: +- debug("Control/Bulk/Interrupt\n"); ++printf("Control/Bulk/Interrupt\n"); + ss->transport = usb_stor_CB_transport; + ss->transport_reset = usb_stor_CB_reset; + break; + case US_PR_BULK: +- debug("Bulk/Bulk/Bulk\n"); ++printf("Bulk/Bulk/Bulk\n"); + ss->transport = usb_stor_BBB_transport; + ss->transport_reset = usb_stor_BBB_reset; + break; +@@ -1381,14 +1381,14 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum, + ss->irqinterval = ep_desc->bInterval; + } + } +- debug("Endpoints In %d Out %d Int %d\n", ++printf("Endpoints In %d Out %d Int %d\n", + ss->ep_in, ss->ep_out, ss->ep_int); + + /* Do some basic sanity checks, and bail if we find a problem */ + if (usb_set_interface(dev, iface->desc.bInterfaceNumber, 0) || + !ss->ep_in || !ss->ep_out || + (ss->protocol == US_PR_CBI && ss->ep_int == 0)) { +- debug("Problems with device\n"); ++printf("Problems with device\n"); + return 0; + } + /* set class specific stuff */ +@@ -1431,10 +1431,10 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss, + + dev_desc->target = dev->devnum; + pccb->lun = dev_desc->lun; +- debug(" address %d\n", dev_desc->target); ++printf(" address %d\n", dev_desc->target); + + if (usb_inquiry(pccb, ss)) { +- debug("%s: usb_inquiry() failed\n", __func__); ++printf("%s: usb_inquiry() failed\n", __func__); + return -1; + } + +@@ -1446,7 +1446,7 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss, + * they would not respond to test_unit_ready . + */ + if (((perq & 0x1f) == 0x1f) || ((perq & 0x1f) == 0x0d)) { +- debug("%s: unknown/unsupported device\n", __func__); ++printf("%s: unknown/unsupported device\n", __func__); + return 0; + } + if ((modi&0x80) == 0x80) { +@@ -1463,7 +1463,7 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss, + usb_bin_fixup(dev->descriptor, (uchar *)dev_desc->vendor, + (uchar *)dev_desc->product); + #endif /* CONFIG_USB_BIN_FIXUP */ +- debug("ISO Vers %X, Response Data %X\n", usb_stor_buf[2], ++printf("ISO Vers %X, Response Data %X\n", usb_stor_buf[2], + usb_stor_buf[3]); + if (usb_test_unit_ready(pccb, ss)) { + printf("Device NOT ready\n" +@@ -1482,7 +1482,7 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss, + cap[0] = 2880; + cap[1] = 0x200; + } +- debug("Read Capacity returns: 0x%08x, 0x%08x\n", cap[0], cap[1]); ++printf("Read Capacity returns: 0x%08x, 0x%08x\n", cap[0], cap[1]); + #if 0 + if (cap[0] > (0x200000 * 10)) /* greater than 10 GByte */ + cap[0] >>= 16; +@@ -1494,12 +1494,12 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss, + capacity = be32_to_cpu(cap[0]) + 1; + blksz = be32_to_cpu(cap[1]); + +- debug("Capacity = 0x%08x, blocksz = 0x%08x\n", capacity, blksz); ++printf("Capacity = 0x%08x, blocksz = 0x%08x\n", capacity, blksz); + dev_desc->lba = capacity; + dev_desc->blksz = blksz; + dev_desc->log2blksz = LOG2(dev_desc->blksz); + dev_desc->type = perq; +- debug(" address %d\n", dev_desc->target); ++printf(" address %d\n", dev_desc->target); + + return 1; + } +diff --git a/disk/part.c b/disk/part.c +index 086da84b7..c7958d19e 100644 +--- a/disk/part.c ++++ b/disk/part.c +@@ -62,13 +62,13 @@ static struct blk_desc *get_dev_hwpart(const char *ifname, int dev, int hwpart) + + dev_desc = blk_get_devnum_by_typename(ifname, dev); + if (!dev_desc) { +- debug("%s: No device for iface '%s', dev %d\n", __func__, ++printf("%s: No device for iface '%s', dev %d\n", __func__, + ifname, dev); + return NULL; + } + ret = blk_dselect_hwpart(dev_desc, hwpart); + if (ret) { +- debug("%s: Failed to select h/w partition: err-%d\n", __func__, ++printf("%s: Failed to select h/w partition: err-%d\n", __func__, + ret); + return NULL; + } +@@ -246,7 +246,7 @@ void part_init(struct blk_desc *dev_desc) + int ret; + + ret = entry->test(dev_desc); +- debug("%s: try '%s': ret=%d\n", __func__, entry->name, ret); ++printf("%s: try '%s': ret=%d\n", __func__, entry->name, ret); + if (!ret) { + dev_desc->part_type = entry->part_type; + break; +@@ -340,7 +340,7 @@ int part_get_info(struct blk_desc *dev_desc, int part, + + drv = part_driver_lookup_type(dev_desc); + if (!drv) { +- debug("## Unknown partition table type %x\n", ++printf("## Unknown partition table type %x\n", + dev_desc->part_type); + return -EPROTONOSUPPORT; + } +@@ -416,7 +416,7 @@ int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str, + + *dev_desc = get_dev_hwpart(ifname, dev, hwpart); + if (!(*dev_desc) || ((*dev_desc)->type == DEV_TYPE_UNKNOWN)) { +- debug("** Bad device %s %s **\n", ifname, dev_hwpart_str); ++printf("** Bad device %s %s **\n", ifname, dev_hwpart_str); + dev = -ENODEV; + goto cleanup; + } +diff --git a/disk/part_efi.c b/disk/part_efi.c +index 0fb7ff0b6..dc5630059 100644 +--- a/disk/part_efi.c ++++ b/disk/part_efi.c +@@ -144,7 +144,7 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba, + return -1; + } + +- debug("GPT: first_usable_lba: %llX last_usable_lba: %llX last lba: " ++printf("GPT: first_usable_lba: %llX last_usable_lba: %llX last lba: " + LBAF "\n", le64_to_cpu(gpt_h->first_usable_lba), + le64_to_cpu(gpt_h->last_usable_lba), lastlba); + +@@ -228,7 +228,7 @@ void part_print_efi(struct blk_desc *dev_desc) + if (find_valid_gpt(dev_desc, gpt_head, &gpt_pte) != 1) + return; + +- debug("%s: gpt-entry at %p\n", __func__, gpt_pte); ++printf("%s: gpt-entry at %p\n", __func__, gpt_pte); + + printf("Part\tStart LBA\tEnd LBA\t\tName\n"); + printf("\tAttributes\n"); +@@ -281,7 +281,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part, + + if (part > le32_to_cpu(gpt_head->num_partition_entries) || + !is_pte_valid(&gpt_pte[part - 1])) { +- debug("%s: *** ERROR: Invalid partition number %d ***\n", ++printf("%s: *** ERROR: Invalid partition number %d ***\n", + __func__, part); + free(gpt_pte); + return -1; +@@ -307,7 +307,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part, + info->type_guid, UUID_STR_FORMAT_GUID); + #endif + +- debug("%s: start 0x" LBAF ", size 0x" LBAF ", name %s\n", __func__, ++printf("%s: start 0x" LBAF ", size 0x" LBAF ", name %s\n", __func__, + info->start, info->size, info->name); + + /* Remember to free pte */ +@@ -375,7 +375,7 @@ int write_gpt_table(struct blk_desc *dev_desc, + * sizeof(gpt_entry)), dev_desc); + u32 calc_crc32; + +- debug("max lba: %x\n", (u32) dev_desc->lba); ++printf("max lba: %x\n", (u32) dev_desc->lba); + /* Setup the Protective MBR */ + if (set_protective_mbr(dev_desc) < 0) + goto err; +@@ -408,7 +408,7 @@ int write_gpt_table(struct blk_desc *dev_desc, + gpt_h) != 1) + goto err; + +- debug("GPT successfully written to block device!\n"); ++printf("GPT successfully written to block device!\n"); + return 0; + + err: +@@ -527,7 +527,7 @@ int gpt_fill_pte(struct blk_desc *dev_desc, + gpt_e[i].partition_name[k] = + (efi_char16_t)(partitions[i].name[k]); + +- debug("%s: name: %s offset[%d]: 0x" LBAF ++printf("%s: name: %s offset[%d]: 0x" LBAF + " size[%d]: 0x" LBAF "\n", + __func__, partitions[i].name, i, + offset, i, size); +@@ -571,7 +571,7 @@ static uint32_t partition_entries_offset(struct blk_desc *dev_desc) + } + #endif + +- debug("efi: partition entries offset (in blocks): %d\n", offset_blks); ++printf("efi: partition entries offset (in blocks): %d\n", offset_blks); + + /* + * The earliest LBA this can be at is LBA#2 (i.e. right behind +@@ -736,7 +736,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc, + gpt_convert_efi_name_to_char(efi_str, gpt_e[i].partition_name, + PARTNAME_SZ + 1); + +- debug("%s: part: %2d name - GPT: %16s, ENV: %16s ", ++printf("%s: part: %2d name - GPT: %16s, ENV: %16s ", + __func__, i, efi_str, partitions[i].name); + + if (strncmp(efi_str, (char *)partitions[i].name, +@@ -749,7 +749,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc, + /* Check if GPT and ENV sizes match */ + gpt_part_size = le64_to_cpu(gpt_e[i].ending_lba) - + le64_to_cpu(gpt_e[i].starting_lba) + 1; +- debug("size(LBA) - GPT: %8llu, ENV: %8llu ", ++printf("size(LBA) - GPT: %8llu, ENV: %8llu ", + (unsigned long long)gpt_part_size, + (unsigned long long)partitions[i].size); + +@@ -769,12 +769,12 @@ int gpt_verify_partitions(struct blk_desc *dev_desc, + * in '$partition' variable + */ + if (!partitions[i].start) { +- debug("\n"); ++printf("\n"); + continue; + } + + /* Check if GPT and ENV start LBAs match */ +- debug("start LBA - GPT: %8llu, ENV: %8llu\n", ++printf("start LBA - GPT: %8llu, ENV: %8llu\n", + le64_to_cpu(gpt_e[i].starting_lba), + (unsigned long long)partitions[i].start); + +@@ -960,7 +960,7 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba, + + /* Invalid but nothing to yell about. */ + if (le64_to_cpu(pgpt_head->signature) == GPT_HEADER_CHROMEOS_IGNORE) { +- debug("ChromeOS 'IGNOREME' GPT header found and ignored\n"); ++printf("ChromeOS 'IGNOREME' GPT header found and ignored\n"); + return 2; + } + +@@ -1053,7 +1053,7 @@ static gpt_entry *alloc_read_gpt_entries(struct blk_desc *dev_desc, + count = le32_to_cpu(pgpt_head->num_partition_entries) * + le32_to_cpu(pgpt_head->sizeof_partition_entry); + +- debug("%s: count = %u * %u = %lu\n", __func__, ++printf("%s: count = %u * %u = %lu\n", __func__, + (u32) le32_to_cpu(pgpt_head->num_partition_entries), + (u32) le32_to_cpu(pgpt_head->sizeof_partition_entry), + (ulong)count); +@@ -1104,7 +1104,7 @@ static int is_pte_valid(gpt_entry * pte) + if (memcmp(pte->partition_type_guid.b, unused_guid.b, + sizeof(unused_guid.b)) == 0) { + +- debug("%s: Found an unused PTE GUID at 0x%08X\n", __func__, ++printf("%s: Found an unused PTE GUID at 0x%08X\n", __func__, + (unsigned int)(uintptr_t)pte); + + return 0; +diff --git a/disk/part_mac.c b/disk/part_mac.c +index e01ae7456..75a990f0a 100644 +--- a/disk/part_mac.c ++++ b/disk/part_mac.c +@@ -160,7 +160,7 @@ static int part_mac_read_ddb(struct blk_desc *dev_desc, + mac_driver_desc_t *ddb_p) + { + if (blk_dread(dev_desc, 0, 1, (ulong *)ddb_p) != 1) { +- debug("** Can't read Driver Descriptor Block **\n"); ++printf("** Can't read Driver Descriptor Block **\n"); + return (-1); + } + +diff --git a/doc/develop/driver-model/fs_firmware_loader.rst b/doc/develop/driver-model/fs_firmware_loader.rst +index a44708cb4..d4df88131 100644 +--- a/doc/develop/driver-model/fs_firmware_loader.rst ++++ b/doc/develop/driver-model/fs_firmware_loader.rst +@@ -76,13 +76,13 @@ For example of getting DT phandle from /chosen and creating instance: + + chosen_node = ofnode_path("/chosen"); + if (!ofnode_valid(chosen_node)) { +- debug("/chosen node was not found.\n"); ++printf("/chosen node was not found.\n"); + return -ENOENT; + } + + phandle_p = ofnode_get_property(chosen_node, "firmware-loader", &size); + if (!phandle_p) { +- debug("firmware-loader property was not found.\n"); ++printf("firmware-loader property was not found.\n"); + return -ENOENT; + } + +diff --git a/doc/develop/driver-model/spi-howto.rst b/doc/develop/driver-model/spi-howto.rst +index 97fbf750c..dddbbb0f9 100644 +--- a/doc/develop/driver-model/spi-howto.rst ++++ b/doc/develop/driver-model/spi-howto.rst +@@ -249,7 +249,7 @@ fills in the fields from device tree. + plat->periph_id = pinmux_decode_periph_id(blob, node); + + if (plat->periph_id == PERIPH_ID_NONE) { +- debug("%s: Invalid peripheral ID %d\n", __func__, ++printf("%s: Invalid peripheral ID %d\n", __func__, + plat->periph_id); + return -FDT_ERR_NOTFOUND; + } +@@ -259,7 +259,7 @@ fills in the fields from device tree. + 500000); + plat->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); +- debug("%s: regs=%p, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", ++printf("%s: regs=%p, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->regs, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); + +@@ -403,7 +403,7 @@ of the following functions, so let's look at that function: + ret = set_spi_clk(spi_slave->periph_id, + spi_slave->freq); + if (ret < 0) { +- debug("%s: Failed to setup spi clock\n", __func__); ++printf("%s: Failed to setup spi clock\n", __func__); + return ret; + } + +@@ -447,7 +447,7 @@ Here is an example for the speed part: + if (ret) + return ret; + priv->freq = speed; +- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); ++printf("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; + } +@@ -477,7 +477,7 @@ comes from the old spi_claim_bus(). Here is an example: + + writel(reg, &priv->regs->ch_cfg); + priv->mode = mode; +- debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); ++printf("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; + } +@@ -574,7 +574,7 @@ activate function, something like this: + } + + clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); +- debug("Activate CS, bus %d\n", spi_slave->slave.bus); ++printf("Activate CS, bus %d\n", spi_slave->slave.bus); + spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE; + } + +@@ -598,7 +598,7 @@ The new version looks like this: + } + + clrbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT); +- debug("Activate CS, bus '%s'\n", bus->name); ++printf("Activate CS, bus '%s'\n", bus->name); + priv->skip_preamble = priv->mode & SPI_PREAMBLE; + } + +diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c +index d4047c04f..36fe23621 100644 +--- a/drivers/ata/ahci.c ++++ b/drivers/ata/ahci.c +@@ -69,7 +69,7 @@ static void ahci_dcache_flush_range(unsigned long begin, unsigned long len) + const unsigned long start = begin; + const unsigned long end = start + len; + +- debug("%s: flush dcache: [%#lx, %#lx)\n", __func__, start, end); ++printf("%s: flush dcache: [%#lx, %#lx)\n", __func__, start, end); + flush_dcache_range(start, end); + } + +@@ -83,7 +83,7 @@ static void ahci_dcache_invalidate_range(unsigned long begin, unsigned long len) + const unsigned long start = begin; + const unsigned long end = start + len; + +- debug("%s: invalidate dcache: [%#lx, %#lx)\n", __func__, start, end); ++printf("%s: invalidate dcache: [%#lx, %#lx)\n", __func__, start, end); + invalidate_dcache_range(start, end); + } + +@@ -185,7 +185,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + void __iomem *port_mmio; + u32 port_map; + +- debug("ahci_host_init: start\n"); ++printf("ahci_host_init: start\n"); + + cap_save = readl(mmio + HOST_CAP); + cap_save &= ((1 << 28) | (1 << 17)); +@@ -223,7 +223,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + port_map = uc_priv->port_map; + uc_priv->n_ports = (uc_priv->cap & 0x1f) + 1; + +- debug("cap 0x%x port_map 0x%x n_ports %d\n", ++printf("cap 0x%x port_map 0x%x n_ports %d\n", + uc_priv->cap, uc_priv->port_map, uc_priv->n_ports); + + #if !defined(CONFIG_DM_SCSI) +@@ -241,7 +241,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + tmp = readl(port_mmio + PORT_CMD); + if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON | + PORT_CMD_FIS_RX | PORT_CMD_START)) { +- debug("Port %d is active. Deactivating.\n", i); ++printf("Port %d is active. Deactivating.\n", i); + tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON | + PORT_CMD_FIS_RX | PORT_CMD_START); + writel_with_flush(tmp, port_mmio + PORT_CMD); +@@ -269,7 +269,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + printf("SATA link %d timeout.\n", i); + continue; + } else { +- debug("SATA link ok.\n"); ++printf("SATA link ok.\n"); + } + + /* Clear error status */ +@@ -277,7 +277,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + if (tmp) + writel(tmp, port_mmio + PORT_SCR_ERR); + +- debug("Spinning up device on SATA port %d... ", i); ++printf("Spinning up device on SATA port %d... ", i); + + j = 0; + while (j < WAIT_MS_SPINUP) { +@@ -294,24 +294,24 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + + tmp = readl(port_mmio + PORT_SCR_STAT) & PORT_SCR_STAT_DET_MASK; + if (tmp == PORT_SCR_STAT_DET_COMINIT) { +- debug("SATA link %d down (COMINIT received), retrying...\n", i); ++printf("SATA link %d down (COMINIT received), retrying...\n", i); + i--; + continue; + } + + printf("Target spinup took %d ms.\n", j); + if (j == WAIT_MS_SPINUP) +- debug("timeout.\n"); ++printf("timeout.\n"); + else +- debug("ok.\n"); ++printf("ok.\n"); + + tmp = readl(port_mmio + PORT_SCR_ERR); +- debug("PORT_SCR_ERR 0x%x\n", tmp); ++printf("PORT_SCR_ERR 0x%x\n", tmp); + writel(tmp, port_mmio + PORT_SCR_ERR); + + /* ack any pending irq events for this port */ + tmp = readl(port_mmio + PORT_IRQ_STAT); +- debug("PORT_IRQ_STAT 0x%x\n", tmp); ++printf("PORT_IRQ_STAT 0x%x\n", tmp); + if (tmp) + writel(tmp, port_mmio + PORT_IRQ_STAT); + +@@ -319,16 +319,16 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + + /* register linkup ports */ + tmp = readl(port_mmio + PORT_SCR_STAT); +- debug("SATA port %d status: 0x%x\n", i, tmp); ++printf("SATA port %d status: 0x%x\n", i, tmp); + if ((tmp & PORT_SCR_STAT_DET_MASK) == PORT_SCR_STAT_DET_PHYRDY) + uc_priv->link_port_map |= (0x01 << i); + } + + tmp = readl(mmio + HOST_CTL); +- debug("HOST_CTL 0x%x\n", tmp); ++printf("HOST_CTL 0x%x\n", tmp); + writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL); + tmp = readl(mmio + HOST_CTL); +- debug("HOST_CTL 0x%x\n", tmp); ++printf("HOST_CTL 0x%x\n", tmp); + #if !defined(CONFIG_DM_SCSI) + #ifndef CONFIG_SCSI_AHCI_PLAT + # ifdef CONFIG_DM_PCI +@@ -478,7 +478,7 @@ static int ahci_init_one(struct ahci_uc_priv *uc_priv, pci_dev_t dev) + uc_priv->mmio_base = (void *)plat->base; + #endif + +- debug("ahci mmio_base=0x%p\n", uc_priv->mmio_base); ++printf("ahci mmio_base=0x%p\n", uc_priv->mmio_base); + /* initialize adapter */ + rc = ahci_host_init(uc_priv); + if (rc) +@@ -564,9 +564,9 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) + u32 port_status; + void __iomem *mem; + +- debug("Enter start port: %d\n", port); ++printf("Enter start port: %d\n", port); + port_status = readl(port_mmio + PORT_SCR_STAT); +- debug("Port %d status: %x\n", port, port_status); ++printf("Port %d status: %x\n", port, port_status); + if ((port_status & 0xf) != 0x03) { + printf("No Link on this port!\n"); + return -1; +@@ -586,7 +586,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) + */ + pp->cmd_slot = + (struct ahci_cmd_hdr *)(uintptr_t)virt_to_phys((void *)mem); +- debug("cmd_slot = %p\n", pp->cmd_slot); ++printf("cmd_slot = %p\n", pp->cmd_slot); + mem += (AHCI_CMD_SLOT_SZ + 224); + + /* +@@ -600,7 +600,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) + * and its scatter-gather table + */ + pp->cmd_tbl = virt_to_phys((void *)mem); +- debug("cmd_tbl_dma = %lx\n", pp->cmd_tbl); ++printf("cmd_tbl_dma = %lx\n", pp->cmd_tbl); + + mem += AHCI_CMD_TBL_HDR; + pp->cmd_tbl_sg = +@@ -621,7 +621,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) + PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP | + PORT_CMD_START, port_mmio + PORT_CMD); + +- debug("Exit start port %d\n", port); ++printf("Exit start port %d\n", port); + + /* + * Make sure interface is not busy based on error and status +@@ -641,7 +641,7 @@ static int ahci_device_data_io(struct ahci_uc_priv *uc_priv, u8 port, u8 *fis, + u32 port_status; + int sg_count; + +- debug("Enter %s: for port %d\n", __func__, port); ++printf("Enter %s: for port %d\n", __func__, port); + + if (port > uc_priv->n_ports) { + printf("Invalid port number %d\n", port); +@@ -650,7 +650,7 @@ static int ahci_device_data_io(struct ahci_uc_priv *uc_priv, u8 port, u8 *fis, + + port_status = readl(port_mmio + PORT_SCR_STAT); + if ((port_status & 0xf) != 0x03) { +- debug("No Link on port %d!\n", port); ++printf("No Link on port %d!\n", port); + return -1; + } + +@@ -673,7 +673,7 @@ static int ahci_device_data_io(struct ahci_uc_priv *uc_priv, u8 port, u8 *fis, + + ahci_dcache_invalidate_range((unsigned long)buf, + (unsigned long)buf_len); +- debug("%s: %d byte transferred.\n", __func__, ++printf("%s: %d byte transferred.\n", __func__, + le32_to_cpu(pp->cmd_slot->status)); + + return 0; +@@ -724,7 +724,7 @@ static int ata_scsiop_inquiry(struct ahci_uc_priv *uc_priv, + + if (ahci_device_data_io(uc_priv, port, (u8 *)&fis, sizeof(fis), + (u8 *)tmpid, ATA_ID_WORDS * 2, 0)) { +- debug("scsi_ahci: SCSI inquiry command failure.\n"); ++printf("scsi_ahci: SCSI inquiry command failure.\n"); + return -EIO; + } + +@@ -790,7 +790,7 @@ static int ata_scsiop_read_write(struct ahci_uc_priv *uc_priv, + else + blocks = (((u16)pccb->cmd[7]) << 8) | ((u16) pccb->cmd[8]); + +- debug("scsi_ahci: %s %u blocks starting from lba 0x" LBAFU "\n", ++printf("scsi_ahci: %s %u blocks starting from lba 0x" LBAFU "\n", + is_write ? "write" : "read", blocks, lba); + + /* Preset the FIS */ +@@ -839,7 +839,7 @@ static int ata_scsiop_read_write(struct ahci_uc_priv *uc_priv, + if (ahci_device_data_io(uc_priv, pccb->target, (u8 *)&fis, + sizeof(fis), user_buffer, transfer_size, + is_write)) { +- debug("scsi_ahci: SCSI %s10 command failure.\n", ++printf("scsi_ahci: SCSI %s10 command failure.\n", + is_write ? "WRITE" : "READ"); + return -EIO; + } +@@ -968,7 +968,7 @@ static int ahci_scsi_exec(struct udevice *dev, struct scsi_cmd *pccb) + } + + if (ret) { +- debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret); ++printf("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret); + return ret; + } + return 0; +@@ -1131,7 +1131,7 @@ static int ata_io_flush(struct ahci_uc_priv *uc_priv, u8 port) + + if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, + WAIT_MS_FLUSH, 0x1)) { +- debug("scsi_ahci: flush command timeout on port %d.\n", port); ++printf("scsi_ahci: flush command timeout on port %d.\n", port); + return -EIO; + } + +diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c +index f05150d61..6f76ef4bc 100644 +--- a/drivers/ata/ahci_mvebu.c ++++ b/drivers/ata/ahci_mvebu.c +@@ -24,7 +24,7 @@ static int mvebu_ahci_bind(struct udevice *dev) + + ret = ahci_bind_scsi(dev, &scsi_dev); + if (ret) { +- debug("%s: Failed to bind (err=%d\n)", __func__, ret); ++printf("%s: Failed to bind (err=%d\n)", __func__, ret); + return ret; + } + +diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c +index 94a3379c5..d7e55e0a9 100644 +--- a/drivers/ata/ahci_sunxi.c ++++ b/drivers/ata/ahci_sunxi.c +@@ -80,18 +80,18 @@ static int sunxi_sata_probe(struct udevice *dev) + + base = dev_read_addr(dev); + if (base == FDT_ADDR_T_NONE) { +- debug("%s: Failed to find address\n", __func__); ++printf("%s: Failed to find address\n", __func__); + return -EINVAL; + } + reg = (u8 *)base; + ret = sunxi_ahci_phy_init(reg); + if (ret) { +- debug("%s: Failed to init phy (err=%d)\n", __func__, ret); ++printf("%s: Failed to init phy (err=%d)\n", __func__, ret); + return ret; + } + ret = ahci_probe_scsi(dev, base); + if (ret) { +- debug("%s: Failed to probe (err=%d)\n", __func__, ret); ++printf("%s: Failed to probe (err=%d)\n", __func__, ret); + return ret; + } + +@@ -105,7 +105,7 @@ static int sunxi_sata_bind(struct udevice *dev) + + ret = ahci_bind_scsi(dev, &scsi_dev); + if (ret) { +- debug("%s: Failed to bind (err=%d)\n", __func__, ret); ++printf("%s: Failed to bind (err=%d)\n", __func__, ret); + return ret; + } + +diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c +index 6d4254808..ac5e0b424 100644 +--- a/drivers/ata/dwc_ahsata.c ++++ b/drivers/ata/dwc_ahsata.c +@@ -136,7 +136,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + ; + + if (timeout <= 0) { +- debug("controller reset failed (0x%x)\n", tmp); ++printf("controller reset failed (0x%x)\n", tmp); + return -1; + } + +@@ -162,7 +162,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + /* Determine how many command slots the HBA supports */ + uc_priv->n_ports = (uc_priv->cap & SATA_HOST_CAP_NP_MASK) + 1; + +- debug("cap 0x%x port_map 0x%x n_ports %d\n", ++printf("cap 0x%x port_map 0x%x n_ports %d\n", + uc_priv->cap, uc_priv->port_map, uc_priv->n_ports); + + for (i = 0; i < uc_priv->n_ports; i++) { +@@ -199,7 +199,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + ; + + if (timeout <= 0) { +- debug("port reset failed (0x%x)\n", tmp); ++printf("port reset failed (0x%x)\n", tmp); + return -1; + } + } +@@ -214,7 +214,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + && --timeout) + ; + if (timeout <= 0) { +- debug("Spin-Up can't finish!\n"); ++printf("Spin-Up can't finish!\n"); + return -1; + } + +@@ -232,7 +232,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + && --timeout) + ; + if (timeout <= 0) { +- debug("Can't find DIAG_X set!\n"); ++printf("Can't find DIAG_X set!\n"); + return -1; + } + +@@ -242,13 +242,13 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + * bit location. + */ + tmp = readl(&port_mmio->serr); +- debug("P#SERR 0x%x\n", ++printf("P#SERR 0x%x\n", + tmp); + writel(tmp, &port_mmio->serr); + + /* Ack any pending irq events for this port */ + tmp = readl(&host_mmio->is); +- debug("IS 0x%x\n", tmp); ++printf("IS 0x%x\n", tmp); + if (tmp) + writel(tmp, &host_mmio->is); + +@@ -259,16 +259,16 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv) + + /* register linkup ports */ + tmp = readl(&port_mmio->ssts); +- debug("Port %d status: 0x%x\n", i, tmp); ++printf("Port %d status: 0x%x\n", i, tmp); + if ((tmp & SATA_PORT_SSTS_DET_MASK) == 0x03) + uc_priv->link_port_map |= (0x01 << i); + } + + tmp = readl(&host_mmio->ghc); +- debug("GHC 0x%x\n", tmp); ++printf("GHC 0x%x\n", tmp); + writel(tmp | SATA_HOST_GHC_IE, &host_mmio->ghc); + tmp = readl(&host_mmio->ghc); +- debug("GHC 0x%x\n", tmp); ++printf("GHC 0x%x\n", tmp); + + return 0; + } +@@ -414,7 +414,7 @@ static int ahci_exec_ata_cmd(struct ahci_uc_priv *uc_priv, u8 port, + } + invalidate_dcache_range((int)(pp->cmd_slot), + (int)(pp->cmd_slot)+AHCI_PORT_PRIV_DMA_SZ); +- debug("ahci_exec_ata_cmd: %d byte transferred.\n", ++printf("ahci_exec_ata_cmd: %d byte transferred.\n", + pp->cmd_slot->status); + if (!is_write) + invalidate_dcache_range((ulong)buf, (ulong)buf+buf_len); +@@ -445,9 +445,9 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) + u32 mem; + int timeout = 10000000; + +- debug("Enter start port: %d\n", port); ++printf("Enter start port: %d\n", port); + port_status = readl(&port_mmio->ssts); +- debug("Port %d status: %x\n", port, port_status); ++printf("Port %d status: %x\n", port, port_status); + if ((port_status & 0xf) != 0x03) { + printf("No Link on this port!\n"); + return -1; +@@ -467,7 +467,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) + * 32 bytes each in size + */ + pp->cmd_slot = (struct ahci_cmd_hdr *)mem; +- debug("cmd_slot = 0x%x\n", (unsigned int) pp->cmd_slot); ++printf("cmd_slot = 0x%x\n", (unsigned int) pp->cmd_slot); + mem += (AHCI_CMD_SLOT_SZ * DWC_AHSATA_MAX_CMD_SLOTS); + + /* +@@ -481,7 +481,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) + * and its scatter-gather table + */ + pp->cmd_tbl = mem; +- debug("cmd_tbl_dma = 0x%lx\n", pp->cmd_tbl); ++printf("cmd_tbl_dma = 0x%lx\n", pp->cmd_tbl); + + mem += AHCI_CMD_TBL_HDR; + +@@ -500,7 +500,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) + && --timeout) + ; + if (timeout <= 0) { +- debug("Device not ready for BSY, DRQ and" ++printf("Device not ready for BSY, DRQ and" + "ERR in TFD!\n"); + return -1; + } +@@ -509,7 +509,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) + PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP | + PORT_CMD_START, &port_mmio->cmd); + +- debug("Exit start port %d\n", port); ++printf("Exit start port %d\n", port); + + return 0; + } +@@ -543,7 +543,7 @@ static void dwc_ahsata_xfer_mode(struct ahci_uc_priv *uc_priv, u16 *id) + { + uc_priv->pio_mask = id[ATA_ID_PIO_MODES]; + uc_priv->udma_mask = id[ATA_ID_UDMA_MODES]; +- debug("pio %04x, udma %04x\n\r", uc_priv->pio_mask, uc_priv->udma_mask); ++printf("pio %04x, udma %04x\n\r", uc_priv->pio_mask, uc_priv->udma_mask); + } + + static u32 dwc_ahsata_rw_cmd(struct ahci_uc_priv *uc_priv, u32 start, +@@ -782,7 +782,7 @@ static int dwc_ahsata_scan_common(struct ahci_uc_priv *uc_priv, + /* Check if support LBA48 */ + if (ata_id_has_lba48(id)) { + pdev->lba48 = 1; +- debug("Device support LBA48\n\r"); ++printf("Device support LBA48\n\r"); + } + + /* Get the NCQ queue depth from device */ +@@ -1014,7 +1014,7 @@ int dwc_ahsata_scan(struct udevice *dev) + ret = blk_create_devicef(dev, "dwc_ahsata_blk", "blk", + IF_TYPE_SATA, -1, 512, 0, &blk); + if (ret) { +- debug("Can't create device\n"); ++printf("Can't create device\n"); + return ret; + } + } +@@ -1022,7 +1022,7 @@ int dwc_ahsata_scan(struct udevice *dev) + desc = dev_get_uclass_plat(blk); + ret = dwc_ahsata_scan_common(uc_priv, desc); + if (ret) { +- debug("%s: Failed to scan bus\n", __func__); ++printf("%s: Failed to scan bus\n", __func__); + return ret; + } + +diff --git a/drivers/ata/fsl_sata.c b/drivers/ata/fsl_sata.c +index e44db0a37..fe3189d6b 100644 +--- a/drivers/ata/fsl_sata.c ++++ b/drivers/ata/fsl_sata.c +@@ -259,7 +259,7 @@ static int init_sata(struct fsl_ata_priv *priv, int dev) + + if (val32 & HSTATUS_SIGNATURE) { + sig = in_le32(®->sig); +- debug("Signature updated, the sig =%08x\n\r", sig); ++printf("Signature updated, the sig =%08x\n\r", sig); + sata->ata_device_type = ata_dev_classify(sig); + } + +@@ -372,18 +372,18 @@ static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis + if (!len) + break; + prde->dba = cpu_to_le32((u32)buffer & ~0x3); +- debug("dba = %08x\n\r", (u32)buffer); ++printf("dba = %08x\n\r", (u32)buffer); + + if (len < PRD_ENTRY_MAX_XFER_SZ) { + ext_c_ddc = PRD_ENTRY_DATA_SNOOP | len; +- debug("ext_c_ddc1 = %08x, len = %08x\n\r", ext_c_ddc, len); ++printf("ext_c_ddc1 = %08x, len = %08x\n\r", ext_c_ddc, len); + prde->ext_c_ddc = cpu_to_le32(ext_c_ddc); + prde_count++; + prde++; + break; + } else { + ext_c_ddc = PRD_ENTRY_DATA_SNOOP; /* 4M bytes */ +- debug("ext_c_ddc2 = %08x, len = %08x\n\r", ext_c_ddc, len); ++printf("ext_c_ddc2 = %08x, len = %08x\n\r", ext_c_ddc, len); + prde->ext_c_ddc = cpu_to_le32(ext_c_ddc); + buffer += PRD_ENTRY_MAX_XFER_SZ; + len -= PRD_ENTRY_MAX_XFER_SZ; +@@ -412,7 +412,7 @@ static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis + tag &= CMD_HDR_ATTR_TAG; + val32 |= tag; + +- debug("attribute = %08x\n\r", val32); ++printf("attribute = %08x\n\r", val32); + cmd_hdr->attribute = cpu_to_le32(val32); + + /* Make sure cmd desc and cmd slot valid before command issue */ +@@ -502,7 +502,7 @@ static void fsl_sata_xfer_mode(fsl_sata_t *sata, u16 *id) + sata->pio = id[ATA_ID_PIO_MODES]; + sata->mwdma = id[ATA_ID_MWDMA_MODES]; + sata->udma = id[ATA_ID_UDMA_MODES]; +- debug("pio %04x, mwdma %04x, udma %04x\n\r", sata->pio, sata->mwdma, sata->udma); ++printf("pio %04x, mwdma %04x, udma %04x\n\r", sata->pio, sata->mwdma, sata->udma); + } + + static void fsl_sata_set_features(fsl_sata_t *sata) +@@ -519,7 +519,7 @@ static void fsl_sata_set_features(fsl_sata_t *sata) + + /* First check the device capablity */ + udma_cap = (u8)(sata->udma & 0xff); +- debug("udma_cap %02x\n\r", udma_cap); ++printf("udma_cap %02x\n\r", udma_cap); + + if (udma_cap == ATA_UDMA6) + cfis->sector_count = XFER_UDMA_6; +@@ -848,9 +848,9 @@ static int scan_sata(struct udevice *dev) + /* Check if support LBA48 */ + if (ata_id_has_lba48(id)) { + sata->lba48 = 1; +- debug("Device support LBA48\n\r"); ++printf("Device support LBA48\n\r"); + } else +- debug("Device supports LBA28\n\r"); ++printf("Device supports LBA28\n\r"); + #endif + + #if !CONFIG_IS_ENABLED(BLK) +@@ -953,14 +953,14 @@ static int fsl_ata_probe(struct udevice *dev) + ret = blk_create_devicef(dev, "sata_fsl_blk", sata_name, + IF_TYPE_SATA, -1, 512, 0, &blk); + if (ret) { +- debug("Can't create device\n"); ++printf("Can't create device\n"); + return ret; + } + + /* Init SATA port */ + ret = init_sata(priv, i); + if (ret) { +- debug("%s: Failed to init sata\n", __func__); ++printf("%s: Failed to init sata\n", __func__); + ret = fsl_unbind_device(blk); + if (ret) + return ret; +@@ -974,7 +974,7 @@ static int fsl_ata_probe(struct udevice *dev) + /* Scan SATA port */ + ret = scan_sata(blk); + if (ret) { +- debug("%s: Failed to scan bus\n", __func__); ++printf("%s: Failed to scan bus\n", __func__); + ret = fsl_unbind_device(blk); + if (ret) + return ret; +diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c +index 87e6a90f7..41cb161b1 100644 +--- a/drivers/ata/sata_ceva.c ++++ b/drivers/ata/sata_ceva.c +@@ -220,7 +220,7 @@ static int sata_ceva_of_to_plat(struct udevice *dev) + + priv->soc = dev_get_driver_data(dev); + +- debug("ccsr-sata-base %lx\t ecc-base %lx\n", ++printf("ccsr-sata-base %lx\t ecc-base %lx\n", + priv->base, + priv->ecc_base); + +diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c +index 1012cb537..92a3622c1 100644 +--- a/drivers/ata/sata_mv.c ++++ b/drivers/ata/sata_mv.c +@@ -301,12 +301,12 @@ static int mv_stop_edma_engine(struct udevice *dev, int port) + for (i = 10000; i > 0; i--) { + u32 reg = in_le32(priv->regbase + EDMA_CMD); + if (!(reg & EDMA_CMD_ENEDMA)) { +- debug("EDMA stop on port %d succesful\n", port); ++printf("EDMA stop on port %d succesful\n", port); + return 0; + } + udelay(10); + } +- debug("EDMA stop on port %d failed\n", port); ++printf("EDMA stop on port %d failed\n", port); + return -1; + } + +@@ -409,7 +409,7 @@ static int probe_port(struct udevice *dev, int port) + int tries, tries2, set15 = 0; + u32 tmp; + +- debug("Probe port: %d\n", port); ++printf("Probe port: %d\n", port); + + for (tries = 0; tries < 2; tries++) { + /* Clear SError */ +@@ -436,20 +436,20 @@ static int probe_port(struct udevice *dev, int port) + for (tries2 = 0; tries2 < 200; tries2++) { + tmp = in_le32(priv->regbase + SIR_SSTATUS); + if ((tmp & SSTATUS_DET_MASK) == 0x03) { +- debug("Found device on port\n"); ++printf("Found device on port\n"); + return 0; + } + mdelay(1); + } + + if ((tmp & SSTATUS_DET_MASK) == 0) { +- debug("No device attached on port %d\n", port); ++printf("No device attached on port %d\n", port); + return -ENODEV; + } + + if (!set15) { + /* Try on 1.5Gb/S */ +- debug("Try 1.5Gb link\n"); ++printf("Try 1.5Gb link\n"); + set15 = 1; + out_le32(priv->regbase + SIR_SCONTROL, 0x304); + +@@ -461,7 +461,7 @@ static int probe_port(struct udevice *dev, int port) + } + } + +- debug("Failed to probe port\n"); ++printf("Failed to probe port\n"); + return -1; + } + +@@ -569,7 +569,7 @@ static void process_responses(struct udevice *dev, int port) + + while (get_rspip(dev, port) != outind) { + #ifdef DEBUG +- debug("Response index %d flags %08x on port %d\n", outind, ++printf("Response index %d flags %08x on port %d\n", outind, + priv->response[outind].flags, port); + #endif + outind = get_next_rspop(dev, port); +@@ -733,7 +733,7 @@ static u32 ata_low_level_rw(struct udevice *dev, int port, lbaint_t blknr, + u8 *addr; + int max_blks; + +- debug("%s: " LBAFU " " LBAFU "\n", __func__, blknr, blkcnt); ++printf("%s: " LBAFU " " LBAFU "\n", __func__, blknr, blkcnt); + + start = blknr; + blks = blkcnt; +@@ -777,7 +777,7 @@ static int mv_ata_exec_ata_cmd_nondma(struct udevice *dev, int port, + int i; + u16 *tp; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + out_le32(priv->regbase + PIO_SECTOR_COUNT, cfis->sector_count); + out_le32(priv->regbase + PIO_LBA_HI, cfis->lba_high); +@@ -789,7 +789,7 @@ static int mv_ata_exec_ata_cmd_nondma(struct udevice *dev, int port, + + if (ata_wait_register((u32 *)(priv->regbase + PIO_CMD_STATUS), + ATA_BUSY, 0x0, 10000)) { +- debug("Failed to wait for completion\n"); ++printf("Failed to wait for completion\n"); + return -1; + } + +@@ -829,7 +829,7 @@ static void mv_sata_xfer_mode(struct udevice *dev, int port, u16 *id) + priv->pio = id[ATA_ID_PIO_MODES]; + priv->mwdma = id[ATA_ID_MWDMA_MODES]; + priv->udma = id[ATA_ID_UDMA_MODES]; +- debug("pio %04x, mwdma %04x, udma %04x\n", priv->pio, priv->mwdma, ++printf("pio %04x, mwdma %04x, udma %04x\n", priv->pio, priv->mwdma, + priv->udma); + } + +@@ -889,7 +889,7 @@ static int sata_mv_init_sata(struct udevice *dev, int port) + { + struct mv_priv *priv = dev_get_plat(dev); + +- debug("Initialize sata dev: %d\n", port); ++printf("Initialize sata dev: %d\n", port); + + if (port < 0 || port >= CONFIG_SYS_SATA_MAX_DEVICE) { + printf("Invalid sata device %d\n", port); +@@ -925,7 +925,7 @@ static int sata_mv_init_sata(struct udevice *dev, int port) + priv->regbase = port == 0 ? SATA0_BASE : SATA1_BASE; + + if (!hw_init) { +- debug("Initialize sata hw\n"); ++printf("Initialize sata hw\n"); + hw_init = 1; + mv_reset_one_hc(); + mvsata_ide_conf_mbus_windows(); +@@ -986,7 +986,7 @@ static int sata_mv_scan_sata(struct udevice *dev, int port) + /* Check if support LBA48 */ + if (ata_id_has_lba48(id)) { + desc->lba48 = 1; +- debug("Device support LBA48\n"); ++printf("Device support LBA48\n"); + } + + /* Get the NCQ queue depth from device */ +@@ -1052,7 +1052,7 @@ static int sata_mv_probe(struct udevice *dev) + ret = blk_create_devicef(dev, "sata_mv_blk", "blk", + IF_TYPE_SATA, -1, 512, 0, &blk); + if (ret) { +- debug("Can't create device\n"); ++printf("Can't create device\n"); + return ret; + } + +@@ -1062,14 +1062,14 @@ static int sata_mv_probe(struct udevice *dev) + /* Init SATA port */ + ret = sata_mv_init_sata(blk, i); + if (ret) { +- debug("%s: Failed to init bus\n", __func__); ++printf("%s: Failed to init bus\n", __func__); + return ret; + } + + /* Scan SATA port */ + ret = sata_mv_scan_sata(blk, i); + if (ret) { +- debug("%s: Failed to scan bus\n", __func__); ++printf("%s: Failed to scan bus\n", __func__); + return ret; + } + } +diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c +index 7e4e97d80..a1dd511c1 100644 +--- a/drivers/ata/sata_sil.c ++++ b/drivers/ata/sata_sil.c +@@ -199,7 +199,7 @@ static int sil_cmd_set_feature(struct sil_sata *sata) + + /* First check the device capablity */ + udma_cap = (u8)(sata->udma & 0xff); +- debug("udma_cap %02x\n", udma_cap); ++printf("udma_cap %02x\n", udma_cap); + + if (udma_cap == ATA_UDMA6) + pcmd->prb.fis.sector_count = XFER_UDMA_6; +@@ -238,9 +238,9 @@ static void sil_sata_set_feature_by_id(struct sil_sata *sata, u16 *id) + /* Check if support LBA48 */ + if (ata_id_has_lba48(id)) { + sata->lba48 = 1; +- debug("Device supports LBA48\n"); ++printf("Device supports LBA48\n"); + } else { +- debug("Device supports LBA28\n"); ++printf("Device supports LBA28\n"); + } + #endif + +@@ -681,7 +681,7 @@ int init_sata(int dev) + if (!(word & PCI_COMMAND_MEMORY) || + (!(word & PCI_COMMAND_MASTER))) { + printf("Error: Can not enable MEM access or Bus Mastering.\n"); +- debug("PCI command: %04x\n", word); ++printf("PCI command: %04x\n", word); + return 1; + } + +@@ -835,7 +835,7 @@ static int sil_pci_probe(struct udevice *dev) + if (!(word & PCI_COMMAND_MEMORY) || + (!(word & PCI_COMMAND_MASTER))) { + printf("Error: Can not enable MEM access or Bus Mastering.\n"); +- debug("PCI command: %04x\n", word); ++printf("PCI command: %04x\n", word); + return 1; + } + +@@ -849,7 +849,7 @@ static int sil_pci_probe(struct udevice *dev) + ret = blk_create_devicef(dev, "sata_sil_blk", sata_name, + IF_TYPE_SATA, -1, 512, 0, &blk); + if (ret) { +- debug("Can't create device\n"); ++printf("Can't create device\n"); + return ret; + } + +diff --git a/drivers/ata/sata_sil3114.c b/drivers/ata/sata_sil3114.c +index 4d3a680f1..6fb58d04f 100644 +--- a/drivers/ata/sata_sil3114.c ++++ b/drivers/ata/sata_sil3114.c +@@ -161,7 +161,7 @@ static void sata_identify (int num, int dev) + sata_dev_desc[devno].removable = 0; + + sata_dev_desc[devno].lba = (u32) n_sectors; +- debug("lba=0x%lx\n", sata_dev_desc[devno].lba); ++printf("lba=0x%lx\n", sata_dev_desc[devno].lba); + + #ifdef CONFIG_LBA48 + if (iobuf[83] & (1 << 10)) { +diff --git a/drivers/axi/axi-emul-uclass.c b/drivers/axi/axi-emul-uclass.c +index b28351f1a..01b2699f3 100644 +--- a/drivers/axi/axi-emul-uclass.c ++++ b/drivers/axi/axi-emul-uclass.c +@@ -29,7 +29,7 @@ int axi_sandbox_get_emul(struct udevice *bus, ulong address, + offset = 4; + break; + default: +- debug("%s: Unknown AXI transfer size '%d'", bus->name, size); ++printf("%s: Unknown AXI transfer size '%d'", bus->name, size); + offset = 0; + } + +@@ -44,7 +44,7 @@ int axi_sandbox_get_emul(struct udevice *bus, ulong address, + + ret = dev_read_u32_array(dev, "reg", reg, ARRAY_SIZE(reg)); + if (ret) { +- debug("%s: Could not read 'reg' property of %s\n", ++printf("%s: Could not read 'reg' property of %s\n", + bus->name, dev->name); + continue; + } +@@ -56,7 +56,7 @@ int axi_sandbox_get_emul(struct udevice *bus, ulong address, + if (address >= reg[0] && address <= reg[0] + reg[1] - offset) { + /* If yes, activate it... */ + if (device_probe(dev)) { +- debug("%s: Could not activate %s\n", ++printf("%s: Could not activate %s\n", + bus->name, dev->name); + return -ENODEV; + } +diff --git a/drivers/axi/ihs_axi.c b/drivers/axi/ihs_axi.c +index a7e9761fb..a32abe0dd 100644 +--- a/drivers/axi/ihs_axi.c ++++ b/drivers/axi/ihs_axi.c +@@ -197,11 +197,11 @@ static int ihs_axi_transfer(struct udevice *bus, ulong address, + return 0; + + if (status & STATUS_ERROR_EVENT) { +- debug("%s: Error occurred during transfer\n", bus->name); ++printf("%s: Error occurred during transfer\n", bus->name); + return -EIO; + } + +- debug("%s: Transfer timed out\n", bus->name); ++printf("%s: Transfer timed out\n", bus->name); + return -ETIMEDOUT; + } + +@@ -218,14 +218,14 @@ static int ihs_axi_read(struct udevice *dev, ulong address, void *data, + u32 *p = data; + + if (size != AXI_SIZE_32) { +- debug("%s: transfer size '%d' not supported\n", ++printf("%s: transfer size '%d' not supported\n", + dev->name, size); + return -ENOSYS; + } + + ret = ihs_axi_transfer(dev, address, AXI_CMD_READ); + if (ret < 0) { +- debug("%s: Error during AXI transfer (err = %d)\n", ++printf("%s: Error during AXI transfer (err = %d)\n", + dev->name, ret); + return ret; + } +@@ -247,7 +247,7 @@ static int ihs_axi_write(struct udevice *dev, ulong address, void *data, + u32 *p = data; + + if (size != AXI_SIZE_32) { +- debug("%s: transfer size '%d' not supported\n", ++printf("%s: transfer size '%d' not supported\n", + dev->name, size); + return -ENOSYS; + } +@@ -259,7 +259,7 @@ static int ihs_axi_write(struct udevice *dev, ulong address, void *data, + + ret = ihs_axi_transfer(dev, address, AXI_CMD_WRITE); + if (ret < 0) { +- debug("%s: Error during AXI transfer (err = %d)\n", ++printf("%s: Error during AXI transfer (err = %d)\n", + dev->name, ret); + return ret; + } +diff --git a/drivers/axi/sandbox_store.c b/drivers/axi/sandbox_store.c +index ef349a50b..2227a34ff 100644 +--- a/drivers/axi/sandbox_store.c ++++ b/drivers/axi/sandbox_store.c +@@ -41,7 +41,7 @@ static int copy_axi_data(void *src, void *dst, enum axi_size_t size) + *((u32 *)dst) = be32_to_cpu(*((u32 *)src)); + return 0; + default: +- debug("%s: Unknown AXI transfer size '%d'\n", __func__, size); ++printf("%s: Unknown AXI transfer size '%d'\n", __func__, size); + return -EINVAL; + } + } +@@ -90,7 +90,7 @@ static int sandbox_store_probe(struct udevice *dev) + + ret = dev_read_u32_array(dev, "reg", reg, ARRAY_SIZE(reg)); + if (ret) { +- debug("%s: Could not read 'reg' property\n", dev->name); ++printf("%s: Could not read 'reg' property\n", dev->name); + return -EINVAL; + } + +diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c +index 6c7cc24cb..d4e154ed9 100644 +--- a/drivers/bios_emulator/atibios.c ++++ b/drivers/bios_emulator/atibios.c +@@ -94,7 +94,7 @@ static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs, + u16 *modes; + int size; + +- debug("VBE: Getting information\n"); ++printf("VBE: Getting information\n"); + regs->e.eax = VESA_GET_INFO; + regs->e.esi = buffer_seg; + regs->e.edi = buffer_adr; +@@ -103,23 +103,23 @@ static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs, + strcpy(info->signature, "VBE2"); + BE_int86(0x10, regs, regs); + if (regs->e.eax != 0x4f) { +- debug("VESA_GET_INFO: error %x\n", regs->e.eax); ++printf("VESA_GET_INFO: error %x\n", regs->e.eax); + return -ENOSYS; + } +- debug("version %x\n", le16_to_cpu(info->version)); +- debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info, ++printf("version %x\n", le16_to_cpu(info->version)); ++printf("oem '%s'\n", (char *)bios_ptr(buffer, vga_info, + info->oem_string_ptr)); +- debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info, ++printf("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info, + info->vendor_name_ptr)); +- debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info, ++printf("product '%s'\n", (char *)bios_ptr(buffer, vga_info, + info->product_name_ptr)); +- debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info, ++printf("rev '%s'\n", (char *)bios_ptr(buffer, vga_info, + info->product_rev_ptr)); + modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr); +- debug("Modes: "); ++printf("Modes: "); + for (ptr = modes_bios; *ptr != 0xffff; ptr++) +- debug("%x ", le16_to_cpu(*ptr)); +- debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4); ++printf("%x ", le16_to_cpu(*ptr)); ++printf("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4); + size = (ptr - modes_bios) * sizeof(u16) + 2; + modes = malloc(size); + if (!modes) +@@ -129,17 +129,17 @@ static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs, + regs->e.eax = VESA_GET_CUR_MODE; + BE_int86(0x10, regs, regs); + if (regs->e.eax != 0x4f) { +- debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax); ++printf("VESA_GET_CUR_MODE: error %x\n", regs->e.eax); + return -ENOSYS; + } +- debug("Current mode %x\n", regs->e.ebx); ++printf("Current mode %x\n", regs->e.ebx); + + for (ptr = modes; *ptr != 0xffff; ptr++) { + int mode = le16_to_cpu(*ptr); + bool linear_ok; + int attr; + +- debug("Mode %x: ", mode); ++printf("Mode %x: ", mode); + memset(buffer, '\0', sizeof(struct vbe_mode_info)); + regs->e.eax = VESA_GET_MODE_INFO; + regs->e.ebx = 0; +@@ -149,7 +149,7 @@ static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs, + regs->e.edi = buffer_adr; + BE_int86(0x10, regs, regs); + if (regs->e.eax != 0x4f) { +- debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); ++printf("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); + continue; + } + memcpy(mode_info->mode_info_block, buffer, +@@ -158,13 +158,13 @@ static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs, + vm = &mode_info->vesa; + attr = le16_to_cpu(vm->mode_attributes); + linear_ok = attr & 0x80; +- debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n", ++printf("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n", + le16_to_cpu(vm->x_resolution), + le16_to_cpu(vm->y_resolution), + vm->bits_per_pixel, vm->memory_model, + linear_ok ? "OK" : "not available", + attr); +- debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n", ++printf("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n", + vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos, + vm->red_mask_size, vm->green_mask_size, + vm->blue_mask_size); +@@ -181,26 +181,26 @@ static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode, + u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff; + struct vesa_mode_info *vm; + +- debug("VBE: Setting VESA mode %#04x\n", vesa_mode); ++printf("VBE: Setting VESA mode %#04x\n", vesa_mode); + regs->e.eax = VESA_SET_MODE; + regs->e.ebx = vesa_mode; + /* request linear framebuffer mode and don't clear display */ + regs->e.ebx |= (1 << 14) | (1 << 15); + BE_int86(0x10, regs, regs); + if (regs->e.eax != 0x4f) { +- debug("VESA_SET_MODE: error %x\n", regs->e.eax); ++printf("VESA_SET_MODE: error %x\n", regs->e.eax); + return -ENOSYS; + } + + memset(buffer, '\0', sizeof(struct vbe_mode_info)); +- debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode); ++printf("VBE: Geting info for VESA mode %#04x\n", vesa_mode); + regs->e.eax = VESA_GET_MODE_INFO; + regs->e.ecx = vesa_mode; + regs->e.esi = buffer_seg; + regs->e.edi = buffer_adr; + BE_int86(0x10, regs, regs); + if (regs->e.eax != 0x4f) { +- debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); ++printf("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); + return -ENOSYS; + } + +@@ -214,7 +214,7 @@ static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode, + vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline); + vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr); + vm->mode_attributes = le16_to_cpu(vm->mode_attributes); +- debug("VBE: Init complete\n"); ++printf("VBE: Init complete\n"); + + return 0; + } +diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c +index d0d91db54..35200113a 100644 +--- a/drivers/block/blk-uclass.c ++++ b/drivers/block/blk-uclass.c +@@ -99,13 +99,13 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) + + if_type = if_typename_to_iftype(if_typename); + if (if_type == IF_TYPE_UNKNOWN) { +- debug("%s: Unknown interface type '%s'\n", __func__, ++printf("%s: Unknown interface type '%s'\n", __func__, + if_typename); + return NULL; + } + uclass_id = if_type_to_uclass_id(if_type); + if (uclass_id == UCLASS_INVALID) { +- debug("%s: Unknown uclass for interface type'\n", ++printf("%s: Unknown uclass for interface type'\n", + if_typename_str[if_type]); + return NULL; + } +@@ -116,14 +116,14 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) + uclass_foreach_dev(dev, uc) { + struct blk_desc *desc = dev_get_uclass_plat(dev); + +- debug("%s: if_type=%d, devnum=%d: %s, %d, %d\n", __func__, ++printf("%s: if_type=%d, devnum=%d: %s, %d, %d\n", __func__, + if_type, devnum, dev->name, desc->if_type, desc->devnum); + if (desc->devnum != devnum) + continue; + + /* Find out the parent device uclass */ + if (device_get_uclass_id(dev->parent) != uclass_id) { +- debug("%s: parent uclass %d, this dev %d\n", __func__, ++printf("%s: parent uclass %d, this dev %d\n", __func__, + device_get_uclass_id(dev->parent), uclass_id); + continue; + } +@@ -131,10 +131,10 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) + if (device_probe(dev)) + return NULL; + +- debug("%s: Device desc %p\n", __func__, desc); ++printf("%s: Device desc %p\n", __func__, desc); + return desc; + } +- debug("%s: No device found\n", __func__); ++printf("%s: No device found\n", __func__); + + return NULL; + } +@@ -157,7 +157,7 @@ struct blk_desc *blk_get_by_device(struct udevice *dev) + return dev_get_uclass_plat(child_dev); + } + +- debug("%s: No block device found\n", __func__); ++printf("%s: No block device found\n", __func__); + + return NULL; + } +@@ -186,7 +186,7 @@ static int get_desc(enum if_type if_type, int devnum, struct blk_desc **descp) + uclass_foreach_dev(dev, uc) { + struct blk_desc *desc = dev_get_uclass_plat(dev); + +- debug("%s: if_type=%d, devnum=%d: %s, %d, %d\n", __func__, ++printf("%s: if_type=%d, devnum=%d: %s, %d, %d\n", __func__, + if_type, devnum, dev->name, desc->if_type, desc->devnum); + if (desc->if_type == if_type) { + if (desc->devnum == devnum) { +@@ -410,7 +410,7 @@ int blk_find_device(int if_type, int devnum, struct udevice **devp) + uclass_foreach_dev(dev, uc) { + struct blk_desc *desc = dev_get_uclass_plat(dev); + +- debug("%s: if_type=%d, devnum=%d: %s, %d, %d\n", __func__, ++printf("%s: if_type=%d, devnum=%d: %s, %d, %d\n", __func__, + if_type, devnum, dev->name, desc->if_type, desc->devnum); + if (desc->if_type == if_type && desc->devnum == devnum) { + *devp = dev; +@@ -487,13 +487,13 @@ int blk_get_from_parent(struct udevice *parent, struct udevice **devp) + + device_find_first_child(parent, &dev); + if (!dev) { +- debug("%s: No block device found for parent '%s'\n", __func__, ++printf("%s: No block device found for parent '%s'\n", __func__, + parent->name); + return -ENODEV; + } + id = device_get_uclass_id(dev); + if (id != UCLASS_BLK) { +- debug("%s: Incorrect uclass %s for block device '%s'\n", ++printf("%s: Incorrect uclass %s for block device '%s'\n", + __func__, uclass_get_name(id), dev->name); + return -ENOTBLK; + } +diff --git a/drivers/block/blkcache.c b/drivers/block/blkcache.c +index b53420a3a..3a5ce7e77 100644 +--- a/drivers/block/blkcache.c ++++ b/drivers/block/blkcache.c +@@ -77,13 +77,13 @@ int blkcache_read(int iftype, int devnum, + if (node) { + const char *src = node->cache + (start - node->start) * blksz; + memcpy(buffer, src, blksz * blkcnt); +- debug("hit: start " LBAF ", count " LBAFU "\n", ++printf("hit: start " LBAF ", count " LBAFU "\n", + start, blkcnt); + ++_stats.hits; + return 1; + } + +- debug("miss: start " LBAF ", count " LBAFU "\n", ++printf("miss: start " LBAF ", count " LBAFU "\n", + start, blkcnt); + ++_stats.misses; + return 0; +@@ -109,7 +109,7 @@ void blkcache_fill(int iftype, int devnum, + node = (struct block_cache_node *)block_cache.prev; + list_del(&node->lh); + _stats.entries--; +- debug("drop: start " LBAF ", count " LBAFU "\n", ++printf("drop: start " LBAF ", count " LBAFU "\n", + node->start, node->blkcnt); + if (node->blkcnt * node->blksz < bytes) { + free(node->cache); +@@ -130,7 +130,7 @@ void blkcache_fill(int iftype, int devnum, + } + } + +- debug("fill: start " LBAF ", count " LBAFU "\n", ++printf("fill: start " LBAF ", count " LBAFU "\n", + start, blkcnt); + + node->iftype = iftype; +diff --git a/drivers/block/ide.c b/drivers/block/ide.c +index 862a85bc8..f5486e97b 100644 +--- a/drivers/block/ide.c ++++ b/drivers/block/ide.c +@@ -139,7 +139,7 @@ __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts) + + dbuf = (ushort *)sect_buf; + +- debug("in output data shorts base for read is %p\n", (void *)paddr); ++printf("in output data shorts base for read is %p\n", (void *)paddr); + + while (shorts--) { + EIEIO; +@@ -154,7 +154,7 @@ __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts) + + dbuf = (ushort *)sect_buf; + +- debug("in input data shorts base for read is %p\n", (void *)paddr); ++printf("in input data shorts base for read is %p\n", (void *)paddr); + + while (shorts--) { + EIEIO; +@@ -249,7 +249,7 @@ unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen, + if ((c & mask) != res) { + if (c & ATA_STAT_ERR) { + err = (ide_inb(device, ATA_ERROR_REG)) >> 4; +- debug("atapi_issue 1 returned sense key %X status %02X\n", ++printf("atapi_issue 1 returned sense key %X status %02X\n", + err, c); + } else { + printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", +@@ -273,20 +273,20 @@ unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen, + goto AI_OUT; + } + if (n != buflen) { +- debug("WARNING, transfer bytes %d not equal with requested %d\n", ++printf("WARNING, transfer bytes %d not equal with requested %d\n", + n, buflen); + } + if (n != 0) { /* data transfer */ +- debug("ATAPI_ISSUE: %d Bytes to transfer\n", n); ++printf("ATAPI_ISSUE: %d Bytes to transfer\n", n); + /* we transfer shorts */ + n >>= 1; + /* ok now decide if it is an in or output */ + if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) { +- debug("Write to device\n"); ++printf("Write to device\n"); + ide_output_data_shorts(device, (unsigned short *)buffer, + n); + } else { +- debug("Read from device @ %p shorts %d\n", buffer, n); ++printf("Read from device @ %p shorts %d\n", buffer, n); + ide_input_data_shorts(device, (unsigned short *)buffer, + n); + } +@@ -297,7 +297,7 @@ unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen, + c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res); + if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) { + err = (ide_inb(device, ATA_ERROR_REG) >> 4); +- debug("atapi_issue 2 returned sense key %X status %X\n", err, ++printf("atapi_issue 2 returned sense key %X status %X\n", err, + c); + } else { + err = 0; +@@ -334,7 +334,7 @@ retry: + if (res == 0xFF) + return 0xFF; /* error */ + +- debug("(auto_req)atapi_issue returned sense key %X\n", res); ++printf("(auto_req)atapi_issue returned sense key %X\n", res); + + memset(sense_ccb, 0, sizeof(sense_ccb)); + memset(sense_data, 0, sizeof(sense_data)); +@@ -346,8 +346,8 @@ retry: + asc = (sense_data[12]); + ascq = (sense_data[13]); + +- debug("ATAPI_CMD_REQ_SENSE returned %x\n", res); +- debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n", ++printf("ATAPI_CMD_REQ_SENSE returned %x\n", res); ++printf(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n", + sense_data[0], key, asc, ascq); + + if ((key == 0)) +@@ -372,14 +372,14 @@ retry: + goto error; + } + if (asc == 0x3a) { +- debug("Media not present\n"); ++printf("Media not present\n"); + goto error; + } + + printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc, + ascq); + error: +- debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq); ++printf("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq); + return 0xFF; + } + +@@ -400,7 +400,7 @@ ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt, + unsigned char ccb[12]; /* Command descriptor block */ + ulong cnt; + +- debug("atapi_read dev %d start " LBAF " blocks " LBAF ++printf("atapi_read dev %d start " LBAF " blocks " LBAF + " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer); + + do { +@@ -456,7 +456,7 @@ static void atapi_inquiry(struct blk_desc *dev_desc) + ccb[4] = 40; /* allocation Legnth */ + c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40); + +- debug("ATAPI_CMD_INQUIRY returned %x\n", c); ++printf("ATAPI_CMD_INQUIRY returned %x\n", c); + if (c != 0) + return; + +@@ -483,7 +483,7 @@ static void atapi_inquiry(struct blk_desc *dev_desc) + + c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0); + +- debug("ATAPI_CMD_START_STOP returned %x\n", c); ++printf("ATAPI_CMD_START_STOP returned %x\n", c); + if (c != 0) + return; + +@@ -491,7 +491,7 @@ static void atapi_inquiry(struct blk_desc *dev_desc) + memset(iobuf, 0, sizeof(iobuf)); + c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0); + +- debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c); ++printf("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c); + if (c != 0) + return; + +@@ -499,11 +499,11 @@ static void atapi_inquiry(struct blk_desc *dev_desc) + memset(iobuf, 0, sizeof(iobuf)); + ccb[0] = ATAPI_CMD_READ_CAP; + c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8); +- debug("ATAPI_CMD_READ_CAP returned %x\n", c); ++printf("ATAPI_CMD_READ_CAP returned %x\n", c); + if (c != 0) + return; + +- debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n", ++printf("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n", + iobuf[0], iobuf[1], iobuf[2], iobuf[3], + iobuf[4], iobuf[5], iobuf[6], iobuf[7]); + +@@ -584,7 +584,7 @@ static void ide_ident(struct blk_desc *dev_desc) + * Need to soft reset the device + * in case it's an ATAPI... + */ +- debug("Retrying...\n"); ++printf("Retrying...\n"); + ide_outb(device, ATA_DEV_HD, + ATA_LBA | ATA_DEVICE(device)); + udelay(100000); +@@ -675,7 +675,7 @@ static void ide_ident(struct blk_desc *dev_desc) + + __weak void ide_outb(int dev, int port, unsigned char val) + { +- debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", ++printf("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", + dev, port, val, + (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); + +@@ -702,7 +702,7 @@ __weak unsigned char ide_inb(int dev, int port) + val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port))); + #endif + +- debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", ++printf("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", + dev, port, + (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val); + return val; +@@ -762,11 +762,11 @@ void ide_init(void) + + if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) { + puts("not available "); +- debug("Status = 0x%02X ", c); ++printf("Status = 0x%02X ", c); + #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */ + } else if ((c & ATA_STAT_READY) == 0) { + puts("not available "); +- debug("Status = 0x%02X ", c); ++printf("Status = 0x%02X ", c); + #endif + } else { + puts("OK "); +@@ -816,7 +816,7 @@ __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words) + uintptr_t paddr = (ATA_CURR_BASE(dev) + ATA_DATA_REG); + ushort *dbuf = (ushort *)sect_buf; + +- debug("in input swap data base for read is %p\n", (void *)paddr); ++printf("in input swap data base for read is %p\n", (void *)paddr); + + while (words--) { + EIEIO; +@@ -854,7 +854,7 @@ __weak void ide_input_data(int dev, ulong *sect_buf, int words) + + dbuf = (ushort *)sect_buf; + +- debug("in input data base for read is %p\n", (void *)paddr); ++printf("in input data base for read is %p\n", (void *)paddr); + + while (words--) { + EIEIO; +@@ -889,7 +889,7 @@ ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt, + lba48 = 1; + } + #endif +- debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n", ++printf("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n", + device, blknr, blkcnt, (ulong) buffer); + + /* Select device +@@ -917,7 +917,7 @@ ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt, + printf("No Powersaving mode %X\n", c); + } else { + c = ide_inb(device, ATA_SECT_CNT); +- debug("Powersaving %02X\n", c); ++printf("Powersaving %02X\n", c); + if (c == 0) + pwrsave = 1; + } +diff --git a/drivers/bootcount/i2c-eeprom.c b/drivers/bootcount/i2c-eeprom.c +index 709be094b..d6cbe24cc 100644 +--- a/drivers/bootcount/i2c-eeprom.c ++++ b/drivers/bootcount/i2c-eeprom.c +@@ -24,7 +24,7 @@ static int bootcount_i2c_eeprom_set(struct udevice *dev, const u32 a) + + if (i2c_eeprom_write(priv->i2c_eeprom, priv->offset, + (uint8_t *)&val, 2) < 0) { +- debug("%s: write failed\n", __func__); ++printf("%s: write failed\n", __func__); + return -EIO; + } + +@@ -38,7 +38,7 @@ static int bootcount_i2c_eeprom_get(struct udevice *dev, u32 *a) + + if (i2c_eeprom_read(priv->i2c_eeprom, priv->offset, + (uint8_t *)&val, 2) < 0) { +- debug("%s: read failed\n", __func__); ++printf("%s: read failed\n", __func__); + return -EIO; + } + +@@ -47,7 +47,7 @@ static int bootcount_i2c_eeprom_get(struct udevice *dev, u32 *a) + return 0; + } + +- debug("%s: bootcount magic does not match on %04x\n", __func__, val); ++printf("%s: bootcount magic does not match on %04x\n", __func__, val); + return -EIO; + } + +@@ -59,14 +59,14 @@ static int bootcount_i2c_eeprom_probe(struct udevice *dev) + + if (dev_read_phandle_with_args(dev, "i2c-eeprom", NULL, 0, 0, + &phandle_args)) { +- debug("%s: i2c-eeprom backing device not specified\n", ++printf("%s: i2c-eeprom backing device not specified\n", + dev->name); + return -ENOENT; + } + + if (uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, phandle_args.node, + &i2c_eeprom)) { +- debug("%s: could not get backing device\n", dev->name); ++printf("%s: could not get backing device\n", dev->name); + return -ENODEV; + } + +diff --git a/drivers/bootcount/rtc.c b/drivers/bootcount/rtc.c +index 483caaa80..d3327f756 100644 +--- a/drivers/bootcount/rtc.c ++++ b/drivers/bootcount/rtc.c +@@ -22,7 +22,7 @@ static int bootcount_rtc_set(struct udevice *dev, const u32 a) + const u16 val = bootcount_magic << 8 | (a & 0xff); + + if (rtc_write16(priv->rtc, priv->offset, val) < 0) { +- debug("%s: rtc_write16 failed\n", __func__); ++printf("%s: rtc_write16 failed\n", __func__); + return -EIO; + } + +@@ -35,7 +35,7 @@ static int bootcount_rtc_get(struct udevice *dev, u32 *a) + u16 val; + + if (rtc_read16(priv->rtc, priv->offset, &val) < 0) { +- debug("%s: rtc_write16 failed\n", __func__); ++printf("%s: rtc_write16 failed\n", __func__); + return -EIO; + } + +@@ -44,7 +44,7 @@ static int bootcount_rtc_get(struct udevice *dev, u32 *a) + return 0; + } + +- debug("%s: bootcount magic does not match on %04x\n", __func__, val); ++printf("%s: bootcount magic does not match on %04x\n", __func__, val); + return -EIO; + } + +@@ -55,12 +55,12 @@ static int bootcount_rtc_probe(struct udevice *dev) + struct udevice *rtc; + + if (dev_read_phandle_with_args(dev, "rtc", NULL, 0, 0, &phandle_args)) { +- debug("%s: rtc backing device not specified\n", dev->name); ++printf("%s: rtc backing device not specified\n", dev->name); + return -ENOENT; + } + + if (uclass_get_device_by_ofnode(UCLASS_RTC, phandle_args.node, &rtc)) { +- debug("%s: could not get backing device\n", dev->name); ++printf("%s: could not get backing device\n", dev->name); + return -ENODEV; + } + +diff --git a/drivers/bootcount/spi-flash.c b/drivers/bootcount/spi-flash.c +index 03050e666..02c93e637 100644 +--- a/drivers/bootcount/spi-flash.c ++++ b/drivers/bootcount/spi-flash.c +@@ -57,7 +57,7 @@ static int bootcount_spi_flash_set(struct udevice *dev, const u32 a) + const u16 val = bootcount_magic << 8 | (a & 0xff); + + if (bootcount_spi_flash_update(priv->spi_flash, priv->offset, 2, &val) < 0) { +- debug("%s: write failed\n", __func__); ++printf("%s: write failed\n", __func__); + return -EIO; + } + +@@ -70,7 +70,7 @@ static int bootcount_spi_flash_get(struct udevice *dev, u32 *a) + u16 val; + + if (spi_flash_read_dm(priv->spi_flash, priv->offset, 2, &val) < 0) { +- debug("%s: read failed\n", __func__); ++printf("%s: read failed\n", __func__); + return -EIO; + } + +@@ -79,7 +79,7 @@ static int bootcount_spi_flash_get(struct udevice *dev, u32 *a) + return 0; + } + +- debug("%s: bootcount magic does not match on %04x\n", __func__, val); ++printf("%s: bootcount magic does not match on %04x\n", __func__, val); + return -EIO; + } + +@@ -90,12 +90,12 @@ static int bootcount_spi_flash_probe(struct udevice *dev) + struct udevice *spi_flash; + + if (dev_read_phandle_with_args(dev, "spi-flash", NULL, 0, 0, &phandle_args)) { +- debug("%s: spi-flash backing device not specified\n", dev->name); ++printf("%s: spi-flash backing device not specified\n", dev->name); + return -ENOENT; + } + + if (uclass_get_device_by_ofnode(UCLASS_SPI_FLASH, phandle_args.node, &spi_flash)) { +- debug("%s: could not get backing device\n", dev->name); ++printf("%s: could not get backing device\n", dev->name); + return -ENODEV; + } + +diff --git a/drivers/button/button-adc.c b/drivers/button/button-adc.c +index fd896c76f..4981d9f7b 100644 +--- a/drivers/button/button-adc.c ++++ b/drivers/button/button-adc.c +@@ -110,7 +110,7 @@ static int button_adc_bind(struct udevice *parent) + + label = ofnode_read_string(node, "label"); + if (!label) { +- debug("%s: node %s has no label\n", __func__, ++printf("%s: node %s has no label\n", __func__, + ofnode_get_name(node)); + return -EINVAL; + } +diff --git a/drivers/button/button-gpio.c b/drivers/button/button-gpio.c +index dbb000622..77397b0f1 100644 +--- a/drivers/button/button-gpio.c ++++ b/drivers/button/button-gpio.c +@@ -74,7 +74,7 @@ static int button_gpio_bind(struct udevice *parent) + + label = ofnode_read_string(node, "label"); + if (!label) { +- debug("%s: node %s has no label\n", __func__, ++printf("%s: node %s has no label\n", __func__, + ofnode_get_name(node)); + return -EINVAL; + } +diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c +index cca6d6741..688072391 100644 +--- a/drivers/clk/altera/clk-agilex.c ++++ b/drivers/clk/altera/clk-agilex.c +@@ -150,7 +150,7 @@ static int membus_write_pll(struct socfpga_clk_plat *plat, u32 pll, + else + CM_REG_WRITEL(plat, val, CLKMGR_PERPLL_MEM); + +- debug("MEMBUS: Write 0x%08x to addr = 0x%08x\n", wdat, addr); ++printf("MEMBUS: Write 0x%08x to addr = 0x%08x\n", wdat, addr); + + return membus_wait_for_req(plat, pll, timeout); + } +@@ -180,7 +180,7 @@ static int membus_read_pll(struct socfpga_clk_plat *plat, u32 pll, + else + *rdata = CM_REG_READL(plat, CLKMGR_PERPLL_MEMSTAT); + +- debug("MEMBUS: Read 0x%08x from addr = 0x%08x\n", *rdata, addr); ++printf("MEMBUS: Read 0x%08x from addr = 0x%08x\n", *rdata, addr); + + return 0; + } +@@ -220,13 +220,13 @@ static u32 calc_vocalib_pll(u32 pllm, u32 pllglob) + CLKMGR_VCOCALIB_MSCNT_MASK); + + /* Dump all the pll calibration settings for debug purposes */ +- debug("mdiv : %d\n", mdiv); +- debug("arefclkdiv : %d\n", arefclkdiv); +- debug("drefclkdiv : %d\n", drefclkdiv); +- debug("refclkdiv : %d\n", refclkdiv); +- debug("mscnt : %d\n", mscnt); +- debug("hscnt : %d\n", hscnt); +- debug("vcocalib : 0x%08x\n", vcocalib); ++printf("mdiv : %d\n", mdiv); ++printf("arefclkdiv : %d\n", arefclkdiv); ++printf("drefclkdiv : %d\n", drefclkdiv); ++printf("refclkdiv : %d\n", refclkdiv); ++printf("mscnt : %d\n", mscnt); ++printf("hscnt : %d\n", hscnt); ++printf("vcocalib : 0x%08x\n", vcocalib); + + return vcocalib; + } +diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c +index 97f00f505..115dbd748 100644 +--- a/drivers/clk/aspeed/clk_ast2500.c ++++ b/drivers/clk/aspeed/clk_ast2500.c +@@ -317,11 +317,11 @@ static ulong ast2500_configure_mac(struct ast2500_scu *scu, int index) + + if (divisor < 4) { + /* Clock can't run fast enough, but let's try anyway */ +- debug("MAC clock too slow\n"); ++printf("MAC clock too slow\n"); + divisor = 4; + } else if (divisor > 16) { + /* Can't slow down the clock enough, but let's try anyway */ +- debug("MAC clock too fast\n"); ++printf("MAC clock too fast\n"); + divisor = 16; + } + +@@ -510,7 +510,7 @@ static int ast2500_clk_bind(struct udevice *dev) + /* The reset driver does not have a device node, so bind it here */ + ret = device_bind_driver(gd->dm_root, "ast_sysreset", "reset", &dev); + if (ret) +- debug("Warning: No reset driver: ret=%d\n", ret); ++printf("Warning: No reset driver: ret=%d\n", ret); + + return 0; + } +diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c +index 3a92739f5..bc957d8d8 100644 +--- a/drivers/clk/aspeed/clk_ast2600.c ++++ b/drivers/clk/aspeed/clk_ast2600.c +@@ -471,7 +471,7 @@ static ulong ast2600_clk_get_rate(struct clk *clk) + rate = ast2600_get_uart_huxclk_rate(priv->scu); + break; + default: +- debug("can't get clk rate\n"); ++printf("can't get clk rate\n"); + return -ENOENT; + } + +@@ -533,7 +533,7 @@ static uint32_t ast2600_configure_pll(struct ast2600_scu *scu, + addr_ext = (uint32_t)(&scu->apll_ext); + break; + default: +- debug("unknown PLL index\n"); ++printf("unknown PLL index\n"); + return 1; + } + +@@ -966,7 +966,7 @@ static ulong ast2600_enable_fsiclk(struct ast2600_scu *scu) + * don't touch it, as that will reset the existing master. + */ + if (!(readl(&scu->clkgate_ctrl2) & clkgate_bit)) { +- debug("%s: already running, not touching it\n", __func__); ++printf("%s: already running, not touching it\n", __func__); + return 0; + } + +@@ -1089,7 +1089,7 @@ static int ast2600_clk_bind(struct udevice *dev) + /* The reset driver does not have a device node, so bind it here */ + ret = device_bind_driver(gd->dm_root, "ast_sysreset", "reset", &dev); + if (ret) +- debug("Warning: No reset driver: ret=%d\n", ret); ++printf("Warning: No reset driver: ret=%d\n", ret); + + return 0; + } +@@ -1131,7 +1131,7 @@ int soc_clk_dump(void) + clk.id = aspeed_clk_names[i].id; + ret = clk_request(dev, &clk); + if (ret < 0) { +- debug("%s clk_request() failed: %d\n", __func__, ret); ++printf("%s clk_request() failed: %d\n", __func__, ret); + continue; + } + +diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c +index b52d926f3..c1f8a9f91 100644 +--- a/drivers/clk/at91/clk-main.c ++++ b/drivers/clk/at91/clk-main.c +@@ -74,7 +74,7 @@ static int main_rc_enable(struct clk *clk) + pmc_read(reg, AT91_PMC_SR, &val); + while (!(val & AT91_PMC_MOSCRCS)) { + pmc_read(reg, AT91_PMC_SR, &val); +- debug("waiting for main rc...\n"); ++printf("waiting for main rc...\n"); + cpu_relax(); + } + +@@ -158,7 +158,7 @@ static int clk_main_osc_enable(struct clk *clk) + pmc_read(reg, AT91_PMC_SR, &val); + while (!(val & AT91_PMC_MOSCS)) { + pmc_read(reg, AT91_PMC_SR, &val); +- debug("waiting for main osc..\n"); ++printf("waiting for main osc..\n"); + cpu_relax(); + } + +@@ -305,7 +305,7 @@ static int clk_sam9x5_main_enable(struct clk *clk) + void __iomem *reg = main->reg; + + while (!clk_sam9x5_main_ready(reg)) { +- debug("waiting for main..."); ++printf("waiting for main..."); + cpu_relax(); + } + +diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c +index 5d93e6a7e..9e50433aa 100644 +--- a/drivers/clk/at91/clk-master.c ++++ b/drivers/clk/at91/clk-master.c +@@ -66,7 +66,7 @@ static int clk_master_enable(struct clk *clk) + struct clk_master *master = to_clk_master(clk); + + while (!clk_master_ready(master)) { +- debug("waiting for mck %d\n", master->id); ++printf("waiting for mck %d\n", master->id); + cpu_relax(); + } + +diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c +index 1bfae5fd0..e0cd756e0 100644 +--- a/drivers/clk/at91/clk-sam9x60-pll.c ++++ b/drivers/clk/at91/clk-sam9x60-pll.c +@@ -130,7 +130,7 @@ static ulong sam9x60_frac_pll_set_rate(struct clk *clk, ulong rate) + AT91_PMC_PLL_UPDT_UPDATE | pll->id); + + while (ready && !sam9x60_pll_ready(base, pll->id)) { +- debug("waiting for pll %u...\n", pll->id); ++printf("waiting for pll %u...\n", pll->id); + cpu_relax(); + } + +@@ -214,7 +214,7 @@ static int sam9x60_frac_pll_enable(struct clk *clk) + AT91_PMC_PLL_UPDT_UPDATE | pll->id); + + while (!sam9x60_pll_ready(base, pll->id)) { +- debug("waiting for pll %u...\n", pll->id); ++printf("waiting for pll %u...\n", pll->id); + cpu_relax(); + } + +@@ -274,7 +274,7 @@ static int sam9x60_div_pll_enable(struct clk *clk) + AT91_PMC_PLL_UPDT_UPDATE | pll->id); + + while (!sam9x60_pll_ready(base, pll->id)) { +- debug("waiting for pll %u...\n", pll->id); ++printf("waiting for pll %u...\n", pll->id); + cpu_relax(); + } + +@@ -333,7 +333,7 @@ static ulong sam9x60_div_pll_set_rate(struct clk *clk, ulong rate) + AT91_PMC_PLL_UPDT_UPDATE | pll->id); + + while (ready && !sam9x60_pll_ready(base, pll->id)) { +- debug("waiting for pll %u...\n", pll->id); ++printf("waiting for pll %u...\n", pll->id); + cpu_relax(); + } + +diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c +index 82f79e74a..724a71cf3 100644 +--- a/drivers/clk/at91/clk-system.c ++++ b/drivers/clk/at91/clk-system.c +@@ -54,7 +54,7 @@ static int clk_system_enable(struct clk *clk) + return 0; + + while (!clk_system_ready(sys->base, sys->id)) { +- debug("waiting for pck%u\n", sys->id); ++printf("waiting for pck%u\n", sys->id); + cpu_relax(); + } + +diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c +index 7c8bcfb51..6725e31f9 100644 +--- a/drivers/clk/at91/clk-utmi.c ++++ b/drivers/clk/at91/clk-utmi.c +@@ -77,7 +77,7 @@ static int clk_utmi_enable(struct clk *clk) + utmi_ref_clk_freq = 3; + break; + default: +- debug("UTMICK: unsupported mainck rate\n"); ++printf("UTMICK: unsupported mainck rate\n"); + return -EINVAL; + } + +@@ -85,14 +85,14 @@ static int clk_utmi_enable(struct clk *clk) + regmap_update_bits(utmi->regmap_sfr, AT91_SFR_UTMICKTRIM, + AT91_UTMICKTRIM_FREQ, utmi_ref_clk_freq); + } else if (utmi_ref_clk_freq) { +- debug("UTMICK: sfr node required\n"); ++printf("UTMICK: sfr node required\n"); + return -EINVAL; + } + + pmc_update_bits(utmi->base, AT91_CKGR_UCKR, uckr, uckr); + + while (!clk_utmi_ready(utmi->base)) { +- debug("waiting for utmi...\n"); ++printf("waiting for utmi...\n"); + cpu_relax(); + } + +@@ -185,7 +185,7 @@ static int clk_utmi_sama7g5_enable(struct clk *clk) + val = 5; + break; + default: +- debug("UTMICK: unsupported main_xtal rate\n"); ++printf("UTMICK: unsupported main_xtal rate\n"); + return -EINVAL; + } + +diff --git a/drivers/clk/at91/compat.c b/drivers/clk/at91/compat.c +index b2bfb529c..a4fab125f 100644 +--- a/drivers/clk/at91/compat.c ++++ b/drivers/clk/at91/compat.c +@@ -103,7 +103,7 @@ int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) + int periph; + + if (args->args_count) { +- debug("Invalid args_count: %d\n", args->args_count); ++printf("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -830,7 +830,7 @@ static ulong generic_clk_set_rate(struct clk *clk, ulong rate) + break; + } + +- debug("GCK: best parent: %s, best_rate = %ld, best_div = %d\n", ++printf("GCK: best parent: %s, best_rate = %ld, best_div = %d\n", + best_parent.dev->name, best_rate, best_div); + + ret = clk_enable(&best_parent); +@@ -963,7 +963,7 @@ static ulong at91_usb_clk_set_rate(struct clk *clk, ulong rate) + break; + } + +- debug("AT91 USB: best sourc: %s, best_rate = %ld, best_div = %d\n", ++printf("AT91 USB: best sourc: %s, best_rate = %ld, best_div = %d\n", + best_source.dev->name, best_rate, best_div); + + ret = clk_enable(&best_source); +diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c +index 1fa42d728..47228c8f3 100644 +--- a/drivers/clk/at91/pmc.c ++++ b/drivers/clk/at91/pmc.c +@@ -12,7 +12,7 @@ + static int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) + { + if (args->args_count != 2) { +- debug("AT91: clk: Invalid args_count: %d\n", args->args_count); ++printf("AT91: clk: Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + +diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c +index c0d927196..b30524e76 100644 +--- a/drivers/clk/at91/sama7g5.c ++++ b/drivers/clk/at91/sama7g5.c +@@ -1096,7 +1096,7 @@ static const struct pmc_clk_setup { + do { \ + int _i; \ + if ((_index) >= SAMA7G5_MAX_MUX_ALLOCS) { \ +- debug("%s(): AT91: MUX: insufficient space\n", \ ++printf("%s(): AT91: MUX: insufficient space\n", \ + __func__); \ + goto _label; \ + } \ +diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c +index 34ce611a9..900447542 100644 +--- a/drivers/clk/at91/sckc.c ++++ b/drivers/clk/at91/sckc.c +@@ -34,7 +34,7 @@ static int sam9x60_sckc_of_xlate(struct clk *clk, + struct ofnode_phandle_args *args) + { + if (args->args_count != 1) { +- debug("AT91: SCKC: Invalid args_count: %d\n", args->args_count); ++printf("AT91: SCKC: Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + +diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c +index 53e7be764..fa6340916 100644 +--- a/drivers/clk/clk-uclass.c ++++ b/drivers/clk/clk-uclass.c +@@ -51,10 +51,10 @@ int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells, + static int clk_of_xlate_default(struct clk *clk, + struct ofnode_phandle_args *args) + { +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + + if (args->args_count > 1) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -83,7 +83,7 @@ static int clk_get_by_index_tail(int ret, ofnode node, + + ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk); + if (ret) { +- debug("%s: uclass_get_device_by_of_offset failed: err=%d\n", ++printf("%s: uclass_get_device_by_of_offset failed: err=%d\n", + __func__, ret); + return log_msg_ret("get", ret); + } +@@ -97,13 +97,13 @@ static int clk_get_by_index_tail(int ret, ofnode node, + else + ret = clk_of_xlate_default(clk, args); + if (ret) { +- debug("of_xlate() failed: %d\n", ret); ++printf("of_xlate() failed: %d\n", ret); + return log_msg_ret("xlate", ret); + } + + return clk_request(dev_clk, clk); + err: +- debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n", ++printf("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n", + __func__, ofnode_get_name(node), list_name, index, ret); + + return log_msg_ret("prop", ret); +@@ -115,7 +115,7 @@ static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name, + int ret; + struct ofnode_phandle_args args; + +- debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk); ++printf("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk); + + assert(clk); + clk->dev = NULL; +@@ -123,7 +123,7 @@ static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name, + ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0, + index, &args); + if (ret) { +- debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n", ++printf("%s: fdtdec_parse_phandle_with_args failed: err=%d\n", + __func__, ret); + return log_ret(ret); + } +@@ -184,7 +184,7 @@ int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk) + bulk_get_err: + err = clk_release_all(bulk->clks, bulk->count); + if (err) +- debug("%s: could release all clocks for %p\n", ++printf("%s: could release all clocks for %p\n", + __func__, dev); + + return ret; +@@ -198,7 +198,7 @@ static struct clk *clk_set_default_get_by_id(struct clk *clk) + int ret = clk_get_by_id(clk->id, &c); + + if (ret) { +- debug("%s(): could not get parent clock pointer, id %lu\n", ++printf("%s(): could not get parent clock pointer, id %lu\n", + __func__, clk->id); + ERR_PTR(ret); + } +@@ -217,7 +217,7 @@ static int clk_set_default_parents(struct udevice *dev, int stage) + num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents", + "#clock-cells", 0); + if (num_parents < 0) { +- debug("%s: could not read assigned-clock-parents for %p\n", ++printf("%s: could not read assigned-clock-parents for %p\n", + __func__, dev); + return 0; + } +@@ -230,7 +230,7 @@ static int clk_set_default_parents(struct udevice *dev, int stage) + continue; + + if (ret) { +- debug("%s: could not get parent clock %d for %s\n", ++printf("%s: could not get parent clock %d for %s\n", + __func__, index, dev_read_name(dev)); + return ret; + } +@@ -242,7 +242,7 @@ static int clk_set_default_parents(struct udevice *dev, int stage) + ret = clk_get_by_indexed_prop(dev, "assigned-clocks", + index, &clk); + if (ret) { +- debug("%s: could not get assigned clock %d for %s\n", ++printf("%s: could not get assigned clock %d for %s\n", + __func__, index, dev_read_name(dev)); + return ret; + } +@@ -271,7 +271,7 @@ static int clk_set_default_parents(struct udevice *dev, int stage) + continue; + + if (ret < 0) { +- debug("%s: failed to reparent clock %d for %s\n", ++printf("%s: failed to reparent clock %d for %s\n", + __func__, index, dev_read_name(dev)); + return ret; + } +@@ -357,7 +357,7 @@ int clk_set_defaults(struct udevice *dev, int stage) + if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC))) + return 0; + +- debug("%s(%s)\n", __func__, dev_read_name(dev)); ++printf("%s(%s)\n", __func__, dev_read_name(dev)); + + ret = clk_set_default_parents(dev, stage); + if (ret) +@@ -374,12 +374,12 @@ int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk) + { + int index; + +- debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk); ++printf("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk); + clk->dev = NULL; + + index = dev_read_stringlist_search(dev, "clock-names", name); + if (index < 0) { +- debug("fdt_stringlist_search() failed: %d\n", index); ++printf("fdt_stringlist_search() failed: %d\n", index); + return index; + } + +@@ -391,13 +391,13 @@ int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk) + { + int index; + +- debug("%s(node=%p, name=%s, clk=%p)\n", __func__, ++printf("%s(node=%p, name=%s, clk=%p)\n", __func__, + ofnode_get_name(node), name, clk); + clk->dev = NULL; + + index = ofnode_stringlist_search(node, "clock-names", name); + if (index < 0) { +- debug("fdt_stringlist_search() failed: %d\n", index); ++printf("fdt_stringlist_search() failed: %d\n", index); + return index; + } + +@@ -420,7 +420,7 @@ int clk_release_all(struct clk *clk, int count) + int i, ret; + + for (i = 0; i < count; i++) { +- debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]); ++printf("%s(clk[%d]=%p)\n", __func__, i, &clk[i]); + + /* check if clock has been previously requested */ + if (!clk[i].dev) +@@ -444,7 +444,7 @@ int clk_request(struct udevice *dev, struct clk *clk) + { + const struct clk_ops *ops; + +- debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk); ++printf("%s(dev=%p, clk=%p)\n", __func__, dev, clk); + if (!clk) + return 0; + ops = clk_dev_ops(dev); +@@ -461,7 +461,7 @@ int clk_free(struct clk *clk) + { + const struct clk_ops *ops; + +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + if (!clk_valid(clk)) + return 0; + ops = clk_dev_ops(clk->dev); +@@ -477,7 +477,7 @@ ulong clk_get_rate(struct clk *clk) + const struct clk_ops *ops; + int ret; + +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + if (!clk_valid(clk)) + return 0; + ops = clk_dev_ops(clk->dev); +@@ -497,7 +497,7 @@ struct clk *clk_get_parent(struct clk *clk) + struct udevice *pdev; + struct clk *pclk; + +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + if (!clk_valid(clk)) + return NULL; + +@@ -514,7 +514,7 @@ long long clk_get_parent_rate(struct clk *clk) + const struct clk_ops *ops; + struct clk *pclk; + +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + if (!clk_valid(clk)) + return 0; + +@@ -537,7 +537,7 @@ ulong clk_round_rate(struct clk *clk, ulong rate) + { + const struct clk_ops *ops; + +- debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); ++printf("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); + if (!clk_valid(clk)) + return 0; + +@@ -552,7 +552,7 @@ ulong clk_set_rate(struct clk *clk, ulong rate) + { + const struct clk_ops *ops; + +- debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); ++printf("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); + if (!clk_valid(clk)) + return 0; + ops = clk_dev_ops(clk->dev); +@@ -568,7 +568,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent) + const struct clk_ops *ops; + int ret; + +- debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent); ++printf("%s(clk=%p, parent=%p)\n", __func__, clk, parent); + if (!clk_valid(clk)) + return 0; + ops = clk_dev_ops(clk->dev); +@@ -592,7 +592,7 @@ int clk_enable(struct clk *clk) + struct clk *clkp = NULL; + int ret; + +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + if (!clk_valid(clk)) + return 0; + ops = clk_dev_ops(clk->dev); +@@ -652,7 +652,7 @@ int clk_disable(struct clk *clk) + struct clk *clkp = NULL; + int ret; + +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + if (!clk_valid(clk)) + return 0; + ops = clk_dev_ops(clk->dev); +diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c +index 1efb7fe9f..5de5ab464 100644 +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -25,7 +25,7 @@ int clk_register(struct clk *clk, const char *drv_name, + printf("%s: failed to get %s device (parent of %s)\n", + __func__, parent_name, name); + } else { +- debug("%s: name: %s parent: %s [0x%p]\n", __func__, name, ++printf("%s: name: %s parent: %s [0x%p]\n", __func__, name, + parent->name, parent); + } + +diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c +index 62523d290..2dee7bc3f 100644 +--- a/drivers/clk/clk_versal.c ++++ b/drivers/clk/clk_versal.c +@@ -264,7 +264,7 @@ static int __versal_clock_get_topology(struct clock_topology *topology, + topology[*nnodes].type_flag |= + FIELD_GET(CLK_TYPE_FLAG2_FIELD_MASK, data[i]) << + CLK_TYPE_FLAG_BITS; +- debug("topology type:0x%x, flag:0x%x, type_flag:0x%x\n", ++printf("topology type:0x%x, flag:0x%x, type_flag:0x%x\n", + topology[*nnodes].type, topology[*nnodes].flag, + topology[*nnodes].type_flag); + (*nnodes)++; +@@ -314,7 +314,7 @@ static int __versal_clock_get_parents(struct clock_parent *parents, u32 *data, + if (versal_get_clock_name(parent->id, parent->name)) + continue; + } +- debug("parent name:%s\n", parent->name); ++printf("parent name:%s\n", parent->name); + *nparent += 1; + } + +@@ -433,7 +433,7 @@ static u32 versal_clock_get_parentid(u32 clk_id) + parent_id = ret_payload[1]; + } + +- debug("parent_id:0x%x\n", clock[clock[id].parent[parent_id].id].clk_id); ++printf("parent_id:0x%x\n", clock[clock[id].parent[parent_id].id].clk_id); + return clock[clock[id].parent[parent_id].id].clk_id; + } + +@@ -532,7 +532,7 @@ int soc_clk_dump(void) + + printf("pl_alt_ref_clk:%ld ref_clk:%ld\n", pl_alt_ref_clk, ref_clk); + for (i = 0; i < clock_max_idx; i++) { +- debug("%s\n", clock[i].clk_name); ++printf("%s\n", clock[i].clk_name); + ret = versal_get_clock_type(i, &type); + if (ret || type != CLK_TYPE_OUTPUT) + continue; +@@ -579,7 +579,7 @@ static void versal_get_clock_info(void) + clock[i].clk_name); + if (ret) + continue; +- debug("clk name:%s, Valid:%d, type:%d, clk_id:0x%x\n", ++printf("clk name:%s, Valid:%d, type:%d, clk_id:0x%x\n", + clock[i].clk_name, clock[i].valid, + clock[i].type, clock[i].clk_id); + } +@@ -589,7 +589,7 @@ static void versal_get_clock_info(void) + ret = versal_get_clock_type(i, &type); + if (ret || type != CLK_TYPE_OUTPUT) + continue; +- debug("clk name:%s\n", clock[i].clk_name); ++printf("clk name:%s\n", clock[i].clk_name); + ret = versal_clock_get_topology(i, clock[i].node, + &clock[i].num_nodes); + if (ret) +@@ -610,7 +610,7 @@ int versal_clock_setup(void) + if (ret) + return ret; + +- debug("%s, clock_max_idx:0x%x\n", __func__, clock_max_idx); ++printf("%s, clock_max_idx:0x%x\n", __func__, clock_max_idx); + clock = calloc(clock_max_idx, sizeof(*clock)); + if (!clock) + return -ENOMEM; +@@ -646,7 +646,7 @@ static int versal_clk_probe(struct udevice *dev) + int ret; + struct versal_clk_priv *priv = dev_get_priv(dev); + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + ret = versal_clock_get_freq_by_name("pl_alt_ref_clk", + dev, &pl_alt_ref_clk); +@@ -671,7 +671,7 @@ static ulong versal_clk_get_rate(struct clk *clk) + u32 clk_id; + u64 clk_rate = 0; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + clk_id = priv->clk[id].clk_id; + +@@ -689,7 +689,7 @@ static ulong versal_clk_set_rate(struct clk *clk, ulong rate) + u32 div; + int ret; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + clk_id = priv->clk[id].clk_id; + +@@ -705,7 +705,7 @@ static ulong versal_clk_set_rate(struct clk *clk, ulong rate) + clk_rate *= div; + div = DIV_ROUND_CLOSEST(clk_rate, rate); + versal_clock_set_div(clk_id, div); +- debug("%s, div:%d, newrate:%lld\n", __func__, ++printf("%s, div:%d, newrate:%lld\n", __func__, + div, DIV_ROUND_CLOSEST(clk_rate, div)); + return DIV_ROUND_CLOSEST(clk_rate, div); + } +diff --git a/drivers/clk/clk_vexpress_osc.c b/drivers/clk/clk_vexpress_osc.c +index 3b1e0208d..3af655343 100644 +--- a/drivers/clk/clk_vexpress_osc.c ++++ b/drivers/clk/clk_vexpress_osc.c +@@ -91,7 +91,7 @@ static int vexpress_osc_clk_probe(struct udevice *dev) + return -EINVAL; + } + priv->osc = values[1]; +- debug("clk \"%s%d\", min freq %luHz, max freq %luHz\n", dev->name, ++printf("clk \"%s%d\", min freq %luHz, max freq %luHz\n", dev->name, + priv->osc, priv->rate_min, priv->rate_max); + + return 0; +diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c +index 18915c3e0..0fa76e5f3 100644 +--- a/drivers/clk/clk_zynq.c ++++ b/drivers/clk/clk_zynq.c +@@ -281,7 +281,7 @@ static ulong zynq_clk_get_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id) + if (parent->dev) + return clk_get_rate(parent); + +- debug("%s: gem%d emio rx clock source unknown\n", __func__, ++printf("%s: gem%d emio rx clock source unknown\n", __func__, + id - gem0_clk); + + return -ENOSYS; +@@ -360,7 +360,7 @@ static ulong zynq_clk_set_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id, + if (parent->dev) + return clk_set_rate(parent, rate); + +- debug("%s: gem%d emio rx clock source unknown\n", __func__, ++printf("%s: gem%d emio rx clock source unknown\n", __func__, + id - gem0_clk); + + return -ENOSYS; +diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c +index 13a623fdb..12588d3c5 100644 +--- a/drivers/clk/clk_zynqmp.c ++++ b/drivers/clk/clk_zynqmp.c +@@ -315,7 +315,7 @@ static u32 zynqmp_clk_get_register(enum zynqmp_clk id) + case iopll_to_fpd: + return CRL_APB_IOPLL_TO_FPD_CTRL; + default: +- debug("Invalid clk id%d\n", id); ++printf("Invalid clk id%d\n", id); + } + return 0; + } +@@ -768,7 +768,7 @@ static int zynqmp_clk_probe(struct udevice *dev) + int ret; + struct zynqmp_clk_priv *priv = dev_get_priv(dev); + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + ret = zynqmp_get_freq_by_name("pss_ref_clk", dev, &priv->ps_clk_freq); + if (ret < 0) + return -EINVAL; +@@ -801,7 +801,7 @@ static int zynqmp_clk_enable(struct clk *clk) + int ret; + + reg = zynqmp_clk_get_register(id); +- debug("%s, clk_id:%x, clk_base:0x%x\n", __func__, id, reg); ++printf("%s, clk_id:%x, clk_base:0x%x\n", __func__, id, reg); + + switch (id) { + case usb0_bus_ref ... usb1: +diff --git a/drivers/clk/ics8n3qv01.c b/drivers/clk/ics8n3qv01.c +index 6bc1b8ba9..a9e9b0102 100644 +--- a/drivers/clk/ics8n3qv01.c ++++ b/drivers/clk/ics8n3qv01.c +@@ -43,7 +43,7 @@ static int ics8n3qv01_get_fout_calc(struct udevice *dev, uint index, + u8 tmp = dm_i2c_reg_read(dev, 4 * i + index); + + if (tmp < 0) { +- debug("%s: Error while reading i2c register %d.\n", ++printf("%s: Error while reading i2c register %d.\n", + dev->name, 4 * i + index); + return tmp; + } +@@ -124,7 +124,7 @@ static ulong ics8n3qv01_set_rate(struct clk *clk, ulong fout) + res = ics8n3qv01_get_fout_calc(clk->dev, 1, &fout_calc); + + if (res) { +- debug("%s: Error during output frequency calculation.\n", ++printf("%s: Error during output frequency calculation.\n", + clk->dev->name); + return res; + } +@@ -137,7 +137,7 @@ static ulong ics8n3qv01_set_rate(struct clk *clk, ulong fout) + res = ics8n3qv01_calc_parameters(fout_prog, &mint, &mfrac, &n); + + if (res) { +- debug("%s: Cannot determine mint parameter.\n", ++printf("%s: Cannot determine mint parameter.\n", + clk->dev->name); + return res; + } +diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c +index 494156751..d9d6a055a 100644 +--- a/drivers/clk/imx/clk-composite-8m.c ++++ b/drivers/clk/imx/clk-composite-8m.c +@@ -39,7 +39,7 @@ static unsigned long imx8m_clk_composite_divider_recalc_rate(struct clk *clk) + unsigned int prediv_value; + unsigned int div_value; + +- debug("%s: name %s prate: %lu reg: %p\n", __func__, ++printf("%s: name %s prate: %lu reg: %p\n", __func__, + (&composite->clk)->dev->name, parent_rate, divider->reg); + prediv_value = readl(divider->reg) >> divider->shift; + prediv_value &= clk_div_mask(divider->width); +diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c +index 5343036ba..9d48d9d82 100644 +--- a/drivers/clk/imx/clk-imx6q.c ++++ b/drivers/clk/imx/clk-imx6q.c +@@ -29,7 +29,7 @@ static ulong imx6q_clk_get_rate(struct clk *clk) + struct clk *c; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + ret = imx6q_check_id(clk->id); + if (ret) +@@ -44,7 +44,7 @@ static ulong imx6q_clk_get_rate(struct clk *clk) + + static ulong imx6q_clk_set_rate(struct clk *clk, unsigned long rate) + { +- debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); ++printf("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + return rate; + } +@@ -54,7 +54,7 @@ static int __imx6q_clk_enable(struct clk *clk, bool enable) + struct clk *c; + int ret = 0; + +- debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); ++printf("%s(#%lu) en: %d\n", __func__, clk->id, enable); + + ret = imx6q_check_id(clk->id); + if (ret) +diff --git a/drivers/clk/imx/clk-imx8.c b/drivers/clk/imx/clk-imx8.c +index b3dc138c4..4b6b08fab 100644 +--- a/drivers/clk/imx/clk-imx8.c ++++ b/drivers/clk/imx/clk-imx8.c +@@ -61,7 +61,7 @@ int soc_clk_dump(void) + clk.id = imx8_clk_names[i].id; + ret = clk_request(dev, &clk); + if (ret < 0) { +- debug("%s clk_request() failed: %d\n", __func__, ret); ++printf("%s clk_request() failed: %d\n", __func__, ret); + continue; + } + +diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c +index d32ff8409..493b22dd0 100644 +--- a/drivers/clk/imx/clk-imx8mm.c ++++ b/drivers/clk/imx/clk-imx8mm.c +@@ -136,7 +136,7 @@ static ulong imx8mm_clk_get_rate(struct clk *clk) + struct clk *c; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -150,7 +150,7 @@ static ulong imx8mm_clk_set_rate(struct clk *clk, unsigned long rate) + struct clk *c; + int ret; + +- debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); ++printf("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -164,7 +164,7 @@ static int __imx8mm_clk_enable(struct clk *clk, bool enable) + struct clk *c; + int ret; + +- debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); ++printf("%s(#%lu) en: %d\n", __func__, clk->id, enable); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -193,7 +193,7 @@ static int imx8mm_clk_set_parent(struct clk *clk, struct clk *parent) + struct clk *c, *cp; + int ret; + +- debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); ++printf("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c +index e398d7de0..35aad3b6e 100644 +--- a/drivers/clk/imx/clk-imx8mn.c ++++ b/drivers/clk/imx/clk-imx8mn.c +@@ -153,7 +153,7 @@ static ulong imx8mn_clk_get_rate(struct clk *clk) + struct clk *c; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -167,7 +167,7 @@ static ulong imx8mn_clk_set_rate(struct clk *clk, unsigned long rate) + struct clk *c; + int ret; + +- debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); ++printf("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -181,7 +181,7 @@ static int __imx8mn_clk_enable(struct clk *clk, bool enable) + struct clk *c; + int ret; + +- debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); ++printf("%s(#%lu) en: %d\n", __func__, clk->id, enable); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -210,7 +210,7 @@ static int imx8mn_clk_set_parent(struct clk *clk, struct clk *parent) + struct clk *c, *cp; + int ret; + +- debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); ++printf("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c +index c77500bcc..642a58a42 100644 +--- a/drivers/clk/imx/clk-imx8mp.c ++++ b/drivers/clk/imx/clk-imx8mp.c +@@ -192,7 +192,7 @@ static ulong imx8mp_clk_get_rate(struct clk *clk) + struct clk *c; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -206,7 +206,7 @@ static ulong imx8mp_clk_set_rate(struct clk *clk, unsigned long rate) + struct clk *c; + int ret; + +- debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); ++printf("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -220,7 +220,7 @@ static int __imx8mp_clk_enable(struct clk *clk, bool enable) + struct clk *c; + int ret; + +- debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); ++printf("%s(#%lu) en: %d\n", __func__, clk->id, enable); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -249,7 +249,7 @@ static int imx8mp_clk_set_parent(struct clk *clk, struct clk *parent) + struct clk *c, *cp; + int ret; + +- debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); ++printf("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c +index 7759dc63e..66568e8ba 100644 +--- a/drivers/clk/imx/clk-imx8qm.c ++++ b/drivers/clk/imx/clk-imx8qm.c +@@ -46,7 +46,7 @@ ulong imx8_clk_get_rate(struct clk *clk) + u16 resource; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + switch (clk->id) { + case IMX8QM_A53_DIV: +@@ -153,7 +153,7 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) + u16 resource; + int ret; + +- debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); ++printf("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + switch (clk->id) { + case IMX8QM_I2C0_IPG_CLK: +@@ -255,7 +255,7 @@ int __imx8_clk_enable(struct clk *clk, bool enable) + u16 resource; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + switch (clk->id) { + case IMX8QM_I2C0_IPG_CLK: +diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c +index ffa2fcee0..3323f6e22 100644 +--- a/drivers/clk/imx/clk-imx8qxp.c ++++ b/drivers/clk/imx/clk-imx8qxp.c +@@ -49,7 +49,7 @@ ulong imx8_clk_get_rate(struct clk *clk) + u16 resource; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + switch (clk->id) { + case IMX8QXP_A35_DIV: +@@ -146,7 +146,7 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) + u16 resource; + int ret; + +- debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); ++printf("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + switch (clk->id) { + case IMX8QXP_I2C0_CLK: +@@ -239,7 +239,7 @@ int __imx8_clk_enable(struct clk *clk, bool enable) + u16 resource; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + switch (clk->id) { + case IMX8QXP_I2C0_CLK: +diff --git a/drivers/clk/imx/clk-imxrt1020.c b/drivers/clk/imx/clk-imxrt1020.c +index 840f78394..783aed102 100644 +--- a/drivers/clk/imx/clk-imxrt1020.c ++++ b/drivers/clk/imx/clk-imxrt1020.c +@@ -19,7 +19,7 @@ static ulong imxrt1020_clk_get_rate(struct clk *clk) + struct clk *c; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -33,7 +33,7 @@ static ulong imxrt1020_clk_set_rate(struct clk *clk, unsigned long rate) + struct clk *c; + int ret; + +- debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); ++printf("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -47,7 +47,7 @@ static int __imxrt1020_clk_enable(struct clk *clk, bool enable) + struct clk *c; + int ret; + +- debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); ++printf("%s(#%lu) en: %d\n", __func__, clk->id, enable); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c +index 3e1716100..3b16c69ec 100644 +--- a/drivers/clk/imx/clk-imxrt1050.c ++++ b/drivers/clk/imx/clk-imxrt1050.c +@@ -20,7 +20,7 @@ static ulong imxrt1050_clk_get_rate(struct clk *clk) + struct clk *c; + int ret; + +- debug("%s(#%lu)\n", __func__, clk->id); ++printf("%s(#%lu)\n", __func__, clk->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -34,7 +34,7 @@ static ulong imxrt1050_clk_set_rate(struct clk *clk, ulong rate) + struct clk *c; + int ret; + +- debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); ++printf("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -48,7 +48,7 @@ static int __imxrt1050_clk_enable(struct clk *clk, bool enable) + struct clk *c; + int ret; + +- debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); ++printf("%s(#%lu) en: %d\n", __func__, clk->id, enable); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +@@ -77,7 +77,7 @@ static int imxrt1050_clk_set_parent(struct clk *clk, struct clk *parent) + struct clk *c, *cp; + int ret; + +- debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); ++printf("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) +diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c +index 259ea3359..2baa359cf 100644 +--- a/drivers/clk/mediatek/clk-mt7622.c ++++ b/drivers/clk/mediatek/clk-mt7622.c +@@ -624,7 +624,7 @@ static int mt7622_pciesys_bind(struct udevice *dev) + if (IS_ENABLED(CONFIG_RESET_MEDIATEK)) { + ret = mediatek_reset_bind(dev, ETHSYS_HIFSYS_RST_CTRL_OFS, 1); + if (ret) +- debug("Warning: failed to bind reset controller\n"); ++printf("Warning: failed to bind reset controller\n"); + } + + return ret; +@@ -642,7 +642,7 @@ static int mt7622_ethsys_bind(struct udevice *dev) + #if CONFIG_IS_ENABLED(RESET_MEDIATEK) + ret = mediatek_reset_bind(dev, ETHSYS_HIFSYS_RST_CTRL_OFS, 1); + if (ret) +- debug("Warning: failed to bind reset controller\n"); ++printf("Warning: failed to bind reset controller\n"); + #endif + + return ret; +diff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c +index 0c7411ee8..c4f33b54a 100644 +--- a/drivers/clk/mediatek/clk-mt7623.c ++++ b/drivers/clk/mediatek/clk-mt7623.c +@@ -805,7 +805,7 @@ static int mt7623_ethsys_hifsys_bind(struct udevice *dev) + #if CONFIG_IS_ENABLED(RESET_MEDIATEK) + ret = mediatek_reset_bind(dev, ETHSYS_HIFSYS_RST_CTRL_OFS, 1); + if (ret) +- debug("Warning: failed to bind reset controller\n"); ++printf("Warning: failed to bind reset controller\n"); + #endif + + return ret; +diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c +index 31b6fa022..7c9f5e669 100644 +--- a/drivers/clk/mediatek/clk-mt7629.c ++++ b/drivers/clk/mediatek/clk-mt7629.c +@@ -635,7 +635,7 @@ static int mt7629_ethsys_bind(struct udevice *dev) + #if CONFIG_IS_ENABLED(RESET_MEDIATEK) + ret = mediatek_reset_bind(dev, ETHSYS_HIFSYS_RST_CTRL_OFS, 1); + if (ret) +- debug("Warning: failed to bind reset controller\n"); ++printf("Warning: failed to bind reset controller\n"); + #endif + + return ret; +diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c +index d6da59d26..03a4cc97f 100644 +--- a/drivers/clk/meson/axg.c ++++ b/drivers/clk/meson/axg.c +@@ -276,7 +276,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) + return -ENOENT; + } + +- debug("clock %lu has rate %lu\n", id, rate); ++printf("clock %lu has rate %lu\n", id, rate); + return rate; + } + +@@ -300,7 +300,7 @@ static int meson_clk_probe(struct udevice *dev) + regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); + regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0); + +- debug("meson-clk-axg: probed\n"); ++printf("meson-clk-axg: probed\n"); + + return 0; + } +diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c +index e4fed8ddf..7ffd8b1d8 100644 +--- a/drivers/clk/meson/g12a.c ++++ b/drivers/clk/meson/g12a.c +@@ -149,7 +149,7 @@ static int meson_set_gate_by_id(struct clk *clk, unsigned long id, bool on) + struct meson_clk *priv = dev_get_priv(clk->dev); + struct meson_gate *gate; + +- debug("%s: %sabling %ld\n", __func__, on ? "en" : "dis", id); ++printf("%s: %sabling %ld\n", __func__, on ? "en" : "dis", id); + + /* Propagate through muxes */ + switch (id) { +@@ -169,7 +169,7 @@ static int meson_set_gate_by_id(struct clk *clk, unsigned long id, bool on) + if (gate->reg == 0) + return 0; + +- debug("%s: really %sabling %ld\n", __func__, on ? "en" : "dis", id); ++printf("%s: really %sabling %ld\n", __func__, on ? "en" : "dis", id); + + regmap_update_bits(priv->map, gate->reg, + BIT(gate->bit), on ? BIT(gate->bit) : 0); +@@ -271,17 +271,17 @@ static ulong meson_div_get_rate(struct clk *clk, unsigned long id) + regmap_read(priv->map, parm->reg_off, ®); + reg = PARM_GET(parm->width, parm->shift, reg); + +- debug("%s: div of %ld is %d\n", __func__, id, reg + 1); ++printf("%s: div of %ld is %d\n", __func__, id, reg + 1); + + parent_rate = meson_clk_get_rate_by_id(clk, parent); + if (IS_ERR_VALUE(parent_rate)) + return parent_rate; + +- debug("%s: parent rate of %ld is %d\n", __func__, id, parent_rate); ++printf("%s: parent rate of %ld is %d\n", __func__, id, parent_rate); + + rate = parent_rate / (reg + 1); + +- debug("%s: rate of %ld is %d\n", __func__, id, rate); ++printf("%s: rate of %ld is %d\n", __func__, id, rate); + + return rate; + } +@@ -299,7 +299,7 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, + if (current_rate == rate) + return 0; + +- debug("%s: setting rate of %ld from %ld to %ld\n", ++printf("%s: setting rate of %ld from %ld to %ld\n", + __func__, id, current_rate, rate); + + switch (id) { +@@ -331,7 +331,7 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, + if (IS_ERR_VALUE(parent_rate)) + return parent_rate; + +- debug("%s: parent rate of %ld is %ld\n", __func__, id, parent_rate); ++printf("%s: parent rate of %ld is %ld\n", __func__, id, parent_rate); + + /* If can't divide, set parent instead */ + if (!parent_rate || rate > parent_rate) +@@ -340,7 +340,7 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, + + new_div = DIV_ROUND_CLOSEST(parent_rate, rate); + +- debug("%s: new div of %ld is %d\n", __func__, id, new_div); ++printf("%s: new div of %ld is %d\n", __func__, id, new_div); + + /* If overflow, try to set parent rate and retry */ + if (!new_div || new_div > (1 << parm->width)) { +@@ -354,19 +354,19 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, + + new_div = DIV_ROUND_CLOSEST(parent_rate, rate); + +- debug("%s: new new div of %ld is %d\n", __func__, id, new_div); ++printf("%s: new new div of %ld is %d\n", __func__, id, new_div); + + if (!new_div || new_div > (1 << parm->width)) + return -EINVAL; + } + +- debug("%s: setting div of %ld to %d\n", __func__, id, new_div); ++printf("%s: setting div of %ld to %d\n", __func__, id, new_div); + + regmap_update_bits(priv->map, parm->reg_off, + SETPMASK(parm->width, parm->shift), + (new_div - 1) << parm->shift); + +- debug("%s: new rate of %ld is %ld\n", ++printf("%s: new rate of %ld is %ld\n", + __func__, id, meson_div_get_rate(clk, id)); + + return 0; +@@ -478,7 +478,7 @@ static ulong meson_mux_get_parent(struct clk *clk, unsigned long id) + regmap_read(priv->map, parm->reg_off, ®); + reg = PARM_GET(parm->width, parm->shift, reg); + +- debug("%s: parent of %ld is %d (%d)\n", ++printf("%s: parent of %ld is %d (%d)\n", + __func__, id, parents[reg], reg); + + return parents[reg]; +@@ -497,7 +497,7 @@ static ulong meson_mux_set_parent(struct clk *clk, unsigned long id, + if (IS_ERR_VALUE(cur_parent)) + return cur_parent; + +- debug("%s: setting parent of %ld from %ld to %ld\n", ++printf("%s: setting parent of %ld from %ld to %ld\n", + __func__, id, cur_parent, parent_id); + + if (cur_parent == parent_id) +@@ -545,13 +545,13 @@ static ulong meson_mux_set_parent(struct clk *clk, unsigned long id, + if (IS_ERR_VALUE(new_index)) + return new_index; + +- debug("%s: new index of %ld is %d\n", __func__, id, new_index); ++printf("%s: new index of %ld is %d\n", __func__, id, new_index); + + regmap_update_bits(priv->map, parm->reg_off, + SETPMASK(parm->width, parm->shift), + new_index << parm->shift); + +- debug("%s: new parent of %ld is %ld\n", ++printf("%s: new parent of %ld is %ld\n", + __func__, id, meson_mux_get_parent(clk, id)); + + return 0; +@@ -855,7 +855,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) + return -ENOENT; + } + +- debug("clock %lu has rate %lu\n", id, rate); ++printf("clock %lu has rate %lu\n", id, rate); + return rate; + } + +@@ -964,14 +964,14 @@ static ulong meson_clk_set_rate(struct clk *clk, ulong rate) + if (IS_ERR_VALUE(current_rate)) + return current_rate; + +- debug("%s: setting rate of %ld from %ld to %ld\n", ++printf("%s: setting rate of %ld from %ld to %ld\n", + __func__, clk->id, current_rate, rate); + + ret = meson_clk_set_rate_by_id(clk, clk->id, rate, current_rate); + if (IS_ERR_VALUE(ret)) + return ret; + +- debug("clock %lu has new rate %lu\n", clk->id, ++printf("clock %lu has new rate %lu\n", clk->id, + meson_clk_get_rate_by_id(clk, clk->id)); + + return 0; +@@ -992,7 +992,7 @@ static int meson_clk_probe(struct udevice *dev) + regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); + regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0); + +- debug("meson-clk-g12a: probed\n"); ++printf("meson-clk-g12a: probed\n"); + + return 0; + } +diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c +index e379540de..63a1c2069 100644 +--- a/drivers/clk/meson/gxbb.c ++++ b/drivers/clk/meson/gxbb.c +@@ -200,7 +200,7 @@ static int meson_set_gate_by_id(struct clk *clk, unsigned long id, bool on) + struct meson_clk *priv = dev_get_priv(clk->dev); + struct meson_gate *gate; + +- debug("%s: %sabling %ld\n", __func__, on ? "en" : "dis", id); ++printf("%s: %sabling %ld\n", __func__, on ? "en" : "dis", id); + + /* Propagate through muxes */ + switch (id) { +@@ -220,7 +220,7 @@ static int meson_set_gate_by_id(struct clk *clk, unsigned long id, bool on) + if (gate->reg == 0) + return 0; + +- debug("%s: really %sabling %ld\n", __func__, on ? "en" : "dis", id); ++printf("%s: really %sabling %ld\n", __func__, on ? "en" : "dis", id); + + regmap_update_bits(priv->map, gate->reg, + BIT(gate->bit), on ? BIT(gate->bit) : 0); +@@ -300,17 +300,17 @@ static ulong meson_div_get_rate(struct clk *clk, unsigned long id) + regmap_read(priv->map, parm->reg_off, ®); + reg = PARM_GET(parm->width, parm->shift, reg); + +- debug("%s: div of %ld is %d\n", __func__, id, reg + 1); ++printf("%s: div of %ld is %d\n", __func__, id, reg + 1); + + parent_rate = meson_clk_get_rate_by_id(clk, parent); + if (IS_ERR_VALUE(parent_rate)) + return parent_rate; + +- debug("%s: parent rate of %ld is %d\n", __func__, id, parent_rate); ++printf("%s: parent rate of %ld is %d\n", __func__, id, parent_rate); + + rate = parent_rate / (reg + 1); + +- debug("%s: rate of %ld is %d\n", __func__, id, rate); ++printf("%s: rate of %ld is %d\n", __func__, id, rate); + + return rate; + } +@@ -328,7 +328,7 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, + if (current_rate == rate) + return 0; + +- debug("%s: setting rate of %ld from %ld to %ld\n", ++printf("%s: setting rate of %ld from %ld to %ld\n", + __func__, id, current_rate, rate); + + switch (id) { +@@ -356,7 +356,7 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, + if (IS_ERR_VALUE(parent_rate)) + return parent_rate; + +- debug("%s: parent rate of %ld is %ld\n", __func__, id, parent_rate); ++printf("%s: parent rate of %ld is %ld\n", __func__, id, parent_rate); + + /* If can't divide, set parent instead */ + if (!parent_rate || rate > parent_rate) +@@ -365,7 +365,7 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, + + new_div = DIV_ROUND_CLOSEST(parent_rate, rate); + +- debug("%s: new div of %ld is %d\n", __func__, id, new_div); ++printf("%s: new div of %ld is %d\n", __func__, id, new_div); + + /* If overflow, try to set parent rate and retry */ + if (!new_div || new_div > (1 << parm->width)) { +@@ -379,18 +379,18 @@ static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, + + new_div = DIV_ROUND_CLOSEST(parent_rate, rate); + +- debug("%s: new new div of %ld is %d\n", __func__, id, new_div); ++printf("%s: new new div of %ld is %d\n", __func__, id, new_div); + + if (!new_div || new_div > (1 << parm->width)) + return -EINVAL; + } + +- debug("%s: setting div of %ld to %d\n", __func__, id, new_div); ++printf("%s: setting div of %ld to %d\n", __func__, id, new_div); + + regmap_update_bits(priv->map, parm->reg_off, SETPMASK(parm->width, parm->shift), + (new_div - 1) << parm->shift); + +- debug("%s: new rate of %ld is %ld\n", ++printf("%s: new rate of %ld is %ld\n", + __func__, id, meson_div_get_rate(clk, id)); + + return 0; +@@ -483,7 +483,7 @@ static ulong meson_mux_get_parent(struct clk *clk, unsigned long id) + regmap_read(priv->map, parm->reg_off, ®); + reg = PARM_GET(parm->width, parm->shift, reg); + +- debug("%s: parent of %ld is %d (%d)\n", ++printf("%s: parent of %ld is %d (%d)\n", + __func__, id, parents[reg], reg); + + return parents[reg]; +@@ -502,7 +502,7 @@ static ulong meson_mux_set_parent(struct clk *clk, unsigned long id, + if (IS_ERR_VALUE(cur_parent)) + return cur_parent; + +- debug("%s: setting parent of %ld from %ld to %ld\n", ++printf("%s: setting parent of %ld from %ld to %ld\n", + __func__, id, cur_parent, parent_id); + + if (cur_parent == parent_id) +@@ -546,12 +546,12 @@ static ulong meson_mux_set_parent(struct clk *clk, unsigned long id, + if (IS_ERR_VALUE(new_index)) + return new_index; + +- debug("%s: new index of %ld is %d\n", __func__, id, new_index); ++printf("%s: new index of %ld is %d\n", __func__, id, new_index); + + regmap_update_bits(priv->map, parm->reg_off, SETPMASK(parm->width, parm->shift), + new_index << parm->shift); + +- debug("%s: new parent of %ld is %ld\n", ++printf("%s: new parent of %ld is %ld\n", + __func__, id, meson_mux_get_parent(clk, id)); + + return 0; +@@ -793,7 +793,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) + return -ENOENT; + } + +- debug("clock %lu has rate %lu\n", id, rate); ++printf("clock %lu has rate %lu\n", id, rate); + return rate; + } + +@@ -868,14 +868,14 @@ static ulong meson_clk_set_rate(struct clk *clk, ulong rate) + if (IS_ERR_VALUE(current_rate)) + return current_rate; + +- debug("%s: setting rate of %ld from %ld to %ld\n", ++printf("%s: setting rate of %ld from %ld to %ld\n", + __func__, clk->id, current_rate, rate); + + ret = meson_clk_set_rate_by_id(clk, clk->id, rate, current_rate); + if (IS_ERR_VALUE(ret)) + return ret; + +- debug("clock %lu has new rate %lu\n", clk->id, ++printf("clock %lu has new rate %lu\n", clk->id, + meson_clk_get_rate_by_id(clk, clk->id)); + + return 0; +@@ -896,7 +896,7 @@ static int meson_clk_probe(struct udevice *dev) + regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); + regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0); + +- debug("meson-clk: probed\n"); ++printf("meson-clk: probed\n"); + + return 0; + } +diff --git a/drivers/clk/mpc83xx_clk.c b/drivers/clk/mpc83xx_clk.c +index 0255ccaf8..986c4bd5b 100644 +--- a/drivers/clk/mpc83xx_clk.c ++++ b/drivers/clk/mpc83xx_clk.c +@@ -114,13 +114,13 @@ static int init_single_clk(struct udevice *dev, int clk) + + ret = retrieve_mode(clk, type, &mode); + if (ret) { +- debug("%s: Could not retrieve mode for clk %d (ret = %d)\n", ++printf("%s: Could not retrieve mode for clk %d (ret = %d)\n", + dev->name, clk, ret); + return ret; + } + + if (mode.type == TYPE_INVALID) { +- debug("%s: clock %d invalid\n", dev->name, clk); ++printf("%s: clock %d invalid\n", dev->name, clk); + return -EINVAL; + } + +@@ -201,7 +201,7 @@ static int init_single_clk(struct udevice *dev, int clk) + ((corepll & 0x60) >> 5); + + if (corecnf_tab_index > (ARRAY_SIZE(corecnf_tab))) { +- debug("%s: Core configuration index %02x too high; possible wrong value", ++printf("%s: Core configuration index %02x too high; possible wrong value", + dev->name, corecnf_tab_index); + return -EINVAL; + } +@@ -232,7 +232,7 @@ static int init_single_clk(struct udevice *dev, int clk) + } + + /* Unknown clk value -> error */ +- debug("%s: clock %d invalid\n", dev->name, clk); ++printf("%s: clock %d invalid\n", dev->name, clk); + return -EINVAL; + } + +@@ -254,7 +254,7 @@ static inline int init_all_clks(struct udevice *dev) + + ret = init_single_clk(dev, i); + if (ret) { +- debug("%s: Failed to initialize %s clock\n", ++printf("%s: Failed to initialize %s clock\n", + dev->name, names[i]); + return ret; + } +@@ -277,7 +277,7 @@ static ulong mpc83xx_clk_get_rate(struct clk *clk) + struct mpc83xx_clk_priv *priv = dev_get_priv(clk->dev); + + if (clk->id >= MPC83XX_CLK_COUNT) { +- debug("%s: clock index %lu invalid\n", __func__, clk->id); ++printf("%s: clock index %lu invalid\n", __func__, clk->id); + return 0; + } + +@@ -304,7 +304,7 @@ int get_serial_clock(void) + + ret = uclass_first_device_err(UCLASS_CLK, &clk); + if (ret) { +- debug("%s: Could not get clock device\n", __func__); ++printf("%s: Could not get clock device\n", __func__); + return ret; + } + +@@ -339,7 +339,7 @@ static int mpc83xx_clk_probe(struct udevice *dev) + + ret = init_all_clks(dev); + if (ret) { +- debug("%s: Could not initialize all clocks (ret = %d)\n", ++printf("%s: Could not initialize all clocks (ret = %d)\n", + dev->name, ret); + return ret; + } +@@ -378,7 +378,7 @@ static int mpc83xx_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "mpc83xx_sysreset", "sysreset", + &sys_child); + if (ret) +- debug("%s: No sysreset driver: ret=%d\n", ++printf("%s: No sysreset driver: ret=%d\n", + dev->name, ret); + + return 0; +@@ -405,7 +405,7 @@ static int do_clocks(struct cmd_tbl *cmdtp, int flag, int argc, + + ret = uclass_first_device_err(UCLASS_CLK, &clk); + if (ret) { +- debug("%s: Could not get clock device\n", __func__); ++printf("%s: Could not get clock device\n", __func__); + return ret; + } + +diff --git a/drivers/clk/mpc83xx_clk.h b/drivers/clk/mpc83xx_clk.h +index 8a31a4c86..d189d12fb 100644 +--- a/drivers/clk/mpc83xx_clk.h ++++ b/drivers/clk/mpc83xx_clk.h +@@ -258,7 +258,7 @@ static int retrieve_mode(int clk, int soc_type, struct clk_mode *mode) + set_mode(mode, 26, 27, TYPE_SCCR_STANDARD); + break; + default: +- debug("%s: Unknown clock type %d on soc type %d\n", ++printf("%s: Unknown clock type %d on soc type %d\n", + __func__, clk, soc_type); + set_mode(mode, 0, 0, TYPE_INVALID); + return -EINVAL; +diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c +index d2d0169dd..4378fd0fa 100644 +--- a/drivers/clk/renesas/clk-rcar-gen2.c ++++ b/drivers/clk/renesas/clk-rcar-gen2.c +@@ -82,7 +82,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) + u32 value, mult, div, rate = 0; + int ret; + +- debug("%s[%i] Clock: id=%lu\n", __func__, __LINE__, clk->id); ++printf("%s[%i] Clock: id=%lu\n", __func__, __LINE__, clk->id); + + ret = renesas_clk_get_parent(clk, info, &parent); + if (ret) { +@@ -92,7 +92,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) + + if (renesas_clk_is_mod(clk)) { + rate = gen2_clk_get_rate(&parent); +- debug("%s[%i] MOD clk: parent=%lu => rate=%u\n", ++printf("%s[%i] MOD clk: parent=%lu => rate=%u\n", + __func__, __LINE__, parent.id, rate); + return rate; + } +@@ -105,14 +105,14 @@ static ulong gen2_clk_get_rate(struct clk *clk) + case CLK_TYPE_IN: + if (core->id == info->clk_extal_id) { + rate = clk_get_rate(&priv->clk_extal); +- debug("%s[%i] EXTAL clk: rate=%u\n", ++printf("%s[%i] EXTAL clk: rate=%u\n", + __func__, __LINE__, rate); + return rate; + } + + if (core->id == info->clk_extal_usb_id) { + rate = clk_get_rate(&priv->clk_extal_usb); +- debug("%s[%i] EXTALR clk: rate=%u\n", ++printf("%s[%i] EXTALR clk: rate=%u\n", + __func__, __LINE__, rate); + return rate; + } +@@ -121,7 +121,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) + + case CLK_TYPE_FF: + rate = (gen2_clk_get_rate(&parent) * core->mult) / core->div; +- debug("%s[%i] FIXED clk: parent=%i mul=%i div=%i => rate=%u\n", ++printf("%s[%i] FIXED clk: parent=%i mul=%i div=%i => rate=%u\n", + __func__, __LINE__, + core->parent, core->mult, core->div, rate); + return rate; +@@ -129,14 +129,14 @@ static ulong gen2_clk_get_rate(struct clk *clk) + case CLK_TYPE_DIV6P1: /* DIV6 Clock with 1 parent clock */ + value = (readl(priv->base + core->offset) & 0x3f) + 1; + rate = gen2_clk_get_rate(&parent) / value; +- debug("%s[%i] DIV6P1 clk: parent=%i div=%i => rate=%u\n", ++printf("%s[%i] DIV6P1 clk: parent=%i div=%i => rate=%u\n", + __func__, __LINE__, + core->parent, value, rate); + return rate; + + case CLK_TYPE_GEN2_MAIN: + rate = gen2_clk_get_rate(&parent) / pll_config->extal_div; +- debug("%s[%i] MAIN clk: parent=%i extal_div=%i => rate=%u\n", ++printf("%s[%i] MAIN clk: parent=%i extal_div=%i => rate=%u\n", + __func__, __LINE__, + core->parent, pll_config->extal_div, rate); + return rate; +@@ -155,20 +155,20 @@ static ulong gen2_clk_get_rate(struct clk *clk) + } + + rate = (gen2_clk_get_rate(&parent) * mult) / info->pll0_div; +- debug("%s[%i] PLL0 clk: parent=%i mult=%u => rate=%u\n", ++printf("%s[%i] PLL0 clk: parent=%i mult=%u => rate=%u\n", + __func__, __LINE__, core->parent, mult, rate); + return rate; + + case CLK_TYPE_GEN2_PLL1: + rate = (gen2_clk_get_rate(&parent) * pll_config->pll1_mult) / 2; +- debug("%s[%i] PLL1 clk: parent=%i mul=%i => rate=%u\n", ++printf("%s[%i] PLL1 clk: parent=%i mul=%i => rate=%u\n", + __func__, __LINE__, + core->parent, pll_config->pll1_mult, rate); + return rate; + + case CLK_TYPE_GEN2_PLL3: + rate = gen2_clk_get_rate(&parent) * pll_config->pll3_mult; +- debug("%s[%i] PLL3 clk: parent=%i mul=%i => rate=%u\n", ++printf("%s[%i] PLL3 clk: parent=%i mul=%i => rate=%u\n", + __func__, __LINE__, + core->parent, pll_config->pll3_mult, rate); + return rate; +@@ -177,7 +177,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) + value = (readl(priv->base + CPG_SDCKCR) >> 8) & 0xf; + div = gen2_clk_get_sdh_div(cpg_sdh_div_table, value); + rate = gen2_clk_get_rate(&parent) / div; +- debug("%s[%i] SDH clk: parent=%i div=%i => rate=%u\n", ++printf("%s[%i] SDH clk: parent=%i div=%i => rate=%u\n", + __func__, __LINE__, + core->parent, div, rate); + return rate; +@@ -186,7 +186,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) + value = (readl(priv->base + CPG_SDCKCR) >> 4) & 0xf; + div = gen2_clk_get_sdh_div(cpg_sd01_div_table, value); + rate = gen2_clk_get_rate(&parent) / div; +- debug("%s[%i] SD0 clk: parent=%i div=%i => rate=%u\n", ++printf("%s[%i] SD0 clk: parent=%i div=%i => rate=%u\n", + __func__, __LINE__, + core->parent, div, rate); + return rate; +@@ -195,7 +195,7 @@ static ulong gen2_clk_get_rate(struct clk *clk) + value = (readl(priv->base + CPG_SDCKCR) >> 0) & 0xf; + div = gen2_clk_get_sdh_div(cpg_sd01_div_table, value); + rate = gen2_clk_get_rate(&parent) / div; +- debug("%s[%i] SD1 clk: parent=%i div=%i => rate=%u\n", ++printf("%s[%i] SD1 clk: parent=%i div=%i => rate=%u\n", + __func__, __LINE__, + core->parent, div, rate); + return rate; +@@ -217,7 +217,7 @@ static int gen2_clk_setup_mmcif_div(struct clk *clk, ulong rate) + + ret = renesas_clk_get_parent(clk, info, &parent); + if (ret) { +- debug("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret); ++printf("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret); + return ret; + } + +@@ -233,13 +233,13 @@ static int gen2_clk_setup_mmcif_div(struct clk *clk, ulong rate) + + ret = renesas_clk_get_parent(&parent, info, &pparent); + if (ret) { +- debug("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret); ++printf("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret); + return ret; + } + + val = (gen2_clk_get_rate(&pparent) / rate) - 1; + +- debug("%s[%i] MMCIF offset=%x\n", __func__, __LINE__, core->offset); ++printf("%s[%i] MMCIF offset=%x\n", __func__, __LINE__, core->offset); + + writel(val, priv->base + core->offset); + +@@ -256,7 +256,7 @@ static ulong gen2_clk_set_rate(struct clk *clk, ulong rate) + static int gen2_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) + { + if (args->args_count != 2) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + +diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c +index 7b42e28e8..bc1c33ca2 100644 +--- a/drivers/clk/renesas/clk-rcar-gen3.c ++++ b/drivers/clk/renesas/clk-rcar-gen3.c +@@ -132,7 +132,7 @@ static int gen3_clk_setup_sdif_div(struct clk *clk, ulong rate) + if (core->type != CLK_TYPE_GEN3_SD) + return 0; + +- debug("%s[%i] SDIF offset=%x\n", __func__, __LINE__, core->offset); ++printf("%s[%i] SDIF offset=%x\n", __func__, __LINE__, core->offset); + + writel((rate == 400000000) ? 0x4 : 0x1, priv->base + core->offset); + +@@ -172,7 +172,7 @@ static u64 gen3_clk_get_rate64_pll_mul_reg(struct gen3_clk_priv *priv, + + rate = (gen3_clk_get_rate64(parent) * mult) / div; + +- debug("%s[%i] %s clk: parent=%i mult=%u div=%u => rate=%llu\n", ++printf("%s[%i] %s clk: parent=%i mult=%u div=%u => rate=%llu\n", + __func__, __LINE__, name, core->parent, mult, div, rate); + return rate; + } +@@ -189,7 +189,7 @@ static u64 gen3_clk_get_rate64(struct clk *clk) + u64 rate = 0; + int i, ret; + +- debug("%s[%i] Clock: id=%lu\n", __func__, __LINE__, clk->id); ++printf("%s[%i] Clock: id=%lu\n", __func__, __LINE__, clk->id); + + ret = gen3_clk_get_parent(priv, clk, info, &parent); + if (ret) { +@@ -199,7 +199,7 @@ static u64 gen3_clk_get_rate64(struct clk *clk) + + if (renesas_clk_is_mod(clk)) { + rate = gen3_clk_get_rate64(&parent); +- debug("%s[%i] MOD clk: parent=%lu => rate=%llu\n", ++printf("%s[%i] MOD clk: parent=%lu => rate=%llu\n", + __func__, __LINE__, parent.id, rate); + return rate; + } +@@ -212,14 +212,14 @@ static u64 gen3_clk_get_rate64(struct clk *clk) + case CLK_TYPE_IN: + if (core->id == info->clk_extal_id) { + rate = clk_get_rate(&priv->clk_extal); +- debug("%s[%i] EXTAL clk: rate=%llu\n", ++printf("%s[%i] EXTAL clk: rate=%llu\n", + __func__, __LINE__, rate); + return rate; + } + + if (core->id == info->clk_extalr_id) { + rate = clk_get_rate(&priv->clk_extalr); +- debug("%s[%i] EXTALR clk: rate=%llu\n", ++printf("%s[%i] EXTALR clk: rate=%llu\n", + __func__, __LINE__, rate); + return rate; + } +@@ -261,7 +261,7 @@ static u64 gen3_clk_get_rate64(struct clk *clk) + case CLK_TYPE_GEN3_MDSEL: + div = (core->div >> (priv->sscg ? 16 : 0)) & 0xffff; + rate = gen3_clk_get_rate64(&parent) / div; +- debug("%s[%i] PE clk: parent=%i div=%u => rate=%llu\n", ++printf("%s[%i] PE clk: parent=%i div=%u => rate=%llu\n", + __func__, __LINE__, + (core->parent >> (priv->sscg ? 16 : 0)) & 0xffff, + div, rate); +@@ -277,7 +277,7 @@ static u64 gen3_clk_get_rate64(struct clk *clk) + + rate = gen3_clk_get_rate64(&parent) / + cpg_sd_div_table[i].div; +- debug("%s[%i] SD clk: parent=%i div=%i => rate=%llu\n", ++printf("%s[%i] SD clk: parent=%i div=%i => rate=%llu\n", + __func__, __LINE__, + core->parent, cpg_sd_div_table[i].div, rate); + +@@ -310,7 +310,7 @@ static u64 gen3_clk_get_rate64(struct clk *clk) + if (core->type == CLK_TYPE_GEN3_RPCD2) + rate /= 2; + +- debug("%s[%i] RPC clk: parent=%i prediv=%i postdiv=%i => rate=%llu\n", ++printf("%s[%i] RPC clk: parent=%i prediv=%i postdiv=%i => rate=%llu\n", + __func__, __LINE__, + core->parent, prediv, postdiv, rate); + +@@ -341,7 +341,7 @@ static ulong gen3_clk_set_rate(struct clk *clk, ulong rate) + static int gen3_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) + { + if (args->args_count != 2) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + +diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c +index b1cf7f599..8b266ae34 100644 +--- a/drivers/clk/renesas/renesas-cpg-mssr.c ++++ b/drivers/clk/renesas/renesas-cpg-mssr.c +@@ -102,7 +102,7 @@ int renesas_clk_endisable(struct clk *clk, void __iomem *base, + if (!renesas_clk_is_mod(clk)) + return -EINVAL; + +- debug("%s[%i] MSTP %lu=%02u/%02u %s\n", __func__, __LINE__, ++printf("%s[%i] MSTP %lu=%02u/%02u %s\n", __func__, __LINE__, + clkid, reg, bit, enable ? "ON" : "OFF"); + + if (enable) { +diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c +index 83d45c75e..38e3c0586 100644 +--- a/drivers/clk/rockchip/clk_pll.c ++++ b/drivers/clk/rockchip/clk_pll.c +@@ -132,21 +132,21 @@ rockchip_pll_clk_set_by_auto(ulong fin_hz, + + rate_table->frac = 0; + +- debug("fin = %ld, fout = %ld, clk_gcd = %ld,\n", ++printf("fin = %ld, fout = %ld, clk_gcd = %ld,\n", + fin_hz, fout_hz, clk_gcd); +- debug("refdiv= %d,fbdiv= %d,postdiv1= %d,postdiv2= %d\n", ++printf("refdiv= %d,fbdiv= %d,postdiv1= %d,postdiv2= %d\n", + rate_table->refdiv, + rate_table->fbdiv, rate_table->postdiv1, + rate_table->postdiv2); + } else { +- debug("frac div,fin_hz = %ld,fout_hz = %ld\n", ++printf("frac div,fin_hz = %ld,fout_hz = %ld\n", + fin_hz, fout_hz); +- debug("frac get postdiv1 = %d, postdiv2 = %d, foutvco = %d\n", ++printf("frac get postdiv1 = %d, postdiv2 = %d, foutvco = %d\n", + rate_table->postdiv1, rate_table->postdiv2, foutvco); + clk_gcd = gcd(fin_hz / MHZ, foutvco / MHZ); + rate_table->refdiv = fin_hz / MHZ / clk_gcd; + rate_table->fbdiv = foutvco / MHZ / clk_gcd; +- debug("frac get refdiv = %d, fbdiv = %d\n", ++printf("frac get refdiv = %d, fbdiv = %d\n", + rate_table->refdiv, rate_table->fbdiv); + + rate_table->frac = 0; +@@ -159,7 +159,7 @@ rockchip_pll_clk_set_by_auto(ulong fin_hz, + rate_table->frac = frac_64; + if (rate_table->frac > 0) + rate_table->dsmpd = 0; +- debug("frac = %x\n", rate_table->frac); ++printf("frac = %x\n", rate_table->frac); + } + return rate_table; + } +@@ -192,9 +192,9 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll, + return -EINVAL; + } + +- debug("%s: rate settings for %lu fbdiv: %d, postdiv1: %d, refdiv: %d\n", ++printf("%s: rate settings for %lu fbdiv: %d, postdiv1: %d, refdiv: %d\n", + __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv); +- debug("%s: rate settings for %lu postdiv2: %d, dsmpd: %d, frac: %d\n", ++printf("%s: rate settings for %lu postdiv2: %d, dsmpd: %d, frac: %d\n", + __func__, rate->rate, rate->postdiv2, rate->dsmpd, rate->frac); + + /* +@@ -239,7 +239,7 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll, + + rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift, + RKCLK_PLL_MODE_NORMAL << pll->mode_shift); +- debug("PLL at %p: con0=%x con1= %x con2= %x mode= %x\n", ++printf("PLL at %p: con0=%x con1= %x con2= %x mode= %x\n", + pll, readl(base + pll->con_offset), + readl(base + pll->con_offset + 0x4), + readl(base + pll->con_offset + 0x8), +diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c +index 6b746f4c6..6327216db 100644 +--- a/drivers/clk/rockchip/clk_px30.c ++++ b/drivers/clk/rockchip/clk_px30.c +@@ -220,7 +220,7 @@ static int rkclk_set_pll(struct px30_pll *pll, unsigned int *mode, + vco_hz = OSC_HZ / 1000 * rate->fbdiv / rate->refdiv * 1000; + output_hz = vco_hz / rate->postdiv1 / rate->postdiv2; + +- debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n", ++printf("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n", + pll, rate->fbdiv, rate->refdiv, rate->postdiv1, + rate->postdiv2, vco_hz, output_hz); + assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && +@@ -433,7 +433,7 @@ static ulong px30_i2s_get_clk(struct px30_clk_priv *priv, ulong clk_id) + m >>= CLK_I2S1_FRAC_NUMERATOR_SHIFT; + n = fracdiv & CLK_I2S1_FRAC_DENOMINATOR_MASK; + n >>= CLK_I2S1_FRAC_DENOMINATOR_SHIFT; +- debug("con30: 0x%x, gate: 0x%x, frac: 0x%x\n", ++printf("con30: 0x%x, gate: 0x%x, frac: 0x%x\n", + con, gate, fracdiv); + break; + default: +@@ -1085,7 +1085,7 @@ static int px30_mac_set_speed_clk(struct px30_clk_priv *priv, uint hz) + struct px30_cru *cru = priv->cru; + + if (hz != 2500000 && hz != 25000000) { +- debug("Unsupported mac speed:%d\n", hz); ++printf("Unsupported mac speed:%d\n", hz); + return -EINVAL; + } + +@@ -1168,7 +1168,7 @@ static ulong px30_clk_get_rate(struct clk *clk) + return -ENOENT; + } + +- debug("%s %ld\n", __func__, clk->id); ++printf("%s %ld\n", __func__, clk->id); + switch (clk->id) { + case PLL_APLL: + rate = px30_clk_get_pll_rate(priv, APLL); +@@ -1257,7 +1257,7 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate) + return -ENOENT; + } + +- debug("%s %ld %ld\n", __func__, clk->id, rate); ++printf("%s %ld %ld\n", __func__, clk->id, rate); + switch (clk->id) { + case PLL_NPLL: + ret = px30_clk_set_pll_rate(priv, NPLL, rate); +@@ -1342,11 +1342,11 @@ static int px30_gmac_set_parent(struct clk *clk, struct clk *parent) + struct px30_cru *cru = priv->cru; + + if (parent->id == SCLK_GMAC_SRC) { +- debug("%s: switching GAMC to SCLK_GMAC_SRC\n", __func__); ++printf("%s: switching GAMC to SCLK_GMAC_SRC\n", __func__); + rk_clrsetreg(&cru->clksel_con[23], RMII_EXTCLK_SEL_MASK, + RMII_EXTCLK_SEL_INT << RMII_EXTCLK_SEL_SHIFT); + } else { +- debug("%s: switching GMAC to external clock\n", __func__); ++printf("%s: switching GMAC to external clock\n", __func__); + rk_clrsetreg(&cru->clksel_con[23], RMII_EXTCLK_SEL_MASK, + RMII_EXTCLK_SEL_EXT << RMII_EXTCLK_SEL_SHIFT); + } +@@ -1379,7 +1379,7 @@ static int px30_clk_enable(struct clk *clk) + return 0; + } + +- debug("%s: unsupported clk %ld\n", __func__, clk->id); ++printf("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; + } + +@@ -1453,7 +1453,7 @@ static int px30_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct px30_cru, +@@ -1467,7 +1467,7 @@ static int px30_clk_bind(struct udevice *dev) + ret = offsetof(struct px30_cru, softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 12); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return 0; +@@ -1554,7 +1554,7 @@ static ulong px30_pmuclk_get_rate(struct clk *clk) + struct px30_pmuclk_priv *priv = dev_get_priv(clk->dev); + ulong rate = 0; + +- debug("%s %ld\n", __func__, clk->id); ++printf("%s %ld\n", __func__, clk->id); + switch (clk->id) { + case PLL_GPLL: + rate = px30_pmuclk_get_gpll_rate(priv); +@@ -1574,7 +1574,7 @@ static ulong px30_pmuclk_set_rate(struct clk *clk, ulong rate) + struct px30_pmuclk_priv *priv = dev_get_priv(clk->dev); + ulong ret = 0; + +- debug("%s %ld %ld\n", __func__, clk->id, rate); ++printf("%s %ld %ld\n", __func__, clk->id, rate); + switch (clk->id) { + case PLL_GPLL: + ret = px30_pmuclk_set_gpll_rate(priv, rate); +diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c +index 026858459..6f2134f9e 100644 +--- a/drivers/clk/rockchip/clk_rk3036.c ++++ b/drivers/clk/rockchip/clk_rk3036.c +@@ -56,7 +56,7 @@ static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id, + uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000; + uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; + +- debug("PLL at %p: fbdiv=%d, refdiv=%d, postdiv1=%d, postdiv2=%d,\ ++printf("PLL at %p: fbdiv=%d, refdiv=%d, postdiv1=%d, postdiv2=%d,\ + vco=%u Hz, output=%u Hz\n", + pll, div->fbdiv, div->refdiv, div->postdiv1, + div->postdiv2, vco_hz, output_hz); +@@ -246,7 +246,7 @@ static ulong rockchip_mmc_set_clk(struct rk3036_cru *cru, uint clk_general_rate, + int src_clk_div; + int mux; + +- debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate); ++printf("%s: clk_general_rate=%u\n", __func__, clk_general_rate); + + /* mmc clock auto divide 2 in internal */ + src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq); +@@ -347,7 +347,7 @@ static int rk3036_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rk3036_cru, +@@ -361,7 +361,7 @@ static int rk3036_clk_bind(struct udevice *dev) + ret = offsetof(struct rk3036_cru, cru_softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 9); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return 0; +diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c +index d5b2b63dd..28c9836a8 100644 +--- a/drivers/clk/rockchip/clk_rk3128.c ++++ b/drivers/clk/rockchip/clk_rk3128.c +@@ -49,7 +49,7 @@ static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, + uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000; + uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; + +- debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n", ++printf("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n", + pll, div->fbdiv, div->refdiv, div->postdiv1, + div->postdiv2, vco_hz, output_hz); + assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && +@@ -314,7 +314,7 @@ static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, + int src_clk_div; + int mux; + +- debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate); ++printf("%s: clk_general_rate=%u\n", __func__, clk_general_rate); + + /* mmc clock defaulg div 2 internal, need provide double in cru */ + src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq); +@@ -575,7 +575,7 @@ static int rk3128_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rk3128_cru, +diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c +index 1b62d8d28..3a1062aac 100644 +--- a/drivers/clk/rockchip/clk_rk3188.c ++++ b/drivers/clk/rockchip/clk_rk3188.c +@@ -96,7 +96,7 @@ static int rkclk_set_pll(struct rk3188_cru *cru, enum rk_clk_id clk_id, + uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; + uint output_hz = vco_hz / div->no; + +- debug("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n", ++printf("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n", + (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); + assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && + output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ && +@@ -146,7 +146,7 @@ static int rkclk_configure_ddr(struct rk3188_cru *cru, struct rk3188_grf *grf, + cfg = 3; + break; + default: +- debug("Unsupported SDRAM frequency"); ++printf("Unsupported SDRAM frequency"); + return -EINVAL; + } + +@@ -195,7 +195,7 @@ static int rkclk_configure_cpu(struct rk3188_cru *cru, struct rk3188_grf *grf, + div_aclk_core = 3; + break; + default: +- debug("Unsupported ARMCLK frequency"); ++printf("Unsupported ARMCLK frequency"); + return -EINVAL; + } + +@@ -294,7 +294,7 @@ static ulong rockchip_mmc_set_clk(struct rk3188_cru *cru, uint gclk_rate, + { + int src_clk_div; + +- debug("%s: gclk_rate=%u\n", __func__, gclk_rate); ++printf("%s: gclk_rate=%u\n", __func__, gclk_rate); + /* mmc clock defaulg div 2 internal, need provide double in cru */ + src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq) - 1; + assert(src_clk_div <= 0x3f); +@@ -586,7 +586,7 @@ static int rk3188_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rk3188_cru, +@@ -600,7 +600,7 @@ static int rk3188_clk_bind(struct udevice *dev) + ret = offsetof(struct rk3188_cru, cru_softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 9); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return 0; +diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c +index dbef606d8..badecc553 100644 +--- a/drivers/clk/rockchip/clk_rk322x.c ++++ b/drivers/clk/rockchip/clk_rk322x.c +@@ -54,7 +54,7 @@ static int rkclk_set_pll(struct rk322x_cru *cru, enum rk_clk_id clk_id, + uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000; + uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; + +- debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n", ++printf("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n", + pll, div->fbdiv, div->refdiv, div->postdiv1, + div->postdiv2, vco_hz, output_hz); + assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && +@@ -270,7 +270,7 @@ static ulong rk322x_mac_set_clk(struct rk322x_cru *cru, uint freq) + rk_clrsetreg(&cru->cru_clksel_con[5], CLK_MAC_DIV_MASK, + div << CLK_MAC_DIV_SHIFT); + else +- debug("Unsupported div for gmac:%d\n", div); ++printf("Unsupported div for gmac:%d\n", div); + + return DIV_TO_RATE(pll_rate, div); + } +@@ -284,7 +284,7 @@ static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate, + int src_clk_div; + int mux; + +- debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate); ++printf("%s: clk_general_rate=%u\n", __func__, clk_general_rate); + + /* mmc clock defaulg div 2 internal, need provide double in cru */ + src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq); +@@ -414,7 +414,7 @@ static int rk322x_gmac_set_parent(struct clk *clk, struct clk *parent) + * is SCLK_MAC_SRC ("sclk_gmac_src"), switch to the internal clock. + */ + if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_SRC)) { +- debug("%s: switching RGMII to SCLK_MAC_SRC\n", __func__); ++printf("%s: switching RGMII to SCLK_MAC_SRC\n", __func__); + rk_clrsetreg(&cru->cru_clksel_con[5], BIT(5), 0); + return 0; + } +@@ -424,7 +424,7 @@ static int rk322x_gmac_set_parent(struct clk *clk, struct clk *parent) + * is SCLK_MAC_EXTCLK (sclk_mac_extclk), switch to the external clock. + */ + if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_EXTCLK)) { +- debug("%s: switching RGMII to SCLK_MAC_EXTCLK\n", __func__); ++printf("%s: switching RGMII to SCLK_MAC_EXTCLK\n", __func__); + rk_clrsetreg(&cru->cru_clksel_con[5], BIT(5), BIT(5)); + return 0; + } +@@ -445,11 +445,11 @@ static int rk322x_gmac_extclk_set_parent(struct clk *clk, struct clk *parent) + return -ENODATA; + + if (!strcmp(clock_output_name, "ext_gmac")) { +- debug("%s: switching gmac extclk to ext_gmac\n", __func__); ++printf("%s: switching gmac extclk to ext_gmac\n", __func__); + rk_clrsetreg(&cru->cru_clksel_con[29], BIT(10), 0); + return 0; + } else if (!strcmp(clock_output_name, "phy_50m_out")) { +- debug("%s: switching gmac extclk to phy_50m_out\n", __func__); ++printf("%s: switching gmac extclk to phy_50m_out\n", __func__); + rk_clrsetreg(&cru->cru_clksel_con[29], BIT(10), BIT(10)); + return 0; + } +@@ -466,7 +466,7 @@ static int rk322x_clk_set_parent(struct clk *clk, struct clk *parent) + return rk322x_gmac_extclk_set_parent(clk, parent); + } + +- debug("%s: unsupported clk %ld\n", __func__, clk->id); ++printf("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; + } + +@@ -504,7 +504,7 @@ static int rk322x_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rk322x_cru, +@@ -518,7 +518,7 @@ static int rk322x_clk_bind(struct udevice *dev) + ret = offsetof(struct rk322x_cru, cru_softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 9); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return 0; +diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c +index 221a5bd40..63abdb6ee 100644 +--- a/drivers/clk/rockchip/clk_rk3288.c ++++ b/drivers/clk/rockchip/clk_rk3288.c +@@ -157,7 +157,7 @@ static int rkclk_set_pll(struct rockchip_cru *cru, enum rk_clk_id clk_id, + uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; + uint output_hz = vco_hz / div->no; + +- debug("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n", ++printf("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n", + (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); + assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && + output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ && +@@ -204,7 +204,7 @@ static int rkclk_configure_ddr(struct rockchip_cru *cru, struct rk3288_grf *grf, + cfg = 3; + break; + default: +- debug("Unsupported SDRAM frequency"); ++printf("Unsupported SDRAM frequency"); + return -EINVAL; + } + +@@ -332,7 +332,7 @@ static int rockchip_mac_set_clk(struct rockchip_cru *cru, uint freq) + rk_clrsetreg(&cru->cru_clksel_con[21], MAC_DIV_CON_MASK, + div << MAC_DIV_CON_SHIFT); + else +- debug("Unsupported div for gmac:%d\n", div); ++printf("Unsupported div for gmac:%d\n", div); + + return DIV_TO_RATE(pll_rate, div); + } +@@ -614,7 +614,7 @@ static ulong rockchip_mmc_set_clk(struct rockchip_cru *cru, uint gclk_rate, + int src_clk_div; + int mux; + +- debug("%s: gclk_rate=%u\n", __func__, gclk_rate); ++printf("%s: gclk_rate=%u\n", __func__, gclk_rate); + /* mmc clock default div 2 internal, need provide double in cru */ + src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq); + +@@ -693,7 +693,7 @@ static ulong rockchip_spi_set_clk(struct rockchip_cru *cru, uint gclk_rate, + { + int src_clk_div; + +- debug("%s: clk_general_rate=%u\n", __func__, gclk_rate); ++printf("%s: clk_general_rate=%u\n", __func__, gclk_rate); + src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1; + assert(src_clk_div < 128); + switch (periph) { +@@ -909,7 +909,7 @@ static int __maybe_unused rk3288_gmac_set_parent(struct clk *clk, struct clk *pa + * clock. + */ + if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_PLL)) { +- debug("%s: switching GAMC to SCLK_MAC_PLL\n", __func__); ++printf("%s: switching GAMC to SCLK_MAC_PLL\n", __func__); + rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK, 0); + return 0; + } +@@ -925,7 +925,7 @@ static int __maybe_unused rk3288_gmac_set_parent(struct clk *clk, struct clk *pa + + /* If this is "ext_gmac", switch to the external clock input */ + if (!strcmp(clock_output_name, "ext_gmac")) { +- debug("%s: switching GMAC to external clock\n", __func__); ++printf("%s: switching GMAC to external clock\n", __func__); + rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK, + RMII_EXTCLK_SELECT_EXT_CLK << RMII_EXTCLK_SHIFT); + return 0; +@@ -943,7 +943,7 @@ static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *par + return 0; + } + +- debug("%s: unsupported clk %ld\n", __func__, clk->id); ++printf("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; + } + +@@ -1012,7 +1012,7 @@ static int rk3288_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rockchip_cru, +@@ -1026,7 +1026,7 @@ static int rk3288_clk_bind(struct udevice *dev) + ret = offsetof(struct rockchip_cru, cru_softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 12); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return 0; +diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c +index 5a838b9e9..93d815744 100644 +--- a/drivers/clk/rockchip/clk_rk3308.c ++++ b/drivers/clk/rockchip/clk_rk3308.c +@@ -225,7 +225,7 @@ static int rk3308_mac_set_speed_clk(struct clk *clk, uint hz) + struct rk3308_cru *cru = priv->cru; + + if (hz != 2500000 && hz != 25000000) { +- debug("Unsupported mac speed:%d\n", hz); ++printf("Unsupported mac speed:%d\n", hz); + return -EINVAL; + } + +@@ -519,7 +519,7 @@ static ulong rk3308_vop_set_clk(struct clk *clk, ulong hz) + best_div = div; + best_sel = i; + } +- debug("pll_rate=%lu, best_rate=%lu, best_div=%u, best_sel=%u\n", ++printf("pll_rate=%lu, best_rate=%lu, best_div=%u, best_sel=%u\n", + pll_rate, best_rate, best_div, best_sel); + } + +@@ -786,7 +786,7 @@ static ulong rk3308_clk_get_rate(struct clk *clk) + struct rk3308_clk_priv *priv = dev_get_priv(clk->dev); + ulong rate = 0; + +- debug("%s id:%ld\n", __func__, clk->id); ++printf("%s id:%ld\n", __func__, clk->id); + + switch (clk->id) { + case PLL_APLL: +@@ -866,7 +866,7 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate) + struct rk3308_clk_priv *priv = dev_get_priv(clk->dev); + ulong ret = 0; + +- debug("%s %ld %ld\n", __func__, clk->id, rate); ++printf("%s %ld %ld\n", __func__, clk->id, rate); + + switch (clk->id) { + case PLL_DPLL: +@@ -949,10 +949,10 @@ static int __maybe_unused rk3308_mac_set_parent(struct clk *clk, struct clk *par + * the id is SCLK_MAC_SRC, switch to the internal clock. + */ + if (parent->id == SCLK_MAC_SRC) { +- debug("%s: switching RMII to SCLK_MAC\n", __func__); ++printf("%s: switching RMII to SCLK_MAC\n", __func__); + rk_clrreg(&priv->cru->clksel_con[43], BIT(14)); + } else { +- debug("%s: switching RMII to CLKIN\n", __func__); ++printf("%s: switching RMII to CLKIN\n", __func__); + rk_setreg(&priv->cru->clksel_con[43], BIT(14)); + } + +@@ -968,7 +968,7 @@ static int __maybe_unused rk3308_clk_set_parent(struct clk *clk, struct clk *par + break; + } + +- debug("%s: unsupported clk %ld\n", __func__, clk->id); ++printf("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; + } + #endif +@@ -1016,7 +1016,7 @@ static int rk3308_clk_probe(struct udevice *dev) + /* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */ + ret = clk_set_defaults(dev, 1); + if (ret) +- debug("%s clk_set_defaults failed %d\n", __func__, ret); ++printf("%s clk_set_defaults failed %d\n", __func__, ret); + + return ret; + } +@@ -1040,7 +1040,7 @@ static int rk3308_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rk3308_cru, +@@ -1054,7 +1054,7 @@ static int rk3308_clk_bind(struct udevice *dev) + ret = offsetof(struct rk3308_cru, softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 12); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return 0; +diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c +index b825ff4cf..dbc7c0977 100644 +--- a/drivers/clk/rockchip/clk_rk3328.c ++++ b/drivers/clk/rockchip/clk_rk3328.c +@@ -246,7 +246,7 @@ static void rkclk_set_pll(struct rk3328_cru *cru, enum rk_clk_id clk_id, + u32 vco_khz = OSC_HZ / 1000 * div->fbdiv / div->refdiv; + u32 output_khz = vco_khz / div->postdiv1 / div->postdiv2; + +- debug("PLL at %p: fbdiv=%d, refdiv=%d, postdiv1=%d, \ ++printf("PLL at %p: fbdiv=%d, refdiv=%d, postdiv1=%d, \ + postdiv2=%d, vco=%u khz, output=%u khz\n", + pll_con, div->fbdiv, div->refdiv, div->postdiv1, + div->postdiv2, vco_khz, output_khz); +@@ -436,7 +436,7 @@ static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate) + rk_clrsetreg(&cru->clksel_con[27], GMAC2IO_CLK_DIV_MASK, + div << GMAC2IO_CLK_DIV_SHIFT); + else +- debug("Unsupported div for gmac:%d\n", div); ++printf("Unsupported div for gmac:%d\n", div); + + return DIV_TO_RATE(pll_rate, div); + } +@@ -702,7 +702,7 @@ static int rk3328_gmac2io_set_parent(struct clk *clk, struct clk *parent) + * is SCLK_MAC2IO_SRC ("clk_mac2io_src"), switch to the internal clock. + */ + if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC2IO_SRC)) { +- debug("%s: switching RGMII to SCLK_MAC2IO_SRC\n", __func__); ++printf("%s: switching RGMII to SCLK_MAC2IO_SRC\n", __func__); + rk_clrreg(&grf->mac_con[1], BIT(10)); + return 0; + } +@@ -718,7 +718,7 @@ static int rk3328_gmac2io_set_parent(struct clk *clk, struct clk *parent) + + /* If this is "gmac_clkin", switch to the external clock input */ + if (!strcmp(clock_output_name, "gmac_clkin")) { +- debug("%s: switching RGMII to CLKIN\n", __func__); ++printf("%s: switching RGMII to CLKIN\n", __func__); + rk_setreg(&grf->mac_con[1], BIT(10)); + return 0; + } +@@ -739,7 +739,7 @@ static int rk3328_gmac2io_ext_set_parent(struct clk *clk, struct clk *parent) + * is SCLK_MAC2IO ("clk_mac2io"), switch to the internal clock. + */ + if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC2IO)) { +- debug("%s: switching RGMII to SCLK_MAC2IO\n", __func__); ++printf("%s: switching RGMII to SCLK_MAC2IO\n", __func__); + rk_clrreg(&grf->soc_con[4], BIT(14)); + return 0; + } +@@ -755,7 +755,7 @@ static int rk3328_gmac2io_ext_set_parent(struct clk *clk, struct clk *parent) + + /* If this is "gmac_clkin", switch to the external clock input */ + if (!strcmp(clock_output_name, "gmac_clkin")) { +- debug("%s: switching RGMII to CLKIN\n", __func__); ++printf("%s: switching RGMII to CLKIN\n", __func__); + rk_setreg(&grf->soc_con[4], BIT(14)); + return 0; + } +@@ -779,7 +779,7 @@ static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent) + return 0; + } + +- debug("%s: unsupported clk %ld\n", __func__, clk->id); ++printf("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; + } + +@@ -817,7 +817,7 @@ static int rk3328_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rk3328_cru, +@@ -831,7 +831,7 @@ static int rk3328_clk_bind(struct udevice *dev) + ret = offsetof(struct rk3328_cru, softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 12); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return ret; +diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c +index 780b49ccd..7a2da7cc6 100644 +--- a/drivers/clk/rockchip/clk_rk3368.c ++++ b/drivers/clk/rockchip/clk_rk3368.c +@@ -98,7 +98,7 @@ static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id, + uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; + uint output_hz = vco_hz / div->no; + +- debug("PLL at %p: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n", ++printf("PLL at %p: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n", + pll, div->nf, div->nr, div->no, vco_hz, output_hz); + + /* enter slow mode and reset pll */ +@@ -153,7 +153,7 @@ static void rkclk_init(struct rk3368_cru *cru) + cpll = rkclk_pll_get_rate(cru, CPLL); + gpll = rkclk_pll_get_rate(cru, GPLL); + +- debug("%s apllb(%d) apll(%d) dpll(%d) cpll(%d) gpll(%d)\n", ++printf("%s apllb(%d) apll(%d) dpll(%d) cpll(%d) gpll(%d)\n", + __func__, apllb, aplll, dpll, cpll, gpll); + } + #endif +@@ -196,7 +196,7 @@ static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id) + div = (con & MMC_CLK_DIV_MASK) >> MMC_CLK_DIV_SHIFT; + rate = DIV_TO_RATE(pll_rate, div); + +- debug("%s: raw rate %d (post-divide by 2)\n", __func__, rate); ++printf("%s: raw rate %d (post-divide by 2)\n", __func__, rate); + return rate >> 1; + } + +@@ -217,7 +217,7 @@ static ulong rk3368_mmc_find_best_rate_and_parent(struct clk *clk, + { .mux = MMC_PLL_SEL_24M, .rate = 24 * MHz } + }; + +- debug("%s: target rate %ld\n", __func__, rate); ++printf("%s: target rate %ld\n", __func__, rate); + for (i = 0; i < ARRAY_SIZE(parents); ++i) { + /* + * Find the largest rate no larger than the target-rate for +@@ -228,7 +228,7 @@ static ulong rk3368_mmc_find_best_rate_and_parent(struct clk *clk, + u32 adj_div = div; + ulong new_rate = parent_rate / adj_div; + +- debug("%s: rate %ld, parent-mux %d, parent-rate %ld, div %d\n", ++printf("%s: rate %ld, parent-mux %d, parent-rate %ld, div %d\n", + __func__, rate, parents[i].mux, parents[i].rate, div); + + /* Skip, if not representable */ +@@ -245,7 +245,7 @@ static ulong rk3368_mmc_find_best_rate_and_parent(struct clk *clk, + *best_div = div - 1; + } + +- debug("%s: best_mux = %x, best_div = %d, best_rate = %ld\n", ++printf("%s: best_mux = %x, best_div = %d, best_rate = %ld\n", + __func__, *best_mux, *best_div, best_rate); + + return best_rate; +@@ -345,7 +345,7 @@ static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru, ulong set_rate) + rk_clrsetreg(&cru->clksel_con[43], GMAC_DIV_CON_MASK, + div << GMAC_DIV_CON_SHIFT); + else +- debug("Unsupported div for gmac:%d\n", div); ++printf("Unsupported div for gmac:%d\n", div); + + return DIV_TO_RATE(pll_rate, div); + } +@@ -398,7 +398,7 @@ static ulong rk3368_spi_get_clk(struct rk3368_cru *cru, ulong clk_id) + val = readl(&cru->clksel_con[spiclk->reg]); + div = extract_bits(val, 7, spiclk->div_shift); + +- debug("%s: div 0x%x\n", __func__, div); ++printf("%s: div 0x%x\n", __func__, div); + return DIV_TO_RATE(GPLL_HZ, div); + } + +@@ -459,7 +459,7 @@ static ulong rk3368_clk_get_rate(struct clk *clk) + struct rk3368_clk_priv *priv = dev_get_priv(clk->dev); + ulong rate = 0; + +- debug("%s: id %ld\n", __func__, clk->id); ++printf("%s: id %ld\n", __func__, clk->id); + switch (clk->id) { + case PLL_CPLL: + rate = rkclk_pll_get_rate(priv->cru, CPLL); +@@ -491,7 +491,7 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate) + __maybe_unused struct rk3368_clk_priv *priv = dev_get_priv(clk->dev); + ulong ret = 0; + +- debug("%s id:%ld rate:%ld\n", __func__, clk->id, rate); ++printf("%s id:%ld rate:%ld\n", __func__, clk->id, rate); + switch (clk->id) { + case SCLK_SPI0 ... SCLK_SPI2: + ret = rk3368_spi_set_clk(priv->cru, clk->id, rate); +@@ -536,7 +536,7 @@ static int __maybe_unused rk3368_gmac_set_parent(struct clk *clk, struct clk *pa + * clock. + */ + if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC)) { +- debug("%s: switching GAMC to SCLK_MAC\n", __func__); ++printf("%s: switching GAMC to SCLK_MAC\n", __func__); + rk_clrreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK); + return 0; + } +@@ -552,7 +552,7 @@ static int __maybe_unused rk3368_gmac_set_parent(struct clk *clk, struct clk *pa + + /* If this is "ext_gmac", switch to the external clock input */ + if (!strcmp(clock_output_name, "ext_gmac")) { +- debug("%s: switching GMAC to external clock\n", __func__); ++printf("%s: switching GMAC to external clock\n", __func__); + rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK); + return 0; + } +@@ -567,7 +567,7 @@ static int __maybe_unused rk3368_clk_set_parent(struct clk *clk, struct clk *par + return rk3368_gmac_set_parent(clk, parent); + } + +- debug("%s: unsupported clk %ld\n", __func__, clk->id); ++printf("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; + } + +@@ -615,7 +615,7 @@ static int rk3368_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rk3368_cru, +@@ -629,7 +629,7 @@ static int rk3368_clk_bind(struct udevice *dev) + ret = offsetof(struct rk3368_cru, softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 15); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return ret; +diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c +index f8cbda445..d61d86c08 100644 +--- a/drivers/clk/rockchip/clk_rk3399.c ++++ b/drivers/clk/rockchip/clk_rk3399.c +@@ -328,7 +328,7 @@ static void rkclk_set_pll(u32 *pll_con, const struct pll_div *div) + u32 vco_khz = OSC_HZ / 1000 * div->fbdiv / div->refdiv; + u32 output_khz = vco_khz / div->postdiv1 / div->postdiv2; + +- debug("PLL at %p: fbdiv=%d, refdiv=%d, postdiv1=%d, " ++printf("PLL at %p: fbdiv=%d, refdiv=%d, postdiv1=%d, " + "postdiv2=%d, vco=%u khz, output=%u khz\n", + pll_con, div->fbdiv, div->refdiv, div->postdiv1, + div->postdiv2, vco_khz, output_khz); +@@ -1062,7 +1062,7 @@ static int __maybe_unused rk3399_gmac_set_parent(struct clk *clk, + * the id is SCLK_MAC ("clk_gmac"), switch to the internal clock. + */ + if (parent->dev == clk->dev && parent->id == SCLK_MAC) { +- debug("%s: switching RGMII to SCLK_MAC\n", __func__); ++printf("%s: switching RGMII to SCLK_MAC\n", __func__); + rk_clrreg(&priv->cru->clksel_con[19], BIT(4)); + return 0; + } +@@ -1078,7 +1078,7 @@ static int __maybe_unused rk3399_gmac_set_parent(struct clk *clk, + + /* If this is "clkin_gmac", switch to the external clock input */ + if (!strcmp(clock_output_name, "clkin_gmac")) { +- debug("%s: switching RGMII to CLKIN\n", __func__); ++printf("%s: switching RGMII to CLKIN\n", __func__); + rk_setreg(&priv->cru->clksel_con[19], BIT(4)); + return 0; + } +@@ -1094,7 +1094,7 @@ static int __maybe_unused rk3399_clk_set_parent(struct clk *clk, + return rk3399_gmac_set_parent(clk, parent); + } + +- debug("%s: unsupported clk %ld\n", __func__, clk->id); ++printf("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; + } + +@@ -1185,7 +1185,7 @@ static int rk3399_clk_enable(struct clk *clk) + rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); + break; + default: +- debug("%s: unsupported clk %ld\n", __func__, clk->id); ++printf("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; + } + +@@ -1279,7 +1279,7 @@ static int rk3399_clk_disable(struct clk *clk) + rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); + break; + default: +- debug("%s: unsupported clk %ld\n", __func__, clk->id); ++printf("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; + } + +@@ -1420,7 +1420,7 @@ static int rk3399_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rockchip_cru, +@@ -1434,7 +1434,7 @@ static int rk3399_clk_bind(struct udevice *dev) + ret = offsetof(struct rockchip_cru, softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 21); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return 0; +@@ -1630,7 +1630,7 @@ static int rk3399_pmuclk_bind(struct udevice *dev) + ret = offsetof(struct rk3399_pmucru, pmucru_softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 2); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + return 0; + } +diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c +index 555155b16..fe16e6b6f 100644 +--- a/drivers/clk/rockchip/clk_rv1108.c ++++ b/drivers/clk/rockchip/clk_rv1108.c +@@ -78,7 +78,7 @@ static int rkclk_set_pll(struct rv1108_cru *cru, enum rk_clk_id clk_id, + uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000; + uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; + +- debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n", ++printf("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n", + pll, div->fbdiv, div->refdiv, div->postdiv1, + div->postdiv2, vco_hz, output_hz); + assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && +@@ -166,7 +166,7 @@ static int rv1108_mac_set_clk(struct rv1108_cru *cru, ulong rate) + rk_clrsetreg(&cru->clksel_con[24], MAC_CLK_DIV_MASK, + div << MAC_CLK_DIV_SHIFT); + else +- debug("Unsupported div for gmac:%d\n", div); ++printf("Unsupported div for gmac:%d\n", div); + + return DIV_TO_RATE(pll_rate, div); + } +@@ -187,7 +187,7 @@ static int rv1108_sfc_set_clk(struct rv1108_cru *cru, uint rate) + rk_clrsetreg(&cru->clksel_con[27], SFC_CLK_DIV_MASK, + div << SFC_CLK_DIV_SHIFT); + else +- debug("Unsupported sfc clk rate:%d\n", rate); ++printf("Unsupported sfc clk rate:%d\n", rate); + + return DIV_TO_RATE(pll_rate, div); + } +@@ -505,7 +505,7 @@ static ulong rv1108_mmc_get_clk(struct rv1108_cru *cru) + else + mmc_clk = DIV_TO_RATE(GPLL_HZ, div) / 2; + +- debug("%s div %d get_clk %ld\n", __func__, div, mmc_clk); ++printf("%s div %d get_clk %ld\n", __func__, div, mmc_clk); + return mmc_clk; + } + +@@ -517,12 +517,12 @@ static ulong rv1108_mmc_set_clk(struct rv1108_cru *cru, ulong rate) + div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, CLK_GENERAL), rate); + + if (div < 127) { +- debug("%s source gpll\n", __func__); ++printf("%s source gpll\n", __func__); + rk_clrsetreg(&cru->clksel_con[25], EMMC_PLL_SEL_MASK, + (EMMC_PLL_SEL_GPLL << EMMC_PLL_SEL_SHIFT)); + pll_rate = rkclk_pll_get_rate(cru, CLK_GENERAL); + } else { +- debug("%s source 24m\n", __func__); ++printf("%s source 24m\n", __func__); + rk_clrsetreg(&cru->clksel_con[25], EMMC_PLL_SEL_MASK, + (EMMC_PLL_SEL_OSC << EMMC_PLL_SEL_SHIFT)); + pll_rate = OSC_HZ; +@@ -532,7 +532,7 @@ static ulong rv1108_mmc_set_clk(struct rv1108_cru *cru, ulong rate) + rk_clrsetreg(&cru->clksel_con[26], EMMC_CLK_DIV_MASK, + ((div - 1) << EMMC_CLK_DIV_SHIFT)); + +- debug("%s set_rate %ld div %d\n", __func__, rate, div); ++printf("%s set_rate %ld div %d\n", __func__, rate, div); + + return DIV_TO_RATE(pll_rate, div); + } +@@ -692,7 +692,7 @@ static int rv1108_clk_bind(struct udevice *dev) + ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", + &sys_child); + if (ret) { +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + } else { + priv = malloc(sizeof(struct sysreset_reg)); + priv->glb_srst_fst_value = offsetof(struct rv1108_cru, +@@ -706,7 +706,7 @@ static int rv1108_clk_bind(struct udevice *dev) + ret = offsetof(struct rv1108_cru, softrst_con[0]); + ret = rockchip_reset_bind(dev, ret, 13); + if (ret) +- debug("Warning: software reset driver bind faile\n"); ++printf("Warning: software reset driver bind faile\n"); + #endif + + return 0; +diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c +index 41934cd82..df4b3e00d 100644 +--- a/drivers/clk/sunxi/clk_sunxi.c ++++ b/drivers/clk/sunxi/clk_sunxi.c +@@ -32,7 +32,7 @@ static int sunxi_set_gate(struct clk *clk, bool on) + return 0; + } + +- debug("%s: (CLK#%ld) off#0x%x, BIT(%d)\n", __func__, ++printf("%s: (CLK#%ld) off#0x%x, BIT(%d)\n", __func__, + clk->id, gate->off, ilog2(gate->bit)); + + reg = readl(priv->base + gate->off); +diff --git a/drivers/clk/tegra/tegra-car-clk.c b/drivers/clk/tegra/tegra-car-clk.c +index 09a7cf470..1ba840610 100644 +--- a/drivers/clk/tegra/tegra-car-clk.c ++++ b/drivers/clk/tegra/tegra-car-clk.c +@@ -13,7 +13,7 @@ + + static int tegra_car_clk_request(struct clk *clk) + { +- debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, ++printf("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, + clk->id); + + /* +@@ -32,7 +32,7 @@ static int tegra_car_clk_request(struct clk *clk) + + static int tegra_car_clk_free(struct clk *clk) + { +- debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, ++printf("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, + clk->id); + + return 0; +@@ -42,7 +42,7 @@ static ulong tegra_car_clk_get_rate(struct clk *clk) + { + enum clock_id parent; + +- debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, ++printf("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, + clk->id); + + parent = clock_get_periph_parent(clk->id); +@@ -53,7 +53,7 @@ static ulong tegra_car_clk_set_rate(struct clk *clk, ulong rate) + { + enum clock_id parent; + +- debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate, ++printf("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate, + clk->dev, clk->id); + + parent = clock_get_periph_parent(clk->id); +@@ -62,7 +62,7 @@ static ulong tegra_car_clk_set_rate(struct clk *clk, ulong rate) + + static int tegra_car_clk_enable(struct clk *clk) + { +- debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, ++printf("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, + clk->id); + + clock_enable(clk->id); +@@ -72,7 +72,7 @@ static int tegra_car_clk_enable(struct clk *clk) + + static int tegra_car_clk_disable(struct clk *clk) + { +- debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, ++printf("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, + clk->id); + + clock_disable(clk->id); +@@ -91,7 +91,7 @@ static struct clk_ops tegra_car_clk_ops = { + + static int tegra_car_clk_probe(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +diff --git a/drivers/clk/tegra/tegra186-clk.c b/drivers/clk/tegra/tegra186-clk.c +index 5a98a3f3f..ec766689b 100644 +--- a/drivers/clk/tegra/tegra186-clk.c ++++ b/drivers/clk/tegra/tegra186-clk.c +@@ -16,7 +16,7 @@ static ulong tegra186_clk_get_rate(struct clk *clk) + struct mrq_clk_response resp; + int ret; + +- debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, ++printf("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, + clk->id); + + req.cmd_and_id = (CMD_CLK_GET_RATE << 24) | clk->id; +@@ -35,7 +35,7 @@ static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate) + struct mrq_clk_response resp; + int ret; + +- debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate, ++printf("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate, + clk->dev, clk->id); + + req.cmd_and_id = (CMD_CLK_SET_RATE << 24) | clk->id; +@@ -68,7 +68,7 @@ static int tegra186_clk_en_dis(struct clk *clk, + + static int tegra186_clk_enable(struct clk *clk) + { +- debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, ++printf("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, + clk->id); + + return tegra186_clk_en_dis(clk, CMD_CLK_ENABLE); +@@ -76,7 +76,7 @@ static int tegra186_clk_enable(struct clk *clk) + + static int tegra186_clk_disable(struct clk *clk) + { +- debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, ++printf("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev, + clk->id); + + return tegra186_clk_en_dis(clk, CMD_CLK_DISABLE); +@@ -91,7 +91,7 @@ static struct clk_ops tegra186_clk_ops = { + + static int tegra186_clk_probe(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +diff --git a/drivers/clk/ti/clk-sci.c b/drivers/clk/ti/clk-sci.c +index 6f0fdaa11..70f99c99c 100644 +--- a/drivers/clk/ti/clk-sci.c ++++ b/drivers/clk/ti/clk-sci.c +@@ -31,7 +31,7 @@ static int ti_sci_clk_probe(struct udevice *dev) + { + struct ti_sci_clk_data *data = dev_get_priv(dev); + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + if (!data) + return -ENOMEM; +@@ -47,10 +47,10 @@ static int ti_sci_clk_probe(struct udevice *dev) + static int ti_sci_clk_of_xlate(struct clk *clk, + struct ofnode_phandle_args *args) + { +- debug("%s(clk=%p, args_count=%d)\n", __func__, clk, args->args_count); ++printf("%s(clk=%p, args_count=%d)\n", __func__, clk, args->args_count); + + if (args->args_count != 2) { +- debug("Invalid args_count: %d\n", args->args_count); ++printf("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -66,13 +66,13 @@ static int ti_sci_clk_of_xlate(struct clk *clk, + + static int ti_sci_clk_request(struct clk *clk) + { +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + return 0; + } + + static int ti_sci_clk_free(struct clk *clk) + { +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + return 0; + } + +@@ -84,7 +84,7 @@ static ulong ti_sci_clk_get_rate(struct clk *clk) + u64 current_freq; + int ret; + +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + + ret = cops->get_freq(sci, clk->id, clk->data, ¤t_freq); + if (ret) { +@@ -92,7 +92,7 @@ static ulong ti_sci_clk_get_rate(struct clk *clk) + return ret; + } + +- debug("%s(current_freq=%llu)\n", __func__, current_freq); ++printf("%s(current_freq=%llu)\n", __func__, current_freq); + + return current_freq; + } +@@ -104,7 +104,7 @@ static ulong ti_sci_clk_set_rate(struct clk *clk, ulong rate) + const struct ti_sci_clk_ops *cops = &sci->ops.clk_ops; + int ret; + +- debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); ++printf("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); + + #ifdef CONFIG_K3_AVS0 + k3_avs_notify_freq(clk->id, clk->data, rate); +@@ -126,7 +126,7 @@ static int ti_sci_clk_set_parent(struct clk *clk, struct clk *parent) + u8 parent_cid; + int ret; + +- debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent); ++printf("%s(clk=%p, parent=%p)\n", __func__, clk, parent); + + /* Make sure the clock parent is valid for a given device ID */ + if (clk->id != parent->id) +@@ -168,7 +168,7 @@ static int ti_sci_clk_enable(struct clk *clk) + const struct ti_sci_clk_ops *cops = &sci->ops.clk_ops; + int ret; + +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + + /* + * Allow the System Controller to automatically manage the state of +@@ -188,7 +188,7 @@ static int ti_sci_clk_disable(struct clk *clk) + const struct ti_sci_clk_ops *cops = &sci->ops.clk_ops; + int ret; + +- debug("%s(clk=%p)\n", __func__, clk); ++printf("%s(clk=%p)\n", __func__, clk); + + /* Unconditionally disable clock, regardless of state of the device */ + ret = cops->idle_clock(sci, clk->id, clk->data); +diff --git a/drivers/core/device.c b/drivers/core/device.c +index cb960f8ec..69ee6233a 100644 +--- a/drivers/core/device.c ++++ b/drivers/core/device.c +@@ -55,7 +55,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv, + + ret = uclass_get(drv->id, &uc); + if (ret) { +- debug("Missing uclass for driver %s\n", drv->name); ++printf("Missing uclass for driver %s\n", drv->name); + return ret; + } + +diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c +index b9874c743..a4823ea51 100644 +--- a/drivers/core/fdtaddr.c ++++ b/drivers/core/fdtaddr.c +@@ -31,20 +31,20 @@ fdt_addr_t devfdt_get_addr_index(const struct udevice *dev, int index) + na = fdt_address_cells(gd->fdt_blob, + dev_of_offset(dev->parent)); + if (na < 1) { +- debug("bad #address-cells\n"); ++printf("bad #address-cells\n"); + return FDT_ADDR_T_NONE; + } + + ns = fdt_size_cells(gd->fdt_blob, dev_of_offset(dev->parent)); + if (ns < 0) { +- debug("bad #size-cells\n"); ++printf("bad #size-cells\n"); + return FDT_ADDR_T_NONE; + } + + reg = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "reg", + &len); + if (!reg || (len <= (index * sizeof(fdt32_t) * (na + ns)))) { +- debug("Req index out of range\n"); ++printf("Req index out of range\n"); + return FDT_ADDR_T_NONE; + } + +diff --git a/drivers/core/lists.c b/drivers/core/lists.c +index e214306b9..9af1febcb 100644 +--- a/drivers/core/lists.c ++++ b/drivers/core/lists.c +@@ -145,7 +145,7 @@ int device_bind_driver_to_node(struct udevice *parent, const char *drv_name, + + drv = lists_driver_lookup_name(drv_name); + if (!drv) { +- debug("Cannot find driver '%s'\n", drv_name); ++printf("Cannot find driver '%s'\n", drv_name); + return -ENOENT; + } + ret = device_bind_with_driver_data(parent, drv, dev_name, 0 /* data */, +diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c +index 9960e6b31..4dac56a2d 100644 +--- a/drivers/core/of_access.c ++++ b/drivers/core/of_access.c +@@ -492,14 +492,14 @@ int of_read_u32_array(const struct device_node *np, const char *propname, + { + const __be32 *val; + +- debug("%s: %s: ", __func__, propname); ++printf("%s: %s: ", __func__, propname); + val = of_find_property_value_of_size(np, propname, + sz * sizeof(*out_values)); + + if (IS_ERR(val)) + return PTR_ERR(val); + +- debug("size %zd\n", sz); ++printf("size %zd\n", sz); + while (sz--) + *out_values++ = be32_to_cpup(val++); + +@@ -511,19 +511,19 @@ int of_read_u32_index(const struct device_node *np, const char *propname, + { + const __be32 *val; + +- debug("%s: %s: ", __func__, propname); ++printf("%s: %s: ", __func__, propname); + if (!np) + return -EINVAL; + + val = of_find_property_value_of_size(np, propname, + sizeof(*outp) * (index + 1)); + if (IS_ERR(val)) { +- debug("(not found)\n"); ++printf("(not found)\n"); + return PTR_ERR(val); + } + + *outp = be32_to_cpup(val + index); +- debug("%#x (%d)\n", *outp, *outp); ++printf("%#x (%d)\n", *outp, *outp); + + return 0; + } +@@ -532,17 +532,17 @@ int of_read_u64(const struct device_node *np, const char *propname, u64 *outp) + { + const __be64 *val; + +- debug("%s: %s: ", __func__, propname); ++printf("%s: %s: ", __func__, propname); + if (!np) + return -EINVAL; + val = of_find_property_value_of_size(np, propname, sizeof(*outp)); + if (IS_ERR(val)) { +- debug("(not found)\n"); ++printf("(not found)\n"); + return PTR_ERR(val); + } + + *outp = be64_to_cpup(val); +- debug("%#llx (%lld)\n", (unsigned long long)*outp, ++printf("%#llx (%lld)\n", (unsigned long long)*outp, + (unsigned long long)*outp); + + return 0; +@@ -568,7 +568,7 @@ int of_property_match_string(const struct device_node *np, const char *propname, + l = strnlen(p, end - p) + 1; + if (p + l > end) + return -EILSEQ; +- debug("comparing %s with %s\n", string, p); ++printf("comparing %s with %s\n", string, p); + if (strcmp(string, p) == 0) + return i; /* Found it; return index */ + } +@@ -654,7 +654,7 @@ static int __of_parse_phandle_with_args(const struct device_node *np, + if (cells_name || cur_index == index) { + node = of_find_node_by_phandle(phandle); + if (!node) { +- debug("%s: could not find phandle\n", ++printf("%s: could not find phandle\n", + np->full_name); + goto err; + } +@@ -662,7 +662,7 @@ static int __of_parse_phandle_with_args(const struct device_node *np, + + if (cells_name) { + if (of_read_u32(node, cells_name, &count)) { +- debug("%s: could not get %s for %s\n", ++printf("%s: could not get %s for %s\n", + np->full_name, cells_name, + node->full_name); + goto err; +@@ -676,7 +676,7 @@ static int __of_parse_phandle_with_args(const struct device_node *np, + * remaining property data length + */ + if (list + count > list_end) { +- debug("%s: arguments longer than property\n", ++printf("%s: arguments longer than property\n", + np->full_name); + goto err; + } +@@ -772,7 +772,7 @@ static void of_alias_add(struct alias_prop *ap, struct device_node *np, + strncpy(ap->stem, stem, stem_len); + ap->stem[stem_len] = 0; + list_add_tail(&ap->link, &aliases_lookup); +- debug("adding DT alias:%s: stem=%s id=%i node=%s\n", ++printf("adding DT alias:%s: stem=%s id=%i node=%s\n", + ap->alias, ap->stem, ap->id, of_node_full_name(np)); + } + +diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c +index 3fbc0a7af..7d98a8707 100644 +--- a/drivers/core/of_addr.c ++++ b/drivers/core/of_addr.c +@@ -26,7 +26,7 @@ static struct of_bus *of_match_bus(struct device_node *np); + #ifdef DEBUG + static void of_dump_addr(const char *s, const __be32 *addr, int na) + { +- debug("%s", s); ++printf("%s", s); + while (na--) + pr_cont(" %08x", be32_to_cpu(*(addr++))); + pr_cont("\n"); +@@ -65,7 +65,7 @@ static u64 of_bus_default_map(__be32 *addr, const __be32 *range, + s = of_read_number(range + na + pna, ns); + da = of_read_number(addr, na); + +- debug("default map, cp=%llx, s=%llx, da=%llx\n", ++printf("default map, cp=%llx, s=%llx, da=%llx\n", + (unsigned long long)cp, (unsigned long long)s, + (unsigned long long)da); + +@@ -193,17 +193,17 @@ static int of_translate_one(const struct device_node *parent, + ranges = of_get_property(parent, rprop, &rlen); + if (ranges == NULL && !of_empty_ranges_quirk(parent) && + strcmp(rprop, "dma-ranges")) { +- debug("no ranges; cannot translate\n"); ++printf("no ranges; cannot translate\n"); + return 1; + } + if (ranges == NULL || rlen == 0) { + offset = of_read_number(addr, na); + memset(addr, 0, pna * 4); +- debug("empty ranges; 1:1 translation\n"); ++printf("empty ranges; 1:1 translation\n"); + goto finish; + } + +- debug("walking ranges...\n"); ++printf("walking ranges...\n"); + + /* Now walk through the ranges */ + rlen /= 4; +@@ -214,14 +214,14 @@ static int of_translate_one(const struct device_node *parent, + break; + } + if (offset == OF_BAD_ADDR) { +- debug("not found !\n"); ++printf("not found !\n"); + return 1; + } + memcpy(addr, ranges + na, 4 * pna); + + finish: + of_dump_addr("parent translation for:", addr, pna); +- debug("with offset: %llx\n", (unsigned long long)offset); ++printf("with offset: %llx\n", (unsigned long long)offset); + + /* Translate it into parent bus space */ + return pbus->translate(addr, offset, pna); +@@ -246,7 +246,7 @@ static u64 __of_translate_address(const struct device_node *dev, + int na, ns, pna, pns; + u64 result = OF_BAD_ADDR; + +- debug("** translation for device %s **\n", of_node_full_name(dev)); ++printf("** translation for device %s **\n", of_node_full_name(dev)); + + /* Increase refcount at current level */ + (void)of_node_get(dev); +@@ -260,12 +260,12 @@ static u64 __of_translate_address(const struct device_node *dev, + /* Count address cells & copy address locally */ + bus->count_cells(dev, &na, &ns); + if (!OF_CHECK_COUNTS(na, ns)) { +- debug("Bad cell count for %s\n", of_node_full_name(dev)); ++printf("Bad cell count for %s\n", of_node_full_name(dev)); + goto bail; + } + memcpy(addr, in_addr, na * 4); + +- debug("bus is %s (na=%d, ns=%d) on %s\n", bus->name, na, ns, ++printf("bus is %s (na=%d, ns=%d) on %s\n", bus->name, na, ns, + of_node_full_name(parent)); + of_dump_addr("translating address:", addr, na); + +@@ -278,7 +278,7 @@ static u64 __of_translate_address(const struct device_node *dev, + + /* If root, we have finished */ + if (parent == NULL) { +- debug("reached root node\n"); ++printf("reached root node\n"); + result = of_read_number(addr, na); + break; + } +@@ -287,12 +287,12 @@ static u64 __of_translate_address(const struct device_node *dev, + pbus = of_match_bus(parent); + pbus->count_cells(dev, &pna, &pns); + if (!OF_CHECK_COUNTS(pna, pns)) { +- debug("Bad cell count for %s\n", ++printf("Bad cell count for %s\n", + of_node_full_name(dev)); + break; + } + +- debug("parent bus is %s (na=%d, ns=%d) on %s\n", pbus->name, ++printf("parent bus is %s (na=%d, ns=%d) on %s\n", pbus->name, + pna, pns, of_node_full_name(parent)); + + /* Apply bus translation */ +@@ -358,7 +358,7 @@ int of_get_dma_range(const struct device_node *dev, phys_addr_t *cpu, + } + + if (!dev || !ranges) { +- debug("no dma-ranges found for node %s\n", ++printf("no dma-ranges found for node %s\n", + of_node_full_name(dev)); + ret = -ENOENT; + goto out; +diff --git a/drivers/core/of_extra.c b/drivers/core/of_extra.c +index 7702beff9..f0796dadd 100644 +--- a/drivers/core/of_extra.c ++++ b/drivers/core/of_extra.c +@@ -17,12 +17,12 @@ int ofnode_read_fmap_entry(ofnode node, struct fmap_entry *entry) + ofnode subnode; + + if (ofnode_read_u32(node, "image-pos", &entry->offset)) { +- debug("Node '%s' has bad/missing 'image-pos' property\n", ++printf("Node '%s' has bad/missing 'image-pos' property\n", + ofnode_get_name(node)); + return log_msg_ret("image-pos", -ENOENT); + } + if (ofnode_read_u32(node, "size", &entry->length)) { +- debug("Node '%s' has bad/missing 'size' property\n", ++printf("Node '%s' has bad/missing 'size' property\n", + ofnode_get_name(node)); + return log_msg_ret("size", -ENOENT); + } +@@ -56,16 +56,16 @@ int ofnode_decode_region(ofnode node, const char *prop_name, fdt_addr_t *basep, + const fdt_addr_t *cell; + int len; + +- debug("%s: %s: %s\n", __func__, ofnode_get_name(node), prop_name); ++printf("%s: %s: %s\n", __func__, ofnode_get_name(node), prop_name); + cell = ofnode_get_property(node, prop_name, &len); + if (!cell || (len < sizeof(fdt_addr_t) * 2)) { +- debug("cell=%p, len=%d\n", cell, len); ++printf("cell=%p, len=%d\n", cell, len); + return -1; + } + + *basep = fdt_addr_to_cpu(*cell); + *sizep = fdt_size_to_cpu(cell[1]); +- debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep, ++printf("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep, + (ulong)*sizep); + + return 0; +@@ -84,7 +84,7 @@ int ofnode_decode_memory_region(ofnode config_node, const char *mem_type, + if (!ofnode_valid(config_node)) { + config_node = ofnode_path("/config"); + if (!ofnode_valid(config_node)) { +- debug("%s: Cannot find /config node\n", __func__); ++printf("%s: Cannot find /config node\n", __func__); + return -ENOENT; + } + } +@@ -95,14 +95,14 @@ int ofnode_decode_memory_region(ofnode config_node, const char *mem_type, + suffix); + mem = ofnode_read_string(config_node, prop_name); + if (!mem) { +- debug("%s: No memory type for '%s', using /memory\n", __func__, ++printf("%s: No memory type for '%s', using /memory\n", __func__, + prop_name); + mem = "/memory"; + } + + node = ofnode_path(mem); + if (!ofnode_valid(node)) { +- debug("%s: Failed to find node '%s'\n", __func__, mem); ++printf("%s: Failed to find node '%s'\n", __func__, mem); + return -ENOENT; + } + +@@ -111,7 +111,7 @@ int ofnode_decode_memory_region(ofnode config_node, const char *mem_type, + * use the first + */ + if (ofnode_decode_region(node, "reg", &base, &size)) { +- debug("%s: Failed to decode memory region %s\n", __func__, ++printf("%s: Failed to decode memory region %s\n", __func__, + mem); + return -EINVAL; + } +@@ -120,7 +120,7 @@ int ofnode_decode_memory_region(ofnode config_node, const char *mem_type, + suffix); + if (ofnode_decode_region(config_node, prop_name, &offset, + &offset_size)) { +- debug("%s: Failed to decode memory region '%s'\n", __func__, ++printf("%s: Failed to decode memory region '%s'\n", __func__, + prop_name); + return -EINVAL; + } +diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c +index 6c771e364..ceedbf019 100644 +--- a/drivers/core/ofnode.c ++++ b/drivers/core/ofnode.c +@@ -38,7 +38,7 @@ int ofnode_read_u32_index(ofnode node, const char *propname, int index, + int len; + + assert(ofnode_valid(node)); +- debug("%s: %s: ", __func__, propname); ++printf("%s: %s: ", __func__, propname); + + if (ofnode_is_np(node)) + return of_read_u32_index(ofnode_to_np(node), propname, index, +@@ -47,17 +47,17 @@ int ofnode_read_u32_index(ofnode node, const char *propname, int index, + cell = fdt_getprop(gd->fdt_blob, ofnode_to_offset(node), propname, + &len); + if (!cell) { +- debug("(not found)\n"); ++printf("(not found)\n"); + return -EINVAL; + } + + if (len < (sizeof(int) * (index + 1))) { +- debug("(not large enough)\n"); ++printf("(not large enough)\n"); + return -EOVERFLOW; + } + + *outp = fdt32_to_cpu(cell[index]); +- debug("%#x (%d)\n", *outp, *outp); ++printf("%#x (%d)\n", *outp, *outp); + + return 0; + } +@@ -85,7 +85,7 @@ int ofnode_read_u64(ofnode node, const char *propname, u64 *outp) + int len; + + assert(ofnode_valid(node)); +- debug("%s: %s: ", __func__, propname); ++printf("%s: %s: ", __func__, propname); + + if (ofnode_is_np(node)) + return of_read_u64(ofnode_to_np(node), propname, outp); +@@ -93,11 +93,11 @@ int ofnode_read_u64(ofnode node, const char *propname, u64 *outp) + cell = fdt_getprop(gd->fdt_blob, ofnode_to_offset(node), propname, + &len); + if (!cell || len < sizeof(*cell)) { +- debug("(not found)\n"); ++printf("(not found)\n"); + return -EINVAL; + } + *outp = fdt64_to_cpu(cell[0]); +- debug("%#llx (%lld)\n", (unsigned long long)*outp, ++printf("%#llx (%lld)\n", (unsigned long long)*outp, + (unsigned long long)*outp); + + return 0; +@@ -116,11 +116,11 @@ bool ofnode_read_bool(ofnode node, const char *propname) + const void *prop; + + assert(ofnode_valid(node)); +- debug("%s: %s: ", __func__, propname); ++printf("%s: %s: ", __func__, propname); + + prop = ofnode_get_property(node, propname, NULL); + +- debug("%s\n", prop ? "true" : "false"); ++printf("%s\n", prop ? "true" : "false"); + + return prop ? true : false; + } +@@ -131,7 +131,7 @@ const void *ofnode_read_prop(ofnode node, const char *propname, int *sizep) + int len; + + assert(ofnode_valid(node)); +- debug("%s: %s: ", __func__, propname); ++printf("%s: %s: ", __func__, propname); + + if (ofnode_is_np(node)) { + struct property *prop = of_find_property( +@@ -146,7 +146,7 @@ const void *ofnode_read_prop(ofnode node, const char *propname, int *sizep) + propname, &len); + } + if (!val) { +- debug("\n"); ++printf("\n"); + if (sizep) + *sizep = -FDT_ERR_NOTFOUND; + return NULL; +@@ -167,10 +167,10 @@ const char *ofnode_read_string(ofnode node, const char *propname) + return NULL; + + if (strnlen(str, len) >= len) { +- debug("\n"); ++printf("\n"); + return NULL; + } +- debug("%s\n", str); ++printf("%s\n", str); + + return str; + } +@@ -190,7 +190,7 @@ ofnode ofnode_find_subnode(ofnode node, const char *subnode_name) + ofnode subnode; + + assert(ofnode_valid(node)); +- debug("%s: %s: ", __func__, subnode_name); ++printf("%s: %s: ", __func__, subnode_name); + + if (ofnode_is_np(node)) { + const struct device_node *np = ofnode_to_np(node); +@@ -205,7 +205,7 @@ ofnode ofnode_find_subnode(ofnode node, const char *subnode_name) + ofnode_to_offset(node), subnode_name); + subnode = offset_to_ofnode(ooffset); + } +- debug("%s\n", ofnode_valid(subnode) ? ++printf("%s\n", ofnode_valid(subnode) ? + ofnode_get_name(subnode) : ""); + + return subnode; +@@ -215,7 +215,7 @@ int ofnode_read_u32_array(ofnode node, const char *propname, + u32 *out_values, size_t sz) + { + assert(ofnode_valid(node)); +- debug("%s: %s: ", __func__, propname); ++printf("%s: %s: ", __func__, propname); + + if (ofnode_is_np(node)) { + return of_read_u32_array(ofnode_to_np(node), propname, +@@ -276,7 +276,7 @@ ofnode ofnode_get_parent(ofnode node) + const char *ofnode_get_name(ofnode node) + { + if (!ofnode_valid(node)) { +- debug("%s node not valid\n", __func__); ++printf("%s node not valid\n", __func__); + return NULL; + } + +@@ -517,7 +517,7 @@ ofnode ofnode_get_aliases_node(const char *name) + if (!prop) + return ofnode_null(); + +- debug("%s: node_path: %s\n", __func__, prop); ++printf("%s: node_path: %s\n", __func__, prop); + + return ofnode_path(prop); + } +@@ -540,7 +540,7 @@ static int decode_timing_property(ofnode node, const char *name, + + length = ofnode_read_size(node, name); + if (length < 0) { +- debug("%s: could not find property %s\n", ++printf("%s: could not find property %s\n", + ofnode_get_name(node), name); + return length; + } +@@ -738,7 +738,7 @@ int ofnode_read_pci_addr(ofnode node, enum fdt_pci_space type, + int len; + int ret = -ENOENT; + +- debug("%s: %s: ", __func__, propname); ++printf("%s: %s: ", __func__, propname); + + /* + * If we follow the pci bus bindings strictly, we should check +@@ -755,7 +755,7 @@ int ofnode_read_pci_addr(ofnode node, enum fdt_pci_space type, + int i; + + for (i = 0; i < num; i++) { +- debug("pci address #%d: %08lx %08lx %08lx\n", i, ++printf("pci address #%d: %08lx %08lx %08lx\n", i, + (ulong)fdt32_to_cpu(cell[0]), + (ulong)fdt32_to_cpu(cell[1]), + (ulong)fdt32_to_cpu(cell[2])); +@@ -781,7 +781,7 @@ int ofnode_read_pci_addr(ofnode node, enum fdt_pci_space type, + ret = -EINVAL; + + fail: +- debug("(not found)\n"); ++printf("(not found)\n"); + return ret; + } + +@@ -1035,7 +1035,7 @@ int ofnode_write_string(ofnode node, const char *propname, const char *value) + + assert(ofnode_valid(node)); + +- debug("%s: %s = %s", __func__, propname, value); ++printf("%s: %s = %s", __func__, propname, value); + + return ofnode_write_prop(node, propname, strlen(value) + 1, value); + } +diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c +index 3206f3d11..783d6b4da 100644 +--- a/drivers/core/regmap.c ++++ b/drivers/core/regmap.c +@@ -107,7 +107,7 @@ static int init_range(ofnode node, struct regmap_range *range, int addr_len, + ret = of_address_to_resource(ofnode_to_np(node), + index, &r); + if (ret) { +- debug("%s: Could not read resource of range %d (ret = %d)\n", ++printf("%s: Could not read resource of range %d (ret = %d)\n", + ofnode_get_name(node), index, ret); + return ret; + } +@@ -122,7 +122,7 @@ static int init_range(ofnode node, struct regmap_range *range, int addr_len, + addr_len, size_len, + &sz, true); + if (range->start == FDT_ADDR_T_NONE) { +- debug("%s: Could not read start of range %d\n", ++printf("%s: Could not read start of range %d\n", + ofnode_get_name(node), index); + return -EINVAL; + } +@@ -141,14 +141,14 @@ int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index) + + addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node)); + if (addr_len < 0) { +- debug("%s: Error while reading the addr length (ret = %d)\n", ++printf("%s: Error while reading the addr length (ret = %d)\n", + ofnode_get_name(node), addr_len); + return addr_len; + } + + size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node)); + if (size_len < 0) { +- debug("%s: Error while reading the size length: (ret = %d)\n", ++printf("%s: Error while reading the size length: (ret = %d)\n", + ofnode_get_name(node), size_len); + return size_len; + } +@@ -218,35 +218,35 @@ int regmap_init_mem(ofnode node, struct regmap **mapp) + + addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node)); + if (addr_len < 0) { +- debug("%s: Error while reading the addr length (ret = %d)\n", ++printf("%s: Error while reading the addr length (ret = %d)\n", + ofnode_get_name(node), addr_len); + return addr_len; + } + + size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node)); + if (size_len < 0) { +- debug("%s: Error while reading the size length: (ret = %d)\n", ++printf("%s: Error while reading the size length: (ret = %d)\n", + ofnode_get_name(node), size_len); + return size_len; + } + + both_len = addr_len + size_len; + if (!both_len) { +- debug("%s: Both addr and size length are zero\n", ++printf("%s: Both addr and size length are zero\n", + ofnode_get_name(node)); + return -EINVAL; + } + + len = ofnode_read_size(node, "reg"); + if (len < 0) { +- debug("%s: Error while reading reg size (ret = %d)\n", ++printf("%s: Error while reading reg size (ret = %d)\n", + ofnode_get_name(node), len); + return len; + } + len /= sizeof(fdt32_t); + count = len / both_len; + if (!count) { +- debug("%s: Not enough data in reg property\n", ++printf("%s: Not enough data in reg property\n", + ofnode_get_name(node)); + return -EINVAL; + } +@@ -391,7 +391,7 @@ int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset, + void *ptr; + + if (range_num >= map->range_count) { +- debug("%s: range index %d larger than range count\n", ++printf("%s: range index %d larger than range count\n", + __func__, range_num); + return -ERANGE; + } +@@ -399,7 +399,7 @@ int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset, + + offset <<= map->reg_offset_shift; + if (offset + val_len > range->size) { +- debug("%s: offset/size combination invalid\n", __func__); ++printf("%s: offset/size combination invalid\n", __func__); + return -ERANGE; + } + +@@ -421,7 +421,7 @@ int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset, + break; + #endif + default: +- debug("%s: regmap size %zu unknown\n", __func__, val_len); ++printf("%s: regmap size %zu unknown\n", __func__, val_len); + return -EINVAL; + } + +@@ -530,7 +530,7 @@ int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset, + void *ptr; + + if (range_num >= map->range_count) { +- debug("%s: range index %d larger than range count\n", ++printf("%s: range index %d larger than range count\n", + __func__, range_num); + return -ERANGE; + } +@@ -538,7 +538,7 @@ int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset, + + offset <<= map->reg_offset_shift; + if (offset + val_len > range->size) { +- debug("%s: offset/size combination invalid\n", __func__); ++printf("%s: offset/size combination invalid\n", __func__); + return -ERANGE; + } + +@@ -560,7 +560,7 @@ int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset, + break; + #endif + default: +- debug("%s: regmap size %zu unknown\n", __func__, val_len); ++printf("%s: regmap size %zu unknown\n", __func__, val_len); + return -EINVAL; + } + +@@ -596,7 +596,7 @@ int regmap_write(struct regmap *map, uint offset, uint val) + u.v64 = val; + break; + default: +- debug("%s: regmap size %zu unknown\n", __func__, ++printf("%s: regmap size %zu unknown\n", __func__, + (size_t)map->width); + return -EINVAL; + } +diff --git a/drivers/core/root.c b/drivers/core/root.c +index fe0562cd6..a661d6a33 100644 +--- a/drivers/core/root.c ++++ b/drivers/core/root.c +@@ -280,7 +280,7 @@ static int dm_scan_fdt_node(struct udevice *parent, ofnode parent_node, + err = lists_bind_fdt(parent, node, NULL, pre_reloc_only); + if (err && !ret) { + ret = err; +- debug("%s: ret=%d\n", node_name, ret); ++printf("%s: ret=%d\n", node_name, ret); + } + } + +@@ -321,7 +321,7 @@ int dm_extended_scan(bool pre_reloc_only) + + ret = dm_scan_fdt(pre_reloc_only); + if (ret) { +- debug("dm_scan_fdt() failed: %d\n", ret); ++printf("dm_scan_fdt() failed: %d\n", ret); + return ret; + } + +@@ -329,7 +329,7 @@ int dm_extended_scan(bool pre_reloc_only) + for (i = 0; i < ARRAY_SIZE(nodes); i++) { + ret = dm_scan_fdt_ofnode_path(nodes[i], pre_reloc_only); + if (ret) { +- debug("dm_scan_fdt() scan for %s failed: %d\n", ++printf("dm_scan_fdt() scan for %s failed: %d\n", + nodes[i], ret); + return ret; + } +@@ -369,14 +369,14 @@ static int dm_scan(bool pre_reloc_only) + + ret = dm_scan_plat(pre_reloc_only); + if (ret) { +- debug("dm_scan_plat() failed: %d\n", ret); ++printf("dm_scan_plat() failed: %d\n", ret); + return ret; + } + + if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { + ret = dm_extended_scan(pre_reloc_only); + if (ret) { +- debug("dm_extended_scan() failed: %d\n", ret); ++printf("dm_extended_scan() failed: %d\n", ret); + return ret; + } + } +@@ -394,7 +394,7 @@ int dm_init_and_scan(bool pre_reloc_only) + + ret = dm_init(CONFIG_IS_ENABLED(OF_LIVE)); + if (ret) { +- debug("dm_init() failed: %d\n", ret); ++printf("dm_init() failed: %d\n", ret); + return ret; + } + if (!CONFIG_IS_ENABLED(OF_PLATDATA_INST)) { +diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c +index 117d35ac4..bd41a2d7d 100644 +--- a/drivers/core/uclass.c ++++ b/drivers/core/uclass.c +@@ -60,7 +60,7 @@ static int uclass_add(enum uclass_id id, struct uclass **ucp) + *ucp = NULL; + uc_drv = lists_uclass_lookup(id); + if (!uc_drv) { +- debug("Cannot find uclass for id %d: please add the UCLASS_DRIVER() declaration for this UCLASS_... id\n", ++printf("Cannot find uclass for id %d: please add the UCLASS_DRIVER() declaration for this UCLASS_... id\n", + id); + /* + * Use a strange error to make this case easier to find. When +diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c +index 1c338bad9..1652efea7 100644 +--- a/drivers/cpu/cpu-uclass.c ++++ b/drivers/cpu/cpu-uclass.c +@@ -20,14 +20,14 @@ int cpu_probe_all(void) + + ret = uclass_first_device(UCLASS_CPU, &cpu); + if (ret) { +- debug("%s: No CPU found (err = %d)\n", __func__, ret); ++printf("%s: No CPU found (err = %d)\n", __func__, ret); + return ret; + } + + while (cpu) { + ret = uclass_next_device(&cpu); + if (ret) { +- debug("%s: Error while probing CPU (err = %d)\n", ++printf("%s: Error while probing CPU (err = %d)\n", + __func__, ret); + return ret; + } +@@ -61,7 +61,7 @@ struct udevice *cpu_get_current_dev(void) + /* If can't find current cpu device, use the first dev instead */ + ret = uclass_first_device_err(UCLASS_CPU, &cpu); + if (ret) { +- debug("%s: Could not get CPU device (err = %d)\n", ++printf("%s: Could not get CPU device (err = %d)\n", + __func__, ret); + return NULL; + } +diff --git a/drivers/cpu/mpc83xx_cpu.c b/drivers/cpu/mpc83xx_cpu.c +index e451c1111..219b6566c 100644 +--- a/drivers/cpu/mpc83xx_cpu.c ++++ b/drivers/cpu/mpc83xx_cpu.c +@@ -250,14 +250,14 @@ static int mpc83xx_cpu_get_desc(const struct udevice *dev, char *buf, int size) + + ret = clk_get_by_index((struct udevice *)dev, 0, &core_clk); + if (ret) { +- debug("%s: Failed to get core clock (err = %d)\n", ++printf("%s: Failed to get core clock (err = %d)\n", + dev->name, ret); + return ret; + } + + ret = clk_get_by_index((struct udevice *)dev, 1, &csb_clk); + if (ret) { +- debug("%s: Failed to get CSB clock (err = %d)\n", ++printf("%s: Failed to get CSB clock (err = %d)\n", + dev->name, ret); + return ret; + } +@@ -287,14 +287,14 @@ static int mpc83xx_cpu_get_info(const struct udevice *dev, + + ret = clk_get_by_index((struct udevice *)dev, 0, &clock); + if (ret) { +- debug("%s: Failed to get core clock (err = %d)\n", ++printf("%s: Failed to get core clock (err = %d)\n", + dev->name, ret); + return ret; + } + + freq = clk_get_rate(&clock); + if (!freq) { +- debug("%s: Core clock speed is zero\n", dev->name); ++printf("%s: Core clock speed is zero\n", dev->name); + return -EINVAL; + } + +diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c +index b30dceba3..18fd3659b 100644 +--- a/drivers/cpu/riscv_cpu.c ++++ b/drivers/cpu/riscv_cpu.c +@@ -118,7 +118,7 @@ static int riscv_cpu_bind(struct udevice *dev) + if (plat->cpu_id == gd->arch.boot_hart && plat->timebase_freq) { + drv = lists_driver_lookup_name("riscv_timer"); + if (!drv) { +- debug("Cannot find the timer driver, not included?\n"); ++printf("Cannot find the timer driver, not included?\n"); + return 0; + } + +diff --git a/drivers/crypto/ace_sha.c b/drivers/crypto/ace_sha.c +index 261d3efe8..4d256b28f 100644 +--- a/drivers/crypto/ace_sha.c ++++ b/drivers/crypto/ace_sha.c +@@ -105,14 +105,14 @@ void hw_sha256(const unsigned char *pbuf, unsigned int buf_len, + unsigned char *pout, unsigned int chunk_size) + { + if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA256)) +- debug("ACE was not setup properly or it is faulty\n"); ++printf("ACE was not setup properly or it is faulty\n"); + } + + void hw_sha1(const unsigned char *pbuf, unsigned int buf_len, + unsigned char *pout, unsigned int chunk_size) + { + if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1)) +- debug("ACE was not setup properly or it is faulty\n"); ++printf("ACE was not setup properly or it is faulty\n"); + } + #endif /* CONFIG_SHA_HW_ACCEL */ + +diff --git a/drivers/crypto/fsl/error.c b/drivers/crypto/fsl/error.c +index c76574919..1fb9e9616 100644 +--- a/drivers/crypto/fsl/error.c ++++ b/drivers/crypto/fsl/error.c +@@ -171,7 +171,7 @@ static void report_ccb_status(const u32 status, + snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id); + } + +- debug("%08x: %s: %s %d: %s%s: %s%s\n", ++printf("%08x: %s: %s %d: %s%s: %s%s\n", + status, error, idx_str, idx, + cha_str, cha_err_code, + err_str, err_err_code); +@@ -180,7 +180,7 @@ static void report_ccb_status(const u32 status, + static void report_jump_status(const u32 status, + const char *error) + { +- debug("%08x: %s: %s() not implemented\n", ++printf("%08x: %s: %s() not implemented\n", + status, error, __func__); + } + +@@ -209,21 +209,21 @@ static void report_deco_status(const u32 status, + else + snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id); + +- debug("%08x: %s: %s %d: %s%s\n", ++printf("%08x: %s: %s %d: %s%s\n", + status, error, idx_str, idx, err_str, err_err_code); + } + + static void report_jr_status(const u32 status, + const char *error) + { +- debug("%08x: %s: %s() not implemented\n", ++printf("%08x: %s: %s() not implemented\n", + status, error, __func__); + } + + static void report_cond_code_status(const u32 status, + const char *error) + { +- debug("%08x: %s: %s() not implemented\n", ++printf("%08x: %s: %s() not implemented\n", + status, error, __func__); + } + +@@ -252,7 +252,7 @@ void caam_jr_strstatus(u32 status) + * call the handler function. + */ + if (!status_src[ssrc].report_ssed) +- debug("%08x: %s:\n", status, status_src[ssrc].error); ++printf("%08x: %s:\n", status, status_src[ssrc].error); + else + status_src[ssrc].report_ssed(status, error); + } +diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c +index e8202cc56..ebf02dd45 100644 +--- a/drivers/crypto/fsl/fsl_blob.c ++++ b/drivers/crypto/fsl/fsl_blob.c +@@ -43,7 +43,7 @@ int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) + printf("\nDecapsulating blob to get data\n"); + desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE); + if (!desc) { +- debug("Not enough memory for descriptor allocation\n"); ++printf("Not enough memory for descriptor allocation\n"); + return -ENOMEM; + } + +@@ -57,9 +57,9 @@ int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) + + inline_cnstr_jobdesc_blob_decap(desc, key_mod, src, dst, len); + +- debug("Descriptor dump:\n"); ++printf("Descriptor dump:\n"); + for (i = 0; i < 14; i++) +- debug("Word[%d]: %08x\n", i, *(desc + i)); ++printf("Word[%d]: %08x\n", i, *(desc + i)); + + size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN); + flush_dcache_range((unsigned long)desc, +@@ -111,7 +111,7 @@ int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) + printf("\nEncapsulating data to form blob\n"); + desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE); + if (!desc) { +- debug("Not enough memory for descriptor allocation\n"); ++printf("Not enough memory for descriptor allocation\n"); + return -ENOMEM; + } + +@@ -125,9 +125,9 @@ int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) + + inline_cnstr_jobdesc_blob_encap(desc, key_mod, src, dst, len); + +- debug("Descriptor dump:\n"); ++printf("Descriptor dump:\n"); + for (i = 0; i < 14; i++) +- debug("Word[%d]: %08x\n", i, *(desc + i)); ++printf("Word[%d]: %08x\n", i, *(desc + i)); + + size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN); + flush_dcache_range((unsigned long)desc, +@@ -164,13 +164,13 @@ int blob_dek(const u8 *src, u8 *dst, u8 len) + desc = memalign(ARCH_DMA_MINALIGN, + sizeof(uint32_t) * DEK_BLOB_DESCSIZE); + if (!desc) { +- debug("Not enough memory for descriptor allocation\n"); ++printf("Not enough memory for descriptor allocation\n"); + return -ENOMEM; + } + + ret = inline_cnstr_jobdesc_blob_dek(desc, src, dst, len); + if (ret) { +- debug("Error in Job Descriptor Construction: %d\n", ret); ++printf("Error in Job Descriptor Construction: %d\n", ret); + } else { + size = roundup(sizeof(uint32_t) * DEK_BLOB_DESCSIZE, + ARCH_DMA_MINALIGN); +@@ -184,7 +184,7 @@ int blob_dek(const u8 *src, u8 *dst, u8 len) + } + + if (ret) { +- debug("Error in Encapsulation %d\n", ret); ++printf("Error in Encapsulation %d\n", ret); + goto err; + } + +diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c +index 8b5c26db0..1278f20ea 100644 +--- a/drivers/crypto/fsl/fsl_hash.c ++++ b/drivers/crypto/fsl/fsl_hash.c +@@ -63,7 +63,7 @@ static int caam_hash_init(void **ctxp, enum caam_hash_algos caam_algo) + { + *ctxp = calloc(1, sizeof(struct sha_ctx)); + if (*ctxp == NULL) { +- debug("Cannot allocate memory for context\n"); ++printf("Cannot allocate memory for context\n"); + return -ENOMEM; + } + return 0; +@@ -153,7 +153,7 @@ static int caam_hash_finish(void *hash_ctx, void *dest_buf, + ret = run_descriptor_jr(ctx->sha_desc); + + if (ret) +- debug("Error %x\n", ret); ++printf("Error %x\n", ret); + else + memcpy(dest_buf, ctx->hash, sizeof(ctx->hash)); + +@@ -170,7 +170,7 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len, + + desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE); + if (!desc) { +- debug("Not enough memory for descriptor allocation\n"); ++printf("Not enough memory for descriptor allocation\n"); + return -ENOMEM; + } + +diff --git a/drivers/crypto/fsl/fsl_mfgprot.c b/drivers/crypto/fsl/fsl_mfgprot.c +index 29af79f57..fdee20fd6 100644 +--- a/drivers/crypto/fsl/fsl_mfgprot.c ++++ b/drivers/crypto/fsl/fsl_mfgprot.c +@@ -79,7 +79,7 @@ int gen_mppubk(u8 *dst) + dsc = memalign(ARCH_DMA_MINALIGN, + sizeof(uint32_t) * MFG_PUBK_DSC_WORDS); + if (!dsc) { +- debug("Not enough memory for descriptor allocation\n"); ++printf("Not enough memory for descriptor allocation\n"); + return -ENOMEM; + } + +@@ -97,7 +97,7 @@ int gen_mppubk(u8 *dst) + + ret = run_descriptor_jr(dsc); + if (ret) { +- debug("Error in public key generation %d\n", ret); ++printf("Error in public key generation %d\n", ret); + goto err; + } + +@@ -117,7 +117,7 @@ int sign_mppubk(const u8 *m, int data_size, u8 *dgst, u8 *c, u8 *d) + dsc = memalign(ARCH_DMA_MINALIGN, + sizeof(uint32_t) * MFG_SIGN_DSC_WORDS); + if (!dsc) { +- debug("Not enough memory for descriptor allocation\n"); ++printf("Not enough memory for descriptor allocation\n"); + return -ENOMEM; + } + +@@ -142,7 +142,7 @@ int sign_mppubk(const u8 *m, int data_size, u8 *dgst, u8 *c, u8 *d) + + ret = run_descriptor_jr(dsc); + if (ret) { +- debug("Error in public key generation %d\n", ret); ++printf("Error in public key generation %d\n", ret); + goto err; + } + +diff --git a/drivers/crypto/fsl/fsl_rsa.c b/drivers/crypto/fsl/fsl_rsa.c +index 897ee855e..a4a9e7b4b 100644 +--- a/drivers/crypto/fsl/fsl_rsa.c ++++ b/drivers/crypto/fsl/fsl_rsa.c +@@ -38,7 +38,7 @@ int fsl_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len, + + ret = run_descriptor_jr(desc); + if (ret) { +- debug("%s: RSA failed to verify: %d\n", __func__, ret); ++printf("%s: RSA failed to verify: %d\n", __func__, ret); + return -EFAULT; + } + +diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c +index 22b649219..c7053ae84 100644 +--- a/drivers/crypto/fsl/jr.c ++++ b/drivers/crypto/fsl/jr.c +@@ -366,7 +366,7 @@ static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) + + ret = jr_enqueue(desc, desc_done, &op, sec_idx); + if (ret) { +- debug("Error in SEC enq\n"); ++printf("Error in SEC enq\n"); + ret = JQ_ENQ_ERR; + goto out; + } +@@ -377,20 +377,20 @@ static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) + + ret = jr_dequeue(sec_idx); + if (ret) { +- debug("Error in SEC deq\n"); ++printf("Error in SEC deq\n"); + ret = JQ_DEQ_ERR; + goto out; + } + + if (timeval > timeout) { +- debug("SEC Dequeue timed out\n"); ++printf("SEC Dequeue timed out\n"); + ret = JQ_DEQ_TO_ERR; + goto out; + } + } + + if (op.status) { +- debug("Error %x\n", op.status); ++printf("Error %x\n", op.status); + ret = op.status; + } + out: +@@ -459,7 +459,7 @@ static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) + + desc = memalign(ARCH_DMA_MINALIGN, desc_size); + if (!desc) { +- debug("cannot allocate RNG init descriptor memory\n"); ++printf("cannot allocate RNG init descriptor memory\n"); + return -ENOMEM; + } + +diff --git a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c +index 7bed444c3..35ee0dd5a 100644 +--- a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c ++++ b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c +@@ -17,7 +17,7 @@ static int mod_exp_sw(struct udevice *dev, const uint8_t *sig, uint32_t sig_len, + + ret = rsa_mod_exp_sw(sig, sig_len, prop, out); + if (ret) { +- debug("%s: RSA failed to verify: %d\n", __func__, ret); ++printf("%s: RSA failed to verify: %d\n", __func__, ret); + return ret; + } + +diff --git a/drivers/ddr/altera/sdram_agilex.c b/drivers/ddr/altera/sdram_agilex.c +index 65ecdd022..0c2d285d2 100644 +--- a/drivers/ddr/altera/sdram_agilex.c ++++ b/drivers/ddr/altera/sdram_agilex.c +@@ -35,7 +35,7 @@ int sdram_mmr_init_full(struct udevice *dev) + + /* Ensure HMC clock is running */ + if (poll_hmc_clock_status()) { +- debug("DDR: Error as HMC clock was not running\n"); ++printf("DDR: Error as HMC clock was not running\n"); + return -EPERM; + } + +@@ -55,7 +55,7 @@ int sdram_mmr_init_full(struct udevice *dev) + puts("DDR: Error as SDRAM calibration failed\n"); + return -EPERM; + } +- debug("DDR: Calibration success\n"); ++printf("DDR: Calibration success\n"); + + /* + * Configure the DDR IO size +@@ -166,6 +166,6 @@ int sdram_mmr_init_full(struct udevice *dev) + priv->info.base = bd.bi_dram[0].start; + priv->info.size = gd->ram_size; + +- debug("DDR: HMC init success\n"); ++printf("DDR: HMC init success\n"); + return 0; + } +diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c +index 4a8f8dea1..7f51ab28c 100644 +--- a/drivers/ddr/altera/sdram_arria10.c ++++ b/drivers/ddr/altera/sdram_arria10.c +@@ -125,7 +125,7 @@ static int emif_reset(void) + c2s = readl(DDR_REG_CORE2SEQ); + s2c = readl(DDR_REG_SEQ2CORE); + +- debug("c2s=%08x s2c=%08x nr0=%08x nr1=%08x nr2=%08x dst=%08x\n", ++printf("c2s=%08x s2c=%08x nr0=%08x nr1=%08x nr2=%08x dst=%08x\n", + c2s, s2c, readl(IO48_MMR_NIOS2_RESERVE0), + readl(IO48_MMR_NIOS2_RESERVE1), + readl(IO48_MMR_NIOS2_RESERVE2), +@@ -134,7 +134,7 @@ static int emif_reset(void) + if (s2c & SEQ2CORE_MASK) { + ret = emif_clear(); + if (ret) { +- debug("failed emif_clear()\n"); ++printf("failed emif_clear()\n"); + return -EPERM; + } + } +@@ -144,7 +144,7 @@ static int emif_reset(void) + ret = wait_for_bit_le32((u32 *)DDR_REG_SEQ2CORE, + SEQ2CORE_INT_RESP_BIT, false, 1000, false); + if (ret) { +- debug("emif_reset failed to see interrupt acknowledge\n"); ++printf("emif_reset failed to see interrupt acknowledge\n"); + emif_clear(); + return ret; + } +@@ -153,12 +153,12 @@ static int emif_reset(void) + + ret = emif_clear(); + if (ret) { +- debug("emif_clear() failed\n"); ++printf("emif_clear() failed\n"); + return -EPERM; + } +- debug("emif_reset interrupt cleared\n"); ++printf("emif_reset interrupt cleared\n"); + +- debug("nr0=%08x nr1=%08x nr2=%08x\n", ++printf("nr0=%08x nr1=%08x nr2=%08x\n", + readl(IO48_MMR_NIOS2_RESERVE0), + readl(IO48_MMR_NIOS2_RESERVE1), + readl(IO48_MMR_NIOS2_RESERVE2)); +@@ -242,7 +242,7 @@ static u64 sdram_size_calc(void) + size *= (2 << (readl(&socfpga_ecc_hmc_base->ddrioctrl) & + ALT_ECC_HMC_OCP_DDRIOCTRL_IO_SIZE_MSK)); + +- debug("SDRAM size=%llu\n", size); ++printf("SDRAM size=%llu\n", size); + + return size; + } +diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c +index 8d3ce495d..9589844be 100644 +--- a/drivers/ddr/altera/sdram_gen5.c ++++ b/drivers/ddr/altera/sdram_gen5.c +@@ -76,18 +76,18 @@ static int get_errata_rows(const struct socfpga_sdram_config *cfg) + unsigned long long newrows; + int bits, inewrowslog2; + +- debug("workaround rows - memsize %lld\n", memsize); +- debug("workaround rows - cs %d\n", cs); +- debug("workaround rows - width %d\n", width); +- debug("workaround rows - rows %d\n", rows); +- debug("workaround rows - banks %d\n", banks); +- debug("workaround rows - cols %d\n", cols); ++printf("workaround rows - memsize %lld\n", memsize); ++printf("workaround rows - cs %d\n", cs); ++printf("workaround rows - width %d\n", width); ++printf("workaround rows - rows %d\n", rows); ++printf("workaround rows - banks %d\n", banks); ++printf("workaround rows - cols %d\n", cols); + + newrows = lldiv(memsize, cs * (width / 8)); +- debug("rows workaround - term1 %lld\n", newrows); ++printf("rows workaround - term1 %lld\n", newrows); + + newrows = lldiv(newrows, (1 << banks) * (1 << cols)); +- debug("rows workaround - term2 %lld\n", newrows); ++printf("rows workaround - term2 %lld\n", newrows); + + /* + * Compute the hamming weight - same as number of bits set. +@@ -96,7 +96,7 @@ static int get_errata_rows(const struct socfpga_sdram_config *cfg) + */ + bits = generic_hweight32(newrows); + +- debug("rows workaround - bits %d\n", bits); ++printf("rows workaround - bits %d\n", bits); + + if (bits != 1) { + printf("SDRAM workaround failed, bits set %d\n", bits); +@@ -110,7 +110,7 @@ static int get_errata_rows(const struct socfpga_sdram_config *cfg) + + inewrowslog2 = __ilog2(newrows); + +- debug("rows workaround - ilog2 %d, %lld\n", inewrowslog2, newrows); ++printf("rows workaround - ilog2 %d, %lld\n", inewrowslog2, newrows); + + if (inewrowslog2 == -1) { + printf("SDRAM workaround failed, newrows %lld\n", newrows); +@@ -135,9 +135,9 @@ static void sdram_set_rule(struct socfpga_sdr_ctrl *sdr_ctrl, + lo_addr_bits = prule->sdram_start >> 20ULL; + hi_addr_bits = (prule->sdram_end - 1) >> 20ULL; + +- debug("sdram set rule start %x, %d\n", lo_addr_bits, ++printf("sdram set rule start %x, %d\n", lo_addr_bits, + prule->sdram_start); +- debug("sdram set rule end %x, %d\n", hi_addr_bits, ++printf("sdram set rule end %x, %d\n", hi_addr_bits, + prule->sdram_end); + + /* Set rule addresses */ +@@ -231,22 +231,22 @@ static void sdram_dump_protection_config(struct socfpga_sdr_ctrl *sdr_ctrl) + struct sdram_prot_rule rule; + int rules; + +- debug("SDRAM Prot rule, default %x\n", ++printf("SDRAM Prot rule, default %x\n", + readl(&sdr_ctrl->protport_default)); + + for (rules = 0; rules < 20; rules++) { + rule.rule = rules; + sdram_get_rule(sdr_ctrl, &rule); +- debug("Rule %d, rules ...\n", rules); +- debug(" sdram start %x\n", rule.sdram_start); +- debug(" sdram end %x\n", rule.sdram_end); +- debug(" low prot id %d, hi prot id %d\n", ++printf("Rule %d, rules ...\n", rules); ++printf(" sdram start %x\n", rule.sdram_start); ++printf(" sdram end %x\n", rule.sdram_end); ++printf(" low prot id %d, hi prot id %d\n", + rule.lo_prot_id, + rule.hi_prot_id); +- debug(" portmask %x\n", rule.portmask); +- debug(" security %d\n", rule.security); +- debug(" result %d\n", rule.result); +- debug(" valid %d\n", rule.valid); ++printf(" portmask %x\n", rule.portmask); ++printf(" security %d\n", rule.security); ++printf(" result %d\n", rule.result); ++printf(" valid %d\n", rule.valid); + } + } + +@@ -262,18 +262,18 @@ static unsigned sdram_write_verify(const u32 *addr, const u32 val) + { + u32 rval; + +- debug(" Write - Address 0x%p Data 0x%08x\n", addr, val); ++printf(" Write - Address 0x%p Data 0x%08x\n", addr, val); + writel(val, addr); + +- debug(" Read and verify..."); ++printf(" Read and verify..."); + rval = readl(addr); + if (rval != val) { +- debug("FAIL - Address 0x%p Expected 0x%08x Data 0x%08x\n", ++printf("FAIL - Address 0x%p Expected 0x%08x Data 0x%08x\n", + addr, val, rval); + return -EINVAL; + } + +- debug("correct!\n"); ++printf("correct!\n"); + return 0; + } + +@@ -301,11 +301,11 @@ static u32 sdr_get_ctrlcfg(const struct socfpga_sdram_config *cfg) + */ + if (csbits == 1) { + if (addrorder != 0) +- debug("INFO: Changing address order to 0 (chip, row, bank, column)\n"); ++printf("INFO: Changing address order to 0 (chip, row, bank, column)\n"); + addrorder = 0; + } else if (csbits == 2) { + if (addrorder != 2) +- debug("INFO: Changing address order to 2 (row, chip, bank, column)\n"); ++printf("INFO: Changing address order to 2 (row, chip, bank, column)\n"); + addrorder = 2; + } + +@@ -348,97 +348,97 @@ static void sdr_load_regs(struct socfpga_sdr_ctrl *sdr_ctrl, + const u32 ctrl_cfg = sdr_get_ctrlcfg(cfg); + const u32 dram_addrw = sdr_get_addr_rw(cfg); + +- debug("\nConfiguring CTRLCFG\n"); ++printf("\nConfiguring CTRLCFG\n"); + writel(ctrl_cfg, &sdr_ctrl->ctrl_cfg); + +- debug("Configuring DRAMTIMING1\n"); ++printf("Configuring DRAMTIMING1\n"); + writel(cfg->dram_timing1, &sdr_ctrl->dram_timing1); + +- debug("Configuring DRAMTIMING2\n"); ++printf("Configuring DRAMTIMING2\n"); + writel(cfg->dram_timing2, &sdr_ctrl->dram_timing2); + +- debug("Configuring DRAMTIMING3\n"); ++printf("Configuring DRAMTIMING3\n"); + writel(cfg->dram_timing3, &sdr_ctrl->dram_timing3); + +- debug("Configuring DRAMTIMING4\n"); ++printf("Configuring DRAMTIMING4\n"); + writel(cfg->dram_timing4, &sdr_ctrl->dram_timing4); + +- debug("Configuring LOWPWRTIMING\n"); ++printf("Configuring LOWPWRTIMING\n"); + writel(cfg->lowpwr_timing, &sdr_ctrl->lowpwr_timing); + +- debug("Configuring DRAMADDRW\n"); ++printf("Configuring DRAMADDRW\n"); + writel(dram_addrw, &sdr_ctrl->dram_addrw); + +- debug("Configuring DRAMIFWIDTH\n"); ++printf("Configuring DRAMIFWIDTH\n"); + writel(cfg->dram_if_width, &sdr_ctrl->dram_if_width); + +- debug("Configuring DRAMDEVWIDTH\n"); ++printf("Configuring DRAMDEVWIDTH\n"); + writel(cfg->dram_dev_width, &sdr_ctrl->dram_dev_width); + +- debug("Configuring LOWPWREQ\n"); ++printf("Configuring LOWPWREQ\n"); + writel(cfg->lowpwr_eq, &sdr_ctrl->lowpwr_eq); + +- debug("Configuring DRAMINTR\n"); ++printf("Configuring DRAMINTR\n"); + writel(cfg->dram_intr, &sdr_ctrl->dram_intr); + +- debug("Configuring STATICCFG\n"); ++printf("Configuring STATICCFG\n"); + writel(cfg->static_cfg, &sdr_ctrl->static_cfg); + +- debug("Configuring CTRLWIDTH\n"); ++printf("Configuring CTRLWIDTH\n"); + writel(cfg->ctrl_width, &sdr_ctrl->ctrl_width); + +- debug("Configuring PORTCFG\n"); ++printf("Configuring PORTCFG\n"); + writel(cfg->port_cfg, &sdr_ctrl->port_cfg); + +- debug("Configuring FIFOCFG\n"); ++printf("Configuring FIFOCFG\n"); + writel(cfg->fifo_cfg, &sdr_ctrl->fifo_cfg); + +- debug("Configuring MPPRIORITY\n"); ++printf("Configuring MPPRIORITY\n"); + writel(cfg->mp_priority, &sdr_ctrl->mp_priority); + +- debug("Configuring MPWEIGHT_MPWEIGHT_0\n"); ++printf("Configuring MPWEIGHT_MPWEIGHT_0\n"); + writel(cfg->mp_weight0, &sdr_ctrl->mp_weight0); + writel(cfg->mp_weight1, &sdr_ctrl->mp_weight1); + writel(cfg->mp_weight2, &sdr_ctrl->mp_weight2); + writel(cfg->mp_weight3, &sdr_ctrl->mp_weight3); + +- debug("Configuring MPPACING_MPPACING_0\n"); ++printf("Configuring MPPACING_MPPACING_0\n"); + writel(cfg->mp_pacing0, &sdr_ctrl->mp_pacing0); + writel(cfg->mp_pacing1, &sdr_ctrl->mp_pacing1); + writel(cfg->mp_pacing2, &sdr_ctrl->mp_pacing2); + writel(cfg->mp_pacing3, &sdr_ctrl->mp_pacing3); + +- debug("Configuring MPTHRESHOLDRST_MPTHRESHOLDRST_0\n"); ++printf("Configuring MPTHRESHOLDRST_MPTHRESHOLDRST_0\n"); + writel(cfg->mp_threshold0, &sdr_ctrl->mp_threshold0); + writel(cfg->mp_threshold1, &sdr_ctrl->mp_threshold1); + writel(cfg->mp_threshold2, &sdr_ctrl->mp_threshold2); + +- debug("Configuring PHYCTRL_PHYCTRL_0\n"); ++printf("Configuring PHYCTRL_PHYCTRL_0\n"); + writel(cfg->phy_ctrl0, &sdr_ctrl->phy_ctrl0); + +- debug("Configuring CPORTWIDTH\n"); ++printf("Configuring CPORTWIDTH\n"); + writel(cfg->cport_width, &sdr_ctrl->cport_width); + +- debug("Configuring CPORTWMAP\n"); ++printf("Configuring CPORTWMAP\n"); + writel(cfg->cport_wmap, &sdr_ctrl->cport_wmap); + +- debug("Configuring CPORTRMAP\n"); ++printf("Configuring CPORTRMAP\n"); + writel(cfg->cport_rmap, &sdr_ctrl->cport_rmap); + +- debug("Configuring RFIFOCMAP\n"); ++printf("Configuring RFIFOCMAP\n"); + writel(cfg->rfifo_cmap, &sdr_ctrl->rfifo_cmap); + +- debug("Configuring WFIFOCMAP\n"); ++printf("Configuring WFIFOCMAP\n"); + writel(cfg->wfifo_cmap, &sdr_ctrl->wfifo_cmap); + +- debug("Configuring CPORTRDWR\n"); ++printf("Configuring CPORTRDWR\n"); + writel(cfg->cport_rdwr, &sdr_ctrl->cport_rdwr); + +- debug("Configuring DRAMODT\n"); ++printf("Configuring DRAMODT\n"); + writel(cfg->dram_odt, &sdr_ctrl->dram_odt); + + if (dram_is_ddr(3)) { +- debug("Configuring EXTRATIME1\n"); ++printf("Configuring EXTRATIME1\n"); + writel(cfg->extratime1, &sdr_ctrl->extratime1); + } + } +@@ -480,7 +480,7 @@ int sdram_mmr_init_full(struct socfpga_sdr_ctrl *sdr_ctrl, + writel(sdr_phy_reg, &sdr_ctrl->phy_ctrl0); + + /* Final step - apply configuration changes */ +- debug("Configuring STATICCFG\n"); ++printf("Configuring STATICCFG\n"); + clrsetbits_le32(&sdr_ctrl->static_cfg, + SDR_CTRLGRP_STATICCFG_APPLYCFG_MASK, + 1 << SDR_CTRLGRP_STATICCFG_APPLYCFG_LSB); +@@ -558,7 +558,7 @@ static unsigned long sdram_calculate_size(struct socfpga_sdr_ctrl *sdr_ctrl) + temp = 1 << (row + bank + col); + temp = temp * cs * (width / 8); + +- debug("%s returns %ld\n", __func__, temp); ++printf("%s returns %ld\n", __func__, temp); + + return temp; + } +@@ -595,7 +595,7 @@ static int altera_gen5_sdram_probe(struct udevice *dev) + goto failed; + } + +- debug("SDRAM: Calibrating PHY\n"); ++printf("SDRAM: Calibrating PHY\n"); + /* SDRAM calibration */ + if (sdram_calibration_full(plat->sdr) == 0) { + puts("SDRAM calibration failed.\n"); +@@ -603,7 +603,7 @@ static int altera_gen5_sdram_probe(struct udevice *dev) + } + + sdram_size = sdram_calculate_size(sdr_ctrl); +- debug("SDRAM: %ld MiB\n", sdram_size >> 20); ++printf("SDRAM: %ld MiB\n", sdram_size >> 20); + + /* Sanity check ensure correct SDRAM size specified */ + if (get_ram_size(0, sdram_size) != sdram_size) { +diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c +index 3caa2e14f..c1e8f1022 100644 +--- a/drivers/ddr/altera/sdram_s10.c ++++ b/drivers/ddr/altera/sdram_s10.c +@@ -159,7 +159,7 @@ int sdram_mmr_init_full(struct udevice *dev) + puts("DDR: Error as SDRAM calibration failed\n"); + return -1; + } +- debug("DDR: Calibration success\n"); ++printf("DDR: Calibration success\n"); + + u32 ctrlcfg0 = hmc_readl(plat, CTRLCFG0); + u32 ctrlcfg1 = hmc_readl(plat, CTRLCFG1); +@@ -332,7 +332,7 @@ int sdram_mmr_init_full(struct udevice *dev) + priv->info.base = bd.bi_dram[0].start; + priv->info.size = gd->ram_size; + +- debug("DDR: HMC init success\n"); ++printf("DDR: HMC init success\n"); + return 0; + } + +diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c +index a08f0953e..2fc17356c 100644 +--- a/drivers/ddr/altera/sdram_soc64.c ++++ b/drivers/ddr/altera/sdram_soc64.c +@@ -67,7 +67,7 @@ int emif_reset(struct altera_sdram_plat *plat) + c2s = hmc_ecc_readl(plat, RSTHANDSHAKECTRL) & DDR_HMC_RSTHANDSHAKE_MASK; + s2c = hmc_ecc_readl(plat, RSTHANDSHAKESTAT) & DDR_HMC_RSTHANDSHAKE_MASK; + +- debug("DDR: c2s=%08x s2c=%08x nr0=%08x nr1=%08x nr2=%08x dst=%08x\n", ++printf("DDR: c2s=%08x s2c=%08x nr0=%08x nr1=%08x nr2=%08x dst=%08x\n", + c2s, s2c, hmc_readl(plat, NIOSRESERVED0), + hmc_readl(plat, NIOSRESERVED1), hmc_readl(plat, NIOSRESERVED2), + hmc_readl(plat, DRAMSTS)); +@@ -77,7 +77,7 @@ int emif_reset(struct altera_sdram_plat *plat) + return -1; + } + +- debug("DDR: Triggerring emif reset\n"); ++printf("DDR: Triggerring emif reset\n"); + hmc_ecc_writel(plat, DDR_HMC_CORE2SEQ_INT_REQ, RSTHANDSHAKECTRL); + + /* if seq2core[3] = 0, we are good */ +@@ -96,7 +96,7 @@ int emif_reset(struct altera_sdram_plat *plat) + return ret; + } + +- debug("DDR: %s triggered successly\n", __func__); ++printf("DDR: %s triggered successly\n", __func__); + return 0; + } + +@@ -185,7 +185,7 @@ void sdram_size_check(struct bd_info *bd) + int bank; + + /* Sanity check ensure correct SDRAM size specified */ +- debug("DDR: Running SDRAM size sanity check\n"); ++printf("DDR: Running SDRAM size sanity check\n"); + + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + start = bd->bi_dram[bank].start; +@@ -206,7 +206,7 @@ void sdram_size_check(struct bd_info *bd) + hang(); + } + +- debug("DDR: SDRAM size check passed!\n"); ++printf("DDR: SDRAM size check passed!\n"); + } + + /** +diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c +index 6b9b2e909..34137db7e 100644 +--- a/drivers/ddr/altera/sequencer.c ++++ b/drivers/ddr/altera/sequencer.c +@@ -110,7 +110,7 @@ static void phy_mgr_initialize(struct socfpga_sdrseq *seq) + { + u32 ratio; + +- debug("%s:%d\n", __func__, __LINE__); ++printf("%s:%d\n", __func__, __LINE__); + /* Calibration has control over path to memory */ + /* + * In Hard PHY this is a 2-bit control: +@@ -805,7 +805,7 @@ static void delay_for_n_mem_clocks(struct socfpga_sdrseq *seq, + u8 inner; + u8 outer; + +- debug("%s:%d: clocks=%u ... start\n", __func__, __LINE__, clocks); ++printf("%s:%d: clocks=%u ... start\n", __func__, __LINE__, clocks); + + /* Scale (rounding up) to get afi clocks. */ + afi_clocks = DIV_ROUND_UP(clocks, seq->misccfg->afi_rate_ratio); +@@ -868,7 +868,7 @@ static void delay_for_n_mem_clocks(struct socfpga_sdrseq *seq, + RW_MGR_RUN_SINGLE_GROUP_OFFSET); + } while (c_loop-- != 0); + } +- debug("%s:%d clocks=%u ... end\n", __func__, __LINE__, clocks); ++printf("%s:%d clocks=%u ... end\n", __func__, __LINE__, clocks); + } + + static void delay_for_n_ns(struct socfpga_sdrseq *seq, const u32 ns) +@@ -1044,7 +1044,7 @@ static void rw_mgr_mem_load_user(struct socfpga_sdrseq *seq, + */ + static void rw_mgr_mem_initialize(struct socfpga_sdrseq *seq) + { +- debug("%s:%d\n", __func__, __LINE__); ++printf("%s:%d\n", __func__, __LINE__); + + /* The reset / cke part of initialization is broadcasted to all ranks */ + if (dram_is_ddr(3)) { +@@ -1442,7 +1442,7 @@ static void rw_mgr_mem_calibrate_read_load_patterns(struct socfpga_sdrseq *seq, + (rank_bgn + NUM_RANKS_PER_SHADOW_REG); + u32 r; + +- debug("%s:%d\n", __func__, __LINE__); ++printf("%s:%d\n", __func__, __LINE__); + + for (r = rank_bgn; r < rank_end; r++) { + /* set rank */ +@@ -1955,7 +1955,7 @@ rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(struct socfpga_sdrseq *seq, + u32 found_passing_read, found_failing_read = 0, initial_failing_dtap; + int ret; + +- debug("%s:%d %u\n", __func__, __LINE__, grp); ++printf("%s:%d %u\n", __func__, __LINE__, grp); + + reg_file_set_sub_stage(CAL_SUBSTAGE_VFIFO_CENTER); + +@@ -2561,7 +2561,7 @@ static int rw_mgr_mem_calibrate_vfifo_center(struct socfpga_sdrseq *seq, + int i, min_index; + int ret; + +- debug("%s:%d: %u %u", __func__, __LINE__, rw_group, test_bgn); ++printf("%s:%d: %u %u", __func__, __LINE__, rw_group, test_bgn); + + start_dqs = readl(addr); + if (seq->iocfg->shift_dqs_en_when_shift_dqs) +@@ -2744,7 +2744,7 @@ rw_mgr_mem_calibrate_dqs_enable_calibration(struct socfpga_sdrseq *seq, + int ret; + u32 i, p, d, r; + +- debug("%s:%d (%u,%u)\n", __func__, __LINE__, rw_group, test_bgn); ++printf("%s:%d (%u,%u)\n", __func__, __LINE__, rw_group, test_bgn); + + /* Try different dq_in_delays since the DQ path is shorter than DQS. */ + for (r = 0; r < seq->rwcfg->mem_number_of_ranks; +@@ -2850,7 +2850,7 @@ static int rw_mgr_mem_calibrate_vfifo(struct socfpga_sdrseq *seq, + + int ret; + +- debug("%s:%d: %u %u\n", __func__, __LINE__, rw_group, test_bgn); ++printf("%s:%d: %u %u\n", __func__, __LINE__, rw_group, test_bgn); + + /* Update info for sims */ + reg_file_set_group(rw_group); +@@ -2947,7 +2947,7 @@ static int rw_mgr_mem_calibrate_vfifo_end(struct socfpga_sdrseq *seq, + { + int ret; + +- debug("%s:%d %u %u", __func__, __LINE__, rw_group, test_bgn); ++printf("%s:%d %u %u", __func__, __LINE__, rw_group, test_bgn); + + /* Update info for sims. */ + reg_file_set_group(rw_group); +@@ -2976,7 +2976,7 @@ static u32 rw_mgr_mem_calibrate_lfifo(struct socfpga_sdrseq *seq) + { + int found_one = 0; + +- debug("%s:%d\n", __func__, __LINE__); ++printf("%s:%d\n", __func__, __LINE__); + + /* Update info for sims. */ + reg_file_set_stage(CAL_STAGE_LFIFO); +@@ -3143,7 +3143,7 @@ rw_mgr_mem_calibrate_writes_center(struct socfpga_sdrseq *seq, + + int ret; + +- debug("%s:%d %u %u", __func__, __LINE__, write_group, test_bgn); ++printf("%s:%d %u %u", __func__, __LINE__, write_group, test_bgn); + + dm_margin = 0; + +@@ -3292,7 +3292,7 @@ static int rw_mgr_mem_calibrate_writes(struct socfpga_sdrseq *seq, + int ret; + + /* Update info for sims */ +- debug("%s:%d %u %u\n", __func__, __LINE__, group, test_bgn); ++printf("%s:%d %u %u\n", __func__, __LINE__, group, test_bgn); + + reg_file_set_group(group); + reg_file_set_stage(CAL_STAGE_WRITES); +@@ -3355,7 +3355,7 @@ static void mem_init_latency(struct socfpga_sdrseq *seq) + - 1; + u32 rlat, wlat; + +- debug("%s:%d\n", __func__, __LINE__); ++printf("%s:%d\n", __func__, __LINE__); + + /* + * Read in write latency. +@@ -3390,7 +3390,7 @@ static void mem_skip_calibrate(struct socfpga_sdrseq *seq) + u32 vfifo_offset; + u32 i, j, r; + +- debug("%s:%d\n", __func__, __LINE__); ++printf("%s:%d\n", __func__, __LINE__); + /* Need to update every shadow register set used by the interface */ + for (r = 0; r < seq->rwcfg->mem_number_of_ranks; + r += NUM_RANKS_PER_SHADOW_REG) { +@@ -3489,7 +3489,7 @@ static u32 mem_calibrate(struct socfpga_sdrseq *seq) + const u32 rwdqs_ratio = seq->rwcfg->mem_if_read_dqs_width / + seq->rwcfg->mem_if_write_dqs_width; + +- debug("%s:%d\n", __func__, __LINE__); ++printf("%s:%d\n", __func__, __LINE__); + + /* Initialize the data settings */ + seq->gbl.error_substage = CAL_SUBSTAGE_NIL; +@@ -3668,7 +3668,7 @@ static int run_mem_calibrate(struct socfpga_sdrseq *seq) + int pass; + u32 ctrl_cfg; + +- debug("%s:%d\n", __func__, __LINE__); ++printf("%s:%d\n", __func__, __LINE__); + + /* Reset pass/fail status shown on afi_cal_success/fail */ + writel(PHY_MGR_CAL_RESET, &phy_mgr_cfg->cal_status); +@@ -3714,7 +3714,7 @@ static void debug_mem_calibrate(struct socfpga_sdrseq *seq, int pass) + u32 debug_info; + + if (pass) { +- debug("%s: CALIBRATION PASSED\n", __FILE__); ++printf("%s: CALIBRATION PASSED\n", __FILE__); + + seq->gbl.fom_in /= 2; + seq->gbl.fom_out /= 2; +@@ -3733,7 +3733,7 @@ static void debug_mem_calibrate(struct socfpga_sdrseq *seq, int pass) + writel(debug_info, &phy_mgr_cfg->cal_debug_info); + writel(PHY_MGR_CAL_SUCCESS, &phy_mgr_cfg->cal_status); + } else { +- debug("%s: CALIBRATION FAILED\n", __FILE__); ++printf("%s: CALIBRATION FAILED\n", __FILE__); + + debug_info = seq->gbl.error_stage; + debug_info |= seq->gbl.error_substage << 8; +@@ -3750,7 +3750,7 @@ static void debug_mem_calibrate(struct socfpga_sdrseq *seq, int pass) + writel(debug_info, &sdr_reg_file->failing_stage); + } + +- debug("%s: Calibration complete\n", __FILE__); ++printf("%s: Calibration complete\n", __FILE__); + } + + /** +@@ -3934,9 +3934,9 @@ int sdram_calibration_full(struct socfpga_sdr *sdr) + + initialize_tracking(&seq); + +- debug("%s: Preparing to start memory calibration\n", __FILE__); ++printf("%s: Preparing to start memory calibration\n", __FILE__); + +- debug("%s:%d\n", __func__, __LINE__); ++printf("%s:%d\n", __func__, __LINE__); + debug_cond(DLEVEL >= 1, + "DDR3 FULL_RATE ranks=%u cs/dimm=%u dq/dqs=%u,%u vg/dqs=%u,%u ", + seq.rwcfg->mem_number_of_ranks, +diff --git a/drivers/ddr/fsl/arm_ddr_gen3.c b/drivers/ddr/fsl/arm_ddr_gen3.c +index 629ba6784..849fb5c98 100644 +--- a/drivers/ddr/fsl/arm_ddr_gen3.c ++++ b/drivers/ddr/fsl/arm_ddr_gen3.c +@@ -148,7 +148,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + ddr_out32(&ddr->err_int_en, regs->err_int_en); + for (i = 0; i < 32; i++) { + if (regs->debug[i]) { +- debug("Write to debug_%d as %08x\n", i + 1, ++printf("Write to debug_%d as %08x\n", i + 1, + regs->debug[i]); + ddr_out32(&ddr->debug[i], regs->debug[i]); + } +@@ -226,8 +226,8 @@ step2: + timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 / + (get_ddr_freq(ctrl_num) >> 20)) << 1; + total_gb_size_per_controller >>= 4; /* shift down to gb size */ +- debug("total %d GB\n", total_gb_size_per_controller); +- debug("Need to wait up to %d * 10ms\n", timeout); ++printf("total %d GB\n", total_gb_size_per_controller); ++printf("Need to wait up to %d * 10ms\n", timeout); + + /* Poll DDR_SDRAM_CFG_2[D_INIT] bit until auto-data init is done. */ + while ((ddr_in32(&ddr->sdram_cfg_2) & SDRAM_CFG2_D_INIT) && +diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c +index c849ef3a4..e2e016567 100644 +--- a/drivers/ddr/fsl/ctrl_regs.c ++++ b/drivers/ddr/fsl/ctrl_regs.c +@@ -243,7 +243,7 @@ static void set_csn_config(int dimm_number, int i, fsl_ddr_cfg_regs_t *ddr, + #endif + | ((col_bits_cs_n & 0x7) << 0) + ); +- debug("FSLDDR: cs[%d]_config = 0x%08x\n", i,ddr->cs[i].config); ++printf("FSLDDR: cs[%d]_config = 0x%08x\n", i,ddr->cs[i].config); + } + + /* Chip Select Configuration 2 (CSn_CONFIG_2) */ +@@ -253,7 +253,7 @@ static void set_csn_config_2(int i, fsl_ddr_cfg_regs_t *ddr) + unsigned int pasr_cfg = 0; /* Partial array self refresh config */ + + ddr->cs[i].config_2 = ((pasr_cfg & 7) << 24); +- debug("FSLDDR: cs[%d]_config_2 = 0x%08x\n", i, ddr->cs[i].config_2); ++printf("FSLDDR: cs[%d]_config_2 = 0x%08x\n", i, ddr->cs[i].config_2); + } + + /* -3E = 667 CL5, -25 = CL6 800, -25E = CL5 800 */ +@@ -447,7 +447,7 @@ static void set_timing_cfg_0(const unsigned int ctrl_num, + | ((taxpd_mclk & 0xf) << 8) /* ODT_PD_EXIT */ + | ((tmrd_mclk & 0x1f) << 0) /* MRS_CYC */ + ); +- debug("FSLDDR: timing_cfg_0 = 0x%08x\n", ddr->timing_cfg_0); ++printf("FSLDDR: timing_cfg_0 = 0x%08x\n", ddr->timing_cfg_0); + } + #endif /* !defined(CONFIG_SYS_FSL_DDR1) */ + +@@ -500,7 +500,7 @@ static void set_timing_cfg_3(const unsigned int ctrl_num, + | ((ext_wrrec & 0x1) << 8) + | ((cntl_adj & 0x7) << 0) + ); +- debug("FSLDDR: timing_cfg_3 = 0x%08x\n", ddr->timing_cfg_3); ++printf("FSLDDR: timing_cfg_3 = 0x%08x\n", ddr->timing_cfg_3); + } + + /* DDR SDRAM Timing Configuration 1 (TIMING_CFG_1) */ +@@ -628,7 +628,7 @@ static void set_timing_cfg_1(const unsigned int ctrl_num, + | ((acttoact_mclk & 0x0F) << 4) + | ((wrtord_mclk & 0x0F) << 0) + ); +- debug("FSLDDR: timing_cfg_1 = 0x%08x\n", ddr->timing_cfg_1); ++printf("FSLDDR: timing_cfg_1 = 0x%08x\n", ddr->timing_cfg_1); + } + + /* DDR SDRAM Timing Configuration 2 (TIMING_CFG_2) */ +@@ -721,7 +721,7 @@ static void set_timing_cfg_2(const unsigned int ctrl_num, + | ((cke_pls & 0x7) << 6) + | ((four_act & 0x3f) << 0) + ); +- debug("FSLDDR: timing_cfg_2 = 0x%08x\n", ddr->timing_cfg_2); ++printf("FSLDDR: timing_cfg_2 = 0x%08x\n", ddr->timing_cfg_2); + } + + /* DDR SDRAM Register Control Word */ +@@ -771,11 +771,11 @@ static void set_ddr_sdram_rcw(const unsigned int ctrl_num, + ddr->ddr_sdram_rcw_3 = + ((ddr_freq - 1260 + 19) / 20) << 8; + } +- debug("FSLDDR: ddr_sdram_rcw_1 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_rcw_1 = 0x%08x\n", + ddr->ddr_sdram_rcw_1); +- debug("FSLDDR: ddr_sdram_rcw_2 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_rcw_2 = 0x%08x\n", + ddr->ddr_sdram_rcw_2); +- debug("FSLDDR: ddr_sdram_rcw_3 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_rcw_3 = 0x%08x\n", + ddr->ddr_sdram_rcw_3); + } + } +@@ -867,7 +867,7 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, + | ((mem_halt & 0x1) << 1) + | ((bi & 0x1) << 0) + ); +- debug("FSLDDR: ddr_sdram_cfg = 0x%08x\n", ddr->ddr_sdram_cfg); ++printf("FSLDDR: ddr_sdram_cfg = 0x%08x\n", ddr->ddr_sdram_cfg); + } + + /* DDR SDRAM control configuration 2 (DDR_SDRAM_CFG_2) */ +@@ -939,7 +939,7 @@ static void set_ddr_sdram_cfg_2(const unsigned int ctrl_num, + /* Use the DDR controller to auto initialize memory. */ + d_init = popts->ecc_init_using_memctl; + ddr->ddr_data_init = CONFIG_MEM_INIT_VALUE; +- debug("DDR: ddr_data_init = 0x%08x\n", ddr->ddr_data_init); ++printf("DDR: ddr_data_init = 0x%08x\n", ddr->ddr_data_init); + #else + /* Memory will be initialized via DMA, or not at all. */ + d_init = 0; +@@ -968,7 +968,7 @@ static void set_ddr_sdram_cfg_2(const unsigned int ctrl_num, + | ((rcw_en & 0x1) << 2) + | ((md_en & 0x1) << 0) + ); +- debug("FSLDDR: ddr_sdram_cfg_2 = 0x%08x\n", ddr->ddr_sdram_cfg_2); ++printf("FSLDDR: ddr_sdram_cfg_2 = 0x%08x\n", ddr->ddr_sdram_cfg_2); + } + + #ifdef CONFIG_SYS_FSL_DDR4 +@@ -1019,7 +1019,7 @@ static void set_ddr_sdram_mode_2(const unsigned int ctrl_num, + | ((esdmode2 & 0xFFFF) << 16) + | ((esdmode3 & 0xFFFF) << 0) + ); +- debug("FSLDDR: ddr_sdram_mode_2 = 0x%08x\n", ddr->ddr_sdram_mode_2); ++printf("FSLDDR: ddr_sdram_mode_2 = 0x%08x\n", ddr->ddr_sdram_mode_2); + + if (unq_mrs_en) { /* unique mode registers are supported */ + for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { +@@ -1051,11 +1051,11 @@ static void set_ddr_sdram_mode_2(const unsigned int ctrl_num, + break; + } + } +- debug("FSLDDR: ddr_sdram_mode_4 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_4 = 0x%08x\n", + ddr->ddr_sdram_mode_4); +- debug("FSLDDR: ddr_sdram_mode_6 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_6 = 0x%08x\n", + ddr->ddr_sdram_mode_6); +- debug("FSLDDR: ddr_sdram_mode_8 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_8 = 0x%08x\n", + ddr->ddr_sdram_mode_8); + } + } +@@ -1094,7 +1094,7 @@ static void set_ddr_sdram_mode_2(const unsigned int ctrl_num, + | ((esdmode2 & 0xFFFF) << 16) + | ((esdmode3 & 0xFFFF) << 0) + ); +- debug("FSLDDR: ddr_sdram_mode_2 = 0x%08x\n", ddr->ddr_sdram_mode_2); ++printf("FSLDDR: ddr_sdram_mode_2 = 0x%08x\n", ddr->ddr_sdram_mode_2); + + if (unq_mrs_en) { /* unique mode registers are supported */ + for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { +@@ -1126,11 +1126,11 @@ static void set_ddr_sdram_mode_2(const unsigned int ctrl_num, + break; + } + } +- debug("FSLDDR: ddr_sdram_mode_4 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_4 = 0x%08x\n", + ddr->ddr_sdram_mode_4); +- debug("FSLDDR: ddr_sdram_mode_6 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_6 = 0x%08x\n", + ddr->ddr_sdram_mode_6); +- debug("FSLDDR: ddr_sdram_mode_8 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_8 = 0x%08x\n", + ddr->ddr_sdram_mode_8); + } + } +@@ -1150,7 +1150,7 @@ static void set_ddr_sdram_mode_2(const unsigned int ctrl_num, + | ((esdmode2 & 0xFFFF) << 16) + | ((esdmode3 & 0xFFFF) << 0) + ); +- debug("FSLDDR: ddr_sdram_mode_2 = 0x%08x\n", ddr->ddr_sdram_mode_2); ++printf("FSLDDR: ddr_sdram_mode_2 = 0x%08x\n", ddr->ddr_sdram_mode_2); + } + #endif + +@@ -1211,7 +1211,7 @@ static void set_ddr_sdram_mode_9(fsl_ddr_cfg_regs_t *ddr, + * need 0x500 to park. + */ + +- debug("FSLDDR: ddr_sdram_mode_9 = 0x%08x\n", ddr->ddr_sdram_mode_9); ++printf("FSLDDR: ddr_sdram_mode_9 = 0x%08x\n", ddr->ddr_sdram_mode_9); + if (unq_mrs_en) { /* unique mode registers are supported */ + for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { + if (!rtt_park && +@@ -1258,11 +1258,11 @@ static void set_ddr_sdram_mode_9(fsl_ddr_cfg_regs_t *ddr, + break; + } + } +- debug("FSLDDR: ddr_sdram_mode_11 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_11 = 0x%08x\n", + ddr->ddr_sdram_mode_11); +- debug("FSLDDR: ddr_sdram_mode_13 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_13 = 0x%08x\n", + ddr->ddr_sdram_mode_13); +- debug("FSLDDR: ddr_sdram_mode_15 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_15 = 0x%08x\n", + ddr->ddr_sdram_mode_15); + } + } +@@ -1288,7 +1288,7 @@ static void set_ddr_sdram_mode_10(const unsigned int ctrl_num, + | ((esdmode6 & 0xffff) << 16) + | ((esdmode7 & 0xffff) << 0) + ); +- debug("FSLDDR: ddr_sdram_mode_10 = 0x%08x\n", ddr->ddr_sdram_mode_10); ++printf("FSLDDR: ddr_sdram_mode_10 = 0x%08x\n", ddr->ddr_sdram_mode_10); + if (unq_mrs_en) { /* unique mode registers are supported */ + for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { + switch (i) { +@@ -1312,11 +1312,11 @@ static void set_ddr_sdram_mode_10(const unsigned int ctrl_num, + break; + } + } +- debug("FSLDDR: ddr_sdram_mode_12 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_12 = 0x%08x\n", + ddr->ddr_sdram_mode_12); +- debug("FSLDDR: ddr_sdram_mode_14 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_14 = 0x%08x\n", + ddr->ddr_sdram_mode_14); +- debug("FSLDDR: ddr_sdram_mode_16 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_16 = 0x%08x\n", + ddr->ddr_sdram_mode_16); + } + } +@@ -1341,7 +1341,7 @@ static void set_ddr_sdram_interval(const unsigned int ctrl_num, + | ((refint & 0xFFFF) << 16) + | ((bstopre & 0x3FFF) << 0) + ); +- debug("FSLDDR: ddr_sdram_interval = 0x%08x\n", ddr->ddr_sdram_interval); ++printf("FSLDDR: ddr_sdram_interval = 0x%08x\n", ddr->ddr_sdram_interval); + } + + #ifdef CONFIG_SYS_FSL_DDR4 +@@ -1474,7 +1474,7 @@ static void set_ddr_sdram_mode(const unsigned int ctrl_num, + | ((sdmode & 0xFFFF) << 0) + ); + +- debug("FSLDDR: ddr_sdram_mode = 0x%08x\n", ddr->ddr_sdram_mode); ++printf("FSLDDR: ddr_sdram_mode = 0x%08x\n", ddr->ddr_sdram_mode); + + if (unq_mrs_en) { /* unique mode registers are supported */ + for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { +@@ -1506,11 +1506,11 @@ static void set_ddr_sdram_mode(const unsigned int ctrl_num, + break; + } + } +- debug("FSLDDR: ddr_sdram_mode_3 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_3 = 0x%08x\n", + ddr->ddr_sdram_mode_3); +- debug("FSLDDR: ddr_sdram_mode_5 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_5 = 0x%08x\n", + ddr->ddr_sdram_mode_5); +- debug("FSLDDR: ddr_sdram_mode_5 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_5 = 0x%08x\n", + ddr->ddr_sdram_mode_5); + } + } +@@ -1665,7 +1665,7 @@ static void set_ddr_sdram_mode(const unsigned int ctrl_num, + | ((sdmode & 0xFFFF) << 0) + ); + +- debug("FSLDDR: ddr_sdram_mode = 0x%08x\n", ddr->ddr_sdram_mode); ++printf("FSLDDR: ddr_sdram_mode = 0x%08x\n", ddr->ddr_sdram_mode); + + if (unq_mrs_en) { /* unique mode registers are supported */ + for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { +@@ -1701,11 +1701,11 @@ static void set_ddr_sdram_mode(const unsigned int ctrl_num, + break; + } + } +- debug("FSLDDR: ddr_sdram_mode_3 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_3 = 0x%08x\n", + ddr->ddr_sdram_mode_3); +- debug("FSLDDR: ddr_sdram_mode_5 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_5 = 0x%08x\n", + ddr->ddr_sdram_mode_5); +- debug("FSLDDR: ddr_sdram_mode_5 = 0x%08x\n", ++printf("FSLDDR: ddr_sdram_mode_5 = 0x%08x\n", + ddr->ddr_sdram_mode_5); + } + } +@@ -1838,7 +1838,7 @@ static void set_ddr_sdram_mode(const unsigned int ctrl_num, + | ((esdmode & 0xFFFF) << 16) + | ((sdmode & 0xFFFF) << 0) + ); +- debug("FSLDDR: ddr_sdram_mode = 0x%08x\n", ddr->ddr_sdram_mode); ++printf("FSLDDR: ddr_sdram_mode = 0x%08x\n", ddr->ddr_sdram_mode); + } + #endif + +@@ -1882,7 +1882,7 @@ static void set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr, + | ((ss_en & 0x1) << 31) + | clk_adjust + ); +- debug("FSLDDR: clk_cntl = 0x%08x\n", ddr->ddr_sdram_clk_cntl); ++printf("FSLDDR: clk_cntl = 0x%08x\n", ddr->ddr_sdram_clk_cntl); + } + + /* DDR Initialization Address (DDR_INIT_ADDR) */ +@@ -1944,7 +1944,7 @@ static void set_timing_cfg_4(fsl_ddr_cfg_regs_t *ddr, + | ((trwt_mclk & 0xc) << 12) + | (dll_lock & 0x3) + ); +- debug("FSLDDR: timing_cfg_4 = 0x%08x\n", ddr->timing_cfg_4); ++printf("FSLDDR: timing_cfg_4 = 0x%08x\n", ddr->timing_cfg_4); + } + + /* DDR SDRAM Timing Configuration 5 (TIMING_CFG_5) */ +@@ -1972,7 +1972,7 @@ static void set_timing_cfg_5(fsl_ddr_cfg_regs_t *ddr, unsigned int cas_latency) + | ((wodt_on & 0x1f) << 12) + | ((wodt_off & 0x7) << 8) + ); +- debug("FSLDDR: timing_cfg_5 = 0x%08x\n", ddr->timing_cfg_5); ++printf("FSLDDR: timing_cfg_5 = 0x%08x\n", ddr->timing_cfg_5); + } + + #ifdef CONFIG_SYS_FSL_DDR4 +@@ -1991,7 +1991,7 @@ static void set_timing_cfg_6(fsl_ddr_cfg_regs_t *ddr) + | ((hs_clkadj & 0x1f) << 6) + | ((hs_wrlvl_start & 0x1f) << 0) + ); +- debug("FSLDDR: timing_cfg_6 = 0x%08x\n", ddr->timing_cfg_6); ++printf("FSLDDR: timing_cfg_6 = 0x%08x\n", ddr->timing_cfg_6); + } + + static void set_timing_cfg_7(const unsigned int ctrl_num, +@@ -2011,7 +2011,7 @@ static void set_timing_cfg_7(const unsigned int ctrl_num, + CONFIG_FSL_SDRAM_TYPE == SDRAM_TYPE_DDR4) { + /* for DDR4 only */ + par_lat = (ddr->ddr_sdram_rcw_2 & 0xf) + 1; +- debug("PAR_LAT = %u for mclk_ps = %d\n", par_lat, mclk_ps); ++printf("PAR_LAT = %u for mclk_ps = %d\n", par_lat, mclk_ps); + } + + cs_to_cmd = 0; +@@ -2042,7 +2042,7 @@ static void set_timing_cfg_7(const unsigned int ctrl_num, + | ((par_lat & 0xf) << 16) + | ((cs_to_cmd & 0xf) << 4) + ); +- debug("FSLDDR: timing_cfg_7 = 0x%08x\n", ddr->timing_cfg_7); ++printf("FSLDDR: timing_cfg_7 = 0x%08x\n", ddr->timing_cfg_7); + } + + static void set_timing_cfg_8(const unsigned int ctrl_num, +@@ -2094,7 +2094,7 @@ static void set_timing_cfg_8(const unsigned int ctrl_num, + | ((pre_all_rec & 0x1f) << 0) + ); + +- debug("FSLDDR: timing_cfg_8 = 0x%08x\n", ddr->timing_cfg_8); ++printf("FSLDDR: timing_cfg_8 = 0x%08x\n", ddr->timing_cfg_8); + } + + static void set_timing_cfg_9(const unsigned int ctrl_num, +@@ -2114,7 +2114,7 @@ static void set_timing_cfg_9(const unsigned int ctrl_num, + ddr->timing_cfg_9 = (refrec_cid_mclk & 0x3ff) << 16 | + (acttoact_cid_mclk & 0xf) << 8; + +- debug("FSLDDR: timing_cfg_9 = 0x%08x\n", ddr->timing_cfg_9); ++printf("FSLDDR: timing_cfg_9 = 0x%08x\n", ddr->timing_cfg_9); + } + + /* This function needs to be called after set_ddr_sdram_cfg() is called */ +@@ -2158,10 +2158,10 @@ static void set_ddr_dq_mapping(fsl_ddr_cfg_regs_t *ddr, + (dimm_params[i].dq_mapping[9] & 0x3F) << 14) | + dimm_params[i].dq_mapping_ors; + +- debug("FSLDDR: dq_map_0 = 0x%08x\n", ddr->dq_map_0); +- debug("FSLDDR: dq_map_1 = 0x%08x\n", ddr->dq_map_1); +- debug("FSLDDR: dq_map_2 = 0x%08x\n", ddr->dq_map_2); +- debug("FSLDDR: dq_map_3 = 0x%08x\n", ddr->dq_map_3); ++printf("FSLDDR: dq_map_0 = 0x%08x\n", ddr->dq_map_0); ++printf("FSLDDR: dq_map_1 = 0x%08x\n", ddr->dq_map_1); ++printf("FSLDDR: dq_map_2 = 0x%08x\n", ddr->dq_map_2); ++printf("FSLDDR: dq_map_3 = 0x%08x\n", ddr->dq_map_3); + } + static void set_ddr_sdram_cfg_3(fsl_ddr_cfg_regs_t *ddr, + const memctl_options_t *popts) +@@ -2184,7 +2184,7 @@ static void set_ddr_sdram_cfg_3(fsl_ddr_cfg_regs_t *ddr, + } + } + +- debug("FSLDDR: ddr_sdram_cfg_3 = 0x%08x\n", ddr->ddr_sdram_cfg_3); ++printf("FSLDDR: ddr_sdram_cfg_3 = 0x%08x\n", ddr->ddr_sdram_cfg_3); + } + #endif /* CONFIG_SYS_FSL_DDR4 */ + +@@ -2222,7 +2222,7 @@ static void set_ddr_zq_cntl(fsl_ddr_cfg_regs_t *ddr, unsigned int zq_en) + | ((zqcs_init & 0xF) << 0) + #endif + ); +- debug("FSLDDR: zq_cntl = 0x%08x\n", ddr->ddr_zq_cntl); ++printf("FSLDDR: zq_cntl = 0x%08x\n", ddr->ddr_zq_cntl); + } + + /* DDR Write Leveling Control (DDR_WRLVL_CNTL) */ +@@ -2291,11 +2291,11 @@ static void set_ddr_wrlvl_cntl(fsl_ddr_cfg_regs_t *ddr, unsigned int wrlvl_en, + | ((wrlvl_wlr & 0x7) << 8) + | ((wrlvl_start & 0x1F) << 0) + ); +- debug("FSLDDR: wrlvl_cntl = 0x%08x\n", ddr->ddr_wrlvl_cntl); ++printf("FSLDDR: wrlvl_cntl = 0x%08x\n", ddr->ddr_wrlvl_cntl); + ddr->ddr_wrlvl_cntl_2 = popts->wrlvl_ctl_2; +- debug("FSLDDR: wrlvl_cntl_2 = 0x%08x\n", ddr->ddr_wrlvl_cntl_2); ++printf("FSLDDR: wrlvl_cntl_2 = 0x%08x\n", ddr->ddr_wrlvl_cntl_2); + ddr->ddr_wrlvl_cntl_3 = popts->wrlvl_ctl_3; +- debug("FSLDDR: wrlvl_cntl_3 = 0x%08x\n", ddr->ddr_wrlvl_cntl_3); ++printf("FSLDDR: wrlvl_cntl_3 = 0x%08x\n", ddr->ddr_wrlvl_cntl_3); + + } + +@@ -2317,13 +2317,13 @@ static void set_ddr_eor(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) + static void set_ddr_cdr1(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) + { + ddr->ddr_cdr1 = popts->ddr_cdr1; +- debug("FSLDDR: ddr_cdr1 = 0x%08x\n", ddr->ddr_cdr1); ++printf("FSLDDR: ddr_cdr1 = 0x%08x\n", ddr->ddr_cdr1); + } + + static void set_ddr_cdr2(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) + { + ddr->ddr_cdr2 = popts->ddr_cdr2; +- debug("FSLDDR: ddr_cdr2 = 0x%08x\n", ddr->ddr_cdr2); ++printf("FSLDDR: ddr_cdr2 = 0x%08x\n", ddr->ddr_cdr2); + } + + unsigned int +@@ -2403,7 +2403,7 @@ compute_fsl_memctl_config_regs(const unsigned int ctrl_num, + = dimm_params[dimm_number].rank_density >> dbw_cap_adj; + + if (dimm_params[dimm_number].n_ranks == 0) { +- debug("Skipping setup of CS%u " ++printf("Skipping setup of CS%u " + "because n_ranks on DIMM %u is 0\n", i, dimm_number); + continue; + } +@@ -2504,7 +2504,7 @@ compute_fsl_memctl_config_regs(const unsigned int ctrl_num, + ddr->cs[i].bnds = 0xffffffff; + } + +- debug("FSLDDR: cs[%d]_bnds = 0x%08x\n", i, ddr->cs[i].bnds); ++printf("FSLDDR: cs[%d]_bnds = 0x%08x\n", i, ddr->cs[i].bnds); + set_csn_config(dimm_number, i, ddr, popts, dimm_params); + set_csn_config_2(i, ddr); + } +@@ -2644,9 +2644,9 @@ void erratum_a009942_check_cpo(void) + + cpo_target = ddr_in32(&ddr->debug[28]) & 0xff; + cpo_optimal = ((cpo_max + cpo_min) >> 1) + 0x27; +- debug("cpo_optimal = 0x%x, cpo_target = 0x%x\n", cpo_optimal, ++printf("cpo_optimal = 0x%x, cpo_target = 0x%x\n", cpo_optimal, + cpo_target); +- debug("cpo_max = 0x%x, cpo_min = 0x%x\n", cpo_max, cpo_min); ++printf("cpo_max = 0x%x, cpo_min = 0x%x\n", cpo_max, cpo_min); + + ddr_type = (sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK) >> + SDRAM_CFG_SDRAM_TYPE_SHIFT; +diff --git a/drivers/ddr/fsl/ddr1_dimm_params.c b/drivers/ddr/fsl/ddr1_dimm_params.c +index e5481eaa0..04d994508 100644 +--- a/drivers/ddr/fsl/ddr1_dimm_params.c ++++ b/drivers/ddr/fsl/ddr1_dimm_params.c +@@ -40,7 +40,7 @@ compute_ranksize(unsigned int mem_type, unsigned char row_dens) + /* Bottom 2 bits up to the top. */ + bsize = ((row_dens >> 2) | ((row_dens & 3) << 6)); + bsize <<= 24ULL; +- debug("DDR: DDR I rank density = 0x%16llx\n", bsize); ++printf("DDR: DDR I rank density = 0x%16llx\n", bsize); + + return bsize; + } +@@ -194,11 +194,11 @@ compute_derated_DDR1_CAS_latency(unsigned int mclk_ps) + unsigned int lowest_tCKmin_CL = 0; + unsigned int i; + +- debug("mclk_ps = %u\n", mclk_ps); ++printf("mclk_ps = %u\n", mclk_ps); + + for (i = 0; i < num_speed_bins; i++) { + unsigned int x = ddr1_speed_bins[i]; +- debug("i=%u, x = %u, lowest_tCKmin_found = %u\n", ++printf("i=%u, x = %u, lowest_tCKmin_found = %u\n", + i, x, lowest_tCKmin_found); + if (x && lowest_tCKmin_found <= x && x <= mclk_ps) { + lowest_tCKmin_found = x; +@@ -206,7 +206,7 @@ compute_derated_DDR1_CAS_latency(unsigned int mclk_ps) + } + } + +- debug("lowest_tCKmin_CL = %u\n", lowest_tCKmin_CL); ++printf("lowest_tCKmin_CL = %u\n", lowest_tCKmin_CL); + + return lowest_tCKmin_CL; + } +diff --git a/drivers/ddr/fsl/ddr2_dimm_params.c b/drivers/ddr/fsl/ddr2_dimm_params.c +index 3b78118a9..63ad4a299 100644 +--- a/drivers/ddr/fsl/ddr2_dimm_params.c ++++ b/drivers/ddr/fsl/ddr2_dimm_params.c +@@ -39,7 +39,7 @@ compute_ranksize(unsigned int mem_type, unsigned char row_dens) + /* Bottom 5 bits up to the top. */ + bsize = ((row_dens >> 5) | ((row_dens & 31) << 3)); + bsize <<= 27ULL; +- debug("DDR: DDR II rank density = 0x%16llx\n", bsize); ++printf("DDR: DDR II rank density = 0x%16llx\n", bsize); + + return bsize; + } +@@ -177,11 +177,11 @@ compute_derated_DDR2_CAS_latency(unsigned int mclk_ps) + unsigned int lowest_tCKmin_CL = 0; + unsigned int i; + +- debug("mclk_ps = %u\n", mclk_ps); ++printf("mclk_ps = %u\n", mclk_ps); + + for (i = 0; i < num_speed_bins; i++) { + unsigned int x = ddr2_speed_bins[i]; +- debug("i=%u, x = %u, lowest_tCKmin_found = %u\n", ++printf("i=%u, x = %u, lowest_tCKmin_found = %u\n", + i, x, lowest_tCKmin_found); + if (x && x <= mclk_ps && x >= lowest_tCKmin_found ) { + lowest_tCKmin_found = x; +@@ -189,7 +189,7 @@ compute_derated_DDR2_CAS_latency(unsigned int mclk_ps) + } + } + +- debug("lowest_tCKmin_CL = %u\n", lowest_tCKmin_CL); ++printf("lowest_tCKmin_CL = %u\n", lowest_tCKmin_CL); + + return lowest_tCKmin_CL; + } +diff --git a/drivers/ddr/fsl/ddr3_dimm_params.c b/drivers/ddr/fsl/ddr3_dimm_params.c +index 8464438c5..64c867f7d 100644 +--- a/drivers/ddr/fsl/ddr3_dimm_params.c ++++ b/drivers/ddr/fsl/ddr3_dimm_params.c +@@ -69,7 +69,7 @@ compute_ranksize(const ddr3_spd_eeprom_t *spd) + bsize = 1ULL << (nbit_sdram_cap_bsize - 3 + + nbit_primary_bus_width - nbit_sdram_width); + +- debug("DDR: DDR III rank density = 0x%16llx\n", bsize); ++printf("DDR: DDR III rank density = 0x%16llx\n", bsize); + + return bsize; + } +diff --git a/drivers/ddr/fsl/ddr4_dimm_params.c b/drivers/ddr/fsl/ddr4_dimm_params.c +index e2bdc12ef..fa12441f2 100644 +--- a/drivers/ddr/fsl/ddr4_dimm_params.c ++++ b/drivers/ddr/fsl/ddr4_dimm_params.c +@@ -113,7 +113,7 @@ compute_ranksize(const struct ddr4_spd_eeprom_s *spd) + nbit_primary_bus_width - nbit_sdram_width + + die_count); + +- debug("DDR: DDR rank density = 0x%16llx\n", bsize); ++printf("DDR: DDR rank density = 0x%16llx\n", bsize); + + return bsize; + } +@@ -227,7 +227,7 @@ unsigned int ddr_compute_dimm_parameters(const unsigned int ctrl_num, + if (spd->mapping[i] == udimm_rc_e_dq[i]) + continue; + spd_error = 1; +- debug("SPD byte %d: 0x%x, should be 0x%x\n", ++printf("SPD byte %d: 0x%x, should be 0x%x\n", + 60 + i, spd->mapping[i], + udimm_rc_e_dq[i]); + ptr = (u8 *)&spd->mapping[i]; +diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c +index e43c68015..6749fba41 100644 +--- a/drivers/ddr/fsl/fsl_ddr_gen4.c ++++ b/drivers/ddr/fsl/fsl_ddr_gen4.c +@@ -120,7 +120,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { + if (i == 0) { + if (mod_bnds) { +- debug("modified bnds\n"); ++printf("modified bnds\n"); + ddr_out32(&ddr->cs0_bnds, + (regs->cs[i].bnds & 0xfffefffe) >> 1); + ddr_out32(&ddr->cs0_config, +@@ -259,7 +259,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + ddr_out32(&ddr->err_int_en, regs->err_int_en); + for (i = 0; i < 64; i++) { + if (regs->debug[i]) { +- debug("Write to debug_%d as %08x\n", ++printf("Write to debug_%d as %08x\n", + i+1, regs->debug[i]); + ddr_out32(&ddr->debug[i], regs->debug[i]); + } +@@ -283,7 +283,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + ddr_out32(&ddr->ddr_cdr2, + regs->ddr_cdr2 | DDR_CDR2_VREF_TRAIN_EN); + } else { +- debug("Erratum A008511 doesn't apply.\n"); ++printf("Erratum A008511 doesn't apply.\n"); + } + #endif + +@@ -391,17 +391,17 @@ step2: + set_wait_for_bits_clear(&ddr->sdram_md_cntl, + temp32, MD_CNTL_MD_EN); + udelay(1); +- debug("MR6 = 0x%08x\n", temp32); ++printf("MR6 = 0x%08x\n", temp32); + temp32 = mr6 | vref_seq[1]; + set_wait_for_bits_clear(&ddr->sdram_md_cntl, + temp32, MD_CNTL_MD_EN); + udelay(1); +- debug("MR6 = 0x%08x\n", temp32); ++printf("MR6 = 0x%08x\n", temp32); + temp32 = mr6 | vref_seq[2]; + set_wait_for_bits_clear(&ddr->sdram_md_cntl, + temp32, MD_CNTL_MD_EN); + udelay(1); +- debug("MR6 = 0x%08x\n", temp32); ++printf("MR6 = 0x%08x\n", temp32); + } + ddr_out32(&ddr->sdram_md_cntl, 0); + temp32 = ddr_in32(&ddr->debug[28]); +@@ -457,7 +457,7 @@ step2: + val32 |= (0x9 << 20); + ddr_out32(&ddr->debug[28], val32); + } +- debug("Applied errata CONFIG_SYS_FSL_ERRATUM_A008378\n"); ++printf("Applied errata CONFIG_SYS_FSL_ERRATUM_A008378\n"); + } + #endif + +@@ -469,7 +469,7 @@ step2: + ddr_out32(&ddr->debug[18], val32); + + ddr_out32(&ddr->debug[28], 0x30000000); +- debug("Applied errta CONFIG_SYS_FSL_ERRATUM_A008109\n"); ++printf("Applied errta CONFIG_SYS_FSL_ERRATUM_A008109\n"); + #endif + + #ifdef CONFIG_SYS_FSL_ERRATUM_A009942 +@@ -486,7 +486,7 @@ step2: + val32 |= 0x0060007b; + + ddr_out32(&ddr->debug[28], val32); +- debug("Applied errata CONFIG_SYS_FSL_ERRATUM_A009942\n"); ++printf("Applied errata CONFIG_SYS_FSL_ERRATUM_A009942\n"); + #endif + + total_gb_size_per_controller = 0; +@@ -514,8 +514,8 @@ step2: + timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 / + (get_ddr_freq(ctrl_num) >> 20)) << 2; + total_gb_size_per_controller >>= 4; /* shift down to gb size */ +- debug("total %d GB\n", total_gb_size_per_controller); +- debug("Need to wait up to %d * 10ms\n", timeout); ++printf("total %d GB\n", total_gb_size_per_controller); ++printf("Need to wait up to %d * 10ms\n", timeout); + + /* Poll DDR_SDRAM_CFG_2[D_INIT] bit until auto-data init is done. */ + while ((ddr_in32(&ddr->sdram_cfg_2) & SDRAM_CFG2_D_INIT) && +@@ -528,7 +528,7 @@ step2: + printf("Waiting for D_INIT timeout. Memory may not work.\n"); + + if (mod_bnds) { +- debug("Reset to original bnds\n"); ++printf("Reset to original bnds\n"); + ddr_out32(&ddr->cs0_bnds, regs->cs[0].bnds); + #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1) + ddr_out32(&ddr->cs1_bnds, regs->cs[1].bnds); +diff --git a/drivers/ddr/fsl/interactive.c b/drivers/ddr/fsl/interactive.c +index 2f76beb2d..6e0391ee6 100644 +--- a/drivers/ddr/fsl/interactive.c ++++ b/drivers/ddr/fsl/interactive.c +@@ -780,7 +780,7 @@ static void fsl_ddr_regs_edit(fsl_ddr_info_t *pinfo, + }; + static const unsigned int n_opts = ARRAY_SIZE(options); + +- debug("fsl_ddr_regs_edit: ctrl_num = %u, " ++printf("fsl_ddr_regs_edit: ctrl_num = %u, " + "regname = %s, value = %s\n", + ctrl_num, regname, value_str); + if (ctrl_num > CONFIG_SYS_NUM_DDR_CTLRS) +@@ -2039,7 +2039,7 @@ unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set) + + /* TODO: validate inputs */ + +- debug("src_ctlr_num = %u, src_dimm_num = %u, dst_ctlr_num = %u, dst_dimm_num = %u, step_mask = %x\n", ++printf("src_ctlr_num = %u, src_dimm_num = %u, dst_ctlr_num = %u, dst_dimm_num = %u, step_mask = %x\n", + src_ctlr_num, src_dimm_num, dst_ctlr_num, dst_dimm_num, step_mask); + + +@@ -2308,7 +2308,7 @@ unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set) + printf("unknown command %s\n", argv[0]); + } + +- debug("end of memory = %llu\n", (u64)ddrsize); ++printf("end of memory = %llu\n", (u64)ddrsize); + + return ddrsize; + } +diff --git a/drivers/ddr/fsl/lc_common_dimm_params.c b/drivers/ddr/fsl/lc_common_dimm_params.c +index d299d763d..b57eff23e 100644 +--- a/drivers/ddr/fsl/lc_common_dimm_params.c ++++ b/drivers/ddr/fsl/lc_common_dimm_params.c +@@ -66,7 +66,7 @@ compute_cas_latency(const unsigned int ctrl_num, + caslat_actual); + } + outpdimm->lowest_common_spd_caslat = caslat_actual; +- debug("lowest_common_spd_caslat is 0x%x\n", caslat_actual); ++printf("lowest_common_spd_caslat is 0x%x\n", caslat_actual); + + return 0; + } +@@ -83,7 +83,7 @@ compute_cas_latency(const unsigned int ctrl_num, + unsigned int not_ok; + unsigned int temp1, temp2; + +- debug("using mclk_ps = %u\n", mclk_ps); ++printf("using mclk_ps = %u\n", mclk_ps); + if (mclk_ps > outpdimm->tckmax_ps) { + printf("Warning: DDR clock (%u ps) is slower than DIMM(s) (tCKmax %u ps)\n", + mclk_ps, outpdimm->tckmax_ps); +@@ -131,7 +131,7 @@ compute_cas_latency(const unsigned int ctrl_num, + while (temp1) { + not_ok = 0; + temp2 = __ilog2(temp1); +- debug("checking common caslat = %u\n", temp2); ++printf("checking common caslat = %u\n", temp2); + + /* Check if this CAS latency will work on all DIMMs at tCK. */ + for (i = 0; i < number_of_dimms; i++) { +@@ -140,7 +140,7 @@ compute_cas_latency(const unsigned int ctrl_num, + + if (dimm_params[i].caslat_x == temp2) { + if (mclk_ps >= dimm_params[i].tckmin_x_ps) { +- debug("CL = %u ok on DIMM %u at tCK=%u ps with tCKmin_X_ps of %u\n", ++printf("CL = %u ok on DIMM %u at tCK=%u ps with tCKmin_X_ps of %u\n", + temp2, i, mclk_ps, + dimm_params[i].tckmin_x_ps); + continue; +@@ -153,7 +153,7 @@ compute_cas_latency(const unsigned int ctrl_num, + unsigned int tckmin_x_minus_1_ps + = dimm_params[i].tckmin_x_minus_1_ps; + if (mclk_ps >= tckmin_x_minus_1_ps) { +- debug("CL = %u ok on DIMM %u at tCK=%u ps with tckmin_x_minus_1_ps of %u\n", ++printf("CL = %u ok on DIMM %u at tCK=%u ps with tckmin_x_minus_1_ps of %u\n", + temp2, i, mclk_ps, + tckmin_x_minus_1_ps); + continue; +@@ -166,7 +166,7 @@ compute_cas_latency(const unsigned int ctrl_num, + unsigned int tckmin_x_minus_2_ps + = dimm_params[i].tckmin_x_minus_2_ps; + if (mclk_ps >= tckmin_x_minus_2_ps) { +- debug("CL = %u ok on DIMM %u at tCK=%u ps with tckmin_x_minus_2_ps of %u\n", ++printf("CL = %u ok on DIMM %u at tCK=%u ps with tckmin_x_minus_2_ps of %u\n", + temp2, i, mclk_ps, + tckmin_x_minus_2_ps); + continue; +@@ -182,7 +182,7 @@ compute_cas_latency(const unsigned int ctrl_num, + temp1 &= ~(1 << temp2); + } + +- debug("lowest common SPD-defined CAS latency = %u\n", ++printf("lowest common SPD-defined CAS latency = %u\n", + lowest_good_caslat); + outpdimm->lowest_common_spd_caslat = lowest_good_caslat; + +@@ -199,7 +199,7 @@ compute_cas_latency(const unsigned int ctrl_num, + temp1 = max(temp1, dimm_params[i].caslat_lowest_derated); + + outpdimm->highest_common_derated_caslat = temp1; +- debug("highest common dereated CAS latency = %u\n", temp1); ++printf("highest common dereated CAS latency = %u\n", temp1); + + return 0; + } +@@ -351,7 +351,7 @@ compute_lowest_common_dimm_parameters(const unsigned int ctrl_num, + outpdimm->ndimms_present = number_of_dimms - temp1; + + if (temp1 == number_of_dimms) { +- debug("no dimms this memory controller\n"); ++printf("no dimms this memory controller\n"); + return 0; + } + +@@ -462,9 +462,9 @@ compute_lowest_common_dimm_parameters(const unsigned int ctrl_num, + } + } + if (temp1) { +- debug("all DIMMs ECC capable\n"); ++printf("all DIMMs ECC capable\n"); + } else { +- debug("Warning: not all DIMMs ECC capable, cant enable ECC\n"); ++printf("Warning: not all DIMMs ECC capable, cant enable ECC\n"); + } + outpdimm->all_dimms_ecc_capable = temp1; + +@@ -531,7 +531,7 @@ compute_lowest_common_dimm_parameters(const unsigned int ctrl_num, + outpdimm->lowest_common_spd_caslat; + if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) { + additive_latency = picos_to_mclk(ctrl_num, trcd_ps); +- debug("setting additive_latency to %u because it was " ++printf("setting additive_latency to %u because it was " + " greater than tRCD_ps\n", additive_latency); + } + } +@@ -562,25 +562,25 @@ compute_lowest_common_dimm_parameters(const unsigned int ctrl_num, + */ + outpdimm->additive_latency = additive_latency; + +- debug("tCKmin_ps = %u\n", outpdimm->tckmin_x_ps); +- debug("trcd_ps = %u\n", outpdimm->trcd_ps); +- debug("trp_ps = %u\n", outpdimm->trp_ps); +- debug("tras_ps = %u\n", outpdimm->tras_ps); ++printf("tCKmin_ps = %u\n", outpdimm->tckmin_x_ps); ++printf("trcd_ps = %u\n", outpdimm->trcd_ps); ++printf("trp_ps = %u\n", outpdimm->trp_ps); ++printf("tras_ps = %u\n", outpdimm->tras_ps); + #ifdef CONFIG_SYS_FSL_DDR4 +- debug("trfc1_ps = %u\n", trfc1_ps); +- debug("trfc2_ps = %u\n", trfc2_ps); +- debug("trfc4_ps = %u\n", trfc4_ps); +- debug("trrds_ps = %u\n", trrds_ps); +- debug("trrdl_ps = %u\n", trrdl_ps); +- debug("tccdl_ps = %u\n", tccdl_ps); +- debug("trfc_slr_ps = %u\n", trfc_slr_ps); ++printf("trfc1_ps = %u\n", trfc1_ps); ++printf("trfc2_ps = %u\n", trfc2_ps); ++printf("trfc4_ps = %u\n", trfc4_ps); ++printf("trrds_ps = %u\n", trrds_ps); ++printf("trrdl_ps = %u\n", trrdl_ps); ++printf("tccdl_ps = %u\n", tccdl_ps); ++printf("trfc_slr_ps = %u\n", trfc_slr_ps); + #else +- debug("twtr_ps = %u\n", outpdimm->twtr_ps); +- debug("trfc_ps = %u\n", outpdimm->trfc_ps); +- debug("trrd_ps = %u\n", outpdimm->trrd_ps); ++printf("twtr_ps = %u\n", outpdimm->twtr_ps); ++printf("trfc_ps = %u\n", outpdimm->trfc_ps); ++printf("trrd_ps = %u\n", outpdimm->trrd_ps); + #endif +- debug("twr_ps = %u\n", outpdimm->twr_ps); +- debug("trc_ps = %u\n", outpdimm->trc_ps); ++printf("twr_ps = %u\n", outpdimm->twr_ps); ++printf("trc_ps = %u\n", outpdimm->trc_ps); + + return 0; + } +diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c +index 8e147160b..02a0df3aa 100644 +--- a/drivers/ddr/fsl/main.c ++++ b/drivers/ddr/fsl/main.c +@@ -196,7 +196,7 @@ static void __get_spd(generic_spd_eeprom_t *spd, u8 i2c_address) + printf("DDR: failed to read SPD from address %u\n", + i2c_address); + } else { +- debug("DDR: failed to read SPD from address %u\n", ++printf("DDR: failed to read SPD from address %u\n", + i2c_address); + } + memset(spd, 0, sizeof(generic_spd_eeprom_t)); +@@ -374,7 +374,7 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, + "specified controller %u\n", i); + return 1; + } +- debug("dbw_cap_adj[%d]=%d\n", i, dbw_cap_adj[i]); ++printf("dbw_cap_adj[%d]=%d\n", i, dbw_cap_adj[i]); + } + + current_mem_base = pinfo->mem_base; +@@ -396,7 +396,7 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, + ctlr_density = rank_density; + break; + } +- debug("rank density is 0x%llx, ctlr density is 0x%llx\n", ++printf("rank density is 0x%llx, ctlr density is 0x%llx\n", + rank_density, ctlr_density); + for (i = first_ctrl; i <= last_ctrl; i++) { + if (pinfo->memctl_opts[i].memctl_interleaving) { +@@ -426,8 +426,8 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, + pinfo->common_timing_params[i].total_mem = + total_ctlr_mem; + total_mem = current_mem_base + total_ctlr_mem; +- debug("ctrl %d base 0x%llx\n", i, current_mem_base); +- debug("ctrl %d total 0x%llx\n", i, total_ctlr_mem); ++printf("ctrl %d base 0x%llx\n", i, current_mem_base); ++printf("ctrl %d total 0x%llx\n", i, total_ctlr_mem); + } else { + /* when 3rd controller not interleaved */ + current_mem_base = total_mem; +@@ -439,11 +439,11 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, + pinfo->dimm_params[i][j].capacity >> dbw_cap_adj[i]; + pinfo->dimm_params[i][j].base_address = + current_mem_base; +- debug("ctrl %d dimm %d base 0x%llx\n", i, j, current_mem_base); ++printf("ctrl %d dimm %d base 0x%llx\n", i, j, current_mem_base); + current_mem_base += cap; + total_ctlr_mem += cap; + } +- debug("ctrl %d total 0x%llx\n", i, total_ctlr_mem); ++printf("ctrl %d total 0x%llx\n", i, total_ctlr_mem); + pinfo->common_timing_params[i].total_mem = + total_ctlr_mem; + total_mem += total_ctlr_mem; +@@ -464,17 +464,17 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, + pinfo->dimm_params[i][j].capacity >> dbw_cap_adj[i]; + pinfo->dimm_params[i][j].base_address = + current_mem_base; +- debug("ctrl %d dimm %d base 0x%llx\n", i, j, current_mem_base); ++printf("ctrl %d dimm %d base 0x%llx\n", i, j, current_mem_base); + current_mem_base += cap; + total_ctlr_mem += cap; + } +- debug("ctrl %d total 0x%llx\n", i, total_ctlr_mem); ++printf("ctrl %d total 0x%llx\n", i, total_ctlr_mem); + pinfo->common_timing_params[i].total_mem = + total_ctlr_mem; + total_mem += total_ctlr_mem; + } + } +- debug("Total mem by %s is 0x%llx\n", __func__, total_mem); ++printf("Total mem by %s is 0x%llx\n", __func__, total_mem); + + return total_mem; + } +@@ -508,7 +508,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, + for (i = first_ctrl; i <= last_ctrl; i++) + dbw_capacity_adjust[i] = 0; + +- debug("starting at step %u (%s)\n", ++printf("starting at step %u (%s)\n", + start_step, step_to_string(start_step)); + + switch (start_step) { +@@ -548,7 +548,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, + } + #endif + if (retval) { +- debug("Warning: compute_dimm_parameters" ++printf("Warning: compute_dimm_parameters" + " non-zero return value for memctl=%u " + "dimm=%u\n", i, j); + } else { +@@ -577,7 +577,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, + fsl_ddr_get_dimm_params(pdimm, i, j); + } + } +- debug("Filling dimm parameters from board specific file\n"); ++printf("Filling dimm parameters from board specific file\n"); + #endif + case STEP_COMPUTE_COMMON_PARMS: + /* +@@ -585,7 +585,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, + * suitable for all of the DIMMs on each memory controller + */ + for (i = first_ctrl; i <= last_ctrl; i++) { +- debug("Computing lowest common DIMM" ++printf("Computing lowest common DIMM" + " parameters for memctl=%u\n", i); + compute_lowest_common_dimm_parameters + (i, +@@ -597,7 +597,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, + case STEP_GATHER_OPTS: + /* STEP 4: Gather configuration requirements from user */ + for (i = first_ctrl; i <= last_ctrl; i++) { +- debug("Reloading memory controller " ++printf("Reloading memory controller " + "configuration options for memctl=%u\n", i); + /* + * This "reloads" the memory controller options +@@ -620,10 +620,10 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, + } + if (assert_reset && !size_only) { + if (pinfo->board_mem_reset) { +- debug("Asserting mem reset\n"); ++printf("Asserting mem reset\n"); + pinfo->board_mem_reset(); + } else { +- debug("Asserting mem reset missing\n"); ++printf("Asserting mem reset missing\n"); + } + } + +@@ -631,11 +631,11 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, + /* STEP 5: Assign addresses to chip selects */ + check_interleaving_options(pinfo); + total_mem = step_assign_addresses(pinfo, dbw_capacity_adjust); +- debug("Total mem %llu assigned\n", total_mem); ++printf("Total mem %llu assigned\n", total_mem); + + case STEP_COMPUTE_REGS: + /* STEP 6: compute controller register values */ +- debug("FSL Memory ctrl register computation\n"); ++printf("FSL Memory ctrl register computation\n"); + for (i = first_ctrl; i <= last_ctrl; i++) { + if (timing_params[i].ndimms_present == 0) { + memset(&ddr_reg[i], 0, +@@ -743,9 +743,9 @@ phys_size_t __fsl_ddr_sdram(fsl_ddr_info_t *pinfo) + deassert_reset = 1; + } + for (i = first_ctrl; i <= last_ctrl; i++) { +- debug("Programming controller %u\n", i); ++printf("Programming controller %u\n", i); + if (pinfo->common_timing_params[i].ndimms_present == 0) { +- debug("No dimms present on controller %u; " ++printf("No dimms present on controller %u; " + "skipping programming\n", i); + continue; + } +@@ -759,10 +759,10 @@ phys_size_t __fsl_ddr_sdram(fsl_ddr_info_t *pinfo) + if (deassert_reset) { + /* Use board FPGA or GPIO to deassert reset signal */ + if (pinfo->board_mem_de_reset) { +- debug("Deasserting mem reset\n"); ++printf("Deasserting mem reset\n"); + pinfo->board_mem_de_reset(); + } else { +- debug("Deasserting mem reset missing\n"); ++printf("Deasserting mem reset missing\n"); + } + for (i = first_ctrl; i <= last_ctrl; i++) { + /* Call with step = 2 to continue initialization */ +@@ -848,7 +848,7 @@ phys_size_t __fsl_ddr_sdram(fsl_ddr_info_t *pinfo) + } + #endif + +- debug("total_memory by %s = %llu\n", __func__, total_memory); ++printf("total_memory by %s = %llu\n", __func__, total_memory); + + #if !defined(CONFIG_PHYS_64BIT) + /* Check for 4G or more. Bad. */ +diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c +index 572f3703d..99d175afd 100644 +--- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c ++++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c +@@ -81,10 +81,10 @@ ddr_enable_ecc(unsigned int dram_size) + /* + * Enable errors for ECC. + */ +- debug("DMA DDR: err_disable = 0x%08x\n", ddr->err_disable); ++printf("DMA DDR: err_disable = 0x%08x\n", ddr->err_disable); + ddr->err_disable = 0x00000000; + asm("sync;isync;msync"); +- debug("DMA DDR: err_disable = 0x%08x\n", ddr->err_disable); ++printf("DMA DDR: err_disable = 0x%08x\n", ddr->err_disable); + } + + #endif /* CONFIG_DDR_ECC && ! CONFIG_ECC_INIT_VIA_DDRCONTROLLER */ +diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c +index 1ed4d50cc..3f99e6991 100644 +--- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c ++++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c +@@ -80,7 +80,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + if (regs->ddr_eor) + out_be32(&ddr->eor, regs->ddr_eor); + #ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 +- debug("Workaround for ERRATUM_DDR111_DDR134\n"); ++printf("Workaround for ERRATUM_DDR111_DDR134\n"); + for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { + cs_sa = (regs->cs[i].bnds >> 16) & 0xfff; + cs_ea = regs->cs[i].bnds & 0xfff; +@@ -92,7 +92,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + *csn_bnds_t = regs->cs[i].bnds + 0x01000000; + else + *csn_bnds_t = regs->cs[i].bnds + 0x01000100; +- debug("Found cs%d_bns (0x%08x) covering 0xff000000, " ++printf("Found cs%d_bns (0x%08x) covering 0xff000000, " + "change it to 0x%x\n", + csn, csn_bnds_backup, regs->cs[i].bnds); + break; +@@ -180,7 +180,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + out_be32(&ddr->err_int_en, regs->err_int_en); + for (i = 0; i < 32; i++) { + if (regs->debug[i]) { +- debug("Write to debug_%d as %08x\n", i+1, regs->debug[i]); ++printf("Write to debug_%d as %08x\n", i+1, regs->debug[i]); + out_be32(&ddr->debug[i], regs->debug[i]); + } + } +@@ -209,7 +209,7 @@ step2: + temp_sdram_cfg &= ~(SDRAM_CFG_MEM_EN); + out_be32(&ddr->sdram_cfg, temp_sdram_cfg); + #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003 +- debug("Workaround for ERRATUM_DDR_A003\n"); ++printf("Workaround for ERRATUM_DDR_A003\n"); + if (regs->ddr_sdram_rcw_2 & 0x00f00000) { + out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2 & 0xf07fffff); + out_be32(&ddr->debug[2], 0x00000400); +@@ -359,7 +359,7 @@ step2: + val32 |= (0x9 << 20); + ddr_out32(&ddr->debug[28], val32); + } +- debug("Applied errata CONFIG_SYS_FSL_ERRATUM_A008378\n"); ++printf("Applied errata CONFIG_SYS_FSL_ERRATUM_A008378\n"); + } + #endif + +@@ -371,7 +371,7 @@ step2: + out_be32(&ddr->debug[18], val32); + + out_be32(&ddr->debug[28], 0x30000000); +- debug("Applied errta CONFIG_SYS_FSL_ERRATUM_A008109\n"); ++printf("Applied errta CONFIG_SYS_FSL_ERRATUM_A008109\n"); + #endif + + #ifdef CONFIG_SYS_FSL_ERRATUM_A009942 +@@ -388,7 +388,7 @@ step2: + val32 |= 0x0060007b; + + out_be32(&ddr->debug[28], val32); +- debug("Applied errata CONFIG_SYS_FSL_ERRATUM_A009942\n"); ++printf("Applied errata CONFIG_SYS_FSL_ERRATUM_A009942\n"); + #endif + /* + * For 8572 DDR1 erratum - DDR controller may enter illegal state +@@ -396,7 +396,7 @@ step2: + * This erratum does not affect DDR3 mode, only for DDR2 mode. + */ + #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_115 +- debug("Workaround for ERRATUM_DDR_115\n"); ++printf("Workaround for ERRATUM_DDR_115\n"); + if ((((in_be32(&ddr->sdram_cfg) >> 24) & 0x7) == SDRAM_TYPE_DDR2) + && in_be32(&ddr->sdram_cfg) & 0x80000) { + /* set DEBUG_1[31] */ +@@ -404,7 +404,7 @@ step2: + } + #endif + #ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 +- debug("Workaround for ERRATUM_DDR111_DDR134\n"); ++printf("Workaround for ERRATUM_DDR111_DDR134\n"); + /* + * This is the combined workaround for DDR111 and DDR134 + * following the published errata for MPC8572 +@@ -412,16 +412,16 @@ step2: + + /* 1. Set EEBACR[3] */ + setbits_be32(&ecm->eebacr, 0x10000000); +- debug("Setting EEBACR[3] to 0x%08x\n", in_be32(&ecm->eebacr)); ++printf("Setting EEBACR[3] to 0x%08x\n", in_be32(&ecm->eebacr)); + + /* 2. Set DINIT in SDRAM_CFG_2*/ + setbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_D_INIT); +- debug("Setting sdram_cfg_2[D_INIT] to 0x%08x\n", ++printf("Setting sdram_cfg_2[D_INIT] to 0x%08x\n", + in_be32(&ddr->sdram_cfg_2)); + + /* 3. Set DEBUG_3[21] */ + setbits_be32(&ddr->debug[2], 0x400); +- debug("Setting DEBUG_3[21] to 0x%08x\n", in_be32(&ddr->debug[2])); ++printf("Setting DEBUG_3[21] to 0x%08x\n", in_be32(&ddr->debug[2])); + + #endif /* part 1 of the workaound */ + +@@ -479,8 +479,8 @@ step2: + timeout_save = timeout; + #endif + total_gb_size_per_controller >>= 4; /* shift down to gb size */ +- debug("total %d GB\n", total_gb_size_per_controller); +- debug("Need to wait up to %d * 10ms\n", timeout); ++printf("total %d GB\n", total_gb_size_per_controller); ++printf("Need to wait up to %d * 10ms\n", timeout); + + /* Poll DDR_SDRAM_CFG_2[D_INIT] bit until auto-data init is done. */ + while ((in_be32(&ddr->sdram_cfg_2) & SDRAM_CFG2_D_INIT) && +@@ -497,34 +497,34 @@ step2: + + /* 4. Clear DEBUG3[21] */ + clrbits_be32(&ddr->debug[2], 0x400); +- debug("Clearing D3[21] to 0x%08x\n", in_be32(&ddr->debug[2])); ++printf("Clearing D3[21] to 0x%08x\n", in_be32(&ddr->debug[2])); + + /* DDR134 workaround starts */ + /* A: Clear sdram_cfg_2[odt_cfg] */ + clrbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_ODT_CFG_MASK); +- debug("Clearing SDRAM_CFG2[ODT_CFG] to 0x%08x\n", ++printf("Clearing SDRAM_CFG2[ODT_CFG] to 0x%08x\n", + in_be32(&ddr->sdram_cfg_2)); + + /* B: Set DEBUG1[15] */ + setbits_be32(&ddr->debug[0], 0x10000); +- debug("Setting D1[15] to 0x%08x\n", in_be32(&ddr->debug[0])); ++printf("Setting D1[15] to 0x%08x\n", in_be32(&ddr->debug[0])); + + /* C: Set timing_cfg_2[cpo] to 0b11111 */ + setbits_be32(&ddr->timing_cfg_2, TIMING_CFG_2_CPO_MASK); +- debug("Setting TMING_CFG_2[CPO] to 0x%08x\n", ++printf("Setting TMING_CFG_2[CPO] to 0x%08x\n", + in_be32(&ddr->timing_cfg_2)); + + /* D: Set D6 to 0x9f9f9f9f */ + out_be32(&ddr->debug[5], 0x9f9f9f9f); +- debug("Setting D6 to 0x%08x\n", in_be32(&ddr->debug[5])); ++printf("Setting D6 to 0x%08x\n", in_be32(&ddr->debug[5])); + + /* E: Set D7 to 0x9f9f9f9f */ + out_be32(&ddr->debug[6], 0x9f9f9f9f); +- debug("Setting D7 to 0x%08x\n", in_be32(&ddr->debug[6])); ++printf("Setting D7 to 0x%08x\n", in_be32(&ddr->debug[6])); + + /* F: Set D2[20] */ + setbits_be32(&ddr->debug[1], 0x800); +- debug("Setting D2[20] to 0x%08x\n", in_be32(&ddr->debug[1])); ++printf("Setting D2[20] to 0x%08x\n", in_be32(&ddr->debug[1])); + + /* G: Poll on D2[20] until cleared */ + while (in_be32(&ddr->debug[1]) & 0x800) +@@ -532,34 +532,34 @@ step2: + + /* H: Clear D1[15] */ + clrbits_be32(&ddr->debug[0], 0x10000); +- debug("Setting D1[15] to 0x%08x\n", in_be32(&ddr->debug[0])); ++printf("Setting D1[15] to 0x%08x\n", in_be32(&ddr->debug[0])); + + /* I: Set sdram_cfg_2[odt_cfg] */ + setbits_be32(&ddr->sdram_cfg_2, + regs->ddr_sdram_cfg_2 & SDRAM_CFG2_ODT_CFG_MASK); +- debug("Setting sdram_cfg_2 to 0x%08x\n", in_be32(&ddr->sdram_cfg_2)); ++printf("Setting sdram_cfg_2 to 0x%08x\n", in_be32(&ddr->sdram_cfg_2)); + + /* Continuing with the DDR111 workaround */ + /* 5. Set D2[21] */ + setbits_be32(&ddr->debug[1], 0x400); +- debug("Setting D2[21] to 0x%08x\n", in_be32(&ddr->debug[1])); ++printf("Setting D2[21] to 0x%08x\n", in_be32(&ddr->debug[1])); + + /* 6. Poll D2[21] until its cleared */ + while (in_be32(&ddr->debug[1]) & 0x400) + udelay(10000); /* throttle polling rate */ + + /* 7. Wait for state machine 2nd run, roughly 400ms/GB */ +- debug("Wait for %d * 10ms\n", timeout_save); ++printf("Wait for %d * 10ms\n", timeout_save); + udelay(timeout_save * 10000); + + /* 8. Set sdram_cfg_2[dinit] if options requires */ + setbits_be32(&ddr->sdram_cfg_2, + regs->ddr_sdram_cfg_2 & SDRAM_CFG2_D_INIT); +- debug("Setting sdram_cfg_2 to 0x%08x\n", in_be32(&ddr->sdram_cfg_2)); ++printf("Setting sdram_cfg_2 to 0x%08x\n", in_be32(&ddr->sdram_cfg_2)); + + /* 9. Poll until dinit is cleared */ + timeout = timeout_save; +- debug("Need to wait up to %d * 10ms\n", timeout); ++printf("Need to wait up to %d * 10ms\n", timeout); + while ((in_be32(&ddr->sdram_cfg_2) & SDRAM_CFG2_D_INIT) && + (timeout >= 0)) { + udelay(10000); /* throttle polling rate */ +@@ -571,12 +571,12 @@ step2: + + /* 10. Clear EEBACR[3] */ + clrbits_be32(&ecm->eebacr, 10000000); +- debug("Clearing EEBACR[3] to 0x%08x\n", in_be32(&ecm->eebacr)); ++printf("Clearing EEBACR[3] to 0x%08x\n", in_be32(&ecm->eebacr)); + + if (csn != -1) { + csn_bnds_t = (unsigned int *) ®s->cs[csn].bnds; + *csn_bnds_t = csn_bnds_backup; +- debug("Change cs%d_bnds back to 0x%08x\n", ++printf("Change cs%d_bnds back to 0x%08x\n", + csn, regs->cs[csn].bnds); + setbits_be32(&ddr->sdram_cfg, 0x2); /* MEM_HALT */ + switch (csn) { +diff --git a/drivers/ddr/fsl/mpc86xx_ddr.c b/drivers/ddr/fsl/mpc86xx_ddr.c +index 43ed1ba43..9e8914ef7 100644 +--- a/drivers/ddr/fsl/mpc86xx_ddr.c ++++ b/drivers/ddr/fsl/mpc86xx_ddr.c +@@ -64,7 +64,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + out_be32(&ddr->init_addr, regs->ddr_init_addr); + out_be32(&ddr->init_ext_addr, regs->ddr_init_ext_addr); + +- debug("before go\n"); ++printf("before go\n"); + + /* + * 200 painful micro-seconds must elapse between +diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c +index c000a45f8..f56c011e9 100644 +--- a/drivers/ddr/fsl/options.c ++++ b/drivers/ddr/fsl/options.c +@@ -981,13 +981,13 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, + #endif + + /* Global Timing Parameters. */ +- debug("mclk_ps = %u ps\n", get_memory_clk_period_ps(ctrl_num)); ++printf("mclk_ps = %u ps\n", get_memory_clk_period_ps(ctrl_num)); + + /* Pick a caslat override. */ + popts->cas_latency_override = 0; + popts->cas_latency_override_value = 3; + if (popts->cas_latency_override) { +- debug("using caslat override value = %u\n", ++printf("using caslat override value = %u\n", + popts->cas_latency_override_value); + } + +@@ -998,7 +998,7 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, + popts->additive_latency_override = 0; + popts->additive_latency_override_value = 3; + if (popts->additive_latency_override) { +- debug("using additive latency override value = %u\n", ++printf("using additive latency override value = %u\n", + popts->additive_latency_override_value); + } + +@@ -1103,7 +1103,7 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, + #ifdef CONFIG_SYS_FSL_DDR_INTLV_256B + popts->memctl_interleaving_mode = FSL_DDR_256B_INTERLEAVING; + popts->memctl_interleaving = 1; +- debug("256 Byte interleaving\n"); ++printf("256 Byte interleaving\n"); + #else + /* + * test null first. if CONFIG_HWCONFIG is not defined +@@ -1112,7 +1112,7 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, + if (hwconfig_subarg_cmp_f("fsl_ddr", "ctlr_intlv", + "null", buf)) { + popts->memctl_interleaving = 0; +- debug("memory controller interleaving disabled.\n"); ++printf("memory controller interleaving disabled.\n"); + } else if (hwconfig_subarg_cmp_f("fsl_ddr", + "ctlr_intlv", + "cacheline", buf)) { +@@ -1195,7 +1195,7 @@ done: + * hwconfig_subarg_cmp_f returns non-zero */ + if (hwconfig_subarg_cmp_f("fsl_ddr", "bank_intlv", + "null", buf)) +- debug("bank interleaving disabled.\n"); ++printf("bank interleaving disabled.\n"); + else if (hwconfig_subarg_cmp_f("fsl_ddr", "bank_intlv", + "cs0_cs1", buf)) + popts->ba_intlv_ctl = FSL_DDR_CS0_CS1; +@@ -1386,7 +1386,7 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo) + k = CONFIG_SYS_NUM_DDR_CTLRS; + break; + } +- debug("%d of %d controllers are interleaving.\n", j, k); ++printf("%d of %d controllers are interleaving.\n", j, k); + if (j && (j != k)) { + for (i = first_ctrl; i <= last_ctrl; i++) + pinfo->memctl_opts[i].memctl_interleaving = 0; +@@ -1394,7 +1394,7 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo) + puts("Not all controllers have compatible interleaving mode. All disabled.\n"); + } + } +- debug("Checking interleaving options completed\n"); ++printf("Checking interleaving options completed\n"); + } + + int fsl_use_spd(void) +diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c +index ac4f8d273..823ae6435 100644 +--- a/drivers/ddr/fsl/util.c ++++ b/drivers/ddr/fsl/util.c +@@ -145,7 +145,7 @@ __fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params, + law_memctl); + return ; + } +- debug("setup ddr law base = 0x%llx, size 0x%llx, TRGT_ID 0x%x\n", ++printf("setup ddr law base = 0x%llx, size 0x%llx, TRGT_ID 0x%x\n", + base, size, law_memctl); + } + +@@ -160,7 +160,7 @@ void fsl_ddr_set_intl3r(const unsigned int granule_size) + #ifdef CONFIG_E6500 + u32 *mcintl3r = (void *) (CONFIG_SYS_IMMR + 0x18004); + *mcintl3r = 0x80000000 | (granule_size & 0x1f); +- debug("Enable MCINTL3R with granule size 0x%x\n", granule_size); ++printf("Enable MCINTL3R with granule size 0x%x\n", granule_size); + #endif + } + +@@ -418,13 +418,13 @@ void remove_unused_controllers(fsl_ddr_info_t *info) + if (!ddr0_used && info->first_ctrl == 0) { + info->first_ctrl = 1; + info->num_ctrls = 1; +- debug("First DDR controller disabled\n"); ++printf("First DDR controller disabled\n"); + return; + } + + if (!ddr1_used && info->first_ctrl + info->num_ctrls > 1) { + info->num_ctrls = 1; +- debug("Second DDR controller disabled\n"); ++printf("Second DDR controller disabled\n"); + } + #endif + } +diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c +index b70bcc383..84cc60e83 100644 +--- a/drivers/ddr/imx/imx8m/ddr_init.c ++++ b/drivers/ddr/imx/imx8m/ddr_init.c +@@ -96,7 +96,7 @@ int ddr_init(struct dram_timing_info *dram_timing) + unsigned int tmp, initial_drate, target_freq; + int ret; + +- debug("DDRINFO: start DRAM init\n"); ++printf("DDRINFO: start DRAM init\n"); + + /* Step1: Follow the power up procedure */ + if (is_imx8mq()) { +@@ -108,7 +108,7 @@ int ddr_init(struct dram_timing_info *dram_timing) + reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00000F); + } + +- debug("DDRINFO: cfg clk\n"); ++printf("DDRINFO: cfg clk\n"); + /* change the clock source of dram_apb_clk_root: source 4 800MHz /4 = 200MHz */ + clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(4) | + CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV4)); +@@ -125,9 +125,9 @@ int ddr_init(struct dram_timing_info *dram_timing) + reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000006); + + /* Step2: Program the dwc_ddr_umctl2 registers */ +- debug("DDRINFO: ddrc config start\n"); ++printf("DDRINFO: ddrc config start\n"); + ddr_cfg_umctl2(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num); +- debug("DDRINFO: ddrc config done\n"); ++printf("DDRINFO: ddrc config done\n"); + + /* Step3: De-assert reset signal(core_ddrc_rstn & aresetn_n) */ + reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000004); +@@ -169,13 +169,13 @@ int ddr_init(struct dram_timing_info *dram_timing) + * Step8 ~ Step13: Start PHY initialization and training by + * accessing relevant PUB registers + */ +- debug("DDRINFO:ddrphy config start\n"); ++printf("DDRINFO:ddrphy config start\n"); + + ret = ddr_cfg_phy(dram_timing); + if (ret) + return ret; + +- debug("DDRINFO: ddrphy config done\n"); ++printf("DDRINFO: ddrphy config done\n"); + + /* + * step14 CalBusy.0 =1, indicates the calibrator is actively +@@ -185,7 +185,7 @@ int ddr_init(struct dram_timing_info *dram_timing) + tmp = reg32_read(DDRPHY_CalBusy(0)); + } while ((tmp & 0x1)); + +- debug("DDRINFO:ddrphy calibration done\n"); ++printf("DDRINFO:ddrphy calibration done\n"); + + /* Step15: Set SWCTL.sw_done to 0 */ + reg32_write(DDRC_SWCTL(0), 0x00000000); +@@ -238,7 +238,7 @@ int ddr_init(struct dram_timing_info *dram_timing) + + /* enable port 0 */ + reg32_write(DDRC_PCTRL_0(0), 0x00000001); +- debug("DDRINFO: ddrmix config done\n"); ++printf("DDRINFO: ddrmix config done\n"); + + board_dram_ecc_scrub(); + +diff --git a/drivers/ddr/imx/imx8m/ddrphy_train.c b/drivers/ddr/imx/imx8m/ddrphy_train.c +index 08fed6178..80be1b8bc 100644 +--- a/drivers/ddr/imx/imx8m/ddrphy_train.c ++++ b/drivers/ddr/imx/imx8m/ddrphy_train.c +@@ -31,7 +31,7 @@ int ddr_cfg_phy(struct dram_timing_info *dram_timing) + /* load the frequency setpoint message block config */ + fsp_msg = dram_timing->fsp_msg; + for (i = 0; i < dram_timing->fsp_msg_num; i++) { +- debug("DRAM PHY training for %dMTS\n", fsp_msg->drate); ++printf("DRAM PHY training for %dMTS\n", fsp_msg->drate); + /* set dram PHY input clocks to desired frequency */ + ddrphy_init_set_dfi_clk(fsp_msg->drate); + +diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c +index 0f8baefb1..9c3622254 100644 +--- a/drivers/ddr/imx/imx8m/ddrphy_utils.c ++++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c +@@ -72,7 +72,7 @@ static inline unsigned int get_stream_message(void) + + static inline void decode_major_message(unsigned int mail) + { +- debug("[PMU Major message = 0x%08x]\n", mail); ++printf("[PMU Major message = 0x%08x]\n", mail); + } + + static inline void decode_streaming_message(void) +@@ -81,14 +81,14 @@ static inline void decode_streaming_message(void) + int i = 0; + + string_index = get_stream_message(); +- debug("PMU String index = 0x%08x\n", string_index); ++printf("PMU String index = 0x%08x\n", string_index); + while (i < (string_index & 0xffff)) { + arg = get_stream_message(); +- debug("arg[%d] = 0x%08x\n", i, arg); ++printf("arg[%d] = 0x%08x\n", i, arg); + i++; + } + +- debug("\n"); ++printf("\n"); + } + + int wait_ddrphy_training_complete(void) +@@ -101,10 +101,10 @@ int wait_ddrphy_training_complete(void) + if (mail == 0x08) { + decode_streaming_message(); + } else if (mail == 0x07) { +- debug("Training PASS\n"); ++printf("Training PASS\n"); + return 0; + } else if (mail == 0xff) { +- debug("Training FAILED\n"); ++printf("Training FAILED\n"); + return -1; + } + } +diff --git a/drivers/ddr/imx/imx8m/helper.c b/drivers/ddr/imx/imx8m/helper.c +index f23904bf7..c85aa6863 100644 +--- a/drivers/ddr/imx/imx8m/helper.c ++++ b/drivers/ddr/imx/imx8m/helper.c +@@ -69,7 +69,7 @@ void ddr_load_train_firmware(enum fw_type type) + i += 4; + } + +- debug("check ddr_pmu_train_imem code\n"); ++printf("check ddr_pmu_train_imem code\n"); + pr_from32 = imem_start; + pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR; + for (i = 0x0; i < IMEM_LEN; ) { +@@ -78,7 +78,7 @@ void ddr_load_train_firmware(enum fw_type type) + tmp32 += ((readw(pr_to32) & 0x0000ffff) << 16); + + if (tmp32 != readl(pr_from32)) { +- debug("%lx %lx\n", pr_from32, pr_to32); ++printf("%lx %lx\n", pr_from32, pr_to32); + error++; + } + pr_from32 += 4; +@@ -88,9 +88,9 @@ void ddr_load_train_firmware(enum fw_type type) + if (error) + printf("check ddr_pmu_train_imem code fail=%d\n", error); + else +- debug("check ddr_pmu_train_imem code pass\n"); ++printf("check ddr_pmu_train_imem code pass\n"); + +- debug("check ddr4_pmu_train_dmem code\n"); ++printf("check ddr4_pmu_train_dmem code\n"); + pr_from32 = dmem_start; + pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * DMEM_OFFSET_ADDR; + for (i = 0x0; i < DMEM_LEN;) { +@@ -98,7 +98,7 @@ void ddr_load_train_firmware(enum fw_type type) + pr_to32 += 4; + tmp32 += ((readw(pr_to32) & 0x0000ffff) << 16); + if (tmp32 != readl(pr_from32)) { +- debug("%lx %lx\n", pr_from32, pr_to32); ++printf("%lx %lx\n", pr_from32, pr_to32); + error++; + } + pr_from32 += 4; +@@ -109,7 +109,7 @@ void ddr_load_train_firmware(enum fw_type type) + if (error) + printf("check ddr_pmu_train_dmem code fail=%d", error); + else +- debug("check ddr_pmu_train_dmem code pass\n"); ++printf("check ddr_pmu_train_dmem code pass\n"); + } + + void ddrphy_trained_csr_save(struct dram_cfg_param *ddrphy_csr, +diff --git a/drivers/ddr/marvell/axp/xor.c b/drivers/ddr/marvell/axp/xor.c +index 76aea9668..4a9462964 100644 +--- a/drivers/ddr/marvell/axp/xor.c ++++ b/drivers/ddr/marvell/axp/xor.c +@@ -244,17 +244,17 @@ int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr) + + /* Parameter checking */ + if (chan >= MV_XOR_MAX_CHAN) { +- debug("%s: ERR. Invalid chan num %d\n", __func__, chan); ++printf("%s: ERR. Invalid chan num %d\n", __func__, chan); + return MV_BAD_PARAM; + } + + if (MV_ACTIVE == mv_xor_state_get(chan)) { +- debug("%s: ERR. Channel is already active\n", __func__); ++printf("%s: ERR. Channel is already active\n", __func__); + return MV_BUSY; + } + + if (0x0 == xor_chain_ptr) { +- debug("%s: ERR. xor_chain_ptr is NULL pointer\n", __func__); ++printf("%s: ERR. xor_chain_ptr is NULL pointer\n", __func__); + return MV_BAD_PARAM; + } + +@@ -265,7 +265,7 @@ int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr) + switch (xor_type) { + case MV_XOR: + if (0 != (xor_chain_ptr & XEXDPR_DST_PTR_XOR_MASK)) { +- debug("%s: ERR. Invalid chain pointer (bits [5:0] must be cleared)\n", ++printf("%s: ERR. Invalid chain pointer (bits [5:0] must be cleared)\n", + __func__); + return MV_BAD_PARAM; + } +@@ -276,7 +276,7 @@ int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr) + + case MV_DMA: + if (0 != (xor_chain_ptr & XEXDPR_DST_PTR_DMA_MASK)) { +- debug("%s: ERR. Invalid chain pointer (bits [4:0] must be cleared)\n", ++printf("%s: ERR. Invalid chain pointer (bits [4:0] must be cleared)\n", + __func__); + return MV_BAD_PARAM; + } +@@ -287,7 +287,7 @@ int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr) + + case MV_CRC32: + if (0 != (xor_chain_ptr & XEXDPR_DST_PTR_CRC_MASK)) { +- debug("%s: ERR. Invalid chain pointer (bits [4:0] must be cleared)\n", ++printf("%s: ERR. Invalid chain pointer (bits [4:0] must be cleared)\n", + __func__); + return MV_BAD_PARAM; + } +@@ -344,7 +344,7 @@ int mv_xor_state_get(u32 chan) + + /* Parameter checking */ + if (chan >= MV_XOR_MAX_CHAN) { +- debug("%s: ERR. Invalid chan num %d\n", __func__, chan); ++printf("%s: ERR. Invalid chan num %d\n", __func__, chan); + return MV_UNDEFINED_STATE; + } + +@@ -393,7 +393,7 @@ static int mv_xor_cmd_set(u32 chan, int command) + + /* Parameter checking */ + if (chan >= MV_XOR_MAX_CHAN) { +- debug("%s: ERR. Invalid chan num %d\n", __func__, chan); ++printf("%s: ERR. Invalid chan num %d\n", __func__, chan); + return MV_BAD_PARAM; + } + +@@ -429,7 +429,7 @@ static int mv_xor_cmd_set(u32 chan, int command) + return MV_OK; + + /* Illegal command */ +- debug("%s: ERR. Illegal command\n", __func__); ++printf("%s: ERR. Illegal command\n", __func__); + + return MV_BAD_PARAM; + } +diff --git a/drivers/demo/demo-shape.c b/drivers/demo/demo-shape.c +index b6b29bcb3..1b6d11f16 100644 +--- a/drivers/demo/demo-shape.c ++++ b/drivers/demo/demo-shape.c +@@ -169,7 +169,7 @@ static int dm_shape_probe(struct udevice *dev) + if (ret < 0) + return ret; + priv->gpio_count = ret; +- debug("%s: %d GPIOs\n", __func__, priv->gpio_count); ++printf("%s: %d GPIOs\n", __func__, priv->gpio_count); + + return 0; + } +diff --git a/drivers/demo/demo-uclass.c b/drivers/demo/demo-uclass.c +index 815f8de64..03c411a3e 100644 +--- a/drivers/demo/demo-uclass.c ++++ b/drivers/demo/demo-uclass.c +@@ -72,7 +72,7 @@ int demo_parse_dt(struct udevice *dev) + pdata->sides = fdtdec_get_int(gd->fdt_blob, dn, "sides", 0); + pdata->colour = fdt_getprop(gd->fdt_blob, dn, "colour", NULL); + if (!pdata->sides || !pdata->colour) { +- debug("%s: Invalid device tree data\n", __func__); ++printf("%s: Invalid device tree data\n", __func__); + return -EINVAL; + } + +diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c +index 213a20e7b..49b4ce64f 100644 +--- a/drivers/dfu/dfu.c ++++ b/drivers/dfu/dfu.c +@@ -224,7 +224,7 @@ static char *dfu_get_hash_algo(void) + return NULL; + + if (!strcmp(s, "crc32")) { +- debug("%s: DFU hash method: %s\n", __func__, s); ++printf("%s: DFU hash method: %s\n", __func__, s); + return s; + } + +@@ -248,7 +248,7 @@ static int dfu_write_buffer_drain(struct dfu_entity *dfu) + + ret = dfu->write_medium(dfu, dfu->offset, dfu->i_buf_start, &w_size); + if (ret) +- debug("%s: Write error!\n", __func__); ++printf("%s: Write error!\n", __func__); + + /* point back */ + dfu->i_buf = dfu->i_buf_start; +@@ -295,7 +295,7 @@ int dfu_transaction_initiate(struct dfu_entity *dfu, bool read) + ret = dfu->get_medium_size(dfu, &dfu->r_left); + if (ret < 0) + return ret; +- debug("%s: %s %lld [B]\n", __func__, dfu->name, dfu->r_left); ++printf("%s: %s %lld [B]\n", __func__, dfu->name, dfu->r_left); + } + + dfu->inited = 1; +@@ -330,7 +330,7 @@ int dfu_write(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num) + { + int ret; + +- debug("%s: name: %s buf: 0x%p size: 0x%x p_num: 0x%x offset: 0x%llx bufoffset: 0x%lx\n", ++printf("%s: name: %s buf: 0x%p size: 0x%x p_num: 0x%x offset: 0x%llx bufoffset: 0x%lx\n", + __func__, dfu->name, buf, size, blk_seq_num, dfu->offset, + (unsigned long)(dfu->i_buf - dfu->i_buf_start)); + +@@ -432,7 +432,7 @@ static int dfu_read_buffer_fill(struct dfu_entity *dfu, void *buf, int size) + ret = dfu->read_medium(dfu, dfu->offset, dfu->i_buf, + &dfu->b_left); + if (ret != 0) { +- debug("%s: Read error!\n", __func__); ++printf("%s: Read error!\n", __func__); + return ret; + } + if (dfu->b_left == 0) +@@ -451,7 +451,7 @@ int dfu_read(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num) + { + int ret = 0; + +- debug("%s: name: %s buf: 0x%p size: 0x%x p_num: 0x%x i_buf: 0x%p\n", ++printf("%s: name: %s buf: 0x%p size: 0x%x p_num: 0x%x i_buf: 0x%p\n", + __func__, dfu->name, buf, size, blk_seq_num, dfu->i_buf); + + ret = dfu_transaction_initiate(dfu, true); +@@ -474,7 +474,7 @@ int dfu_read(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num) + + if (ret < size) { + if (dfu_hash_algo) +- debug("%s: %s %s: 0x%x\n", __func__, dfu->name, ++printf("%s: %s %s: 0x%x\n", __func__, dfu->name, + dfu_hash_algo->name, dfu->crc); + puts("\nUPLOAD ... done\nCtrl+C to exit ...\n"); + +@@ -489,7 +489,7 @@ static int dfu_fill_entity(struct dfu_entity *dfu, char *s, int alt, + { + char *st; + +- debug("%s: %s interface: %s dev: %s\n", __func__, s, interface, devstr); ++printf("%s: %s interface: %s dev: %s\n", __func__, s, interface, devstr); + st = strsep(&s, " "); + strcpy(dfu->name, st); + +@@ -550,7 +550,7 @@ int dfu_alt_init(int num, struct dfu_entity **dfu) + int ret; + + dfu_alt_num = num; +- debug("%s: dfu_alt_num=%d\n", __func__, dfu_alt_num); ++printf("%s: dfu_alt_num=%d\n", __func__, dfu_alt_num); + + dfu_hash_algo = NULL; + s = dfu_get_hash_algo(); +@@ -703,12 +703,12 @@ int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size) + */ + dfu_get_buf(dfu); + dfu_buf_size = dfu_get_buf_size(); +- debug("%s: dfu buf size: %lu\n", __func__, dfu_buf_size); ++printf("%s: dfu buf size: %lu\n", __func__, dfu_buf_size); + + for (i = 0; left > 0; i++) { + write = min(dfu_buf_size, left); + +- debug("%s: dp: 0x%p left: %lu write: %lu\n", __func__, ++printf("%s: dp: 0x%p left: %lu write: %lu\n", __func__, + dp, left, write); + ret = dfu_write(dfu, dp, write, i); + if (ret) { +diff --git a/drivers/dfu/dfu_alt.c b/drivers/dfu/dfu_alt.c +index ece3d2236..711206f0e 100644 +--- a/drivers/dfu/dfu_alt.c ++++ b/drivers/dfu/dfu_alt.c +@@ -30,7 +30,7 @@ int dfu_write_by_name(char *dfu_entity_name, void *addr, + int alt_setting_num, ret; + struct dfu_entity *dfu; + +- debug("%s: name: %s addr: 0x%p len: %d device: %s:%s\n", __func__, ++printf("%s: name: %s addr: 0x%p len: %d device: %s:%s\n", __func__, + dfu_entity_name, addr, len, interface, devstring); + + ret = dfu_init_env_entities(interface, devstring); +@@ -51,7 +51,7 @@ int dfu_write_by_name(char *dfu_entity_name, void *addr, + } + + strsep(&s, "@"); +- debug("%s: image name: %s strlen: %zd\n", __func__, sb, strlen(sb)); ++printf("%s: image name: %s strlen: %zd\n", __func__, sb, strlen(sb)); + + alt_setting_num = dfu_get_alt(sb); + free(sb); +@@ -96,7 +96,7 @@ int dfu_write_by_alt(int dfu_alt_num, void *addr, unsigned int len, + struct dfu_entity *dfu; + int ret; + +- debug("%s: alt: %d addr: 0x%p len: %d device: %s:%s\n", __func__, ++printf("%s: alt: %d addr: 0x%p len: %d device: %s:%s\n", __func__, + dfu_alt_num, addr, len, interface, devstring); + + ret = dfu_init_env_entities(interface, devstring); +diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c +index e63fa84ce..57a7605c5 100644 +--- a/drivers/dfu/dfu_mmc.c ++++ b/drivers/dfu/dfu_mmc.c +@@ -59,7 +59,7 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, + return ret; + } + +- debug("%s: %s dev: %d start: %d cnt: %d buf: 0x%p\n", __func__, ++printf("%s: %s dev: %d start: %d cnt: %d buf: 0x%p\n", __func__, + op == DFU_OP_READ ? "MMC READ" : "MMC WRITE", + dfu->data.mmc.dev_num, blk_start, blk_count, buf); + switch (op) { +diff --git a/drivers/dfu/dfu_mtd.c b/drivers/dfu/dfu_mtd.c +index ec40b8f6b..fda3e3ca7 100644 +--- a/drivers/dfu/dfu_mtd.c ++++ b/drivers/dfu/dfu_mtd.c +@@ -62,7 +62,7 @@ static int mtd_block_op(enum dfu_op op, struct dfu_entity *dfu, + erase_op.len = mtd->erasesize; + erase_op.scrub = 0; + +- debug("Unlocking the mtd device\n"); ++printf("Unlocking the mtd device\n"); + ret = mtd_unlock(mtd, lock_ofs, lock_len); + if (ret && ret != -EOPNOTSUPP) { + printf("MTD device unlock failed\n"); +@@ -148,7 +148,7 @@ static int mtd_block_op(enum dfu_op op, struct dfu_entity *dfu, + + if (op == DFU_OP_WRITE) { + /* Write done, lock again */ +- debug("Locking the mtd device\n"); ++printf("Locking the mtd device\n"); + ret = mtd_lock(mtd, lock_ofs, lock_len); + if (ret == -EOPNOTSUPP) + ret = 0; +diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c +index b8d24d203..2af88918f 100644 +--- a/drivers/dfu/dfu_nand.c ++++ b/drivers/dfu/dfu_nand.c +@@ -220,7 +220,7 @@ int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s) + part = simple_strtoul(s, &s, 10); + + sprintf(mtd_id, "%s%d,%d", "nand", dev, part - 1); +- debug("using id '%s'\n", mtd_id); ++printf("using id '%s'\n", mtd_id); + + mtdparts_init(); + +diff --git a/drivers/dfu/dfu_virt.c b/drivers/dfu/dfu_virt.c +index 62605bcde..339eadcc4 100644 +--- a/drivers/dfu/dfu_virt.c ++++ b/drivers/dfu/dfu_virt.c +@@ -11,7 +11,7 @@ + int __weak dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset, + void *buf, long *len) + { +- debug("%s: off=0x%llx, len=0x%x\n", __func__, offset, (u32)*len); ++printf("%s: off=0x%llx, len=0x%x\n", __func__, offset, (u32)*len); + + return 0; + } +@@ -26,7 +26,7 @@ int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size) + int __weak dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset, + void *buf, long *len) + { +- debug("%s: off=0x%llx, len=0x%x\n", __func__, offset, (u32)*len); ++printf("%s: off=0x%llx, len=0x%x\n", __func__, offset, (u32)*len); + *len = 0; + + return 0; +@@ -34,7 +34,7 @@ int __weak dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset, + + int dfu_fill_entity_virt(struct dfu_entity *dfu, char *devstr, char *s) + { +- debug("%s: devstr = %s\n", __func__, devstr); ++printf("%s: devstr = %s\n", __func__, devstr); + + dfu->dev_type = DFU_DEV_VIRT; + dfu->layout = DFU_RAW_ADDR; +diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c +index a93b0b7ba..bc6d3470e 100644 +--- a/drivers/dma/dma-uclass.c ++++ b/drivers/dma/dma-uclass.c +@@ -30,7 +30,7 @@ static inline struct dma_ops *dma_dev_ops(struct udevice *dev) + static int dma_of_xlate_default(struct dma *dma, + struct ofnode_phandle_args *args) + { +- debug("%s(dma=%p)\n", __func__, dma); ++printf("%s(dma=%p)\n", __func__, dma); + + if (args->args_count > 1) { + pr_err("Invaild args_count: %d\n", args->args_count); +@@ -52,7 +52,7 @@ int dma_get_by_index(struct udevice *dev, int index, struct dma *dma) + struct udevice *dev_dma; + const struct dma_ops *ops; + +- debug("%s(dev=%p, index=%d, dma=%p)\n", __func__, dev, index, dma); ++printf("%s(dev=%p, index=%d, dma=%p)\n", __func__, dev, index, dma); + + assert(dma); + dma->dev = NULL; +@@ -92,7 +92,7 @@ int dma_get_by_name(struct udevice *dev, const char *name, struct dma *dma) + { + int index; + +- debug("%s(dev=%p, name=%s, dma=%p)\n", __func__, dev, name, dma); ++printf("%s(dev=%p, name=%s, dma=%p)\n", __func__, dev, name, dma); + dma->dev = NULL; + + index = dev_read_stringlist_search(dev, "dma-names", name); +@@ -109,7 +109,7 @@ int dma_request(struct udevice *dev, struct dma *dma) + { + struct dma_ops *ops = dma_dev_ops(dev); + +- debug("%s(dev=%p, dma=%p)\n", __func__, dev, dma); ++printf("%s(dev=%p, dma=%p)\n", __func__, dev, dma); + + dma->dev = dev; + +@@ -123,7 +123,7 @@ int dma_free(struct dma *dma) + { + struct dma_ops *ops = dma_dev_ops(dma->dev); + +- debug("%s(dma=%p)\n", __func__, dma); ++printf("%s(dma=%p)\n", __func__, dma); + + if (!ops->rfree) + return 0; +@@ -135,7 +135,7 @@ int dma_enable(struct dma *dma) + { + struct dma_ops *ops = dma_dev_ops(dma->dev); + +- debug("%s(dma=%p)\n", __func__, dma); ++printf("%s(dma=%p)\n", __func__, dma); + + if (!ops->enable) + return -ENOSYS; +@@ -147,7 +147,7 @@ int dma_disable(struct dma *dma) + { + struct dma_ops *ops = dma_dev_ops(dma->dev); + +- debug("%s(dma=%p)\n", __func__, dma); ++printf("%s(dma=%p)\n", __func__, dma); + + if (!ops->disable) + return -ENOSYS; +@@ -159,7 +159,7 @@ int dma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size) + { + struct dma_ops *ops = dma_dev_ops(dma->dev); + +- debug("%s(dma=%p)\n", __func__, dma); ++printf("%s(dma=%p)\n", __func__, dma); + + if (!ops->prepare_rcv_buf) + return -1; +@@ -171,7 +171,7 @@ int dma_receive(struct dma *dma, void **dst, void *metadata) + { + struct dma_ops *ops = dma_dev_ops(dma->dev); + +- debug("%s(dma=%p)\n", __func__, dma); ++printf("%s(dma=%p)\n", __func__, dma); + + if (!ops->receive) + return -ENOSYS; +@@ -183,7 +183,7 @@ int dma_send(struct dma *dma, void *src, size_t len, void *metadata) + { + struct dma_ops *ops = dma_dev_ops(dma->dev); + +- debug("%s(dma=%p)\n", __func__, dma); ++printf("%s(dma=%p)\n", __func__, dma); + + if (!ops->send) + return -ENOSYS; +@@ -195,7 +195,7 @@ int dma_get_cfg(struct dma *dma, u32 cfg_id, void **cfg_data) + { + struct dma_ops *ops = dma_dev_ops(dma->dev); + +- debug("%s(dma=%p)\n", __func__, dma); ++printf("%s(dma=%p)\n", __func__, dma); + + if (!ops->get_cfg) + return -ENOSYS; +diff --git a/drivers/dma/sandbox-dma-test.c b/drivers/dma/sandbox-dma-test.c +index aebf3eef9..9787a9341 100644 +--- a/drivers/dma/sandbox-dma-test.c ++++ b/drivers/dma/sandbox-dma-test.c +@@ -52,7 +52,7 @@ static int sandbox_dma_of_xlate(struct dma *dma, + struct sandbox_dma_dev *ud = dev_get_priv(dma->dev); + struct sandbox_dma_chan *uc; + +- debug("%s(dma id=%u)\n", __func__, args->args[0]); ++printf("%s(dma id=%u)\n", __func__, args->args[0]); + + if (args->args[0] >= SANDBOX_DMA_CH_CNT) + return -EINVAL; +@@ -67,7 +67,7 @@ static int sandbox_dma_of_xlate(struct dma *dma, + uc->dir = DMA_DEV_TO_MEM; + else + uc->dir = DMA_MEM_TO_MEM; +- debug("%s(dma id=%lu dir=%d)\n", __func__, dma->id, uc->dir); ++printf("%s(dma id=%lu dir=%d)\n", __func__, dma->id, uc->dir); + + return 0; + } +@@ -85,7 +85,7 @@ static int sandbox_dma_request(struct dma *dma) + return -EBUSY; + + uc->in_use = true; +- debug("%s(dma id=%lu in_use=%d)\n", __func__, dma->id, uc->in_use); ++printf("%s(dma id=%lu in_use=%d)\n", __func__, dma->id, uc->in_use); + + return 0; + } +@@ -105,7 +105,7 @@ static int sandbox_dma_rfree(struct dma *dma) + uc->in_use = false; + ud->buf_rx = NULL; + ud->data_len = 0; +- debug("%s(dma id=%lu in_use=%d)\n", __func__, dma->id, uc->in_use); ++printf("%s(dma id=%lu in_use=%d)\n", __func__, dma->id, uc->in_use); + + return 0; + } +@@ -125,7 +125,7 @@ static int sandbox_dma_enable(struct dma *dma) + return -EINVAL; + + uc->enabled = true; +- debug("%s(dma id=%lu enabled=%d)\n", __func__, dma->id, uc->enabled); ++printf("%s(dma id=%lu enabled=%d)\n", __func__, dma->id, uc->enabled); + + return 0; + } +@@ -145,7 +145,7 @@ static int sandbox_dma_disable(struct dma *dma) + return -EINVAL; + + uc->enabled = false; +- debug("%s(dma id=%lu enabled=%d)\n", __func__, dma->id, uc->enabled); ++printf("%s(dma id=%lu enabled=%d)\n", __func__, dma->id, uc->enabled); + + return 0; + } +@@ -161,7 +161,7 @@ static int sandbox_dma_send(struct dma *dma, + if (!src || !metadata) + return -EINVAL; + +- debug("%s(dma id=%lu)\n", __func__, dma->id); ++printf("%s(dma id=%lu)\n", __func__, dma->id); + + uc = &ud->channels[dma->id]; + if (uc->dir != DMA_MEM_TO_DEV) +@@ -177,7 +177,7 @@ static int sandbox_dma_send(struct dma *dma, + ud->data_len = len; + ud->meta = *((u32 *)metadata); + +- debug("%s(dma id=%lu len=%zu meta=%08x)\n", ++printf("%s(dma id=%lu len=%zu meta=%08x)\n", + __func__, dma->id, len, ud->meta); + + return 0; +@@ -212,7 +212,7 @@ static int sandbox_dma_receive(struct dma *dma, void **dst, void *metadata) + + *((u32 *)metadata) = ud->meta; + +- debug("%s(dma id=%lu len=%zu meta=%08x %p)\n", ++printf("%s(dma id=%lu len=%zu meta=%08x %p)\n", + __func__, dma->id, ud->data_len, ud->meta, *dst); + + return ud->data_len; +diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c +index 601868d7f..b18bd8988 100644 +--- a/drivers/dma/ti/k3-udma.c ++++ b/drivers/dma/ti/k3-udma.c +@@ -1687,7 +1687,7 @@ static int udma_probe(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev, + "ti,sci", &tisci_dev); + if (ret) { +- debug("Failed to get TISCI phandle (%d)\n", ret); ++printf("Failed to get TISCI phandle (%d)\n", ret); + tisci_rm->tisci = NULL; + return -EINVAL; + } +diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c +index 2f3837e55..92a6ed9b5 100644 +--- a/drivers/fastboot/fb_mmc.c ++++ b/drivers/fastboot/fb_mmc.c +@@ -211,7 +211,7 @@ static int fb_mmc_erase_mmc_hwpart(struct blk_desc *dev_desc) + { + lbaint_t blks; + +- debug("Start Erasing mmc hwpart[%u]...\n", dev_desc->hwpart); ++printf("Start Erasing mmc hwpart[%u]...\n", dev_desc->hwpart); + + blks = fb_mmc_blk_write(dev_desc, 0, dev_desc->lba, NULL); + +@@ -255,7 +255,7 @@ static void fb_mmc_boot_ops(struct blk_desc *dev_desc, void *buffer, + return; + } + +- debug("Start Flashing Image to EMMC_BOOT%d...\n", hwpart); ++printf("Start Flashing Image to EMMC_BOOT%d...\n", hwpart); + + blks = fb_mmc_blk_write(dev_desc, 0, blkcnt, buffer); + +diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c +index d4dc856ba..55ab13912 100644 +--- a/drivers/firmware/firmware-zynqmp.c ++++ b/drivers/firmware/firmware-zynqmp.c +@@ -37,12 +37,12 @@ static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) + if (!(zynqmp_power.tx_chan.dev) || !(&zynqmp_power.rx_chan.dev)) + return -EINVAL; + +- debug("%s, Sending IPI message with ID: 0x%0x\n", __func__, req[0]); ++printf("%s, Sending IPI message with ID: 0x%0x\n", __func__, req[0]); + msg.buf = (u32 *)req; + msg.len = req_len; + ret = mbox_send(&zynqmp_power.tx_chan, &msg); + if (ret) { +- debug("%s: Sending message failed\n", __func__); ++printf("%s: Sending message failed\n", __func__); + return ret; + } + +@@ -50,7 +50,7 @@ static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) + msg.len = res_maxlen; + ret = mbox_recv(&zynqmp_power.rx_chan, &msg, 100); + if (ret) +- debug("%s: Receiving message failed\n", __func__); ++printf("%s: Receiving message failed\n", __func__); + + return ret; + } +@@ -116,17 +116,17 @@ static int zynqmp_power_probe(struct udevice *dev) + { + int ret; + +- debug("%s, (dev=%p)\n", __func__, dev); ++printf("%s, (dev=%p)\n", __func__, dev); + + ret = mbox_get_by_name(dev, "tx", &zynqmp_power.tx_chan); + if (ret) { +- debug("%s: Cannot find tx mailbox\n", __func__); ++printf("%s: Cannot find tx mailbox\n", __func__); + return ret; + } + + ret = mbox_get_by_name(dev, "rx", &zynqmp_power.rx_chan); + if (ret) { +- debug("%s: Cannot find rx mailbox\n", __func__); ++printf("%s: Cannot find rx mailbox\n", __func__); + return ret; + } + +@@ -154,7 +154,7 @@ U_BOOT_DRIVER(zynqmp_power) = { + int __maybe_unused xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, + u32 arg3, u32 *ret_payload) + { +- debug("%s at EL%d, API ID: 0x%0x\n", __func__, current_el(), api_id); ++printf("%s at EL%d, API ID: 0x%0x\n", __func__, current_el(), api_id); + + if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { + #if defined(CONFIG_ZYNQMP_IPI) +diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c +index 4671a5e3a..4cefed567 100644 +--- a/drivers/firmware/ti_sci.c ++++ b/drivers/firmware/ti_sci.c +@@ -718,7 +718,7 @@ int ti_sci_cmd_release_exclusive_devices(const struct ti_sci_handle *handle) + + list_for_each_entry_safe(dev, tmp, &info->dev_list, list) { + cnt = dev->count; +- debug("%s: id = %d, cnt = %d\n", __func__, dev->id, cnt); ++printf("%s: id = %d, cnt = %d\n", __func__, dev->id, cnt); + for (i = 0; i < cnt; i++) + ti_sci_cmd_put_device(handle, dev->id); + } +@@ -2992,7 +2992,7 @@ static int ti_sci_probe(struct udevice *dev) + struct ti_sci_info *info; + int ret; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + info = dev_get_priv(dev); + info->desc = (void *)dev_get_driver_data(dev); +diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c +index fe3dfa123..b7f8c12d4 100644 +--- a/drivers/fpga/fpga.c ++++ b/drivers/fpga/fpga.c +@@ -46,7 +46,7 @@ const fpga_desc *const fpga_get_desc(int devnum) + + if ((devnum >= 0) && (devnum < next_desc)) { + desc = &desc_table[devnum]; +- debug("%s: found fpga descriptor #%d @ 0x%p\n", ++printf("%s: found fpga descriptor #%d @ 0x%p\n", + __func__, devnum, desc); + } + +@@ -82,7 +82,7 @@ static int fpga_dev_info(int devnum) + const fpga_desc * const desc = fpga_get_desc(devnum); + + if (desc) { +- debug("%s: Device Descriptor @ 0x%p\n", ++printf("%s: Device Descriptor @ 0x%p\n", + __func__, desc->devdesc); + + switch (desc->devtype) { +@@ -130,7 +130,7 @@ void fpga_init(void) + next_desc = 0; + memset(desc_table, 0, sizeof(desc_table)); + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + } + + /* +diff --git a/drivers/fpga/intel_sdm_mb.c b/drivers/fpga/intel_sdm_mb.c +index f5fd9a14c..2424d0d73 100644 +--- a/drivers/fpga/intel_sdm_mb.c ++++ b/drivers/fpga/intel_sdm_mb.c +@@ -67,7 +67,7 @@ static int send_bitstream(const void *rbf_data, size_t rbf_size) + wr_ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_WRITE, + args, 2, NULL, 0); + +- debug("wr_ret = %d, rbf_data = %p, buf_size = %08lx\n", ++printf("wr_ret = %d, rbf_data = %p, buf_size = %08lx\n", + wr_ret, rbf_data, buf_size); + + if (wr_ret) +@@ -119,7 +119,7 @@ int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) + int ret; + u64 arg = 1; + +- debug("Invoking FPGA_CONFIG_START...\n"); ++printf("Invoking FPGA_CONFIG_START...\n"); + + ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_START, &arg, 1, NULL, 0); + +@@ -137,7 +137,7 @@ int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) + /* Make sure we don't send MBOX_RECONFIG_STATUS too fast */ + udelay(RECONFIG_STATUS_INTERVAL_DELAY_US); + +- debug("Polling with MBOX_RECONFIG_STATUS...\n"); ++printf("Polling with MBOX_RECONFIG_STATUS...\n"); + ret = reconfig_status_polling_resp(); + if (ret) { + puts("FPGA reconfiguration failed!"); +@@ -197,7 +197,7 @@ static u8 add_transfer(u32 *xfer_pending_list, size_t list_size, u8 id) + if (xfer_pending_list[i]) + continue; + xfer_pending_list[i] = id; +- debug("ID(%d) added to transaction pending list\n", id); ++printf("ID(%d) added to transaction pending list\n", id); + /* + * Increment command ID for next transaction. + * Valid command ID (4 bits) is from 1 to 15. +@@ -319,8 +319,8 @@ static int send_reconfig_data(const void *rbf_data, size_t rbf_size, + u32 args[3]; + int ret; + +- debug("SDM xfer_max = %d\n", xfer_max); +- debug("SDM buf_size_max = %x\n\n", buf_size_max); ++printf("SDM xfer_max = %d\n", xfer_max); ++printf("SDM buf_size_max = %x\n\n", buf_size_max); + + memset(xfer_pending, 0, sizeof(xfer_pending)); + +@@ -363,7 +363,7 @@ static int send_reconfig_data(const void *rbf_data, size_t rbf_size, + /* Check for response's status */ + if (!resp_err) { + resp_err = MBOX_RESP_ERR_GET(resp_hdr); +- debug("Response error code: %08x\n", resp_err); ++printf("Response error code: %08x\n", resp_err); + } + + ret = get_and_clr_transfer(xfer_pending, +@@ -394,7 +394,7 @@ int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) + u32 resp_len = 2; + u32 resp_buf[2]; + +- debug("Sending MBOX_RECONFIG...\n"); ++printf("Sending MBOX_RECONFIG...\n"); + ret = mbox_send_cmd(MBOX_ID_UBOOT, MBOX_RECONFIG, MBOX_CMD_DIRECT, 0, + NULL, 0, &resp_len, resp_buf); + if (ret) { +@@ -412,7 +412,7 @@ int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) + /* Make sure we don't send MBOX_RECONFIG_STATUS too fast */ + udelay(RECONFIG_STATUS_INTERVAL_DELAY_US); + +- debug("Polling with MBOX_RECONFIG_STATUS...\n"); ++printf("Polling with MBOX_RECONFIG_STATUS...\n"); + ret = reconfig_status_polling_resp(); + if (ret) { + printf("RECONFIG_STATUS Error: %08x, %s\n", ret, +diff --git a/drivers/fpga/ivm_core.c b/drivers/fpga/ivm_core.c +index adc60919f..5a7c68957 100644 +--- a/drivers/fpga/ivm_core.c ++++ b/drivers/fpga/ivm_core.c +@@ -679,9 +679,9 @@ signed char ispVMCode() + + #ifdef DEBUG + if (g_usDataType & LHEAP_IN) { +- debug("LDELAY %s ", GetState(ucState)); ++printf("LDELAY %s ", GetState(ucState)); + } else { +- debug("STATE %s;\n", GetState(ucState)); ++printf("STATE %s;\n", GetState(ucState)); + } + #endif /* DEBUG */ + break; +@@ -2309,7 +2309,7 @@ signed char ispVMLCOUNT(unsigned short a_usCountSize) + * Invalid opcode encountered. + */ + +- debug("\nINVALID OPCODE: 0x%.2X\n", cOpcode); ++printf("\nINVALID OPCODE: 0x%.2X\n", cOpcode); + + return VME_INVALID_FILE; + } +@@ -2779,7 +2779,7 @@ signed char ispVMRead(unsigned short a_usiDataSize) + if (ucDisplayFlag) { + + #ifdef DEBUG +- debug("RECEIVED TDO ("); ++printf("RECEIVED TDO ("); + #else + vme_out_string("Display Data: 0x"); + #endif /* DEBUG */ +diff --git a/drivers/fpga/lattice.c b/drivers/fpga/lattice.c +index e292d991c..89b782e27 100644 +--- a/drivers/fpga/lattice.c ++++ b/drivers/fpga/lattice.c +@@ -300,7 +300,7 @@ int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize) + fpga_image = buf; + read_bytes = 0; + bufsize = bsize; +- debug("%s: Launching the Lattice ISPVME Loader:" ++printf("%s: Launching the Lattice ISPVME Loader:" + " addr %p size 0x%lx...\n", + __func__, fpga_image, bufsize); + ret_val = ispVM(); +diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c +index b992e6f08..5b067ef5c 100644 +--- a/drivers/fpga/socfpga_arria10.c ++++ b/drivers/fpga/socfpga_arria10.c +@@ -102,7 +102,7 @@ int fpgamgr_wait_early_user_mode(void) + i++; + } + +- debug("FPGA: Additional %i sync word needed\n", i); ++printf("FPGA: Additional %i sync word needed\n", i); + + /* restoring original CDRATIO */ + fpgamgr_set_cd_ratio(cd_ratio); +@@ -180,9 +180,9 @@ static int fpgamgr_set_cdratio_cdwidth(unsigned int cfg_width, u32 *rbf_data, + compress = (rbf_data[COMPRESSION_OFFSET] >> 1) & 1; + compress = !compress; + +- debug("FPGA: Header word %d = %08x.\n", 69, rbf_data[69]); +- debug("FPGA: Header word %d = %08x.\n", 229, rbf_data[229]); +- debug("FPGA: Read from rbf header: encrypt=%d compress=%d.\n", encrypt, ++printf("FPGA: Header word %d = %08x.\n", 69, rbf_data[69]); ++printf("FPGA: Header word %d = %08x.\n", 229, rbf_data[229]); ++printf("FPGA: Read from rbf header: encrypt=%d compress=%d.\n", encrypt, + compress); + + /* +@@ -542,20 +542,20 @@ static int first_loading_rbf_to_buffer(struct udevice *dev, + buffer_p, sizeof(struct image_header), + 0); + if (ret < 0) { +- debug("FPGA: Failed to read image header from flash.\n"); ++printf("FPGA: Failed to read image header from flash.\n"); + return -ENOENT; + } + + if (image_get_magic((struct image_header *)buffer_p) != FDT_MAGIC) { +- debug("FPGA: No FDT magic was found.\n"); ++printf("FPGA: No FDT magic was found.\n"); + return -EBADF; + } + + fit_size = fdt_totalsize(buffer_p); + + if (fit_size > buffer_size) { +- debug("FPGA: FIT image is larger than available buffer.\n"); +- debug("Please use FIT external data or increasing buffer.\n"); ++printf("FPGA: FIT image is larger than available buffer.\n"); ++printf("Please use FIT external data or increasing buffer.\n"); + return -ENOMEM; + } + +@@ -568,31 +568,31 @@ static int first_loading_rbf_to_buffer(struct udevice *dev, + + ret = fit_check_format(buffer_p, IMAGE_SIZE_INVAL); + if (ret) { +- debug("FPGA: No valid FIT image was found.\n"); ++printf("FPGA: No valid FIT image was found.\n"); + return ret; + } + + confs_noffset = fdt_path_offset(buffer_p, FIT_CONFS_PATH); + images_noffset = fdt_path_offset(buffer_p, FIT_IMAGES_PATH); + if (confs_noffset < 0 || images_noffset < 0) { +- debug("FPGA: No Configurations or images nodes were found.\n"); ++printf("FPGA: No Configurations or images nodes were found.\n"); + return -ENOENT; + } + + /* Get default configuration unit name from default property */ + confs_noffset = fit_conf_get_node(buffer_p, NULL); + if (confs_noffset < 0) { +- debug("FPGA: No default configuration was found in config.\n"); ++printf("FPGA: No default configuration was found in config.\n"); + return -ENOENT; + } + + count = fit_conf_get_prop_node_count(buffer_p, confs_noffset, + FIT_FPGA_PROP); + if (count < 0) { +- debug("FPGA: Invalid configuration format for FPGA node.\n"); ++printf("FPGA: Invalid configuration format for FPGA node.\n"); + return count; + } +- debug("FPGA: FPGA node count: %d\n", count); ++printf("FPGA: FPGA node count: %d\n", count); + + for (i = 0; i < count; i++) { + images_noffset = fit_conf_get_prop_node_index(buffer_p, +@@ -600,7 +600,7 @@ static int first_loading_rbf_to_buffer(struct udevice *dev, + FIT_FPGA_PROP, i); + uname = fit_get_name(buffer_p, images_noffset, NULL); + if (uname) { +- debug("FPGA: %s\n", uname); ++printf("FPGA: %s\n", uname); + + if (strstr(uname, "fpga-periph") && + (!is_fpgamgr_early_user_mode() || +@@ -622,20 +622,20 @@ static int first_loading_rbf_to_buffer(struct udevice *dev, + } + + if (!fpga_node_name) { +- debug("FPGA: No suitable bitstream was found, count: %d.\n", i); ++printf("FPGA: No suitable bitstream was found, count: %d.\n", i); + return 1; + } + + images_noffset = fit_image_get_node(buffer_p, fpga_node_name); + if (images_noffset < 0) { +- debug("FPGA: No node '%s' was found in FIT.\n", ++printf("FPGA: No node '%s' was found in FIT.\n", + fpga_node_name); + return -ENOENT; + } + + if (!fit_image_get_data_position(buffer_p, images_noffset, + &rbf_offset)) { +- debug("FPGA: Data position was found.\n"); ++printf("FPGA: Data position was found.\n"); + } else if (!fit_image_get_data_offset(buffer_p, images_noffset, + &rbf_offset)) { + /* +@@ -644,38 +644,38 @@ static int first_loading_rbf_to_buffer(struct udevice *dev, + * for the data-offset properties in each image. + */ + rbf_offset += ((fdt_totalsize(buffer_p) + 3) & ~3); +- debug("FPGA: Data offset was found.\n"); ++printf("FPGA: Data offset was found.\n"); + } else { +- debug("FPGA: No data position/offset was found.\n"); ++printf("FPGA: No data position/offset was found.\n"); + return -ENOENT; + } + + ret = fit_image_get_data_size(buffer_p, images_noffset, &rbf_size); + if (ret < 0) { +- debug("FPGA: No data size was found (err=%d).\n", ret); ++printf("FPGA: No data size was found (err=%d).\n", ret); + return -ENOENT; + } + + if (gd->ram_size < rbf_size) { +- debug("FPGA: Using default OCRAM buffer and size.\n"); ++printf("FPGA: Using default OCRAM buffer and size.\n"); + } else { + ret = fit_image_get_load(buffer_p, images_noffset, + (ulong *)loadable); + if (ret < 0) { + buffer_p = (u32 *)DEFAULT_DDR_LOAD_ADDRESS; +- debug("FPGA: No loadable was found.\n"); +- debug("FPGA: Using default DDR load address: 0x%x .\n", ++printf("FPGA: No loadable was found.\n"); ++printf("FPGA: Using default DDR load address: 0x%x .\n", + DEFAULT_DDR_LOAD_ADDRESS); + } else { + buffer_p = (u32 *)*loadable; +- debug("FPGA: Found loadable address = 0x%x.\n", ++printf("FPGA: Found loadable address = 0x%x.\n", + *loadable); + } + + buffer_size = rbf_size; + } + +- debug("FPGA: External data: offset = 0x%x, size = 0x%x.\n", ++printf("FPGA: External data: offset = 0x%x, size = 0x%x.\n", + rbf_offset, rbf_size); + + fpga_loadfs->remaining = rbf_size; +@@ -700,7 +700,7 @@ static int first_loading_rbf_to_buffer(struct udevice *dev, + buffer_p, buffer_size, + fpga_loadfs->offset); + if (ret < 0) { +- debug("FPGA: Failed to read bitstream from flash.\n"); ++printf("FPGA: Failed to read bitstream from flash.\n"); + return -ENOENT; + } + +@@ -739,7 +739,7 @@ static int subsequent_loading_rbf_to_buffer(struct udevice *dev, + buffer_p, *buffer_bsize, + fpga_loadfs->offset); + if (ret < 0) { +- debug("FPGA: Failed to read bitstream from flash.\n"); ++printf("FPGA: Failed to read bitstream from flash.\n"); + return -ENOENT; + } + +@@ -770,20 +770,20 @@ int socfpga_loadfs(fpga_fs_info *fpga_fsinfo, const void *buf, size_t bsize, + if (!phandle_p) { + node = ofnode_path("/chosen"); + if (!ofnode_valid(node)) { +- debug("FPGA: /chosen node was not found.\n"); ++printf("FPGA: /chosen node was not found.\n"); + return -ENOENT; + } + + phandle_p = ofnode_get_property(node, "firmware-loader", + &size); + if (!phandle_p) { +- debug("FPGA: firmware-loader property was not"); +- debug(" found.\n"); ++printf("FPGA: firmware-loader property was not"); ++printf(" found.\n"); + return -ENOENT; + } + } + } else { +- debug("FPGA: FPGA manager node was not found.\n"); ++printf("FPGA: FPGA manager node was not found.\n"); + return -ENOENT; + } + +@@ -815,8 +815,8 @@ int socfpga_loadfs(fpga_fs_info *fpga_fsinfo, const void *buf, size_t bsize, + + if (fpga_loadfs.rbfinfo.section == core_section && + !(is_fpgamgr_early_user_mode() && !is_fpgamgr_user_mode())) { +- debug("FPGA : Must be in Early Release mode to program "); +- debug("core bitstream.\n"); ++printf("FPGA : Must be in Early Release mode to program "); ++printf("core bitstream.\n"); + return -EPERM; + } + +@@ -830,7 +830,7 @@ int socfpga_loadfs(fpga_fs_info *fpga_fsinfo, const void *buf, size_t bsize, + /* Initialize the FPGA Manager */ + status = fpgamgr_program_init((u32 *)buffer, buffer_sizebytes); + if (status) { +- debug("FPGA: Init with peripheral bitstream failed.\n"); ++printf("FPGA: Init with peripheral bitstream failed.\n"); + return -EPERM; + } + } +@@ -863,7 +863,7 @@ int socfpga_loadfs(fpga_fs_info *fpga_fsinfo, const void *buf, size_t bsize, + config_pins(gd->fdt_blob, "shared"); + puts("FPGA: Early Release Succeeded.\n"); + } else { +- debug("FPGA: Failed to see Early Release.\n"); ++printf("FPGA: Failed to see Early Release.\n"); + return -EIO; + } + +@@ -886,7 +886,7 @@ int socfpga_loadfs(fpga_fs_info *fpga_fsinfo, const void *buf, size_t bsize, + config_pins(gd->fdt_blob, "fpga"); + puts("FPGA: Enter user mode.\n"); + } else { +- debug("FPGA: Config Error: Unsupported bitstream type.\n"); ++printf("FPGA: Config Error: Unsupported bitstream type.\n"); + return -ENOEXEC; + } + +@@ -930,8 +930,8 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) + + if (rbfinfo.section == core_section && + !(is_fpgamgr_early_user_mode() && !is_fpgamgr_user_mode())) { +- debug("FPGA : Must be in early release mode to program "); +- debug("core bitstream.\n"); ++printf("FPGA : Must be in early release mode to program "); ++printf("core bitstream.\n"); + return -EPERM; + } + +diff --git a/drivers/fpga/stratixv.c b/drivers/fpga/stratixv.c +index abae3b5b7..211f64611 100644 +--- a/drivers/fpga/stratixv.c ++++ b/drivers/fpga/stratixv.c +@@ -18,7 +18,7 @@ static int program_write(int spi_bus, int spi_dev, const void *rbf_data, + struct spi_slave *slave; + int ret; + +- debug("%s (%d): data=%p size=%ld\n", ++printf("%s (%d): data=%p size=%ld\n", + __func__, __LINE__, rbf_data, rbf_size); + + /* FIXME: How to get the max. SPI clock and SPI mode? */ +diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c +index c44a7d345..0d38d13f9 100644 +--- a/drivers/fpga/versalpl.c ++++ b/drivers/fpga/versalpl.c +@@ -36,7 +36,7 @@ static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize, + + bin_buf = versal_align_dma_buffer((ulong *)buf, bsize); + +- debug("%s called!\n", __func__); ++printf("%s called!\n", __func__); + flush_dcache_range(bin_buf, bin_buf + bsize); + + buf_lo = lower_32_bits(bin_buf); +diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c +index cbebefb55..3532060b5 100644 +--- a/drivers/fpga/xilinx.c ++++ b/drivers/fpga/xilinx.c +@@ -62,7 +62,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size, + length = (*dataptr << 8) + *(dataptr + 1); + dataptr += 2; + if (*dataptr++ != 0x61) { +- debug("%s: Design name id not recognized in bitstream\n", ++printf("%s: Design name id not recognized in bitstream\n", + __func__); + return FPGA_FAIL; + } +diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c +index 6b394869d..e47c3d20e 100644 +--- a/drivers/fpga/zynqmppl.c ++++ b/drivers/fpga/zynqmppl.c +@@ -79,7 +79,7 @@ static u32 check_header(const void *buf) + int swap = SWAP_NO; + u32 *test = (u32 *)buf; + +- debug("%s: Let's check bitstream header\n", __func__); ++printf("%s: Let's check bitstream header\n", __func__); + + /* Checking that passing bin is not a bitstream */ + for (i = 0; i < ARRAY_SIZE(bin_format); i++) { +@@ -94,13 +94,13 @@ static u32 check_header(const void *buf) + if ((__swab32(pattern) != DUMMY_WORD) && + (__swab32(pattern) == bin_format[i])) { + swap = SWAP_DONE; +- debug("%s: data swapped - let's swap\n", __func__); ++printf("%s: data swapped - let's swap\n", __func__); + } + +- debug("%s: %d/%px: pattern %x/%x bin_format\n", __func__, i, ++printf("%s: %d/%px: pattern %x/%x bin_format\n", __func__, i, + &test[i], pattern, bin_format[i]); + } +- debug("%s: Found bitstream header at %px %s swapinng\n", __func__, ++printf("%s: Found bitstream header at %px %s swapinng\n", __func__, + buf, swap == SWAP_NO ? "without" : "with"); + + return swap; +@@ -113,11 +113,11 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap) + /* Because buf doesn't need to be aligned let's read it by chars */ + for (p = 0; p < bsize; p++) { + word = load_word(&buf[p], SWAP_NO); +- debug("%s: word %x %x/%px\n", __func__, word, p, &buf[p]); ++printf("%s: word %x %x/%px\n", __func__, word, p, &buf[p]); + + /* Find the first bitstream dummy word */ + if (word == DUMMY_WORD) { +- debug("%s: Found dummy word at position %x/%px\n", ++printf("%s: Found dummy word at position %x/%px\n", + __func__, p, &buf[p]); + *swap = check_header(&buf[p]); + if (*swap) { +@@ -145,7 +145,7 @@ static ulong zynqmp_align_dma_buffer(u32 *buf, u32 len, u32 swap) + * ARCH_DMA_MINALIGN is greater than header size + */ + if (new_buf > (u32 *)buf) { +- debug("%s: Aligned buffer is after buffer start\n", ++printf("%s: Aligned buffer is after buffer start\n", + __func__); + new_buf -= ARCH_DMA_MINALIGN; + } +@@ -225,7 +225,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize, + + bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap); + +- debug("%s called!\n", __func__); ++printf("%s called!\n", __func__); + flush_dcache_range(bin_buf, bin_buf + bsize); + + buf_lo = (u32)bin_buf; +diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c +index 2de40109a..4a0c2ec12 100644 +--- a/drivers/fpga/zynqpl.c ++++ b/drivers/fpga/zynqpl.c +@@ -97,7 +97,7 @@ static u32 check_header(const void *buf) + int swap = SWAP_NO; + u32 *test = (u32 *)buf; + +- debug("%s: Let's check bitstream header\n", __func__); ++printf("%s: Let's check bitstream header\n", __func__); + + /* Checking that passing bin is not a bitstream */ + for (i = 0; i < ARRAY_SIZE(bin_format); i++) { +@@ -113,17 +113,17 @@ static u32 check_header(const void *buf) + (__swab32(pattern) == bin_format[i])) { + pattern = __swab32(pattern); + swap = SWAP_DONE; +- debug("%s: data swapped - let's swap\n", __func__); ++printf("%s: data swapped - let's swap\n", __func__); + } + +- debug("%s: %d/%x: pattern %x/%x bin_format\n", __func__, i, ++printf("%s: %d/%x: pattern %x/%x bin_format\n", __func__, i, + (u32)&test[i], pattern, bin_format[i]); + if (pattern != bin_format[i]) { +- debug("%s: Bitstream is not recognized\n", __func__); ++printf("%s: Bitstream is not recognized\n", __func__); + return 0; + } + } +- debug("%s: Found bitstream header at %x %s swapinng\n", __func__, ++printf("%s: Found bitstream header at %x %s swapinng\n", __func__, + (u32)buf, swap == SWAP_NO ? "without" : "with"); + + return swap; +@@ -136,11 +136,11 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap) + /* Because buf doesn't need to be aligned let's read it by chars */ + for (p = 0; p < bsize; p++) { + word = load_word(&buf[p], SWAP_NO); +- debug("%s: word %x %x/%x\n", __func__, word, p, (u32)&buf[p]); ++printf("%s: word %x %x/%x\n", __func__, word, p, (u32)&buf[p]); + + /* Find the first bitstream dummy word */ + if (word == DUMMY_WORD) { +- debug("%s: Found dummy word at position %x/%x\n", ++printf("%s: Found dummy word at position %x/%x\n", + __func__, p, (u32)&buf[p]); + *swap = check_header(&buf[p]); + if (*swap) { +@@ -172,11 +172,11 @@ static int zynq_dma_transfer(u32 srcbuf, u32 srclen, u32 dstbuf, u32 dstlen) + ts = get_timer(0); + while (!(isr_status & DEVCFG_ISR_DMA_DONE)) { + if (isr_status & DEVCFG_ISR_ERROR_FLAGS_MASK) { +- debug("%s: Error: isr = 0x%08X\n", __func__, ++printf("%s: Error: isr = 0x%08X\n", __func__, + isr_status); +- debug("%s: Write count = 0x%08X\n", __func__, ++printf("%s: Write count = 0x%08X\n", __func__, + readl(&devcfg_base->write_count)); +- debug("%s: Read count = 0x%08X\n", __func__, ++printf("%s: Read count = 0x%08X\n", __func__, + readl(&devcfg_base->read_count)); + + return FPGA_FAIL; +@@ -189,7 +189,7 @@ static int zynq_dma_transfer(u32 srcbuf, u32 srclen, u32 dstbuf, u32 dstlen) + isr_status = readl(&devcfg_base->int_sts); + } + +- debug("%s: DMA transfer is done\n", __func__); ++printf("%s: DMA transfer is done\n", __func__); + + /* Clear out the DMA status */ + writel(DEVCFG_ISR_DMA_DONE, &devcfg_base->int_sts); +@@ -260,7 +260,7 @@ static int zynq_dma_xfer_init(bitstream_type bstype) + writel(0xFFFFFFFF, &devcfg_base->int_sts); + + if (isr_status & DEVCFG_ISR_FATAL_ERROR_MASK) { +- debug("%s: Fatal errors in PCAP 0x%X\n", __func__, isr_status); ++printf("%s: Fatal errors in PCAP 0x%X\n", __func__, isr_status); + + /* If RX FIFO overflow, need to flush RX FIFO first */ + if (isr_status & DEVCFG_ISR_RX_FIFO_OV) { +@@ -272,19 +272,19 @@ static int zynq_dma_xfer_init(bitstream_type bstype) + + status = readl(&devcfg_base->status); + +- debug("%s: Status = 0x%08X\n", __func__, status); ++printf("%s: Status = 0x%08X\n", __func__, status); + + if (status & DEVCFG_STATUS_DMA_CMD_Q_F) { +- debug("%s: Error: device busy\n", __func__); ++printf("%s: Error: device busy\n", __func__); + return FPGA_FAIL; + } + +- debug("%s: Device ready\n", __func__); ++printf("%s: Device ready\n", __func__); + + if (!(status & DEVCFG_STATUS_DMA_CMD_Q_E)) { + if (!(readl(&devcfg_base->int_sts) & DEVCFG_ISR_DMA_DONE)) { + /* Error state, transfer cannot occur */ +- debug("%s: ISR indicates error\n", __func__); ++printf("%s: ISR indicates error\n", __func__); + return FPGA_FAIL; + } else { + /* Clear out the status */ +@@ -313,7 +313,7 @@ static u32 *zynq_align_dma_buffer(u32 *buf, u32 len, u32 swap) + * ARCH_DMA_MINALIGN is greater than header size + */ + if (new_buf > buf) { +- debug("%s: Aligned buffer is after buffer start\n", ++printf("%s: Aligned buffer is after buffer start\n", + __func__); + new_buf = (u32 *)((u32)new_buf - ARCH_DMA_MINALIGN); + } +@@ -386,8 +386,8 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize, + + buf = zynq_align_dma_buffer((u32 *)buf, bsize, swap); + +- debug("%s: Source = 0x%08X\n", __func__, (u32)buf); +- debug("%s: Size = %zu\n", __func__, bsize); ++printf("%s: Source = 0x%08X\n", __func__, (u32)buf); ++printf("%s: Size = %zu\n", __func__, bsize); + + /* flush(clean & invalidate) d-cache range buf */ + flush_dcache_range((u32)buf, (u32)buf + +@@ -408,7 +408,7 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize, + isr_status = readl(&devcfg_base->int_sts); + } + +- debug("%s: FPGA config done\n", __func__); ++printf("%s: FPGA config done\n", __func__); + + if (bstype != BIT_PARTIAL) + zynq_slcr_devcfg_enable(); +@@ -491,7 +491,7 @@ static int zynq_loadfs(xilinx_desc *desc, const void *buf, size_t bsize, + isr_status = readl(&devcfg_base->int_sts); + } + +- debug("%s: FPGA config done\n", __func__); ++printf("%s: FPGA config done\n", __func__); + + if (!partialbit) + zynq_slcr_devcfg_enable(); +@@ -538,8 +538,8 @@ int zynq_decrypt_load(u32 srcaddr, u32 srclen, u32 dstaddr, u32 dstlen, + writel((readl(&devcfg_base->ctrl) | DEVCFG_CTRL_PCAP_RATE_EN_MASK), + &devcfg_base->ctrl); + +- debug("%s: Source = 0x%08X\n", __func__, (u32)srcaddr); +- debug("%s: Size = %zu\n", __func__, srclen); ++printf("%s: Source = 0x%08X\n", __func__, (u32)srcaddr); ++printf("%s: Size = %zu\n", __func__, srclen); + + /* flush(clean & invalidate) d-cache range buf */ + flush_dcache_range((u32)srcaddr, (u32)srcaddr + +diff --git a/drivers/gpio/cortina_gpio.c b/drivers/gpio/cortina_gpio.c +index 72ef523be..ccb51b6f5 100644 +--- a/drivers/gpio/cortina_gpio.c ++++ b/drivers/gpio/cortina_gpio.c +@@ -93,7 +93,7 @@ static int ca_gpio_probe(struct udevice *dev) + uc_priv->gpio_count = dev_read_u32_default(dev, "ngpios", 32); + uc_priv->bank_name = dev->name; + +- debug("Done Cortina GPIO init\n"); ++printf("Done Cortina GPIO init\n"); + return 0; + } + +diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c +index e6e919444..97d4c1fcf 100644 +--- a/drivers/gpio/dwapb_gpio.c ++++ b/drivers/gpio/dwapb_gpio.c +@@ -168,7 +168,7 @@ static int gpio_dwapb_bind(struct udevice *dev) + + base = dev_read_addr(dev); + if (base == FDT_ADDR_T_NONE) { +- debug("Can't get the GPIO register base address\n"); ++printf("Can't get the GPIO register base address\n"); + return -ENXIO; + } + +diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c +index 131099cc1..fcda3a720 100644 +--- a/drivers/gpio/gpio-uclass.c ++++ b/drivers/gpio/gpio-uclass.c +@@ -284,7 +284,7 @@ static int gpio_hog_probe(struct udevice *dev) + plat->val[0], plat->gpiod_flags, + plat->val[1], &priv->gpiod); + if (ret < 0) { +- debug("%s: node %s could not get gpio.\n", __func__, ++printf("%s: node %s could not get gpio.\n", __func__, + dev->name); + return ret; + } +@@ -292,7 +292,7 @@ static int gpio_hog_probe(struct udevice *dev) + if (plat->gpiod_flags == GPIOD_IS_OUT) { + ret = dm_gpio_set_value(&priv->gpiod, plat->value); + if (ret < 0) { +- debug("%s: node %s could not set gpio.\n", __func__, ++printf("%s: node %s could not set gpio.\n", __func__, + dev->name); + return ret; + } +@@ -1105,20 +1105,20 @@ static int gpio_request_tail(int ret, const char *nodename, + ret = uclass_get_device_by_ofnode(UCLASS_GPIO, args->node, + &desc->dev); + if (ret) { +- debug("%s: uclass_get_device_by_ofnode failed\n", ++printf("%s: uclass_get_device_by_ofnode failed\n", + __func__); + goto err; + } + } + ret = gpio_find_and_xlate(desc, args); + if (ret) { +- debug("%s: gpio_find_and_xlate failed\n", __func__); ++printf("%s: gpio_find_and_xlate failed\n", __func__); + goto err; + } + ret = dm_gpio_requestf(desc, add_index ? "%s.%s%d" : "%s.%s", + nodename, list_name, index); + if (ret) { +- debug("%s: dm_gpio_requestf failed\n", __func__); ++printf("%s: dm_gpio_requestf failed\n", __func__); + goto err; + } + +@@ -1126,13 +1126,13 @@ static int gpio_request_tail(int ret, const char *nodename, + ret = dm_gpio_set_dir_flags(desc, + flags | (desc->flags & GPIOD_MASK_DIR)); + if (ret) { +- debug("%s: dm_gpio_set_dir failed\n", __func__); ++printf("%s: dm_gpio_set_dir failed\n", __func__); + goto err; + } + + return 0; + err: +- debug("%s: Node '%s', property '%s', failed to request GPIO index %d: %d\n", ++printf("%s: Node '%s', property '%s', failed to request GPIO index %d: %d\n", + __func__, nodename, list_name, index, ret); + return ret; + } +@@ -1218,7 +1218,7 @@ int gpio_get_list_count(struct udevice *dev, const char *list_name) + ret = dev_count_phandle_with_args(dev, list_name, "#gpio-cells", + -ENOENT); + if (ret < 0) { +- debug("%s: Node '%s', property '%s', GPIO count failed: %d\n", ++printf("%s: Node '%s', property '%s', GPIO count failed: %d\n", + __func__, dev->name, list_name, ret); + } + +diff --git a/drivers/gpio/intel_broadwell_gpio.c b/drivers/gpio/intel_broadwell_gpio.c +index 20af35de2..4f4a9ecaa 100644 +--- a/drivers/gpio/intel_broadwell_gpio.c ++++ b/drivers/gpio/intel_broadwell_gpio.c +@@ -46,13 +46,13 @@ static int broadwell_gpio_request(struct udevice *dev, unsigned offset, + * built-in hardware function. We have to check this for every + * requested pin. + */ +- debug("%s: request bank %d offset %d: ", __func__, priv->bank, offset); ++printf("%s: request bank %d offset %d: ", __func__, priv->bank, offset); + val = inl(®s->own[priv->bank]); + if (!(val & (1UL << offset))) { +- debug("gpio is reserved for internal use\n"); ++printf("gpio is reserved for internal use\n"); + return -EPERM; + } +- debug("ok\n"); ++printf("ok\n"); + + return 0; + } +@@ -82,7 +82,7 @@ static int broadwell_gpio_set_value(struct udevice *dev, unsigned offset, + struct broadwell_bank_priv *priv = dev_get_priv(dev); + struct pch_lp_gpio_regs *regs = priv->regs; + +- debug("%s: dev=%s, offset=%d, value=%d\n", __func__, dev->name, offset, ++printf("%s: dev=%s, offset=%d, value=%d\n", __func__, dev->name, offset, + value); + clrsetio_32(®s->config[priv->offset + offset], CONFA_OUTPUT_HIGH, + value ? CONFA_OUTPUT_HIGH : 0); +@@ -126,7 +126,7 @@ static int broadwell_gpio_probe(struct udevice *dev) + + /* Set up pin control if available */ + ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &pinctrl); +- debug("%s, pinctrl=%p, ret=%d\n", __func__, pinctrl, ret); ++printf("%s, pinctrl=%p, ret=%d\n", __func__, pinctrl, ret); + + uc_priv->gpio_count = GPIO_PER_BANK; + uc_priv->bank_name = plat->bank_name; +@@ -134,7 +134,7 @@ static int broadwell_gpio_probe(struct udevice *dev) + priv->regs = (struct pch_lp_gpio_regs *)(uintptr_t)plat->base_addr; + priv->bank = plat->bank; + priv->offset = priv->bank * 32; +- debug("%s: probe done, regs %p, bank %d\n", __func__, priv->regs, ++printf("%s: probe done, regs %p, bank %d\n", __func__, priv->regs, + priv->bank); + + return 0; +@@ -153,7 +153,7 @@ static int broadwell_gpio_of_to_plat(struct udevice *dev) + + bank = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "reg", -1); + if (bank == -1) { +- debug("%s: Invalid bank number %d\n", __func__, bank); ++printf("%s: Invalid bank number %d\n", __func__, bank); + return -EINVAL; + } + plat->bank = bank; +diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c +index 63a07b959..8a914e814 100644 +--- a/drivers/gpio/intel_ich6_gpio.c ++++ b/drivers/gpio/intel_ich6_gpio.c +@@ -107,7 +107,7 @@ static int gpio_ich6_of_to_plat(struct udevice *dev) + + offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "reg", -1); + if (offset == -1) { +- debug("%s: Invalid register offset %d\n", __func__, offset); ++printf("%s: Invalid register offset %d\n", __func__, offset); + return -EINVAL; + } + plat->offset = offset; +@@ -155,7 +155,7 @@ static int ich6_gpio_request(struct udevice *dev, unsigned offset, + */ + tmplong = inl(bank->use_sel); + if (!(tmplong & (1UL << offset))) { +- debug("%s: gpio %d is reserved for internal use\n", __func__, ++printf("%s: gpio %d is reserved for internal use\n", __func__, + offset); + return -EPERM; + } +diff --git a/drivers/gpio/iproc_gpio.c b/drivers/gpio/iproc_gpio.c +index 8c143e9b7..a8e50f66c 100644 +--- a/drivers/gpio/iproc_gpio.c ++++ b/drivers/gpio/iproc_gpio.c +@@ -227,7 +227,7 @@ static int iproc_gpio_of_to_plat(struct udevice *dev) + + plat->base = dev_read_addr_ptr(dev); + if (!plat->base) { +- debug("%s: Failed to get base address\n", __func__); ++printf("%s: Failed to get base address\n", __func__); + return -EINVAL; + } + +diff --git a/drivers/gpio/mpc83xx_spisel_boot.c b/drivers/gpio/mpc83xx_spisel_boot.c +index fd26a36a0..dc84b16f6 100644 +--- a/drivers/gpio/mpc83xx_spisel_boot.c ++++ b/drivers/gpio/mpc83xx_spisel_boot.c +@@ -32,7 +32,7 @@ static int mpc83xx_spisel_boot_set_value(struct udevice *dev, uint gpio, int val + { + struct mpc83xx_spisel_boot *data = dev_get_priv(dev); + +- debug("%s: gpio=%d, value=%u, gpio_mask=0x%08x\n", __func__, ++printf("%s: gpio=%d, value=%u, gpio_mask=0x%08x\n", __func__, + gpio, value, gpio_mask(gpio)); + + if (value) +diff --git a/drivers/gpio/mscc_sgpio.c b/drivers/gpio/mscc_sgpio.c +index 1cbcc4348..c6892a829 100644 +--- a/drivers/gpio/mscc_sgpio.c ++++ b/drivers/gpio/mscc_sgpio.c +@@ -123,7 +123,7 @@ static int mscc_sgpio_direction_output(struct udevice *dev, + u32 bit = gpio / MSCC_SGPIOS_PER_BANK; + u32 mask = 3 << (3 * bit); + +- debug("set: port %d, bit %d, mask 0x%08x, value %d\n", ++printf("set: port %d, bit %d, mask 0x%08x, value %d\n", + port, bit, mask, value); + + value = (value & 3) << (3 * bit); +@@ -170,7 +170,7 @@ static int mscc_sgpio_get_value(struct udevice *dev, unsigned int gpio) + ret = !!(ret & (3 << (3 * bit))); + } + +- debug("get: gpio %d, port %d, bit %d, value %d\n", ++printf("get: gpio %d, port %d, bit %d, value %d\n", + gpio, port, bit, ret); + return ret; + } +@@ -229,7 +229,7 @@ static int mscc_sgpio_probe(struct udevice *dev) + } + priv->bitcount = DIV_ROUND_UP(uc_priv->gpio_count, + MSCC_SGPIOS_PER_BANK); +- debug("probe: gpios = %d, bit-count = %d\n", ++printf("probe: gpios = %d, bit-count = %d\n", + uc_priv->gpio_count, priv->bitcount); + + priv->regs = (u32 __iomem *)dev_read_addr(dev); +@@ -240,7 +240,7 @@ static int mscc_sgpio_probe(struct udevice *dev) + MSCC_F_CFG_SIO_PORT_WIDTH(priv, priv->bitcount - 1) | + MSCC_M_CFG_SIO_AUTO_REPEAT(priv)); + val = div_clock / priv->clock; +- debug("probe: div-clock = %d KHz, freq = %d KHz, div = %d\n", ++printf("probe: div-clock = %d KHz, freq = %d KHz, div = %d\n", + div_clock / 1000, priv->clock / 1000, val); + sgpio_clrsetbits(priv, REG_SIO_CLOCK, 0, + MSCC_M_CLOCK_SIO_CLK_FREQ(priv), +@@ -250,7 +250,7 @@ static int mscc_sgpio_probe(struct udevice *dev) + sgpio_writel(priv, 0, REG_PORT_CONFIG, port); + sgpio_writel(priv, priv->ports, REG_PORT_ENABLE, 0); + +- debug("probe: sgpio regs = %p\n", priv->regs); ++printf("probe: sgpio regs = %p\n", priv->regs); + + return 0; + } +diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c +index 5775a22ab..05b9811ec 100644 +--- a/drivers/gpio/mxs_gpio.c ++++ b/drivers/gpio/mxs_gpio.c +@@ -256,7 +256,7 @@ static int mxs_gpio_probe(struct udevice *dev) + + uc_priv->bank_name = str; + +- debug("%s: %s: %d pins base: 0x%x\n", __func__, uc_priv->bank_name, ++printf("%s: %s: %d pins base: 0x%x\n", __func__, uc_priv->bank_name, + uc_priv->gpio_count, priv->bank); + + return 0; +diff --git a/drivers/gpio/octeon_gpio.c b/drivers/gpio/octeon_gpio.c +index 42eae79d8..0ed1eb46c 100644 +--- a/drivers/gpio/octeon_gpio.c ++++ b/drivers/gpio/octeon_gpio.c +@@ -83,7 +83,7 @@ static int octeon_gpio_dir_input(struct udevice *dev, unsigned int offset) + { + struct octeon_gpio *gpio = dev_get_priv(dev); + +- debug("%s(%s, %u)\n", __func__, dev->name, offset); ++printf("%s(%s, %u)\n", __func__, dev->name, offset); + clrbits_64(gpio->base + gpio->data->gpio_bit_cfg_offs + 8 * offset, + GPIO_BIT_CFG_TX_OE | GPIO_BIT_CFG_PIN_XOR | + GPIO_BIT_CFG_INT_EN | GPIO_BIT_CFG_PIN_SEL_MASK); +@@ -96,7 +96,7 @@ static int octeon_gpio_dir_output(struct udevice *dev, unsigned int offset, + { + struct octeon_gpio *gpio = dev_get_priv(dev); + +- debug("%s(%s, %u, %d)\n", __func__, dev->name, offset, value); ++printf("%s(%s, %u, %d)\n", __func__, dev->name, offset, value); + writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs + + gpio_tx_reg(offset, value)); + +@@ -113,7 +113,7 @@ static int octeon_gpio_get_value(struct udevice *dev, unsigned int offset) + u64 reg = readq(gpio->base + gpio->data->reg_offs + + gpio_rx_dat_reg(offset)); + +- debug("%s(%s, %u): value: %d\n", __func__, dev->name, offset, ++printf("%s(%s, %u): value: %d\n", __func__, dev->name, offset, + !!(reg & GPIO_BIT(offset))); + + return !!(reg & GPIO_BIT(offset)); +@@ -124,7 +124,7 @@ static int octeon_gpio_set_value(struct udevice *dev, + { + struct octeon_gpio *gpio = dev_get_priv(dev); + +- debug("%s(%s, %u, %d)\n", __func__, dev->name, offset, value); ++printf("%s(%s, %u, %d)\n", __func__, dev->name, offset, value); + writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs + + gpio_tx_reg(offset, value)); + +@@ -138,7 +138,7 @@ static int octeon_gpio_get_function(struct udevice *dev, unsigned int offset) + 8 * offset); + int pin_sel; + +- debug("%s(%s, %u): GPIO_BIT_CFG: 0x%llx\n", __func__, dev->name, ++printf("%s(%s, %u): GPIO_BIT_CFG: 0x%llx\n", __func__, dev->name, + offset, val); + pin_sel = FIELD_GET(GPIO_BIT_CFG_PIN_SEL_MASK, val); + if (pin_sel) +@@ -195,7 +195,7 @@ static int octeon_gpio_probe(struct udevice *dev) + } + + if (!priv->base) { +- debug("%s(%s): Could not get base address\n", ++printf("%s(%s): Could not get base address\n", + __func__, dev->name); + return -ENODEV; + } +@@ -205,7 +205,7 @@ static int octeon_gpio_probe(struct udevice *dev) + end[0] = 'A' + dev_seq(dev); + end[1] = '\0'; + +- debug("%s(%s): base address: %p, pin count: %d\n", ++printf("%s(%s): base address: %p, pin count: %d\n", + __func__, dev->name, priv->base, uc_priv->gpio_count); + + return 0; +diff --git a/drivers/gpio/pcf8575_gpio.c b/drivers/gpio/pcf8575_gpio.c +index 359646266..15b8a73d1 100644 +--- a/drivers/gpio/pcf8575_gpio.c ++++ b/drivers/gpio/pcf8575_gpio.c +@@ -152,7 +152,7 @@ static int pcf8575_gpio_probe(struct udevice *dev) + { + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + +- debug("%s GPIO controller with %d gpios probed\n", ++printf("%s GPIO controller with %d gpios probed\n", + uc_priv->bank_name, uc_priv->gpio_count); + + return 0; +diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c +index 76f35ac5d..d77d48ce1 100644 +--- a/drivers/gpio/s5p_gpio.c ++++ b/drivers/gpio/s5p_gpio.c +@@ -56,12 +56,12 @@ static struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned int gpio) + upto = 0; + + for (i = 0; i < count; i++) { +- debug("i=%d, upto=%d\n", i, upto); ++printf("i=%d, upto=%d\n", i, upto); + if (gpio < data->max_gpio) { + struct s5p_gpio_bank *bank; + bank = (struct s5p_gpio_bank *)data->reg_addr; + bank += (gpio - upto) / GPIO_PER_BANK; +- debug("gpio=%d, bank=%p\n", gpio, bank); ++printf("gpio=%d, bank=%p\n", gpio, bank); + return bank; + } + +@@ -344,7 +344,7 @@ static int gpio_exynos_bind(struct udevice *parent) + + plat->bank = bank; + +- debug("dev at %p: %s\n", bank, plat->bank_name); ++printf("dev at %p: %s\n", bank, plat->bank_name); + } + + return 0; +diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c +index d008fdd22..2378cebb4 100644 +--- a/drivers/gpio/sandbox.c ++++ b/drivers/gpio/sandbox.c +@@ -78,7 +78,7 @@ int sandbox_gpio_get_value(struct udevice *dev, unsigned offset) + bool val; + + if (get_gpio_flag(dev, offset, GPIOD_IS_OUT)) +- debug("sandbox_gpio: get_value on output gpio %u\n", offset); ++printf("sandbox_gpio: get_value on output gpio %u\n", offset); + + if (state->flags & GPIOD_EXT_DRIVEN) { + val = state->flags & GPIOD_EXT_HIGH; +@@ -137,7 +137,7 @@ int sandbox_gpio_set_flags(struct udevice *dev, uint offset, ulong flags) + /* set GPIO port 'offset' as an input */ + static int sb_gpio_direction_input(struct udevice *dev, unsigned offset) + { +- debug("%s: offset:%u\n", __func__, offset); ++printf("%s: offset:%u\n", __func__, offset); + + return sandbox_gpio_set_direction(dev, offset, 0); + } +@@ -148,7 +148,7 @@ static int sb_gpio_direction_output(struct udevice *dev, unsigned offset, + { + int ret; + +- debug("%s: offset:%u, value = %d\n", __func__, offset, value); ++printf("%s: offset:%u, value = %d\n", __func__, offset, value); + + ret = sandbox_gpio_set_direction(dev, offset, 1); + if (ret) +@@ -164,7 +164,7 @@ static int sb_gpio_direction_output(struct udevice *dev, unsigned offset, + /* read GPIO IN value of port 'offset' */ + static int sb_gpio_get_value(struct udevice *dev, unsigned offset) + { +- debug("%s: offset:%u\n", __func__, offset); ++printf("%s: offset:%u\n", __func__, offset); + + return sandbox_gpio_get_value(dev, offset); + } +@@ -174,7 +174,7 @@ static int sb_gpio_set_value(struct udevice *dev, unsigned offset, int value) + { + int ret; + +- debug("%s: offset:%u, value = %d\n", __func__, offset, value); ++printf("%s: offset:%u, value = %d\n", __func__, offset, value); + + if (!sandbox_gpio_get_direction(dev, offset)) { + printf("sandbox_gpio: error: set_value on input gpio %u\n", +@@ -225,7 +225,7 @@ static int sb_gpio_xlate(struct udevice *dev, struct gpio_desc *desc, + static int sb_gpio_set_flags(struct udevice *dev, unsigned int offset, + ulong flags) + { +- debug("%s: offset:%u, flags = %lx\n", __func__, offset, flags); ++printf("%s: offset:%u, flags = %lx\n", __func__, offset, flags); + struct gpio_state *state = get_gpio_state(dev, offset); + + if (flags & GPIOD_IS_OUT) { +@@ -244,7 +244,7 @@ static int sb_gpio_set_flags(struct udevice *dev, unsigned int offset, + + static int sb_gpio_get_flags(struct udevice *dev, uint offset, ulong *flagsp) + { +- debug("%s: offset:%u\n", __func__, offset); ++printf("%s: offset:%u\n", __func__, offset); + *flagsp = *get_gpio_flags(dev, offset) & ~GPIOD_SANDBOX_MASK; + + return 0; +diff --git a/drivers/gpio/sh_pfc.c b/drivers/gpio/sh_pfc.c +index 0653171af..f8bcd9c3e 100644 +--- a/drivers/gpio/sh_pfc.c ++++ b/drivers/gpio/sh_pfc.c +@@ -77,7 +77,7 @@ static int gpio_read_bit(struct pinmux_data_reg *dr, + + pos = dr->reg_width - (in_pos + 1); + +- debug("read_bit: addr = %lx, pos = %ld, r_width = %ld\n", ++printf("read_bit: addr = %lx, pos = %ld, r_width = %ld\n", + dr->reg + offset, pos, dr->reg_width); + + return (gpio_read_raw_reg(dr->mapped_reg + offset, +@@ -91,7 +91,7 @@ static void gpio_write_bit(struct pinmux_data_reg *dr, + + pos = dr->reg_width - (in_pos + 1); + +- debug("write_bit addr = %lx, value = %d, pos = %ld, " ++printf("write_bit addr = %lx, value = %d, pos = %ld, " + "r_width = %ld\n", + dr->reg, !!value, pos, dr->reg_width); + +@@ -139,7 +139,7 @@ static int read_config_reg(struct pinmux_info *gpioc, + + config_reg_helper(gpioc, crp, field, &mapped_reg, &mask, &pos); + +- debug("read_reg: addr = %lx, field = %ld, " ++printf("read_reg: addr = %lx, field = %ld, " + "r_width = %ld, f_width = %ld\n", + crp->reg, field, crp->reg_width, crp->field_width); + +@@ -155,7 +155,7 @@ static void write_config_reg(struct pinmux_info *gpioc, + + config_reg_helper(gpioc, crp, field, &mapped_reg, &mask, &pos); + +- debug("write_reg addr = %lx, value = %ld, field = %ld, " ++printf("write_reg addr = %lx, value = %ld, field = %ld, " + "r_width = %ld, f_width = %ld\n", + crp->reg, value, field, crp->reg_width, crp->field_width); + +@@ -300,7 +300,7 @@ static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio, + + if (!enum_in_range(enum_id, &gpioc->data)) { + if (!enum_in_range(enum_id, &gpioc->mark)) { +- debug("non data/mark enum_id for gpio %d\n", gpio); ++printf("non data/mark enum_id for gpio %d\n", gpio); + return -1; + } + } +@@ -317,7 +317,7 @@ static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio, + } + } + +- debug("cannot locate data/mark enum_id for gpio %d\n", gpio); ++printf("cannot locate data/mark enum_id for gpio %d\n", gpio); + return -1; + } + +@@ -590,7 +590,7 @@ int register_pinmux(struct pinmux_info *pip) + { + if (pip != NULL) { + gpioc = pip; +- debug("%s deregistering\n", pip->name); ++printf("%s deregistering\n", pip->name); + setup_data_regs(gpioc); + } + return 0; +@@ -598,7 +598,7 @@ int register_pinmux(struct pinmux_info *pip) + + int unregister_pinmux(struct pinmux_info *pip) + { +- debug("%s deregistering\n", pip->name); ++printf("%s deregistering\n", pip->name); + if (gpioc != pip) + return -1; + +diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c +index 5d3af8a01..198567226 100644 +--- a/drivers/gpio/tegra_gpio.c ++++ b/drivers/gpio/tegra_gpio.c +@@ -51,7 +51,7 @@ static int get_config(unsigned gpio) + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); + type = (u >> GPIO_BIT(gpio)) & 1; + +- debug("get_config: port = %d, bit = %d is %s\n", ++printf("get_config: port = %d, bit = %d is %s\n", + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO"); + + return type ? CONFIG_GPIO : CONFIG_SFIO; +@@ -64,7 +64,7 @@ static void set_config(unsigned gpio, int type) + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; + u32 u; + +- debug("set_config: port = %d, bit = %d, %s\n", ++printf("set_config: port = %d, bit = %d, %s\n", + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO"); + + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); +@@ -86,7 +86,7 @@ static int get_direction(unsigned gpio) + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); + dir = (u >> GPIO_BIT(gpio)) & 1; + +- debug("get_direction: port = %d, bit = %d, %s\n", ++printf("get_direction: port = %d, bit = %d, %s\n", + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN"); + + return dir ? DIRECTION_OUTPUT : DIRECTION_INPUT; +@@ -99,7 +99,7 @@ static void set_direction(unsigned gpio, int output) + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; + u32 u; + +- debug("set_direction: port = %d, bit = %d, %s\n", ++printf("set_direction: port = %d, bit = %d, %s\n", + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN"); + + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); +@@ -117,7 +117,7 @@ static void set_level(unsigned gpio, int high) + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; + u32 u; + +- debug("set_level: port = %d, bit %d == %d\n", ++printf("set_level: port = %d, bit %d == %d\n", + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high); + + u = readl(&bank->gpio_out[GPIO_PORT(gpio)]); +@@ -172,7 +172,7 @@ static int tegra_gpio_get_value(struct udevice *dev, unsigned offset) + int gpio = state->base_gpio + offset; + int val; + +- debug("%s: pin = %d (port %d:bit %d)\n", __func__, ++printf("%s: pin = %d (port %d:bit %d)\n", __func__, + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio)); + + if (get_direction(gpio) == DIRECTION_INPUT) +@@ -189,7 +189,7 @@ static int tegra_gpio_set_value(struct udevice *dev, unsigned offset, int value) + struct tegra_port_info *state = dev_get_priv(dev); + int gpio = state->base_gpio + offset; + +- debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n", ++printf("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n", + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value); + + /* Configure GPIO output value. */ +diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c +index 510838d2f..3232dd3ff 100644 +--- a/drivers/gpio/xilinx_gpio.c ++++ b/drivers/gpio/xilinx_gpio.c +@@ -44,7 +44,7 @@ static int xilinx_gpio_get_bank_pin(unsigned offset, u32 *bank_num, + for (bank = 0; bank < XILINX_GPIO_MAX_BANK; bank++) { + max_pins = plat->bank_max[bank]; + if (pin_num < max_pins) { +- debug("%s: found at bank 0x%x pin 0x%x\n", __func__, ++printf("%s: found at bank 0x%x pin 0x%x\n", __func__, + bank, pin_num); + *bank_num = bank; + *bank_pin_num = pin_num; +@@ -70,7 +70,7 @@ static int xilinx_gpio_set_value(struct udevice *dev, unsigned offset, + + val = priv->output_val[bank]; + +- debug("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x, out %x\n", ++printf("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x, out %x\n", + __func__, (ulong)plat->regs, value, offset, bank, pin, val); + + if (value) +@@ -96,14 +96,14 @@ static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset) + if (ret) + return ret; + +- debug("%s: regs: %lx, gpio: %x, bank %x, pin %x\n", __func__, ++printf("%s: regs: %lx, gpio: %x, bank %x, pin %x\n", __func__, + (ulong)plat->regs, offset, bank, pin); + + if (plat->bank_output[bank]) { +- debug("%s: Read saved output value\n", __func__); ++printf("%s: Read saved output value\n", __func__); + val = priv->output_val[bank]; + } else { +- debug("%s: Read input value from reg\n", __func__); ++printf("%s: Read input value from reg\n", __func__); + val = readl(&plat->regs->gpiodata + bank * 2); + } + +@@ -198,7 +198,7 @@ static int xilinx_gpio_xlate(struct udevice *dev, struct gpio_desc *desc, + + desc->offset = args->args[0]; + +- debug("%s: argc: %x, [0]: %x, [1]: %x, [2]: %x\n", __func__, ++printf("%s: argc: %x, [0]: %x, [1]: %x, [2]: %x\n", __func__, + args->args_count, args->args[0], args->args[1], args->args[2]); + + /* +@@ -223,7 +223,7 @@ static int xilinx_gpio_xlate(struct udevice *dev, struct gpio_desc *desc, + desc->flags = (args->args[2] & + GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0); + +- debug("%s: offset %x, flags %lx\n", ++printf("%s: offset %x, flags %lx\n", + __func__, desc->offset, desc->flags); + return 0; + } +diff --git a/drivers/hwspinlock/hwspinlock-uclass.c b/drivers/hwspinlock/hwspinlock-uclass.c +index 899724342..2f87200ef 100644 +--- a/drivers/hwspinlock/hwspinlock-uclass.c ++++ b/drivers/hwspinlock/hwspinlock-uclass.c +@@ -23,7 +23,7 @@ static int hwspinlock_of_xlate_default(struct hwspinlock *hws, + struct ofnode_phandle_args *args) + { + if (args->args_count > 1) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + +diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c +index 2d3fecaa1..107b009de 100644 +--- a/drivers/i2c/ast_i2c.c ++++ b/drivers/i2c/ast_i2c.c +@@ -98,7 +98,7 @@ static int ast_i2c_of_to_plat(struct udevice *dev) + + ret = clk_get_by_index(dev, 0, &priv->clk); + if (ret < 0) { +- debug("%s: Can't get clock for %s: %d\n", __func__, dev->name, ++printf("%s: Can't get clock for %s: %d\n", __func__, dev->name, + ret); + return ret; + } +@@ -110,7 +110,7 @@ static int ast_i2c_probe(struct udevice *dev) + { + struct ast2500_scu *scu; + +- debug("Enabling I2C%u\n", dev_seq(dev)); ++printf("Enabling I2C%u\n", dev_seq(dev)); + + /* + * Get all I2C devices out of Reset. +@@ -256,11 +256,11 @@ static int ast_i2c_deblock(struct udevice *dev) + return 0; + } else if (sda_high) { + /* Send stop command */ +- debug("Unterminated TXN in (%x), sending stop\n", csr); ++printf("Unterminated TXN in (%x), sending stop\n", csr); + ret = ast_i2c_send_stop(dev); + } else if (scl_high) { + /* Possibly stuck slave */ +- debug("Bus stuck (%x), attempting recovery\n", csr); ++printf("Bus stuck (%x), attempting recovery\n", csr); + writel(I2CD_BUS_RECOVER_CMD, ®s->csr); + ret = ast_i2c_wait_isr(dev, I2CD_INTR_BUS_RECOVER_DONE); + } else { +@@ -279,21 +279,21 @@ static int ast_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) + if (ret < 0) + return ret; + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + for (; nmsgs > 0; nmsgs--, msg++) { + if (msg->flags & I2C_M_RD) { +- debug("i2c_read: chip=0x%x, len=0x%x, flags=0x%x\n", ++printf("i2c_read: chip=0x%x, len=0x%x, flags=0x%x\n", + msg->addr, msg->len, msg->flags); + ret = ast_i2c_read_data(dev, msg->addr, msg->buf, + msg->len, (nmsgs == 1)); + } else { +- debug("i2c_write: chip=0x%x, len=0x%x, flags=0x%x\n", ++printf("i2c_write: chip=0x%x, len=0x%x, flags=0x%x\n", + msg->addr, msg->len, msg->flags); + ret = ast_i2c_write_data(dev, msg->addr, msg->buf, + msg->len, (nmsgs == 1)); + } + if (ret) { +- debug("%s: error (%d)\n", __func__, ret); ++printf("%s: error (%d)\n", __func__, ret); + return -EREMOTEIO; + } + } +@@ -307,9 +307,9 @@ static int ast_i2c_set_speed(struct udevice *dev, unsigned int speed) + struct ast_i2c_regs *regs = priv->regs; + ulong i2c_rate, divider; + +- debug("Setting speed for I2C%d to <%u>\n", dev_seq(dev), speed); ++printf("Setting speed for I2C%d to <%u>\n", dev_seq(dev), speed); + if (!speed) { +- debug("No valid speed specified\n"); ++printf("No valid speed specified\n"); + return -EINVAL; + } + +@@ -318,13 +318,13 @@ static int ast_i2c_set_speed(struct udevice *dev, unsigned int speed) + + priv->speed = speed; + if (speed > I2C_SPEED_FAST_RATE) { +- debug("Enable High Speed\n"); ++printf("Enable High Speed\n"); + setbits_le32(®s->fcr, I2CD_M_HIGH_SPEED_EN + | I2CD_M_SDA_DRIVE_1T_EN + | I2CD_SDA_DRIVE_1T_EN); + writel(HIGHSPEED_TTIMEOUT, ®s->cactcr2); + } else { +- debug("Enabling Normal Speed\n"); ++printf("Enabling Normal Speed\n"); + writel(I2CD_NO_TIMEOUT_CTRL, ®s->cactcr2); + } + +diff --git a/drivers/i2c/cros_ec_ldo.c b/drivers/i2c/cros_ec_ldo.c +index c593540ac..05821d72b 100644 +--- a/drivers/i2c/cros_ec_ldo.c ++++ b/drivers/i2c/cros_ec_ldo.c +@@ -28,13 +28,13 @@ static int cros_ec_ldo_xfer(struct udevice *dev, struct i2c_msg *msg, + * first message is a write with the register number as the first byte. + */ + if (!nmsgs || !msg->len || (msg->flags & I2C_M_RD)) { +- debug("%s: Invalid message\n", __func__); ++printf("%s: Invalid message\n", __func__); + goto err; + } + + fet_id = msg->buf[0] - REG_FET_BASE; + if (fet_id < 1 || fet_id > MAX_FET_NUM) { +- debug("%s: Invalid FET %d\n", __func__, fet_id); ++printf("%s: Invalid FET %d\n", __func__, fet_id); + goto err; + } + +diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c +index a4abd25c3..82d042d5f 100644 +--- a/drivers/i2c/davinci_i2c.c ++++ b/drivers/i2c/davinci_i2c.c +@@ -439,9 +439,9 @@ static int davinci_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + struct i2c_bus *i2c_bus = dev_get_priv(bus); + int ret; + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + for (; nmsgs > 0; nmsgs--, msg++) { +- debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); ++printf("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); + if (msg->flags & I2C_M_RD) { + ret = _davinci_i2c_read(i2c_bus->regs, msg->addr, + 0, 0, msg->buf, msg->len); +@@ -450,7 +450,7 @@ static int davinci_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + 0, 0, msg->buf, msg->len); + } + if (ret) { +- debug("i2c_write: error sending\n"); ++printf("i2c_write: error sending\n"); + return -EREMOTEIO; + } + } +diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c +index 072803691..4edfce5f0 100644 +--- a/drivers/i2c/designware_i2c.c ++++ b/drivers/i2c/designware_i2c.c +@@ -160,7 +160,7 @@ static int dw_i2c_calc_timing(struct dw_i2c *priv, enum i2c_speed_mode mode, + min_tlow_cnt = calc_counts(ic_clk, info->min_scl_lowtime_ns); + min_thigh_cnt = calc_counts(ic_clk, info->min_scl_hightime_ns); + +- debug("dw_i2c: mode %d, ic_clk %d, speed %d, period %d rise %d fall %d tlow %d thigh %d spk %d\n", ++printf("dw_i2c: mode %d, ic_clk %d, speed %d, period %d rise %d fall %d tlow %d thigh %d spk %d\n", + mode, ic_clk, info->speed, period_cnt, rise_cnt, fall_cnt, + min_tlow_cnt, min_thigh_cnt, spk_cnt); + +@@ -173,7 +173,7 @@ static int dw_i2c_calc_timing(struct dw_i2c *priv, enum i2c_speed_mode mode, + lcnt = min_tlow_cnt - rise_cnt + fall_cnt - 1; + + if (hcnt < 0 || lcnt < 0) { +- debug("dw_i2c: bad counts. hcnt = %d lcnt = %d\n", hcnt, lcnt); ++printf("dw_i2c: bad counts. hcnt = %d lcnt = %d\n", hcnt, lcnt); + return log_msg_ret("counts", -EINVAL); + } + +@@ -199,7 +199,7 @@ static int dw_i2c_calc_timing(struct dw_i2c *priv, enum i2c_speed_mode mode, + priv->sda_hold_time_ns : DEFAULT_SDA_HOLD_TIME; + config->sda_hold = calc_counts(ic_clk, sda_hold_time_ns); + +- debug("dw_i2c: hcnt = %d lcnt = %d sda hold = %d\n", hcnt, lcnt, ++printf("dw_i2c: hcnt = %d lcnt = %d sda hold = %d\n", hcnt, lcnt, + config->sda_hold); + + return 0; +@@ -481,7 +481,7 @@ static int __dw_i2c_read(struct i2c_regs *i2c_base, u8 dev, uint addr, + dev |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); + addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8)); + +- debug("%s: fix addr_overflow: dev %02x addr %02x\n", __func__, dev, ++printf("%s: fix addr_overflow: dev %02x addr %02x\n", __func__, dev, + addr); + #endif + +@@ -549,7 +549,7 @@ static int __dw_i2c_write(struct i2c_regs *i2c_base, u8 dev, uint addr, + dev |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); + addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8)); + +- debug("%s: fix addr_overflow: dev %02x addr %02x\n", __func__, dev, ++printf("%s: fix addr_overflow: dev %02x addr %02x\n", __func__, dev, + addr); + #endif + +@@ -712,9 +712,9 @@ static int designware_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + struct dw_i2c *i2c = dev_get_priv(bus); + int ret; + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + for (; nmsgs > 0; nmsgs--, msg++) { +- debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); ++printf("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); + if (msg->flags & I2C_M_RD) { + ret = __dw_i2c_read(i2c->regs, msg->addr, 0, 0, + msg->buf, msg->len); +@@ -723,7 +723,7 @@ static int designware_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + msg->buf, msg->len); + } + if (ret) { +- debug("i2c_write: error sending\n"); ++printf("i2c_write: error sending\n"); + return -EREMOTEIO; + } + } +diff --git a/drivers/i2c/exynos_hs_i2c.c b/drivers/i2c/exynos_hs_i2c.c +index 39bcacc17..d8404fc83 100644 +--- a/drivers/i2c/exynos_hs_i2c.c ++++ b/drivers/i2c/exynos_hs_i2c.c +@@ -116,26 +116,26 @@ static int hsi2c_wait_for_trx(struct exynos5_hsi2c *i2c) + writel(int_status, &i2c->usi_int_stat); + + if (trans_status & HSI2C_NO_DEV_ACK) { +- debug("%s: no ACK from device\n", __func__); ++printf("%s: no ACK from device\n", __func__); + return I2C_NACK; + } + if (trans_status & HSI2C_NO_DEV) { +- debug("%s: no device\n", __func__); ++printf("%s: no device\n", __func__); + return I2C_NOK; + } + if (trans_status & HSI2C_TRANS_ABORT) { +- debug("%s: arbitration lost\n", __func__); ++printf("%s: arbitration lost\n", __func__); + return I2C_NOK_LA; + } + if (trans_status & HSI2C_TIMEOUT_AUTO) { +- debug("%s: device timed out\n", __func__); ++printf("%s: device timed out\n", __func__); + return I2C_NOK_TOUT; + } + return I2C_OK; + } + udelay(1); + } +- debug("%s: transaction timeout!\n", __func__); ++printf("%s: transaction timeout!\n", __func__); + return I2C_NOK_TOUT; + } + +@@ -280,7 +280,7 @@ static unsigned hsi2c_poll_fifo(struct exynos5_hsi2c *i2c, bool rx_transfer) + return I2C_NOK; + } + if (!i--) { +- debug("%s: FIFO polling timeout!\n", __func__); ++printf("%s: FIFO polling timeout!\n", __func__); + return I2C_NOK_TOUT; + } + udelay(1); +@@ -353,7 +353,7 @@ static int hsi2c_wait_while_busy(struct exynos5_hsi2c *i2c) + + while (readl(&i2c->usi_trans_status) & HSI2C_MASTER_BUSY) { + if (!i--) { +- debug("%s: bus busy\n", __func__); ++printf("%s: bus busy\n", __func__); + return I2C_NOK_TOUT; + } + udelay(1); +@@ -373,7 +373,7 @@ static int hsi2c_write(struct exynos5_hsi2c *i2c, + + if (!(len + alen)) { + /* Writes of zero length not supported in auto mode. */ +- debug("%s: zero length writes not supported\n", __func__); ++printf("%s: zero length writes not supported\n", __func__); + return I2C_NOK; + } + +@@ -386,7 +386,7 @@ static int hsi2c_write(struct exynos5_hsi2c *i2c, + for (i = 0; i < alen; i++) { + rv = hsi2c_poll_fifo(i2c, false); + if (rv != I2C_OK) { +- debug("%s: address write failed\n", __func__); ++printf("%s: address write failed\n", __func__); + goto write_error; + } + writel(addr[i], &i2c->usi_txdata); +@@ -395,7 +395,7 @@ static int hsi2c_write(struct exynos5_hsi2c *i2c, + for (i = 0; i < len; i++) { + rv = hsi2c_poll_fifo(i2c, false); + if (rv != I2C_OK) { +- debug("%s: data write failed\n", __func__); ++printf("%s: data write failed\n", __func__); + goto write_error; + } + writel(data[i], &i2c->usi_txdata); +@@ -426,7 +426,7 @@ static int hsi2c_read(struct exynos5_hsi2c *i2c, + + if (!len) { + /* Reads of zero length not supported in auto mode. */ +- debug("%s: zero length read adjusted\n", __func__); ++printf("%s: zero length read adjusted\n", __func__); + drop_data = true; + len = 1; + } +diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c +index 2200303ea..0c4a9d487 100644 +--- a/drivers/i2c/fsl_i2c.c ++++ b/drivers/i2c/fsl_i2c.c +@@ -147,7 +147,7 @@ static uint set_i2c_bus_speed(const struct fsl_i2c_base *base, + fdr = CONFIG_FSL_I2C_CUSTOM_FDR; + speed = i2c_clk / divider; /* Fake something */ + #else +- debug("Requested speed:%d, i2c_clk:%d\n", speed, i2c_clk); ++printf("Requested speed:%d, i2c_clk:%d\n", speed, i2c_clk); + if (!dfsr) + dfsr = 1; + +@@ -165,13 +165,13 @@ static uint set_i2c_bus_speed(const struct fsl_i2c_base *base, + fdr = bin_gb | bin_ga; + speed = i2c_clk / est_div; + +- debug("FDR: 0x%.2x, ", fdr); +- debug("div: %ld, ", est_div); +- debug("ga: 0x%x, gb: 0x%x, ", ga, gb); +- debug("a: %d, b: %d, speed: %d\n", a, b, speed); ++printf("FDR: 0x%.2x, ", fdr); ++printf("div: %ld, ", est_div); ++printf("ga: 0x%x, gb: 0x%x, ", ga, gb); ++printf("a: %d, b: %d, speed: %d\n", a, b, speed); + + /* Condition 2 not accounted for */ +- debug("Tr <= %d ns\n", ++printf("Tr <= %d ns\n", + (b - 3 * dfsr) * 1000000 / + (i2c_clk / 1000)); + } +@@ -181,8 +181,8 @@ static uint set_i2c_bus_speed(const struct fsl_i2c_base *base, + if (a == 24) + a += 4; + } +- debug("divider: %d, est_div: %ld, DFSR: %d\n", divider, est_div, dfsr); +- debug("FDR: 0x%.2x, speed: %d\n", fdr, speed); ++printf("divider: %d, est_div: %ld, DFSR: %d\n", divider, est_div, dfsr); ++printf("FDR: 0x%.2x, speed: %d\n", fdr, speed); + #endif + writeb(dfsr, &base->dfsrr); /* set default filter */ + writeb(fdr, &base->fdr); /* set bus speed */ +@@ -287,7 +287,7 @@ static void __i2c_init(const struct fsl_i2c_base *base, int speed, int + continue; + + if (fsl_i2c_fixup(base)) +- debug("i2c_init: BUS#%d failed to init\n", ++printf("i2c_init: BUS#%d failed to init\n", + busnum); + + break; +@@ -323,24 +323,24 @@ static int i2c_wait(const struct fsl_i2c_base *base, int write) + writeb(0x0, &base->sr); + + if (csr & I2C_SR_MAL) { +- debug("%s: MAL\n", __func__); ++printf("%s: MAL\n", __func__); + return -1; + } + + if (!(csr & I2C_SR_MCF)) { +- debug("%s: unfinished\n", __func__); ++printf("%s: unfinished\n", __func__); + return -1; + } + + if (write == I2C_WRITE_BIT && (csr & I2C_SR_RXAK)) { +- debug("%s: No RXACK\n", __func__); ++printf("%s: No RXACK\n", __func__); + return -1; + } + + return 0; + } while ((get_ticks() - timeval) < timeout); + +- debug("%s: timed out\n", __func__); ++printf("%s: timed out\n", __func__); + return -1; + } + +@@ -444,7 +444,7 @@ static int __i2c_read(const struct fsl_i2c_base *base, u8 chip_addr, u8 *offset, + writeb(I2C_CR_MEN, &base->cr); + + if (i2c_wait4bus(base)) /* Wait until STOP */ +- debug("i2c_read: wait4bus timed out\n"); ++printf("i2c_read: wait4bus timed out\n"); + + if (ret == dlen) + return 0; +@@ -467,7 +467,7 @@ static int __i2c_write(const struct fsl_i2c_base *base, u8 chip_addr, + + writeb(I2C_CR_MEN, &base->cr); + if (i2c_wait4bus(base)) /* Wait until STOP */ +- debug("i2c_write: wait4bus timed out\n"); ++printf("i2c_write: wait4bus timed out\n"); + + if (ret == dlen) + return 0; +@@ -619,7 +619,7 @@ static int fsl_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + * actual data) or one message (just data) + */ + if (nmsgs > 2 || nmsgs == 0) { +- debug("%s: Only one or two messages are supported.", __func__); ++printf("%s: Only one or two messages are supported.", __func__); + return -1; + } + +diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c +index a650dd69b..b8aa7c5e5 100644 +--- a/drivers/i2c/i2c-cdns.c ++++ b/drivers/i2c/i2c-cdns.c +@@ -95,35 +95,35 @@ static void cdns_i2c_debug_status(struct cdns_i2c_regs *cdns_i2c) + + status = readl(&cdns_i2c->status); + if (int_status || status) { +- debug("Status: "); ++printf("Status: "); + if (int_status & CDNS_I2C_INTERRUPT_COMP) +- debug("COMP "); ++printf("COMP "); + if (int_status & CDNS_I2C_INTERRUPT_DATA) +- debug("DATA "); ++printf("DATA "); + if (int_status & CDNS_I2C_INTERRUPT_NACK) +- debug("NACK "); ++printf("NACK "); + if (int_status & CDNS_I2C_INTERRUPT_TO) +- debug("TO "); ++printf("TO "); + if (int_status & CDNS_I2C_INTERRUPT_SLVRDY) +- debug("SLVRDY "); ++printf("SLVRDY "); + if (int_status & CDNS_I2C_INTERRUPT_RXOVF) +- debug("RXOVF "); ++printf("RXOVF "); + if (int_status & CDNS_I2C_INTERRUPT_TXOVF) +- debug("TXOVF "); ++printf("TXOVF "); + if (int_status & CDNS_I2C_INTERRUPT_RXUNF) +- debug("RXUNF "); ++printf("RXUNF "); + if (int_status & CDNS_I2C_INTERRUPT_ARBLOST) +- debug("ARBLOST "); ++printf("ARBLOST "); + if (status & CDNS_I2C_STATUS_RXDV) +- debug("RXDV "); ++printf("RXDV "); + if (status & CDNS_I2C_STATUS_TXDV) +- debug("TXDV "); ++printf("TXDV "); + if (status & CDNS_I2C_STATUS_RXOVF) +- debug("RXOVF "); ++printf("RXOVF "); + if (status & CDNS_I2C_STATUS_BA) +- debug("BA "); +- debug("TS%d ", readl(&cdns_i2c->transfer_size)); +- debug("\n"); ++printf("BA "); ++printf("TS%d ", readl(&cdns_i2c->transfer_size)); ++printf("\n"); + } + } + #endif +@@ -218,7 +218,7 @@ static int cdns_i2c_set_bus_speed(struct udevice *dev, unsigned int speed) + int ret = 0; + + if (speed > I2C_SPEED_FAST_RATE) { +- debug("%s, failed to set clock speed to %u\n", __func__, ++printf("%s, failed to set clock speed to %u\n", __func__, + speed); + return -EINVAL; + } +@@ -227,7 +227,7 @@ static int cdns_i2c_set_bus_speed(struct udevice *dev, unsigned int speed) + if (ret) + return ret; + +- debug("%s: div_a: %d, div_b: %d, input freq: %d, speed: %d/%ld\n", ++printf("%s: div_a: %d, div_b: %d, input freq: %d, speed: %d/%ld\n", + __func__, div_a, div_b, bus->input_freq, speed, speed_p); + + writel((div_b << CDNS_I2C_CONTROL_DIV_B_SHIFT) | +@@ -432,10 +432,10 @@ static int cdns_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, + i2c_bus->hold_flag = 0; + } + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + for (u8 retry = 0; retry < CDNS_I2C_ARB_LOST_MAX_RETRIES && + nmsgs > 0; nmsgs--, msg++) { +- debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); ++printf("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); + if (msg->flags & I2C_M_RD) { + ret = cdns_i2c_read_data(i2c_bus, msg->addr, msg->buf, + msg->len); +@@ -453,7 +453,7 @@ static int cdns_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, + } + + if (ret) { +- debug("i2c_write: error sending\n"); ++printf("i2c_write: error sending\n"); + return -EREMOTEIO; + } + } +diff --git a/drivers/i2c/i2c-cortina.c b/drivers/i2c/i2c-cortina.c +index 960ae8c70..cf5968550 100644 +--- a/drivers/i2c/i2c-cortina.c ++++ b/drivers/i2c/i2c-cortina.c +@@ -281,9 +281,9 @@ static int ca_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + struct ca_i2c *priv = dev_get_priv(bus); + int ret; + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + for (; nmsgs > 0; nmsgs--, msg++) { +- debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); ++printf("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); + if (msg->flags & I2C_M_RD) + ret = ca_i2c_read(priv->regs, msg->addr, 0, 0, + msg->buf, msg->len); +diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c +index cf8f8f403..a3a0f3d3d 100644 +--- a/drivers/i2c/i2c-gpio.c ++++ b/drivers/i2c/i2c-gpio.c +@@ -226,10 +226,10 @@ static int i2c_gpio_write_data(struct i2c_gpio_bus *bus, uchar chip, + unsigned int delay = bus->udelay; + int failures = 0; + +- debug("%s: chip %x buffer %p len %d\n", __func__, chip, buffer, len); ++printf("%s: chip %x buffer %p len %d\n", __func__, chip, buffer, len); + + if (i2c_send_slave_addr(bus, delay, chip << 1)) { +- debug("i2c_write, no chip responded %02X\n", chip); ++printf("i2c_write, no chip responded %02X\n", chip); + return -EIO; + } + +@@ -244,7 +244,7 @@ static int i2c_gpio_write_data(struct i2c_gpio_bus *bus, uchar chip, + } + + if (i2c_send_slave_addr(bus, delay, (chip << 1) | 0x1)) { +- debug("i2c_write, no chip responded %02X\n", chip); ++printf("i2c_write, no chip responded %02X\n", chip); + return -EIO; + } + +@@ -256,7 +256,7 @@ static int i2c_gpio_read_data(struct i2c_gpio_bus *bus, uchar chip, + { + unsigned int delay = bus->udelay; + +- debug("%s: chip %x buffer: %p len %d\n", __func__, chip, buffer, len); ++printf("%s: chip %x buffer: %p len %d\n", __func__, chip, buffer, len); + + while (len-- > 0) + *buffer++ = i2c_gpio_read_byte(bus, delay, len == 0); +@@ -299,7 +299,7 @@ static int i2c_gpio_probe(struct udevice *dev, uint chip, uint chip_flags) + ret = i2c_gpio_write_byte(bus, delay, (chip << 1) | 0); + i2c_gpio_send_stop(bus, delay); + +- debug("%s: bus: %d (%s) chip: %x flags: %x ret: %d\n", ++printf("%s: bus: %d (%s) chip: %x flags: %x ret: %d\n", + __func__, dev_seq(dev), dev->name, chip, chip_flags, ret); + + return ret; +diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c +index be5678521..49ca1320d 100644 +--- a/drivers/i2c/i2c-uclass.c ++++ b/drivers/i2c/i2c-uclass.c +@@ -292,7 +292,7 @@ static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len, + if (!str) + return -ENOMEM; + ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev); +- debug("%s: device_bind_driver: ret=%d\n", __func__, ret); ++printf("%s: device_bind_driver: ret=%d\n", __func__, ret); + if (ret) + goto err_bind; + +@@ -301,7 +301,7 @@ static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len, + chip->chip_addr = chip_addr; + chip->offset_len = offset_len; + ret = device_probe(dev); +- debug("%s: device_probe: ret=%d\n", __func__, ret); ++printf("%s: device_probe: ret=%d\n", __func__, ret); + if (ret) + goto err_probe; + +@@ -324,7 +324,7 @@ int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, + { + struct udevice *dev; + +- debug("%s: Searching bus '%s' for address %02x: ", __func__, ++printf("%s: Searching bus '%s' for address %02x: ", __func__, + bus->name, chip_addr); + for (device_find_first_child(bus, &dev); dev; + device_find_next_child(&dev)) { +@@ -334,14 +334,14 @@ int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, + if (chip->chip_addr == (chip_addr & + ~chip->chip_addr_offset_mask)) { + ret = device_probe(dev); +- debug("found, ret=%d\n", ret); ++printf("found, ret=%d\n", ret); + if (ret) + return ret; + *devp = dev; + return 0; + } + } +- debug("not found\n"); ++printf("not found\n"); + return i2c_bind_driver(bus, chip_addr, offset_len, devp); + } + +@@ -353,23 +353,23 @@ int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, + + ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); + if (ret) { +- debug("Cannot find I2C bus %d\n", busnum); ++printf("Cannot find I2C bus %d\n", busnum); + return ret; + } + + /* detect the presence of the chip on the bus */ + ret = i2c_probe_chip(bus, chip_addr, 0); +- debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, ++printf("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, + chip_addr, ret); + if (ret) { +- debug("Cannot detect I2C chip %02x on bus %d\n", chip_addr, ++printf("Cannot detect I2C chip %02x on bus %d\n", chip_addr, + busnum); + return ret; + } + + ret = i2c_get_chip(bus, chip_addr, offset_len, devp); + if (ret) { +- debug("Cannot find I2C chip %02x on bus %d\n", chip_addr, ++printf("Cannot find I2C chip %02x on bus %d\n", chip_addr, + busnum); + return ret; + } +@@ -386,14 +386,14 @@ int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, + + /* First probe that chip */ + ret = i2c_probe_chip(bus, chip_addr, chip_flags); +- debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, ++printf("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, + chip_addr, ret); + if (ret) + return ret; + + /* The chip was found, see if we have a driver, and probe it */ + ret = i2c_get_chip(bus, chip_addr, 1, devp); +- debug("%s: i2c_get_chip: ret=%d\n", __func__, ret); ++printf("%s: i2c_get_chip: ret=%d\n", __func__, ret); + + return ret; + } +@@ -568,7 +568,7 @@ static int i2c_deblock_gpio(struct udevice *bus) + ret = gpio_request_list_by_name(bus, "gpios", gpios, + ARRAY_SIZE(gpios), GPIOD_IS_IN); + if (ret != ARRAY_SIZE(gpios)) { +- debug("%s: I2C Node '%s' has no 'gpios' property %s\n", ++printf("%s: I2C Node '%s' has no 'gpios' property %s\n", + __func__, dev_read_name(bus), bus->name); + if (ret >= 0) { + gpio_free_list(bus, gpios, ret); +@@ -579,7 +579,7 @@ static int i2c_deblock_gpio(struct udevice *bus) + + ret = pinctrl_select_state(bus, "gpio"); + if (ret) { +- debug("%s: I2C Node '%s' has no 'gpio' pinctrl state. %s\n", ++printf("%s: I2C Node '%s' has no 'gpio' pinctrl state. %s\n", + __func__, dev_read_name(bus), bus->name); + goto out_no_pinctrl; + } +@@ -588,7 +588,7 @@ static int i2c_deblock_gpio(struct udevice *bus) + + ret = pinctrl_select_state(bus, "default"); + if (ret) { +- debug("%s: I2C Node '%s' has no 'default' pinctrl state. %s\n", ++printf("%s: I2C Node '%s' has no 'default' pinctrl state. %s\n", + __func__, dev_read_name(bus), bus->name); + } + +@@ -626,7 +626,7 @@ int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip) + chip->flags = 0; + addr = dev_read_u32_default(dev, "reg", -1); + if (addr == -1) { +- debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__, ++printf("%s: I2C Node '%s' has no 'reg' property %s\n", __func__, + dev_read_name(dev), dev->name); + return log_ret(-EINVAL); + } +@@ -653,7 +653,7 @@ static int i2c_pre_probe(struct udevice *dev) + i2c->max_transaction_bytes = max; + } + +- debug("%s: I2C bus: %s max transaction bytes: %d\n", __func__, ++printf("%s: I2C bus: %s max transaction bytes: %d\n", __func__, + dev->name, i2c->max_transaction_bytes); + #endif + return 0; +@@ -690,7 +690,7 @@ static int i2c_post_bind(struct udevice *dev) + { + int ret = 0; + +- debug("%s: %s, seq=%d\n", __func__, dev->name, dev_seq(dev)); ++printf("%s: %s, seq=%d\n", __func__, dev->name, dev_seq(dev)); + + #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) + ret = dm_scan_fdt_dev(dev); +diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c +index 02f014493..ba3d51dd3 100644 +--- a/drivers/i2c/ihs_i2c.c ++++ b/drivers/i2c/ihs_i2c.c +@@ -113,7 +113,7 @@ static int wait_for_int(bool read) + | (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV)))) { + udelay(10); + if (ctr++ > 5000) { +- debug("%s: timed out\n", __func__); ++printf("%s: timed out\n", __func__); + return -ETIMEDOUT; + } + #if CONFIG_IS_ENABLED(DM_I2C) +@@ -183,7 +183,7 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read, + #endif + if (res) { + if (res == -ETIMEDOUT) +- debug("%s: time out while waiting for event\n", __func__); ++printf("%s: time out while waiting for event\n", __func__); + + return res; + } +@@ -309,7 +309,7 @@ static int ihs_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + * actucal data) or one message (just data) + */ + if (nmsgs > 2 || nmsgs == 0) { +- debug("%s: Only one or two messages are supported\n", __func__); ++printf("%s: Only one or two messages are supported\n", __func__); + return -ENOTSUPP; + } + +diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c +index 92c500327..661f6ed2f 100644 +--- a/drivers/i2c/imx_lpi2c.c ++++ b/drivers/i2c/imx_lpi2c.c +@@ -83,11 +83,11 @@ static int bus_i2c_wait_for_tx_ready(struct imx_lpi2c_reg *regs) + txcount = LPI2C_FIFO_SIZE - txcount; + result = imx_lpci2c_check_clear_error(regs); + if (result) { +- debug("i2c: wait for tx ready: result 0x%x\n", result); ++printf("i2c: wait for tx ready: result 0x%x\n", result); + return result; + } + if (get_timer(start_time) > LPI2C_TIMEOUT_MS) { +- debug("i2c: wait for tx ready: timeout\n"); ++printf("i2c: wait for tx ready: timeout\n"); + return -1; + } + } while (!txcount); +@@ -108,7 +108,7 @@ static int bus_i2c_send(struct udevice *bus, u8 *txbuf, int len) + while (len--) { + result = bus_i2c_wait_for_tx_ready(regs); + if (result) { +- debug("i2c: send wait for tx ready: %d\n", result); ++printf("i2c: send wait for tx ready: %d\n", result); + return result; + } + writel(*txbuf++, ®s->mtdr); +@@ -131,7 +131,7 @@ static int bus_i2c_receive(struct udevice *bus, u8 *rxbuf, int len) + + result = bus_i2c_wait_for_tx_ready(regs); + if (result) { +- debug("i2c: receive wait fot tx ready: %d\n", result); ++printf("i2c: receive wait fot tx ready: %d\n", result); + return result; + } + +@@ -145,12 +145,12 @@ static int bus_i2c_receive(struct udevice *bus, u8 *rxbuf, int len) + do { + result = imx_lpci2c_check_clear_error(regs); + if (result) { +- debug("i2c: receive check clear error: %d\n", ++printf("i2c: receive check clear error: %d\n", + result); + return result; + } + if (get_timer(start_time) > LPI2C_TIMEOUT_MS) { +- debug("i2c: receive mrdr: timeout\n"); ++printf("i2c: receive mrdr: timeout\n"); + return -1; + } + val = readl(®s->mrdr); +@@ -170,7 +170,7 @@ static int bus_i2c_start(struct udevice *bus, u8 addr, u8 dir) + + result = imx_lpci2c_check_busy_bus(regs); + if (result) { +- debug("i2c: start check busy bus: 0x%x\n", result); ++printf("i2c: start check busy bus: 0x%x\n", result); + + /* Try to init the lpi2c then check the bus busy again */ + bus_i2c_init(bus, I2C_SPEED_STANDARD_RATE); +@@ -188,7 +188,7 @@ static int bus_i2c_start(struct udevice *bus, u8 addr, u8 dir) + /* wait tx fifo ready */ + result = bus_i2c_wait_for_tx_ready(regs); + if (result) { +- debug("i2c: start wait for tx ready: 0x%x\n", result); ++printf("i2c: start wait for tx ready: 0x%x\n", result); + return result; + } + /* issue start command */ +@@ -208,7 +208,7 @@ static int bus_i2c_stop(struct udevice *bus) + + result = bus_i2c_wait_for_tx_ready(regs); + if (result) { +- debug("i2c: stop wait for tx ready: 0x%x\n", result); ++printf("i2c: stop wait for tx ready: 0x%x\n", result); + return result; + } + +@@ -228,7 +228,7 @@ static int bus_i2c_stop(struct udevice *bus) + } + + if (get_timer(start_time) > LPI2C_NACK_TOUT_MS) { +- debug("stop timeout\n"); ++printf("stop timeout\n"); + return -ETIMEDOUT; + } + } +@@ -377,7 +377,7 @@ static int bus_i2c_init(struct udevice *bus, int speed) + val = readl(®s->mcr) & ~LPI2C_MCR_MEN_MASK; + writel(val | LPI2C_MCR_MEN(1), ®s->mcr); + +- debug("i2c : controller bus %d, speed %d:\n", dev_seq(bus), speed); ++printf("i2c : controller bus %d, speed %d:\n", dev_seq(bus), speed); + + return ret; + } +@@ -406,7 +406,7 @@ static int imx_lpi2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + int ret = 0, ret_stop; + + for (; nmsgs > 0; nmsgs--, msg++) { +- debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); ++printf("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); + if (msg->flags & I2C_M_RD) + ret = bus_i2c_read(bus, msg->addr, msg->buf, msg->len); + else { +@@ -418,11 +418,11 @@ static int imx_lpi2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + } + + if (ret) +- debug("i2c_write: error sending\n"); ++printf("i2c_write: error sending\n"); + + ret_stop = bus_i2c_stop(bus); + if (ret_stop) +- debug("i2c_xfer: stop bus error\n"); ++printf("i2c_xfer: stop bus error\n"); + + ret |= ret_stop; + +@@ -458,7 +458,7 @@ static int imx_lpi2c_probe(struct udevice *bus) + /* power up i2c resource */ + ret = init_i2c_power(dev_seq(bus)); + if (ret) { +- debug("init_i2c_power err = %d\n", ret); ++printf("init_i2c_power err = %d\n", ret); + return ret; + } + +@@ -495,7 +495,7 @@ static int imx_lpi2c_probe(struct udevice *bus) + if (ret < 0) + return ret; + +- debug("i2c : controller bus %d at 0x%lx , speed %d: ", ++printf("i2c : controller bus %d at 0x%lx , speed %d: ", + dev_seq(bus), i2c_bus->base, + i2c_bus->speed); + +diff --git a/drivers/i2c/intel_i2c.c b/drivers/i2c/intel_i2c.c +index 52f7a528e..06601a54b 100644 +--- a/drivers/i2c/intel_i2c.c ++++ b/drivers/i2c/intel_i2c.c +@@ -99,7 +99,7 @@ static int smbus_block_read(u32 base, u8 dev, u8 *buffer, + int count; + int i; + +- debug("%s (%d): dev=0x%x offs=0x%x len=0x%x\n", ++printf("%s (%d): dev=0x%x offs=0x%x len=0x%x\n", + __func__, __LINE__, dev, offset, len); + if (smbus_wait_until_ready(base) < 0) + return -ETIMEDOUT; +@@ -129,19 +129,19 @@ static int smbus_block_read(u32 base, u8 dev, u8 *buffer, + } + + count = inb(base + SMBHSTDAT0); +- debug("%s (%d): count=%d (len=%d)\n", __func__, __LINE__, count, len); ++printf("%s (%d): count=%d (len=%d)\n", __func__, __LINE__, count, len); + if (count == 0) { +- debug("ERROR: len=0 on read\n"); ++printf("ERROR: len=0 on read\n"); + return -EIO; + } + + if (count < len) { +- debug("ERROR: too few bytes read\n"); ++printf("ERROR: too few bytes read\n"); + return -EIO; + } + + if (count > 32) { +- debug("ERROR: count=%d too high\n", count); ++printf("ERROR: count=%d too high\n", count); + return -EIO; + } + +@@ -163,7 +163,7 @@ static int smbus_block_write(u32 base, u8 dev, u8 *buffer, + { + int i; + +- debug("%s (%d): dev=0x%x offs=0x%x len=0x%x\n", ++printf("%s (%d): dev=0x%x offs=0x%x len=0x%x\n", + __func__, __LINE__, dev, offset, len); + if (smbus_wait_until_ready(base) < 0) + return -ETIMEDOUT; +@@ -207,7 +207,7 @@ static int intel_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + struct intel_i2c *i2c = dev_get_priv(bus); + struct i2c_msg *dmsg, *omsg, dummy; + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + + memset(&dummy, 0, sizeof(struct i2c_msg)); + +@@ -216,7 +216,7 @@ static int intel_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + * actucal data) or one message (just data) + */ + if (nmsgs > 2 || nmsgs == 0) { +- debug("%s: Only one or two messages are supported", __func__); ++printf("%s: Only one or two messages are supported", __func__); + return -EIO; + } + +diff --git a/drivers/i2c/iproc_i2c.c b/drivers/i2c/iproc_i2c.c +index d975e7826..0989e0760 100644 +--- a/drivers/i2c/iproc_i2c.c ++++ b/drivers/i2c/iproc_i2c.c +@@ -62,52 +62,52 @@ static int iproc_dump_i2c_regs(struct iproc_i2c *bus_prvdata) + struct iproc_i2c_regs *base = bus_prvdata->base; + unsigned int regval; + +- debug("\n----------------------------------------------\n"); +- debug("%s: Dumping SMBus registers...\n", __func__); ++printf("\n----------------------------------------------\n"); ++printf("%s: Dumping SMBus registers...\n", __func__); + + regval = iproc_i2c_reg_read(&base->cfg_reg); +- debug("CCB_SMB_CFG_REG=0x%08X\n", regval); ++printf("CCB_SMB_CFG_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->timg_cfg); +- debug("CCB_SMB_TIMGCFG_REG=0x%08X\n", regval); ++printf("CCB_SMB_TIMGCFG_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->addr_reg); +- debug("CCB_SMB_ADDR_REG=0x%08X\n", regval); ++printf("CCB_SMB_ADDR_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->mstr_fifo_ctrl); +- debug("CCB_SMB_MSTRFIFOCTL_REG=0x%08X\n", regval); ++printf("CCB_SMB_MSTRFIFOCTL_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->slv_fifo_ctrl); +- debug("CCB_SMB_SLVFIFOCTL_REG=0x%08X\n", regval); ++printf("CCB_SMB_SLVFIFOCTL_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->bitbng_ctrl); +- debug("CCB_SMB_BITBANGCTL_REG=0x%08X\n", regval); ++printf("CCB_SMB_BITBANGCTL_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->mstr_cmd); +- debug("CCB_SMB_MSTRCMD_REG=0x%08X\n", regval); ++printf("CCB_SMB_MSTRCMD_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->slv_cmd); +- debug("CCB_SMB_SLVCMD_REG=0x%08X\n", regval); ++printf("CCB_SMB_SLVCMD_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->evt_en); +- debug("CCB_SMB_EVTEN_REG=0x%08X\n", regval); ++printf("CCB_SMB_EVTEN_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->evt_sts); +- debug("CCB_SMB_EVTSTS_REG=0x%08X\n", regval); ++printf("CCB_SMB_EVTSTS_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->mstr_datawr); +- debug("CCB_SMB_MSTRDATAWR_REG=0x%08X\n", regval); ++printf("CCB_SMB_MSTRDATAWR_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->mstr_datard); +- debug("CCB_SMB_MSTRDATARD_REG=0x%08X\n", regval); ++printf("CCB_SMB_MSTRDATARD_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->slv_datawr); +- debug("CCB_SMB_SLVDATAWR_REG=0x%08X\n", regval); ++printf("CCB_SMB_SLVDATAWR_REG=0x%08X\n", regval); + + regval = iproc_i2c_reg_read(&base->slv_datard); +- debug("CCB_SMB_SLVDATARD_REG=0x%08X\n", regval); ++printf("CCB_SMB_SLVDATARD_REG=0x%08X\n", regval); + +- debug("----------------------------------------------\n\n"); ++printf("----------------------------------------------\n\n"); + return 0; + } + #else +@@ -188,7 +188,7 @@ static int iproc_i2c_init(struct udevice *bus) + struct iproc_i2c_regs *base = bus_prvdata->base; + unsigned int regval; + +- debug("\nEntering %s\n", __func__); ++printf("\nEntering %s\n", __func__); + + /* Put controller in reset */ + regval = iproc_i2c_reg_read(&base->cfg_reg); +@@ -229,7 +229,7 @@ static int iproc_i2c_init(struct udevice *bus) + bus_prvdata->i2c_init_done = 1; + + iproc_dump_i2c_regs(bus_prvdata); +- debug("%s: Init successful\n", __func__); ++printf("%s: Init successful\n", __func__); + + return 0; + } +@@ -254,7 +254,7 @@ static void iproc_i2c_write_trans_data(struct iproc_i2c *bus_prvdata, + unsigned int i; + unsigned int num_data_bytes = 0; + +- debug("%s: dev_addr=0x%X cmd_valid=%d cmd=0x%02x size=%u proto=%d buf[] %x\n", ++printf("%s: dev_addr=0x%X cmd_valid=%d cmd=0x%02x size=%u proto=%d buf[] %x\n", + __func__, dev_addr, info->cmd_valid, + info->command, info->size, info->smb_proto, info->data[0]); + +@@ -577,7 +577,7 @@ static int iproc_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + { + int ret = 0; + +- debug("%s: %d messages\n", __func__, nmsgs); ++printf("%s: %d messages\n", __func__, nmsgs); + + for (; nmsgs > 0; nmsgs--, msg++) { + if (msg->flags & I2C_M_RD) +@@ -598,7 +598,7 @@ static int iproc_i2c_probe_chip(struct udevice *bus, uint chip_addr, + struct iproc_i2c_regs *base = bus_prvdata->base; + u32 regval; + +- debug("\n%s: Entering chip probe\n", __func__); ++printf("\n%s: Entering chip probe\n", __func__); + + /* Init internal regs, disable intrs (and then clear intrs), set fifo + * thresholds, etc. +@@ -624,7 +624,7 @@ static int iproc_i2c_probe_chip(struct udevice *bus, uint chip_addr, + return -1; + + iproc_dump_i2c_regs(bus_prvdata); +- debug("%s: chip probe successful\n", __func__); ++printf("%s: chip probe successful\n", __func__); + + return 0; + } +diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c +index 4edcba291..05aaf0b40 100644 +--- a/drivers/i2c/kona_i2c.c ++++ b/drivers/i2c/kona_i2c.c +@@ -164,7 +164,7 @@ struct kona_i2c_msg { + static void bcm_kona_i2c_send_cmd_to_ctrl(struct bcm_kona_i2c_dev *dev, + enum bcm_kona_cmd_t cmd) + { +- debug("%s, %d\n", __func__, cmd); ++printf("%s, %d\n", __func__, cmd); + + switch (cmd) { + case BCM_CMD_NOACTION: +@@ -221,7 +221,7 @@ static unsigned long wait_for_int_timeout(struct bcm_kona_i2c_dev *dev, + status = readl(dev->base + ISR_OFFSET); + + if ((status & ~ISR_RESERVED_MASK) == 0) { +- debug("Bogus I2C interrupt 0x%x\n", status); ++printf("Bogus I2C interrupt 0x%x\n", status); + continue; + } + +@@ -338,14 +338,14 @@ static int bcm_kona_i2c_write_byte(struct bcm_kona_i2c_dev *dev, uint8_t data, + time_left = wait_for_int_timeout(dev, time_left, IER_I2C_INT_EN_MASK); + + if (!time_left) { +- debug("controller timed out\n"); ++printf("controller timed out\n"); + return -ETIMEDOUT; + } + + nak_received = readl(dev->base + CS_OFFSET) & CS_ACK_MASK ? 1 : 0; + + if (nak_received ^ nak_expected) { +- debug("unexpected NAK/ACK\n"); ++printf("unexpected NAK/ACK\n"); + return -EREMOTEIO; + } + +@@ -514,7 +514,7 @@ static int bcm_kona_i2c_xfer(struct bcm_kona_i2c_dev *dev, + if (!(pmsg->flags & I2C_M_NOSTART)) { + rc = bcm_kona_i2c_do_addr(dev, pmsg); + if (rc < 0) { +- debug("NAK from addr %2.2x msg#%d rc = %d\n", ++printf("NAK from addr %2.2x msg#%d rc = %d\n", + pmsg->addr, i, rc); + goto xfer_send_stop; + } +@@ -652,7 +652,7 @@ static int kona_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, + if (bcm_kona_i2c_xfer(dev, msg, 2) < 0) { + /* Sending 2 i2c messages */ + kona_i2c_init(adap, adap->speed, adap->slaveaddr); +- debug("I2C read: I/O error\n"); ++printf("I2C read: I/O error\n"); + return -EIO; + } + return 0; +@@ -676,7 +676,7 @@ static int kona_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr, + msgbuf0[1] = buffer[i]; + if (bcm_kona_i2c_xfer(dev, msg, 1) < 0) { + kona_i2c_init(adap, adap->speed, adap->slaveaddr); +- debug("I2C write: I/O error\n"); ++printf("I2C write: I/O error\n"); + return -EIO; + } + } +diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c +index f89f7955e..70e2a1226 100644 +--- a/drivers/i2c/lpc32xx_i2c.c ++++ b/drivers/i2c/lpc32xx_i2c.c +@@ -312,7 +312,7 @@ static int lpc32xx_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + * actual data) or one message (just data) + */ + if (nmsgs > 2 || nmsgs == 0) { +- debug("%s: Only one or two messages are supported.", __func__); ++printf("%s: Only one or two messages are supported.", __func__); + return -1; + } + +diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c +index 434e3461b..8668afe19 100644 +--- a/drivers/i2c/meson_i2c.c ++++ b/drivers/i2c/meson_i2c.c +@@ -90,7 +90,7 @@ static void meson_i2c_get_data(struct meson_i2c *i2c, u8 *buf, int len) + rdata0 = readl(&i2c->regs->tok_rdata0); + rdata1 = readl(&i2c->regs->tok_rdata1); + +- debug("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len); ++printf("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len); + + for (i = 0; i < min(4, len); i++) + *buf++ = (rdata0 >> i * 8) & 0xff; +@@ -117,7 +117,7 @@ static void meson_i2c_put_data(struct meson_i2c *i2c, u8 *buf, int len) + writel(wdata0, &i2c->regs->tok_wdata0); + writel(wdata1, &i2c->regs->tok_wdata1); + +- debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len); ++printf("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len); + } + + /* +@@ -169,7 +169,7 @@ static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, + { + ulong start; + +- debug("meson i2c: %s addr %u len %u\n", ++printf("meson i2c: %s addr %u len %u\n", + (msg->flags & I2C_M_RD) ? "read" : "write", + msg->addr, msg->len); + +@@ -190,7 +190,7 @@ static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, + while (readl(&i2c->regs->ctrl) & REG_CTRL_STATUS) { + if (get_timer(start) > I2C_TIMEOUT_MS) { + clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); +- debug("meson i2c: timeout\n"); ++printf("meson i2c: timeout\n"); + return -ETIMEDOUT; + } + udelay(1); +@@ -199,7 +199,7 @@ static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, + clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); + + if (readl(&i2c->regs->ctrl) & REG_CTRL_ERROR) { +- debug("meson i2c: error\n"); ++printf("meson i2c: error\n"); + return -EREMOTEIO; + } + +@@ -242,7 +242,7 @@ static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) + + /* clock divider has 12 bits */ + if (div >= (1 << 12)) { +- debug("meson i2c: requested bus frequency too low\n"); ++printf("meson i2c: requested bus frequency too low\n"); + div = (1 << 12) - 1; + } + +@@ -252,7 +252,7 @@ static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) + clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIVEXT_MASK, + (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT); + +- debug("meson i2c: set clk %u, src %lu, div %u\n", speed, clk_rate, div); ++printf("meson i2c: set clk %u, src %lu, div %u\n", speed, clk_rate, div); + + return 0; + } +diff --git a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c +index ad730e0e7..00bdb0b9c 100644 +--- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c ++++ b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c +@@ -30,7 +30,7 @@ int i2c_arbitrator_deselect(struct udevice *mux, struct udevice *bus, + struct i2c_arbitrator_priv *priv = dev_get_priv(mux); + int ret; + +- debug("%s: %s\n", __func__, mux->name); ++printf("%s: %s\n", __func__, mux->name); + ret = dm_gpio_set_value(&priv->ap_claim, 0); + udelay(priv->slew_delay_us); + +@@ -44,7 +44,7 @@ int i2c_arbitrator_select(struct udevice *mux, struct udevice *bus, + unsigned start; + int ret; + +- debug("%s: %s\n", __func__, mux->name); ++printf("%s: %s\n", __func__, mux->name); + /* Start a round of trying to claim the bus */ + start = get_timer(0); + do { +@@ -95,7 +95,7 @@ static int i2c_arbitrator_probe(struct udevice *dev) + int node = dev_of_offset(dev); + int ret; + +- debug("%s: %s\n", __func__, dev->name); ++printf("%s: %s\n", __func__, dev->name); + priv->slew_delay_us = fdtdec_get_int(blob, node, "slew-delay-us", 0); + priv->wait_retry_ms = fdtdec_get_int(blob, node, "wait-retry-us", 0) / + 1000; +@@ -115,7 +115,7 @@ static int i2c_arbitrator_probe(struct udevice *dev) + err_ec_gpio: + dm_gpio_free(dev, &priv->ap_claim); + err: +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + return ret; + } + +diff --git a/drivers/i2c/muxes/i2c-mux-uclass.c b/drivers/i2c/muxes/i2c-mux-uclass.c +index dbca409ee..6285b606e 100644 +--- a/drivers/i2c/muxes/i2c-mux-uclass.c ++++ b/drivers/i2c/muxes/i2c-mux-uclass.c +@@ -53,7 +53,7 @@ static int i2c_mux_post_bind(struct udevice *mux) + ofnode node; + int ret; + +- debug("%s: %s\n", __func__, mux->name); ++printf("%s: %s\n", __func__, mux->name); + /* + * There is no compatible string in the sub-nodes, so we must manually + * bind these +@@ -87,7 +87,7 @@ static int i2c_mux_post_bind(struct udevice *mux) + + ret = device_bind_driver_to_node(mux, "i2c_mux_bus_drv", + full_name, node, &dev); +- debug(" - bind ret=%d, %s, seq %d\n", ret, ++printf(" - bind ret=%d, %s, seq %d\n", ret, + dev ? dev->name : NULL, dev_seq(dev)); + if (ret) + return ret; +@@ -102,7 +102,7 @@ static int i2c_mux_post_probe(struct udevice *mux) + struct i2c_mux *priv = dev_get_uclass_priv(mux); + int ret; + +- debug("%s: %s\n", __func__, mux->name); ++printf("%s: %s\n", __func__, mux->name); + priv->selected = -1; + + /* if parent is of i2c uclass already, we'll take that, otherwise +@@ -110,7 +110,7 @@ static int i2c_mux_post_probe(struct udevice *mux) + */ + if (UCLASS_I2C == device_get_uclass_id(mux->parent)) { + priv->i2c_bus = dev_get_parent(mux); +- debug("%s: bus=%p/%s\n", __func__, priv->i2c_bus, ++printf("%s: bus=%p/%s\n", __func__, priv->i2c_bus, + priv->i2c_bus->name); + return 0; + } +@@ -119,7 +119,7 @@ static int i2c_mux_post_probe(struct udevice *mux) + &priv->i2c_bus); + if (ret) + return ret; +- debug("%s: bus=%p/%s\n", __func__, priv->i2c_bus, priv->i2c_bus->name); ++printf("%s: bus=%p/%s\n", __func__, priv->i2c_bus, priv->i2c_bus->name); + + return 0; + } +@@ -171,7 +171,7 @@ static int i2c_mux_bus_probe(struct udevice *dev, uint chip_addr, + struct dm_i2c_ops *ops = i2c_get_ops(priv->i2c_bus); + int ret, ret2; + +- debug("%s: %s, bus %s\n", __func__, dev->name, priv->i2c_bus->name); ++printf("%s: %s, bus %s\n", __func__, dev->name, priv->i2c_bus->name); + if (!ops->probe_chip) + return -ENOSYS; + ret = i2c_mux_select(dev); +@@ -191,7 +191,7 @@ static int i2c_mux_bus_xfer(struct udevice *dev, struct i2c_msg *msg, + struct dm_i2c_ops *ops = i2c_get_ops(priv->i2c_bus); + int ret, ret2; + +- debug("%s: %s, bus %s\n", __func__, dev->name, priv->i2c_bus->name); ++printf("%s: %s, bus %s\n", __func__, dev->name, priv->i2c_bus->name); + if (!ops->xfer) + return -ENOSYS; + ret = i2c_mux_select(dev); +diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c +index 55858cf65..fde24b0de 100644 +--- a/drivers/i2c/muxes/pca954x.c ++++ b/drivers/i2c/muxes/pca954x.c +@@ -116,17 +116,17 @@ static int pca954x_of_to_plat(struct udevice *dev) + + priv->addr = dev_read_u32_default(dev, "reg", 0); + if (!priv->addr) { +- debug("MUX not found\n"); ++printf("MUX not found\n"); + return -ENODEV; + } + priv->width = chip->width; + + if (!priv->width) { +- debug("No I2C MUX width specified\n"); ++printf("No I2C MUX width specified\n"); + return -EINVAL; + } + +- debug("Device %s at 0x%x with width %d\n", ++printf("Device %s at 0x%x with width %d\n", + dev->name, priv->addr, priv->width); + + return 0; +diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c +index 20c5de000..17380d987 100644 +--- a/drivers/i2c/mv_i2c.c ++++ b/drivers/i2c/mv_i2c.c +@@ -201,37 +201,37 @@ static int i2c_transfer(struct mv_i2c *base, struct mv_i2c_msg *msg) + return 0; + + transfer_error_msg_empty: +- debug("i2c_transfer: error: 'msg' is empty\n"); ++printf("i2c_transfer: error: 'msg' is empty\n"); + ret = -1; + goto i2c_transfer_finish; + + transfer_error_transmit_timeout: +- debug("i2c_transfer: error: transmit timeout\n"); ++printf("i2c_transfer: error: transmit timeout\n"); + ret = -2; + goto i2c_transfer_finish; + + transfer_error_ack_missing: +- debug("i2c_transfer: error: ACK missing\n"); ++printf("i2c_transfer: error: ACK missing\n"); + ret = -3; + goto i2c_transfer_finish; + + transfer_error_receive_timeout: +- debug("i2c_transfer: error: receive timeout\n"); ++printf("i2c_transfer: error: receive timeout\n"); + ret = -4; + goto i2c_transfer_finish; + + transfer_error_illegal_param: +- debug("i2c_transfer: error: illegal parameters\n"); ++printf("i2c_transfer: error: illegal parameters\n"); + ret = -5; + goto i2c_transfer_finish; + + transfer_error_bus_busy: +- debug("i2c_transfer: error: bus is busy\n"); ++printf("i2c_transfer: error: bus is busy\n"); + ret = -6; + goto i2c_transfer_finish; + + i2c_transfer_finish: +- debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr)); ++printf("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr)); + i2c_reset(base); + return ret; + } +@@ -241,7 +241,7 @@ static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + { + struct mv_i2c_msg msg; + +- debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, " ++printf("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, " + "len=0x%02x)\n", chip, *addr, alen, len); + + if (len == 0) { +@@ -252,7 +252,7 @@ static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + i2c_reset(base); + + /* dummy chip address write */ +- debug("i2c_read: dummy chip address write\n"); ++printf("i2c_read: dummy chip address write\n"); + msg.condition = I2C_COND_START; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; +@@ -266,7 +266,7 @@ static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + * alen defines how much bytes we have to send. + */ + while (--alen >= 0) { +- debug("i2c_read: send address byte %02x (alen=%d)\n", ++printf("i2c_read: send address byte %02x (alen=%d)\n", + *addr, alen); + msg.condition = I2C_COND_NORMAL; + msg.acknack = I2C_ACKNAK_WAITACK; +@@ -277,7 +277,7 @@ static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + } + + /* start read sequence */ +- debug("i2c_read: start read sequence\n"); ++printf("i2c_read: start read sequence\n"); + msg.condition = I2C_COND_START; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; +@@ -302,7 +302,7 @@ static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + return -1; + + *buffer = msg.data; +- debug("i2c_read: reading byte (%p)=0x%02x\n", ++printf("i2c_read: reading byte (%p)=0x%02x\n", + buffer, *buffer); + buffer++; + } +@@ -317,13 +317,13 @@ static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + { + struct mv_i2c_msg msg; + +- debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, " ++printf("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, " + "len=0x%02x)\n", chip, *addr, alen, len); + + i2c_reset(base); + + /* chip address write */ +- debug("i2c_write: chip address write\n"); ++printf("i2c_write: chip address write\n"); + msg.condition = I2C_COND_START; + msg.acknack = I2C_ACKNAK_WAITACK; + msg.direction = I2C_WRITE; +@@ -337,7 +337,7 @@ static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + * alen defines how much bytes we have to send. + */ + while (--alen >= 0) { +- debug("i2c_read: send address byte %02x (alen=%d)\n", ++printf("i2c_read: send address byte %02x (alen=%d)\n", + *addr, alen); + msg.condition = I2C_COND_NORMAL; + msg.acknack = I2C_ACKNAK_WAITACK; +@@ -349,7 +349,7 @@ static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen, + + /* write bytes; send NACK at last byte */ + while (len--) { +- debug("i2c_write: writing byte (%p)=0x%02x\n", ++printf("i2c_write: writing byte (%p)=0x%02x\n", + buffer, *buffer); + + if (len == 0) +@@ -547,7 +547,7 @@ static int mv_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + * actual data) or one message (just data or offset/data combined) + */ + if (nmsgs > 2 || nmsgs == 0) { +- debug("%s: Only one or two messages are supported.", __func__); ++printf("%s: Only one or two messages are supported.", __func__); + return -1; + } + +diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c +index d33e2c7c9..9ef874365 100644 +--- a/drivers/i2c/mvtwsi.c ++++ b/drivers/i2c/mvtwsi.c +@@ -853,7 +853,7 @@ static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + /* We expect either two messages (one with an offset and one with the + * actual data) or one message (just data or offset/data combined) */ + if (nmsgs > 2 || nmsgs == 0) { +- debug("%s: Only one or two messages are supported.", __func__); ++printf("%s: Only one or two messages are supported.", __func__); + return -1; + } + +diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c +index 003aa33f6..419126f4a 100644 +--- a/drivers/i2c/mxc_i2c.c ++++ b/drivers/i2c/mxc_i2c.c +@@ -544,17 +544,17 @@ static int i2c_write_data(struct mxc_i2c_bus *i2c_bus, u8 chip, const u8 *buf, + { + int i, ret = 0; + +- debug("i2c_write_data: chip=0x%x, len=0x%x\n", chip, len); +- debug("write_data: "); ++printf("i2c_write_data: chip=0x%x, len=0x%x\n", chip, len); ++printf("write_data: "); + /* use rc for counter */ + for (i = 0; i < len; ++i) +- debug(" 0x%02x", buf[i]); +- debug("\n"); ++printf(" 0x%02x", buf[i]); ++printf("\n"); + + for (i = 0; i < len; i++) { + ret = tx_byte(i2c_bus, buf[i]); + if (ret < 0) { +- debug("i2c_write_data(): rc=%d\n", ret); ++printf("i2c_write_data(): rc=%d\n", ret); + break; + } + } +@@ -577,7 +577,7 @@ static int i2c_read_data(struct mxc_i2c_bus *i2c_bus, uchar chip, uchar *buf, + VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; + ulong base = i2c_bus->base; + +- debug("i2c_read_data: chip=0x%x, len=0x%x\n", chip, len); ++printf("i2c_read_data: chip=0x%x, len=0x%x\n", chip, len); + + /* setup bus to read data */ + temp = readb(base + (I2CR << reg_shift)); +@@ -593,7 +593,7 @@ static int i2c_read_data(struct mxc_i2c_bus *i2c_bus, uchar chip, uchar *buf, + for (i = 0; i < len; i++) { + ret = wait_for_sr_state(i2c_bus, ST_IIF); + if (ret < 0) { +- debug("i2c_read_data(): ret=%d\n", ret); ++printf("i2c_read_data(): ret=%d\n", ret); + i2c_imx_stop(i2c_bus); + return ret; + } +@@ -629,8 +629,8 @@ static int i2c_read_data(struct mxc_i2c_bus *i2c_bus, uchar chip, uchar *buf, + + /* reuse ret for counter*/ + for (ret = 0; ret < len; ++ret) +- debug(" 0x%02x", buf[ret]); +- debug("\n"); ++printf(" 0x%02x", buf[ret]); ++printf("\n"); + + /* It is not clear to me that this is necessary */ + if (last) +@@ -766,7 +766,7 @@ void bus_i2c_init(int index, int speed, int unused, + int ret; + + if (index >= ARRAY_SIZE(mxc_i2c_buses)) { +- debug("Error i2c index\n"); ++printf("Error i2c index\n"); + return; + } + +@@ -791,7 +791,7 @@ void bus_i2c_init(int index, int speed, int unused, + + ret = enable_i2c_clk(1, index); + if (ret < 0) { +- debug("I2C-%d clk fail to enable.\n", index); ++printf("I2C-%d clk fail to enable.\n", index); + return; + } + +@@ -942,7 +942,7 @@ static int mxc_i2c_probe(struct udevice *bus) + */ + ret = fdt_stringlist_search(fdt, node, "pinctrl-names", "gpio"); + if (ret < 0) { +- debug("i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", ++printf("i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", + dev_seq(bus), i2c_bus->base); + } else { + ret = gpio_request_by_name_nodev(offset_to_ofnode(node), +@@ -966,7 +966,7 @@ static int mxc_i2c_probe(struct udevice *bus) + * we can set pinmux here in probe function. + */ + +- debug("i2c : controller bus %d at %lu , speed %d: ", ++printf("i2c : controller bus %d at %lu , speed %d: ", + dev_seq(bus), i2c_bus->base, + i2c_bus->speed); + +@@ -982,7 +982,7 @@ static int mxc_i2c_probe_chip(struct udevice *bus, u32 chip_addr, + + ret = i2c_init_transfer(i2c_bus, chip_addr, 0, 0); + if (ret < 0) { +- debug("%s failed, ret = %d\n", __func__, ret); ++printf("%s failed, ret = %d\n", __func__, ret); + return ret; + } + +@@ -1006,7 +1006,7 @@ static int mxc_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + */ + ret = i2c_init_transfer(i2c_bus, msg->addr, 0, -1); + if (ret < 0) { +- debug("i2c_init_transfer error: %d\n", ret); ++printf("i2c_init_transfer error: %d\n", ret); + return ret; + } + +@@ -1014,22 +1014,22 @@ static int mxc_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + for (; nmsgs > 0; nmsgs--, msg++) { + const int msg_is_read = !!(msg->flags & I2C_M_RD); + +- debug("i2c_xfer: chip=0x%x, len=0x%x, dir=%c\n", msg->addr, ++printf("i2c_xfer: chip=0x%x, len=0x%x, dir=%c\n", msg->addr, + msg->len, msg_is_read ? 'R' : 'W'); + + if (msg_is_read != read_mode) { + /* Send repeated start if not 1st message */ + if (read_mode != -1) { +- debug("i2c_xfer: [RSTART]\n"); ++printf("i2c_xfer: [RSTART]\n"); + ret = readb(base + (I2CR << reg_shift)); + ret |= I2CR_RSTA; + writeb(ret, base + (I2CR << reg_shift)); + } +- debug("i2c_xfer: [ADDR %02x | %c]\n", msg->addr, ++printf("i2c_xfer: [ADDR %02x | %c]\n", msg->addr, + msg_is_read ? 'R' : 'W'); + ret = tx_byte(i2c_bus, (msg->addr << 1) | msg_is_read); + if (ret < 0) { +- debug("i2c_xfer: [STOP]\n"); ++printf("i2c_xfer: [STOP]\n"); + i2c_imx_stop(i2c_bus); + break; + } +@@ -1049,7 +1049,7 @@ static int mxc_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + } + + if (ret) +- debug("i2c_write: error sending\n"); ++printf("i2c_write: error sending\n"); + + i2c_imx_stop(i2c_bus); + +diff --git a/drivers/i2c/nx_i2c.c b/drivers/i2c/nx_i2c.c +index 07cda0fa6..0abcf4f65 100644 +--- a/drivers/i2c/nx_i2c.c ++++ b/drivers/i2c/nx_i2c.c +@@ -105,7 +105,7 @@ static uint i2c_set_clk(struct nx_i2c_bus *bus, uint enb) + sprintf(name, "%s.%d", DEV_NAME_I2C, bus->bus_num); + clk = clk_get((const char *)name); + if (!clk) { +- debug("%s(): clk_get(%s) error!\n", ++printf("%s(): clk_get(%s) error!\n", + __func__, (const char *)name); + return -EINVAL; + } +@@ -139,11 +139,11 @@ static int nx_i2c_set_sda_delay(struct nx_i2c_bus *bus) + /* max. possible register value = 3 */ + if (delay > SDADLY_MAX) { + delay = SDADLY_MAX; +- debug("%s(): sda-delay des.: %dns, sat. to max.: %dns (granularity: %dns)\n", ++printf("%s(): sda-delay des.: %dns, sat. to max.: %dns (granularity: %dns)\n", + __func__, bus->sda_delay, t_pclk * delay * SDADLY_CLKSTEP, + t_pclk * SDADLY_CLKSTEP); + } else { +- debug("%s(): sda-delay des.: %dns, act.: %dns (granularity: %dns)\n", ++printf("%s(): sda-delay des.: %dns, act.: %dns (granularity: %dns)\n", + __func__, bus->sda_delay, t_pclk * delay * SDADLY_CLKSTEP, + t_pclk * SDADLY_CLKSTEP); + } +@@ -151,7 +151,7 @@ static int nx_i2c_set_sda_delay(struct nx_i2c_bus *bus) + delay |= I2CLC_FILTER; + } else { + delay = 0; +- debug("%s(): sda-delay = 0\n", __func__); ++printf("%s(): sda-delay = 0\n", __func__); + } + + delay &= 0x7; +@@ -184,11 +184,11 @@ static int nx_i2c_set_bus_speed(struct udevice *dev, uint speed) + div++; + + if (div > 0xF) { +- debug("%s(): pres==%ld, div==0x%lx is saturated to 0xF !)\n", ++printf("%s(): pres==%ld, div==0x%lx is saturated to 0xF !)\n", + __func__, pres, div); + div = 0xF; + } else { +- debug("%s(): pres==%ld, div==0x%lx)\n", __func__, pres, div); ++printf("%s(): pres==%ld, div==0x%lx)\n", __func__, pres, div); + } + + /* set Tx-clock divisor and prescaler values */ +@@ -204,7 +204,7 @@ static int nx_i2c_set_bus_speed(struct udevice *dev, uint speed) + + /* calculate actual I2C speed [Hz] */ + bus->speed = pclk / ((div + 1) * pres); +- debug("%s(): speed des.: %dHz, act.: %dHz\n", ++printf("%s(): speed des.: %dHz, act.: %dHz\n", + __func__, speed, bus->speed); + + #ifdef CONFIG_ARCH_S5P6818 +@@ -262,7 +262,7 @@ static int i2c_is_busy(struct nx_i2c_regs *i2c) + start_time = get_timer(0); + while (readl(&i2c->iicstat) & I2CSTAT_BSY) { + if (get_timer(start_time) > I2C_TIMEOUT_MS) { +- debug("Timeout\n"); ++printf("Timeout\n"); + return -EBUSY; + } + } +@@ -391,7 +391,7 @@ static int i2c_transfer(struct nx_i2c_regs *i2c, + /* Wait for chip address to transmit. */ + result = wait_for_xfer(i2c); + if (result) { +- debug("%s: transmitting chip address failed\n", __func__); ++printf("%s: transmitting chip address failed\n", __func__); + goto bailout; + } + +@@ -405,7 +405,7 @@ static int i2c_transfer(struct nx_i2c_regs *i2c, + + i = 0; + if (result) { +- debug("%s: transmitting register address failed\n", ++printf("%s: transmitting register address failed\n", + __func__); + goto bailout; + } +@@ -433,7 +433,7 @@ static int i2c_transfer(struct nx_i2c_regs *i2c, + i2c_clear_irq(i2c); + result = wait_for_xfer(i2c); + if (result) { +- debug("%s: I2C_READ: sending chip addr. failed\n", ++printf("%s: I2C_READ: sending chip addr. failed\n", + __func__); + goto bailout; + } +@@ -453,14 +453,14 @@ static int i2c_transfer(struct nx_i2c_regs *i2c, + /* Not Acknowledged --> normal terminated read. */ + result = 0; + else if (result == -ETIMEDOUT) +- debug("%s: I2C_READ: time out\n", __func__); ++printf("%s: I2C_READ: time out\n", __func__); + else +- debug("%s: I2C_READ: read not terminated with NACK\n", ++printf("%s: I2C_READ: read not terminated with NACK\n", + __func__); + break; + + default: +- debug("%s: bad call\n", __func__); ++printf("%s: bad call\n", __func__); + result = -EINVAL; + break; + } +@@ -481,7 +481,7 @@ static int nx_i2c_read(struct udevice *dev, uchar chip_addr, uint addr, + return -EFAULT; + + if (alen > 4) { +- debug("I2C read: addr len %d not supported\n", alen); ++printf("I2C read: addr len %d not supported\n", alen); + return -EADDRNOTAVAIL; + } + +@@ -499,7 +499,7 @@ static int nx_i2c_read(struct udevice *dev, uchar chip_addr, uint addr, + &xaddr[4 - alen], alen, buffer, len, seq); + + if (ret) { +- debug("I2C read failed %d\n", ret); ++printf("I2C read failed %d\n", ret); + return -EIO; + } + +@@ -518,7 +518,7 @@ static int nx_i2c_write(struct udevice *dev, uchar chip_addr, uint addr, + return -EFAULT; + + if (alen > 4) { +- debug("I2C write: addr len %d not supported\n", alen); ++printf("I2C write: addr len %d not supported\n", alen); + return -EINVAL; + } + +@@ -532,7 +532,7 @@ static int nx_i2c_write(struct udevice *dev, uchar chip_addr, uint addr, + ret = i2c_transfer(i2c->regs, I2C_WRITE, chip_addr << 1, + &xaddr[4 - alen], alen, buffer, len, seq); + if (ret) { +- debug("I2C write failed %d\n", ret); ++printf("I2C write failed %d\n", ret); + return -EIO; + } + +@@ -563,7 +563,7 @@ static int nx_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) + } + + if (ret) { +- debug("i2c_xfer: error sending\n"); ++printf("i2c_xfer: error sending\n"); + ret = -EREMOTEIO; + } + } +diff --git a/drivers/i2c/ocores_i2c.c b/drivers/i2c/ocores_i2c.c +index 088ba9a6a..669e6f6da 100644 +--- a/drivers/i2c/ocores_i2c.c ++++ b/drivers/i2c/ocores_i2c.c +@@ -297,7 +297,7 @@ static int ocores_poll_wait(struct ocores_i2c_bus *i2c) + */ + err = ocores_wait(i2c, OCI2C_STATUS, mask, 0, 1); + if (err) +- debug("%s: STATUS timeout, bit 0x%x did not clear in 1ms\n", ++printf("%s: STATUS timeout, bit 0x%x did not clear in 1ms\n", + __func__, mask); + return err; + } +@@ -364,12 +364,12 @@ static int ocores_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) + struct ocores_i2c_bus *bus = dev_get_priv(dev); + int ret; + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + + ret = ocores_xfer_core(bus, msg, nmsgs, 1); + + if (ret != nmsgs) { +- debug("i2c_write: error sending\n"); ++printf("i2c_write: error sending\n"); + return -EREMOTEIO; + } + +@@ -416,7 +416,7 @@ static int ocores_init(struct udevice *dev, struct ocores_i2c_bus *bus) + + diff = bus->ip_clk_khz / (5 * (prescale + 1)) - bus->bus_clk_khz; + if (abs(diff) > bus->bus_clk_khz / 10) { +- debug("Unsupported clock settings: core: %d KHz, bus: %d KHz\n", ++printf("Unsupported clock settings: core: %d KHz, bus: %d KHz\n", + bus->ip_clk_khz, bus->bus_clk_khz); + return -EINVAL; + } +@@ -483,7 +483,7 @@ static int ocores_i2c_set_bus_speed(struct udevice *dev, unsigned int speed) + + diff = bus->ip_clk_khz / (5 * (prescale + 1)) - speed; + if (abs(diff) > speed / 10) { +- debug("Unsupported clock settings: core: %d KHz, bus: %d KHz\n", ++printf("Unsupported clock settings: core: %d KHz, bus: %d KHz\n", + bus->ip_clk_khz, speed); + return -EINVAL; + } +@@ -567,7 +567,7 @@ static int ocores_i2c_probe(struct udevice *dev) + bus->reg_io_width = dev_read_u32_default(dev, "reg-io-width", 1); + + if (dev_get_driver_data(dev) == TYPE_GRLIB) { +- debug("GRLIB variant of i2c-ocores\n"); ++printf("GRLIB variant of i2c-ocores\n"); + bus->setreg = oc_setreg_grlib; + bus->getreg = oc_getreg_grlib; + } +@@ -592,7 +592,7 @@ static int ocores_i2c_probe(struct udevice *dev) + break; + + default: +- debug("Unsupported I/O width (%d)\n", ++printf("Unsupported I/O width (%d)\n", + bus->reg_io_width); + ret = -EINVAL; + goto err_clk; +diff --git a/drivers/i2c/octeon_i2c.c b/drivers/i2c/octeon_i2c.c +index ea2cc33f9..21065e8d3 100644 +--- a/drivers/i2c/octeon_i2c.c ++++ b/drivers/i2c/octeon_i2c.c +@@ -258,14 +258,14 @@ static u64 twsi_write_sw(void __iomem *base, u64 val) + val &= ~TWSI_SW_R; + val |= TWSI_SW_V; + +- debug("%s(%p, 0x%llx)\n", __func__, base, val); ++printf("%s(%p, 0x%llx)\n", __func__, base, val); + writeq(val, base + TWSI_SW_TWSI); + do { + val = readq(base + TWSI_SW_TWSI); + } while ((val & TWSI_SW_V) && (get_timer(start) < 50)); + + if (val & TWSI_SW_V) +- debug("%s: timed out\n", __func__); ++printf("%s: timed out\n", __func__); + return val; + } + +@@ -282,7 +282,7 @@ static u64 twsi_read_sw(void __iomem *base, u64 val) + + val |= TWSI_SW_R | TWSI_SW_V; + +- debug("%s(%p, 0x%llx)\n", __func__, base, val); ++printf("%s(%p, 0x%llx)\n", __func__, base, val); + writeq(val, base + TWSI_SW_TWSI); + + do { +@@ -290,9 +290,9 @@ static u64 twsi_read_sw(void __iomem *base, u64 val) + } while ((val & TWSI_SW_V) && (get_timer(start) < 50)); + + if (val & TWSI_SW_V) +- debug("%s: Error writing 0x%llx\n", __func__, val); ++printf("%s: Error writing 0x%llx\n", __func__, val); + +- debug("%s: Returning 0x%llx\n", __func__, val); ++printf("%s: Returning 0x%llx\n", __func__, val); + return val; + } + +@@ -306,7 +306,7 @@ static void twsi_write_ctl(void __iomem *base, u8 data) + { + u64 val; + +- debug("%s(%p, 0x%x)\n", __func__, base, data); ++printf("%s(%p, 0x%x)\n", __func__, base, data); + val = data | FIELD_PREP(TWSI_SW_EOP_IA_MASK, TWSI_CTL) | + FIELD_PREP(TWSI_SW_OP_MASK, TWSI_SW_EOP_IA); + twsi_write_sw(base, val); +@@ -326,7 +326,7 @@ static u8 twsi_read_ctl(void __iomem *base) + FIELD_PREP(TWSI_SW_OP_MASK, TWSI_SW_EOP_IA); + val = twsi_read_sw(base, val); + +- debug("%s(%p): 0x%x\n", __func__, base, (u8)val); ++printf("%s(%p): 0x%x\n", __func__, base, (u8)val); + return (u8)val; + } + +@@ -357,13 +357,13 @@ static int twsi_wait(void __iomem *base) + unsigned long start = get_timer(0); + u8 twsi_ctl; + +- debug("%s(%p)\n", __func__, base); ++printf("%s(%p)\n", __func__, base); + do { + twsi_ctl = twsi_read_ctl(base); + twsi_ctl &= TWSI_CTL_IFLG; + } while (!twsi_ctl && get_timer(start) < 50); + +- debug(" return: %u\n", !twsi_ctl); ++printf(" return: %u\n", !twsi_ctl); + return !twsi_ctl; + } + +@@ -391,12 +391,12 @@ static int twsi_start(void __iomem *base) + int ret; + u8 stat; + +- debug("%s(%p)\n", __func__, base); ++printf("%s(%p)\n", __func__, base); + twsi_write_ctl(base, TWSI_CTL_STA | TWSI_CTL_ENAB); + ret = twsi_wait(base); + if (ret) { + stat = twsi_read_status(base); +- debug("%s: ret: 0x%x, status: 0x%x\n", __func__, ret, stat); ++printf("%s: ret: 0x%x, status: 0x%x\n", __func__, ret, stat); + switch (stat) { + case TWSI_STAT_START: + case TWSI_STAT_RSTART: +@@ -407,7 +407,7 @@ static int twsi_start(void __iomem *base) + } + } + +- debug("%s: success\n", __func__); ++printf("%s: success\n", __func__); + return 0; + } + +@@ -425,7 +425,7 @@ static int twsi_stop(void __iomem *base) + + stat = twsi_read_status(base); + if (stat != TWSI_STAT_IDLE) { +- debug("%s: Bad status on bus@%p\n", __func__, base); ++printf("%s: Bad status on bus@%p\n", __func__, base); + return -1; + } + +@@ -448,17 +448,17 @@ static int twsi_write_data(void __iomem *base, u8 slave_addr, + u64 val; + int ret; + +- debug("%s(%p, 0x%x, %p, 0x%x)\n", __func__, base, slave_addr, ++printf("%s(%p, 0x%x, %p, 0x%x)\n", __func__, base, slave_addr, + buffer, length); + ret = twsi_start(base); + if (ret) { +- debug("%s: Could not start BUS transaction\n", __func__); ++printf("%s: Could not start BUS transaction\n", __func__); + return -1; + } + + ret = twsi_wait(base); + if (ret) { +- debug("%s: wait failed\n", __func__); ++printf("%s: wait failed\n", __func__); + return ret; + } + +@@ -468,18 +468,18 @@ static int twsi_write_data(void __iomem *base, u8 slave_addr, + twsi_write_sw(base, val); + twsi_write_ctl(base, TWSI_CTL_ENAB); + +- debug("%s: Waiting\n", __func__); ++printf("%s: Waiting\n", __func__); + ret = twsi_wait(base); + if (ret) { +- debug("%s: Timed out writing slave address 0x%x to target\n", ++printf("%s: Timed out writing slave address 0x%x to target\n", + __func__, slave_addr); + return ret; + } + + ret = twsi_read_status(base); +- debug("%s: status: 0x%x\n", __func__, ret); ++printf("%s: status: 0x%x\n", __func__, ret); + if (ret != TWSI_STAT_TXADDR_ACK) { +- debug("%s: status: 0x%x\n", __func__, ret); ++printf("%s: status: 0x%x\n", __func__, ret); + twsi_stop(base); + return twsi_i2c_lost_arb(ret, 0); + } +@@ -491,19 +491,19 @@ static int twsi_write_data(void __iomem *base, u8 slave_addr, + twsi_write_sw(base, val); + twsi_write_ctl(base, TWSI_CTL_ENAB); + +- debug("%s: Writing 0x%llx\n", __func__, val); ++printf("%s: Writing 0x%llx\n", __func__, val); + + ret = twsi_wait(base); + if (ret) { +- debug("%s: Timed out writing data to 0x%x\n", ++printf("%s: Timed out writing data to 0x%x\n", + __func__, slave_addr); + return ret; + } + ret = twsi_read_status(base); +- debug("%s: status: 0x%x\n", __func__, ret); ++printf("%s: status: 0x%x\n", __func__, ret); + } + +- debug("%s: Stopping\n", __func__); ++printf("%s: Stopping\n", __func__); + return twsi_stop(base); + } + +@@ -546,17 +546,17 @@ static int twsi_read_data(void __iomem *base, u8 slave_addr, + u64 val; + int ret; + +- debug("%s(%p, 0x%x, %p, %u)\n", __func__, base, slave_addr, ++printf("%s(%p, 0x%x, %p, %u)\n", __func__, base, slave_addr, + buffer, length); + ret = twsi_start(base); + if (ret) { +- debug("%s: start failed\n", __func__); ++printf("%s: start failed\n", __func__); + return ret; + } + + ret = twsi_wait(base); + if (ret) { +- debug("%s: wait failed\n", __func__); ++printf("%s: wait failed\n", __func__); + return ret; + } + +@@ -568,14 +568,14 @@ static int twsi_read_data(void __iomem *base, u8 slave_addr, + + ret = twsi_wait(base); + if (ret) { +- debug("%s: waiting for sending addr failed\n", __func__); ++printf("%s: waiting for sending addr failed\n", __func__); + return ret; + } + + ret = twsi_read_status(base); +- debug("%s: status: 0x%x\n", __func__, ret); ++printf("%s: status: 0x%x\n", __func__, ret); + if (ret != TWSI_STAT_RXADDR_ACK) { +- debug("%s: status: 0x%x\n", __func__, ret); ++printf("%s: status: 0x%x\n", __func__, ret); + twsi_stop(base); + return twsi_i2c_lost_arb(ret, 0); + } +@@ -586,7 +586,7 @@ static int twsi_read_data(void __iomem *base, u8 slave_addr, + + ret = twsi_wait(base); + if (ret) { +- debug("%s: waiting for data failed\n", __func__); ++printf("%s: waiting for data failed\n", __func__); + return ret; + } + +@@ -622,7 +622,7 @@ static void twsi_calc_div(struct udevice *bus, ulong sclk, unsigned int speed, + sclk = 100000000; /* 100 Mhz */ + tclk = sclk / (thp + 2); + } +- debug("%s( io_clock %lu tclk %u)\n", __func__, sclk, tclk); ++printf("%s( io_clock %lu tclk %u)\n", __func__, sclk, tclk); + + /* + * Compute the clocks M divider: +@@ -657,7 +657,7 @@ static int twsi_init(void __iomem *base, int slaveaddr) + { + u64 val; + +- debug("%s (%p, 0x%x)\n", __func__, base, slaveaddr); ++printf("%s (%p, 0x%x)\n", __func__, base, slaveaddr); + + val = slaveaddr << 1 | + FIELD_PREP(TWSI_SW_EOP_IA_MASK, 0) | +@@ -690,22 +690,22 @@ static int octeon_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + int ret; + int i; + +- debug("%s: %d messages\n", __func__, nmsgs); ++printf("%s: %d messages\n", __func__, nmsgs); + for (i = 0; i < nmsgs; i++, msg++) { +- debug("%s: chip=0x%x, len=0x%x\n", __func__, msg->addr, ++printf("%s: chip=0x%x, len=0x%x\n", __func__, msg->addr, + msg->len); + + if (msg->flags & I2C_M_RD) { +- debug("%s: Reading data\n", __func__); ++printf("%s: Reading data\n", __func__); + ret = twsi_read_data(twsi->base, msg->addr, + msg->buf, msg->len); + } else { +- debug("%s: Writing data\n", __func__); ++printf("%s: Writing data\n", __func__); + ret = twsi_write_data(twsi->base, msg->addr, + msg->buf, msg->len); + } + if (ret) { +- debug("%s: error sending\n", __func__); ++printf("%s: error sending\n", __func__); + return -EREMOTEIO; + } + } +@@ -727,7 +727,7 @@ static int octeon_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) + ulong clk_rate; + u64 val; + +- debug("%s(%p, %u)\n", __func__, bus, speed); ++printf("%s(%p, %u)\n", __func__, bus, speed); + + clk_rate = clk_get_rate(&twsi->clk); + if (IS_ERR_VALUE(clk_rate)) +@@ -744,7 +744,7 @@ static int octeon_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) + /* Only init non-slave ports */ + writeq(val, twsi->base + TWSI_SW_TWSI); + +- debug("%s: Wrote 0x%llx to sw_twsi\n", __func__, val); ++printf("%s: Wrote 0x%llx to sw_twsi\n", __func__, val); + return 0; + } + +@@ -790,7 +790,7 @@ static int octeon_i2c_probe(struct udevice *dev) + if (twsi->data->probe == PROBE_PCI) { + pci_dev_t bdf = dm_pci_get_bdf(dev); + +- debug("TWSI PCI device: %x\n", bdf); ++printf("TWSI PCI device: %x\n", bdf); + + twsi->base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, + PCI_REGION_MEM); +@@ -810,7 +810,7 @@ static int octeon_i2c_probe(struct udevice *dev) + if (ret) + return ret; + +- debug("TWSI bus %d at %p\n", dev_seq(dev), twsi->base); ++printf("TWSI bus %d at %p\n", dev_seq(dev), twsi->base); + + /* Start with standard speed, real speed set via DT or cmd */ + return twsi_init(twsi->base, i2c_slave_addr); +diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c +index 71f6f5f7a..451a8da21 100644 +--- a/drivers/i2c/omap24xx_i2c.c ++++ b/drivers/i2c/omap24xx_i2c.c +@@ -206,7 +206,7 @@ static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed) + *psch = internal_clk / (speed * 2) - I2C_FASTSPEED_SCLH_TRIM; + } + +- debug("%s: speed [kHz]: %d psc: 0x%x sscl: 0x%x ssch: 0x%x\n", ++printf("%s: speed [kHz]: %d psc: 0x%x sscl: 0x%x ssch: 0x%x\n", + __func__, speed, prescaler, *pscl, *psch); + + if (*pscl <= 0 || *psch <= 0 || prescaler <= 0) +@@ -1004,9 +1004,9 @@ static int omap_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + struct omap_i2c *priv = dev_get_priv(bus); + int ret; + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + for (; nmsgs > 0; nmsgs--, msg++) { +- debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); ++printf("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); + if (msg->flags & I2C_M_RD) { + ret = __omap24_i2c_read(priv->regs, priv->ip_rev, + priv->waitdelay, +@@ -1019,7 +1019,7 @@ static int omap_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) + msg->len); + } + if (ret) { +- debug("i2c_write: error sending\n"); ++printf("i2c_write: error sending\n"); + return -EREMOTEIO; + } + } +diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c +index f8fac45b6..b70314dae 100644 +--- a/drivers/i2c/rk_i2c.c ++++ b/drivers/i2c/rk_i2c.c +@@ -74,10 +74,10 @@ static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate) + rk_i2c_get_div(div, &divh, &divl); + writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv); + +- debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate, ++printf("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate, + scl_rate); +- debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl); +- debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv)); ++printf("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl); ++printf("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv)); + } + + static void rk_i2c_show_regs(struct i2c_regs *regs) +@@ -85,19 +85,19 @@ static void rk_i2c_show_regs(struct i2c_regs *regs) + #ifdef DEBUG + uint i; + +- debug("i2c_con: 0x%08x\n", readl(®s->con)); +- debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv)); +- debug("i2c_mrxaddr: 0x%08x\n", readl(®s->mrxaddr)); +- debug("i2c_mrxraddR: 0x%08x\n", readl(®s->mrxraddr)); +- debug("i2c_mtxcnt: 0x%08x\n", readl(®s->mtxcnt)); +- debug("i2c_mrxcnt: 0x%08x\n", readl(®s->mrxcnt)); +- debug("i2c_ien: 0x%08x\n", readl(®s->ien)); +- debug("i2c_ipd: 0x%08x\n", readl(®s->ipd)); +- debug("i2c_fcnt: 0x%08x\n", readl(®s->fcnt)); ++printf("i2c_con: 0x%08x\n", readl(®s->con)); ++printf("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv)); ++printf("i2c_mrxaddr: 0x%08x\n", readl(®s->mrxaddr)); ++printf("i2c_mrxraddR: 0x%08x\n", readl(®s->mrxraddr)); ++printf("i2c_mtxcnt: 0x%08x\n", readl(®s->mtxcnt)); ++printf("i2c_mrxcnt: 0x%08x\n", readl(®s->mrxcnt)); ++printf("i2c_ien: 0x%08x\n", readl(®s->ien)); ++printf("i2c_ipd: 0x%08x\n", readl(®s->ipd)); ++printf("i2c_fcnt: 0x%08x\n", readl(®s->fcnt)); + for (i = 0; i < 8; i++) +- debug("i2c_txdata%d: 0x%08x\n", i, readl(®s->txdata[i])); ++printf("i2c_txdata%d: 0x%08x\n", i, readl(®s->txdata[i])); + for (i = 0; i < 8; i++) +- debug("i2c_rxdata%d: 0x%08x\n", i, readl(®s->rxdata[i])); ++printf("i2c_rxdata%d: 0x%08x\n", i, readl(®s->rxdata[i])); + #endif + } + +@@ -106,7 +106,7 @@ static int rk_i2c_send_start_bit(struct rk_i2c *i2c) + struct i2c_regs *regs = i2c->regs; + ulong start; + +- debug("I2c Send Start bit.\n"); ++printf("I2c Send Start bit.\n"); + writel(I2C_IPD_ALL_CLEAN, ®s->ipd); + + writel(I2C_CON_EN | I2C_CON_START, ®s->con); +@@ -119,7 +119,7 @@ static int rk_i2c_send_start_bit(struct rk_i2c *i2c) + break; + } + if (get_timer(start) > I2C_TIMEOUT_MS) { +- debug("I2C Send Start Bit Timeout\n"); ++printf("I2C Send Start Bit Timeout\n"); + rk_i2c_show_regs(regs); + return -ETIMEDOUT; + } +@@ -134,7 +134,7 @@ static int rk_i2c_send_stop_bit(struct rk_i2c *i2c) + struct i2c_regs *regs = i2c->regs; + ulong start; + +- debug("I2c Send Stop bit.\n"); ++printf("I2c Send Stop bit.\n"); + writel(I2C_IPD_ALL_CLEAN, ®s->ipd); + + writel(I2C_CON_EN | I2C_CON_STOP, ®s->con); +@@ -147,7 +147,7 @@ static int rk_i2c_send_stop_bit(struct rk_i2c *i2c) + break; + } + if (get_timer(start) > I2C_TIMEOUT_MS) { +- debug("I2C Send Start Bit Timeout\n"); ++printf("I2C Send Start Bit Timeout\n"); + rk_i2c_show_regs(regs); + return -ETIMEDOUT; + } +@@ -177,7 +177,7 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, + int err; + bool snd_chunk = false; + +- debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n", ++printf("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n", + chip, reg, r_len, b_len); + + err = rk_i2c_send_start_bit(i2c); +@@ -190,7 +190,7 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, + } else if (r_len < 4) { + writel(I2C_MRXRADDR_SET(r_len, reg), ®s->mrxraddr); + } else { +- debug("I2C Read: addr len %d not supported\n", r_len); ++printf("I2C Read: addr len %d not supported\n", r_len); + return -EIO; + } + +@@ -231,7 +231,7 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, + break; + } + if (get_timer(start) > I2C_TIMEOUT_MS) { +- debug("I2C Read Data Timeout\n"); ++printf("I2C Read Data Timeout\n"); + err = -ETIMEDOUT; + rk_i2c_show_regs(regs); + goto i2c_exit; +@@ -241,7 +241,7 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, + + for (i = 0; i < words_xferred; i++) { + rxdata = readl(®s->rxdata[i]); +- debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata); ++printf("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata); + for (j = 0; j < 4; j++) { + if ((i * 4 + j) == bytes_xferred) + break; +@@ -251,7 +251,7 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, + + bytes_remain_len -= bytes_xferred; + snd_chunk = true; +- debug("I2C Read bytes_remain_len %d\n", bytes_remain_len); ++printf("I2C Read bytes_remain_len %d\n", bytes_remain_len); + } + + i2c_exit: +@@ -273,7 +273,7 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, + uint txdata; + uint i, j; + +- debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n", ++printf("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n", + chip, reg, r_len, b_len); + err = rk_i2c_send_start_bit(i2c); + if (err) +@@ -302,7 +302,7 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, + } + } + writel(txdata, ®s->txdata[i]); +- debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata); ++printf("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata); + } + + writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con); +@@ -320,7 +320,7 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, + break; + } + if (get_timer(start) > I2C_TIMEOUT_MS) { +- debug("I2C Write Data Timeout\n"); ++printf("I2C Write Data Timeout\n"); + err = -ETIMEDOUT; + rk_i2c_show_regs(regs); + goto i2c_exit; +@@ -329,7 +329,7 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, + } + + bytes_remain_len -= bytes_xferred; +- debug("I2C Write bytes_remain_len %d\n", bytes_remain_len); ++printf("I2C Write bytes_remain_len %d\n", bytes_remain_len); + } + + i2c_exit: +@@ -344,9 +344,9 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + struct rk_i2c *i2c = dev_get_priv(bus); + int ret; + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + for (; nmsgs > 0; nmsgs--, msg++) { +- debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); ++printf("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); + if (msg->flags & I2C_M_RD) { + ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf, + msg->len); +@@ -355,7 +355,7 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + msg->len); + } + if (ret) { +- debug("i2c_write: error sending\n"); ++printf("i2c_write: error sending\n"); + return -EREMOTEIO; + } + } +@@ -382,7 +382,7 @@ static int rockchip_i2c_of_to_plat(struct udevice *bus) + + ret = clk_get_by_index(bus, 0, &priv->clk); + if (ret < 0) { +- debug("%s: Could not get clock for %s: %d\n", __func__, ++printf("%s: Could not get clock for %s: %d\n", __func__, + bus->name, ret); + return ret; + } +@@ -405,21 +405,21 @@ static int rockchip_i2c_probe(struct udevice *bus) + if (soc_data->controller_type == RK_I2C_LEGACY) { + ret = dev_read_alias_seq(bus, &bus_nr); + if (ret < 0) { +- debug("%s: Could not get alias for %s: %d\n", ++printf("%s: Could not get alias for %s: %d\n", + __func__, bus->name, ret); + return ret; + } + + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); + if (ret) { +- debug("%s: Cannot find pinctrl device\n", __func__); ++printf("%s: Cannot find pinctrl device\n", __func__); + return ret; + } + + /* pinctrl will switch I2C to new type */ + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_I2C0 + bus_nr); + if (ret) { +- debug("%s: Failed to switch I2C to new type %s: %d\n", ++printf("%s: Failed to switch I2C to new type %s: %d\n", + __func__, bus->name, ret); + return ret; + } +diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c +index 56f0f6988..34b9869e3 100644 +--- a/drivers/i2c/s3c24x0_i2c.c ++++ b/drivers/i2c/s3c24x0_i2c.c +@@ -115,7 +115,7 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c, + + if (data == 0 || data_len == 0) { + /*Don't support data transfer of no length or to address 0 */ +- debug("i2c_transfer: bad call\n"); ++printf("i2c_transfer: bad call\n"); + return I2C_NOK; + } + +@@ -194,7 +194,7 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c, + break; + + default: +- debug("i2c_transfer: bad call\n"); ++printf("i2c_transfer: bad call\n"); + result = I2C_NOK; + break; + } +@@ -288,7 +288,7 @@ static int s3c24x0_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, + start_time = get_timer(0); + while (readl(&i2c->iicstat) & I2CSTAT_BSY) { + if (get_timer(start_time) > I2C_TIMEOUT_MS) { +- debug("Timeout\n"); ++printf("Timeout\n"); + return -ETIMEDOUT; + } + } +diff --git a/drivers/i2c/sandbox_i2c.c b/drivers/i2c/sandbox_i2c.c +index c99e6de93..76b4ec72e 100644 +--- a/drivers/i2c/sandbox_i2c.c ++++ b/drivers/i2c/sandbox_i2c.c +@@ -73,7 +73,7 @@ static int sandbox_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + is_read = nmsgs > 1; + if (i2c->speed_hz > (is_read ? I2C_SPEED_FAST_RATE : + I2C_SPEED_STANDARD_RATE)) { +- debug("%s: Max speed exceeded\n", __func__); ++printf("%s: Max speed exceeded\n", __func__); + return -EINVAL; + } + } +diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c +index 26a870066..5e623c82f 100644 +--- a/drivers/i2c/sh_i2c.c ++++ b/drivers/i2c/sh_i2c.c +@@ -107,7 +107,7 @@ static int sh_i2c_set_addr(struct sh_i2c *dev, u8 chip, u8 addr, int stop) + { + u8 icic = SH_IC_TACK; + +- debug("%s: chip: %x, addr: %x iccl: %x, icch %x\n", ++printf("%s: chip: %x, addr: %x iccl: %x, icch %x\n", + __func__, chip, addr, iccl, icch); + clrbits_8(&dev->iccr, SH_I2C_ICCR_ICE); + setbits_8(&dev->iccr, SH_I2C_ICCR_ICE); +@@ -235,7 +235,7 @@ sh_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) + else + icch = (u16)(num/denom); + +- debug("clock: %d, speed %d, iccl: %x, icch: %x\n", ++printf("clock: %d, speed %d, iccl: %x, icch: %x\n", + CONFIG_SH_I2C_CLOCK, speed, iccl, icch); + } + +@@ -251,7 +251,7 @@ static int sh_i2c_read(struct i2c_adapter *adap, uint8_t chip, + return -1; + + data[i] = ret & 0xff; +- debug("%s: data[%d]: %02x\n", __func__, i, data[i]); ++printf("%s: data[%d]: %02x\n", __func__, i, data[i]); + } + + return 0; +@@ -264,7 +264,7 @@ static int sh_i2c_write(struct i2c_adapter *adap, uint8_t chip, uint addr, + int i; + + for (i = 0; i < len; i++) { +- debug("%s: data[%d]: %02x\n", __func__, i, data[i]); ++printf("%s: data[%d]: %02x\n", __func__, i, data[i]); + if (sh_i2c_raw_write(dev, chip, addr + i, data[i]) != 0) + return -1; + } +diff --git a/drivers/i2c/tegra186_bpmp_i2c.c b/drivers/i2c/tegra186_bpmp_i2c.c +index 588f6bdcc..150d5f800 100644 +--- a/drivers/i2c/tegra186_bpmp_i2c.c ++++ b/drivers/i2c/tegra186_bpmp_i2c.c +@@ -101,7 +101,7 @@ static int tegra186_bpmp_i2c_probe(struct udevice *dev) + priv->bpmp_bus_id = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), + "nvidia,bpmp-bus-id", U32_MAX); + if (priv->bpmp_bus_id == U32_MAX) { +- debug("%s: could not parse nvidia,bpmp-bus-id\n", __func__); ++printf("%s: could not parse nvidia,bpmp-bus-id\n", __func__); + return -EINVAL; + } + +diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c +index 1e7448454..6ba1500dd 100644 +--- a/drivers/i2c/tegra_i2c.c ++++ b/drivers/i2c/tegra_i2c.c +@@ -97,7 +97,7 @@ static void i2c_init_controller(struct i2c_bus *i2c_bus) + { + if (!i2c_bus->speed) + return; +- debug("%s: speed=%d\n", __func__, i2c_bus->speed); ++printf("%s: speed=%d\n", __func__, i2c_bus->speed); + /* + * Use PLLP - DP-04508-001_v06 datasheet indicates a divisor of 8 + * here, in section 23.3.1, but in fact we seem to need a factor of +@@ -120,7 +120,7 @@ static void i2c_init_controller(struct i2c_bus *i2c_bus) + int clk_div_stdfst_mode = readl(&i2c_bus->regs->clk_div) >> 16; + unsigned rate = CLK_MULT_STD_FAST_MODE * + (clk_div_stdfst_mode + 1) * i2c_bus->speed * 2; +- debug("%s: CLK_DIV_STD_FAST_MODE setting = %d\n", __func__, ++printf("%s: CLK_DIV_STD_FAST_MODE setting = %d\n", __func__, + clk_div_stdfst_mode); + + i2c_init_clock(i2c_bus, rate); +@@ -154,12 +154,12 @@ static void send_packet_headers( + data |= packet_id << PKT_HDR1_PKT_ID_SHIFT; + data |= i2c_bus->id << PKT_HDR1_CTLR_ID_SHIFT; + writel(data, &i2c_bus->control->tx_fifo); +- debug("pkt header 1 sent (0x%x)\n", data); ++printf("pkt header 1 sent (0x%x)\n", data); + + /* prepare header2 */ + data = (trans->num_bytes - 1) << PKT_HDR2_PAYLOAD_SIZE_SHIFT; + writel(data, &i2c_bus->control->tx_fifo); +- debug("pkt header 2 sent (0x%x)\n", data); ++printf("pkt header 2 sent (0x%x)\n", data); + + /* prepare IO specific header: configure the slave address */ + data = trans->address << PKT_HDR3_SLAVE_ADDR_SHIFT; +@@ -172,7 +172,7 @@ static void send_packet_headers( + + /* Write I2C specific header */ + writel(data, &i2c_bus->control->tx_fifo); +- debug("pkt header 3 sent (0x%x)\n", data); ++printf("pkt header 3 sent (0x%x)\n", data); + } + + static int wait_for_tx_fifo_empty(struct i2c_control *control) +@@ -267,7 +267,7 @@ static int send_recv_packets(struct i2c_bus *i2c_bus, + local = *wptr; + } + writel(local, &control->tx_fifo); +- debug("pkt data sent (0x%x)\n", local); ++printf("pkt data sent (0x%x)\n", local); + if (!wait_for_tx_fifo_empty(control)) { + error = -1; + goto exit; +@@ -288,7 +288,7 @@ static int send_recv_packets(struct i2c_bus *i2c_bus, + memcpy(dptr, &local, sizeof(u32)); + else + *wptr = local; +- debug("pkt data received (0x%x)\n", local); ++printf("pkt data received (0x%x)\n", local); + } + words--; + dptr += sizeof(u32); +@@ -322,7 +322,7 @@ static int tegra_i2c_write_data(struct i2c_bus *i2c_bus, u32 addr, u8 *data, + + error = send_recv_packets(i2c_bus, &trans_info); + if (error) +- debug("tegra_i2c_write_data: Error (%d) !!!\n", error); ++printf("tegra_i2c_write_data: Error (%d) !!!\n", error); + + return error; + } +@@ -341,7 +341,7 @@ static int tegra_i2c_read_data(struct i2c_bus *i2c_bus, u32 addr, u8 *data, + + error = send_recv_packets(i2c_bus, &trans_info); + if (error) +- debug("tegra_i2c_read_data: Error (%d) !!!\n", error); ++printf("tegra_i2c_read_data: Error (%d) !!!\n", error); + + return error; + } +@@ -366,7 +366,7 @@ static int tegra_i2c_probe(struct udevice *dev) + i2c_bus->type = dev_get_driver_data(dev); + i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr(dev); + if ((ulong)i2c_bus->regs == FDT_ADDR_T_NONE) { +- debug("%s: Cannot get regs address\n", __func__); ++printf("%s: Cannot get regs address\n", __func__); + return -EINVAL; + } + +@@ -407,7 +407,7 @@ static int tegra_i2c_probe(struct udevice *dev) + i2c_bus->control = &i2c_bus->regs->control; + } + i2c_init_controller(i2c_bus); +- debug("%s: controller bus %d at %p, speed %d: ", ++printf("%s: controller bus %d at %p, speed %d: ", + is_dvc ? "dvc" : "i2c", dev_seq(dev), i2c_bus->regs, + i2c_bus->speed); + +@@ -420,18 +420,18 @@ static int i2c_write_data(struct i2c_bus *i2c_bus, uchar chip, uchar *buffer, + { + int rc; + +- debug("i2c_write_data: chip=0x%x, len=0x%x\n", chip, len); +- debug("write_data: "); ++printf("i2c_write_data: chip=0x%x, len=0x%x\n", chip, len); ++printf("write_data: "); + /* use rc for counter */ + for (rc = 0; rc < len; ++rc) +- debug(" 0x%02x", buffer[rc]); +- debug("\n"); ++printf(" 0x%02x", buffer[rc]); ++printf("\n"); + + /* Shift 7-bit address over for lower-level i2c functions */ + rc = tegra_i2c_write_data(i2c_bus, chip << 1, buffer, len, + end_with_repeated_start); + if (rc) +- debug("i2c_write_data(): rc=%d\n", rc); ++printf("i2c_write_data(): rc=%d\n", rc); + + return rc; + } +@@ -442,19 +442,19 @@ static int i2c_read_data(struct i2c_bus *i2c_bus, uchar chip, uchar *buffer, + { + int rc; + +- debug("inside i2c_read_data():\n"); ++printf("inside i2c_read_data():\n"); + /* Shift 7-bit address over for lower-level i2c functions */ + rc = tegra_i2c_read_data(i2c_bus, chip << 1, buffer, len); + if (rc) { +- debug("i2c_read_data(): rc=%d\n", rc); ++printf("i2c_read_data(): rc=%d\n", rc); + return rc; + } + +- debug("i2c_read_data: "); ++printf("i2c_read_data: "); + /* reuse rc for counter*/ + for (rc = 0; rc < len; ++rc) +- debug(" 0x%02x", buffer[rc]); +- debug("\n"); ++printf(" 0x%02x", buffer[rc]); ++printf("\n"); + + return 0; + } +@@ -480,11 +480,11 @@ static int tegra_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + struct i2c_bus *i2c_bus = dev_get_priv(bus); + int ret; + +- debug("i2c_xfer: %d messages\n", nmsgs); ++printf("i2c_xfer: %d messages\n", nmsgs); + for (; nmsgs > 0; nmsgs--, msg++) { + bool next_is_read = nmsgs > 1 && (msg[1].flags & I2C_M_RD); + +- debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); ++printf("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); + if (msg->flags & I2C_M_RD) { + ret = i2c_read_data(i2c_bus, msg->addr, msg->buf, + msg->len); +@@ -493,7 +493,7 @@ static int tegra_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, + msg->len, next_is_read); + } + if (ret) { +- debug("i2c_write: error sending\n"); ++printf("i2c_write: error sending\n"); + return -EREMOTEIO; + } + } +diff --git a/drivers/input/cros_ec_keyb.c b/drivers/input/cros_ec_keyb.c +index dc3b08c0f..750049606 100644 +--- a/drivers/input/cros_ec_keyb.c ++++ b/drivers/input/cros_ec_keyb.c +@@ -67,11 +67,11 @@ static int check_for_keys(struct udevice *dev, struct key_matrix_key *keys, + /* Try the old command if the EC doesn't support the above. */ + if (ret == -EC_RES_INVALID_COMMAND) { + if (cros_ec_scan_keyboard(dev->parent, scan)) { +- debug("%s: keyboard scan failed\n", __func__); ++printf("%s: keyboard scan failed\n", __func__); + return -EIO; + } + } else if (ret) { +- debug("%s: Error getting next MKBP event. (%d)\n", ++printf("%s: Error getting next MKBP event. (%d)\n", + __func__, ret); + return -EIO; + } +@@ -190,7 +190,7 @@ static int cros_ec_keyb_decode_fdt(struct udevice *dev, + if (!config->key_rows || !config->key_cols || + config->key_rows * config->key_cols / 8 + > CROS_EC_KEYSCAN_COLS) { +- debug("%s: Invalid key matrix size %d x %d\n", __func__, ++printf("%s: Invalid key matrix size %d x %d\n", __func__, + config->key_rows, config->key_cols); + return -1; + } +@@ -209,22 +209,22 @@ static int cros_ec_kbd_probe(struct udevice *dev) + + ret = cros_ec_keyb_decode_fdt(dev, priv); + if (ret) { +- debug("%s: Cannot decode node (ret=%d)\n", __func__, ret); ++printf("%s: Cannot decode node (ret=%d)\n", __func__, ret); + return -EINVAL; + } + input_set_delays(input, KBC_REPEAT_DELAY_MS, KBC_REPEAT_RATE_MS); + ret = key_matrix_init(&priv->matrix, priv->key_rows, priv->key_cols, + priv->ghost_filter); + if (ret) { +- debug("%s: cannot init key matrix\n", __func__); ++printf("%s: cannot init key matrix\n", __func__); + return ret; + } + ret = key_matrix_decode_fdt(dev, &priv->matrix); + if (ret) { +- debug("%s: Could not decode key matrix from fdt\n", __func__); ++printf("%s: Could not decode key matrix from fdt\n", __func__); + return ret; + } +- debug("%s: Matrix keyboard %dx%d ready\n", __func__, priv->key_rows, ++printf("%s: Matrix keyboard %dx%d ready\n", __func__, priv->key_rows, + priv->key_cols); + + priv->input = input; +diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c +index 565d99e7e..07f277220 100644 +--- a/drivers/input/i8042.c ++++ b/drivers/input/i8042.c +@@ -162,7 +162,7 @@ static int kbd_reset(int quirk) + + return 0; + err: +- debug("%s: Keyboard failure\n", __func__); ++printf("%s: Keyboard failure\n", __func__); + return -1; + } + +@@ -266,7 +266,7 @@ static int i8042_start(struct udevice *dev) + int ret; + + if (!kbd_controller_present()) { +- debug("i8042 keyboard controller is not present\n"); ++printf("i8042 keyboard controller is not present\n"); + return -ENOENT; + } + +@@ -288,7 +288,7 @@ static int i8042_start(struct udevice *dev) + return ret; + + i8042_kbd_update_leds(dev, NORMAL); +- debug("%s: started\n", __func__); ++printf("%s: started\n", __func__); + + return 0; + } +@@ -333,10 +333,10 @@ static int i8042_kbd_probe(struct udevice *dev) + strcpy(sdev->name, "i8042-kbd"); + ret = input_stdio_register(sdev); + if (ret) { +- debug("%s: input_stdio_register() failed\n", __func__); ++printf("%s: input_stdio_register() failed\n", __func__); + return ret; + } +- debug("%s: ready\n", __func__); ++printf("%s: ready\n", __func__); + + return 0; + } +diff --git a/drivers/input/input.c b/drivers/input/input.c +index c1c5e428d..02705a233 100644 +--- a/drivers/input/input.c ++++ b/drivers/input/input.c +@@ -212,7 +212,7 @@ static int input_queue_ascii(struct input_config *config, int ch) + return -1; /* buffer full */ + config->fifo_in++; + } +- debug(" {%02x} ", ch); ++printf(" {%02x} ", ch); + config->fifo[config->fifo_in] = (uchar)ch; + + return 0; +@@ -307,7 +307,7 @@ static struct input_key_xlate *process_modifier(struct input_config *config, + #ifdef CONFIG_DM_KEYBOARD + if (ops->update_leds) { + if (ops->update_leds(dev, config->leds)) +- debug("Update keyboard's LED failed\n"); ++printf("Update keyboard's LED failed\n"); + } + #endif + } +@@ -394,7 +394,7 @@ static int input_check_keycodes(struct input_config *config, + { + /* Select the 'plain' xlate table to start with */ + if (!config->num_tables) { +- debug("%s: No xlate tables: cannot decode keys\n", __func__); ++printf("%s: No xlate tables: cannot decode keys\n", __func__); + return -1; + } + +@@ -514,7 +514,7 @@ static int input_keycodes_to_ascii(struct input_config *config, + } + + if (ch_count > max_chars) { +- debug("%s: Output char buffer overflow size=%d, need=%d\n", ++printf("%s: Output char buffer overflow size=%d, need=%d\n", + __func__, max_chars, ch_count); + return -1; + } +@@ -588,10 +588,10 @@ int input_add_keycode(struct input_config *config, int new_keycode, + + if (!release && new_keycode != -1) + keycode[count++] = new_keycode; +- debug("\ncodes for %02x/%d: ", new_keycode, release); ++printf("\ncodes for %02x/%d: ", new_keycode, release); + for (i = 0; i < count; i++) +- debug("%02x ", keycode[i]); +- debug("\n"); ++printf("%02x ", keycode[i]); ++printf("\n"); + + /* Don't output any ASCII characters if this is a key release */ + return _input_send_keycodes(config, keycode, count, !release); +@@ -603,7 +603,7 @@ int input_add_table(struct input_config *config, int left_keycode, + struct input_key_xlate *table; + + if (config->num_tables == INPUT_MAX_MODIFIERS) { +- debug("%s: Too many modifier tables\n", __func__); ++printf("%s: Too many modifier tables\n", __func__); + return -1; + } + +diff --git a/drivers/input/key_matrix.c b/drivers/input/key_matrix.c +index 4631728b8..97415b376 100644 +--- a/drivers/input/key_matrix.c ++++ b/drivers/input/key_matrix.c +@@ -59,12 +59,12 @@ int key_matrix_decode(struct key_matrix *config, struct key_matrix_key keys[], + int valid, upto; + int pos; + +- debug("%s: num_keys = %d\n", __func__, num_keys); ++printf("%s: num_keys = %d\n", __func__, num_keys); + keymap = config->plain_keycode; + for (valid = upto = 0; upto < num_keys; upto++) { + struct key_matrix_key *key = &keys[upto]; + +- debug(" valid=%d, row=%d, col=%d\n", key->valid, key->row, ++printf(" valid=%d, row=%d, col=%d\n", key->valid, key->row, + key->col); + if (!key->valid) + continue; +@@ -75,15 +75,15 @@ int key_matrix_decode(struct key_matrix *config, struct key_matrix_key keys[], + /* Convert the (row, col) values into a keycode */ + if (valid < max_keycodes) + keycode[valid++] = keymap[pos]; +- debug(" keycode=%d\n", keymap[pos]); ++printf(" keycode=%d\n", keymap[pos]); + } + + /* For a ghost key config, ignore the keypresses for this iteration. */ + if (has_ghosting(config, keys, valid)) { + valid = 0; +- debug(" ghosting detected!\n"); ++printf(" ghosting detected!\n"); + } +- debug(" %d valid keycodes found\n", valid); ++printf(" %d valid keycodes found\n", valid); + + return valid; + } +@@ -114,7 +114,7 @@ static uchar *create_keymap(struct key_matrix *config, const u32 *data, int len, + *pos = -1; + map = (uchar *)calloc(1, config->key_count); + if (!map) { +- debug("%s: failed to malloc %d bytes\n", __func__, ++printf("%s: failed to malloc %d bytes\n", __func__, + config->key_count); + return NULL; + } +@@ -129,7 +129,7 @@ static uchar *create_keymap(struct key_matrix *config, const u32 *data, int len, + key_code = tmp & 0xffff; + entry = row * config->num_cols + col; + map[entry] = key_code; +- debug(" map %d, %d: pos=%d, keycode=%d\n", row, col, ++printf(" map %d, %d: pos=%d, keycode=%d\n", row, col, + entry, key_code); + if (pos && map_keycode == key_code) + *pos = entry; +@@ -147,7 +147,7 @@ int key_matrix_decode_fdt(struct udevice *dev, struct key_matrix *config) + prop = dev_read_prop(dev, "linux,keymap", &proplen); + /* Basic keymap is required */ + if (!prop) { +- debug("%s: cannot find keycode-plain map\n", __func__); ++printf("%s: cannot find keycode-plain map\n", __func__); + return -1; + } + +@@ -171,7 +171,7 @@ int key_matrix_decode_fdt(struct udevice *dev, struct key_matrix *config) + } + + done: +- debug("%s: Decoded key maps %p, %p from fdt\n", __func__, ++printf("%s: Decoded key maps %p, %p from fdt\n", __func__, + config->plain_keycode, config->fn_keycode); + return 0; + } +diff --git a/drivers/input/keyboard-uclass.c b/drivers/input/keyboard-uclass.c +index 2c6680337..db32e94b1 100644 +--- a/drivers/input/keyboard-uclass.c ++++ b/drivers/input/keyboard-uclass.c +@@ -75,7 +75,7 @@ static int keyboard_pre_probe(struct udevice *dev) + sdev->priv = dev; + ret = input_init(&priv->input, 0); + if (ret) { +- debug("%s: Cannot set up input, ret=%d - please add DEBUG to drivers/input/input.c to figure out the cause\n", ++printf("%s: Cannot set up input, ret=%d - please add DEBUG to drivers/input/input.c to figure out the cause\n", + __func__, ret); + return ret; + } +diff --git a/drivers/input/tegra-kbc.c b/drivers/input/tegra-kbc.c +index 5113041d3..2b5ba038b 100644 +--- a/drivers/input/tegra-kbc.c ++++ b/drivers/input/tegra-kbc.c +@@ -165,7 +165,7 @@ static void kbd_wait_for_fifo_init(struct tegra_kbd_priv *priv) + delay_ms = priv->init_dly_ms - elapsed_time; + if (delay_ms > 0) { + udelay(delay_ms * 1000); +- debug("%s: delay %ldms\n", __func__, delay_ms); ++printf("%s: delay %ldms\n", __func__, delay_ms); + } + + priv->inited = 1; +@@ -266,7 +266,7 @@ static int tegra_kbd_start(struct udevice *dev) + config_kbc_gpio(priv, priv->kbc); + + tegra_kbc_open(priv); +- debug("%s: Tegra keyboard ready\n", __func__); ++printf("%s: Tegra keyboard ready\n", __func__); + + return 0; + } +@@ -293,7 +293,7 @@ static int tegra_kbd_probe(struct udevice *dev) + + priv->kbc = dev_read_addr_ptr(dev); + if ((fdt_addr_t)priv->kbc == FDT_ADDR_T_NONE) { +- debug("%s: No keyboard register found\n", __func__); ++printf("%s: No keyboard register found\n", __func__); + return -EINVAL; + } + input_set_delays(input, KBC_REPEAT_DELAY_MS, KBC_REPEAT_RATE_MS); +@@ -301,12 +301,12 @@ static int tegra_kbd_probe(struct udevice *dev) + /* Decode the keyboard matrix information (16 rows, 8 columns) */ + ret = key_matrix_init(&priv->matrix, 16, 8, 1); + if (ret) { +- debug("%s: Could not init key matrix: %d\n", __func__, ret); ++printf("%s: Could not init key matrix: %d\n", __func__, ret); + return ret; + } + ret = key_matrix_decode_fdt(dev, &priv->matrix); + if (ret) { +- debug("%s: Could not decode key matrix from fdt: %d\n", ++printf("%s: Could not decode key matrix from fdt: %d\n", + __func__, ret); + return ret; + } +@@ -316,7 +316,7 @@ static int tegra_kbd_probe(struct udevice *dev) + priv->matrix.fn_keycode, + priv->matrix.key_count); + if (ret) { +- debug("%s: input_add_table() failed\n", __func__); ++printf("%s: input_add_table() failed\n", __func__); + return ret; + } + } +@@ -328,7 +328,7 @@ static int tegra_kbd_probe(struct udevice *dev) + strcpy(sdev->name, "tegra-kbc"); + ret = input_stdio_register(sdev); + if (ret) { +- debug("%s: input_stdio_register() failed\n", __func__); ++printf("%s: input_stdio_register() failed\n", __func__); + return ret; + } + +diff --git a/drivers/led/led_bcm6328.c b/drivers/led/led_bcm6328.c +index bf8207d63..5e37121a5 100644 +--- a/drivers/led/led_bcm6328.c ++++ b/drivers/led/led_bcm6328.c +@@ -211,7 +211,7 @@ static int bcm6328_led_bind(struct udevice *parent) + + label = ofnode_read_string(node, "label"); + if (!label) { +- debug("%s: node %s has no label\n", __func__, ++printf("%s: node %s has no label\n", __func__, + ofnode_get_name(node)); + return -EINVAL; + } +diff --git a/drivers/led/led_bcm6358.c b/drivers/led/led_bcm6358.c +index 3e57cdfd1..24ba79c7d 100644 +--- a/drivers/led/led_bcm6358.c ++++ b/drivers/led/led_bcm6358.c +@@ -181,7 +181,7 @@ static int bcm6358_led_bind(struct udevice *parent) + + label = ofnode_read_string(node, "label"); + if (!label) { +- debug("%s: node %s has no label\n", __func__, ++printf("%s: node %s has no label\n", __func__, + ofnode_get_name(node)); + return -EINVAL; + } +diff --git a/drivers/led/led_bcm6858.c b/drivers/led/led_bcm6858.c +index fbf46a114..d9a0672a5 100644 +--- a/drivers/led/led_bcm6858.c ++++ b/drivers/led/led_bcm6858.c +@@ -218,7 +218,7 @@ static int bcm6858_led_bind(struct udevice *parent) + + label = ofnode_read_string(node, "label"); + if (!label) { +- debug("%s: node %s has no label\n", __func__, ++printf("%s: node %s has no label\n", __func__, + ofnode_get_name(node)); + return -EINVAL; + } +diff --git a/drivers/led/led_cortina.c b/drivers/led/led_cortina.c +index 598c0a03d..c74fa3e39 100644 +--- a/drivers/led/led_cortina.c ++++ b/drivers/led/led_cortina.c +@@ -263,7 +263,7 @@ static int cortina_led_bind(struct udevice *parent) + + label = ofnode_read_string(node, "label"); + if (!label) { +- debug("%s: node %s has no label\n", __func__, ++printf("%s: node %s has no label\n", __func__, + ofnode_get_name(node)); + return -EINVAL; + } +diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers/mailbox/k3-sec-proxy.c +index 88f320515..2fe353a3f 100644 +--- a/drivers/mailbox/k3-sec-proxy.c ++++ b/drivers/mailbox/k3-sec-proxy.c +@@ -113,10 +113,10 @@ static int k3_sec_proxy_of_xlate(struct mbox_chan *chan, + struct k3_sec_proxy_mbox *spm = dev_get_priv(chan->dev); + int ind, i; + +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + if (args->args_count != 1) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + ind = args->args[0]; +@@ -138,7 +138,7 @@ static int k3_sec_proxy_of_xlate(struct mbox_chan *chan, + */ + static int k3_sec_proxy_request(struct mbox_chan *chan) + { +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + return 0; + } +@@ -149,7 +149,7 @@ static int k3_sec_proxy_request(struct mbox_chan *chan) + */ + static int k3_sec_proxy_free(struct mbox_chan *chan) + { +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + return 0; + } +@@ -209,7 +209,7 @@ static int k3_sec_proxy_send(struct mbox_chan *chan, const void *data) + void __iomem *data_reg; + u32 *word_data; + +- debug("%s(chan=%p, data=%p)\n", __func__, chan, data); ++printf("%s(chan=%p, data=%p)\n", __func__, chan, data); + + ret = k3_sec_proxy_verify_thread(spt, THREAD_IS_TX); + if (ret) { +@@ -251,7 +251,7 @@ static int k3_sec_proxy_send(struct mbox_chan *chan, const void *data) + if (data_reg <= (spt->data + spm->desc->data_end_offset)) + sp_writel(spt->data, spm->desc->data_end_offset, 0); + +- debug("%s: Message successfully sent on thread %ld\n", ++printf("%s: Message successfully sent on thread %ld\n", + __func__, chan->id); + + return 0; +@@ -273,7 +273,7 @@ static int k3_sec_proxy_recv(struct mbox_chan *chan, void *data) + int num_words, ret; + u32 *word_data; + +- debug("%s(chan=%p, data=%p)\n", __func__, chan, data); ++printf("%s(chan=%p, data=%p)\n", __func__, chan, data); + + ret = k3_sec_proxy_verify_thread(spt, THREAD_IS_RX); + if (ret) +@@ -288,7 +288,7 @@ static int k3_sec_proxy_recv(struct mbox_chan *chan, void *data) + num_words--, data_reg += sizeof(u32), word_data++) + *word_data = readl(data_reg); + +- debug("%s: Message successfully received from thread %ld\n", ++printf("%s: Message successfully received from thread %ld\n", + __func__, chan->id); + + return 0; +@@ -315,7 +315,7 @@ static int k3_sec_proxy_of_to_priv(struct udevice *dev, + const void *blob = gd->fdt_blob; + + if (!blob) { +- debug("'%s' no dt?\n", dev->name); ++printf("'%s' no dt?\n", dev->name); + return -ENODEV; + } + +@@ -377,7 +377,7 @@ static int k3_sec_proxy_probe(struct udevice *dev) + struct k3_sec_proxy_mbox *spm = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + ret = k3_sec_proxy_of_to_priv(dev, spm); + if (ret) +@@ -391,7 +391,7 @@ static int k3_sec_proxy_probe(struct udevice *dev) + + ret = k3_sec_proxy_thread_setup(spm); + if (ret) { +- debug("%s: secure proxy thread setup failed\n", __func__); ++printf("%s: secure proxy thread setup failed\n", __func__); + return ret; + } + +@@ -402,7 +402,7 @@ static int k3_sec_proxy_remove(struct udevice *dev) + { + struct k3_sec_proxy_mbox *spm = dev_get_priv(dev); + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + free(spm->chans); + +diff --git a/drivers/mailbox/mailbox-uclass.c b/drivers/mailbox/mailbox-uclass.c +index c972d8460..f4e5b5134 100644 +--- a/drivers/mailbox/mailbox-uclass.c ++++ b/drivers/mailbox/mailbox-uclass.c +@@ -19,10 +19,10 @@ static inline struct mbox_ops *mbox_dev_ops(struct udevice *dev) + static int mbox_of_xlate_default(struct mbox_chan *chan, + struct ofnode_phandle_args *args) + { +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + if (args->args_count != 1) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -38,19 +38,19 @@ int mbox_get_by_index(struct udevice *dev, int index, struct mbox_chan *chan) + struct udevice *dev_mbox; + struct mbox_ops *ops; + +- debug("%s(dev=%p, index=%d, chan=%p)\n", __func__, dev, index, chan); ++printf("%s(dev=%p, index=%d, chan=%p)\n", __func__, dev, index, chan); + + ret = dev_read_phandle_with_args(dev, "mboxes", "#mbox-cells", 0, index, + &args); + if (ret) { +- debug("%s: dev_read_phandle_with_args failed: %d\n", __func__, ++printf("%s: dev_read_phandle_with_args failed: %d\n", __func__, + ret); + return ret; + } + + ret = uclass_get_device_by_ofnode(UCLASS_MAILBOX, args.node, &dev_mbox); + if (ret) { +- debug("%s: uclass_get_device_by_of_offset failed: %d\n", ++printf("%s: uclass_get_device_by_of_offset failed: %d\n", + __func__, ret); + + /* Test with parent node */ +@@ -58,7 +58,7 @@ int mbox_get_by_index(struct udevice *dev, int index, struct mbox_chan *chan) + ofnode_get_parent(args.node), + &dev_mbox); + if (ret) { +- debug("%s: mbox node from parent failed: %d\n", ++printf("%s: mbox node from parent failed: %d\n", + __func__, ret); + return ret; + }; +@@ -71,14 +71,14 @@ int mbox_get_by_index(struct udevice *dev, int index, struct mbox_chan *chan) + else + ret = mbox_of_xlate_default(chan, &args); + if (ret) { +- debug("of_xlate() failed: %d\n", ret); ++printf("of_xlate() failed: %d\n", ret); + return ret; + } + + if (ops->request) + ret = ops->request(chan); + if (ret) { +- debug("ops->request() failed: %d\n", ret); ++printf("ops->request() failed: %d\n", ret); + return ret; + } + +@@ -90,11 +90,11 @@ int mbox_get_by_name(struct udevice *dev, const char *name, + { + int index; + +- debug("%s(dev=%p, name=%s, chan=%p)\n", __func__, dev, name, chan); ++printf("%s(dev=%p, name=%s, chan=%p)\n", __func__, dev, name, chan); + + index = dev_read_stringlist_search(dev, "mbox-names", name); + if (index < 0) { +- debug("fdt_stringlist_search() failed: %d\n", index); ++printf("fdt_stringlist_search() failed: %d\n", index); + return index; + } + +@@ -105,7 +105,7 @@ int mbox_free(struct mbox_chan *chan) + { + struct mbox_ops *ops = mbox_dev_ops(chan->dev); + +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + if (ops->rfree) + return ops->rfree(chan); +@@ -117,7 +117,7 @@ int mbox_send(struct mbox_chan *chan, const void *data) + { + struct mbox_ops *ops = mbox_dev_ops(chan->dev); + +- debug("%s(chan=%p, data=%p)\n", __func__, chan, data); ++printf("%s(chan=%p, data=%p)\n", __func__, chan, data); + + return ops->send(chan, data); + } +@@ -128,7 +128,7 @@ int mbox_recv(struct mbox_chan *chan, void *data, ulong timeout_us) + ulong start_time; + int ret; + +- debug("%s(chan=%p, data=%p, timeout_us=%ld)\n", __func__, chan, data, ++printf("%s(chan=%p, data=%p, timeout_us=%ld)\n", __func__, chan, data, + timeout_us); + + start_time = timer_get_us(); +diff --git a/drivers/mailbox/sandbox-mbox.c b/drivers/mailbox/sandbox-mbox.c +index 87d38de0c..9b79ebcee 100644 +--- a/drivers/mailbox/sandbox-mbox.c ++++ b/drivers/mailbox/sandbox-mbox.c +@@ -24,7 +24,7 @@ struct sandbox_mbox { + + static int sandbox_mbox_request(struct mbox_chan *chan) + { +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + if (chan->id >= SANDBOX_MBOX_CHANNELS) + return -EINVAL; +@@ -34,7 +34,7 @@ static int sandbox_mbox_request(struct mbox_chan *chan) + + static int sandbox_mbox_free(struct mbox_chan *chan) + { +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + return 0; + } +@@ -44,7 +44,7 @@ static int sandbox_mbox_send(struct mbox_chan *chan, const void *data) + struct sandbox_mbox *sbm = dev_get_priv(chan->dev); + const uint32_t *pmsg = data; + +- debug("%s(chan=%p, data=%p)\n", __func__, chan, data); ++printf("%s(chan=%p, data=%p)\n", __func__, chan, data); + + sbm->chans[chan->id].rx_msg = *pmsg ^ SANDBOX_MBOX_PING_XOR; + sbm->chans[chan->id].rx_msg_valid = true; +@@ -57,7 +57,7 @@ static int sandbox_mbox_recv(struct mbox_chan *chan, void *data) + struct sandbox_mbox *sbm = dev_get_priv(chan->dev); + uint32_t *pmsg = data; + +- debug("%s(chan=%p, data=%p)\n", __func__, chan, data); ++printf("%s(chan=%p, data=%p)\n", __func__, chan, data); + + if (!sbm->chans[chan->id].rx_msg_valid) + return -ENODATA; +@@ -70,14 +70,14 @@ static int sandbox_mbox_recv(struct mbox_chan *chan, void *data) + + static int sandbox_mbox_bind(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } + + static int sandbox_mbox_probe(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c +index 1d66d95fe..1bf2a9408 100644 +--- a/drivers/mailbox/tegra-hsp.c ++++ b/drivers/mailbox/tegra-hsp.c +@@ -66,7 +66,7 @@ static int tegra_hsp_db_id(ulong chan_id) + case (HSP_MBOX_TYPE_DB << 16) | HSP_DB_MASTER_BPMP: + return TEGRA_HSP_DB_ID_BPMP; + default: +- debug("Invalid channel ID\n"); ++printf("Invalid channel ID\n"); + return -EINVAL; + } + } +@@ -74,10 +74,10 @@ static int tegra_hsp_db_id(ulong chan_id) + static int tegra_hsp_of_xlate(struct mbox_chan *chan, + struct ofnode_phandle_args *args) + { +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + if (args->args_count != 2) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -90,11 +90,11 @@ static int tegra_hsp_request(struct mbox_chan *chan) + { + int db_id; + +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + db_id = tegra_hsp_db_id(chan->id); + if (db_id < 0) { +- debug("tegra_hsp_db_id() failed: %d\n", db_id); ++printf("tegra_hsp_db_id() failed: %d\n", db_id); + return -EINVAL; + } + +@@ -103,7 +103,7 @@ static int tegra_hsp_request(struct mbox_chan *chan) + + static int tegra_hsp_free(struct mbox_chan *chan) + { +- debug("%s(chan=%p)\n", __func__, chan); ++printf("%s(chan=%p)\n", __func__, chan); + + return 0; + } +@@ -113,7 +113,7 @@ static int tegra_hsp_send(struct mbox_chan *chan, const void *data) + struct tegra_hsp *thsp = dev_get_priv(chan->dev); + int db_id; + +- debug("%s(chan=%p, data=%p)\n", __func__, chan, data); ++printf("%s(chan=%p, data=%p)\n", __func__, chan, data); + + db_id = tegra_hsp_db_id(chan->id); + tegra_hsp_writel(thsp, 1, db_id, TEGRA_HSP_DB_REG_TRIGGER); +@@ -127,7 +127,7 @@ static int tegra_hsp_recv(struct mbox_chan *chan, void *data) + uint32_t db_id = TEGRA_HSP_DB_ID_CCPLEX; + uint32_t val; + +- debug("%s(chan=%p, data=%p)\n", __func__, chan, data); ++printf("%s(chan=%p, data=%p)\n", __func__, chan, data); + + val = tegra_hsp_readl(thsp, db_id, TEGRA_HSP_DB_REG_RAW); + if (!(val & BIT(chan->id))) +@@ -140,7 +140,7 @@ static int tegra_hsp_recv(struct mbox_chan *chan, void *data) + + static int tegra_hsp_bind(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +@@ -151,7 +151,7 @@ static int tegra_hsp_probe(struct udevice *dev) + u32 val; + int nr_sm, nr_ss, nr_as; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + thsp->regs = dev_read_addr(dev); + if (thsp->regs == FDT_ADDR_T_NONE) +diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c +index 959cce923..9207dde1c 100644 +--- a/drivers/mailbox/zynqmp-ipi.c ++++ b/drivers/mailbox/zynqmp-ipi.c +@@ -58,7 +58,7 @@ static int zynqmp_ipi_send(struct mbox_chan *chan, const void *data) + ret = wait_for_bit_le32(&ipi_int_apu->obs, IPI_BIT_MASK_PMU0, false, + 1000, false); + +- debug("%s, send %ld bytes\n", __func__, msg->len); ++printf("%s, send %ld bytes\n", __func__, msg->len); + return ret; + }; + +@@ -75,7 +75,7 @@ static int zynqmp_ipi_recv(struct mbox_chan *chan, void *data) + for (size_t i = 0; i < msg->len; i++) + msg->buf[i] = readl(&mbx[i]); + +- debug("%s, recv %ld bytes\n", __func__, msg->len); ++printf("%s, recv %ld bytes\n", __func__, msg->len); + return 0; + }; + +@@ -85,7 +85,7 @@ static int zynqmp_ipi_probe(struct udevice *dev) + struct resource res; + ofnode node; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + /* Get subnode where the regs are defined */ + /* Note IPI mailbox node needs to be the first one in DT */ +diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c +index af65c559d..c16226dc1 100644 +--- a/drivers/misc/atsha204a-i2c.c ++++ b/drivers/misc/atsha204a-i2c.c +@@ -200,7 +200,7 @@ static int atsha204a_recv_resp(struct udevice *dev, + computed_crc = atsha204a_crc16(p, resp->length - 2); + + if (resp_crc != computed_crc) { +- debug("Invalid checksum in ATSHA204A response\n"); ++printf("Invalid checksum in ATSHA204A response\n"); + return -EBADMSG; + } + +@@ -213,15 +213,15 @@ int atsha204a_wakeup(struct udevice *dev) + struct atsha204a_resp resp; + int try, res; + +- debug("Waking up ATSHA204A\n"); ++printf("Waking up ATSHA204A\n"); + + for (try = 1; try <= 10; ++try) { +- debug("Try %i... ", try); ++printf("Try %i... ", try); + + memset(req, 0, 4); + res = atsha204a_send(dev, req, 4); + if (res) { +- debug("failed on I2C send, trying again\n"); ++printf("failed on I2C send, trying again\n"); + continue; + } + +@@ -229,7 +229,7 @@ int atsha204a_wakeup(struct udevice *dev) + + res = atsha204a_recv_resp(dev, &resp); + if (res) { +- debug("failed on receiving response, ending\n"); ++printf("failed on receiving response, ending\n"); + return res; + } + +@@ -239,7 +239,7 @@ int atsha204a_wakeup(struct udevice *dev) + return -EBADMSG; + } + +- debug("success\n"); ++printf("success\n"); + break; + } + +@@ -253,7 +253,7 @@ int atsha204a_idle(struct udevice *dev) + + res = atsha204a_send(dev, &req, 1); + if (res) +- debug("Failed putting ATSHA204A idle\n"); ++printf("Failed putting ATSHA204A idle\n"); + return res; + } + +@@ -264,7 +264,7 @@ int atsha204a_sleep(struct udevice *dev) + + res = atsha204a_send(dev, &req, 1); + if (res) +- debug("Failed putting ATSHA204A to sleep\n"); ++printf("Failed putting ATSHA204A to sleep\n"); + return res; + } + +@@ -275,7 +275,7 @@ static int atsha204a_transaction(struct udevice *dev, struct atsha204a_req *req, + + res = atsha204a_send(dev, (u8 *) req, req->length + 1); + if (res) { +- debug("ATSHA204A transaction send failed\n"); ++printf("ATSHA204A transaction send failed\n"); + return -EBUSY; + } + +@@ -284,7 +284,7 @@ static int atsha204a_transaction(struct udevice *dev, struct atsha204a_req *req, + if (!res || res == -EMSGSIZE || res == -EBADMSG) + break; + +- debug("ATSHA204A transaction polling for response " ++printf("ATSHA204A transaction polling for response " + "(timeout = %d)\n", timeout); + + udelay(ATSHA204A_EXECTIME); +@@ -292,7 +292,7 @@ static int atsha204a_transaction(struct udevice *dev, struct atsha204a_req *req, + } while (timeout > 0); + + if (timeout <= 0) { +- debug("ATSHA204A transaction timed out\n"); ++printf("ATSHA204A transaction timed out\n"); + return -ETIMEDOUT; + } + +@@ -335,18 +335,18 @@ int atsha204a_read(struct udevice *dev, enum atsha204a_zone zone, bool read32, + if (!res) + break; + +- debug("ATSHA204A read retry (%d)\n", retry); ++printf("ATSHA204A read retry (%d)\n", retry); + retry--; + atsha204a_wakeup(dev); + } while (retry >= 0); + + if (res) { +- debug("ATSHA204A read failed\n"); ++printf("ATSHA204A read failed\n"); + return res; + } + + if (resp.length != (read32 ? 32 : 4) + 3) { +- debug("ATSHA204A read bad response length (%d)\n", ++printf("ATSHA204A read bad response length (%d)\n", + resp.length); + return -EBADMSG; + } +@@ -375,7 +375,7 @@ int atsha204a_get_random(struct udevice *dev, u8 *buffer, size_t max) + + res = atsha204a_transaction(dev, &req, &resp); + if (res) { +- debug("ATSHA204A random transaction failed\n"); ++printf("ATSHA204A random transaction failed\n"); + return res; + } + +@@ -390,7 +390,7 @@ static int atsha204a_of_to_plat(struct udevice *dev) + + addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg"); + if (addr == FDT_ADDR_T_NONE) { +- debug("Can't get ATSHA204A I2C base address\n"); ++printf("Can't get ATSHA204A I2C base address\n"); + return -ENXIO; + } + +diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c +index 7904d5cc7..f7a7760f2 100644 +--- a/drivers/misc/cros_ec.c ++++ b/drivers/misc/cros_ec.c +@@ -149,7 +149,7 @@ static int create_proto3_request(struct cros_ec_dev *cdev, + + /* Fail if output size is too big */ + if (out_bytes > (int)sizeof(cdev->dout)) { +- debug("%s: Cannot send %d bytes\n", __func__, dout_len); ++printf("%s: Cannot send %d bytes\n", __func__, dout_len); + return -EC_RES_REQUEST_TRUNCATED; + } + +@@ -186,7 +186,7 @@ static int prepare_proto3_response_buffer(struct cros_ec_dev *cdev, int din_len) + + /* Fail if input size is too big */ + if (in_bytes > (int)sizeof(cdev->din)) { +- debug("%s: Cannot receive %d bytes\n", __func__, din_len); ++printf("%s: Cannot receive %d bytes\n", __func__, din_len); + return -EC_RES_RESPONSE_TOO_BIG; + } + +@@ -217,17 +217,17 @@ static int handle_proto3_response(struct cros_ec_dev *dev, + + /* Check input data */ + if (rs->struct_version != EC_HOST_RESPONSE_VERSION) { +- debug("%s: EC response version mismatch\n", __func__); ++printf("%s: EC response version mismatch\n", __func__); + return -EC_RES_INVALID_RESPONSE; + } + + if (rs->reserved) { +- debug("%s: EC response reserved != 0\n", __func__); ++printf("%s: EC response reserved != 0\n", __func__); + return -EC_RES_INVALID_RESPONSE; + } + + if (rs->data_len > din_len) { +- debug("%s: EC returned too much data\n", __func__); ++printf("%s: EC returned too much data\n", __func__); + return -EC_RES_RESPONSE_TOO_BIG; + } + +@@ -239,7 +239,7 @@ static int handle_proto3_response(struct cros_ec_dev *dev, + /* Verify checksum */ + csum = cros_ec_calc_checksum(dev->din, in_bytes); + if (csum) { +- debug("%s: EC response checksum invalid: 0x%02x\n", __func__, ++printf("%s: EC response checksum invalid: 0x%02x\n", __func__, + csum); + return -EC_RES_INVALID_CHECKSUM; + } +@@ -349,7 +349,7 @@ static int ec_command_inptr(struct udevice *dev, uint cmd, + return ret; + + if (get_timer(start) > CROS_EC_CMD_TIMEOUT_MS) { +- debug("%s: Command %#02x timeout\n", ++printf("%s: Command %#02x timeout\n", + __func__, cmd); + return -EC_RES_TIMEOUT; + } +@@ -361,7 +361,7 @@ static int ec_command_inptr(struct udevice *dev, uint cmd, + &din, din_len); + } + +- debug("%s: len=%d, din=%p\n", __func__, len, din); ++printf("%s: len=%d, din=%p\n", __func__, len, din); + if (dinp) { + /* If we have any data to return, it must be 64bit-aligned */ + assert(len <= 0 || !((uintptr_t)din & 7)); +@@ -517,7 +517,7 @@ static int cros_ec_wait_on_hash_done(struct udevice *dev, + return -1; + + if (get_timer(start) > CROS_EC_CMD_HASH_TIMEOUT_MS) { +- debug("%s: EC_VBOOT_HASH_GET timeout\n", __func__); ++printf("%s: EC_VBOOT_HASH_GET timeout\n", __func__); + return -EC_RES_TIMEOUT; + } + } +@@ -548,7 +548,7 @@ int cros_ec_read_hash(struct udevice *dev, uint hash_offset, + if (hash->status == EC_VBOOT_HASH_STATUS_DONE && hash->size) + return 0; + +- debug("%s: No valid hash (status=%d size=%d). Compute one...\n", ++printf("%s: No valid hash (status=%d size=%d). Compute one...\n", + __func__, hash->status, hash->size); + + p.cmd = EC_VBOOT_HASH_START; +@@ -568,7 +568,7 @@ int cros_ec_read_hash(struct udevice *dev, uint hash_offset, + return -EIO; + } + +- debug("%s: hash done\n", __func__); ++printf("%s: hash done\n", __func__); + + return 0; + } +@@ -588,7 +588,7 @@ static int cros_ec_invalidate_hash(struct udevice *dev) + p.offset = 0; + p.size = 0; + +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + + if (ec_command_inptr(dev, EC_CMD_VBOOT_HASH, 0, &p, sizeof(p), + (uint8_t **)&hash, sizeof(*hash)) < 0) +@@ -1229,17 +1229,17 @@ int cros_ec_register(struct udevice *dev) + cdev->optimise_flash_write = dev_read_bool(dev, "optimise-flash-write"); + + if (cros_ec_check_version(dev)) { +- debug("%s: Could not detect CROS-EC version\n", __func__); ++printf("%s: Could not detect CROS-EC version\n", __func__); + return -CROS_EC_ERR_CHECK_VERSION; + } + + if (cros_ec_read_id(dev, id, sizeof(id))) { +- debug("%s: Could not read KBC ID\n", __func__); ++printf("%s: Could not read KBC ID\n", __func__); + return -CROS_EC_ERR_READ_ID; + } + + /* Remember this device for use by the cros_ec command */ +- debug("Google Chrome EC v%d CROS-EC driver ready, id '%s'\n", ++printf("Google Chrome EC v%d CROS-EC driver ready, id '%s'\n", + cdev->protocol_version, id); + + return 0; +@@ -1251,12 +1251,12 @@ int cros_ec_decode_ec_flash(struct udevice *dev, struct fdt_cros_ec *config) + + flash_node = dev_read_subnode(dev, "flash"); + if (!ofnode_valid(flash_node)) { +- debug("Failed to find flash node\n"); ++printf("Failed to find flash node\n"); + return -1; + } + + if (ofnode_read_fmap_entry(flash_node, &config->flash)) { +- debug("Failed to decode flash node in chrome-ec\n"); ++printf("Failed to decode flash node in chrome-ec\n"); + return -1; + } + +@@ -1273,12 +1273,12 @@ int cros_ec_decode_ec_flash(struct udevice *dev, struct fdt_cros_ec *config) + } else if (0 == strcmp(name, "wp-ro")) { + region = EC_FLASH_REGION_WP_RO; + } else { +- debug("Unknown EC flash region name '%s'\n", name); ++printf("Unknown EC flash region name '%s'\n", name); + return -1; + } + + if (ofnode_read_fmap_entry(node, &config->region[region])) { +- debug("Failed to decode flash region in chrome-ec'\n"); ++printf("Failed to decode flash region in chrome-ec'\n"); + return -1; + } + } +diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c +index a1b78a304..6427105d1 100644 +--- a/drivers/misc/cros_ec_i2c.c ++++ b/drivers/misc/cros_ec_i2c.c +@@ -128,11 +128,11 @@ static int cros_ec_i2c_command(struct udevice *udev, uint8_t cmd, + * buffers. + */ + if (out_bytes > sizeof(dev->dout)) { +- debug("%s: Cannot send %d bytes\n", __func__, dout_len); ++printf("%s: Cannot send %d bytes\n", __func__, dout_len); + return -1; + } + if (in_bytes > sizeof(dev->din)) { +- debug("%s: Cannot receive %d bytes\n", __func__, din_len); ++printf("%s: Cannot receive %d bytes\n", __func__, din_len); + return -1; + } + assert(dout_len >= 0); +@@ -159,7 +159,7 @@ static int cros_ec_i2c_command(struct udevice *udev, uint8_t cmd, + + if (dev->protocol_version != 2) { + /* Something we don't support */ +- debug("%s: Protocol version %d unsupported\n", ++printf("%s: Protocol version %d unsupported\n", + __func__, dev->protocol_version); + return -1; + } +@@ -185,25 +185,25 @@ static int cros_ec_i2c_command(struct udevice *udev, uint8_t cmd, + + ret = dm_i2c_xfer(udev, &i2c_msg[0], 2); + if (ret) { +- debug("%s: Could not execute transfer to %s\n", __func__, ++printf("%s: Could not execute transfer to %s\n", __func__, + udev->name); + ret = -1; + } + + if (*in_ptr != EC_RES_SUCCESS) { +- debug("%s: Received bad result code %d\n", __func__, *in_ptr); ++printf("%s: Received bad result code %d\n", __func__, *in_ptr); + return -(int)*in_ptr; + } + + len = in_ptr[1]; + if (len + 3 > sizeof(dev->din)) { +- debug("%s: Received length %#02x too large\n", ++printf("%s: Received length %#02x too large\n", + __func__, len); + return -1; + } + csum = cros_ec_calc_checksum(in_ptr, 2 + len); + if (csum != in_ptr[2 + len]) { +- debug("%s: Invalid checksum rx %#02x, calced %#02x\n", ++printf("%s: Invalid checksum rx %#02x, calced %#02x\n", + __func__, in_ptr[2 + din_len], csum); + return -1; + } +diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c +index f40375978..b9ca1e4ad 100644 +--- a/drivers/misc/cros_ec_lpc.c ++++ b/drivers/misc/cros_ec_lpc.c +@@ -35,7 +35,7 @@ static int wait_for_sync(struct cros_ec_dev *dev) + start = get_timer(0); + while (inb(EC_LPC_ADDR_HOST_CMD) & EC_LPC_STATUS_BUSY_MASK) { + if (get_timer(start) > CROS_EC_CMD_TIMEOUT_MS) { +- debug("%s: Timeout waiting for CROS_EC sync\n", ++printf("%s: Timeout waiting for CROS_EC sync\n", + __func__); + return -1; + } +@@ -92,7 +92,7 @@ int cros_ec_lpc_command(struct udevice *udev, uint8_t cmd, int cmd_version, + int i; + + if (dout_len > EC_PROTO2_MAX_PARAM_SIZE) { +- debug("%s: Cannot send %d bytes\n", __func__, dout_len); ++printf("%s: Cannot send %d bytes\n", __func__, dout_len); + return -1; + } + +@@ -109,7 +109,7 @@ int cros_ec_lpc_command(struct udevice *udev, uint8_t cmd, int cmd_version, + args.checksum = (uint8_t)csum; + + if (wait_for_sync(dev)) { +- debug("%s: Timeout waiting ready\n", __func__); ++printf("%s: Timeout waiting ready\n", __func__); + return -1; + } + +@@ -128,14 +128,14 @@ int cros_ec_lpc_command(struct udevice *udev, uint8_t cmd, int cmd_version, + debug_trace("\n"); + + if (wait_for_sync(dev)) { +- debug("%s: Timeout waiting for response\n", __func__); ++printf("%s: Timeout waiting for response\n", __func__); + return -1; + } + + /* Check result */ + i = inb(data_addr); + if (i) { +- debug("%s: CROS_EC result code %d\n", __func__, i); ++printf("%s: CROS_EC result code %d\n", __func__, i); + return -i; + } + +@@ -149,12 +149,12 @@ int cros_ec_lpc_command(struct udevice *udev, uint8_t cmd, int cmd_version, + * from the wrong place. + */ + if (!(args.flags & EC_HOST_ARGS_FLAG_TO_HOST)) { +- debug("%s: CROS_EC protocol mismatch\n", __func__); ++printf("%s: CROS_EC protocol mismatch\n", __func__); + return -EC_RES_INVALID_RESPONSE; + } + + if (args.data_size > din_len) { +- debug("%s: CROS_EC returned too much data %d > %d\n", ++printf("%s: CROS_EC returned too much data %d > %d\n", + __func__, args.data_size, din_len); + return -EC_RES_INVALID_RESPONSE; + } +@@ -172,7 +172,7 @@ int cros_ec_lpc_command(struct udevice *udev, uint8_t cmd, int cmd_version, + csum += *d; + + if (args.checksum != (uint8_t)csum) { +- debug("%s: CROS_EC response has invalid checksum\n", __func__); ++printf("%s: CROS_EC response has invalid checksum\n", __func__); + return -EC_RES_INVALID_CHECKSUM; + } + *dinp = dev->din; +@@ -199,7 +199,7 @@ int cros_ec_lpc_init(struct cros_ec_dev *dev, const void *blob) + for (i = 0; i < EC_PROTO2_MAX_PARAM_SIZE && (byte == 0xff); i++) + byte &= inb(EC_LPC_ADDR_HOST_PARAM + i); + if (byte == 0xff) { +- debug("%s: CROS_EC device not found on LPC bus\n", ++printf("%s: CROS_EC device not found on LPC bus\n", + __func__); + return -1; + } +diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c +index bc01df090..e86ad9631 100644 +--- a/drivers/misc/cros_ec_sandbox.c ++++ b/drivers/misc/cros_ec_sandbox.c +@@ -134,7 +134,7 @@ static int cros_ec_read_state(const void *blob, int node) + if (!ec->flash_data) + return -ENOMEM; + memcpy(ec->flash_data, prop, len); +- debug("%s: Loaded EC flash data size %#x\n", __func__, len); ++printf("%s: Loaded EC flash data size %#x\n", __func__, len); + } + + return 0; +@@ -217,7 +217,7 @@ static int keyscan_read_fdt_matrix(struct ec_state *ec, ofnode node) + ec->matrix_count = len / 4; + ec->matrix = calloc(ec->matrix_count, sizeof(*ec->matrix)); + if (!ec->matrix) { +- debug("%s: Out of memory for key matrix\n", __func__); ++printf("%s: Out of memory for key matrix\n", __func__); + return -1; + } + +@@ -234,14 +234,14 @@ static int keyscan_read_fdt_matrix(struct ec_state *ec, ofnode node) + /* Hard-code some sanity limits for now */ + if (matrix->row >= KEYBOARD_ROWS || + matrix->col >= KEYBOARD_COLS) { +- debug("%s: Matrix pos out of range (%d,%d)\n", ++printf("%s: Matrix pos out of range (%d,%d)\n", + __func__, matrix->row, matrix->col); + return -1; + } + } + + if (upto != ec->matrix_count) { +- debug("%s: Read mismatch from key matrix\n", __func__); ++printf("%s: Read mismatch from key matrix\n", __func__); + return -1; + } + +@@ -278,7 +278,7 @@ static int cros_ec_keyscan(struct ec_state *ec, uint8_t *scan) + } + + if (found) { +- debug("%d: %d,%d\n", matrix->keycode, matrix->row, ++printf("%d: %d,%d\n", matrix->keycode, matrix->row, + matrix->col); + ec->keyscan[matrix->col] |= 1 << matrix->row; + } +@@ -305,7 +305,7 @@ static int process_cmd(struct ec_state *ec, + int len; + + /* TODO(sjg@chromium.org): Check checksums */ +- debug("EC command %#0x\n", req_hdr->command); ++printf("EC command %#0x\n", req_hdr->command); + + switch (req_hdr->command) { + case EC_CMD_HELLO: { +@@ -324,7 +324,7 @@ static int process_cmd(struct ec_state *ec, + strcpy(resp->version_string_ro, "sandbox_ro"); + strcpy(resp->version_string_rw, "sandbox_rw"); + resp->current_image = ec->current_image; +- debug("Current image %d\n", resp->current_image); ++printf("Current image %d\n", resp->current_image); + len = sizeof(*resp); + break; + } +@@ -630,7 +630,7 @@ int cros_ec_probe(struct udevice *dev) + memcpy(ec, &s_state, sizeof(*ec)); + err = cros_ec_decode_ec_flash(dev, &ec->ec_config); + if (err) { +- debug("%s: Cannot device EC flash\n", __func__); ++printf("%s: Cannot device EC flash\n", __func__); + return err; + } + +@@ -644,9 +644,9 @@ int cros_ec_probe(struct udevice *dev) + } + } + if (!ofnode_valid(node)) { +- debug("%s: No cros_ec keyboard found\n", __func__); ++printf("%s: No cros_ec keyboard found\n", __func__); + } else if (keyscan_read_fdt_matrix(ec, node)) { +- debug("%s: Could not read key matrix\n", __func__); ++printf("%s: Could not read key matrix\n", __func__); + return -1; + } + +diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c +index bbc96301a..70bfd6c14 100644 +--- a/drivers/misc/cros_ec_spi.c ++++ b/drivers/misc/cros_ec_spi.c +@@ -29,7 +29,7 @@ int cros_ec_spi_packet(struct udevice *udev, int out_bytes, int in_bytes) + + /* Do the transfer */ + if (spi_claim_bus(slave)) { +- debug("%s: Cannot claim SPI bus\n", __func__); ++printf("%s: Cannot claim SPI bus\n", __func__); + return -1; + } + +@@ -55,7 +55,7 @@ done: + spi_release_bus(slave); + + if (rv) { +- debug("%s: Cannot complete SPI transfer\n", __func__); ++printf("%s: Cannot complete SPI transfer\n", __func__); + return -1; + } + +@@ -90,7 +90,7 @@ int cros_ec_spi_command(struct udevice *udev, uint8_t cmd, int cmd_version, + int rv; + + if (dev->protocol_version != 2) { +- debug("%s: Unsupported EC protcol version %d\n", ++printf("%s: Unsupported EC protcol version %d\n", + __func__, dev->protocol_version); + return -1; + } +@@ -100,13 +100,13 @@ int cros_ec_spi_command(struct udevice *udev, uint8_t cmd, int cmd_version, + * fits in the internal device buffer. + */ + if (in_bytes > sizeof(dev->din)) { +- debug("%s: Cannot receive %d bytes\n", __func__, din_len); ++printf("%s: Cannot receive %d bytes\n", __func__, din_len); + return -1; + } + + /* We represent message length as a byte */ + if (dout_len > 0xff) { +- debug("%s: Cannot send %d bytes\n", __func__, dout_len); ++printf("%s: Cannot send %d bytes\n", __func__, dout_len); + return -1; + } + +@@ -116,7 +116,7 @@ int cros_ec_spi_command(struct udevice *udev, uint8_t cmd, int cmd_version, + memset(dev->din, '\0', in_bytes); + + if (spi_claim_bus(slave)) { +- debug("%s: Cannot claim SPI bus\n", __func__); ++printf("%s: Cannot claim SPI bus\n", __func__); + return -1; + } + +@@ -142,7 +142,7 @@ int cros_ec_spi_command(struct udevice *udev, uint8_t cmd, int cmd_version, + spi_release_bus(slave); + + if (rv) { +- debug("%s: Cannot complete SPI transfer\n", __func__); ++printf("%s: Cannot complete SPI transfer\n", __func__); + return -1; + } + +@@ -158,7 +158,7 @@ int cros_ec_spi_command(struct udevice *udev, uint8_t cmd, int cmd_version, + /* Check checksum */ + csum = cros_ec_calc_checksum(p, len + 2); + if (csum != p[len + 2]) { +- debug("%s: Invalid checksum rx %#02x, calced %#02x\n", __func__, ++printf("%s: Invalid checksum rx %#02x, calced %#02x\n", __func__, + p[2 + len], csum); + return -1; + } +diff --git a/drivers/misc/fs_loader.c b/drivers/misc/fs_loader.c +index e77b3af77..66cf2a0e8 100644 +--- a/drivers/misc/fs_loader.c ++++ b/drivers/misc/fs_loader.c +@@ -43,7 +43,7 @@ static int mount_ubifs(char *mtdpart, char *ubivol) + int ret = ubi_part(mtdpart, NULL); + + if (ret) { +- debug("Cannot find mtd partition %s\n", mtdpart); ++printf("Cannot find mtd partition %s\n", mtdpart); + return ret; + } + +@@ -57,7 +57,7 @@ static int umount_ubifs(void) + #else + static int mount_ubifs(char *mtdpart, char *ubivol) + { +- debug("Error: Cannot load image: no UBIFS support\n"); ++printf("Error: Cannot load image: no UBIFS support\n"); + return -ENOSYS; + } + #endif +@@ -80,7 +80,7 @@ static int select_fs_dev(struct device_plat *plat) + ret = fs_set_blk_dev_with_part(desc, + plat->phandlepart.partition); + } else { +- debug("%s: No device found\n", __func__); ++printf("%s: No device found\n", __func__); + return -ENODEV; + } + } +@@ -91,12 +91,12 @@ static int select_fs_dev(struct device_plat *plat) + + ret = fs_set_blk_dev("ubi", NULL, FS_TYPE_UBIFS); + } else { +- debug("Error: unsupported storage device.\n"); ++printf("Error: unsupported storage device.\n"); + return -ENODEV; + } + + if (ret) +- debug("Error: could not access storage.\n"); ++printf("Error: could not access storage.\n"); + + return ret; + } +@@ -177,7 +177,7 @@ static int fw_get_filesystem_firmware(struct udevice *dev) + firmwarep->offset, firmwarep->size, &actread); + + if (ret) { +- debug("Error: %d Failed to read %s from flash %lld != %zu.\n", ++printf("Error: %d Failed to read %s from flash %lld != %zu.\n", + ret, firmwarep->name, actread, firmwarep->size); + } else { + ret = actread; +@@ -263,7 +263,7 @@ static int fs_loader_probe(struct udevice *dev) + + ret = blk_get_from_parent(parent_dev, &dev); + if (ret) { +- debug("fs_loader: No block device: %d\n", ++printf("fs_loader: No block device: %d\n", + ret); + + return ret; +diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c +index 632430e42..1850de5fb 100644 +--- a/drivers/misc/fsl_portals.c ++++ b/drivers/misc/fsl_portals.c +@@ -98,7 +98,7 @@ void inhibit_portals(void __iomem *addr, int max_portals, + } + addr += portal_cinh_size; + } +- debug("Cleared %d portals\n", i); ++printf("Cleared %d portals\n", i); + } + + #ifdef CONFIG_PPC +diff --git a/drivers/misc/gdsys_ioep.c b/drivers/misc/gdsys_ioep.c +index 145cfa23c..0be98bd33 100644 +--- a/drivers/misc/gdsys_ioep.c ++++ b/drivers/misc/gdsys_ioep.c +@@ -113,7 +113,7 @@ static int receive_byte_buffer(struct udevice *dev, uint len, + } + + if (ret) +- debug("%s: Error while receiving bufer (err = %d)\n", ++printf("%s: Error while receiving bufer (err = %d)\n", + dev->name, ret); + + return ret; +@@ -131,7 +131,7 @@ static int gdsys_ioep_receive(struct udevice *dev, int offset, void *buf, + /* Read the packet header */ + ret = receive_byte_buffer(dev, header_words, p, READ_DATA_IS_NOT_LAST); + if (ret) { +- debug("%s: Failed to read header data (err = %d)\n", ++printf("%s: Failed to read header data (err = %d)\n", + dev->name, ret); + return ret; + } +@@ -145,7 +145,7 @@ static int gdsys_ioep_receive(struct udevice *dev, int offset, void *buf, + /* Read the packet payload */ + ret = receive_byte_buffer(dev, len, p, READ_DATA_IS_LAST); + if (ret) { +- debug("%s: Failed to read payload data (err = %d)\n", ++printf("%s: Failed to read payload data (err = %d)\n", + dev->name, ret); + return ret; + } +@@ -184,7 +184,7 @@ static int gdsys_ioep_probe(struct udevice *dev) + + ret = regmap_init_mem(dev_ofnode(dev), &priv->map); + if (ret) { +- debug("%s: Could not initialize regmap (err = %d)", ++printf("%s: Could not initialize regmap (err = %d)", + dev->name, ret); + return ret; + } +diff --git a/drivers/misc/gdsys_soc.c b/drivers/misc/gdsys_soc.c +index 27e7dc483..11dd7bec8 100644 +--- a/drivers/misc/gdsys_soc.c ++++ b/drivers/misc/gdsys_soc.c +@@ -29,12 +29,12 @@ int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga) + struct gdsys_soc_priv *bus_priv; + + if (!child->parent) { +- debug("%s: Invalid parent\n", child->name); ++printf("%s: Invalid parent\n", child->name); + return -EINVAL; + } + + if (!device_is_compatible(child->parent, "gdsys,soc")) { +- debug("%s: Not child of a gdsys soc\n", child->name); ++printf("%s: Not child of a gdsys soc\n", child->name); + return -EINVAL; + } + +@@ -52,12 +52,12 @@ static int gdsys_soc_probe(struct udevice *dev) + int res = uclass_get_device_by_phandle(UCLASS_MISC, dev, "fpga", + &fpga); + if (res == -ENOENT) { +- debug("%s: Could not find 'fpga' phandle\n", dev->name); ++printf("%s: Could not find 'fpga' phandle\n", dev->name); + return -EINVAL; + } + + if (res == -ENODEV) { +- debug("%s: Could not get FPGA device\n", dev->name); ++printf("%s: Could not get FPGA device\n", dev->name); + return -EINVAL; + } + +diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c +index 5926c91a2..dac270ddc 100644 +--- a/drivers/misc/i2c_eeprom.c ++++ b/drivers/misc/i2c_eeprom.c +@@ -314,7 +314,7 @@ static int i2c_eeprom_partition_of_to_plat(struct udevice *dev) + priv->offset = reg[0]; + priv->size = reg[1]; + +- debug("%s: base %x, size %x\n", __func__, priv->offset, priv->size); ++printf("%s: base %x, size %x\n", __func__, priv->offset, priv->size); + + return 0; + } +diff --git a/drivers/misc/i2c_eeprom_emul.c b/drivers/misc/i2c_eeprom_emul.c +index 85b127c40..a472a9c3c 100644 +--- a/drivers/misc/i2c_eeprom_emul.c ++++ b/drivers/misc/i2c_eeprom_emul.c +@@ -77,7 +77,7 @@ static int sandbox_i2c_eeprom_xfer(struct udevice *emul, struct i2c_msg *msg, + struct sandbox_i2c_flash_plat_data *plat = dev_get_plat(emul); + uint offset = msg->addr & plat->chip_addr_offset_mask; + +- debug("\n%s\n", __func__); ++printf("\n%s\n", __func__); + debug_buffer(0, priv->data, 1, 16, 0); + + /* store addr for testing visibity */ +@@ -90,13 +90,13 @@ static int sandbox_i2c_eeprom_xfer(struct udevice *emul, struct i2c_msg *msg, + if (!plat->size) + return -ENODEV; + len = msg->len; +- debug(" %s: msg->addr=%x msg->len=%d", ++printf(" %s: msg->addr=%x msg->len=%d", + msg->flags & I2C_M_RD ? "read" : "write", + msg->addr, msg->len); + if (msg->flags & I2C_M_RD) { + if (plat->test_mode == SIE_TEST_MODE_SINGLE_BYTE) + len = 1; +- debug(", offset %x, len %x: ", offset, len); ++printf(", offset %x, len %x: ", offset, len); + if (offset + len > plat->size) { + int overflow = offset + len - plat->size; + int initial = len - overflow; +@@ -115,7 +115,7 @@ static int sandbox_i2c_eeprom_xfer(struct udevice *emul, struct i2c_msg *msg, + ptr = msg->buf; + for (i = 0; i < plat->offset_len; i++, len--) + offset = (offset << 8) | *ptr++; +- debug(", set offset %x: ", offset); ++printf(", set offset %x: ", offset); + debug_buffer(0, msg->buf, 1, msg->len, 0); + if (plat->test_mode == SIE_TEST_MODE_SINGLE_BYTE) + len = min(len, 1); +@@ -127,7 +127,7 @@ static int sandbox_i2c_eeprom_xfer(struct udevice *emul, struct i2c_msg *msg, + * offset wraps every 256 bytes + */ + offset &= 0xff; +- debug("mapped offset to %x\n", offset); ++printf("mapped offset to %x\n", offset); + + if (offset + len > plat->size) { + int overflow = offset + len - plat->size; +@@ -156,7 +156,7 @@ static int sandbox_i2c_eeprom_of_to_plat(struct udevice *dev) + plat->size = dev_read_u32_default(dev, "sandbox,size", 32); + plat->filename = dev_read_string(dev, "sandbox,filename"); + if (!plat->filename) { +- debug("%s: No filename for device '%s'\n", __func__, ++printf("%s: No filename for device '%s'\n", __func__, + dev->name); + return -EINVAL; + } +diff --git a/drivers/misc/ihs_fpga.c b/drivers/misc/ihs_fpga.c +index a0fece985..ff668ef78 100644 +--- a/drivers/misc/ihs_fpga.c ++++ b/drivers/misc/ihs_fpga.c +@@ -751,7 +751,7 @@ static int wait_for_fpga_done(struct udevice *dev) + while (1) { + done_val = dm_gpio_get_value(&priv->done_gpio); + if (done_val < 0) { +- debug("%s: Error while reading done-GPIO (err = %d)\n", ++printf("%s: Error while reading done-GPIO (err = %d)\n", + dev->name, done_val); + return done_val; + } +@@ -761,7 +761,7 @@ static int wait_for_fpga_done(struct udevice *dev) + + mdelay(FPGA_DONE_WAIT_DELAY); + if (ctr++ > FPGA_DONE_WAIT_ROUND) { +- debug("%s: FPGA init failed (done not detected)\n", ++printf("%s: FPGA init failed (done not detected)\n", + dev->name); + return -EIO; + } +@@ -777,7 +777,7 @@ static int ihs_fpga_probe(struct udevice *dev) + + ret = regmap_init_mem(dev_ofnode(dev), &priv->map); + if (ret) { +- debug("%s: Could not initialize regmap (err = %d)", ++printf("%s: Could not initialize regmap (err = %d)", + dev->name, ret); + return ret; + } +@@ -785,32 +785,32 @@ static int ihs_fpga_probe(struct udevice *dev) + ret = gpio_request_by_name(dev, "reset-gpios", 0, &priv->reset_gpio, + GPIOD_IS_OUT); + if (ret) { +- debug("%s: Could not get reset-GPIO (err = %d)\n", ++printf("%s: Could not get reset-GPIO (err = %d)\n", + dev->name, ret); + return ret; + } + + if (!priv->reset_gpio.dev) { +- debug("%s: Could not get reset-GPIO\n", dev->name); ++printf("%s: Could not get reset-GPIO\n", dev->name); + return -ENOENT; + } + + ret = gpio_request_by_name(dev, "done-gpios", 0, &priv->done_gpio, + GPIOD_IS_IN); + if (ret) { +- debug("%s: Could not get done-GPIO (err = %d)\n", ++printf("%s: Could not get done-GPIO (err = %d)\n", + dev->name, ret); + return ret; + } + + if (!priv->done_gpio.dev) { +- debug("%s: Could not get done-GPIO\n", dev->name); ++printf("%s: Could not get done-GPIO\n", dev->name); + return -ENOENT; + } + + ret = dm_gpio_set_value(&priv->reset_gpio, 1); + if (ret) { +- debug("%s: Error while setting reset-GPIO (err = %d)\n", ++printf("%s: Error while setting reset-GPIO (err = %d)\n", + dev->name, ret); + return ret; + } +@@ -821,14 +821,14 @@ static int ihs_fpga_probe(struct udevice *dev) + + ret = dm_gpio_set_value(&priv->reset_gpio, 0); + if (ret) { +- debug("%s: Error while setting reset-GPIO (err = %d)\n", ++printf("%s: Error while setting reset-GPIO (err = %d)\n", + dev->name, ret); + return ret; + } + + ret = wait_for_fpga_done(dev); + if (ret) { +- debug("%s: Error while waiting for FPGA done (err = %d)\n", ++printf("%s: Error while waiting for FPGA done (err = %d)\n", + dev->name, ret); + return ret; + } +@@ -837,13 +837,13 @@ static int ihs_fpga_probe(struct udevice *dev) + + ret = dm_gpio_set_value(&priv->reset_gpio, 1); + if (ret) { +- debug("%s: Error while setting reset-GPIO (err = %d)\n", ++printf("%s: Error while setting reset-GPIO (err = %d)\n", + dev->name, ret); + return ret; + } + + if (!do_reflection_test(dev)) { +- debug("%s: Reflection test FAILED\n", dev->name); ++printf("%s: Reflection test FAILED\n", dev->name); + return -EIO; + } + +diff --git a/drivers/misc/imx8/scu.c b/drivers/misc/imx8/scu.c +index 035a600f7..b8865d59c 100644 +--- a/drivers/misc/imx8/scu.c ++++ b/drivers/misc/imx8/scu.c +@@ -186,7 +186,7 @@ static int imx8_scu_probe(struct udevice *dev) + struct imx8_scu *plat = dev_get_plat(dev); + fdt_addr_t addr; + +- debug("%s(dev=%p) (plat=%p)\n", __func__, dev, plat); ++printf("%s(dev=%p) (plat=%p)\n", __func__, dev, plat); + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) +@@ -217,12 +217,12 @@ static int imx8_scu_bind(struct udevice *dev) + struct udevice *child; + ofnode node; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + ofnode_for_each_subnode(node, dev_ofnode(dev)) { + ret = lists_bind_fdt(dev, node, &child, true); + if (ret) + return ret; +- debug("bind child dev %s\n", child->name); ++printf("bind child dev %s\n", child->name); + } + + return 0; +diff --git a/drivers/misc/microchip_flexcom.c b/drivers/misc/microchip_flexcom.c +index e0a6f2d38..481dcd360 100644 +--- a/drivers/misc/microchip_flexcom.c ++++ b/drivers/misc/microchip_flexcom.c +@@ -33,7 +33,7 @@ static int microchip_flexcom_of_to_plat(struct udevice *dev) + ret = dev_read_u32(dev, "atmel,flexcom-mode", &plat->flexcom_mode); + + if (IS_ERR_VALUE(ret)) { +- debug("Missing atmel,flexcom-mode property\n"); ++printf("Missing atmel,flexcom-mode property\n"); + return ret; + } + +@@ -42,7 +42,7 @@ static int microchip_flexcom_of_to_plat(struct udevice *dev) + * the value is not supported. + */ + if (plat->flexcom_mode & 0xfffffffc) { +- debug("Wrong atmel,flexcom-mode property\n"); ++printf("Wrong atmel,flexcom-mode property\n"); + return -EINVAL; + } + +diff --git a/drivers/misc/mpc83xx_serdes.c b/drivers/misc/mpc83xx_serdes.c +index 93c87e998..69dffc227 100644 +--- a/drivers/misc/mpc83xx_serdes.c ++++ b/drivers/misc/mpc83xx_serdes.c +@@ -136,7 +136,7 @@ static int mpc83xx_serdes_probe(struct udevice *dev) + priv->rfcks = SRDSCR4_RFCKS_150; + break; + default: +- debug("%s: Could not read serdes clock value\n", dev->name); ++printf("%s: Could not read serdes clock value\n", dev->name); + return -EINVAL; + } + +@@ -163,7 +163,7 @@ static int mpc83xx_serdes_probe(struct udevice *dev) + } else if (!strcmp(proto, "sgmii")) { + setup_sgmii(dev); + } else { +- debug("%s: Invalid protocol value %s\n", dev->name, proto); ++printf("%s: Invalid protocol value %s\n", dev->name, proto); + return -EINVAL; + } + +diff --git a/drivers/misc/qfw.c b/drivers/misc/qfw.c +index ea00be88a..d9d7c5e47 100644 +--- a/drivers/misc/qfw.c ++++ b/drivers/misc/qfw.c +@@ -70,7 +70,7 @@ static int bios_linker_allocate(struct udevice *dev, + return -EINVAL; + } + +- debug("bios_linker_allocate: allocate file %s, size %u, zone %d, align %u, addr 0x%lx\n", ++printf("bios_linker_allocate: allocate file %s, size %u, zone %d, align %u, addr 0x%lx\n", + file->cfg.name, size, entry->alloc.zone, align, aligned_addr); + + qfw_read_entry(dev, be16_to_cpu(file->cfg.select), size, +@@ -106,7 +106,7 @@ static int bios_linker_add_pointer(struct udevice *dev, + if (!src || !src->addr) + return -ENOENT; + +- debug("bios_linker_add_pointer: dest->addr 0x%lx, src->addr 0x%lx, offset 0x%x size %u, 0x%llx\n", ++printf("bios_linker_add_pointer: dest->addr 0x%lx, src->addr 0x%lx, offset 0x%x size %u, 0x%llx\n", + dest->addr, src->addr, offset, entry->pointer.size, pointer); + + memcpy(&pointer, (char *)dest->addr + offset, entry->pointer.size); +@@ -251,7 +251,7 @@ static void qfw_read_entry_io(struct qfw_dev *qdev, u16 entry, u32 size, + { + struct dm_qfw_ops *ops = dm_qfw_get_ops(qdev->dev); + +- debug("%s: entry 0x%x, size %u address %p\n", __func__, entry, size, ++printf("%s: entry 0x%x, size %u address %p\n", __func__, entry, size, + address); + + ops->read_entry_io(qdev->dev, entry, size, address); +@@ -275,7 +275,7 @@ static void qfw_read_entry_dma(struct qfw_dev *qdev, u16 entry, u32 size, + if (entry != FW_CFG_INVALID) + dma.control |= cpu_to_be32(FW_CFG_DMA_SELECT | (entry << 16)); + +- debug("%s: entry 0x%x, size %u address %p, control 0x%x\n", __func__, ++printf("%s: entry 0x%x, size %u address %p, control 0x%x\n", __func__, + entry, size, address, be32_to_cpu(dma.control)); + + barrier(); +diff --git a/drivers/misc/qfw_sandbox.c b/drivers/misc/qfw_sandbox.c +index b09974d33..5c6ef0548 100644 +--- a/drivers/misc/qfw_sandbox.c ++++ b/drivers/misc/qfw_sandbox.c +@@ -21,7 +21,7 @@ struct qfw_sandbox_plat { + static void qfw_sandbox_read_entry_io(struct udevice *dev, u16 entry, u32 size, + void *address) + { +- debug("%s: entry 0x%x size %u address %p\n", __func__, entry, size, ++printf("%s: entry 0x%x size %u address %p\n", __func__, entry, size, + address); + + switch (entry) { +@@ -35,7 +35,7 @@ static void qfw_sandbox_read_entry_io(struct udevice *dev, u16 entry, u32 size, + *((u8 *)address) = FW_CFG_DMA_ENABLED; + break; + default: +- debug("%s got unsupported entry 0x%x\n", __func__, entry); ++printf("%s got unsupported entry 0x%x\n", __func__, entry); + /* + * Sandbox driver doesn't support other entries here, assume we use DMA + * to read them -- the uclass driver will exclusively use it when +@@ -53,7 +53,7 @@ static void qfw_sandbox_read_entry_dma(struct udevice *dev, struct qfw_dma *dma) + struct qfw_sandbox_plat *plat = dev_get_plat(dev); + struct fw_cfg_file *file; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (!(control & FW_CFG_DMA_READ)) + return; +@@ -75,7 +75,7 @@ static void qfw_sandbox_read_entry_dma(struct udevice *dev, struct qfw_dma *dma) + } + break; + default: +- debug("%s got unsupported entry 0x%x\n", __func__, ++printf("%s got unsupported entry 0x%x\n", __func__, + entry); + } + } else if (plat->file_dir_offset && length == 64) { +diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c +index 3cbc8f37e..ffa4d0125 100644 +--- a/drivers/misc/swap_case.c ++++ b/drivers/misc/swap_case.c +@@ -214,7 +214,7 @@ static int sandbox_swap_case_write_config(struct udevice *emul, uint offset, + barnum = pci_offset_to_barnum(offset); + bar = &plat->bar[barnum]; + +- debug("w bar %d=%lx\n", barnum, value); ++printf("w bar %d=%lx\n", barnum, value); + *bar = value; + /* space indicator (bit#0) is read-only */ + *bar |= barinfo[barnum].type; +diff --git a/drivers/misc/tegra186_bpmp.c b/drivers/misc/tegra186_bpmp.c +index dbee7f77d..c914459d8 100644 +--- a/drivers/misc/tegra186_bpmp.c ++++ b/drivers/misc/tegra186_bpmp.c +@@ -41,7 +41,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg, + struct mrq_response *resp; + ulong start_time; + +- debug("%s(dev=%p, mrq=%u, tx_msg=%p, tx_size=%d, rx_msg=%p, rx_size=%d) (priv=%p)\n", ++printf("%s(dev=%p, mrq=%u, tx_msg=%p, tx_size=%d, rx_msg=%p, rx_size=%d) (priv=%p)\n", + __func__, dev, mrq, tx_msg, tx_size, rx_msg, rx_size, priv); + + if ((tx_size > BPMP_IVC_FRAME_SIZE) || (rx_size > BPMP_IVC_FRAME_SIZE)) +@@ -114,7 +114,7 @@ static int tegra186_bpmp_bind(struct udevice *dev) + int ret; + struct udevice *child; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + ret = device_bind_driver_to_node(dev, "tegra186_clk", "tegra186_clk", + dev_ofnode(dev), &child); +@@ -180,7 +180,7 @@ static int tegra186_bpmp_probe(struct udevice *dev) + int ret; + ulong tx_base, rx_base, start_time; + +- debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv); ++printf("%s(dev=%p) (priv=%p)\n", __func__, dev, priv); + + ret = mbox_get_by_index(dev, 0, &priv->mbox); + if (ret) { +@@ -198,7 +198,7 @@ static int tegra186_bpmp_probe(struct udevice *dev) + pr_err("tegra186_bpmp_get_shmem failed for rx_base\n"); + return rx_base; + } +- debug("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base); ++printf("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base); + + ret = tegra_ivc_init(&priv->ivc, rx_base, tx_base, BPMP_IVC_FRAME_COUNT, + BPMP_IVC_FRAME_SIZE, tegra186_bpmp_ivc_notify); +@@ -234,7 +234,7 @@ static int tegra186_bpmp_remove(struct udevice *dev) + { + struct tegra186_bpmp *priv = dev_get_priv(dev); + +- debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv); ++printf("%s(dev=%p) (priv=%p)\n", __func__, dev, priv); + + mbox_free(&priv->mbox); + +diff --git a/drivers/misc/tegra_car.c b/drivers/misc/tegra_car.c +index 0ddbb3c61..994044e24 100644 +--- a/drivers/misc/tegra_car.c ++++ b/drivers/misc/tegra_car.c +@@ -19,7 +19,7 @@ static int tegra_car_bpmp_bind(struct udevice *dev) + int ret; + struct udevice *child; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + ret = device_bind_driver_to_node(dev, "tegra_car_clk", "tegra_car_clk", + dev_ofnode(dev), &child); +@@ -37,14 +37,14 @@ static int tegra_car_bpmp_bind(struct udevice *dev) + + static int tegra_car_bpmp_probe(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } + + static int tegra_car_bpmp_remove(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c +index b2d1b4f9a..a749c6caa 100644 +--- a/drivers/mmc/arm_pl180_mmci.c ++++ b/drivers/mmc/arm_pl180_mmci.c +@@ -53,7 +53,7 @@ static int wait_for_command_end(struct mmc *dev, struct mmc_cmd *cmd) + + writel(statusmask, &host->base->status_clear); + if (hoststatus & SDI_STA_CTIMEOUT) { +- debug("CMD%d time out\n", cmd->cmdidx); ++printf("CMD%d time out\n", cmd->cmdidx); + return -ETIMEDOUT; + } else if ((hoststatus & SDI_STA_CCRCFAIL) && + (cmd->resp_type & MMC_RSP_CRC)) { +@@ -66,7 +66,7 @@ static int wait_for_command_end(struct mmc *dev, struct mmc_cmd *cmd) + cmd->response[1] = readl(&host->base->response1); + cmd->response[2] = readl(&host->base->response2); + cmd->response[3] = readl(&host->base->response3); +- debug("CMD%d response[0]:0x%08X, response[1]:0x%08X, " ++printf("CMD%d response[0]:0x%08X, response[1]:0x%08X, " + "response[2]:0x%08X, response[3]:0x%08X\n", + cmd->cmdidx, cmd->response[0], cmd->response[1], + cmd->response[2], cmd->response[3]); +@@ -115,7 +115,7 @@ static int read_bytes(struct mmc *dev, u32 *dest, u32 blkcount, u32 blksize) + struct pl180_mmc_host *host = dev->priv; + u32 status, status_err; + +- debug("read_bytes: blkcount=%u blksize=%u\n", blkcount, blksize); ++printf("read_bytes: blkcount=%u blksize=%u\n", blkcount, blksize); + + status = readl(&host->base->status); + status_err = status & (SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT | +@@ -171,7 +171,7 @@ static int write_bytes(struct mmc *dev, u32 *src, u32 blkcount, u32 blksize) + struct pl180_mmc_host *host = dev->priv; + u32 status, status_err; + +- debug("write_bytes: blkcount=%u blksize=%u\n", blkcount, blksize); ++printf("write_bytes: blkcount=%u blksize=%u\n", blkcount, blksize); + + status = readl(&host->base->status); + status_err = status & (SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT); +@@ -395,7 +395,7 @@ int arm_pl180_mmci_init(struct pl180_mmc_host *host, struct mmc **mmc) + *mmc = mmc_create(&host->cfg, host); + if (!*mmc) + return -1; +- debug("registered mmc interface number is:%d\n", ++printf("registered mmc interface number is:%d\n", + (*mmc)->block_dev.devnum); + + return 0; +diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c +index 5e48394fd..d06c7d16e 100644 +--- a/drivers/mmc/bcm2835_sdhci.c ++++ b/drivers/mmc/bcm2835_sdhci.c +@@ -188,7 +188,7 @@ static int bcm2835_sdhci_probe(struct udevice *dev) + + ret = bcm2835_get_mmc_clock(clock_id); + if (ret < 0) { +- debug("%s: Failed to set MMC clock (err=%d)\n", __func__, ret); ++printf("%s: Failed to set MMC clock (err=%d)\n", __func__, ret); + return ret; + } + emmc_freq = ret; +@@ -222,7 +222,7 @@ static int bcm2835_sdhci_probe(struct udevice *dev) + + ret = sdhci_setup_cfg(&plat->cfg, host, emmc_freq, MIN_FREQ); + if (ret) { +- debug("%s: Failed to setup SDHCI (err=%d)\n", __func__, ret); ++printf("%s: Failed to setup SDHCI (err=%d)\n", __func__, ret); + return ret; + } + +diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c +index a949dad57..129b35309 100644 +--- a/drivers/mmc/dw_mmc.c ++++ b/drivers/mmc/dw_mmc.c +@@ -112,7 +112,7 @@ static int dwmci_fifo_ready(struct dwmci_host *host, u32 bit, u32 *len) + } + + if (!timeout) { +- debug("%s: FIFO underflow timeout\n", __func__); ++printf("%s: FIFO underflow timeout\n", __func__); + return -ETIMEDOUT; + } + +@@ -158,7 +158,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) + mask = dwmci_readl(host, DWMCI_RINTSTS); + /* Error during data transfer. */ + if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) { +- debug("%s: DATA ERROR!\n", __func__); ++printf("%s: DATA ERROR!\n", __func__); + ret = -EINVAL; + break; + } +@@ -215,7 +215,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) + + /* Check for timeout. */ + if (get_timer(start) > timeout) { +- debug("%s: Timeout waiting for data!\n", ++printf("%s: Timeout waiting for data!\n", + __func__); + ret = -ETIMEDOUT; + break; +@@ -261,7 +261,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + + while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { + if (get_timer(start) > timeout) { +- debug("%s: Timeout on data busy\n", __func__); ++printf("%s: Timeout on data busy\n", __func__); + return -ETIMEDOUT; + } + } +@@ -319,7 +319,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + + flags |= (cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG); + +- debug("Sending CMD%d\n",cmd->cmdidx); ++printf("Sending CMD%d\n",cmd->cmdidx); + + dwmci_writel(host, DWMCI_CMD, flags); + +@@ -333,7 +333,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + } + + if (i == retry) { +- debug("%s: Timeout.\n", __func__); ++printf("%s: Timeout.\n", __func__); + return -ETIMEDOUT; + } + +@@ -346,14 +346,14 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + * below shall be debug(). eMMC cards also do not favor + * CMD8, please keep that in mind. + */ +- debug("%s: Response Timeout.\n", __func__); ++printf("%s: Response Timeout.\n", __func__); + return -ETIMEDOUT; + } else if (mask & DWMCI_INTMSK_RE) { +- debug("%s: Response Error.\n", __func__); ++printf("%s: Response Error.\n", __func__); + return -EIO; + } else if ((cmd->resp_type & MMC_RSP_CRC) && + (mask & DWMCI_INTMSK_RCRC)) { +- debug("%s: Response CRC Error.\n", __func__); ++printf("%s: Response CRC Error.\n", __func__); + return -EIO; + } + +@@ -381,7 +381,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS, + mask, true, 1000, false); + if (ret) +- debug("%s: DWMCI_IDINTEN mask 0x%x timeout.\n", ++printf("%s: DWMCI_IDINTEN mask 0x%x timeout.\n", + __func__, mask); + /* clear interrupts */ + dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK); +@@ -416,7 +416,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) + else if (host->bus_hz) + sclk = host->bus_hz; + else { +- debug("%s: Didn't get source clock value.\n", __func__); ++printf("%s: Didn't get source clock value.\n", __func__); + return -EINVAL; + } + +@@ -435,7 +435,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) + do { + status = dwmci_readl(host, DWMCI_CMD); + if (timeout-- < 0) { +- debug("%s: Timeout!\n", __func__); ++printf("%s: Timeout!\n", __func__); + return -ETIMEDOUT; + } + } while (status & DWMCI_CMD_START); +@@ -450,7 +450,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) + do { + status = dwmci_readl(host, DWMCI_CMD); + if (timeout-- < 0) { +- debug("%s: Timeout!\n", __func__); ++printf("%s: Timeout!\n", __func__); + return -ETIMEDOUT; + } + } while (status & DWMCI_CMD_START); +@@ -471,7 +471,7 @@ static int dwmci_set_ios(struct mmc *mmc) + struct dwmci_host *host = (struct dwmci_host *)mmc->priv; + u32 ctype, regs; + +- debug("Buswidth = %d, clock: %d\n", mmc->bus_width, mmc->clock); ++printf("Buswidth = %d, clock: %d\n", mmc->bus_width, mmc->clock); + + dwmci_setup_bus(host, mmc->clock); + switch (mmc->bus_width) { +@@ -532,7 +532,7 @@ static int dwmci_init(struct mmc *mmc) + dwmci_writel(host, DWMCI_PWREN, 1); + + if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) { +- debug("%s[%d] Fail-reset!!\n", __func__, __LINE__); ++printf("%s[%d] Fail-reset!!\n", __func__, __LINE__); + return -EIO; + } + +diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c +index 1d98fa65c..dec7820e0 100644 +--- a/drivers/mmc/fsl_esdhc.c ++++ b/drivers/mmc/fsl_esdhc.c +@@ -248,7 +248,7 @@ static void esdhc_setup_dma(struct fsl_esdhc_priv *priv, struct mmc_data *data) + + if (IS_ENABLED(CONFIG_FSL_ESDHC_SUPPORT_ADMA2) && + priv->adma_desc_table) { +- debug("Using ADMA2\n"); ++printf("Using ADMA2\n"); + /* prefer ADMA2 if it is available */ + sdhci_prepare_adma_table(priv->adma_desc_table, data, + priv->dma_addr); +@@ -260,7 +260,7 @@ static void esdhc_setup_dma(struct fsl_esdhc_priv *priv, struct mmc_data *data) + esdhc_clrsetbits32(®s->proctl, PROCTL_DMAS_MASK, + PROCTL_DMAS_ADMA2); + } else { +- debug("Using SDMA\n"); ++printf("Using SDMA\n"); + if (upper_32_bits(priv->dma_addr)) + printf("Cannot use 64 bit addresses with SDMA\n"); + esdhc_write32(®s->dsaddr, lower_32_bits(priv->dma_addr)); +@@ -1017,7 +1017,7 @@ static int fsl_esdhc_probe(struct udevice *dev) + HOSTVER_VENDOR(hostver) > VENDOR_V_22) { + priv->adma_desc_table = sdhci_adma_init(); + if (!priv->adma_desc_table) +- debug("Could not allocate ADMA tables, falling back to SDMA\n"); ++printf("Could not allocate ADMA tables, falling back to SDMA\n"); + } + } + +diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c +index 465d935da..c5e359074 100644 +--- a/drivers/mmc/fsl_esdhc_imx.c ++++ b/drivers/mmc/fsl_esdhc_imx.c +@@ -1340,7 +1340,7 @@ int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg) + + ret = fsl_esdhc_cfg_to_priv(cfg, priv); + if (ret) { +- debug("%s xlate failure\n", __func__); ++printf("%s xlate failure\n", __func__); + free(plat); + free(priv); + return ret; +@@ -1348,7 +1348,7 @@ int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg) + + ret = fsl_esdhc_init(priv, plat); + if (ret) { +- debug("%s init failure\n", __func__); ++printf("%s init failure\n", __func__); + free(plat); + free(priv); + return ret; +diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c +index 0fa037224..58233dde6 100644 +--- a/drivers/mmc/ftsdc010_mci.c ++++ b/drivers/mmc/ftsdc010_mci.c +@@ -118,13 +118,13 @@ static inline int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd) + } + ret = 0; + } else { +- debug("ftsdc010: rsp err (cmd=%d, st=0x%x)\n", ++printf("ftsdc010: rsp err (cmd=%d, st=0x%x)\n", + mmc_cmd->cmdidx, st); + } + } + + if (ret) { +- debug("ftsdc010: cmd timeout (op code=%d)\n", ++printf("ftsdc010: cmd timeout (op code=%d)\n", + mmc_cmd->cmdidx); + } else if (mmc_cmd->cmdidx == MMC_CMD_APP_CMD) { + chip->acmd = 1; +@@ -171,7 +171,7 @@ static int ftsdc010_wait(struct ftsdc010_mmc __iomem *regs, uint32_t mask) + } + + if (ret){ +- debug("ftsdc010: wait st(0x%x) timeout\n", mask); ++printf("ftsdc010: wait st(0x%x) timeout\n", mask); + } + + return ret; +@@ -414,7 +414,7 @@ static int ftsdc010_mmc_of_to_plat(struct udevice *dev) + priv->minmax[0] = 400000; /* 400 kHz */ + priv->minmax[1] = val; + } else { +- debug("%s: 'clock-freq-min-max' property was deprecated.\n", ++printf("%s: 'clock-freq-min-max' property was deprecated.\n", + __func__); + } + #endif +diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c +index da8142503..56a748b9d 100644 +--- a/drivers/mmc/gen_atmel_mci.c ++++ b/drivers/mmc/gen_atmel_mci.c +@@ -69,7 +69,7 @@ static unsigned int atmel_mci_get_version(struct atmel_mci *mci) + */ + static void dump_cmd(u32 cmdr, u32 arg, u32 status, const char* msg) + { +- debug("gen_atmel_mci: CMDR %08x (%2u) ARGR %08x (SR: %08x) %s\n", ++printf("gen_atmel_mci: CMDR %08x (%2u) ARGR %08x (SR: %08x) %s\n", + cmdr, cmdr & 0x3F, arg, status, msg); + } + +@@ -109,7 +109,7 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen) + u32 clkodd = 0; + u32 mr; + +- debug("mci: bus_hz is %u, setting clock %u Hz, block size %u\n", ++printf("mci: bus_hz is %u, setting clock %u Hz, block size %u\n", + bus_hz, hz, blklen); + if (hz > 0) { + if (version >= 0x500) { +@@ -120,7 +120,7 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen) + clkodd = clkdiv & 1; + clkdiv >>= 1; + +- debug("mci: setting clock %u Hz, block size %u\n", ++printf("mci: setting clock %u Hz, block size %u\n", + bus_hz / (clkdiv * 2 + clkodd + 2), blklen); + } else { + /* find clkdiv yielding a rate <= than requested */ +@@ -128,7 +128,7 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen) + if ((bus_hz / (clkdiv + 1) / 2) <= hz) + break; + } +- debug("mci: setting clock %u Hz, block size %u\n", ++printf("mci: setting clock %u Hz, block size %u\n", + (bus_hz / (clkdiv + 1)) / 2, blklen); + + } +diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c +index 579d7a140..ab77f28d9 100644 +--- a/drivers/mmc/mmc-uclass.c ++++ b/drivers/mmc/mmc-uclass.c +@@ -389,12 +389,12 @@ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg) + return -ENOSYS; + + /* Use the fixed index with aliases node's index */ +- debug("%s: alias devnum=%d\n", __func__, dev_seq(dev)); ++printf("%s: alias devnum=%d\n", __func__, dev_seq(dev)); + + ret = blk_create_devicef(dev, "mmc_blk", "blk", IF_TYPE_MMC, + dev_seq(dev), 512, 0, &bdev); + if (ret) { +- debug("Cannot create block device\n"); ++printf("Cannot create block device\n"); + return ret; + } + bdesc = dev_get_uclass_plat(bdev); +@@ -458,7 +458,7 @@ static int mmc_blk_probe(struct udevice *dev) + + ret = mmc_init(mmc); + if (ret) { +- debug("%s: mmc_init() failed (err=%d)\n", __func__, ret); ++printf("%s: mmc_init() failed (err=%d)\n", __func__, ret); + return ret; + } + +diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c +index 1e8300728..3a9355c88 100644 +--- a/drivers/mmc/mmc.c ++++ b/drivers/mmc/mmc.c +@@ -1604,7 +1604,7 @@ int mmc_set_clock(struct mmc *mmc, uint clock, bool disable) + mmc->clock = clock; + mmc->clk_disable = disable; + +- debug("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock); ++printf("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock); + + return mmc_set_ios(mmc); + } +@@ -1980,7 +1980,7 @@ static int mmc_select_hs400(struct mmc *mmc) + err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200); + mmc->hs400_tuning = 0; + if (err) { +- debug("tuning failed\n"); ++printf("tuning failed\n"); + return err; + } + +diff --git a/drivers/mmc/mmc_boot.c b/drivers/mmc/mmc_boot.c +index 0a74b1fb7..dc90e1846 100644 +--- a/drivers/mmc/mmc_boot.c ++++ b/drivers/mmc/mmc_boot.c +@@ -34,7 +34,7 @@ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) { +- debug("mmc_boot_partition_size_change: Error1 = %d\n", err); ++printf("mmc_boot_partition_size_change: Error1 = %d\n", err); + return err; + } + +@@ -45,7 +45,7 @@ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) { +- debug("mmc_boot_partition_size_change: Error2 = %d\n", err); ++printf("mmc_boot_partition_size_change: Error2 = %d\n", err); + return err; + } + /* boot partition size is multiple of 128KB */ +@@ -58,7 +58,7 @@ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) { +- debug("mmc_boot_partition_size_change: Error3 = %d\n", err); ++printf("mmc_boot_partition_size_change: Error3 = %d\n", err); + return err; + } + /* RPMB partition size is multiple of 128KB */ +@@ -70,7 +70,7 @@ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) { +- debug("mmc_boot_partition_size_change: Error4 = %d\n", err); ++printf("mmc_boot_partition_size_change: Error4 = %d\n", err); + return err; + } + return 0; +diff --git a/drivers/mmc/mmc_legacy.c b/drivers/mmc/mmc_legacy.c +index a05da6c2e..64470d2a5 100644 +--- a/drivers/mmc/mmc_legacy.c ++++ b/drivers/mmc/mmc_legacy.c +@@ -151,7 +151,7 @@ struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) + * of failing let's just return the only MMC device + */ + if (mmc->cfg) { +- debug("Warning: MMC_TINY doesn't support multiple MMC devices\n"); ++printf("Warning: MMC_TINY doesn't support multiple MMC devices\n"); + return mmc; + } + +diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c +index e2d78794f..9aa39d600 100644 +--- a/drivers/mmc/mmc_spi.c ++++ b/drivers/mmc/mmc_spi.c +@@ -96,7 +96,7 @@ static int mmc_spi_sendcmd(struct udevice *dev, + if (!resp || !resp_size) + return 0; + +- debug("%s: cmd%d cmdarg=0x%x resp_type=0x%x " ++printf("%s: cmd%d cmdarg=0x%x resp_type=0x%x " + "resp_size=%d resp_match=%d resp_match_value=0x%x\n", + __func__, cmdidx, cmdarg, resp_type, + resp_size, resp_match, resp_match_value); +@@ -116,7 +116,7 @@ static int mmc_spi_sendcmd(struct udevice *dev, + if (ret) + return ret; + +- debug("%s: cmd%d", __func__, cmdidx); ++printf("%s: cmd%d", __func__, cmdidx); + + if (resp_match) + r = ~resp_match_value; +@@ -125,7 +125,7 @@ static int mmc_spi_sendcmd(struct udevice *dev, + ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0); + if (ret) + return ret; +- debug(" resp%d=0x%x", rpos, r); ++printf(" resp%d=0x%x", rpos, r); + rpos++; + i--; + +@@ -146,7 +146,7 @@ static int mmc_spi_sendcmd(struct udevice *dev, + ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0); + if (ret) + return ret; +- debug(" resp%d=0x%x", rpos, r); ++printf(" resp%d=0x%x", rpos, r); + rpos++; + resp[i] = r; + } +@@ -158,7 +158,7 @@ static int mmc_spi_sendcmd(struct udevice *dev, + if (ret) + return ret; + +- debug(" resp%d=0x%x", rpos, r); ++printf(" resp%d=0x%x", rpos, r); + rpos++; + i--; + +@@ -169,7 +169,7 @@ static int mmc_spi_sendcmd(struct udevice *dev, + return -ETIMEDOUT; + } + +- debug("\n"); ++printf("\n"); + + return 0; + } +@@ -198,7 +198,7 @@ static int mmc_spi_readdata(struct udevice *dev, + if (r1 == SPI_TOKEN_SINGLE) + break; + } +- debug("%s: data tok%d 0x%x\n", __func__, i, r1); ++printf("%s: data tok%d 0x%x\n", __func__, i, r1); + if (r1 == SPI_TOKEN_SINGLE) { + ret = dm_spi_xfer(dev, bsize * 8, NULL, buf, 0); + if (ret) +@@ -209,7 +209,7 @@ static int mmc_spi_readdata(struct udevice *dev, + #ifdef CONFIG_MMC_SPI_CRC_ON + u16 crc_ok = be16_to_cpu(crc16_ccitt(0, buf, bsize)); + if (crc_ok != crc) { +- debug("%s: data crc error, expected %04x got %04x\n", ++printf("%s: data crc error, expected %04x got %04x\n", + __func__, crc_ok, crc); + r1 = R1_SPI_COM_CRC; + break; +@@ -264,9 +264,9 @@ static int mmc_spi_writedata(struct udevice *dev, const void *xbuf, + if ((r1 & 0x10) == 0) /* response token */ + break; + } +- debug("%s: data tok%d 0x%x\n", __func__, i, r1); ++printf("%s: data tok%d 0x%x\n", __func__, i, r1); + if (SPI_MMC_RESPONSE_CODE(r1) == SPI_RESPONSE_ACCEPTED) { +- debug("%s: data accepted\n", __func__); ++printf("%s: data accepted\n", __func__); + for (i = 0; i < WRITE_TIMEOUT; i++) { /* wait busy */ + dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0); + if (i && r1 == 0xff) { +@@ -275,13 +275,13 @@ static int mmc_spi_writedata(struct udevice *dev, const void *xbuf, + } + } + if (i == WRITE_TIMEOUT) { +- debug("%s: data write timeout 0x%x\n", ++printf("%s: data write timeout 0x%x\n", + __func__, r1); + r1 = R1_SPI_ERROR; + break; + } + } else { +- debug("%s: data error 0x%x\n", __func__, r1); ++printf("%s: data error 0x%x\n", __func__, r1); + r1 = R1_SPI_COM_CRC; + break; + } +@@ -298,7 +298,7 @@ static int mmc_spi_writedata(struct udevice *dev, const void *xbuf, + } + } + if (i == WRITE_TIMEOUT) { +- debug("%s: data write timeout 0x%x\n", __func__, r1); ++printf("%s: data write timeout 0x%x\n", __func__, r1); + r1 = R1_SPI_ERROR; + } + } +@@ -421,12 +421,12 @@ static int dm_mmc_spi_request(struct udevice *dev, struct mmc_cmd *cmd, + break; + } + +- debug("%s: cmd%d resp0=0x%x resp1=0x%x resp2=0x%x resp3=0x%x\n", ++printf("%s: cmd%d resp0=0x%x resp1=0x%x resp2=0x%x resp3=0x%x\n", + __func__, cmd->cmdidx, cmd->response[0], cmd->response[1], + cmd->response[2], cmd->response[3]); + + if (data) { +- debug("%s: data flags=0x%x blocks=%d block_size=%d\n", ++printf("%s: data flags=0x%x blocks=%d block_size=%d\n", + __func__, data->flags, data->blocks, data->blocksize); + multi = (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK); + if (data->flags == MMC_DATA_READ) +diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c +index fea55c61e..34c7b324e 100644 +--- a/drivers/mmc/mvebu_mmc.c ++++ b/drivers/mmc/mvebu_mmc.c +@@ -231,11 +231,11 @@ static int mvebu_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, + } + + dev_dbg(dev, "resp[0x%x] ", cmd->resp_type); +- debug("[0x%x] ", cmd->response[0]); +- debug("[0x%x] ", cmd->response[1]); +- debug("[0x%x] ", cmd->response[2]); +- debug("[0x%x] ", cmd->response[3]); +- debug("\n"); ++printf("[0x%x] ", cmd->response[0]); ++printf("[0x%x] ", cmd->response[1]); ++printf("[0x%x] ", cmd->response[2]); ++printf("[0x%x] ", cmd->response[3]); ++printf("\n"); + + if (mvebu_mmc_read(mmc, SDIO_ERR_INTR_STATUS) & + (SDIO_ERR_CMD_TIMEOUT | SDIO_ERR_DATA_TIMEOUT)) +diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c +index 8fd417641..5318f1854 100644 +--- a/drivers/mmc/mxsmmc.c ++++ b/drivers/mmc/mxsmmc.c +@@ -113,7 +113,7 @@ static int mxsmmc_set_ios(struct mmc *mmc) + clrsetbits_le32(&ssp_regs->hw_ssp_ctrl0, + SSP_CTRL0_BUS_WIDTH_MASK, priv->buswidth); + +- debug("MMC%d: Set %d bits bus width\n", ++printf("MMC%d: Set %d bits bus width\n", + mmc->block_dev.devnum, mmc->bus_width); + + return 0; +@@ -324,7 +324,7 @@ mxsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data) + #else + int devnum = mmc_get_blk_desc(mmc)->devnum; + #endif +- debug("MMC%d: CMD%d\n", devnum, cmd->cmdidx); ++printf("MMC%d: CMD%d\n", devnum, cmd->cmdidx); + + /* Check bus busy */ + timeout = MXSMMC_MAX_TIMEOUT; +@@ -430,7 +430,7 @@ mxsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data) + + /* Check command timeout */ + if (reg & SSP_STATUS_RESP_TIMEOUT) { +- debug("MMC%d: Command %d timeout (status 0x%08x)\n", ++printf("MMC%d: Command %d timeout (status 0x%08x)\n", + devnum, cmd->cmdidx, reg); + return -ETIMEDOUT; + } +@@ -527,7 +527,7 @@ static int mxsmmc_set_ios(struct udevice *dev) + clrsetbits_le32(&ssp_regs->hw_ssp_ctrl0, + SSP_CTRL0_BUS_WIDTH_MASK, priv->buswidth); + +- debug("MMC%d: Set %d bits bus width\n", mmc_get_blk_desc(mmc)->devnum, ++printf("MMC%d: Set %d bits bus width\n", mmc_get_blk_desc(mmc)->devnum, + mmc->bus_width); + + return 0; +@@ -573,7 +573,7 @@ static int mxsmmc_probe(struct udevice *dev) + struct mmc *mmc; + int ret, clkid; + +- debug("%s: probe\n", __func__); ++printf("%s: probe\n", __func__); + + #if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_fsl_imx23_mmc *dtplat = &plat->dtplat; +@@ -585,7 +585,7 @@ static int mxsmmc_probe(struct udevice *dev) + clkid = p1a->arg[0]; + plat->non_removable = dtplat->non_removable; + +- debug("OF_PLATDATA: regs: 0x%p bw: %d clkid: %d non_removable: %d\n", ++printf("OF_PLATDATA: regs: 0x%p bw: %d clkid: %d non_removable: %d\n", + priv->regs, priv->buswidth, clkid, plat->non_removable); + #else + priv->regs = (struct mxs_ssp_regs *)plat->base; +@@ -691,7 +691,7 @@ static int mxsmmc_of_to_plat(struct udevice *bus) + } + plat->clk_id = prop[1]; + +- debug("%s: base=0x%x, bus_width=%d %s dma_id=%d clk_id=%d\n", ++printf("%s: base=0x%x, bus_width=%d %s dma_id=%d clk_id=%d\n", + __func__, (uint)plat->base, plat->buswidth, + plat->non_removable ? "non-removable" : NULL, + plat->dma_id, plat->clk_id); +diff --git a/drivers/mmc/nexell_dw_mmc.c b/drivers/mmc/nexell_dw_mmc.c +index 2723e4887..c7a54ef5b 100644 +--- a/drivers/mmc/nexell_dw_mmc.c ++++ b/drivers/mmc/nexell_dw_mmc.c +@@ -87,7 +87,7 @@ static void nx_dw_mmc_clk_delay(struct udevice *dev) + priv->d_shift, priv->s_delay, priv->s_shift); + + writel(delay, (host->ioaddr + DWMCI_CLKCTRL)); +- debug("%s: Values set: d_delay==%d, d_shift==%d, s_delay==%d, " ++printf("%s: Values set: d_delay==%d, d_shift==%d, s_delay==%d, " + "s_shift==%d\n", __func__, priv->d_delay, priv->d_shift, + priv->s_delay, priv->s_shift); + } +@@ -128,7 +128,7 @@ static unsigned long nx_dw_mmc_set_clk(struct dwmci_host *host, + sprintf(name, "%s.%d", DEV_NAME_SDHC, index); + clk = clk_get((const char *)name); + if (!clk) { +- debug("%s: clk_get(\"%s\") failed!\n", __func__, name); ++printf("%s: clk_get(\"%s\") failed!\n", __func__, name); + return 0; + } + priv->clk = clk; +@@ -147,7 +147,7 @@ static int nexell_dwmmc_of_to_plat(struct udevice *dev) + struct dwmci_host *host = &priv->host; + int val = -1; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + host->name = dev->name; + host->ioaddr = dev_read_addr_ptr(dev); +@@ -158,7 +158,7 @@ static int nexell_dwmmc_of_to_plat(struct udevice *dev) + + val = dev_read_u32_default(dev, "index", -1); + if (val < 0 || val > 2) { +- debug(" 'index' missing/invalid!\n"); ++printf(" 'index' missing/invalid!\n"); + return -EINVAL; + } + host->dev_index = val; +@@ -174,7 +174,7 @@ static int nexell_dwmmc_of_to_plat(struct udevice *dev) + priv->s_shift = dev_read_u32_default(dev, "sample_shift", 2); + priv->mmcboost = dev_read_u32_default(dev, "mmcboost", 0); + +- debug(" index==%d, name==%s, ioaddr==0x%08x\n", ++printf(" index==%d, name==%s, ioaddr==0x%08x\n", + host->dev_index, host->name, (u32)host->ioaddr); + return 0; + } +@@ -201,11 +201,11 @@ static int nexell_dwmmc_probe(struct udevice *dev) + + if (nx_dw_mmc_set_clk(host, priv->frequency * 4) != + priv->frequency * 4) { +- debug("%s: nx_dw_mmc_set_clk(host, %d) failed!\n", ++printf("%s: nx_dw_mmc_set_clk(host, %d) failed!\n", + __func__, priv->frequency * 4); + return -EIO; + } +- debug("%s: nx_dw_mmc_set_clk(host, %d) OK\n", ++printf("%s: nx_dw_mmc_set_clk(host, %d) OK\n", + __func__, priv->frequency * 4); + + nx_dw_mmc_reset(host->dev_index); +diff --git a/drivers/mmc/octeontx_hsmmc.c b/drivers/mmc/octeontx_hsmmc.c +index 2e569a9e0..84e99341c 100644 +--- a/drivers/mmc/octeontx_hsmmc.c ++++ b/drivers/mmc/octeontx_hsmmc.c +@@ -821,7 +821,7 @@ octeontx_mmc_get_cr_mods(struct mmc *mmc, const struct mmc_cmd *cmd, + else + cr.rtype_xor = r ^ sdm->sd.r; + +- debug("%s(%s): mmc c: %d, mmc r: %d, desired c: %d, xor c: %d, xor r: %d\n", ++printf("%s(%s): mmc c: %d, mmc r: %d, desired c: %d, xor c: %d, xor r: %d\n", + __func__, mmc->dev->name, c, r, desired_ctype, + cr.ctype_xor, cr.rtype_xor); + return cr; +@@ -976,14 +976,14 @@ static void octeontx_mmc_start_dma(struct mmc *mmc, bool write, + if (!mmc->high_capacity) + block *= mmc->read_bl_len; + emm_dma.s.card_addr = block; +- debug("%s(%s): card address: 0x%x, size: %d, multi: %d\n", ++printf("%s(%s): card address: 0x%x, size: %d, multi: %d\n", + __func__, mmc->dev->name, block, size, emm_dma.s.multi); + + if (timeout > 0) + timeout = (timeout * 1000) - 1000; + set_wdog(mmc, timeout); + +- debug(" Writing 0x%llx to mio_emm_dma\n", emm_dma.u); ++printf(" Writing 0x%llx to mio_emm_dma\n", emm_dma.u); + write_csr(mmc, MIO_EMM_DMA(), emm_dma.u); + } + +@@ -1011,7 +1011,7 @@ static void octeontx_mmc_cleanup_dma(struct mmc *mmc, + int retries = 3; + + do { +- debug("%s(%s): rsp_sts: 0x%llx, rsp_lo: 0x%llx, dma_int: 0x%llx\n", ++printf("%s(%s): rsp_sts: 0x%llx, rsp_lo: 0x%llx, dma_int: 0x%llx\n", + __func__, mmc->dev->name, rsp_sts.u, + read_csr(mmc, MIO_EMM_RSP_LO()), + read_csr(mmc, MIO_EMM_DMA_INT())); +@@ -1031,7 +1031,7 @@ static void octeontx_mmc_cleanup_dma(struct mmc *mmc, + pr_err("%s(%s): Error: could not clean up DMA. RSP_STS: 0x%llx, RSP_LO: 0x%llx\n", + __func__, mmc->dev->name, rsp_sts.u, + read_csr(mmc, MIO_EMM_RSP_LO())); +- debug(" rsp_sts after clearing up DMA: 0x%llx\n", ++printf(" rsp_sts after clearing up DMA: 0x%llx\n", + read_csr(mmc, MIO_EMM_RSP_STS())); + } + +@@ -1056,7 +1056,7 @@ static int octeontx_mmc_wait_dma(struct mmc *mmc, bool write, ulong timeout, + bool timed_out = false; + bool err = false; + +- debug("%s(%s, %lu, %d), delay: %uus\n", __func__, mmc->dev->name, ++printf("%s(%s, %lu, %d), delay: %uus\n", __func__, mmc->dev->name, + timeout, verbose, host->dma_wait_delay); + + udelay(host->dma_wait_delay); +@@ -1070,7 +1070,7 @@ static int octeontx_mmc_wait_dma(struct mmc *mmc, bool write, ulong timeout, + rsp_sts.s.rsp_timeout) { + err = true; + #ifdef DEBUG +- debug("%s: f1\n", __func__); ++printf("%s: f1\n", __func__); + octeontx_mmc_print_rsp_errors(mmc, rsp_sts); + #endif + break; +@@ -1096,7 +1096,7 @@ static int octeontx_mmc_wait_dma(struct mmc *mmc, bool write, ulong timeout, + __func__, mmc->dev->name, rsp_sts.u, + emm_dma_int.u, emm_dma.u); + octeontx_print_rsp_sts(mmc); +- debug(" MIO_EMM_DEBUG: 0x%llx\n", ++printf(" MIO_EMM_DEBUG: 0x%llx\n", + read_csr(mmc, MIO_EMM_DEBUG())); + pr_err("%s: Trying DMA resume...\n", __func__); + } +@@ -1156,9 +1156,9 @@ static int octeontx_mmc_read_blocks(struct mmc *mmc, struct mmc_cmd *cmd, + bool timed_out = false; + bool multi_xfer = cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK; + +- debug("%s(%s): dest: %p, dma address: 0x%llx, blkcnt: %lu, start: %lu\n", ++printf("%s(%s): dest: %p, dma address: 0x%llx, blkcnt: %lu, start: %lu\n", + __func__, mmc->dev->name, data->dest, dma_addr, blkcnt, start); +- debug("%s: rsp_sts: 0x%llx\n", __func__, ++printf("%s: rsp_sts: 0x%llx\n", __func__, + read_csr(mmc, MIO_EMM_RSP_STS())); + /* use max timeout for multi-block transfers */ + /* timeout = 0; */ +@@ -1223,7 +1223,7 @@ static int octeontx_mmc_read_blocks(struct mmc *mmc, struct mmc_cmd *cmd, + } while (--count); + } + #ifdef DEBUG +- debug("%s(%s): Read %lu (0x%lx) blocks starting at block %u (0x%x) to address %p (dma address 0x%llx)\n", ++printf("%s(%s): Read %lu (0x%lx) blocks starting at block %u (0x%x) to address %p (dma address 0x%llx)\n", + __func__, mmc->dev->name, blkcnt, blkcnt, + cmd->cmdarg, cmd->cmdarg, data->dest, + dm_pci_virt_to_mem(host->dev, data->dest)); +@@ -1386,11 +1386,11 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + else + timeout = MMC_TIMEOUT_LONG; + +- debug("%s(%s): cmd idx: %u, arg: 0x%x, resp type: 0x%x, timeout: %u\n", ++printf("%s(%s): cmd idx: %u, arg: 0x%x, resp type: 0x%x, timeout: %u\n", + __func__, name, cmd->cmdidx, cmd->cmdarg, cmd->resp_type, + timeout); + if (data) +- debug(" data: addr: %p, flags: 0x%x, blocks: %u, blocksize: %u\n", ++printf(" data: addr: %p, flags: 0x%x, blocks: %u, blocksize: %u\n", + data->dest, data->flags, data->blocks, data->blocksize); + + octeontx_mmc_switch_to(mmc); +@@ -1430,7 +1430,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + emm_rca.u = 0; + emm_rca.s.card_rca = (cmd->cmdarg >> 16); + write_csr(mmc, MIO_EMM_RCA(), emm_rca.u); +- debug("%s: Set SD relative address (RCA) to 0x%x\n", ++printf("%s: Set SD relative address (RCA) to 0x%x\n", + __func__, emm_rca.s.card_rca); + } + break; +@@ -1451,7 +1451,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + if (data && data->blocks == 1 && data->blocksize != 512) { + emm_cmd.s.offset = + 64 - ((data->blocks * data->blocksize) / 8); +- debug("%s: offset set to %u\n", __func__, emm_cmd.s.offset); ++printf("%s: offset set to %u\n", __func__, emm_cmd.s.offset); + } + + if (data && data->flags & MMC_DATA_WRITE) { +@@ -1468,7 +1468,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + return -1; + } + #ifdef DEBUG +- debug("%s: Sending %d bytes data\n", __func__, data->blocksize); ++printf("%s: Sending %d bytes data\n", __func__, data->blocksize); + print_buffer(0, src, 1, data->blocksize, 0); + #endif + emm_buf_idx.u = 0; +@@ -1482,7 +1482,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + } + write_csr(mmc, MIO_EMM_BUF_IDX(), 0); + } +- debug("%s(%s): Sending command %u (emm_cmd: 0x%llx)\n", __func__, ++printf("%s(%s): Sending command %u (emm_cmd: 0x%llx)\n", __func__, + name, cmd->cmdidx, emm_cmd.u); + set_wdog(mmc, timeout * 1000); + write_csr(mmc, MIO_EMM_CMD(), emm_cmd.u); +@@ -1496,13 +1496,13 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + (get_timer(start) < timeout + 10)); + octeontx_mmc_print_rsp_errors(mmc, rsp_sts); + if (rsp_sts.s.rsp_timeout || !rsp_sts.s.cmd_done) { +- debug("%s(%s): Error: command %u(0x%x) timed out. rsp_sts: 0x%llx\n", ++printf("%s(%s): Error: command %u(0x%x) timed out. rsp_sts: 0x%llx\n", + __func__, name, cmd->cmdidx, cmd->cmdarg, rsp_sts.u); + octeontx_mmc_print_registers(mmc); + return -ETIMEDOUT; + } + if (rsp_sts.s.rsp_crc_err) { +- debug("%s(%s): RSP CRC error, rsp_sts: 0x%llx, cmdidx: %u, arg: 0x%08x\n", ++printf("%s(%s): RSP CRC error, rsp_sts: 0x%llx, cmdidx: %u, arg: 0x%08x\n", + __func__, name, rsp_sts.u, cmd->cmdidx, cmd->cmdarg); + octeontx_mmc_print_registers(mmc); + return -1; +@@ -1516,7 +1516,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + } + if (rsp_sts.s.rsp_bad_sts) { + rsp_lo.u = read_csr(mmc, MIO_EMM_RSP_LO()); +- debug("%s: Bad response for bus id %d, cmd id %d:\n" ++printf("%s: Bad response for bus id %d, cmd id %d:\n" + " rsp_timeout: %d\n" + " rsp_bad_sts: %d\n" + " rsp_crc_err: %d\n", +@@ -1525,7 +1525,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + rsp_sts.s.rsp_bad_sts, + rsp_sts.s.rsp_crc_err); + if (rsp_sts.s.rsp_type == 1 && rsp_sts.s.rsp_bad_sts) { +- debug(" Response status: 0x%llx\n", ++printf(" Response status: 0x%llx\n", + (rsp_lo.u >> 8) & 0xffffffff); + #ifdef DEBUG + mmc_print_status((rsp_lo.u >> 8) & 0xffffffff); +@@ -1534,10 +1534,10 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + goto error; + } + if (rsp_sts.s.cmd_idx != cmd->cmdidx) { +- debug("%s(%s): Command response index %d does not match command index %d\n", ++printf("%s(%s): Command response index %d does not match command index %d\n", + __func__, name, rsp_sts.s.cmd_idx, cmd->cmdidx); + octeontx_print_rsp_sts(mmc); +- debug("%s: rsp_lo: 0x%llx\n", __func__, ++printf("%s: rsp_lo: 0x%llx\n", __func__, + read_csr(mmc, MIO_EMM_RSP_LO())); + + goto error; +@@ -1546,7 +1546,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + slot->is_acmd = (cmd->cmdidx == MMC_CMD_APP_CMD); + + if (!cmd->resp_type & MMC_RSP_PRESENT) +- debug(" Response type: 0x%x, no response expected\n", ++printf(" Response type: 0x%x, no response expected\n", + cmd->resp_type); + /* Get the response if present */ + if (rsp_sts.s.rsp_val && (cmd->resp_type & MMC_RSP_PRESENT)) { +@@ -1560,7 +1560,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + case 4: + case 5: + cmd->response[0] = (rsp_lo.u >> 8) & 0xffffffffull; +- debug(" response: 0x%08x\n", ++printf(" response: 0x%08x\n", + cmd->response[0]); + cmd->response[1] = 0; + cmd->response[2] = 0; +@@ -1572,7 +1572,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + rsp_hi.u = read_csr(mmc, MIO_EMM_RSP_HI()); + cmd->response[1] = rsp_hi.u & 0xffffffff; + cmd->response[0] = (rsp_hi.u >> 32) & 0xffffffff; +- debug(" response: 0x%08x 0x%08x 0x%08x 0x%08x\n", ++printf(" response: 0x%08x 0x%08x 0x%08x 0x%08x\n", + cmd->response[0], cmd->response[1], + cmd->response[2], cmd->response[3]); + break; +@@ -1583,7 +1583,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + return -1; + } + } else { +- debug(" Response not expected\n"); ++printf(" Response not expected\n"); + } + + if (data && data->flags & MMC_DATA_READ) { +@@ -1611,7 +1611,7 @@ static int octeontx_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + } + write_csr(mmc, MIO_EMM_BUF_IDX(), 0); + #ifdef DEBUG +- debug("%s: Received %d bytes data\n", __func__, ++printf("%s: Received %d bytes data\n", __func__, + data->blocksize); + print_buffer(0, data->dest, 1, data->blocksize, 0); + #endif +@@ -1639,14 +1639,14 @@ static int octeontx_mmc_test_cmd(struct mmc *mmc, u32 opcode, int *statp) + + memset(&cmd, 0, sizeof(cmd)); + +- debug("%s(%s, %u, %p)\n", __func__, mmc->dev->name, opcode, statp); ++printf("%s(%s, %u, %p)\n", __func__, mmc->dev->name, opcode, statp); + cmd.cmdidx = opcode; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = mmc->rca << 16; + + err = octeontx_mmc_send_cmd(mmc, &cmd, NULL); + if (err) +- debug("%s(%s, %u) returned %d\n", __func__, ++printf("%s(%s, %u) returned %d\n", __func__, + mmc->dev->name, opcode, err); + if (statp) + *statp = cmd.response[0]; +@@ -1661,7 +1661,7 @@ static int octeontx_mmc_test_get_ext_csd(struct mmc *mmc, u32 opcode, + int err; + u8 ext_csd[MMC_MAX_BLOCK_LEN]; + +- debug("%s(%s, %u, %p)\n", __func__, mmc->dev->name, opcode, statp); ++printf("%s(%s, %u, %p)\n", __func__, mmc->dev->name, opcode, statp); + memset(&cmd, 0, sizeof(cmd)); + + cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; +@@ -1701,7 +1701,7 @@ static void octeontx_mmc_set_emm_timing(struct mmc *mmc, + struct octeontx_mmc_slot *slot = mmc->priv; + union mio_emm_debug emm_debug; + +- debug("%s(%s, 0x%llx) din: %u\n", __func__, mmc->dev->name, ++printf("%s(%s, 0x%llx) din: %u\n", __func__, mmc->dev->name, + emm_timing.u, emm_timing.s.data_in_tap); + + udelay(1); +@@ -1843,7 +1843,7 @@ static int octeontx_tune_hs400(struct mmc *mmc) + */ + + emm_timing = slot->hs200_taps; +- debug("%s(%s): Start ci: %d, co: %d, di: %d, do: %d\n", ++printf("%s(%s): Start ci: %d, co: %d, di: %d, do: %d\n", + __func__, mmc->dev->name, emm_timing.s.cmd_in_tap, + emm_timing.s.cmd_out_tap, emm_timing.s.data_in_tap, + emm_timing.s.data_out_tap); +@@ -1861,7 +1861,7 @@ static int octeontx_tune_hs400(struct mmc *mmc) + + for (tap = 0; tap <= MAX_NO_OF_TAPS; tap++, prev_ok = !err) { + if (tap < MAX_NO_OF_TAPS) { +- debug("%s: Testing data in tap %d\n", __func__, tap); ++printf("%s: Testing data in tap %d\n", __func__, tap); + emm_timing.s.data_in_tap = tap; + octeontx_mmc_set_emm_timing(mmc, emm_timing); + +@@ -1878,23 +1878,23 @@ static int octeontx_tune_hs400(struct mmc *mmc) + sizeof(buffer))) { + #ifdef DEBUG + if (!err) { +- debug("%s: data mismatch. Read:\n", ++printf("%s: data mismatch. Read:\n", + __func__); + print_buffer(0, buffer, 1, + sizeof(buffer), 0); +- debug("\nExpected:\n"); ++printf("\nExpected:\n"); + print_buffer(0, + octeontx_hs400_tuning_block, 1, + sizeof(octeontx_hs400_tuning_block), + 0); + } else { +- debug("%s: Error %d reading block\n", ++printf("%s: Error %d reading block\n", + __func__, err); + } + #endif + err = -EINVAL; + } else { +- debug("%s: tap %d good\n", __func__, tap); ++printf("%s: tap %d good\n", __func__, tap); + } + how[tap] = "-+"[!err]; + } else { +@@ -1936,14 +1936,14 @@ static int octeontx_tune_hs400(struct mmc *mmc) + tap = best_start + 2; + } + how[tap] = '@'; +- debug("Tuning: %s\n", how); +- debug("%s(%s): HS400 tap: best run start: %d, length: %d, tap: %d\n", ++printf("Tuning: %s\n", how); ++printf("%s(%s): HS400 tap: best run start: %d, length: %d, tap: %d\n", + __func__, mmc->dev->name, best_start, best_run, tap); + slot->hs400_taps = slot->hs200_taps; + slot->hs400_taps.s.data_in_tap = tap; + slot->hs400_tuned = true; + if (env_get_yesno("emmc_export_hs400_taps") > 0) { +- debug("%s(%s): Exporting HS400 taps\n", ++printf("%s(%s): Exporting HS400 taps\n", + __func__, mmc->dev->name); + env_set_ulong("emmc_timing_tap", slot->host->timing_taps); + snprintf(env_name, sizeof(env_name), +@@ -1983,7 +1983,7 @@ static int octeontx_tune_hs400(struct mmc *mmc) + slot->bus_id); + env_set_ulong(env_name, slot->data_out_hs400_delay); + } else { +- debug("%s(%s): HS400 environment export disabled\n", ++printf("%s(%s): HS400 environment export disabled\n", + __func__, mmc->dev->name); + } + octeontx_mmc_set_timing(mmc); +@@ -2042,7 +2042,7 @@ static int octeontx_mmc_adjust_tuning(struct mmc *mmc, struct adj *adj, + char how[MAX_NO_OF_TAPS + 1] = ""; + bool is_hs200 = mmc->selected_mode == MMC_HS_200; + +- debug("%s(%s, %s, %d), hs200: %d\n", __func__, mmc->dev->name, ++printf("%s(%s, %s, %d), hs200: %d\n", __func__, mmc->dev->name, + adj->name, opcode, is_hs200); + octeontx_mmc_set_emm_timing(mmc, + is_hs200 ? slot->hs200_taps : slot->taps); +@@ -2077,7 +2077,7 @@ static int octeontx_mmc_adjust_tuning(struct mmc *mmc, struct adj *adj, + timing.u &= ~(0x3full << adj->mask_shift); + timing.u |= (u64)tap << adj->mask_shift; + write_csr(mmc, MIO_EMM_TIMING(), timing.u); +- debug("%s(%s): Testing ci: %d, co: %d, di: %d, do: %d\n", ++printf("%s(%s): Testing ci: %d, co: %d, di: %d, do: %d\n", + __func__, mmc->dev->name, timing.s.cmd_in_tap, + timing.s.cmd_out_tap, timing.s.data_in_tap, + timing.s.data_out_tap); +@@ -2095,14 +2095,14 @@ static int octeontx_mmc_adjust_tuning(struct mmc *mmc, struct adj *adj, + for (count = 0; count < 2; count++) { + err = adj->test(mmc, opcode, NULL); + if (err) { +- debug("%s(%s, %s): tap %d failed, count: %d, rsp_sts: 0x%llx, rsp_lo: 0x%llx\n", ++printf("%s(%s, %s): tap %d failed, count: %d, rsp_sts: 0x%llx, rsp_lo: 0x%llx\n", + __func__, mmc->dev->name, + adj->name, tap, count, + read_csr(mmc, + MIO_EMM_RSP_STS()), + read_csr(mmc, + MIO_EMM_RSP_LO())); +- debug("%s(%s, %s): tap: %d, do: %d, di: %d, co: %d, ci: %d\n", ++printf("%s(%s, %s): tap: %d, do: %d, di: %d, co: %d, ci: %d\n", + __func__, mmc->dev->name, + adj->name, tap, + timing.s.data_out_tap, +@@ -2111,7 +2111,7 @@ static int octeontx_mmc_adjust_tuning(struct mmc *mmc, struct adj *adj, + timing.s.cmd_in_tap); + break; + } +- debug("%s(%s, %s): tap %d passed, count: %d, rsp_sts: 0x%llx, rsp_lo: 0x%llx\n", ++printf("%s(%s, %s): tap %d passed, count: %d, rsp_sts: 0x%llx, rsp_lo: 0x%llx\n", + __func__, mmc->dev->name, adj->name, tap, + count, + read_csr(mmc, MIO_EMM_RSP_STS()), +@@ -2132,7 +2132,7 @@ static int octeontx_mmc_adjust_tuning(struct mmc *mmc, struct adj *adj, + * If no CRC/etc errors in the response, but previous + * failed, note the start of a new run. + */ +- debug(" prev_ok: %d\n", prev_ok); ++printf(" prev_ok: %d\n", prev_ok); + if (!prev_ok) + start_run = tap; + } else if (prev_ok) { +@@ -2153,7 +2153,7 @@ static int octeontx_mmc_adjust_tuning(struct mmc *mmc, struct adj *adj, + } + + tap = best_start + best_run / 2; +- debug(" tap %d is center, start: %d, run: %d\n", tap, ++printf(" tap %d is center, start: %d, run: %d\n", tap, + best_start, best_run); + if (is_hs200) { + slot->hs200_taps.u &= ~(0x3full << adj->mask_shift); +@@ -2172,12 +2172,12 @@ static int octeontx_mmc_adjust_tuning(struct mmc *mmc, struct adj *adj, + tap = best_start + best_run / 2; + if (is_hs200 && (tap + tap_adj >= 0) && (tap + tap_adj < 64) && + tap_status & (1ULL << (tap + tap_adj))) { +- debug("Adjusting tap from %d by %d to %d\n", ++printf("Adjusting tap from %d by %d to %d\n", + tap, tap_adj, tap + tap_adj); + tap += tap_adj; + } + how[tap] = '@'; +- debug("%s/%s %d/%d/%d %s\n", mmc->dev->name, ++printf("%s/%s %d/%d/%d %s\n", mmc->dev->name, + adj->name, best_start, tap, best_start + best_run, how); + + if (is_hs200) { +@@ -2190,15 +2190,15 @@ static int octeontx_mmc_adjust_tuning(struct mmc *mmc, struct adj *adj, + + #ifdef DEBUG + if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200) { +- debug("%s(%s, %s): After successful tuning\n", ++printf("%s(%s, %s): After successful tuning\n", + __func__, mmc->dev->name, adj->name); +- debug("%s(%s, %s): tap: %d, new do: %d, di: %d, co: %d, ci: %d\n", ++printf("%s(%s, %s): tap: %d, new do: %d, di: %d, co: %d, ci: %d\n", + __func__, mmc->dev->name, adj->name, tap, + slot->taps.s.data_out_tap, + slot->taps.s.data_in_tap, + slot->taps.s.cmd_out_tap, + slot->taps.s.cmd_in_tap); +- debug("%s(%s, %s): tap: %d, new do HS200: %d, di: %d, co: %d, ci: %d\n", ++printf("%s(%s, %s): tap: %d, new do HS200: %d, di: %d, co: %d, ci: %d\n", + __func__, mmc->dev->name, adj->name, tap, + slot->hs200_taps.s.data_out_tap, + slot->hs200_taps.s.data_in_tap, +@@ -2319,7 +2319,7 @@ static int octeontx_mmc_execute_tuning(struct udevice *dev, u32 opcode) + "emmc%d_data_in_tap_hs200", slot->bus_id); + in_tap = env_get_ulong(env_name, 10, (ulong)-1); + if (in_tap != (ulong)-1) { +- debug("%s(%s): Overriding HS200 data in tap to %d\n", ++printf("%s(%s): Overriding HS200 data in tap to %d\n", + __func__, dev->name, (int)in_tap); + slot->hs200_taps.s.data_in_tap = in_tap; + continue; +@@ -2329,20 +2329,20 @@ static int octeontx_mmc_execute_tuning(struct udevice *dev, u32 opcode) + "emmc%d_data_in_tap", slot->bus_id); + in_tap = env_get_ulong(env_name, 10, (ulong)-1); + if (in_tap != (ulong)-1) { +- debug("%s(%s): Overriding non-HS200 data in tap to %d\n", ++printf("%s(%s): Overriding non-HS200 data in tap to %d\n", + __func__, dev->name, (int)in_tap); + slot->taps.s.data_in_tap = in_tap; + continue; + } + } + +- debug("%s(%s): Testing: %s, mode: %s, opcode: %u\n", __func__, ++printf("%s(%s): Testing: %s, mode: %s, opcode: %u\n", __func__, + dev->name, a->name, mmc_mode_name(mmc->selected_mode), + opcode); + + /* Skip DDR only test when not in DDR mode */ + if (a->ddr_only && !mmc->ddr_mode) { +- debug("%s(%s): Skipping %s due to non-DDR mode\n", ++printf("%s(%s): Skipping %s due to non-DDR mode\n", + __func__, dev->name, a->name); + continue; + } +@@ -2351,13 +2351,13 @@ static int octeontx_mmc_execute_tuning(struct udevice *dev, u32 opcode) + */ + if (is_hs200) { + if (a->not_hs200_only) { +- debug("%s(%s): Skipping %s\n", __func__, ++printf("%s(%s): Skipping %s\n", __func__, + dev->name, a->name); + continue; + } + } else { + if (a->hs200_only) { +- debug("%s(%s): Skipping %s\n", __func__, ++printf("%s(%s): Skipping %s\n", __func__, + dev->name, a->name); + continue; + } +@@ -2399,7 +2399,7 @@ static int octeontx_mmc_execute_tuning(struct udevice *dev, u32 opcode) + } + if (memcmp(buffer, octeontx_hs400_tuning_block, + sizeof(buffer))) { +- debug("%s(%s): Writing new HS400 tuning block to block %d\n", ++printf("%s(%s): Writing new HS400 tuning block to block %d\n", + __func__, dev->name, slot->hs400_tuning_block); + cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK; + data.src = (void *)octeontx_hs400_tuning_block; +@@ -2454,10 +2454,10 @@ static int octeontx_mmc_set_ios(struct udevice *dev) + bool is_hs200 = false; + bool is_hs400 = false; + +- debug("%s(%s): Entry\n", __func__, dev->name); +- debug(" clock: %u, bus width: %u, mode: %u\n", mmc->clock, ++printf("%s(%s): Entry\n", __func__, dev->name); ++printf(" clock: %u, bus width: %u, mode: %u\n", mmc->clock, + mmc->bus_width, mmc->selected_mode); +- debug(" host caps: 0x%x, card caps: 0x%x\n", mmc->host_caps, ++printf(" host caps: 0x%x, card caps: 0x%x\n", mmc->host_caps, + mmc->card_caps); + octeontx_mmc_switch_to(mmc); + +@@ -2485,7 +2485,7 @@ static int octeontx_mmc_set_ios(struct udevice *dev) + if (mmc->ddr_mode && bus_width) + bus_width |= 4; + +- debug("%s: sys_freq: %llu\n", __func__, host->sys_freq); ++printf("%s: sys_freq: %llu\n", __func__, host->sys_freq); + clk_period = octeontx_mmc_calc_clk_period(mmc); + + emm_switch.u = 0; +@@ -2494,7 +2494,7 @@ static int octeontx_mmc_set_ios(struct udevice *dev) + emm_switch.s.clk_hi = clk_period / 2; + emm_switch.s.clk_lo = clk_period / 2; + +- debug("%s: last mode: %d, mode: %d, last clock: %u, clock: %u, ddr: %d\n", ++printf("%s: last mode: %d, mode: %d, last clock: %u, clock: %u, ddr: %d\n", + __func__, slot->last_mode, mmc->selected_mode, + slot->last_clock, mmc->clock, mmc->ddr_mode); + switch (mmc->selected_mode) { +@@ -2542,15 +2542,15 @@ static int octeontx_mmc_set_ios(struct udevice *dev) + } + + if (CONFIG_IS_ENABLED(MMC_VERBOSE)) { +- debug("%s(%s): Setting bus mode to %s\n", __func__, dev->name, ++printf("%s(%s): Setting bus mode to %s\n", __func__, dev->name, + mmc_mode_name(mmc->selected_mode)); + } else { +- debug("%s(%s): Setting bus mode to 0x%x\n", __func__, dev->name, ++printf("%s(%s): Setting bus mode to 0x%x\n", __func__, dev->name, + mmc->selected_mode); + } + + #if !defined(CONFIG_ARCH_OCTEON) +- debug(" Trying switch 0x%llx w%d hs:%d hs200:%d hs400:%d\n", ++printf(" Trying switch 0x%llx w%d hs:%d hs200:%d hs400:%d\n", + emm_switch.u, emm_switch.s.bus_width, emm_switch.s.hs_timing, + emm_switch.s.hs200_timing, emm_switch.s.hs400_timing); + #endif +@@ -2560,7 +2560,7 @@ static int octeontx_mmc_set_ios(struct udevice *dev) + mdelay(100); + mode.u = read_csr(mmc, MIO_EMM_MODEX(slot->bus_id)); + #if !defined(CONFIG_ARCH_OCTEON) +- debug("%s(%s): mode: 0x%llx w:%d, hs:%d, hs200:%d, hs400:%d\n", ++printf("%s(%s): mode: 0x%llx w:%d, hs:%d, hs200:%d, hs400:%d\n", + __func__, dev->name, mode.u, mode.s.bus_width, + mode.s.hs_timing, mode.s.hs200_timing, mode.s.hs400_timing); + #endif +@@ -2569,7 +2569,7 @@ static int octeontx_mmc_set_ios(struct udevice *dev) + + #ifdef MMC_SUPPORTS_TUNING + if (!err && mmc->selected_mode == MMC_HS_400 && !slot->hs400_tuned) { +- debug("%s: Tuning HS400 mode\n", __func__); ++printf("%s: Tuning HS400 mode\n", __func__); + err = octeontx_tune_hs400(mmc); + } + #endif +@@ -2589,7 +2589,7 @@ static int octeontx_mmc_get_cd(struct udevice *dev) + val = dm_gpio_get_value(&slot->cd_gpio); + val ^= slot->cd_inverted; + } +- debug("%s(%s): cd: %d\n", __func__, dev->name, val); ++printf("%s(%s): cd: %d\n", __func__, dev->name, val); + return val; + } + +@@ -2605,7 +2605,7 @@ static int octeontx_mmc_get_wp(struct udevice *dev) + val = dm_gpio_get_value(&slot->wp_gpio); + val ^= slot->wp_inverted; + } +- debug("%s(%s): wp: %d\n", __func__, dev->name, val); ++printf("%s(%s): wp: %d\n", __func__, dev->name, val); + return val; + } + +@@ -2615,7 +2615,7 @@ static int octeontx_mmc_configure_delay(struct mmc *mmc) + struct octeontx_mmc_slot *slot = mmc_to_slot(mmc); + union mio_emm_sample emm_sample; + +- debug("%s(%s)\n", __func__, mmc->dev->name); ++printf("%s(%s)\n", __func__, mmc->dev->name); + + emm_sample.u = 0; + emm_sample.s.cmd_cnt = slot->cmd_cnt; +@@ -2647,7 +2647,7 @@ static void octeontx_mmc_set_timing(struct mmc *mmc) + break; + } + +- debug("%s(%s):\n cmd_in_tap: %u\n cmd_out_tap: %u\n data_in_tap: %u\n data_out_tap: %u\n", ++printf("%s(%s):\n cmd_in_tap: %u\n cmd_out_tap: %u\n data_in_tap: %u\n data_out_tap: %u\n", + __func__, mmc->dev->name, timing.s.cmd_in_tap, + timing.s.cmd_out_tap, timing.s.data_in_tap, + timing.s.data_out_tap); +@@ -2662,7 +2662,7 @@ static int octeontx_mmc_configure_delay(struct mmc *mmc) + bool __maybe_unused is_hs200; + bool __maybe_unused is_hs400; + +- debug("%s(%s)\n", __func__, mmc->dev->name); ++printf("%s(%s)\n", __func__, mmc->dev->name); + + if (IS_ENABLED(CONFIG_ARCH_OCTEON) || + IS_ENABLED(CONFIG_ARCH_OCTEONTX)) { +@@ -2721,7 +2721,7 @@ static int octeontx_mmc_configure_delay(struct mmc *mmc) + dout = octeontx2_mmc_calc_delay( + mmc, + slot->data_out_hs200_delay); +- debug("%s(%s): Calibrated HS200/HS400 cmd out delay: %dps tap: %d, data out delay: %d, tap: %d\n", ++printf("%s(%s): Calibrated HS200/HS400 cmd out delay: %dps tap: %d, data out delay: %d, tap: %d\n", + __func__, mmc->dev->name, + slot->cmd_out_hs200_delay, cout, + slot->data_out_hs200_delay, dout); +@@ -2743,7 +2743,7 @@ static int octeontx_mmc_configure_delay(struct mmc *mmc) + dout = octeontx2_mmc_calc_delay( + mmc, + slot->data_out_hs400_delay); +- debug("%s(%s): Calibrated HS200/HS400 cmd out delay: %dps tap: %d, data out delay: %d, tap: %d\n", ++printf("%s(%s): Calibrated HS200/HS400 cmd out delay: %dps tap: %d, data out delay: %d, tap: %d\n", + __func__, mmc->dev->name, + slot->cmd_out_hs400_delay, cout, + slot->data_out_hs400_delay, dout); +@@ -2758,7 +2758,7 @@ static int octeontx_mmc_configure_delay(struct mmc *mmc) + mmc->dev->name, mmc->selected_mode); + return -1; + } +- debug("%s(%s): Not tuned, hs200: %d, hs200 tuned: %d, hs400: %d, hs400 tuned: %d, tuned: %d\n", ++printf("%s(%s): Not tuned, hs200: %d, hs200 tuned: %d, hs400: %d, hs400 tuned: %d, tuned: %d\n", + __func__, mmc->dev->name, is_hs200, + slot->hs200_tuned, + is_hs400, slot->hs400_tuned, slot->tuned); +@@ -2785,27 +2785,27 @@ static int octeontx_mmc_configure_delay(struct mmc *mmc) + } + + if (is_hs200) +- debug("%s(%s): hs200 taps: ci: %u, co: %u, di: %u, do: %u\n", ++printf("%s(%s): hs200 taps: ci: %u, co: %u, di: %u, do: %u\n", + __func__, mmc->dev->name, + slot->hs200_taps.s.cmd_in_tap, + slot->hs200_taps.s.cmd_out_tap, + slot->hs200_taps.s.data_in_tap, + slot->hs200_taps.s.data_out_tap); + else if (is_hs400) +- debug("%s(%s): hs400 taps: ci: %u, co: %u, di: %u, do: %u\n", ++printf("%s(%s): hs400 taps: ci: %u, co: %u, di: %u, do: %u\n", + __func__, mmc->dev->name, + slot->hs400_taps.s.cmd_in_tap, + slot->hs400_taps.s.cmd_out_tap, + slot->hs400_taps.s.data_in_tap, + slot->hs400_taps.s.data_out_tap); + else +- debug("%s(%s): taps: ci: %u, co: %u, di: %u, do: %u\n", ++printf("%s(%s): taps: ci: %u, co: %u, di: %u, do: %u\n", + __func__, mmc->dev->name, slot->taps.s.cmd_in_tap, + slot->taps.s.cmd_out_tap, + slot->taps.s.data_in_tap, + slot->taps.s.data_out_tap); + octeontx_mmc_set_timing(mmc); +- debug("%s: Done\n", __func__); ++printf("%s: Done\n", __func__); + } + + return 0; +@@ -2889,7 +2889,7 @@ static void do_switch(struct mmc *mmc, union mio_emm_switch emm_switch) + udelay(100); + emm_switch.s.bus_id = bus_id; + } +- debug("%s(%s, 0x%llx)\n", __func__, mmc->dev->name, emm_switch.u); ++printf("%s(%s, 0x%llx)\n", __func__, mmc->dev->name, emm_switch.u); + write_csr(mmc, MIO_EMM_SWITCH(), emm_switch.u); + + start = get_timer(0); +@@ -2906,7 +2906,7 @@ static void do_switch(struct mmc *mmc, union mio_emm_switch emm_switch) + slot->cached_switch = emm_switch; + check_switch_errors(mmc); + slot->cached_switch.u = emm_switch.u; +- debug("%s: emm_switch: 0x%llx, rsp_lo: 0x%llx\n", ++printf("%s: emm_switch: 0x%llx, rsp_lo: 0x%llx\n", + __func__, read_csr(mmc, MIO_EMM_SWITCH()), + read_csr(mmc, MIO_EMM_RSP_LO())); + } +@@ -2956,7 +2956,7 @@ static int octeontx2_mmc_calc_delay(struct mmc *mmc, int delay) + __func__, mmc->dev->name); + return -1; + } +- debug("%s(%s, %d) timing taps: %llu\n", __func__, mmc->dev->name, ++printf("%s(%s, %d) timing taps: %llu\n", __func__, mmc->dev->name, + delay, host->timing_taps); + return min_t(int, DIV_ROUND_UP(delay, host->timing_taps), 63); + } +@@ -2976,9 +2976,9 @@ static int octeontx_mmc_calibrate_delay(struct mmc *mmc) + ulong start; + u8 bus_id, bus_ena; + +- debug("%s: Calibrating delay\n", __func__); ++printf("%s: Calibrating delay\n", __func__); + if (host->is_asim || host->is_emul) { +- debug(" No calibration for ASIM\n"); ++printf(" No calibration for ASIM\n"); + return 0; + } + emm_tap.u = 0; +@@ -3064,7 +3064,7 @@ static int octeontx_mmc_calibrate_delay(struct mmc *mmc) + } + /* Round up */ + host->timing_taps = (10 * 1000 * emm_tap.s.delay) / TOTAL_NO_OF_TAPS; +- debug("%s(%s): timing taps: %llu, delay: %u\n", ++printf("%s(%s): timing taps: %llu, delay: %u\n", + __func__, mmc->dev->name, host->timing_taps, emm_tap.s.delay); + host->timing_calibrated = true; + return 0; +@@ -3149,7 +3149,7 @@ static int octeontx_mmc_set_output_bus_timing(struct mmc *mmc) + if (IS_ENABLED(CONFIG_ARCH_OCTEONTX)) + return 0; + +- debug("%s(%s)\n", __func__, mmc->dev->name); ++printf("%s(%s)\n", __func__, mmc->dev->name); + if (slot->is_asim || slot->is_emul) + return 0; + +@@ -3172,12 +3172,12 @@ static int octeontx_mmc_set_output_bus_timing(struct mmc *mmc) + snprintf(env_name, sizeof(env_name), "mmc%d_hs200_dout_delay_ps", + slot->bus_id); + dout_delay = env_get_ulong(env_name, 10, dout_delay); +- debug("%s: dout_delay: %u\n", __func__, dout_delay); ++printf("%s: dout_delay: %u\n", __func__, dout_delay); + + cout_bdelay = octeontx2_mmc_calc_delay(mmc, cout_delay); + dout_bdelay = octeontx2_mmc_calc_delay(mmc, dout_delay); + +- debug("%s: cmd output delay: %u, data output delay: %u, cmd bdelay: %d, data bdelay: %d, clock: %d\n", ++printf("%s: cmd output delay: %u, data output delay: %u, cmd bdelay: %d, data bdelay: %d, clock: %d\n", + __func__, cout_delay, dout_delay, cout_bdelay, dout_bdelay, + mmc->clock); + if (cout_bdelay < 0 || dout_bdelay < 0) { +@@ -3199,7 +3199,7 @@ static int octeontx_mmc_set_output_bus_timing(struct mmc *mmc) + slot->taps.s.data_out_tap = dout_bdelay; + } + octeontx_mmc_set_emm_timing(mmc, timing); +- debug("%s(%s): bdelay: %d/%d, clock: %d, ddr: %s, timing taps: %llu, do: %d, di: %d, co: %d, ci: %d\n", ++printf("%s(%s): bdelay: %d/%d, clock: %d, ddr: %s, timing taps: %llu, do: %d, di: %d, co: %d, ci: %d\n", + __func__, mmc->dev->name, cout_bdelay, dout_bdelay, mmc->clock, + mmc->ddr_mode ? "yes" : "no", + mmc_to_host(mmc)->timing_taps, +@@ -3219,7 +3219,7 @@ static void octeontx_mmc_set_clock(struct mmc *mmc) + + clock = min(mmc->cfg->f_max, (uint)slot->clock); + clock = max(mmc->cfg->f_min, clock); +- debug("%s(%s): f_min: %u, f_max: %u, clock: %u\n", __func__, ++printf("%s(%s): f_min: %u, f_max: %u, clock: %u\n", __func__, + mmc->dev->name, mmc->cfg->f_min, mmc->cfg->f_max, clock); + slot->clock = clock; + mmc->clock = clock; +@@ -3289,7 +3289,7 @@ static void octeontx_mmc_switch_io(struct mmc *mmc) + return; + } + +- debug("%s(%s): last: %s, supply: %p\n", __func__, mmc->dev->name, ++printf("%s(%s): last: %s, supply: %p\n", __func__, mmc->dev->name, + last_mmc->dev->name, mmc->vqmmc_supply); + + /* The supply is the same so we do nothing */ +@@ -3298,14 +3298,14 @@ static void octeontx_mmc_switch_io(struct mmc *mmc) + + /* Turn off the old slot I/O supply */ + if (last_mmc->vqmmc_supply) { +- debug("%s(%s): Turning off IO to %s, supply: %s\n", ++printf("%s(%s): Turning off IO to %s, supply: %s\n", + __func__, mmc->dev->name, last_mmc->dev->name, + last_mmc->vqmmc_supply->name); + regulator_set_enable(last_mmc->vqmmc_supply, false); + } + /* Turn on the new slot I/O supply */ + if (mmc->vqmmc_supply) { +- debug("%s(%s): Turning on IO to slot %d, supply: %s\n", ++printf("%s(%s): Turning on IO to slot %d, supply: %s\n", + __func__, mmc->dev->name, slot->bus_id, + mmc->vqmmc_supply->name); + regulator_set_enable(mmc->vqmmc_supply, true); +@@ -3331,7 +3331,7 @@ static void octeontx_mmc_switch_to(struct mmc *mmc) + if (slot->bus_id == host->last_slotid) + return; + +- debug("%s(%s) switching from slot %d to slot %d\n", __func__, ++printf("%s(%s) switching from slot %d to slot %d\n", __func__, + mmc->dev->name, host->last_slotid, slot->bus_id); + octeontx_mmc_switch_io(mmc); + +@@ -3380,7 +3380,7 @@ static int octeontx_mmc_init_timing(struct mmc *mmc) + if (mmc_to_slot(mmc)->is_asim || mmc_to_slot(mmc)->is_emul) + return 0; + +- debug("%s(%s)\n", __func__, mmc->dev->name); ++printf("%s(%s)\n", __func__, mmc->dev->name); + timing.u = 0; + timing.s.cmd_out_tap = MMC_DEFAULT_CMD_OUT_TAP; + timing.s.data_out_tap = MMC_DEFAULT_DATA_OUT_TAP; +@@ -3404,7 +3404,7 @@ static int octeontx_mmc_init_lowlevel(struct mmc *mmc) + union mio_emm_switch emm_switch; + u32 clk_period; + +- debug("%s(%s): lowlevel init for slot %d\n", __func__, ++printf("%s(%s): lowlevel init for slot %d\n", __func__, + mmc->dev->name, slot->bus_id); + host->emm_cfg.s.bus_ena &= ~(1 << slot->bus_id); + write_csr(mmc, MIO_EMM_CFG(), host->emm_cfg.u); +@@ -3433,7 +3433,7 @@ static int octeontx_mmc_init_lowlevel(struct mmc *mmc) + emm_switch.s.clk_hi = clk_period / 2; + + emm_switch.s.bus_id = slot->bus_id; +- debug("%s: Performing switch\n", __func__); ++printf("%s: Performing switch\n", __func__); + do_switch(mmc, emm_switch); + slot->cached_switch.u = emm_switch.u; + +@@ -3444,7 +3444,7 @@ static int octeontx_mmc_init_lowlevel(struct mmc *mmc) + write_csr(mmc, MIO_EMM_STS_MASK(), 0xe4390080ull); + write_csr(mmc, MIO_EMM_RCA(), 1); + mdelay(10); +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + return 0; + } + +@@ -3537,7 +3537,7 @@ static int octeontx_mmc_get_config(struct udevice *dev) + int bus_width = 1; + ulong new_max_freq; + +- debug("%s(%s)", __func__, dev->name); ++printf("%s(%s)", __func__, dev->name); + slot->cfg.name = dev->name; + + slot->cfg.f_max = ofnode_read_s32_default(dev_ofnode(dev), +@@ -3547,7 +3547,7 @@ static int octeontx_mmc_get_config(struct udevice *dev) + slot->bus_id); + + new_max_freq = env_get_ulong(env_name, 10, slot->cfg.f_max); +- debug("Reading %s, got %lu\n", env_name, new_max_freq); ++printf("Reading %s, got %lu\n", env_name, new_max_freq); + + if (new_max_freq != slot->cfg.f_max) { + printf("Overriding device tree MMC maximum frequency %u to %lu\n", +@@ -3562,18 +3562,18 @@ static int octeontx_mmc_get_config(struct udevice *dev) + ofnode_read_s32_default(dev_ofnode(dev), + "marvell,hs400-tuning-block", + -1); +- debug("%s(%s): mmc HS400 tuning block: %d\n", __func__, ++printf("%s(%s): mmc HS400 tuning block: %d\n", __func__, + dev->name, slot->hs400_tuning_block); + + slot->hs200_tap_adj = + ofnode_read_s32_default(dev_ofnode(dev), + "marvell,hs200-tap-adjust", 0); +- debug("%s(%s): hs200-tap-adjust: %d\n", __func__, dev->name, ++printf("%s(%s): hs200-tap-adjust: %d\n", __func__, dev->name, + slot->hs200_tap_adj); + slot->hs400_tap_adj = + ofnode_read_s32_default(dev_ofnode(dev), + "marvell,hs400-tap-adjust", 0); +- debug("%s(%s): hs400-tap-adjust: %d\n", __func__, dev->name, ++printf("%s(%s): hs400-tap-adjust: %d\n", __func__, dev->name, + slot->hs400_tap_adj); + } + +@@ -3584,7 +3584,7 @@ static int octeontx_mmc_get_config(struct udevice *dev) + } else { + low = xlate_voltage(voltages[0]); + high = xlate_voltage(voltages[1]); +- debug(" low voltage: 0x%x (%u), high: 0x%x (%u)\n", ++printf(" low voltage: 0x%x (%u), high: 0x%x (%u)\n", + low, voltages[0], high, voltages[1]); + if (low > high || !low || !high) { + pr_err("Invalid MMC voltage range [%u-%u] specified for %s\n", +@@ -3597,7 +3597,7 @@ static int octeontx_mmc_get_config(struct udevice *dev) + low <<= 1; + } while (low <= high); + } +- debug("%s: config voltages: 0x%x\n", __func__, slot->cfg.voltages); ++printf("%s: config voltages: 0x%x\n", __func__, slot->cfg.voltages); + slot->slew = ofnode_read_s32_default(node, "cavium,clk-slew", -1); + slot->drive = ofnode_read_s32_default(node, "cavium,drv-strength", -1); + gpio_request_by_name(dev, "cd-gpios", 0, &slot->cd_gpio, GPIOD_IS_IN); +@@ -3666,25 +3666,25 @@ static int octeontx_mmc_get_config(struct udevice *dev) + ofnode_read_u32_default(node, + "marvell,cmd-out-hs200-dly", + MMC_DEFAULT_HS200_CMD_OUT_DLY); +- debug("%s(%s): HS200 cmd out delay: %d\n", ++printf("%s(%s): HS200 cmd out delay: %d\n", + __func__, dev->name, slot->cmd_out_hs200_delay); + slot->data_out_hs200_delay = + ofnode_read_u32_default(node, + "marvell,data-out-hs200-dly", + MMC_DEFAULT_HS200_DATA_OUT_DLY); +- debug("%s(%s): HS200 data out delay: %d\n", ++printf("%s(%s): HS200 data out delay: %d\n", + __func__, dev->name, slot->data_out_hs200_delay); + slot->cmd_out_hs400_delay = + ofnode_read_u32_default(node, + "marvell,cmd-out-hs400-dly", + MMC_DEFAULT_HS400_CMD_OUT_DLY); +- debug("%s(%s): HS400 cmd out delay: %d\n", ++printf("%s(%s): HS400 cmd out delay: %d\n", + __func__, dev->name, slot->cmd_out_hs400_delay); + slot->data_out_hs400_delay = + ofnode_read_u32_default(node, + "marvell,data-out-hs400-dly", + MMC_DEFAULT_HS400_DATA_OUT_DLY); +- debug("%s(%s): HS400 data out delay: %d\n", ++printf("%s(%s): HS400 data out delay: %d\n", + __func__, dev->name, slot->data_out_hs400_delay); + } + } +@@ -3695,7 +3695,7 @@ static int octeontx_mmc_get_config(struct udevice *dev) + "cavium,cmd-clk-skew", 0); + slot->dat_clk_skew = ofnode_read_u32_default(node, + "cavium,dat-clk-skew", 0); +- debug("%s(%s): host caps: 0x%x\n", __func__, ++printf("%s(%s): host caps: 0x%x\n", __func__, + dev->name, slot->cfg.host_caps); + return 0; + } +@@ -3713,7 +3713,7 @@ static int octeontx_mmc_slot_probe(struct udevice *dev) + struct mmc *mmc; + int err; + +- debug("%s(%s)\n", __func__, dev->name); ++printf("%s(%s)\n", __func__, dev->name); + if (!host_probed) { + pr_err("%s(%s): Error: host not probed yet\n", + __func__, dev->name); +@@ -3724,18 +3724,18 @@ static int octeontx_mmc_slot_probe(struct udevice *dev) + + slot->valid = false; + if (!octeontx_mmc_get_valid(dev)) { +- debug("%s(%s): slot is invalid\n", __func__, dev->name); ++printf("%s(%s): slot is invalid\n", __func__, dev->name); + return -ENODEV; + } + +- debug("%s(%s): Getting config\n", __func__, dev->name); ++printf("%s(%s): Getting config\n", __func__, dev->name); + err = octeontx_mmc_get_config(dev); + if (err) { + pr_err("probe(%s): Error getting config\n", dev->name); + return err; + } + +- debug("%s(%s): mmc bind, mmc: %p\n", __func__, dev->name, &slot->mmc); ++printf("%s(%s): mmc bind, mmc: %p\n", __func__, dev->name, &slot->mmc); + err = mmc_bind(dev, &slot->mmc, &slot->cfg); + if (err) { + pr_err("%s(%s): Error binding mmc\n", __func__, dev->name); +@@ -3745,7 +3745,7 @@ static int octeontx_mmc_slot_probe(struct udevice *dev) + /* For some reason, mmc_bind always assigns priv to the device */ + slot->mmc.priv = slot; + +- debug("%s(%s): lowlevel init\n", __func__, dev->name); ++printf("%s(%s): lowlevel init\n", __func__, dev->name); + err = octeontx_mmc_init_lowlevel(mmc); + if (err) { + pr_err("probe(%s): Low-level init failed\n", dev->name); +@@ -3754,7 +3754,7 @@ static int octeontx_mmc_slot_probe(struct udevice *dev) + + slot->valid = true; + +- debug("%s(%s):\n" ++printf("%s(%s):\n" + " base address : %p\n" + " bus id : %d\n", __func__, dev->name, + slot->base_addr, slot->bus_id); +@@ -3812,10 +3812,10 @@ static int octeontx_mmc_host_probe(struct udevice *dev) + int ret; + u8 rev; + +- debug("%s(%s): Entry host: %p\n", __func__, dev->name, host); ++printf("%s(%s): Entry host: %p\n", __func__, dev->name, host); + + if (!octeontx_mmc_get_valid(dev)) { +- debug("%s(%s): mmc host not valid\n", __func__, dev->name); ++printf("%s(%s): mmc host not valid\n", __func__, dev->name); + return -ENODEV; + } + memset(host, 0, sizeof(*host)); +@@ -3834,7 +3834,7 @@ static int octeontx_mmc_host_probe(struct udevice *dev) + } + + host->dev = dev; +- debug("%s(%s): Base address: %p\n", __func__, dev->name, ++printf("%s(%s): Base address: %p\n", __func__, dev->name, + host->base_addr); + if (!dev_has_ofnode(dev)) { + pr_err("%s: No device tree information found\n", __func__); +@@ -3853,13 +3853,13 @@ static int octeontx_mmc_host_probe(struct udevice *dev) + "marvell,dma-wait-delay", 1); + /* Force reset of eMMC */ + writeq(0, host->base_addr + MIO_EMM_CFG()); +- debug("%s: Clearing MIO_EMM_CFG\n", __func__); ++printf("%s: Clearing MIO_EMM_CFG\n", __func__); + udelay(100); + emm_int.u = readq(host->base_addr + MIO_EMM_INT()); +- debug("%s: Writing 0x%llx to MIO_EMM_INT\n", __func__, emm_int.u); ++printf("%s: Writing 0x%llx to MIO_EMM_INT\n", __func__, emm_int.u); + writeq(emm_int.u, host->base_addr + MIO_EMM_INT()); + +- debug("%s(%s): Getting I/O clock\n", __func__, dev->name); ++printf("%s(%s): Getting I/O clock\n", __func__, dev->name); + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) + return ret; +@@ -3869,13 +3869,13 @@ static int octeontx_mmc_host_probe(struct udevice *dev) + return ret; + + host->sys_freq = clk_get_rate(&clk); +- debug("%s(%s): I/O clock %llu\n", __func__, dev->name, host->sys_freq); ++printf("%s(%s): I/O clock %llu\n", __func__, dev->name, host->sys_freq); + + if (IS_ENABLED(CONFIG_ARCH_OCTEONTX2)) { + /* Flags for issues to work around */ + dm_pci_read_config8(dev, PCI_REVISION_ID, &rev); + if (otx_is_soc(CN96XX)) { +- debug("%s: CN96XX revision %d\n", __func__, rev); ++printf("%s: CN96XX revision %d\n", __func__, rev); + switch (rev) { + case 0: + host->calibrate_glitch = true; +@@ -3887,10 +3887,10 @@ static int octeontx_mmc_host_probe(struct udevice *dev) + break; + case 0x10: /* C0 */ + host->hs400_skew_needed = true; +- debug("HS400 skew support enabled\n"); ++printf("HS400 skew support enabled\n"); + fallthrough; + default: +- debug("CN96XX rev C0+ detected\n"); ++printf("CN96XX rev C0+ detected\n"); + host->tap_requires_noclk = true; + break; + } +@@ -3924,7 +3924,7 @@ static int octeontx_mmc_host_child_pre_probe(struct udevice *dev) + char name[16]; + int err; + +- debug("%s(%s) Pre-Probe\n", __func__, dev->name); ++printf("%s(%s) Pre-Probe\n", __func__, dev->name); + if (ofnode_read_u32(node, "reg", &bus_id)) { + pr_err("%s(%s): Error: \"reg\" not found in device tree\n", + __func__, dev->name); +@@ -3950,7 +3950,7 @@ static int octeontx_mmc_host_child_pre_probe(struct udevice *dev) + + /* FIXME: This code should not be needed */ + if (!dev_get_uclass_priv(dev)) { +- debug("%s(%s): Allocating uclass priv\n", __func__, ++printf("%s(%s): Allocating uclass priv\n", __func__, + dev->name); + upriv = calloc(1, sizeof(struct mmc_uclass_priv)); + if (!upriv) +@@ -3966,9 +3966,9 @@ static int octeontx_mmc_host_child_pre_probe(struct udevice *dev) + } + + upriv->mmc = &slot->mmc; +- debug("%s: uclass priv: %p, mmc: %p\n", dev->name, upriv, upriv->mmc); ++printf("%s: uclass priv: %p, mmc: %p\n", dev->name, upriv, upriv->mmc); + +- debug("%s: ret: %d\n", __func__, err); ++printf("%s: ret: %d\n", __func__, err); + return err; + } + +diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c +index da44511d9..50b483689 100644 +--- a/drivers/mmc/omap_hsmmc.c ++++ b/drivers/mmc/omap_hsmmc.c +@@ -1634,7 +1634,7 @@ omap_hsmmc_get_pad_conf_entry(const fdt32_t *pinctrl, int count) + + padconf = (struct pad_conf_entry *)malloc(sizeof(*padconf) * count); + if (!padconf) { +- debug("failed to allocate memory\n"); ++printf("failed to allocate memory\n"); + return 0; + } + +@@ -1655,7 +1655,7 @@ omap_hsmmc_get_iodelay_cfg_entry(const fdt32_t *pinctrl, int count) + + iodelay = (struct iodelay_cfg_entry *)malloc(sizeof(*iodelay) * count); + if (!iodelay) { +- debug("failed to allocate memory\n"); ++printf("failed to allocate memory\n"); + return 0; + } + +@@ -1678,14 +1678,14 @@ static const fdt32_t *omap_hsmmc_get_pinctrl_entry(u32 phandle, + + offset = fdt_node_offset_by_phandle(fdt, phandle); + if (offset < 0) { +- debug("failed to get pinctrl node %s.\n", ++printf("failed to get pinctrl node %s.\n", + fdt_strerror(offset)); + return 0; + } + + pinctrl = fdt_getprop(fdt, offset, name, len); + if (!pinctrl) { +- debug("failed to get property %s\n", name); ++printf("failed to get property %s\n", name); + return 0; + } + +@@ -1701,7 +1701,7 @@ static uint32_t omap_hsmmc_get_pad_conf_phandle(struct mmc *mmc, + + phandle = fdt_getprop(fdt, node, prop_name, NULL); + if (!phandle) { +- debug("failed to get property %s\n", prop_name); ++printf("failed to get property %s\n", prop_name); + return 0; + } + +@@ -1719,7 +1719,7 @@ static uint32_t omap_hsmmc_get_iodelay_phandle(struct mmc *mmc, + + phandle = fdt_getprop(fdt, node, prop_name, &len); + if (!phandle) { +- debug("failed to get property %s\n", prop_name); ++printf("failed to get property %s\n", prop_name); + return 0; + } + +@@ -1802,13 +1802,13 @@ omap_hsmmc_get_pinctrl_by_mode(struct mmc *mmc, char *mode) + pinctrl_state = (struct omap_hsmmc_pinctrl_state *) + malloc(sizeof(*pinctrl_state)); + if (!pinctrl_state) { +- debug("failed to allocate memory\n"); ++printf("failed to allocate memory\n"); + return 0; + } + + index = fdt_stringlist_search(fdt, node, "pinctrl-names", mode); + if (index < 0) { +- debug("fail to find %s mode %s\n", mode, fdt_strerror(index)); ++printf("fail to find %s mode %s\n", mode, fdt_strerror(index)); + goto err_pinctrl_state; + } + +@@ -1852,7 +1852,7 @@ err_pinctrl_state: + s = omap_hsmmc_get_pinctrl_by_mode(mmc, #mode); \ + \ + if (!s && !optional) { \ +- debug("%s: no pinctrl for %s\n", \ ++printf("%s: no pinctrl for %s\n", \ + mmc->dev->name, #mode); \ + cfg->host_caps &= ~(capmask); \ + } else { \ +diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c +index 9ad92648a..950358fb5 100644 +--- a/drivers/mmc/renesas-sdhi.c ++++ b/drivers/mmc/renesas-sdhi.c +@@ -416,7 +416,7 @@ static int renesas_sdhi_hs400(struct udevice *dev) + + if (priv->hs400_bad_tap & BIT(new_tap)) { + new_tap = priv->tap_set; +- debug("Three consecutive bad tap is prohibited\n"); ++printf("Three consecutive bad tap is prohibited\n"); + } + + priv->tap_set = new_tap; +@@ -700,20 +700,20 @@ static int renesas_sdhi_addr_aligned_gen(uintptr_t ubuf, + { + /* Check if start is aligned */ + if (!IS_ALIGNED(ubuf, RENESAS_SDHI_DMA_ALIGNMENT)) { +- debug("Unaligned buffer address %lx\n", ubuf); ++printf("Unaligned buffer address %lx\n", ubuf); + return 0; + } + + /* Check if length is aligned */ + if (len != len_aligned) { +- debug("Unaligned buffer length %zu\n", len); ++printf("Unaligned buffer length %zu\n", len); + return 0; + } + + #ifdef CONFIG_PHYS_64BIT + /* Check if below 32bit boundary */ + if ((ubuf >> 32) || (ubuf + len_aligned) >> 32) { +- debug("Buffer above 32bit boundary %lx-%lx\n", ++printf("Buffer above 32bit boundary %lx-%lx\n", + ubuf, ubuf + len_aligned); + return 0; + } +diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c +index d7d5361fd..b6dd548d9 100644 +--- a/drivers/mmc/rockchip_dw_mmc.c ++++ b/drivers/mmc/rockchip_dw_mmc.c +@@ -43,7 +43,7 @@ static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq) + + ret = clk_set_rate(&priv->clk, freq); + if (ret < 0) { +- debug("%s: err=%d\n", __func__, ret); ++printf("%s: err=%d\n", __func__, ret); + return ret; + } + +@@ -92,7 +92,7 @@ static int rockchip_dwmmc_of_to_plat(struct udevice *dev) + priv->minmax[0] = 400000; /* 400 kHz */ + priv->minmax[1] = val; + } else { +- debug("%s: 'clock-freq-min-max' property was deprecated.\n", ++printf("%s: 'clock-freq-min-max' property was deprecated.\n", + __func__); + } + #endif +diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c +index ea7e50666..daddf28c0 100644 +--- a/drivers/mmc/rpmb.c ++++ b/drivers/mmc/rpmb.c +@@ -463,7 +463,7 @@ static int rpmb_route_frames(struct mmc *mmc, struct s_rpmb *req, + return rpmb_route_read_req(mmc, req, req_cnt, rsp, rsp_cnt); + + default: +- debug("Unsupported message type: %d\n", ++printf("Unsupported message type: %d\n", + be16_to_cpu(req->request)); + return -EINVAL; + } +diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c +index dee84263c..6d74570e6 100644 +--- a/drivers/mmc/s5p_sdhci.c ++++ b/drivers/mmc/s5p_sdhci.c +@@ -137,7 +137,7 @@ static int do_sdhci_init(struct sdhci_host *host) + dm_gpio_set_value(&host->pwr_gpio, 1); + ret = exynos_pinmux_config(dev_id, flag); + if (ret) { +- debug("MMC not configured\n"); ++printf("MMC not configured\n"); + return ret; + } + } +@@ -145,7 +145,7 @@ static int do_sdhci_init(struct sdhci_host *host) + if (dm_gpio_is_valid(&host->cd_gpio)) { + ret = dm_gpio_get_value(&host->cd_gpio); + if (ret) { +- debug("no SD card detected (%d)\n", ret); ++printf("no SD card detected (%d)\n", ret); + return -ENODEV; + } + } +@@ -161,7 +161,7 @@ static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host) + /* Get device id */ + dev_id = pinmux_decode_periph_id(blob, node); + if (dev_id < PERIPH_ID_SDMMC0 || dev_id > PERIPH_ID_SDMMC3) { +- debug("MMC: Can't get device id\n"); ++printf("MMC: Can't get device id\n"); + return -EINVAL; + } + host->index = dev_id - PERIPH_ID_SDMMC0; +@@ -169,7 +169,7 @@ static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host) + /* Get bus width */ + bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0); + if (bus_width <= 0) { +- debug("MMC: Can't get bus-width\n"); ++printf("MMC: Can't get bus-width\n"); + return -EINVAL; + } + host->bus_width = bus_width; +@@ -177,7 +177,7 @@ static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host) + /* Get the base address from the device node */ + base = fdtdec_get_addr(blob, node, "reg"); + if (!base) { +- debug("MMC: Can't get base address\n"); ++printf("MMC: Can't get base address\n"); + return -EINVAL; + } + host->ioaddr = (void *)base; +diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c +index 18ba020aa..6ab63b656 100644 +--- a/drivers/mmc/sandbox_mmc.c ++++ b/drivers/mmc/sandbox_mmc.c +@@ -104,7 +104,7 @@ static int sandbox_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, + case MMC_CMD_APP_CMD: + break; + case MMC_CMD_SET_BLOCKLEN: +- debug("block len %d\n", cmd->cmdarg); ++printf("block len %d\n", cmd->cmdarg); + break; + case SD_CMD_APP_SEND_SCR: { + u32 *scr = (u32 *)data->dest; +@@ -113,7 +113,7 @@ static int sandbox_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, + break; + } + default: +- debug("%s: Unknown command %d\n", __func__, cmd->cmdidx); ++printf("%s: Unknown command %d\n", __func__, cmd->cmdidx); + break; + } + +diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c +index d9ab6a0a8..a66286e78 100644 +--- a/drivers/mmc/sdhci.c ++++ b/drivers/mmc/sdhci.c +@@ -351,7 +351,7 @@ static int sdhci_execute_tuning(struct udevice *dev, uint opcode) + struct mmc *mmc = mmc_get_mmc_dev(dev); + struct sdhci_host *host = mmc->priv; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (host->ops && host->ops->platform_execute_tuning) { + err = host->ops->platform_execute_tuning(mmc, opcode); +@@ -806,13 +806,13 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, + #else + caps = sdhci_readl(host, SDHCI_CAPABILITIES); + #endif +- debug("%s, caps: 0x%x\n", __func__, caps); ++printf("%s, caps: 0x%x\n", __func__, caps); + + #ifdef CONFIG_MMC_SDHCI_SDMA + if ((caps & SDHCI_CAN_DO_SDMA)) { + host->flags |= USE_SDMA; + } else { +- debug("%s: Your controller doesn't support SDMA!!\n", ++printf("%s: Your controller doesn't support SDMA!!\n", + __func__); + } + #endif +@@ -851,7 +851,7 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, + #else + caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); + #endif +- debug("%s, caps_1: 0x%x\n", __func__, caps_1); ++printf("%s, caps_1: 0x%x\n", __func__, caps_1); + host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> + SDHCI_CLOCK_MUL_SHIFT; + } +diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c +index 830e29cdd..e8de5db64 100644 +--- a/drivers/mmc/sh_mmcif.c ++++ b/drivers/mmc/sh_mmcif.c +@@ -81,7 +81,7 @@ static int sh_mmcif_intr(void *dev_id) + + err: + host->sd_error = 1; +- debug("%s: int err state = %08x\n", DRIVER_NAME, state); ++printf("%s: int err state = %08x\n", DRIVER_NAME, state); + end: + host->wait_int = 1; + return 0; +@@ -149,13 +149,13 @@ static int sh_mmcif_error_manage(struct sh_mmcif_host *host) + + state1 = sh_mmcif_read(&host->regs->ce_host_sts1); + state2 = sh_mmcif_read(&host->regs->ce_host_sts2); +- debug("%s: ERR HOST_STS1 = %08x\n", \ ++printf("%s: ERR HOST_STS1 = %08x\n", \ + DRIVER_NAME, sh_mmcif_read(&host->regs->ce_host_sts1)); +- debug("%s: ERR HOST_STS2 = %08x\n", \ ++printf("%s: ERR HOST_STS2 = %08x\n", \ + DRIVER_NAME, sh_mmcif_read(&host->regs->ce_host_sts2)); + + if (state1 & STS1_CMDSEQ) { +- debug("%s: Forced end of command sequence\n", DRIVER_NAME); ++printf("%s: Forced end of command sequence\n", DRIVER_NAME); + sh_mmcif_bitset(CMD_CTRL_BREAK, &host->regs->ce_cmd_ctrl); + sh_mmcif_bitset(~CMD_CTRL_BREAK, &host->regs->ce_cmd_ctrl); + while (1) { +@@ -322,7 +322,7 @@ static void sh_mmcif_get_response(struct sh_mmcif_host *host, + cmd->response[1] = sh_mmcif_read(&host->regs->ce_resp2); + cmd->response[2] = sh_mmcif_read(&host->regs->ce_resp1); + cmd->response[3] = sh_mmcif_read(&host->regs->ce_resp0); +- debug(" RESP %08x, %08x, %08x, %08x\n", cmd->response[0], ++printf(" RESP %08x, %08x, %08x, %08x\n", cmd->response[0], + cmd->response[1], cmd->response[2], cmd->response[3]); + } else { + cmd->response[0] = sh_mmcif_read(&host->regs->ce_resp0); +@@ -475,7 +475,7 @@ static int sh_mmcif_start_cmd(struct sh_mmcif_host *host, + sh_mmcif_write(INT_START_MAGIC, &host->regs->ce_int); + sh_mmcif_write(mask, &host->regs->ce_int_mask); + +- debug("CMD%d ARG:%08x\n", cmd->cmdidx, cmd->cmdarg); ++printf("CMD%d ARG:%08x\n", cmd->cmdidx, cmd->cmdarg); + /* set arg */ + sh_mmcif_write(cmd->cmdarg, &host->regs->ce_arg); + host->wait_int = 0; +@@ -558,7 +558,7 @@ static int sh_mmcif_set_ios_common(struct sh_mmcif_host *host, struct mmc *mmc) + else + host->bus_width = MMC_BUS_WIDTH_1; + +- debug("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width); ++printf("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width); + + return 0; + } +@@ -691,13 +691,13 @@ static int sh_mmcif_dm_probe(struct udevice *dev) + + ret = clk_get_by_index(dev, 0, &sh_mmcif_clk); + if (ret) { +- debug("failed to get clock, ret=%d\n", ret); ++printf("failed to get clock, ret=%d\n", ret); + return ret; + } + + ret = clk_enable(&sh_mmcif_clk); + if (ret) { +- debug("failed to enable clock, ret=%d\n", ret); ++printf("failed to enable clock, ret=%d\n", ret); + return ret; + } + +diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c +index b2d0fac96..fac6379fb 100644 +--- a/drivers/mmc/sh_sdhi.c ++++ b/drivers/mmc/sh_sdhi.c +@@ -76,7 +76,7 @@ static int sh_sdhi_intr(void *dev_id) + state1 = sh_sdhi_readw(host, SDHI_INFO1); + state2 = sh_sdhi_readw(host, SDHI_INFO2); + +- debug("%s: state1 = %x, state2 = %x\n", __func__, state1, state2); ++printf("%s: state1 = %x, state2 = %x\n", __func__, state1, state2); + + /* CARD Insert */ + if (state1 & INFO1_CARD_IN) { +@@ -161,7 +161,7 @@ static int sh_sdhi_wait_interrupt_flag(struct sh_sdhi_host *host) + while (1) { + timeout--; + if (timeout < 0) { +- debug(DRIVER_NAME": %s timeout\n", __func__); ++printf(DRIVER_NAME": %s timeout\n", __func__); + return 0; + } + +@@ -251,7 +251,7 @@ static int sh_sdhi_error_manage(struct sh_sdhi_host *host) + ret = -ETIMEDOUT; + else + ret = -EILSEQ; +- debug("%s: ERR_STS2 = %04x\n", ++printf("%s: ERR_STS2 = %04x\n", + DRIVER_NAME, sh_sdhi_readw(host, SDHI_ERR_STS2)); + sh_sdhi_sync_reset(host); + +@@ -264,7 +264,7 @@ static int sh_sdhi_error_manage(struct sh_sdhi_host *host) + else + ret = -ETIMEDOUT; + +- debug("%s: ERR_STS1 = %04x\n", ++printf("%s: ERR_STS1 = %04x\n", + DRIVER_NAME, sh_sdhi_readw(host, SDHI_ERR_STS1)); + sh_sdhi_sync_reset(host); + sh_sdhi_writew(host, SDHI_INFO1_MASK, +@@ -280,7 +280,7 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data) + u64 *q = (u64 *)data->dest; + + if ((unsigned long)p & 0x00000001) { +- debug(DRIVER_NAME": %s: The data pointer is unaligned.", ++printf(DRIVER_NAME": %s: The data pointer is unaligned.", + __func__); + return -EIO; + } +@@ -321,12 +321,12 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data) + u64 *q = (u64 *)data->dest; + + if ((unsigned long)p & 0x00000001) { +- debug(DRIVER_NAME": %s: The data pointer is unaligned.", ++printf(DRIVER_NAME": %s: The data pointer is unaligned.", + __func__); + return -EIO; + } + +- debug("%s: blocks = %d, blocksize = %d\n", ++printf("%s: blocks = %d, blocksize = %d\n", + __func__, data->blocks, data->blocksize); + + host->wait_int = 0; +@@ -361,12 +361,12 @@ static int sh_sdhi_single_write(struct sh_sdhi_host *host, + const u64 *q = (const u64 *)data->src; + + if ((unsigned long)p & 0x00000001) { +- debug(DRIVER_NAME": %s: The data pointer is unaligned.", ++printf(DRIVER_NAME": %s: The data pointer is unaligned.", + __func__); + return -EIO; + } + +- debug("%s: blocks = %d, blocksize = %d\n", ++printf("%s: blocks = %d, blocksize = %d\n", + __func__, data->blocks, data->blocksize); + + host->wait_int = 0; +@@ -405,7 +405,7 @@ static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data) + const unsigned short *p = (const unsigned short *)data->src; + const u64 *q = (const u64 *)data->src; + +- debug("%s: blocks = %d, blocksize = %d\n", ++printf("%s: blocks = %d, blocksize = %d\n", + __func__, data->blocks, data->blocksize); + + host->wait_int = 0; +@@ -543,7 +543,7 @@ static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, + int ret = 0; + unsigned long timeout; + +- debug("opc = %d, arg = %x, resp_type = %x\n", ++printf("opc = %d, arg = %x, resp_type = %x\n", + opc, cmd->cmdarg, cmd->resp_type); + + if (opc == MMC_CMD_STOP_TRANSMISSION) { +@@ -615,8 +615,8 @@ static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, + ret = -ETIMEDOUT; + break; + default: +- debug(DRIVER_NAME": Cmd(d'%d) err\n", opc); +- debug(DRIVER_NAME": cmdidx = %d\n", cmd->cmdidx); ++printf(DRIVER_NAME": Cmd(d'%d) err\n", opc); ++printf(DRIVER_NAME": cmdidx = %d\n", cmd->cmdidx); + ret = sh_sdhi_error_manage(host); + break; + } +@@ -639,7 +639,7 @@ static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, + if (data) + ret = sh_sdhi_data_trans(host, data, opc); + +- debug("ret = %d, resp = %08x, %08x, %08x, %08x\n", ++printf("ret = %d, resp = %08x, %08x, %08x, %08x\n", + ret, cmd->response[0], cmd->response[1], + cmd->response[2], cmd->response[3]); + return ret; +@@ -674,7 +674,7 @@ static int sh_sdhi_set_ios_common(struct sh_sdhi_host *host, struct mmc *mmc) + OPT_BUS_WIDTH_1 | (~OPT_BUS_WIDTH_M & + sh_sdhi_readw(host, SDHI_OPTION))); + +- debug("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width); ++printf("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width); + + return 0; + } +@@ -844,13 +844,13 @@ static int sh_sdhi_dm_probe(struct udevice *dev) + + ret = clk_get_by_index(dev, 0, &sh_sdhi_clk); + if (ret) { +- debug("failed to get clock, ret=%d\n", ret); ++printf("failed to get clock, ret=%d\n", ret); + return ret; + } + + ret = clk_enable(&sh_sdhi_clk); + if (ret) { +- debug("failed to enable clock, ret=%d\n", ret); ++printf("failed to enable clock, ret=%d\n", ret); + return ret; + } + +diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c +index be3d8bfb3..538744181 100644 +--- a/drivers/mmc/socfpga_dw_mmc.c ++++ b/drivers/mmc/socfpga_dw_mmc.c +@@ -59,7 +59,7 @@ static int socfpga_dwmci_clksel(struct dwmci_host *host) + clrbits_le32(socfpga_get_clkmgr_addr() + CLKMGR_PERPLL_EN, + CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK); + +- debug("%s: drvsel %d smplsel %d\n", __func__, ++printf("%s: drvsel %d smplsel %d\n", __func__, + priv->drvsel, priv->smplsel); + + #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF) +@@ -74,7 +74,7 @@ static int socfpga_dwmci_clksel(struct dwmci_host *host) + #else + writel(sdmmc_mask, socfpga_get_sysmgr_addr() + SYSMGR_SDMMC); + +- debug("%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n", __func__, ++printf("%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n", __func__, + readl(socfpga_get_sysmgr_addr() + SYSMGR_SDMMC)); + #endif + +diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c +index 3503ccdb2..3b844049a 100644 +--- a/drivers/mmc/sunxi_mmc.c ++++ b/drivers/mmc/sunxi_mmc.c +@@ -59,7 +59,7 @@ static int mmc_resource_init(int sdc_no) + struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + int cd_pin, ret = 0; + +- debug("init mmc %d resource\n", sdc_no); ++printf("init mmc %d resource\n", sdc_no); + + switch (sdc_no) { + case 0: +@@ -194,7 +194,7 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz) + writel(CCM_MMC_CTRL_ENABLE| pll | CCM_MMC_CTRL_N(n) | + CCM_MMC_CTRL_M(div) | val, priv->mclkreg); + +- debug("mmc %u set mod-clk req %u parent %u n %u m %u rate %u\n", ++printf("mmc %u set mod-clk req %u parent %u n %u m %u rate %u\n", + priv->mmc_no, hz, pll_hz, 1u << n, div, pll_hz / (1u << n) / div); + + return 0; +@@ -262,7 +262,7 @@ static int mmc_config_clock(struct sunxi_mmc_priv *priv, struct mmc *mmc) + static int sunxi_mmc_set_ios_common(struct sunxi_mmc_priv *priv, + struct mmc *mmc) + { +- debug("set ios: bus_width: %x, clock: %d\n", ++printf("set ios: bus_width: %x, clock: %d\n", + mmc->bus_width, mmc->clock); + + /* Change clock first */ +@@ -340,7 +340,7 @@ static int mmc_rint_wait(struct sunxi_mmc_priv *priv, struct mmc *mmc, + status = readl(&priv->reg->rint); + if ((get_timer(start) > timeout_msecs) || + (status & SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT)) { +- debug("%s timeout %x\n", what, ++printf("%s timeout %x\n", what, + status & SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT); + return -ETIMEDOUT; + } +@@ -362,7 +362,7 @@ static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv, + if (priv->fatal_err) + return -1; + if (cmd->resp_type & MMC_RSP_BUSY) +- debug("mmc cmd %d check rsp busy\n", cmd->cmdidx); ++printf("mmc cmd %d check rsp busy\n", cmd->cmdidx); + if (cmd->cmdidx == 12) + return 0; + +@@ -390,7 +390,7 @@ static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv, + writel(data->blocks * data->blocksize, &priv->reg->bytecnt); + } + +- debug("mmc %d, cmd %d(0x%08x), arg 0x%08x\n", priv->mmc_no, ++printf("mmc %d, cmd %d(0x%08x), arg 0x%08x\n", priv->mmc_no, + cmd->cmdidx, cmdval | cmd->cmdidx, cmd->cmdarg); + writel(cmd->cmdarg, &priv->reg->arg); + +@@ -406,7 +406,7 @@ static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv, + int ret = 0; + + bytecnt = data->blocksize * data->blocks; +- debug("trans data %d bytes\n", bytecnt); ++printf("trans data %d bytes\n", bytecnt); + writel(cmdval | cmd->cmdidx, &priv->reg->cmd); + ret = mmc_trans_data_by_cpu(priv, mmc, data); + if (ret) { +@@ -424,7 +424,7 @@ static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv, + + if (data) { + timeout_msecs = 120; +- debug("cacl timeout %x msec\n", timeout_msecs); ++printf("cacl timeout %x msec\n", timeout_msecs); + error = mmc_rint_wait(priv, mmc, timeout_msecs, + data->blocks > 1 ? + SUNXI_MMC_RINT_AUTO_COMMAND_DONE : +@@ -441,7 +441,7 @@ static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv, + do { + status = readl(&priv->reg->status); + if (get_timer(start) > timeout_msecs) { +- debug("busy timeout\n"); ++printf("busy timeout\n"); + error = -ETIMEDOUT; + goto out; + } +@@ -453,12 +453,12 @@ static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv, + cmd->response[1] = readl(&priv->reg->resp2); + cmd->response[2] = readl(&priv->reg->resp1); + cmd->response[3] = readl(&priv->reg->resp0); +- debug("mmc resp 0x%08x 0x%08x 0x%08x 0x%08x\n", ++printf("mmc resp 0x%08x 0x%08x 0x%08x 0x%08x\n", + cmd->response[3], cmd->response[2], + cmd->response[1], cmd->response[0]); + } else { + cmd->response[0] = readl(&priv->reg->resp0); +- debug("mmc resp 0x%08x\n", cmd->response[0]); ++printf("mmc resp 0x%08x\n", cmd->response[0]); + } + out: + if (error < 0) { +@@ -535,7 +535,7 @@ struct mmc *sunxi_mmc_init(int sdc_no) + return NULL; + + /* config ahb clock */ +- debug("init mmc %d clock and io\n", sdc_no); ++printf("init mmc %d clock and io\n", sdc_no); + #if !defined(CONFIG_SUN50I_GEN_H6) + setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MMC(sdc_no)); + +diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c +index 760eca405..5941006c7 100644 +--- a/drivers/mmc/tegra_mmc.c ++++ b/drivers/mmc/tegra_mmc.c +@@ -43,7 +43,7 @@ static void tegra_mmc_set_power(struct tegra_mmc_priv *priv, + unsigned short power) + { + u8 pwr = 0; +- debug("%s: power = %x\n", __func__, power); ++printf("%s: power = %x\n", __func__, power); + + if (power != (unsigned short)-1) { + switch (1 << power) { +@@ -60,7 +60,7 @@ static void tegra_mmc_set_power(struct tegra_mmc_priv *priv, + break; + } + } +- debug("%s: pwr = %X\n", __func__, pwr); ++printf("%s: pwr = %X\n", __func__, pwr); + + /* Set the bus voltage first (if any) */ + writeb(pwr, &priv->reg->pwrcon); +@@ -79,7 +79,7 @@ static void tegra_mmc_prepare_data(struct tegra_mmc_priv *priv, + unsigned char ctrl; + + +- debug("buf: %p (%p), data->blocks: %u, data->blocksize: %u\n", ++printf("buf: %p (%p), data->blocks: %u, data->blocksize: %u\n", + bbstate->bounce_buffer, bbstate->user_buffer, data->blocks, + data->blocksize); + +@@ -105,7 +105,7 @@ static void tegra_mmc_set_transfer_mode(struct tegra_mmc_priv *priv, + struct mmc_data *data) + { + unsigned short mode; +- debug(" mmc_set_transfer_mode called\n"); ++printf(" mmc_set_transfer_mode called\n"); + /* + * TRNMOD + * MUL1SIN0[5] : Multi/Single Block Select +@@ -168,7 +168,7 @@ static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd, + int result; + unsigned int mask = 0; + unsigned int retry = 0x100000; +- debug(" mmc_send_cmd called\n"); ++printf(" mmc_send_cmd called\n"); + + result = tegra_mmc_wait_inhibit(priv, cmd, data, 10 /* ms */); + +@@ -178,7 +178,7 @@ static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd, + if (data) + tegra_mmc_prepare_data(priv, data, bbstate); + +- debug("cmd->arg: %08x\n", cmd->cmdarg); ++printf("cmd->arg: %08x\n", cmd->cmdarg); + writel(cmd->cmdarg, &priv->reg->argument); + + if (data) +@@ -215,7 +215,7 @@ static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd, + if (data) + flags |= TEGRA_MMC_TRNMOD_DATA_PRESENT_SELECT_DATA_TRANSFER; + +- debug("cmd: %d\n", cmd->cmdidx); ++printf("cmd: %d\n", cmd->cmdidx); + + writew((cmd->cmdidx << 8) | flags, &priv->reg->cmdreg); + +@@ -237,12 +237,12 @@ static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd, + + if (mask & TEGRA_MMC_NORINTSTS_CMD_TIMEOUT) { + /* Timeout Error */ +- debug("timeout: %08x cmd %d\n", mask, cmd->cmdidx); ++printf("timeout: %08x cmd %d\n", mask, cmd->cmdidx); + writel(mask, &priv->reg->norintsts); + return -ETIMEDOUT; + } else if (mask & TEGRA_MMC_NORINTSTS_ERR_INTERRUPT) { + /* Error Interrupt */ +- debug("error: %08x cmd %d\n", mask, cmd->cmdidx); ++printf("error: %08x cmd %d\n", mask, cmd->cmdidx); + writel(mask, &priv->reg->norintsts); + return -1; + } +@@ -259,7 +259,7 @@ static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd, + cmd->response[i] |= + readb(offset - 1); + } +- debug("cmd->resp[%d]: %08x\n", ++printf("cmd->resp[%d]: %08x\n", + i, cmd->response[i]); + } + } else if (cmd->resp_type & MMC_RSP_BUSY) { +@@ -277,10 +277,10 @@ static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd, + } + + cmd->response[0] = readl(&priv->reg->rspreg0); +- debug("cmd->resp[0]: %08x\n", cmd->response[0]); ++printf("cmd->resp[0]: %08x\n", cmd->response[0]); + } else { + cmd->response[0] = readl(&priv->reg->rspreg0); +- debug("cmd->resp[0]: %08x\n", cmd->response[0]); ++printf("cmd->resp[0]: %08x\n", cmd->response[0]); + } + } + +@@ -303,13 +303,13 @@ static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd, + */ + unsigned int address = readl(&priv->reg->sysad); + +- debug("DMA end\n"); ++printf("DMA end\n"); + writel(TEGRA_MMC_NORINTSTS_DMA_INTERRUPT, + &priv->reg->norintsts); + writel(address, &priv->reg->sysad); + } else if (mask & TEGRA_MMC_NORINTSTS_XFER_COMPLETE) { + /* Transfer Complete */ +- debug("r/w is done\n"); ++printf("r/w is done\n"); + break; + } else if (get_timer(start) > 8000UL) { + writel(mask, &priv->reg->norintsts); +@@ -369,7 +369,7 @@ static void tegra_mmc_change_clock(struct tegra_mmc_priv *priv, uint clock) + unsigned short clk; + unsigned long timeout; + +- debug(" mmc_change_clock called\n"); ++printf(" mmc_change_clock called\n"); + + /* + * Change Tegra SDMMCx clock divisor here. Source is PLLP_OUT0 +@@ -391,14 +391,14 @@ static void tegra_mmc_change_clock(struct tegra_mmc_priv *priv, uint clock) + CLOCK_ID_PERIPH, 24727273, NULL); + div = 62; + +- debug("%s: WAR: Using SDMMC1 clock of %u, div %d to achieve %dHz card clock ...\n", ++printf("%s: WAR: Using SDMMC1 clock of %u, div %d to achieve %dHz card clock ...\n", + __func__, effective_rate, div, clock); + } else { + clock_adjust_periph_pll_div(priv->mmc_id, CLOCK_ID_PERIPH, + clock, &div); + } + #endif +- debug("div = %d\n", div); ++printf("div = %d\n", div); + + writew(0, &priv->reg->clkcon); + +@@ -429,7 +429,7 @@ static void tegra_mmc_change_clock(struct tegra_mmc_priv *priv, uint clock) + clk |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; + writew(clk, &priv->reg->clkcon); + +- debug("mmc_change_clock: clkcon = %08X\n", clk); ++printf("mmc_change_clock: clkcon = %08X\n", clk); + + out: + priv->clock = clock; +@@ -440,9 +440,9 @@ static int tegra_mmc_set_ios(struct udevice *dev) + struct tegra_mmc_priv *priv = dev_get_priv(dev); + struct mmc *mmc = mmc_get_mmc_dev(dev); + unsigned char ctrl; +- debug(" mmc_set_ios called\n"); ++printf(" mmc_set_ios called\n"); + +- debug("bus_width: %x, clock: %d\n", mmc->bus_width, mmc->clock); ++printf("bus_width: %x, clock: %d\n", mmc->bus_width, mmc->clock); + + /* Change clock first */ + tegra_mmc_change_clock(priv, mmc->clock); +@@ -465,7 +465,7 @@ static int tegra_mmc_set_ios(struct udevice *dev) + ctrl &= ~(1 << 1 | 1 << 5); + + writeb(ctrl, &priv->reg->hostctl); +- debug("mmc_set_ios: hostctl = %08X\n", ctrl); ++printf("mmc_set_ios: hostctl = %08X\n", ctrl); + + return 0; + } +@@ -478,12 +478,12 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) + int timeout; + int id = priv->mmc_id; + +- debug("%s: sdmmc address = %p, id = %d\n", __func__, ++printf("%s: sdmmc address = %p, id = %d\n", __func__, + priv->reg, id); + + /* Set the pad drive strength for SDMMC1 or 3 only */ + if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) { +- debug("%s: settings are only valid for SDMMC1/SDMMC3!\n", ++printf("%s: settings are only valid for SDMMC1/SDMMC3!\n", + __func__); + return; + } +@@ -495,7 +495,7 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) + + /* Disable SD Clock Enable before running auto-cal as per TRM */ + clk_con = readw(&priv->reg->clkcon); +- debug("%s: CLOCK_CONTROL = 0x%04X\n", __func__, clk_con); ++printf("%s: CLOCK_CONTROL = 0x%04X\n", __func__, clk_con); + clk_con &= ~TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; + writew(clk_con, &priv->reg->clkcon); + +@@ -505,7 +505,7 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) + writel(val, &priv->reg->autocalcfg); + val |= AUTO_CAL_START | AUTO_CAL_ENABLE; + writel(val, &priv->reg->autocalcfg); +- debug("%s: AUTO_CAL_CFG = 0x%08X\n", __func__, val); ++printf("%s: AUTO_CAL_CFG = 0x%08X\n", __func__, val); + udelay(1); + timeout = 100; /* 10 mSec max (100*100uS) */ + do { +@@ -513,14 +513,14 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) + udelay(100); + } while ((val & AUTO_CAL_ACTIVE) && --timeout); + val = readl(&priv->reg->autocalsts); +- debug("%s: Final AUTO_CAL_STATUS = 0x%08X, timeout = %d\n", ++printf("%s: Final AUTO_CAL_STATUS = 0x%08X, timeout = %d\n", + __func__, val, timeout); + + /* Re-enable SD Clock Enable when auto-cal is done */ + clk_con |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; + writew(clk_con, &priv->reg->clkcon); + clk_con = readw(&priv->reg->clkcon); +- debug("%s: final CLOCK_CONTROL = 0x%04X\n", __func__, clk_con); ++printf("%s: final CLOCK_CONTROL = 0x%04X\n", __func__, clk_con); + + if (timeout == 0) { + printf("%s: Warning: Autocal timed out!\n", __func__); +@@ -549,7 +549,7 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) + val &= ~TAP_VAL_MASK; + val |= (tap_value << TAP_VAL_SHIFT); + writel(val, &priv->reg->venclkctl); +- debug("%s: VENDOR_CLOCK_CNTRL = 0x%08X\n", __func__, val); ++printf("%s: VENDOR_CLOCK_CNTRL = 0x%08X\n", __func__, val); + #endif /* T210 */ + #endif /* T30/T210 */ + } +@@ -557,7 +557,7 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) + static void tegra_mmc_reset(struct tegra_mmc_priv *priv, struct mmc *mmc) + { + unsigned int timeout; +- debug(" mmc_reset called\n"); ++printf(" mmc_reset called\n"); + + /* + * RSTALL[0] : Software reset for all +@@ -583,7 +583,7 @@ static void tegra_mmc_reset(struct tegra_mmc_priv *priv, struct mmc *mmc) + + /* Set SD bus voltage & enable bus power */ + tegra_mmc_set_power(priv, fls(mmc->cfg->voltages) - 1); +- debug("%s: power control = %02X, host control = %02X\n", __func__, ++printf("%s: power control = %02X, host control = %02X\n", __func__, + readb(&priv->reg->pwrcon), readb(&priv->reg->hostctl)); + + /* Make sure SDIO pads are set up */ +@@ -595,7 +595,7 @@ static int tegra_mmc_init(struct udevice *dev) + struct tegra_mmc_priv *priv = dev_get_priv(dev); + struct mmc *mmc = mmc_get_mmc_dev(dev); + unsigned int mask; +- debug(" tegra_mmc_init called\n"); ++printf(" tegra_mmc_init called\n"); + + #if defined(CONFIG_TEGRA210) + priv->mmc_id = clock_decode_periph_id(dev); +@@ -623,7 +623,7 @@ static int tegra_mmc_init(struct udevice *dev) + #endif + + priv->version = readw(&priv->reg->hcver); +- debug("host version = %x\n", priv->version); ++printf("host version = %x\n", priv->version); + + /* mask all */ + writel(0xffffffff, &priv->reg->norintstsen); +@@ -663,7 +663,7 @@ static int tegra_mmc_getcd(struct udevice *dev) + { + struct tegra_mmc_priv *priv = dev_get_priv(dev); + +- debug("tegra_mmc_getcd called\n"); ++printf("tegra_mmc_getcd called\n"); + + if (dm_gpio_is_valid(&priv->cd_gpio)) + return dm_gpio_get_value(&priv->cd_gpio); +@@ -712,12 +712,12 @@ static int tegra_mmc_probe(struct udevice *dev) + + ret = reset_get_by_name(dev, "sdhci", &priv->reset_ctl); + if (ret) { +- debug("reset_get_by_name() failed: %d\n", ret); ++printf("reset_get_by_name() failed: %d\n", ret); + return ret; + } + ret = clk_get_by_index(dev, 0, &priv->clk); + if (ret) { +- debug("clk_get_by_index() failed: %d\n", ret); ++printf("clk_get_by_index() failed: %d\n", ret); + return ret; + } + +diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c +index b79c4021b..e3a5aa668 100644 +--- a/drivers/mmc/zynq_sdhci.c ++++ b/drivers/mmc/zynq_sdhci.c +@@ -108,7 +108,7 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) + char tuning_loop_counter = SDHCI_TUNING_LOOP_COUNT; + u8 deviceid; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + host = priv->host; + deviceid = priv->deviceid; +@@ -574,7 +574,7 @@ static int arasan_sdhci_probe(struct udevice *dev) + return clock; + } + +- debug("%s: CLK %ld\n", __func__, clock); ++printf("%s: CLK %ld\n", __func__, clock); + + ret = clk_enable(&clk); + if (ret) { +diff --git a/drivers/mtd/altera_qspi.c b/drivers/mtd/altera_qspi.c +index 7bac599a5..310f66bf6 100644 +--- a/drivers/mtd/altera_qspi.c ++++ b/drivers/mtd/altera_qspi.c +@@ -168,12 +168,12 @@ static int altera_qspi_erase(struct mtd_info *mtd, struct erase_info *instr) + sect = addr / mtd->erasesize; + sect <<= 8; + sect |= QUADSPI_MEM_OP_SECTOR_ERASE; +- debug("erase %08x\n", sect); ++printf("erase %08x\n", sect); + writel(sect, ®s->mem_op); + stat = readl(®s->isr); + if (stat & QUADSPI_ISR_ILLEGAL_ERASE) { + /* erase failed, sector might be protected */ +- debug("erase %08x fail %x\n", sect, stat); ++printf("erase %08x fail %x\n", sect, stat); + writel(stat, ®s->isr); /* clear isr */ + instr->fail_addr = addr; + instr->state = MTD_ERASE_FAILED; +@@ -219,7 +219,7 @@ static int altera_qspi_write(struct mtd_info *mtd, loff_t to, size_t len, + stat = readl(®s->isr); + if (stat & QUADSPI_ISR_ILLEGAL_WRITE) { + /* write failed, sector might be protected */ +- debug("write fail %x\n", stat); ++printf("write fail %x\n", stat); + writel(stat, ®s->isr); /* clear isr */ + return -EIO; + } +@@ -283,7 +283,7 @@ static int altera_qspi_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) + + mem_op = (sr_tb << 12) | (sr_bp << 8); + mem_op |= QUADSPI_MEM_OP_SECTOR_PROTECT; +- debug("lock %08x\n", mem_op); ++printf("lock %08x\n", mem_op); + writel(mem_op, ®s->mem_op); + + return 0; +@@ -297,7 +297,7 @@ static int altera_qspi_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) + u32 mem_op; + + mem_op = QUADSPI_MEM_OP_SECTOR_PROTECT; +- debug("unlock %08x\n", mem_op); ++printf("unlock %08x\n", mem_op); + writel(mem_op, ®s->mem_op); + + return 0; +@@ -314,7 +314,7 @@ static int altera_qspi_probe(struct udevice *dev) + int i; + + rdid = readl(®s->rd_rdid); +- debug("rdid %x\n", rdid); ++printf("rdid %x\n", rdid); + + mtd = dev_get_uclass_priv(dev); + mtd->dev = dev; +diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c +index 9c27fea5d..7ef370606 100644 +--- a/drivers/mtd/cfi_flash.c ++++ b/drivers/mtd/cfi_flash.c +@@ -273,19 +273,19 @@ static void flash_printqry(struct cfi_qry *qry) + int x, y; + + for (x = 0; x < sizeof(struct cfi_qry); x += 16) { +- debug("%02x : ", x); ++printf("%02x : ", x); + for (y = 0; y < 16; y++) +- debug("%2.2x ", p[x + y]); +- debug(" "); ++printf("%2.2x ", p[x + y]); ++printf(" "); + for (y = 0; y < 16; y++) { + unsigned char c = p[x + y]; + + if (c >= 0x20 && c <= 0x7e) +- debug("%c", c); ++printf("%c", c); + else +- debug("."); ++printf("."); + } +- debug("\n"); ++printf("\n"); + } + } + #endif +@@ -337,10 +337,10 @@ static ulong flash_read_long (flash_info_t *info, flash_sect_t sect, + addr = flash_map(info, sect, offset); + + #ifdef DEBUG +- debug("long addr is at %p info->portwidth = %d\n", addr, ++printf("long addr is at %p info->portwidth = %d\n", addr, + info->portwidth); + for (x = 0; x < 4 * info->portwidth; x++) +- debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); ++printf("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); + #endif + #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) + retval = ((flash_read8(addr) << 16) | +@@ -371,18 +371,18 @@ static void flash_write_cmd(flash_info_t *info, flash_sect_t sect, + flash_make_cmd(info, cmd, &cword); + switch (info->portwidth) { + case FLASH_CFI_8BIT: +- debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, ++printf("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, + cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); + flash_write8(cword.w8, addr); + break; + case FLASH_CFI_16BIT: +- debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, ++printf("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, + cmd, cword.w16, + info->chipwidth << CFI_FLASH_SHIFT_WIDTH); + flash_write16(cword.w16, addr); + break; + case FLASH_CFI_32BIT: +- debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr, ++printf("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr, + cmd, cword.w32, + info->chipwidth << CFI_FLASH_SHIFT_WIDTH); + flash_write32(cword.w32, addr); +@@ -394,7 +394,7 @@ static void flash_write_cmd(flash_info_t *info, flash_sect_t sect, + + print_longlong(str, cword.w64); + +- debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n", ++printf("fwrite addr %p cmd %x %s 64 bit x %d bit\n", + addr, cmd, str, + info->chipwidth << CFI_FLASH_SHIFT_WIDTH); + } +@@ -427,18 +427,18 @@ static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset, + addr = flash_map(info, sect, offset); + flash_make_cmd(info, cmd, &cword); + +- debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr); ++printf("is= cmd %x(%c) addr %p ", cmd, cmd, addr); + switch (info->portwidth) { + case FLASH_CFI_8BIT: +- debug("is= %x %x\n", flash_read8(addr), cword.w8); ++printf("is= %x %x\n", flash_read8(addr), cword.w8); + retval = (flash_read8(addr) == cword.w8); + break; + case FLASH_CFI_16BIT: +- debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16); ++printf("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16); + retval = (flash_read16(addr) == cword.w16); + break; + case FLASH_CFI_32BIT: +- debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32); ++printf("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32); + retval = (flash_read32(addr) == cword.w32); + break; + case FLASH_CFI_64BIT: +@@ -449,7 +449,7 @@ static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset, + + print_longlong(str1, flash_read64(addr)); + print_longlong(str2, cword.w64); +- debug("is= %s %s\n", str1, str2); ++printf("is= %s %s\n", str1, str2); + } + #endif + retval = (flash_read64(addr) == cword.w64); +@@ -565,7 +565,7 @@ static int flash_is_busy(flash_info_t *info, flash_sect_t sect) + default: + retval = 0; + } +- debug("%s: %d\n", __func__, retval); ++printf("%s: %d\n", __func__, retval); + return retval; + } + +@@ -1048,7 +1048,7 @@ static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp, + break; + + default: +- debug("Unknown Command Set\n"); ++printf("Unknown Command Set\n"); + retcode = ERR_INVAL; + break; + } +@@ -1152,7 +1152,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) + break; + #endif + default: +- debug("Unknown flash vendor %d\n", ++printf("Unknown flash vendor %d\n", + info->vendor); + break; + } +@@ -1541,17 +1541,17 @@ int flash_real_protect(flash_info_t *info, long sector, int prot) + flash_write_cmd(info, sector, 0, + AMD_CMD_PPB_LOCK_BC2); + } +- debug("sector %ld %slocked\n", sector, ++printf("sector %ld %slocked\n", sector, + lock_flag ? "" : "already "); + } else { + if (!lock_flag) { +- debug("unlock %ld\n", sector); ++printf("unlock %ld\n", sector); + flash_write_cmd(info, 0, 0, + AMD_CMD_PPB_UNLOCK_BC1); + flash_write_cmd(info, 0, 0, + AMD_CMD_PPB_UNLOCK_BC2); + } +- debug("sector %ld %sunlocked\n", sector, ++printf("sector %ld %sunlocked\n", sector, + !lock_flag ? "" : "already "); + } + if (flag) +@@ -1719,12 +1719,12 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) + } + info->manufacturer_id = manu_id; + +- debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n", ++printf("info->ext_addr = 0x%x, cfi_version = 0x%x\n", + info->ext_addr, info->cfi_version); + if (info->ext_addr && info->cfi_version >= 0x3134) { + /* read software feature (at 0x53) */ + feature = flash_read_uchar(info, info->ext_addr + 0x13); +- debug("feature = 0x%x\n", feature); ++printf("feature = 0x%x\n", feature); + info->sr_supported = feature & 0x1; + } + +@@ -1836,7 +1836,7 @@ static int flash_detect_legacy(phys_addr_t base, int banknum) + info->addr_unlock2 = 0x2AAA; + } + flash_read_jedec_ids(info); +- debug("JEDEC PROBE: ID %x %x %x\n", ++printf("JEDEC PROBE: ID %x %x %x\n", + info->manufacturer_id, + info->device_id, + info->device_id2); +@@ -1924,22 +1924,22 @@ static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry) + */ + if ((info->interface == FLASH_CFI_X8X16) && + (info->portwidth == FLASH_CFI_8BIT)) { +- debug("Overriding 16-bit interface width to" ++printf("Overriding 16-bit interface width to" + " 8-bit port width\n"); + info->interface = FLASH_CFI_X8; + } else if ((info->interface == FLASH_CFI_X16X32) && + (info->portwidth == FLASH_CFI_16BIT)) { +- debug("Overriding 16-bit interface width to" ++printf("Overriding 16-bit interface width to" + " 16-bit port width\n"); + info->interface = FLASH_CFI_X16; + } + + info->cfi_offset = flash_offset_cfi[cfi_offset]; +- debug("device interface is %d\n", ++printf("device interface is %d\n", + info->interface); +- debug("found port %d chip %d chip_lsb %d ", ++printf("found port %d chip %d chip_lsb %d ", + info->portwidth, info->chipwidth, info->chip_lsb); +- debug("port %d bits chip %d bits\n", ++printf("port %d bits chip %d bits\n", + info->portwidth << CFI_FLASH_SHIFT_WIDTH, + info->chipwidth << CFI_FLASH_SHIFT_WIDTH); + +@@ -1971,7 +1971,7 @@ static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry) + + static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry) + { +- debug("flash detect cfi\n"); ++printf("flash detect cfi\n"); + + for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; + info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { +@@ -1995,7 +1995,7 @@ static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry) + return 1; + } + } +- debug("not found\n"); ++printf("not found\n"); + return 0; + } + +@@ -2092,8 +2092,8 @@ static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry) + info->device_id2 == 0x2301 || + info->device_id2 == 0x2801 || + info->device_id2 == 0x4801)) { +- debug("Adjusted buffer size on Numonyx flash"); +- debug(" M29EW family in 8 bit mode\n"); ++printf("Adjusted buffer size on Numonyx flash"); ++printf(" M29EW family in 8 bit mode\n"); + qry->max_buf_write_size = 0x8; + } + } +@@ -2184,11 +2184,11 @@ ulong flash_get_size(phys_addr_t base, int banknum) + break; + } + +- debug("manufacturer is %d\n", info->vendor); +- debug("manufacturer id is 0x%x\n", info->manufacturer_id); +- debug("device id is 0x%x\n", info->device_id); +- debug("device id2 is 0x%x\n", info->device_id2); +- debug("cfi version is 0x%04x\n", info->cfi_version); ++printf("manufacturer is %d\n", info->vendor); ++printf("manufacturer id is 0x%x\n", info->manufacturer_id); ++printf("device id is 0x%x\n", info->device_id); ++printf("device id2 is 0x%x\n", info->device_id2); ++printf("cfi version is 0x%04x\n", info->cfi_version); + + size_ratio = info->portwidth / info->chipwidth; + /* if the chip is x8/x16 reduce the ratio by half */ +@@ -2196,7 +2196,7 @@ ulong flash_get_size(phys_addr_t base, int banknum) + info->chipwidth == FLASH_CFI_BY8) { + size_ratio >>= 1; + } +- debug("size_ratio %d port %d bits chip %d bits\n", ++printf("size_ratio %d port %d bits chip %d bits\n", + size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, + info->chipwidth << CFI_FLASH_SHIFT_WIDTH); + info->size = 1 << qry.dev_size; +@@ -2204,10 +2204,10 @@ ulong flash_get_size(phys_addr_t base, int banknum) + info->size *= size_ratio; + max_size = cfi_flash_bank_size(banknum); + if (max_size && info->size > max_size) { +- debug("[truncated from %ldMiB]", info->size >> 20); ++printf("[truncated from %ldMiB]", info->size >> 20); + info->size = max_size; + } +- debug("found %d erase regions\n", num_erase_regions); ++printf("found %d erase regions\n", num_erase_regions); + sect_cnt = 0; + sector = base; + for (i = 0; i < num_erase_regions; i++) { +@@ -2219,14 +2219,14 @@ ulong flash_get_size(phys_addr_t base, int banknum) + + tmp = le32_to_cpu(get_unaligned( + &qry.erase_region_info[i])); +- debug("erase region %u: 0x%08lx\n", i, tmp); ++printf("erase region %u: 0x%08lx\n", i, tmp); + + erase_region_count = (tmp & 0xffff) + 1; + tmp >>= 16; + erase_region_size = + (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; +- debug("erase_region_count = %d ", erase_region_count); +- debug("erase_region_size = %d\n", erase_region_size); ++printf("erase_region_count = %d ", erase_region_count); ++printf("erase_region_size = %d\n", erase_region_size); + for (j = 0; j < erase_region_count; j++) { + if (sector - base >= info->size) + break; +@@ -2392,7 +2392,7 @@ static void flash_protect_default(void) + + #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) + for (i = 0; i < ARRAY_SIZE(apl); i++) { +- debug("autoprotecting from %08lx to %08lx\n", ++printf("autoprotecting from %08lx to %08lx\n", + apl[i].start, apl[i].start + apl[i].size - 1); + flash_protect(FLAG_PROTECT_SET, + apl[i].start, +diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c +index 859c7fd4e..a3c71a3d5 100644 +--- a/drivers/mtd/jedec_flash.c ++++ b/drivers/mtd/jedec_flash.c +@@ -413,7 +413,7 @@ static inline void fill_info(flash_info_t *info, const struct amd_flash_info *je + + size_ratio = info->portwidth / info->chipwidth; + +- debug("Found JEDEC Flash: %s\n", jedec_entry->name); ++printf("Found JEDEC Flash: %s\n", jedec_entry->name); + info->vendor = jedec_entry->CmdSet; + /* Todo: do we need device-specific timeouts? */ + info->erase_blk_tout = 30000; +@@ -441,10 +441,10 @@ static inline void fill_info(flash_info_t *info, const struct amd_flash_info *je + break; + } + +- debug("unlock address index %d\n", uaddr_idx); ++printf("unlock address index %d\n", uaddr_idx); + info->addr_unlock1 = unlock_addrs[uaddr_idx].addr1; + info->addr_unlock2 = unlock_addrs[uaddr_idx].addr2; +- debug("unlock addresses are 0x%lx/0x%lx\n", ++printf("unlock addresses are 0x%lx/0x%lx\n", + info->addr_unlock1, info->addr_unlock2); + + sect_cnt = 0; +@@ -454,7 +454,7 @@ static inline void fill_info(flash_info_t *info, const struct amd_flash_info *je + ulong erase_region_count = (jedec_entry->regions[i] & 0xff) + 1; + + total_size += erase_region_size * erase_region_count; +- debug("erase_region_count = %ld erase_region_size = %ld\n", ++printf("erase_region_count = %ld erase_region_size = %ld\n", + erase_region_count, erase_region_size); + for (j = 0; j < erase_region_count; j++) { + if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { +diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c +index c53ec657a..534fb96c5 100644 +--- a/drivers/mtd/mtd_uboot.c ++++ b/drivers/mtd/mtd_uboot.c +@@ -290,7 +290,7 @@ int mtd_probe_devices(void) + * to find a correspondance with an MTD device having + * the same type and number as defined in the mtdids. + */ +- debug("No device named %s\n", mtd_name); ++printf("No device named %s\n", mtd_name); + ret = mtd_search_alternate_name(mtd_name, linux_name, + MTD_NAME_MAX_LEN); + if (!ret) +diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c +index 684bc9499..0c17968c5 100644 +--- a/drivers/mtd/mtdconcat.c ++++ b/drivers/mtd/mtdconcat.c +@@ -700,10 +700,10 @@ struct mtd_info *mtd_concat_create(struct mtd_info *subdev[], /* subdevices to c + int num_erase_region; + int max_writebufsize = 0; + +- debug("Concatenating MTD devices:\n"); ++printf("Concatenating MTD devices:\n"); + for (i = 0; i < num_devs; i++) + printk(KERN_NOTICE "(%d): \"%s\"\n", i, subdev[i]->name); +- debug("into device \"%s\"\n", name); ++printf("into device \"%s\"\n", name); + + /* allocate the device structure */ + size = SIZEOF_STRUCT_MTD_CONCAT(num_devs); +diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c +index 0d1f94c6c..8813f937e 100644 +--- a/drivers/mtd/mtdcore.c ++++ b/drivers/mtd/mtdcore.c +@@ -530,7 +530,7 @@ int del_mtd_device(struct mtd_info *mtd) + + ret = del_mtd_partitions(mtd); + if (ret) { +- debug("Failed to delete MTD partitions attached to %s (err %d)\n", ++printf("Failed to delete MTD partitions attached to %s (err %d)\n", + mtd->name, ret); + return ret; + } +diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c +index d064ac304..1aac134e0 100644 +--- a/drivers/mtd/mtdpart.c ++++ b/drivers/mtd/mtdpart.c +@@ -541,7 +541,7 @@ static int do_del_mtd_partitions(struct mtd_info *master) + if (mtd_has_partitions(slave)) + del_mtd_partitions(slave); + +- debug("Deleting %s MTD partition\n", slave->name); ++printf("Deleting %s MTD partition\n", slave->name); + ret = del_mtd_device(slave); + if (ret < 0) { + printf("Error when deleting partition \"%s\" (%d)\n", +@@ -561,7 +561,7 @@ int del_mtd_partitions(struct mtd_info *master) + { + int ret; + +- debug("Deleting MTD partitions on \"%s\":\n", master->name); ++printf("Deleting MTD partitions on \"%s\":\n", master->name); + + mutex_lock(&mtd_partitions_mutex); + ret = do_del_mtd_partitions(master); +@@ -678,7 +678,7 @@ static struct mtd_info *allocate_partition(struct mtd_info *master, + if (mtd_mod_by_eb(cur_offset, master) != 0) { + /* Round up to next erasesize */ + slave->offset = (mtd_div_by_eb(cur_offset, master) + 1) * master->erasesize; +- debug("Moving partition %d: " ++printf("Moving partition %d: " + "0x%012llx -> 0x%012llx\n", partno, + (unsigned long long)cur_offset, (unsigned long long)slave->offset); + } +@@ -689,7 +689,7 @@ static struct mtd_info *allocate_partition(struct mtd_info *master, + slave->size = master->size - slave->offset + - slave->size; + } else { +- debug("mtd partition \"%s\" doesn't have enough space: %#llx < %#llx, disabled\n", ++printf("mtd partition \"%s\" doesn't have enough space: %#llx < %#llx, disabled\n", + part->name, master->size - slave->offset, + slave->size); + /* register to preserve ordering */ +@@ -699,7 +699,7 @@ static struct mtd_info *allocate_partition(struct mtd_info *master, + if (slave->size == MTDPART_SIZ_FULL) + slave->size = master->size - slave->offset; + +- debug("0x%012llx-0x%012llx : \"%s\"\n", (unsigned long long)slave->offset, ++printf("0x%012llx-0x%012llx : \"%s\"\n", (unsigned long long)slave->offset, + (unsigned long long)(slave->offset + slave->size), slave->name); + + /* let's do some sanity checks */ +@@ -873,7 +873,7 @@ int add_mtd_partitions(struct mtd_info *master, + uint64_t cur_offset = 0; + int i; + +- debug("Creating %d MTD partitions on \"%s\":\n", nbparts, master->name); ++printf("Creating %d MTD partitions on \"%s\":\n", nbparts, master->name); + + for (i = 0; i < nbparts; i++) { + slave = allocate_partition(master, parts + i, i, cur_offset); +diff --git a/drivers/mtd/nand/raw/cortina_nand.c b/drivers/mtd/nand/raw/cortina_nand.c +index 81fa8788a..348e7f828 100644 +--- a/drivers/mtd/nand/raw/cortina_nand.c ++++ b/drivers/mtd/nand/raw/cortina_nand.c +@@ -518,7 +518,7 @@ static int set_bus_width_page_size(struct mtd_info *mtd) + clrsetbits_le32(&info->reg->flash_nf_access, GENMASK(31, 0), + NFLASH_REG_WIDTH_16); + } else { +- debug("%s: Unsupported bus width %d\n", __func__, ++printf("%s: Unsupported bus width %d\n", __func__, + info->config.width); + return -1; + } +@@ -532,7 +532,7 @@ static int set_bus_width_page_size(struct mtd_info *mtd) + } else if (mtd->writesize == SZ_8K) { + setbits_le32(&info->reg->flash_type, FLASH_TYPE_8K); + } else { +- debug("%s: Unsupported page size %d\n", __func__, ++printf("%s: Unsupported page size %d\n", __func__, + mtd->writesize); + return -1; + } +diff --git a/drivers/mtd/nand/raw/denali_spl.c b/drivers/mtd/nand/raw/denali_spl.c +index f72142817..56de3bbc4 100644 +--- a/drivers/mtd/nand/raw/denali_spl.c ++++ b/drivers/mtd/nand/raw/denali_spl.c +@@ -47,7 +47,7 @@ static int wait_for_irq(uint32_t irq_mask) + intr_status = readl(denali_flash_reg + INTR_STATUS(flash_bank)); + + if (intr_status & INTR__ECC_UNCOR_ERR) { +- debug("Uncorrected ECC detected\n"); ++printf("Uncorrected ECC detected\n"); + return -EBADMSG; + } + +@@ -59,7 +59,7 @@ static int wait_for_irq(uint32_t irq_mask) + } while (timeout); + + if (!timeout) { +- debug("Timeout with interrupt status %08x\n", intr_status); ++printf("Timeout with interrupt status %08x\n", intr_status); + return -EIO; + } + +diff --git a/drivers/mtd/nand/raw/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c +index 6c86a7e76..15ee2b7e5 100644 +--- a/drivers/mtd/nand/raw/fsl_upm.c ++++ b/drivers/mtd/nand/raw/fsl_upm.c +@@ -52,7 +52,7 @@ static void fun_wait(struct fsl_upm_nand *fun) + { + if (fun->dev_ready) { + while (!fun->dev_ready(fun->chip_nr)) +- debug("unexpected busy state\n"); ++printf("unexpected busy state\n"); + } else { + /* + * If the R/B pin is not connected, +diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c +index 9cca3c55c..60963c919 100644 +--- a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c ++++ b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c +@@ -139,7 +139,7 @@ static void lpc32xx_nand_init(void) + static void lpc32xx_nand_cmd_ctrl(struct mtd_info *mtd, + int cmd, unsigned int ctrl) + { +- debug("ctrl: 0x%08x, cmd: 0x%08x\n", ctrl, cmd); ++printf("ctrl: 0x%08x, cmd: 0x%08x\n", ctrl, cmd); + + if (ctrl & NAND_NCE) + setbits_le32(&lpc32xx_nand_slc_regs->cfg, CFG_CE_LOW); +diff --git a/drivers/mtd/nand/raw/mxs_nand_dt.c b/drivers/mtd/nand/raw/mxs_nand_dt.c +index 878796d55..8ba0a97b1 100644 +--- a/drivers/mtd/nand/raw/mxs_nand_dt.c ++++ b/drivers/mtd/nand/raw/mxs_nand_dt.c +@@ -100,49 +100,49 @@ static int mxs_nand_dt_probe(struct udevice *dev) + + ret = clk_get_by_name(dev, "gpmi_io", &gpmi_clk); + if (ret < 0) { +- debug("Can't get gpmi io clk: %d\n", ret); ++printf("Can't get gpmi io clk: %d\n", ret); + return ret; + } + + ret = clk_enable(&gpmi_clk); + if (ret < 0) { +- debug("Can't enable gpmi io clk: %d\n", ret); ++printf("Can't enable gpmi io clk: %d\n", ret); + return ret; + } + + ret = clk_get_by_name(dev, "gpmi_apb", &gpmi_clk); + if (ret < 0) { +- debug("Can't get gpmi_apb clk: %d\n", ret); ++printf("Can't get gpmi_apb clk: %d\n", ret); + return ret; + } + + ret = clk_enable(&gpmi_clk); + if (ret < 0) { +- debug("Can't enable gpmi_apb clk: %d\n", ret); ++printf("Can't enable gpmi_apb clk: %d\n", ret); + return ret; + } + + ret = clk_get_by_name(dev, "gpmi_bch", &gpmi_clk); + if (ret < 0) { +- debug("Can't get gpmi_bch clk: %d\n", ret); ++printf("Can't get gpmi_bch clk: %d\n", ret); + return ret; + } + + ret = clk_enable(&gpmi_clk); + if (ret < 0) { +- debug("Can't enable gpmi_bch clk: %d\n", ret); ++printf("Can't enable gpmi_bch clk: %d\n", ret); + return ret; + } + + ret = clk_get_by_name(dev, "gpmi_apb_bch", &gpmi_clk); + if (ret < 0) { +- debug("Can't get gpmi_apb_bch clk: %d\n", ret); ++printf("Can't get gpmi_apb_bch clk: %d\n", ret); + return ret; + } + + ret = clk_enable(&gpmi_clk); + if (ret < 0) { +- debug("Can't enable gpmi_apb_bch clk: %d\n", ret); ++printf("Can't enable gpmi_apb_bch clk: %d\n", ret); + return ret; + } + +@@ -151,11 +151,11 @@ static int mxs_nand_dt_probe(struct udevice *dev) + */ + ret = clk_get_by_name(dev, "gpmi_apbh_dma", &gpmi_clk); + if (ret < 0) { +- debug("Can't get gpmi_apbh_dma clk: %d\n", ret); ++printf("Can't get gpmi_apbh_dma clk: %d\n", ret); + } else { + ret = clk_enable(&gpmi_clk); + if (ret < 0) { +- debug("Can't enable gpmi_apbh_dma clk: %d\n", ret); ++printf("Can't enable gpmi_apbh_dma clk: %d\n", ret); + } + } + } +diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c +index 17f46ae5e..f2dfc9bec 100644 +--- a/drivers/mtd/nand/raw/mxs_nand_spl.c ++++ b/drivers/mtd/nand/raw/mxs_nand_spl.c +@@ -109,7 +109,7 @@ static int mxs_flash_onfi_ident(struct mtd_info *mtd) + printf("second ID read did not match"); + return -1; + } +- debug("0x%02x:0x%02x ", mfg_id, dev_id); ++printf("0x%02x:0x%02x ", mfg_id, dev_id); + + /* read ONFI */ + chip->onfi_version = 0; +@@ -135,10 +135,10 @@ static int mxs_flash_onfi_ident(struct mtd_info *mtd) + chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; + chip->badblockbits = 8; + +- debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift); +- debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift); +- debug("oobsize=%d\n", mtd->oobsize); +- debug("chipsize=%lld\n", chip->chipsize); ++printf("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift); ++printf("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift); ++printf("oobsize=%d\n", mtd->oobsize); ++printf("chipsize=%lld\n", chip->chipsize); + + return 0; + } +@@ -176,7 +176,7 @@ static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt) + unsigned int block = offs >> chip->phys_erase_shift; + unsigned int page = offs >> chip->page_shift; + +- debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block, ++printf("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block, + page); + chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); + memset(chip->oob_poi, 0, mtd->oobsize); +@@ -238,7 +238,7 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf) + page_off = offs & (mtd->writesize - 1); + nand_page_per_block = mtd->erasesize / mtd->writesize; + +- debug("%s offset:0x%08x len:%d page:%x\n", __func__, offs, size, page); ++printf("%s offset:0x%08x len:%d page:%x\n", __func__, offs, size, page); + + while (size) { + if (mxs_read_page_ecc(mtd, page_buf, page) < 0) +diff --git a/drivers/mtd/nand/raw/nand_util.c b/drivers/mtd/nand/raw/nand_util.c +index 00c3c6c41..9e6a19bb2 100644 +--- a/drivers/mtd/nand/raw/nand_util.c ++++ b/drivers/mtd/nand/raw/nand_util.c +@@ -318,7 +318,7 @@ int nand_unlock(struct mtd_info *mtd, loff_t start, size_t length, + int page; + struct nand_chip *chip = mtd_to_nand(mtd); + +- debug("nand_unlock%s: start: %08llx, length: %zd!\n", ++printf("nand_unlock%s: start: %08llx, length: %zd!\n", + allexcept ? " (allexcept)" : "", start, length); + + /* select the NAND device */ +diff --git a/drivers/mtd/nand/raw/octeontx_bch.c b/drivers/mtd/nand/raw/octeontx_bch.c +index a41772880..75db2eb73 100644 +--- a/drivers/mtd/nand/raw/octeontx_bch.c ++++ b/drivers/mtd/nand/raw/octeontx_bch.c +@@ -106,11 +106,11 @@ static int bch_device_init(struct bch_device *bch) + u64 bist; + int rc; + +- debug("%s: Resetting...\n", __func__); ++printf("%s: Resetting...\n", __func__); + /* Reset the PF when probed first */ + bch_reset(bch); + +- debug("%s: Checking BIST...\n", __func__); ++printf("%s: Checking BIST...\n", __func__); + /* Check BIST status */ + bist = (u64)bch_check_bist_status(bch); + if (bist) { +@@ -121,7 +121,7 @@ static int bch_device_init(struct bch_device *bch) + /* Get max VQs/VFs supported by the device */ + + bch->max_vfs = pci_sriov_get_totalvfs(bch->dev); +- debug("%s: %d vfs\n", __func__, bch->max_vfs); ++printf("%s: %d vfs\n", __func__, bch->max_vfs); + if (num_vfs > bch->max_vfs) { + dev_warn(dev, "Num of VFs to enable %d is greater than max available. Enabling %d VFs.\n", + num_vfs, bch->max_vfs); +@@ -132,7 +132,7 @@ static int bch_device_init(struct bch_device *bch) + /* TODO: Get CLK frequency */ + /* Reset device parameters */ + +- debug("%s: Doing initialization\n", __func__); ++printf("%s: Doing initialization\n", __func__); + rc = do_bch_init(bch); + + return rc; +@@ -143,7 +143,7 @@ static int bch_sriov_configure(struct udevice *dev, int numvfs) + struct bch_device *bch = dev_get_priv(dev); + int ret = -EBUSY; + +- debug("%s(%s, %d), bch: %p, vfs_in_use: %d, enabled: %d\n", __func__, ++printf("%s(%s, %d), bch: %p, vfs_in_use: %d, enabled: %d\n", __func__, + dev->name, numvfs, bch, bch->vfs_in_use, bch->vfs_enabled); + if (bch->vfs_in_use) + goto exit; +@@ -151,7 +151,7 @@ static int bch_sriov_configure(struct udevice *dev, int numvfs) + ret = 0; + + if (numvfs > 0) { +- debug("%s: Enabling sriov\n", __func__); ++printf("%s: Enabling sriov\n", __func__); + ret = pci_enable_sriov(dev, numvfs); + if (ret == 0) { + bch->flags |= BCH_FLAG_SRIOV_ENABLED; +@@ -160,9 +160,9 @@ static int bch_sriov_configure(struct udevice *dev, int numvfs) + } + } + +- debug("VFs enabled: %d\n", ret); ++printf("VFs enabled: %d\n", ret); + exit: +- debug("%s: Returning %d\n", __func__, ret); ++printf("%s: Returning %d\n", __func__, ret); + return ret; + } + +@@ -171,7 +171,7 @@ static int octeontx_pci_bchpf_probe(struct udevice *dev) + struct bch_device *bch; + int ret; + +- debug("%s(%s)\n", __func__, dev->name); ++printf("%s(%s)\n", __func__, dev->name); + bch = dev_get_priv(dev); + if (!bch) + return -ENOMEM; +@@ -179,7 +179,7 @@ static int octeontx_pci_bchpf_probe(struct udevice *dev) + bch->reg_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM); + bch->dev = dev; + +- debug("%s: base address: %p\n", __func__, bch->reg_base); ++printf("%s: base address: %p\n", __func__, bch->reg_base); + ret = bch_device_init(bch); + if (ret) { + printf("%s(%s): init returned %d\n", __func__, dev->name, ret); +@@ -189,9 +189,9 @@ static int octeontx_pci_bchpf_probe(struct udevice *dev) + list_add(&bch->list, &octeontx_bch_devices); + token = (void *)dev; + +- debug("%s: Configuring SRIOV\n", __func__); ++printf("%s: Configuring SRIOV\n", __func__); + bch_sriov_configure(dev, num_vfs); +- debug("%s: Done.\n", __func__); ++printf("%s: Done.\n", __func__); + octeontx_bch_putp(bch); + + return 0; +@@ -353,7 +353,7 @@ static int octeontx_pci_bchvf_probe(struct udevice *dev) + union bch_vqx_cmd_buf cbuf; + int err; + +- debug("%s(%s)\n", __func__, dev->name); ++printf("%s(%s)\n", __func__, dev->name); + vf = dev_get_priv(dev); + if (!vf) + return -ENOMEM; +@@ -362,7 +362,7 @@ static int octeontx_pci_bchvf_probe(struct udevice *dev) + + /* Map PF's configuration registers */ + vf->reg_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM); +- debug("%s: reg base: %p\n", __func__, vf->reg_base); ++printf("%s: reg base: %p\n", __func__, vf->reg_base); + + err = octeontx_cmd_queue_initialize(dev, QID_BCH, QDEPTH - 1, 0, + sizeof(union bch_cmd) * QDEPTH); +@@ -386,7 +386,7 @@ static int octeontx_pci_bchvf_probe(struct udevice *dev) + + octeontx_bch_putv(vf); + +- debug("%s: bch vf initialization complete\n", __func__); ++printf("%s: bch vf initialization complete\n", __func__); + + if (octeontx_bch_getv()) + return octeontx_pci_nand_deferred_probe(); +diff --git a/drivers/mtd/nand/raw/octeontx_nand.c b/drivers/mtd/nand/raw/octeontx_nand.c +index e0ccc7b0d..753245b28 100644 +--- a/drivers/mtd/nand/raw/octeontx_nand.c ++++ b/drivers/mtd/nand/raw/octeontx_nand.c +@@ -1140,7 +1140,7 @@ static int octeontx_nand_set_features(struct mtd_info *mtd, + */ + static int ndf_page_read(struct octeontx_nfc *tn, u64 page, int col, int len) + { +- debug("%s(%p, 0x%llx, 0x%x, 0x%x) active: %p\n", __func__, ++printf("%s(%p, 0x%llx, 0x%x, 0x%x) active: %p\n", __func__, + tn, page, col, len, tn->controller.active); + struct nand_chip *nand = tn->controller.active; + struct octeontx_nand_chip *chip = to_otx_nand(nand); +@@ -1576,12 +1576,12 @@ static int octeontx_nand_bch_correct(struct mtd_info *mtd, u_char *dat, + } + + if (r->s.erased) { +- debug("Info: BCH block is erased\n"); ++printf("Info: BCH block is erased\n"); + return 0; + } + + if (r->s.uncorrectable) { +- debug("Cannot correct NAND block, response: 0x%x\n", ++printf("Cannot correct NAND block, response: 0x%x\n", + r->u16); + goto error; + } +@@ -1589,7 +1589,7 @@ static int octeontx_nand_bch_correct(struct mtd_info *mtd, u_char *dat, + return r->s.num_errors; + + error: +- debug("Error performing bch correction\n"); ++printf("Error performing bch correction\n"); + return -1; + } + +@@ -1625,13 +1625,13 @@ static int octeontx_nand_hw_bch_read_page(struct mtd_info *mtd, + for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { + int stat; + +- debug("Correcting block offset %lx, ecc offset %x\n", ++printf("Correcting block offset %lx, ecc offset %x\n", + p - buf, i); + stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); + + if (stat < 0) { + mtd->ecc_stats.failed++; +- debug("Cannot correct NAND page %d\n", page); ++printf("Cannot correct NAND page %d\n", page); + } else { + mtd->ecc_stats.corrected += stat; + max_bitflips = max_t(unsigned int, max_bitflips, stat); +@@ -1656,7 +1656,7 @@ static int octeontx_nand_hw_bch_write_page(struct mtd_info *mtd, + const u8 *p; + u8 *ecc_calc = chip->buffers->ecccalc; + +- debug("%s(buf?%p, oob%d p%x)\n", ++printf("%s(buf?%p, oob%d p%x)\n", + __func__, buf, oob_required, page); + for (i = 0; i < chip->ecc.total; i++) + ecc_calc[i] = 0xFF; +@@ -1673,10 +1673,10 @@ static int octeontx_nand_hw_bch_write_page(struct mtd_info *mtd, + ret = chip->ecc.calculate(mtd, p, &ecc_calc[i]); + + if (ret < 0) +- debug("calculate(mtd, p?%p, &ecc_calc[%d]?%p) returned %d\n", ++printf("calculate(mtd, p?%p, &ecc_calc[%d]?%p) returned %d\n", + p, i, &ecc_calc[i], ret); + +- debug("block offset %lx, ecc offset %x\n", p - buf, i); ++printf("block offset %lx, ecc offset %x\n", p - buf, i); + } + + ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, +@@ -1791,11 +1791,11 @@ static int octeontx_nand_calc_bch_ecc_strength(struct nand_chip *nand) + break; + } while (index > 0); + +- debug("%s: steps ds: %d, strength ds: %d\n", __func__, ++printf("%s: steps ds: %d, strength ds: %d\n", __func__, + nand->ecc_step_ds, nand->ecc_strength_ds); + ecc->strength = strengths[index]; + ecc->bytes = need; +- debug("%s: strength: %d, bytes: %d\n", __func__, ecc->strength, ++printf("%s: strength: %d, bytes: %d\n", __func__, ecc->strength, + ecc->bytes); + + if (!tn->eccmask) +@@ -1848,7 +1848,7 @@ static void octeontx_nfc_chip_sizing(struct nand_chip *nand) + + chip->row_bytes = nand->onfi_params.addr_cycles & 0xf; + chip->col_bytes = nand->onfi_params.addr_cycles >> 4; +- debug("%s(%p) row bytes: %d, col bytes: %d, ecc mode: %d\n", ++printf("%s(%p) row bytes: %d, col bytes: %d, ecc mode: %d\n", + __func__, nand, chip->row_bytes, chip->col_bytes, ecc->mode); + + /* +@@ -1859,9 +1859,9 @@ static void octeontx_nfc_chip_sizing(struct nand_chip *nand) + */ + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); + nand->options |= NAND_NO_SUBPAGE_WRITE; +- debug("%s: start steps: %d, size: %d, bytes: %d\n", ++printf("%s: start steps: %d, size: %d, bytes: %d\n", + __func__, ecc->steps, ecc->size, ecc->bytes); +- debug("%s: step ds: %d, strength ds: %d\n", __func__, ++printf("%s: step ds: %d, strength ds: %d\n", __func__, + nand->ecc_step_ds, nand->ecc_strength_ds); + + if (ecc->mode != NAND_ECC_NONE) { +@@ -1888,13 +1888,13 @@ static void octeontx_nfc_chip_sizing(struct nand_chip *nand) + mtd->subpage_sft = fls(ecc->steps) - 1; + + if (IS_ENABLED(CONFIG_NAND_OCTEONTX_HW_ECC)) { +- debug("%s: ecc mode: %d\n", __func__, ecc->mode); ++printf("%s: ecc mode: %d\n", __func__, ecc->mode); + if (ecc->mode != NAND_ECC_SOFT && + !octeontx_nand_calc_bch_ecc_strength(nand)) { + struct octeontx_nfc *tn = + to_otx_nfc(nand->controller); + +- debug("Using hardware BCH engine support\n"); ++printf("Using hardware BCH engine support\n"); + ecc->mode = NAND_ECC_HW_SYNDROME; + ecc->read_page = octeontx_nand_hw_bch_read_page; + ecc->write_page = +@@ -1910,11 +1910,11 @@ static void octeontx_nfc_chip_sizing(struct nand_chip *nand) + ecc->correct = octeontx_nand_bch_correct; + ecc->hwctl = octeontx_nand_bch_hwctl; + +- debug("NAND chip %d using hw_bch\n", ++printf("NAND chip %d using hw_bch\n", + tn->selected_chip); +- debug(" %d bytes ECC per %d byte block\n", ++printf(" %d bytes ECC per %d byte block\n", + ecc->bytes, ecc->size); +- debug(" for %d bits of correction per block.", ++printf(" for %d bits of correction per block.", + ecc->strength); + octeontx_nand_calc_ecc_layout(nand); + octeontx_bch_save_empty_eccmask(nand); +@@ -1935,7 +1935,7 @@ static int octeontx_nfc_chip_init(struct octeontx_nfc *tn, struct udevice *dev, + if (!chip) + return -ENOMEM; + +- debug("%s: Getting chip select\n", __func__); ++printf("%s: Getting chip select\n", __func__); + ret = ofnode_read_s32(node, "reg", &chip->cs); + if (ret) { + dev_err(dev, "could not retrieve reg property: %d\n", ret); +@@ -1946,13 +1946,13 @@ static int octeontx_nfc_chip_init(struct octeontx_nfc *tn, struct udevice *dev, + dev_err(dev, "invalid reg value: %u (max CS = 7)\n", chip->cs); + return -EINVAL; + } +- debug("%s: chip select: %d\n", __func__, chip->cs); ++printf("%s: chip select: %d\n", __func__, chip->cs); + nand = &chip->nand; + nand->controller = &tn->controller; + if (!tn->controller.active) + tn->controller.active = nand; + +- debug("%s: Setting flash node\n", __func__); ++printf("%s: Setting flash node\n", __func__); + nand_set_flash_node(nand, node); + + nand->options = 0; +@@ -1967,32 +1967,32 @@ static int octeontx_nfc_chip_init(struct octeontx_nfc *tn, struct udevice *dev, + nand->setup_data_interface = octeontx_nand_setup_dat_intf; + + mtd = nand_to_mtd(nand); +- debug("%s: mtd: %p\n", __func__, mtd); ++printf("%s: mtd: %p\n", __func__, mtd); + mtd->dev->parent = dev; + +- debug("%s: NDF_MISC: 0x%llx\n", __func__, ++printf("%s: NDF_MISC: 0x%llx\n", __func__, + readq(tn->base + NDF_MISC)); + + /* TODO: support more then 1 chip */ +- debug("%s: Scanning identification\n", __func__); ++printf("%s: Scanning identification\n", __func__); + ret = nand_scan_ident(mtd, 1, NULL); + if (ret) + return ret; + +- debug("%s: Sizing chip\n", __func__); ++printf("%s: Sizing chip\n", __func__); + octeontx_nfc_chip_sizing(nand); + +- debug("%s: Scanning tail\n", __func__); ++printf("%s: Scanning tail\n", __func__); + ret = nand_scan_tail(mtd); + if (ret) { + dev_err(dev, "nand_scan_tail failed: %d\n", ret); + return ret; + } + +- debug("%s: Registering mtd\n", __func__); ++printf("%s: Registering mtd\n", __func__); + ret = nand_register(0, mtd); + +- debug("%s: Adding tail\n", __func__); ++printf("%s: Adding tail\n", __func__); + list_add_tail(&chip->node, &tn->chips); + return 0; + } +@@ -2005,22 +2005,22 @@ static int octeontx_nfc_chips_init(struct octeontx_nfc *tn) + int nr_chips = of_get_child_count(node); + int ret; + +- debug("%s: node: %s\n", __func__, ofnode_get_name(node)); +- debug("%s: %d chips\n", __func__, nr_chips); ++printf("%s: node: %s\n", __func__, ofnode_get_name(node)); ++printf("%s: %d chips\n", __func__, nr_chips); + if (nr_chips > NAND_MAX_CHIPS) { + dev_err(dev, "too many NAND chips: %d\n", nr_chips); + return -EINVAL; + } + + if (!nr_chips) { +- debug("no DT NAND chips found\n"); ++printf("no DT NAND chips found\n"); + return -ENODEV; + } + + pr_info("%s: scanning %d chips DTs\n", __func__, nr_chips); + + ofnode_for_each_subnode(nand_node, node) { +- debug("%s: Calling octeontx_nfc_chip_init(%p, %s, %ld)\n", ++printf("%s: Calling octeontx_nfc_chip_init(%p, %s, %ld)\n", + __func__, tn, dev->name, nand_node.of_offset); + ret = octeontx_nfc_chip_init(tn, dev, nand_node); + if (ret) +@@ -2042,7 +2042,7 @@ static int octeontx_nfc_init(struct octeontx_nfc *tn) + ndf_misc &= ~NDF_MISC_EX_DIS; + ndf_misc |= (NDF_MISC_BT_DIS | NDF_MISC_RST_FF); + writeq(ndf_misc, tn->base + NDF_MISC); +- debug("%s: NDF_MISC: 0x%llx\n", __func__, readq(tn->base + NDF_MISC)); ++printf("%s: NDF_MISC: 0x%llx\n", __func__, readq(tn->base + NDF_MISC)); + + /* Bring the fifo out of reset */ + ndf_misc &= ~(NDF_MISC_RST_FF); +@@ -2069,7 +2069,7 @@ static int octeontx_pci_nand_probe(struct udevice *dev) + int ret; + static bool probe_done; + +- debug("%s(%s) tn: %p\n", __func__, dev->name, tn); ++printf("%s(%s) tn: %p\n", __func__, dev->name, tn); + if (probe_done) + return 0; + +@@ -2078,7 +2078,7 @@ static int octeontx_pci_nand_probe(struct udevice *dev) + if (!bch_vf) { + struct octeontx_probe_device *probe_dev; + +- debug("%s: bch not yet initialized\n", __func__); ++printf("%s: bch not yet initialized\n", __func__); + probe_dev = calloc(sizeof(*probe_dev), 1); + if (!probe_dev) { + printf("%s: Out of memory\n", __func__); +@@ -2088,7 +2088,7 @@ static int octeontx_pci_nand_probe(struct udevice *dev) + INIT_LIST_HEAD(&probe_dev->list); + list_add_tail(&probe_dev->list, + &octeontx_pci_nand_deferred_devices); +- debug("%s: Defering probe until after BCH initialization\n", ++printf("%s: Defering probe until after BCH initialization\n", + __func__); + return 0; + } +@@ -2102,13 +2102,13 @@ static int octeontx_pci_nand_probe(struct udevice *dev) + ret = -EINVAL; + goto release; + } +- debug("%s: bar at %p\n", __func__, tn->base); ++printf("%s: bar at %p\n", __func__, tn->base); + tn->buf.dmabuflen = NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE; + tn->buf.dmabuf = dma_alloc_coherent(tn->buf.dmabuflen, + (unsigned long *)&tn->buf.dmaaddr); + if (!tn->buf.dmabuf) { + ret = -ENOMEM; +- debug("%s: Could not allocate DMA buffer\n", __func__); ++printf("%s: Could not allocate DMA buffer\n", __func__); + goto unclk; + } + +@@ -2118,17 +2118,17 @@ static int octeontx_pci_nand_probe(struct udevice *dev) + + tn->stat = dma_alloc_coherent(8, (unsigned long *)&tn->stat_addr); + if (!tn->stat || !tn->bch_resp) { +- debug("%s: Could not allocate bch status or response\n", ++printf("%s: Could not allocate bch status or response\n", + __func__); + ret = -ENOMEM; + goto unclk; + } + +- debug("%s: Calling octeontx_nfc_init()\n", __func__); ++printf("%s: Calling octeontx_nfc_init()\n", __func__); + octeontx_nfc_init(tn); +- debug("%s: Initializing chips\n", __func__); ++printf("%s: Initializing chips\n", __func__); + ret = octeontx_nfc_chips_init(tn); +- debug("%s: init chips ret: %d\n", __func__, ret); ++printf("%s: init chips ret: %d\n", __func__, ret); + if (ret) { + if (ret != -ENODEV) + dev_err(dev, "failed to init nand chips\n"); +@@ -2148,7 +2148,7 @@ int octeontx_pci_nand_disable(struct udevice *dev) + u64 dma_cfg; + u64 ndf_misc; + +- debug("%s: Disabling NAND device %s\n", __func__, dev->name); ++printf("%s: Disabling NAND device %s\n", __func__, dev->name); + dma_cfg = readq(tn->base + NDF_DMA_CFG); + dma_cfg &= ~NDF_DMA_CFG_EN; + dma_cfg |= NDF_DMA_CFG_CLR; +@@ -2166,7 +2166,7 @@ int octeontx_pci_nand_disable(struct udevice *dev) + /* Clear any interrupts and enable bits */ + writeq(~0ull, tn->base + NDF_INT_ENA_W1C); + writeq(~0ull, tn->base + NDF_INT); +- debug("%s: NDF_ST_REG: 0x%llx\n", __func__, ++printf("%s: NDF_ST_REG: 0x%llx\n", __func__, + readq(tn->base + NDF_ST_REG)); + return 0; + } +@@ -2185,9 +2185,9 @@ int octeontx_pci_nand_deferred_probe(void) + int rc = 0; + struct octeontx_probe_device *pdev; + +- debug("%s: Performing deferred probing\n", __func__); ++printf("%s: Performing deferred probing\n", __func__); + list_for_each_entry(pdev, &octeontx_pci_nand_deferred_devices, list) { +- debug("%s: Probing %s\n", __func__, pdev->dev->name); ++printf("%s: Probing %s\n", __func__, pdev->dev->name); + dev_get_flags(pdev->dev) &= ~DM_FLAG_ACTIVATED; + rc = device_probe(pdev->dev); + if (rc && rc != -ENODEV) { +diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c +index 97fd5690f..035bd0f21 100644 +--- a/drivers/mtd/nand/raw/omap_gpmc.c ++++ b/drivers/mtd/nand/raw/omap_gpmc.c +@@ -559,10 +559,10 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat, + bit_pos = error_loc[count] % 8; + if (byte_pos < SECTOR_BYTES) { + dat[byte_pos] ^= 1 << bit_pos; +- debug("nand: bit-flip corrected @data=%d\n", byte_pos); ++printf("nand: bit-flip corrected @data=%d\n", byte_pos); + } else if (byte_pos < error_max) { + read_ecc[byte_pos - SECTOR_BYTES] ^= 1 << bit_pos; +- debug("nand: bit-flip corrected @oob=%d\n", byte_pos - ++printf("nand: bit-flip corrected @oob=%d\n", byte_pos - + SECTOR_BYTES); + } else { + err = -EBADMSG; +@@ -664,7 +664,7 @@ static int omap_correct_data_bch_sw(struct mtd_info *mtd, u_char *data, + /* correct data only, not ecc bytes */ + if (errloc[i] < SECTOR_BYTES << 3) + data[errloc[i] >> 3] ^= 1 << (errloc[i] & 7); +- debug("corrected bitflip %u\n", errloc[i]); ++printf("corrected bitflip %u\n", errloc[i]); + #ifdef DEBUG + puts("read_ecc: "); + /* +@@ -718,7 +718,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, + + switch (ecc_scheme) { + case OMAP_ECC_HAM1_CODE_SW: +- debug("nand: selected OMAP_ECC_HAM1_CODE_SW\n"); ++printf("nand: selected OMAP_ECC_HAM1_CODE_SW\n"); + /* For this ecc-scheme, ecc.bytes, ecc.layout, ... are + * initialized in nand_scan_tail(), so just set ecc.mode */ + info->control = NULL; +@@ -728,7 +728,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, + break; + + case OMAP_ECC_HAM1_CODE_HW: +- debug("nand: selected OMAP_ECC_HAM1_CODE_HW\n"); ++printf("nand: selected OMAP_ECC_HAM1_CODE_HW\n"); + /* check ecc-scheme requirements before updating ecc info */ + if ((3 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) { + printf("nand: error: insufficient OOB: require=%d\n", ( +@@ -760,7 +760,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, + + case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW: + #ifdef CONFIG_BCH +- debug("nand: selected OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n"); ++printf("nand: selected OMAP_ECC_BCH8_CODE_HW_DETECTION_SW\n"); + /* check ecc-scheme requirements before updating ecc info */ + if ((13 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) { + printf("nand: error: insufficient OOB: require=%d\n", ( +@@ -804,7 +804,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, + + case OMAP_ECC_BCH8_CODE_HW: + #ifdef CONFIG_NAND_OMAP_ELM +- debug("nand: selected OMAP_ECC_BCH8_CODE_HW\n"); ++printf("nand: selected OMAP_ECC_BCH8_CODE_HW\n"); + /* check ecc-scheme requirements before updating ecc info */ + if ((14 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) { + printf("nand: error: insufficient OOB: require=%d\n", ( +@@ -839,7 +839,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, + + case OMAP_ECC_BCH16_CODE_HW: + #ifdef CONFIG_NAND_OMAP_ELM +- debug("nand: using OMAP_ECC_BCH16_CODE_HW\n"); ++printf("nand: using OMAP_ECC_BCH16_CODE_HW\n"); + /* check ecc-scheme requirements before updating ecc info */ + if ((26 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) { + printf("nand: error: insufficient OOB: require=%d\n", ( +@@ -870,7 +870,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, + return -EINVAL; + #endif + default: +- debug("nand: error: ecc scheme not enabled or supported\n"); ++printf("nand: error: ecc scheme not enabled or supported\n"); + return -EINVAL; + } + +diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c +index 6310253ef..681af7d28 100644 +--- a/drivers/mtd/nand/raw/tegra_nand.c ++++ b/drivers/mtd/nand/raw/tegra_nand.c +@@ -475,7 +475,7 @@ static int set_bus_width_page_size(struct mtd_info *our_mtd, + else if (config->width == 16) + *reg_val = CFG_BUS_WIDTH_16BIT; + else { +- debug("%s: Unsupported bus width %d\n", __func__, ++printf("%s: Unsupported bus width %d\n", __func__, + config->width); + return -1; + } +@@ -487,7 +487,7 @@ static int set_bus_width_page_size(struct mtd_info *our_mtd, + else if (our_mtd->writesize == 4096) + *reg_val |= CFG_PAGE_SIZE_4096; + else { +- debug("%s: Unsupported page size %d\n", __func__, ++printf("%s: Unsupported page size %d\n", __func__, + our_mtd->writesize); + return -1; + } +diff --git a/drivers/mtd/nand/raw/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c +index d79252837..c794fdf9e 100644 +--- a/drivers/mtd/nand/raw/zynq_nand.c ++++ b/drivers/mtd/nand/raw/zynq_nand.c +@@ -357,7 +357,7 @@ static int zynq_nand_calculate_hwecc(struct mtd_info *mtd, const u8 *data, + ecc_code++; + } + } else { +- debug("%s: ecc status failed\n", __func__); ++printf("%s: ecc status failed\n", __func__); + } + } + +@@ -1093,7 +1093,7 @@ static int zynq_nand_probe(struct udevice *dev) + } + + if (!ofnode_is_available(of_nand)) { +- debug("Nand node in dt disabled\n"); ++printf("Nand node in dt disabled\n"); + return dm_scan_fdt_dev(dev); + } + +@@ -1174,7 +1174,7 @@ static int zynq_nand_probe(struct udevice *dev) + nand_chip->read_buf(mtd, get_feature, 4); + + if (get_feature[0] & ONDIE_ECC_FEATURE_ENABLE) { +- debug("%s: OnDie ECC flash\n", __func__); ++printf("%s: OnDie ECC flash\n", __func__); + ondie_ecc_enabled = 1; + } else { + printf("%s: Unable to detect OnDie ECC\n", __func__); +diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c +index 3c01e3b41..a94f11dbb 100644 +--- a/drivers/mtd/spi/sandbox.c ++++ b/drivers/mtd/spi/sandbox.c +@@ -131,7 +131,7 @@ static int sandbox_sf_probe(struct udevice *dev) + int ret = 0; + int cs = -1; + +- debug("%s: bus %d, looking for emul=%p: ", __func__, dev_seq(bus), dev); ++printf("%s: bus %d, looking for emul=%p: ", __func__, dev_seq(bus), dev); + ret = sandbox_spi_get_emul(state, bus, dev, &emul); + if (ret) { + printf("Error: Unknown chip select for device '%s'\n", +@@ -140,7 +140,7 @@ static int sandbox_sf_probe(struct udevice *dev) + } + slave_plat = dev_get_parent_plat(dev); + cs = slave_plat->cs; +- debug("found at cs %d\n", cs); ++printf("found at cs %d\n", cs); + + if (!pdata->filename) { + printf("Error: No filename available\n"); +@@ -152,7 +152,7 @@ static int sandbox_sf_probe(struct udevice *dev) + else + spec = pdata->device_name; + idname_len = strlen(spec); +- debug("%s: device='%s'\n", __func__, spec); ++printf("%s: device='%s'\n", __func__, spec); + + for (data = spi_nor_ids; data->name; data++) { + len = strlen(data->name); +@@ -185,7 +185,7 @@ static int sandbox_sf_probe(struct udevice *dev) + return 0; + + error: +- debug("%s: Got error %d\n", __func__, ret); ++printf("%s: Got error %d\n", __func__, ret); + return ret; + } + +@@ -253,7 +253,7 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, + sbsf->state = SF_ADDR; + break; + case SPINOR_OP_WRDI: +- debug(" write disabled\n"); ++printf(" write disabled\n"); + sbsf->status &= ~STAT_WEL; + break; + case SPINOR_OP_RDSR: +@@ -263,7 +263,7 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, + sbsf->state = SF_READ_STATUS1; + break; + case SPINOR_OP_WREN: +- debug(" write enabled\n"); ++printf(" write enabled\n"); + sbsf->status |= STAT_WEL; + break; + case SPINOR_OP_WRSR: +@@ -281,7 +281,7 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, + } else if (sbsf->cmd == SPINOR_OP_SE && !(flags & SECT_4K)) { + sbsf->erase_size = 64 << 10; + } else { +- debug(" cmd unknown: %#x\n", sbsf->cmd); ++printf(" cmd unknown: %#x\n", sbsf->cmd); + return -EIO; + } + sbsf->state = SF_ADDR; +@@ -505,7 +505,7 @@ int sandbox_sf_of_to_plat(struct udevice *dev) + pdata->filename = dev_read_string(dev, "sandbox,filename"); + pdata->device_name = dev_read_string(dev, "compatible"); + if (!pdata->filename || !pdata->device_name) { +- debug("%s: Missing properties, filename=%s, device_name=%s\n", ++printf("%s: Missing properties, filename=%s, device_name=%s\n", + __func__, pdata->filename, pdata->device_name); + return -EINVAL; + } +@@ -572,15 +572,15 @@ int sandbox_spi_get_emul(struct sandbox_state *state, + info = &state->spi[busnum][cs]; + if (!info->emul) { + /* Use the same device tree node as the SPI flash device */ +- debug("%s: busnum=%u, cs=%u: binding SPI flash emulation: ", ++printf("%s: busnum=%u, cs=%u: binding SPI flash emulation: ", + __func__, busnum, cs); + ret = sandbox_sf_bind_emul(state, busnum, cs, bus, + dev_ofnode(slave), slave->name); + if (ret) { +- debug("failed (err=%d)\n", ret); ++printf("failed (err=%d)\n", ret); + return ret; + } +- debug("OK\n"); ++printf("OK\n"); + } + *emulp = info->emul; + +diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c +index b59edd152..6ad63c8ee 100644 +--- a/drivers/mtd/spi/sf_dataflash.c ++++ b/drivers/mtd/spi/sf_dataflash.c +@@ -136,7 +136,7 @@ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) + memset(dataflash->command, 0 , sizeof(dataflash->command)); + command = dataflash->command; + +- debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); ++printf("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); + + div_u64_rem(len, spi_flash->page_size, &rem); + if (rem) { +@@ -153,7 +153,7 @@ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) + + status = spi_claim_bus(spi); + if (status) { +- debug("dataflash: unable to claim SPI bus\n"); ++printf("dataflash: unable to claim SPI bus\n"); + return status; + } + +@@ -173,20 +173,20 @@ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) + command[2] = (uint8_t)(pageaddr >> 8); + command[3] = 0; + +- debug("%s ERASE %s: (%x) %x %x %x [%d]\n", ++printf("%s ERASE %s: (%x) %x %x %x [%d]\n", + dev->name, do_block ? "block" : "page", + command[0], command[1], command[2], command[3], + pageaddr); + + status = spi_write_then_read(spi, command, 4, NULL, NULL, 0); + if (status < 0) { +- debug("%s: erase send command error!\n", dev->name); ++printf("%s: erase send command error!\n", dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + if (status < 0) { +- debug("%s: erase waitready error!\n", dev->name); ++printf("%s: erase waitready error!\n", dev->name); + return status; + } + +@@ -227,8 +227,8 @@ static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len, + memset(dataflash->command, 0 , sizeof(dataflash->command)); + command = dataflash->command; + +- debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); +- debug("READ: (%x) %x %x %x\n", ++printf("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); ++printf("READ: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + /* Calculate flash page/byte address */ +@@ -238,7 +238,7 @@ static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len, + + status = spi_claim_bus(spi); + if (status) { +- debug("dataflash: unable to claim SPI bus\n"); ++printf("dataflash: unable to claim SPI bus\n"); + return status; + } + +@@ -285,7 +285,7 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, + memset(dataflash->command, 0 , sizeof(dataflash->command)); + command = dataflash->command; + +- debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len)); ++printf("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len)); + + pageaddr = ((unsigned)offset / spi_flash->page_size); + to = ((unsigned)offset % spi_flash->page_size); +@@ -296,12 +296,12 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, + + status = spi_claim_bus(spi); + if (status) { +- debug("dataflash: unable to claim SPI bus\n"); ++printf("dataflash: unable to claim SPI bus\n"); + return status; + } + + while (remaining > 0) { +- debug("write @ %d:%d len=%d\n", pageaddr, to, writelen); ++printf("write @ %d:%d len=%d\n", pageaddr, to, writelen); + + /* + * REVISIT: +@@ -329,20 +329,20 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, + command[2] = (addr & 0x0000FF00) >> 8; + command[3] = 0; + +- debug("TRANSFER: (%x) %x %x %x\n", ++printf("TRANSFER: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + status = spi_write_then_read(spi, command, 4, + NULL, NULL, 0); + if (status < 0) { +- debug("%s: write(name); + return -EIO; + } + + status = dataflash_waitready(spi); + if (status < 0) { +- debug("%s: write(name); + return status; + } +@@ -355,19 +355,19 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, + command[2] = (addr & 0x0000FF00) >> 8; + command[3] = (addr & 0x000000FF); + +- debug("PROGRAM: (%x) %x %x %x\n", ++printf("PROGRAM: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + status = spi_write_then_read(spi, command, 4, + writebuf, NULL, writelen); + if (status < 0) { +- debug("%s: write send command error!\n", dev->name); ++printf("%s: write send command error!\n", dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + if (status < 0) { +- debug("%s: write waitready error!\n", dev->name); ++printf("%s: write waitready error!\n", dev->name); + return status; + } + +@@ -379,13 +379,13 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, + command[2] = (addr & 0x0000FF00) >> 8; + command[3] = 0; + +- debug("COMPARE: (%x) %x %x %x\n", ++printf("COMPARE: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + status = spi_write_then_read(spi, command, 4, + writebuf, NULL, writelen); + if (status < 0) { +- debug("%s: write(compare) send command error!\n", ++printf("%s: write(compare) send command error!\n", + dev->name); + return -EIO; + } +@@ -547,7 +547,7 @@ static struct data_flash_info *jedec_probe(struct spi_slave *spi) + if (info->flags & SUP_POW2PS) { + status = dataflash_status(spi); + if (status < 0) { +- debug("dataflash: status error %d\n", ++printf("dataflash: status error %d\n", + status); + return NULL; + } +diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c +index 3befbe91c..616a09d56 100644 +--- a/drivers/mtd/spi/sf_probe.c ++++ b/drivers/mtd/spi/sf_probe.c +@@ -37,7 +37,7 @@ static int spi_flash_probe_slave(struct spi_flash *flash) + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { +- debug("SF: Failed to claim SPI bus: %d\n", ret); ++printf("SF: Failed to claim SPI bus: %d\n", ret); + return ret; + } + +@@ -67,7 +67,7 @@ struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, + /* Allocate space if needed (not used by sf-uclass */ + flash = calloc(1, sizeof(*flash)); + if (!flash) { +- debug("SF: Failed to allocate spi_flash\n"); ++printf("SF: Failed to allocate spi_flash\n"); + return NULL; + } + +@@ -119,7 +119,7 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) + struct erase_info instr; + + if (offset % mtd->erasesize || len % mtd->erasesize) { +- debug("SF: Erase offset/length not multiple of erase size\n"); ++printf("SF: Erase offset/length not multiple of erase size\n"); + return -EINVAL; + } + +diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c +index a6625535a..fb9f9837d 100644 +--- a/drivers/mtd/spi/spi-nor-core.c ++++ b/drivers/mtd/spi/spi-nor-core.c +@@ -486,7 +486,7 @@ static int write_bar(struct spi_nor *nor, u32 offset) + write_enable(nor); + ret = nor->write_reg(nor, cmd, &bank_sel, 1); + if (ret < 0) { +- debug("SF: fail to write bank register\n"); ++printf("SF: fail to write bank register\n"); + return ret; + } + +@@ -513,7 +513,7 @@ static int read_bar(struct spi_nor *nor, const struct flash_info *info) + ret = nor->read_reg(nor, nor->bank_read_cmd, + &curr_bank, 1); + if (ret) { +- debug("SF: fail to read bank addr register\n"); ++printf("SF: fail to read bank addr register\n"); + return ret; + } + nor->bank_curr = curr_bank; +@@ -2475,7 +2475,7 @@ static int spi_nor_init(struct spi_nor *nor) + * designer) that this is bad. + */ + if (nor->flags & SNOR_F_BROKEN_RESET) +- debug("enabling reset hack; may not recover from unexpected reboots\n"); ++printf("enabling reset hack; may not recover from unexpected reboots\n"); + set_4byte(nor, nor->info, 1); + } + +diff --git a/drivers/mux/mux-uclass.c b/drivers/mux/mux-uclass.c +index 6d28dbe4d..1ce2124ab 100644 +--- a/drivers/mux/mux-uclass.c ++++ b/drivers/mux/mux-uclass.c +@@ -128,7 +128,7 @@ static int mux_of_xlate_default(struct mux_chip *mux_chip, + log_debug("%s(muxp=%p)\n", __func__, muxp); + + if (args->args_count > 1) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -172,14 +172,14 @@ static int mux_get_by_indexed_prop(struct udevice *dev, const char *prop_name, + ret = dev_read_phandle_with_args(dev, prop_name, "#mux-control-cells", + 0, index, &args); + if (ret) { +- debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n", ++printf("%s: fdtdec_parse_phandle_with_args failed: err=%d\n", + __func__, ret); + return ret; + } + + ret = uclass_get_device_by_ofnode(UCLASS_MUX, args.node, &dev_mux); + if (ret) { +- debug("%s: uclass_get_device_by_ofnode failed: err=%d\n", ++printf("%s: uclass_get_device_by_ofnode failed: err=%d\n", + __func__, ret); + return ret; + } +@@ -192,7 +192,7 @@ static int mux_get_by_indexed_prop(struct udevice *dev, const char *prop_name, + else + ret = mux_of_xlate_default(mux_chip, &args, mux); + if (ret) { +- debug("of_xlate() failed: %d\n", ret); ++printf("of_xlate() failed: %d\n", ret); + return ret; + } + (*mux)->dev = dev_mux; +@@ -210,11 +210,11 @@ int mux_control_get(struct udevice *dev, const char *name, + { + int index; + +- debug("%s(dev=%p, name=%s, mux=%p)\n", __func__, dev, name, mux); ++printf("%s(dev=%p, name=%s, mux=%p)\n", __func__, dev, name, mux); + + index = dev_read_stringlist_search(dev, "mux-control-names", name); + if (index < 0) { +- debug("fdt_stringlist_search() failed: %d\n", index); ++printf("fdt_stringlist_search() failed: %d\n", index); + return index; + } + +diff --git a/drivers/net/ag7xxx.c b/drivers/net/ag7xxx.c +index 632ab3c1e..5c8f5d40c 100644 +--- a/drivers/net/ag7xxx.c ++++ b/drivers/net/ag7xxx.c +@@ -1175,20 +1175,20 @@ static int ag7xxx_get_phy_iface_offset(struct udevice *dev) + + offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), "phy"); + if (offset <= 0) { +- debug("%s: PHY OF node not found (ret=%i)\n", __func__, offset); ++printf("%s: PHY OF node not found (ret=%i)\n", __func__, offset); + return -EINVAL; + } + + offset = fdt_parent_offset(gd->fdt_blob, offset); + if (offset <= 0) { +- debug("%s: PHY OF node parent MDIO bus not found (ret=%i)\n", ++printf("%s: PHY OF node parent MDIO bus not found (ret=%i)\n", + __func__, offset); + return -EINVAL; + } + + offset = fdt_parent_offset(gd->fdt_blob, offset); + if (offset <= 0) { +- debug("%s: PHY MDIO OF node parent MAC not found (ret=%i)\n", ++printf("%s: PHY MDIO OF node parent MAC not found (ret=%i)\n", + __func__, offset); + return -EINVAL; + } +@@ -1212,7 +1212,7 @@ static int ag7xxx_eth_probe(struct udevice *dev) + iobase = map_physmem(pdata->iobase, 0x200, MAP_NOCACHE); + phyiobase = map_physmem(phyreg, 0x200, MAP_NOCACHE); + +- debug("%s, iobase=%p, phyiobase=%p, priv=%p\n", ++printf("%s, iobase=%p, phyiobase=%p, priv=%p\n", + __func__, iobase, phyiobase, priv); + priv->regs = iobase; + priv->phyregs = phyiobase; +@@ -1226,7 +1226,7 @@ static int ag7xxx_eth_probe(struct udevice *dev) + priv->bus = miiphy_get_dev_by_name(dev->name); + + ret = ag7xxx_mac_probe(dev); +- debug("%s, ret=%d\n", __func__, ret); ++printf("%s, ret=%d\n", __func__, ret); + + return ret; + } +@@ -1269,7 +1269,7 @@ static int ag7xxx_eth_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c +index eb4cd9676..6cf7048d7 100644 +--- a/drivers/net/altera_tse.c ++++ b/drivers/net/altera_tse.c +@@ -87,7 +87,7 @@ static int alt_sgdma_wait_transfer(struct alt_sgdma_registers *regs) + break; + if (get_timer(ctime) > ALT_TSE_SGDMA_BUSY_TIMEOUT) { + status = -ETIMEDOUT; +- debug("sgdma timeout\n"); ++printf("sgdma timeout\n"); + break; + } + } +@@ -127,7 +127,7 @@ static void tse_adjust_link(struct altera_tse_priv *priv, + u32 refvar; + + if (!phydev->link) { +- debug("%s: No link.\n", phydev->dev->name); ++printf("%s: No link.\n", phydev->dev->name); + return; + } + +@@ -174,7 +174,7 @@ static int altera_tse_send_sgdma(struct udevice *dev, void *packet, int length) + /* send the packet */ + alt_sgdma_start_transfer(priv->sgdma_tx, tx_desc); + alt_sgdma_wait_transfer(priv->sgdma_tx); +- debug("sent %d bytes\n", tx_desc->actual_bytes_transferred); ++printf("sent %d bytes\n", tx_desc->actual_bytes_transferred); + + return tx_desc->actual_bytes_transferred; + } +@@ -190,7 +190,7 @@ static int altera_tse_recv_sgdma(struct udevice *dev, int flags, + ALT_SGDMA_DESCRIPTOR_STATUS_TERMINATED_BY_EOP_MSK) { + alt_sgdma_wait_transfer(priv->sgdma_rx); + packet_length = rx_desc->actual_bytes_transferred; +- debug("recv %d bytes\n", packet_length); ++printf("recv %d bytes\n", packet_length); + *packetp = priv->rx_buf; + + return packet_length; +@@ -218,7 +218,7 @@ static int altera_tse_free_pkt_sgdma(struct udevice *dev, uchar *packet, + + /* setup the sgdma */ + alt_sgdma_start_transfer(priv->sgdma_rx, rx_desc); +- debug("recv setup\n"); ++printf("recv setup\n"); + + return 0; + } +@@ -237,7 +237,7 @@ static void altera_tse_stop_mac(struct altera_tse_priv *priv) + if (!(status & ALTERA_TSE_CMD_SW_RESET_MSK)) + break; + if (get_timer(ctime) > ALT_TSE_SW_RESET_TIMEOUT) { +- debug("Reset mac timeout\n"); ++printf("Reset mac timeout\n"); + break; + } + } +@@ -280,7 +280,7 @@ static void msgdma_reset(struct msgdma_csr *csr) + if (!(status & MSGDMA_CSR_STAT_RESETTING)) + break; + if (get_timer(ctime) > ALT_TSE_SW_RESET_TIMEOUT) { +- debug("Reset msgdma timeout\n"); ++printf("Reset msgdma timeout\n"); + break; + } + } +@@ -300,7 +300,7 @@ static u32 msgdma_wait(struct msgdma_csr *csr) + if (!(status & MSGDMA_CSR_STAT_BUSY)) + break; + if (get_timer(ctime) > ALT_TSE_SGDMA_BUSY_TIMEOUT) { +- debug("sgdma timeout\n"); ++printf("sgdma timeout\n"); + break; + } + } +@@ -327,7 +327,7 @@ static int altera_tse_send_msgdma(struct udevice *dev, void *packet, + writel(MSGDMA_DESC_TX_STRIDE, &desc->stride); + writel(MSGDMA_DESC_CTL_TX_SINGLE, &desc->control); + status = msgdma_wait(priv->sgdma_tx); +- debug("sent %d bytes, status %08x\n", length, status); ++printf("sent %d bytes, status %08x\n", length, status); + + return 0; + } +@@ -344,7 +344,7 @@ static int altera_tse_recv_msgdma(struct udevice *dev, int flags, + if (level & 0xffff) { + length = readl(&resp->bytes_transferred); + status = readl(&resp->status); +- debug("recv %d bytes, status %08x\n", length, status); ++printf("recv %d bytes, status %08x\n", length, status); + *packetp = priv->rx_buf; + + return length; +@@ -368,7 +368,7 @@ static int altera_tse_free_pkt_msgdma(struct udevice *dev, uchar *packet, + writel(0, &desc->burst_seq_num); + writel(MSGDMA_DESC_RX_STRIDE, &desc->stride); + writel(MSGDMA_DESC_CTL_RX_SINGLE, &desc->control); +- debug("recv setup\n"); ++printf("recv setup\n"); + + return 0; + } +@@ -461,7 +461,7 @@ static int altera_tse_write_hwaddr(struct udevice *dev) + mac_lo = (hwaddr[3] << 24) | (hwaddr[2] << 16) | + (hwaddr[1] << 8) | hwaddr[0]; + mac_hi = (hwaddr[5] << 8) | hwaddr[4]; +- debug("Set MAC address to 0x%04x%08x\n", mac_hi, mac_lo); ++printf("Set MAC address to 0x%04x%08x\n", mac_hi, mac_lo); + + writel(mac_lo, &mac_dev->mac_addr_0); + writel(mac_hi, &mac_dev->mac_addr_1); +@@ -521,10 +521,10 @@ static int altera_tse_start(struct udevice *dev) + int ret; + + /* need to create sgdma */ +- debug("Configuring rx desc\n"); ++printf("Configuring rx desc\n"); + altera_tse_free_pkt(dev, priv->rx_buf, PKTSIZE_ALIGN); + /* start TSE */ +- debug("Configuring TSE Mac\n"); ++printf("Configuring TSE Mac\n"); + /* Initialize MAC registers */ + writel(PKTSIZE_ALIGN, &mac_dev->max_frame_length); + writel(priv->rx_fifo_depth - 16, &mac_dev->rx_sel_empty_threshold); +@@ -547,7 +547,7 @@ static int altera_tse_start(struct udevice *dev) + /* Start up the PHY */ + ret = phy_startup(priv->phydev); + if (ret) { +- debug("Could not initialize PHY %s\n", ++printf("Could not initialize PHY %s\n", + priv->phydev->dev->name); + return ret; + } +@@ -660,7 +660,7 @@ static int altera_tse_probe(struct udevice *dev) + return -ENOMEM; + + /* stop controller */ +- debug("Reset TSE & SGDMAs\n"); ++printf("Reset TSE & SGDMAs\n"); + altera_tse_stop(dev); + + /* start the phy */ +@@ -684,7 +684,7 @@ static int altera_tse_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/armada100_fec.c b/drivers/net/armada100_fec.c +index 018891e17..f0d1d195c 100644 +--- a/drivers/net/armada100_fec.c ++++ b/drivers/net/armada100_fec.c +@@ -497,7 +497,7 @@ static int armdfec_init(struct eth_device *dev, struct bd_info *bd) + printf("ARMD100 FEC: PHY not detected at address range 0-31\n"); + return -1; + } else { +- debug("ARMD100 FEC: PHY detected at addr %d\n", phy_adr); ++printf("ARMD100 FEC: PHY detected at addr %d\n", phy_adr); + miiphy_write(dev->name, PHY_ADR_REQ, PHY_ADR_REQ, phy_adr); + } + #endif +@@ -611,13 +611,13 @@ static int armdfec_recv(struct eth_device *dev) + if (timeout < PHY_WAIT_ITERATIONS * PHY_WAIT_MICRO_SECONDS) { + timeout++; + } else { +- debug("ARMD100 FEC: %s time out...\n", __func__); ++printf("ARMD100 FEC: %s time out...\n", __func__); + return -1; + } + } while (readl(&p_rxdesc_curr->cmd_sts) & BUF_OWNED_BY_DMA); + + if (p_rxdesc_curr->byte_cnt != 0) { +- debug("ARMD100 FEC: %s: Received %d byte Packet @ 0x%x" ++printf("ARMD100 FEC: %s: Received %d byte Packet @ 0x%x" + "(cmd_sts= %08x)\n", __func__, + (u32)p_rxdesc_curr->byte_cnt, + (u32)p_rxdesc_curr->buf_ptr, +@@ -640,7 +640,7 @@ static int armdfec_recv(struct eth_device *dev) + __func__); + } else { + /* !!! call higher layer processing */ +- debug("ARMD100 FEC: (%s) Sending Received packet to" ++printf("ARMD100 FEC: (%s) Sending Received packet to" + " upper layer (net_process_received_packet)\n", __func__); + + /* +diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c +index 402bcdb63..11c6d483c 100644 +--- a/drivers/net/ax88180.c ++++ b/drivers/net/ax88180.c +@@ -273,7 +273,7 @@ static int ax88180_phy_initial (struct eth_device *dev) + + switch (priv->PhyID0) { + case MARVELL_ALASKA_PHYSID0: +- debug("ax88180: Found Marvell Alaska PHY family." ++printf("ax88180: Found Marvell Alaska PHY family." + " (PHY Addr=0x%x)\n", priv->PhyAddr); + + switch (priv->PhyID1) { +@@ -301,7 +301,7 @@ static int ax88180_phy_initial (struct eth_device *dev) + return 1; + + case CICADA_CIS8201_PHYSID0: +- debug("ax88180: Found CICADA CIS8201 PHY" ++printf("ax88180: Found CICADA CIS8201 PHY" + " chipset. (PHY Addr=0x%x)\n", priv->PhyAddr); + + ax88180_mdio_write(dev, CIS_IMR, +diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-gmac.c +index 3caf0f331..b78341206 100644 +--- a/drivers/net/bcm-sf2-eth-gmac.c ++++ b/drivers/net/bcm-sf2-eth-gmac.c +@@ -55,7 +55,7 @@ uint32_t g_dmactrlflags; + + static uint32_t dma_ctrlflags(uint32_t mask, uint32_t flags) + { +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + g_dmactrlflags &= ~mask; + g_dmactrlflags |= flags; +@@ -167,7 +167,7 @@ static int dma_tx_init(struct eth_dma *dma) + int i; + uint32_t ctrl; + +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + /* clear descriptor memory */ + memset((void *)(dma->tx_desc_aligned), 0, +@@ -220,7 +220,7 @@ static int dma_rx_init(struct eth_dma *dma) + uint32_t ctrl; + int i; + +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + /* clear descriptor memory */ + memset((void *)(dma->rx_desc_aligned), 0, +@@ -267,7 +267,7 @@ static int dma_rx_init(struct eth_dma *dma) + + static int dma_init(struct eth_dma *dma) + { +- debug(" %s enter\n", __func__); ++printf(" %s enter\n", __func__); + + /* + * Default flags: For backwards compatibility both +@@ -275,10 +275,10 @@ static int dma_init(struct eth_dma *dma) + */ + dma_ctrlflags(DMA_CTRL_ROC | DMA_CTRL_PEN, 0); + +- debug("rx burst len 0x%x\n", ++printf("rx burst len 0x%x\n", + (readl(GMAC0_DMA_RX_CTRL_ADDR) & D64_RC_BL_MASK) + >> D64_RC_BL_SHIFT); +- debug("tx burst len 0x%x\n", ++printf("tx burst len 0x%x\n", + (readl(GMAC0_DMA_TX_CTRL_ADDR) & D64_XC_BL_MASK) + >> D64_XC_BL_SHIFT); + +@@ -295,7 +295,7 @@ static int dma_init(struct eth_dma *dma) + + static int dma_deinit(struct eth_dma *dma) + { +- debug(" %s enter\n", __func__); ++printf(" %s enter\n", __func__); + + gmac_disable_dma(dma, MAC_DMA_RX); + gmac_disable_dma(dma, MAC_DMA_TX); +@@ -327,7 +327,7 @@ int gmac_tx_packet(struct eth_dma *dma, void *packet, int length) + sizeof(dma64dd_t)) & D64_XP_LD_MASK; + size_t buflen; + +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + /* load the buffer */ + memcpy(bufp, packet, len); +@@ -379,18 +379,18 @@ bool gmac_check_tx_done(struct eth_dma *dma) + uint32_t intstatus; + bool xfrdone = false; + +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + intstatus = readl(GMAC0_INT_STATUS_ADDR); + +- debug("int(0x%x)\n", intstatus); ++printf("int(0x%x)\n", intstatus); + if (intstatus & (I_XI0 | I_XI1 | I_XI2 | I_XI3)) { + xfrdone = true; + /* clear the int bits */ + intstatus &= ~(I_XI0 | I_XI1 | I_XI2 | I_XI3); + writel(intstatus, GMAC0_INT_STATUS_ADDR); + } else { +- debug("Tx int(0x%x)\n", intstatus); ++printf("Tx int(0x%x)\n", intstatus); + } + + return xfrdone; +@@ -428,8 +428,8 @@ int gmac_check_rx_done(struct eth_dma *dma, uint8_t *buf) + if (index == curr) + return -1; + +- debug("received packet\n"); +- debug("expect(0x%x) curr(0x%x) active(0x%x)\n", index, curr, active); ++printf("received packet\n"); ++printf("expect(0x%x) curr(0x%x) active(0x%x)\n", index, curr, active); + /* remove warning */ + if (index == active) + ; +@@ -450,7 +450,7 @@ int gmac_check_rx_done(struct eth_dma *dma, uint8_t *buf) + stat0 = readl(GMAC0_DMA_RX_STATUS0_ADDR); + stat1 = readl(GMAC0_DMA_RX_STATUS1_ADDR); + +- debug("bufp(0x%x) index(0x%x) buflen(0x%x) stat0(0x%x) stat1(0x%x)\n", ++printf("bufp(0x%x) index(0x%x) buflen(0x%x) stat0(0x%x) stat1(0x%x)\n", + (uint32_t)bufp, index, buflen, stat0, stat1); + + dma->cur_rx_index = (index + 1) & (RX_BUF_NUM - 1); +@@ -460,7 +460,7 @@ int gmac_check_rx_done(struct eth_dma *dma, uint8_t *buf) + offset = (control & D64_RC_RO_MASK) >> D64_RC_RO_SHIFT; + rcvlen = *(uint16_t *)bufp; + +- debug("Received %d bytes\n", rcvlen); ++printf("Received %d bytes\n", rcvlen); + /* copy status into temp buf then copy data from rx buffer */ + memcpy(statbuf, bufp, offset); + datap = (void *)((uint32_t)bufp + offset); +@@ -485,7 +485,7 @@ static int gmac_disable_dma(struct eth_dma *dma, int dir) + { + int status; + +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + if (dir == MAC_DMA_TX) { + /* address PR8249/PR7577 issue */ +@@ -530,7 +530,7 @@ static int gmac_enable_dma(struct eth_dma *dma, int dir) + { + uint32_t control; + +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + if (dir == MAC_DMA_TX) { + dma->cur_tx_index = 0; +@@ -622,7 +622,7 @@ int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg) + tmp = GMAC_MII_DATA_READ_CMD; + tmp |= (phyaddr << GMAC_MII_PHY_ADDR_SHIFT) | + (reg << GMAC_MII_PHY_REG_SHIFT); +- debug("MII read cmd 0x%x, phy 0x%x, reg 0x%x\n", tmp, phyaddr, reg); ++printf("MII read cmd 0x%x, phy 0x%x, reg 0x%x\n", tmp, phyaddr, reg); + writel(tmp, GMAC_MII_DATA_ADDR); + + if (gmac_mii_busywait(1000)) { +@@ -631,7 +631,7 @@ int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg) + } + + value = readl(GMAC_MII_DATA_ADDR) & 0xffff; +- debug("MII read data 0x%x\n", value); ++printf("MII read data 0x%x\n", value); + return value; + } + +@@ -650,7 +650,7 @@ int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg, + tmp = GMAC_MII_DATA_WRITE_CMD | (value & 0xffff); + tmp |= ((phyaddr << GMAC_MII_PHY_ADDR_SHIFT) | + (reg << GMAC_MII_PHY_REG_SHIFT)); +- debug("MII write cmd 0x%x, phy 0x%x, reg 0x%x, data 0x%x\n", ++printf("MII write cmd 0x%x, phy 0x%x, reg 0x%x, data 0x%x\n", + tmp, phyaddr, reg, value); + writel(tmp, GMAC_MII_DATA_ADDR); + +@@ -664,7 +664,7 @@ int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg, + + void gmac_init_reset(void) + { +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + /* set command config reg CC_SR */ + reg32_set_bits(UNIMAC0_CMD_CFG_ADDR, CC_SR); +@@ -673,7 +673,7 @@ void gmac_init_reset(void) + + void gmac_clear_reset(void) + { +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + /* clear command config reg CC_SR */ + reg32_clear_bits(UNIMAC0_CMD_CFG_ADDR, CC_SR); +@@ -684,7 +684,7 @@ static void gmac_enable_local(bool en) + { + uint32_t cmdcfg; + +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + /* read command config reg */ + cmdcfg = readl(UNIMAC0_CMD_CFG_ADDR); +@@ -755,7 +755,7 @@ int gmac_set_speed(int speed, int duplex) + cmdcfg |= ((speed_cfg << CC_ES_SHIFT) | hd_ena); + + printf("Change GMAC speed to %dMB\n", speed); +- debug("GMAC speed cfg 0x%x\n", cmdcfg); ++printf("GMAC speed cfg 0x%x\n", cmdcfg); + writel(cmdcfg, UNIMAC0_CMD_CFG_ADDR); + + return 0; +@@ -764,7 +764,7 @@ int gmac_set_speed(int speed, int duplex) + int gmac_set_mac_addr(unsigned char *mac) + { + /* set our local address */ +- debug("GMAC: %02x:%02x:%02x:%02x:%02x:%02x\n", ++printf("GMAC: %02x:%02x:%02x:%02x:%02x:%02x\n", + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + writel(htonl(*(uint32_t *)mac), UNIMAC0_MAC_MSB_ADDR); + writew(htons(*(uint32_t *)&mac[4]), UNIMAC0_MAC_LSB_ADDR); +@@ -781,7 +781,7 @@ int gmac_mac_init(struct eth_device *dev) + uint32_t cmdcfg; + int chipid; + +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + /* Always use GMAC0 */ + printf("Using GMAC%d\n", 0); +@@ -914,7 +914,7 @@ int gmac_add(struct eth_device *dev) + } + + dma->tx_desc_aligned = (void *)tmp; +- debug("TX Descriptor Buffer: %p; length: 0x%x\n", ++printf("TX Descriptor Buffer: %p; length: 0x%x\n", + dma->tx_desc_aligned, DESCP_SIZE_ALIGNED * TX_BUF_NUM); + + tmp = memalign(ARCH_DMA_MINALIGN, TX_BUF_SIZE_ALIGNED * TX_BUF_NUM); +@@ -924,7 +924,7 @@ int gmac_add(struct eth_device *dev) + return -1; + } + dma->tx_buf = (uint8_t *)tmp; +- debug("TX Data Buffer: %p; length: 0x%x\n", ++printf("TX Data Buffer: %p; length: 0x%x\n", + dma->tx_buf, TX_BUF_SIZE_ALIGNED * TX_BUF_NUM); + + /* Desc has to be 16-byte aligned */ +@@ -936,7 +936,7 @@ int gmac_add(struct eth_device *dev) + return -1; + } + dma->rx_desc_aligned = (void *)tmp; +- debug("RX Descriptor Buffer: %p, length: 0x%x\n", ++printf("RX Descriptor Buffer: %p, length: 0x%x\n", + dma->rx_desc_aligned, DESCP_SIZE_ALIGNED * RX_BUF_NUM); + + tmp = memalign(ARCH_DMA_MINALIGN, RX_BUF_SIZE_ALIGNED * RX_BUF_NUM); +@@ -948,7 +948,7 @@ int gmac_add(struct eth_device *dev) + return -1; + } + dma->rx_buf = (uint8_t *)tmp; +- debug("RX Data Buffer: %p; length: 0x%x\n", ++printf("RX Data Buffer: %p; length: 0x%x\n", + dma->rx_buf, RX_BUF_SIZE_ALIGNED * RX_BUF_NUM); + + g_dmactrlflags = 0; +diff --git a/drivers/net/bcm-sf2-eth.c b/drivers/net/bcm-sf2-eth.c +index c862c1414..ca801172e 100644 +--- a/drivers/net/bcm-sf2-eth.c ++++ b/drivers/net/bcm-sf2-eth.c +@@ -50,14 +50,14 @@ static int bcm_sf2_eth_init(struct eth_device *dev) + dma->disable_dma(dma, MAC_DMA_TX); + + eth->port_num = 0; +- debug("Connecting PHY 0...\n"); ++printf("Connecting PHY 0...\n"); + phydev = phy_connect(miiphy_get_dev_by_name(dev->name), + -1, dev, eth->phy_interface); + if (phydev != NULL) { + eth->port[0] = phydev; + eth->port_num += 1; + } else { +- debug("No PHY found for port 0\n"); ++printf("No PHY found for port 0\n"); + } + + for (i = 0; i < eth->port_num; i++) +@@ -77,18 +77,18 @@ static int bcm_sf2_eth_send(struct eth_device *dev, void *packet, int length) + int rc = 0; + int i = 0; + +- debug("%s enter\n", __func__); ++printf("%s enter\n", __func__); + + /* load buf and start transmit */ + rc = dma->tx_packet(dma, buf, length); + if (rc) { +- debug("ERROR - Tx failed\n"); ++printf("ERROR - Tx failed\n"); + return rc; + } + + while (!(dma->check_tx_done(dma))) { + udelay(100); +- debug("."); ++printf("."); + i++; + if (i > 20) { + pr_err("%s: Tx timeout: retried 20 times\n", __func__); +@@ -97,7 +97,7 @@ static int bcm_sf2_eth_send(struct eth_device *dev, void *packet, int length) + } + } + +- debug("%s exit rc(0x%x)\n", __func__, rc); ++printf("%s exit rc(0x%x)\n", __func__, rc); + return rc; + } + +@@ -115,14 +115,14 @@ static int bcm_sf2_eth_receive(struct eth_device *dev) + if (rcvlen < 0) { + /* No packet received */ + rc = -1; +- debug("\nNO More Rx\n"); ++printf("\nNO More Rx\n"); + break; + } else if ((rcvlen == 0) || (rcvlen > RX_BUF_SIZE)) { + pr_err("%s: Wrong Ethernet packet size (%d B), skip!\n", + __func__, rcvlen); + break; + } else { +- debug("recieved\n"); ++printf("recieved\n"); + + /* Forward received packet to uboot network handler */ + net_process_received_packet(buf, rcvlen); +@@ -153,7 +153,7 @@ static int bcm_sf2_eth_open(struct eth_device *dev, struct bd_info *bt) + struct eth_dma *dma = &(eth->dma); + int i; + +- debug("Enabling BCM SF2 Ethernet.\n"); ++printf("Enabling BCM SF2 Ethernet.\n"); + + eth->enable_mac(); + +@@ -177,11 +177,11 @@ static int bcm_sf2_eth_open(struct eth_device *dev, struct bd_info *bt) + + /* Set MAC speed using default port */ + i = CONFIG_BCM_SF2_ETH_DEFAULT_PORT; +- debug("PHY %d: speed:%d, duplex:%d, link:%d\n", i, ++printf("PHY %d: speed:%d, duplex:%d, link:%d\n", i, + eth->port[i]->speed, eth->port[i]->duplex, eth->port[i]->link); + eth->set_mac_speed(eth->port[i]->speed, eth->port[i]->duplex); + +- debug("Enable Ethernet Done.\n"); ++printf("Enable Ethernet Done.\n"); + + return 0; + } +@@ -260,7 +260,7 @@ int bcm_sf2_eth_register(struct bd_info *bis, u8 dev_num) + #endif + + /* Initialization */ +- debug("Ethernet initialization ..."); ++printf("Ethernet initialization ..."); + + rc = bcm_sf2_eth_init(dev); + if (rc != 0) { +diff --git a/drivers/net/bcm6368-eth.c b/drivers/net/bcm6368-eth.c +index 29abe7fc9..e2459c19f 100644 +--- a/drivers/net/bcm6368-eth.c ++++ b/drivers/net/bcm6368-eth.c +@@ -600,7 +600,7 @@ static int bcm6368_eth_probe(struct udevice *dev) + + label = ofnode_read_string(node, "label"); + if (!label) { +- debug("%s: node %s has no label\n", __func__, ++printf("%s: node %s has no label\n", __func__, + ofnode_get_name(node)); + return -EINVAL; + } +diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c +index 67839563d..1b55703a4 100644 +--- a/drivers/net/bcmgenet.c ++++ b/drivers/net/bcmgenet.c +@@ -587,7 +587,7 @@ static int bcmgenet_mdio_init(const char *name, struct udevice *priv) + struct mii_dev *bus = mdio_alloc(); + + if (!bus) { +- debug("Failed to allocate MDIO bus\n"); ++printf("Failed to allocate MDIO bus\n"); + return -ENOMEM; + } + +@@ -701,7 +701,7 @@ static int bcmgenet_eth_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/cortina_ni.c b/drivers/net/cortina_ni.c +index ef6ecd88b..c0e6a6e7d 100644 +--- a/drivers/net/cortina_ni.c ++++ b/drivers/net/cortina_ni.c +@@ -83,7 +83,7 @@ static int ca_mdio_write_rgmii(u32 addr, u32 offset, u16 data) + ca_reg_write(&mdio_ctrl, (u64)priv->per_mdio_base_addr, + PER_MDIO_CTRL_OFFSET); + +- debug("%s: phy_addr=%d, offset=%d, data=0x%x\n", ++printf("%s: phy_addr=%d, offset=%d, data=0x%x\n", + __func__, addr, offset, data); + + do { +@@ -322,7 +322,7 @@ static void ca_ni_led(int port, int status) + + if (IS_ENABLED(CONFIG_LED_CORTINA)) { + snprintf(label, sizeof(label), "led%d", port); +- debug("%s: set port %d led %s.\n", ++printf("%s: set port %d led %s.\n", + __func__, port, status ? "on" : "off"); + led_get_by_label(label, &led_dev); + led_set_state(led_dev, status); +@@ -670,11 +670,11 @@ static int cortina_eth_recv(struct udevice *dev, int flags, uchar **packetp) + NI_HV_XRAM_CPUXRAM_CPU_CFG_RX_0_OFFSET); + sw_rx_rd_ptr = cpuxram_cpu_cfg_rx.pkt_rd_ptr; + +- debug("%s: NI_HV_XRAM_CPUXRAM_CPU_STA_RX_0 = 0x%p, ", __func__, ++printf("%s: NI_HV_XRAM_CPUXRAM_CPU_STA_RX_0 = 0x%p, ", __func__, + priv->ni_hv_base_addr + NI_HV_XRAM_CPUXRAM_CPU_STA_RX_0_OFFSET); +- debug("NI_HV_XRAM_CPUXRAM_CPU_CFG_RX_0 = 0x%p\n", ++printf("NI_HV_XRAM_CPUXRAM_CPU_CFG_RX_0 = 0x%p\n", + priv->ni_hv_base_addr + NI_HV_XRAM_CPUXRAM_CPU_CFG_RX_0_OFFSET); +- debug("%s : RX hw_wr_ptr = %d, sw_rd_ptr = %d\n", ++printf("%s : RX hw_wr_ptr = %d, sw_rd_ptr = %d\n", + __func__, hw_rx_wr_ptr, sw_rx_rd_ptr); + + while (sw_rx_rd_ptr != hw_rx_wr_ptr) { +@@ -703,8 +703,8 @@ static int cortina_eth_recv(struct udevice *dev, int flags, uchar **packetp) + if (*rx_xram_ptr == 0xffffffff) + printf("CA NI %s: XRAM Error !\n", __func__); + +- debug("%s : RX next link 0x%x\n", __func__, next_link); +- debug("%s : bytes_valid %x\n", __func__, header_x.bytes_valid); ++printf("%s : RX next link 0x%x\n", __func__, next_link); ++printf("%s : bytes_valid %x\n", __func__, header_x.bytes_valid); + + if (header_x.ownership == 0) { + /* point to Packet status [31:0] */ +@@ -715,8 +715,8 @@ static int cortina_eth_recv(struct udevice *dev, int flags, uchar **packetp) + memcpy(&packet_status, rx_xram_ptr, + sizeof(*rx_xram_ptr)); + if (packet_status.valid == 0) { +- debug("%s: Invalid Packet !!, ", __func__); +- debug("next_link=%d\n", next_link); ++printf("%s: Invalid Packet !!, ", __func__); ++printf("next_link=%d\n", next_link); + + /* Update the software read pointer */ + ca_reg_write(&next_link, +@@ -731,8 +731,8 @@ static int cortina_eth_recv(struct udevice *dev, int flags, uchar **packetp) + packet_status.jabber || + packet_status.crc_error || + packet_status.jumbo) { +- debug("%s: Error Packet!!, ", __func__); +- debug("next_link=%d\n", next_link); ++printf("%s: Error Packet!!, ", __func__); ++printf("next_link=%d\n", next_link); + + /* Update the software read pointer */ + ca_reg_write(&next_link, +@@ -743,9 +743,9 @@ static int cortina_eth_recv(struct udevice *dev, int flags, uchar **packetp) + + /* check whether packet size is larger than 1514 */ + if (packet_status.packet_size > 1518) { +- debug("%s: Error Packet !! Packet size=%d, ", ++printf("%s: Error Packet !! Packet size=%d, ", + __func__, packet_status.packet_size); +- debug("larger than 1518, next_link=%d\n", ++printf("larger than 1518, next_link=%d\n", + next_link); + + /* Update the software read pointer */ +@@ -761,7 +761,7 @@ static int cortina_eth_recv(struct udevice *dev, int flags, uchar **packetp) + + pktlen = packet_status.packet_size; + +- debug("%s : rx packet length = %d\n", ++printf("%s : rx packet length = %d\n", + __func__, packet_status.packet_size); + + rx_xram_ptr = ca_rdwrptr_adv_one(rx_xram_ptr, +@@ -775,12 +775,12 @@ static int cortina_eth_recv(struct udevice *dev, int flags, uchar **packetp) + + /* Send the packet to upper layer */ + +- debug("%s: packet data[]=", __func__); ++printf("%s: packet data[]=", __func__); + + for (loop = 0; loop <= pktlen / 4; loop++) { + ptr = (u8 *)rx_xram_ptr; + if (loop < 10) +- debug("[0x%x]-[0x%x]-[0x%x]-[0x%x]", ++printf("[0x%x]-[0x%x]-[0x%x]-[0x%x]", + ptr[0], ptr[1], ptr[2], ptr[3]); + *data_ptr++ = *rx_xram_ptr++; + /* Wrap around if required */ +@@ -791,14 +791,14 @@ static int cortina_eth_recv(struct udevice *dev, int flags, uchar **packetp) + } + } + +- debug("\n"); ++printf("\n"); + net_process_received_packet(net_rx_packets[index], + pktlen); + if (++index >= PKTBUFSRX) + index = 0; + blk_num = net_rx_packets[index][0x2c] * 255 + + net_rx_packets[index][0x2d]; +- debug("%s: tftp block number=%d\n", __func__, blk_num); ++printf("%s: tftp block number=%d\n", __func__, blk_num); + + /* Update the software read pointer */ + ca_reg_write(&next_link, +@@ -842,15 +842,15 @@ static int cortina_eth_send(struct udevice *dev, void *packet, int length) + ca_reg_read(&sw_tx_wr_ptr, (u64)priv->ni_hv_base_addr, + NI_HV_XRAM_CPUXRAM_CPU_CFG_TX_0_OFFSET); + +- debug("%s: NI_HV_XRAM_CPUXRAM_CPU_STAT_TX_0=0x%p, ", ++printf("%s: NI_HV_XRAM_CPUXRAM_CPU_STAT_TX_0=0x%p, ", + __func__, + KSEG1_ATU_XLAT(priv->ni_hv_base_addr + + NI_HV_XRAM_CPUXRAM_CPU_STAT_TX_0_OFFSET)); +- debug("NI_HV_XRAM_CPUXRAM_CPU_CFG_TX_0=0x%p\n", ++printf("NI_HV_XRAM_CPUXRAM_CPU_CFG_TX_0=0x%p\n", + KSEG1_ATU_XLAT(priv->ni_hv_base_addr + + NI_HV_XRAM_CPUXRAM_CPU_CFG_TX_0_OFFSET)); +- debug("%s : hw_tx_rd_ptr = %d\n", __func__, hw_tx_rd_ptr); +- debug("%s : sw_tx_wr_ptr = %d\n", __func__, sw_tx_wr_ptr); ++printf("%s : hw_tx_rd_ptr = %d\n", __func__, hw_tx_rd_ptr); ++printf("%s : sw_tx_wr_ptr = %d\n", __func__, sw_tx_wr_ptr); + + if (hw_tx_rd_ptr != sw_tx_wr_ptr) { + printf("CA NI %s: Tx FIFO is not available!\n", __func__); +@@ -871,7 +871,7 @@ static int cortina_eth_send(struct udevice *dev, void *packet, int length) + pad = 64 - (length + 4); /* if packet length < 60 */ + pad = (pad < 0) ? 0 : pad; + +- debug("%s: length=%d, pad=%d\n", __func__, length, pad); ++printf("%s: length=%d, pad=%d\n", __func__, length, pad); + + new_pkt_len = length + pad; /* new packet length */ + +@@ -880,9 +880,9 @@ static int cortina_eth_send(struct udevice *dev, void *packet, int length) + /* Calculate the CRC32, skip 8-byte header_A */ + ca_crc32 = crc32(0, (u8 *)(pkt_buf_ptr + HEADER_A_SIZE), new_pkt_len); + +- debug("%s: crc32 is 0x%x\n", __func__, ca_crc32); +- debug("%s: ~crc32 is 0x%x\n", __func__, ~ca_crc32); +- debug("%s: pkt len %d\n", __func__, new_pkt_len); ++printf("%s: crc32 is 0x%x\n", __func__, ca_crc32); ++printf("%s: ~crc32 is 0x%x\n", __func__, ~ca_crc32); ++printf("%s: pkt len %d\n", __func__, new_pkt_len); + /* should add 8-byte header_! */ + /* CRC will re-calculated by hardware */ + memcpy((pkt_buf_ptr + new_pkt_len + HEADER_A_SIZE), +@@ -891,7 +891,7 @@ static int cortina_eth_send(struct udevice *dev, void *packet, int length) + + valid_bytes = new_pkt_len % 8; + valid_bytes = valid_bytes ? valid_bytes : 0; +- debug("%s: valid_bytes %d\n", __func__, valid_bytes); ++printf("%s: valid_bytes %d\n", __func__, valid_bytes); + + /* should add 8-byte headerA */ + next_link = sw_tx_wr_ptr + +@@ -904,7 +904,7 @@ static int cortina_eth_send(struct udevice *dev, void *packet, int length) + (next_link - (priv->tx_xram_end + 1)); + } + +- debug("%s: TX next_link %x\n", __func__, next_link); ++printf("%s: TX next_link %x\n", __func__, next_link); + memset(&hdr_xt, 0, sizeof(hdr_xt)); + hdr_xt.ownership = 1; + hdr_xt.bytes_valid = valid_bytes; +@@ -929,14 +929,14 @@ static int cortina_eth_send(struct udevice *dev, void *packet, int length) + + /* Now to copy the data. The first byte on the line goes first */ + data_ptr = (u32 *)pkt_buf_ptr; +- debug("%s: packet data[]=", __func__); ++printf("%s: packet data[]=", __func__); + + /* copy header_A to XRAM */ + for (loop = 0; loop <= (new_pkt_len + HEADER_A_SIZE) / 4; loop++) { + ptr = (u8 *)data_ptr; + if ((loop % 4) == 0) +- debug("\n"); +- debug("[0x%x]-[0x%x]-[0x%x]-[0x%x]-", ++printf("\n"); ++printf("[0x%x]-[0x%x]-[0x%x]-[0x%x]-", + ptr[0], ptr[1], ptr[2], ptr[3]); + + *tx_xram_ptr = *data_ptr++; +@@ -944,7 +944,7 @@ static int cortina_eth_send(struct udevice *dev, void *packet, int length) + priv->tx_xram_base_adr, + priv->tx_xram_end_adr); + } +- debug("\n"); ++printf("\n"); + + /* Publish the software write pointer */ + cpuxram_cpu_cfg_tx.pkt_wr_ptr = next_link; +@@ -976,13 +976,13 @@ static int cortina_eth_probe(struct udevice *dev) + priv->tx_xram_end = TX_TOP_ADDR; + + curr_dev = dev; +- debug("%s: rx_base_addr:%x\t rx_top_addr %x\n", ++printf("%s: rx_base_addr:%x\t rx_top_addr %x\n", + __func__, priv->rx_xram_start, priv->rx_xram_end); +- debug("%s: tx_base_addr:%x\t tx_top_addr %x\n", ++printf("%s: tx_base_addr:%x\t tx_top_addr %x\n", + __func__, priv->tx_xram_start, priv->tx_xram_end); +- debug("%s: rx physical start address = %x end address = %x\n", ++printf("%s: rx physical start address = %x end address = %x\n", + __func__, priv->rx_xram_base_adr, priv->rx_xram_end_adr); +- debug("%s: tx physical start address = %x end address = %x\n", ++printf("%s: tx physical start address = %x end address = %x\n", + __func__, priv->tx_xram_base_adr, priv->tx_xram_end_adr); + + /* MDIO register */ +diff --git a/drivers/net/cs8900.c b/drivers/net/cs8900.c +index 9440a9188..d09a12365 100644 +--- a/drivers/net/cs8900.c ++++ b/drivers/net/cs8900.c +@@ -188,7 +188,7 @@ static int cs8900_recv(struct eth_device *dev) + rxlen = REG_READ(&priv->regs->rtdata); + + if (rxlen > PKTSIZE_ALIGN + PKTALIGN) +- debug("packet too big!\n"); ++printf("packet too big!\n"); + for (addr = (u16 *)net_rx_packets[0], i = rxlen >> 1; i > 0; i--) + *addr++ = REG_READ(&priv->regs->rtdata); + if (rxlen & 1) +@@ -215,7 +215,7 @@ retry: + /* Test to see if the chip has allocated memory for the packet */ + if ((get_reg(dev, PP_BusSTAT) & PP_BusSTAT_TxRDY) == 0) { + /* Oops... this should not happen! */ +- debug("cs: unable to send packet; retrying...\n"); ++printf("cs: unable to send packet; retrying...\n"); + for (tmo = get_timer(0) + 5 * CONFIG_SYS_HZ; + get_timer(0) < tmo;) + /*NOP*/; +@@ -238,7 +238,7 @@ retry: + + /* nothing */ ; + if((s & (PP_TER_CRS | PP_TER_TxOK)) != PP_TER_TxOK) { +- debug("\ntransmission error %#x\n", s); ++printf("\ntransmission error %#x\n", s); + } + + return 0; +diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c +index deedfe76e..403e93891 100644 +--- a/drivers/net/dc2114x.c ++++ b/drivers/net/dc2114x.c +@@ -469,7 +469,7 @@ static void read_hw_addr(struct dc2114x_priv *priv) + + if (!j || j == 0x2fffd) { + memset(priv->enetaddr, 0, ETH_ALEN); +- debug("Warning: can't read HW address from SROM.\n"); ++printf("Warning: can't read HW address from SROM.\n"); + } + } + +@@ -584,7 +584,7 @@ int dc21x4x_initialize(struct bd_info *bis) + /* read BAR for memory space access */ + pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &iobase); + iobase &= PCI_BASE_ADDRESS_MEM_MASK; +- debug("dc21x4x: DEC 21142 PCI Device @0x%x\n", iobase); ++printf("dc21x4x: DEC 21142 PCI Device @0x%x\n", iobase); + + priv = memalign(32, sizeof(*priv)); + if (!priv) { +@@ -717,7 +717,7 @@ static int dc2114x_probe(struct udevice *dev) + dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); + iobase &= ~0xf; + +- debug("dc2114x: DEC 2114x PCI Device @0x%x\n", iobase); ++printf("dc2114x: DEC 2114x PCI Device @0x%x\n", iobase); + + priv->devno = dev; + priv->enetaddr = plat->enetaddr; +diff --git a/drivers/net/designware.c b/drivers/net/designware.c +index 5d92257e7..7c65e4e14 100644 +--- a/drivers/net/designware.c ++++ b/drivers/net/designware.c +@@ -218,7 +218,7 @@ static int dw_dm_mdio_init(const char *name, void *priv) + ret = device_bind_driver_to_node(dev, "eth_designware_mdio", + subnode_name, node, &mdiodev); + if (ret) +- debug("%s: not able to bind mdio device node\n", __func__); ++printf("%s: not able to bind mdio device node\n", __func__); + + return 0; + } +@@ -815,7 +815,7 @@ int designware_eth_probe(struct udevice *dev) + ret = device_get_supply_regulator(dev, "phy-supply", + &phy_supply); + if (ret) { +- debug("%s: No phy supply\n", dev->name); ++printf("%s: No phy supply\n", dev->name); + } else { + ret = regulator_set_enable(phy_supply, true); + if (ret) { +@@ -846,7 +846,7 @@ int designware_eth_probe(struct udevice *dev) + } + #endif + +- debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv); ++printf("%s, iobase=%x, priv=%p\n", __func__, iobase, priv); + ioaddr = iobase; + priv->mac_regs_p = (struct eth_mac_regs *)ioaddr; + priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr + DW_DMA_BASE_OFFSET); +@@ -865,7 +865,7 @@ int designware_eth_probe(struct udevice *dev) + priv->bus = miiphy_get_dev_by_name(dev->name); + + ret = dw_phy_init(priv, dev); +- debug("%s, ret=%d\n", __func__, ret); ++printf("%s, ret=%d\n", __func__, ret); + if (!ret) + return 0; + +@@ -928,7 +928,7 @@ int designware_eth_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/dnet.c b/drivers/net/dnet.c +index fbcf15f26..c8e7d73bd 100644 +--- a/drivers/net/dnet.c ++++ b/drivers/net/dnet.c +@@ -73,7 +73,7 @@ static void dnet_mdio_write(struct dnet_device *dnet, u8 reg, u16 value) + { + u16 tmp; + +- debug(DRIVERNAME "dnet_mdio_write %02x:%02x <- %04x\n", ++printf(DRIVERNAME "dnet_mdio_write %02x:%02x <- %04x\n", + dnet->phy_addr, reg, value); + + while (!(dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_CTL_REG) & +@@ -126,7 +126,7 @@ static u16 dnet_mdio_read(struct dnet_device *dnet, u8 reg) + + value = dnet_readw_mac(dnet, DNET_INTERNAL_GMII_MNG_DAT_REG); + +- debug(DRIVERNAME "dnet_mdio_read %02x:%02x <- %04x\n", ++printf(DRIVERNAME "dnet_mdio_read %02x:%02x <- %04x\n", + dnet->phy_addr, reg, value); + + return value; +@@ -139,7 +139,7 @@ static int dnet_send(struct eth_device *netdev, void *packet, int length) + unsigned int *bufp; + unsigned int tx_cmd; + +- debug(DRIVERNAME "[%s] Sending %u bytes\n", __func__, length); ++printf(DRIVERNAME "[%s] Sending %u bytes\n", __func__, length); + + bufp = (unsigned int *) (((u32)packet) & 0xFFFFFFFC); + wrsz = (u32)length + 3; +@@ -174,7 +174,7 @@ static int dnet_recv(struct eth_device *netdev) + int pkt_len, poll, i; + u32 cmd_word; + +- debug("Waiting for pkt (polling)\n"); ++printf("Waiting for pkt (polling)\n"); + poll = 50; + while ((readl(&dnet->regs->RX_FIFO_WCNT) >> 16) == 0) { + udelay(10); /* wait 10 usec */ +@@ -185,7 +185,7 @@ static int dnet_recv(struct eth_device *netdev) + cmd_word = readl(&dnet->regs->RX_LEN_FIFO); + pkt_len = cmd_word & 0xFFFF; + +- debug("Got pkt with size %d bytes\n", pkt_len); ++printf("Got pkt with size %d bytes\n", pkt_len); + + if (cmd_word & 0xDF180000) + printf("%s packet receive error %x\n", __func__, cmd_word); +@@ -383,7 +383,7 @@ int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr) + netdev->recv = dnet_recv; + + dev_capa = readl(&dnet->regs->VERCAPS) & 0xFFFF; +- debug("%s: has %smdio, %sirq, %sgigabit, %sdma \n", netdev->name, ++printf("%s: has %smdio, %sirq, %sgigabit, %sdma \n", netdev->name, + (dev_capa & DNET_HAS_MDIO) ? "" : "no ", + (dev_capa & DNET_HAS_IRQ) ? "" : "no ", + (dev_capa & DNET_HAS_GIGABIT) ? "" : "no ", +diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c +index b012bed51..869e0874d 100644 +--- a/drivers/net/dwc_eth_qos.c ++++ b/drivers/net/dwc_eth_qos.c +@@ -423,7 +423,7 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad, + u32 val; + int ret; + +- debug("%s(dev=%p, addr=%x, reg=%d):\n", __func__, eqos->dev, mdio_addr, ++printf("%s(dev=%p, addr=%x, reg=%d):\n", __func__, eqos->dev, mdio_addr, + mdio_reg); + + ret = eqos_mdio_wait_idle(eqos); +@@ -455,7 +455,7 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad, + val = readl(&eqos->mac_regs->mdio_data); + val &= EQOS_MAC_MDIO_DATA_GD_MASK; + +- debug("%s: val=%x\n", __func__, val); ++printf("%s: val=%x\n", __func__, val); + + return val; + } +@@ -467,7 +467,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad, + u32 val; + int ret; + +- debug("%s(dev=%p, addr=%x, reg=%d, val=%x):\n", __func__, eqos->dev, ++printf("%s(dev=%p, addr=%x, reg=%d, val=%x):\n", __func__, eqos->dev, + mdio_addr, mdio_reg, mdio_val); + + ret = eqos_mdio_wait_idle(eqos); +@@ -507,7 +507,7 @@ static int eqos_start_clks_tegra186(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + ret = clk_enable(&eqos->clk_slave_bus); + if (ret < 0) { +@@ -546,7 +546,7 @@ static int eqos_start_clks_tegra186(struct udevice *dev) + } + #endif + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + + #ifdef CONFIG_CLK +@@ -559,7 +559,7 @@ err_disable_clk_master_bus: + err_disable_clk_slave_bus: + clk_disable(&eqos->clk_slave_bus); + err: +- debug("%s: FAILED: %d\n", __func__, ret); ++printf("%s: FAILED: %d\n", __func__, ret); + return ret; + #endif + } +@@ -570,7 +570,7 @@ static int eqos_start_clks_stm32(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + ret = clk_enable(&eqos->clk_master_bus); + if (ret < 0) { +@@ -600,7 +600,7 @@ static int eqos_start_clks_stm32(struct udevice *dev) + } + #endif + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + + #ifdef CONFIG_CLK +@@ -611,7 +611,7 @@ err_disable_clk_rx: + err_disable_clk_master_bus: + clk_disable(&eqos->clk_master_bus); + err: +- debug("%s: FAILED: %d\n", __func__, ret); ++printf("%s: FAILED: %d\n", __func__, ret); + return ret; + #endif + } +@@ -626,7 +626,7 @@ static void eqos_stop_clks_tegra186(struct udevice *dev) + #ifdef CONFIG_CLK + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + clk_disable(&eqos->clk_tx); + clk_disable(&eqos->clk_ptp_ref); +@@ -635,7 +635,7 @@ static void eqos_stop_clks_tegra186(struct udevice *dev) + clk_disable(&eqos->clk_slave_bus); + #endif + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + } + + static void eqos_stop_clks_stm32(struct udevice *dev) +@@ -643,14 +643,14 @@ static void eqos_stop_clks_stm32(struct udevice *dev) + #ifdef CONFIG_CLK + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + clk_disable(&eqos->clk_tx); + clk_disable(&eqos->clk_rx); + clk_disable(&eqos->clk_master_bus); + #endif + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + } + + static void eqos_stop_clks_imx(struct udevice *dev) +@@ -663,7 +663,7 @@ static int eqos_start_resets_tegra186(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1); + if (ret < 0) { +@@ -693,7 +693,7 @@ static int eqos_start_resets_tegra186(struct udevice *dev) + return ret; + } + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + } + +@@ -702,7 +702,7 @@ static int eqos_start_resets_stm32(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) { + ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1); + if (ret < 0) { +@@ -720,7 +720,7 @@ static int eqos_start_resets_stm32(struct udevice *dev) + return ret; + } + } +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + + return 0; + } +@@ -767,7 +767,7 @@ static int eqos_calibrate_pads_tegra186(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + setbits_le32(&eqos->tegra186_regs->sdmemcomppadctrl, + EQOS_SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD); +@@ -797,7 +797,7 @@ failed: + clrbits_le32(&eqos->tegra186_regs->sdmemcomppadctrl, + EQOS_SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD); + +- debug("%s: returns %d\n", __func__, ret); ++printf("%s: returns %d\n", __func__, ret); + + return ret; + } +@@ -806,7 +806,7 @@ static int eqos_disable_calibration_tegra186(struct udevice *dev) + { + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + clrbits_le32(&eqos->tegra186_regs->auto_cal_config, + EQOS_AUTO_CAL_CONFIG_ENABLE); +@@ -874,7 +874,7 @@ static int eqos_set_full_duplex(struct udevice *dev) + { + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + setbits_le32(&eqos->mac_regs->configuration, EQOS_MAC_CONFIGURATION_DM); + +@@ -885,7 +885,7 @@ static int eqos_set_half_duplex(struct udevice *dev) + { + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + clrbits_le32(&eqos->mac_regs->configuration, EQOS_MAC_CONFIGURATION_DM); + +@@ -900,7 +900,7 @@ static int eqos_set_gmii_speed(struct udevice *dev) + { + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + clrbits_le32(&eqos->mac_regs->configuration, + EQOS_MAC_CONFIGURATION_PS | EQOS_MAC_CONFIGURATION_FES); +@@ -912,7 +912,7 @@ static int eqos_set_mii_speed_100(struct udevice *dev) + { + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + setbits_le32(&eqos->mac_regs->configuration, + EQOS_MAC_CONFIGURATION_PS | EQOS_MAC_CONFIGURATION_FES); +@@ -924,7 +924,7 @@ static int eqos_set_mii_speed_10(struct udevice *dev) + { + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + clrsetbits_le32(&eqos->mac_regs->configuration, + EQOS_MAC_CONFIGURATION_FES, EQOS_MAC_CONFIGURATION_PS); +@@ -939,7 +939,7 @@ static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev) + ulong rate; + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + switch (eqos->phy->speed) { + case SPEED_1000: +@@ -977,7 +977,7 @@ static int eqos_set_tx_clk_speed_imx(struct udevice *dev) + ulong rate; + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + switch (eqos->phy->speed) { + case SPEED_1000: +@@ -1009,7 +1009,7 @@ static int eqos_adjust_link(struct udevice *dev) + int ret; + bool en_calibration; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + if (eqos->phy->duplex) + ret = eqos_set_full_duplex(dev); +@@ -1129,7 +1129,7 @@ static int eqos_start(struct udevice *dev) + ulong last_rx_desc; + ulong desc_pad; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + eqos->tx_desc_idx = 0; + eqos->rx_desc_idx = 0; +@@ -1442,7 +1442,7 @@ static int eqos_start(struct udevice *dev) + + eqos->started = true; + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + + err_shutdown_phy: +@@ -1461,7 +1461,7 @@ static void eqos_stop(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + int i; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + if (!eqos->started) + return; +@@ -1507,7 +1507,7 @@ static void eqos_stop(struct udevice *dev) + eqos->config->ops->eqos_stop_resets(dev); + eqos->config->ops->eqos_stop_clks(dev); + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + } + + static int eqos_send(struct udevice *dev, void *packet, int length) +@@ -1516,7 +1516,7 @@ static int eqos_send(struct udevice *dev, void *packet, int length) + struct eqos_desc *tx_desc; + int i; + +- debug("%s(dev=%p, packet=%p, length=%d):\n", __func__, dev, packet, ++printf("%s(dev=%p, packet=%p, length=%d):\n", __func__, dev, packet, + length); + + memcpy(eqos->tx_dma_buf, packet, length); +@@ -1547,7 +1547,7 @@ static int eqos_send(struct udevice *dev, void *packet, int length) + udelay(1); + } + +- debug("%s: TX timeout\n", __func__); ++printf("%s: TX timeout\n", __func__); + + return -ETIMEDOUT; + } +@@ -1558,19 +1558,19 @@ static int eqos_recv(struct udevice *dev, int flags, uchar **packetp) + struct eqos_desc *rx_desc; + int length; + +- debug("%s(dev=%p, flags=%x):\n", __func__, dev, flags); ++printf("%s(dev=%p, flags=%x):\n", __func__, dev, flags); + + rx_desc = eqos_get_desc(eqos, eqos->rx_desc_idx, true); + eqos->config->ops->eqos_inval_desc(rx_desc); + if (rx_desc->des3 & EQOS_DESC3_OWN) { +- debug("%s: RX packet not available\n", __func__); ++printf("%s: RX packet not available\n", __func__); + return -EAGAIN; + } + + *packetp = eqos->rx_dma_buf + + (eqos->rx_desc_idx * EQOS_MAX_PACKET_SIZE); + length = rx_desc->des3 & 0x7fff; +- debug("%s: *packetp=%p, length=%d\n", __func__, *packetp, length); ++printf("%s: *packetp=%p, length=%d\n", __func__, *packetp, length); + + eqos->config->ops->eqos_inval_buffer(*packetp, length); + +@@ -1583,12 +1583,12 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length) + uchar *packet_expected; + struct eqos_desc *rx_desc; + +- debug("%s(packet=%p, length=%d)\n", __func__, packet, length); ++printf("%s(packet=%p, length=%d)\n", __func__, packet, length); + + packet_expected = eqos->rx_dma_buf + + (eqos->rx_desc_idx * EQOS_MAX_PACKET_SIZE); + if (packet != packet_expected) { +- debug("%s: Unexpected packet (expected %p)\n", __func__, ++printf("%s: Unexpected packet (expected %p)\n", __func__, + packet_expected); + return -EINVAL; + } +@@ -1625,43 +1625,43 @@ static int eqos_probe_resources_core(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + eqos->descs = eqos_alloc_descs(eqos, EQOS_DESCRIPTORS_NUM); + if (!eqos->descs) { +- debug("%s: eqos_alloc_descs() failed\n", __func__); ++printf("%s: eqos_alloc_descs() failed\n", __func__); + ret = -ENOMEM; + goto err; + } + + eqos->tx_dma_buf = memalign(EQOS_BUFFER_ALIGN, EQOS_MAX_PACKET_SIZE); + if (!eqos->tx_dma_buf) { +- debug("%s: memalign(tx_dma_buf) failed\n", __func__); ++printf("%s: memalign(tx_dma_buf) failed\n", __func__); + ret = -ENOMEM; + goto err_free_descs; + } +- debug("%s: tx_dma_buf=%p\n", __func__, eqos->tx_dma_buf); ++printf("%s: tx_dma_buf=%p\n", __func__, eqos->tx_dma_buf); + + eqos->rx_dma_buf = memalign(EQOS_BUFFER_ALIGN, EQOS_RX_BUFFER_SIZE); + if (!eqos->rx_dma_buf) { +- debug("%s: memalign(rx_dma_buf) failed\n", __func__); ++printf("%s: memalign(rx_dma_buf) failed\n", __func__); + ret = -ENOMEM; + goto err_free_tx_dma_buf; + } +- debug("%s: rx_dma_buf=%p\n", __func__, eqos->rx_dma_buf); ++printf("%s: rx_dma_buf=%p\n", __func__, eqos->rx_dma_buf); + + eqos->rx_pkt = malloc(EQOS_MAX_PACKET_SIZE); + if (!eqos->rx_pkt) { +- debug("%s: malloc(rx_pkt) failed\n", __func__); ++printf("%s: malloc(rx_pkt) failed\n", __func__); + ret = -ENOMEM; + goto err_free_rx_dma_buf; + } +- debug("%s: rx_pkt=%p\n", __func__, eqos->rx_pkt); ++printf("%s: rx_pkt=%p\n", __func__, eqos->rx_pkt); + + eqos->config->ops->eqos_inval_buffer(eqos->rx_dma_buf, + EQOS_MAX_PACKET_SIZE * EQOS_DESCRIPTORS_RX); + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + + err_free_rx_dma_buf: +@@ -1672,7 +1672,7 @@ err_free_descs: + eqos_free_descs(eqos->descs); + err: + +- debug("%s: returns %d\n", __func__, ret); ++printf("%s: returns %d\n", __func__, ret); + return ret; + } + +@@ -1680,14 +1680,14 @@ static int eqos_remove_resources_core(struct udevice *dev) + { + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + free(eqos->rx_pkt); + free(eqos->rx_dma_buf); + free(eqos->tx_dma_buf); + eqos_free_descs(eqos->descs); + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + } + +@@ -1696,7 +1696,7 @@ static int eqos_probe_resources_tegra186(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + ret = reset_get_by_name(dev, "eqos", &eqos->reset_ctl); + if (ret) { +@@ -1743,7 +1743,7 @@ static int eqos_probe_resources_tegra186(struct udevice *dev) + goto err_free_clk_ptp_ref; + } + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + + err_free_clk_ptp_ref: +@@ -1759,7 +1759,7 @@ err_free_gpio_phy_reset: + err_free_reset_eqos: + reset_free(&eqos->reset_ctl); + +- debug("%s: returns %d\n", __func__, ret); ++printf("%s: returns %d\n", __func__, ret); + return ret; + } + +@@ -1777,7 +1777,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev) + phy_interface_t interface; + struct ofnode_phandle_args phandle_args; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + interface = eqos->config->interface(dev); + +@@ -1833,7 +1833,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev) + "reg", -1); + } + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + + err_free_clk_rx: +@@ -1842,7 +1842,7 @@ err_free_clk_master_bus: + clk_free(&eqos->clk_master_bus); + err_probe: + +- debug("%s: returns %d\n", __func__, ret); ++printf("%s: returns %d\n", __func__, ret); + return ret; + } + +@@ -1851,7 +1851,7 @@ static phy_interface_t eqos_get_interface_stm32(struct udevice *dev) + const char *phy_mode; + phy_interface_t interface = PHY_INTERFACE_MODE_NONE; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + phy_mode = dev_read_prop(dev, "phy-mode", NULL); + if (phy_mode) +@@ -1870,7 +1870,7 @@ static int eqos_probe_resources_imx(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + phy_interface_t interface; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + interface = eqos->config->interface(dev); + +@@ -1879,7 +1879,7 @@ static int eqos_probe_resources_imx(struct udevice *dev) + return -EINVAL; + } + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + } + +@@ -1888,7 +1888,7 @@ static phy_interface_t eqos_get_interface_imx(struct udevice *dev) + const char *phy_mode; + phy_interface_t interface = PHY_INTERFACE_MODE_NONE; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + phy_mode = dev_read_prop(dev, "phy-mode", NULL); + if (phy_mode) +@@ -1901,7 +1901,7 @@ static int eqos_remove_resources_tegra186(struct udevice *dev) + { + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + #ifdef CONFIG_CLK + clk_free(&eqos->clk_tx); +@@ -1913,7 +1913,7 @@ static int eqos_remove_resources_tegra186(struct udevice *dev) + dm_gpio_free(dev, &eqos->phy_reset_gpio); + reset_free(&eqos->reset_ctl); + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + } + +@@ -1922,7 +1922,7 @@ static int eqos_remove_resources_stm32(struct udevice *dev) + #ifdef CONFIG_CLK + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + clk_free(&eqos->clk_tx); + clk_free(&eqos->clk_rx); +@@ -1934,7 +1934,7 @@ static int eqos_remove_resources_stm32(struct udevice *dev) + if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) + dm_gpio_free(dev, &eqos->phy_reset_gpio); + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + } + +@@ -1948,7 +1948,7 @@ static int eqos_probe(struct udevice *dev) + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + eqos->dev = dev; + eqos->config = (void *)dev_get_driver_data(dev); +@@ -2001,7 +2001,7 @@ static int eqos_probe(struct udevice *dev) + eth_phy_set_mdio_bus(dev, eqos->mii); + #endif + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + + err_free_mdio: +@@ -2011,7 +2011,7 @@ err_remove_resources_tegra: + err_remove_resources_core: + eqos_remove_resources_core(dev); + +- debug("%s: returns %d\n", __func__, ret); ++printf("%s: returns %d\n", __func__, ret); + return ret; + } + +@@ -2019,7 +2019,7 @@ static int eqos_remove(struct udevice *dev) + { + struct eqos_priv *eqos = dev_get_priv(dev); + +- debug("%s(dev=%p):\n", __func__, dev); ++printf("%s(dev=%p):\n", __func__, dev); + + mdio_unregister(eqos->mii); + mdio_free(eqos->mii); +@@ -2027,7 +2027,7 @@ static int eqos_remove(struct udevice *dev) + + eqos_probe_resources_core(dev); + +- debug("%s: OK\n", __func__); ++printf("%s: OK\n", __func__); + return 0; + } + +diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c +index 60613b7df..5d967cc9b 100644 +--- a/drivers/net/e1000.c ++++ b/drivers/net/e1000.c +@@ -2854,7 +2854,7 @@ e1000_read_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *data) + swfw = E1000_SWFW_PHY1_SM; + + if (e1000_swfw_sync_acquire(hw, swfw)) { +- debug("%s[%i]\n", __func__, __LINE__); ++printf("%s[%i]\n", __func__, __LINE__); + return -E1000_ERR_SWFW_SYNC; + } + +diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c +index 934b88121..3a48a0f26 100644 +--- a/drivers/net/eepro100.c ++++ b/drivers/net/eepro100.c +@@ -538,7 +538,7 @@ static void eepro100_get_hwaddr(struct eepro100_priv *priv) + + if (sum != 0xBABA) { + memset(priv->enetaddr, 0, ETH_ALEN); +- debug("%s: Invalid EEPROM checksum %#4.4x, check settings before activating this device!\n", ++printf("%s: Invalid EEPROM checksum %#4.4x, check settings before activating this device!\n", + priv->name, sum); + } + } +@@ -838,7 +838,7 @@ int eepro100_initialize(struct bd_info *bis) + pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &iobase); + iobase &= ~0xf; + +- debug("eepro100: Intel i82559 PCI EtherExpressPro @0x%x\n", ++printf("eepro100: Intel i82559 PCI EtherExpressPro @0x%x\n", + iobase); + + pci_write_config_dword(devno, PCI_COMMAND, +@@ -971,7 +971,7 @@ static int eepro100_probe(struct udevice *dev) + dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase); + iobase &= ~0xf; + +- debug("eepro100: Intel i82559 PCI EtherExpressPro @0x%x\n", iobase); ++printf("eepro100: Intel i82559 PCI EtherExpressPro @0x%x\n", iobase); + + priv->devno = dev; + priv->enetaddr = plat->enetaddr; +diff --git a/drivers/net/ep93xx_eth.c b/drivers/net/ep93xx_eth.c +index 0218349b0..d76a6e19d 100644 +--- a/drivers/net/ep93xx_eth.c ++++ b/drivers/net/ep93xx_eth.c +@@ -152,7 +152,7 @@ static void ep93xx_mac_reset(struct eth_device *dev) + struct mac_regs *mac = GET_REGS(dev); + uint32_t value; + +- debug("+ep93xx_mac_reset"); ++printf("+ep93xx_mac_reset"); + + value = readl(&mac->selfctl); + value |= SELFCTL_RESET; +@@ -161,7 +161,7 @@ static void ep93xx_mac_reset(struct eth_device *dev) + while (readl(&mac->selfctl) & SELFCTL_RESET) + ; /* noop */ + +- debug("-ep93xx_mac_reset"); ++printf("-ep93xx_mac_reset"); + } + + /* Eth device open */ +@@ -172,7 +172,7 @@ static int ep93xx_eth_open(struct eth_device *dev, struct bd_info *bd) + uchar *mac_addr = dev->enetaddr; + int i; + +- debug("+ep93xx_eth_open"); ++printf("+ep93xx_eth_open"); + + /* Reset the MAC */ + ep93xx_mac_reset(dev); +@@ -274,7 +274,7 @@ static int ep93xx_eth_open(struct eth_device *dev, struct bd_info *bd) + dump_tx_descriptor_queue(dev); + dump_tx_status_queue(dev); + +- debug("-ep93xx_eth_open"); ++printf("-ep93xx_eth_open"); + + return 1; + } +@@ -287,12 +287,12 @@ static void ep93xx_eth_close(struct eth_device *dev) + { + struct mac_regs *mac = GET_REGS(dev); + +- debug("+ep93xx_eth_close"); ++printf("+ep93xx_eth_close"); + + writel(0x00000000, &mac->rxctl); + writel(0x00000000, &mac->txctl); + +- debug("-ep93xx_eth_close"); ++printf("-ep93xx_eth_close"); + } + + /** +@@ -305,7 +305,7 @@ static int ep93xx_eth_rcv_packet(struct eth_device *dev) + struct ep93xx_priv *priv = GET_PRIV(dev); + int len = -1; + +- debug("+ep93xx_eth_rcv_packet"); ++printf("+ep93xx_eth_rcv_packet"); + + if (RX_STATUS_RFP(priv->rx_sq.current)) { + if (RX_STATUS_RWE(priv->rx_sq.current)) { +@@ -323,7 +323,7 @@ static int ep93xx_eth_rcv_packet(struct eth_device *dev) + net_process_received_packet( + (uchar *)priv->rx_dq.current->word1, len); + +- debug("reporting %d bytes...\n", len); ++printf("reporting %d bytes...\n", len); + } else { + /* Do we have an erroneous packet? */ + pr_err("packet rx error, status %08X %08X", +@@ -361,7 +361,7 @@ static int ep93xx_eth_rcv_packet(struct eth_device *dev) + len = 0; + } + +- debug("-ep93xx_eth_rcv_packet %d", len); ++printf("-ep93xx_eth_rcv_packet %d", len); + return len; + } + +@@ -375,7 +375,7 @@ static int ep93xx_eth_send_packet(struct eth_device *dev, + struct ep93xx_priv *priv = GET_PRIV(dev); + int ret = -1; + +- debug("+ep93xx_eth_send_packet"); ++printf("+ep93xx_eth_send_packet"); + + /* Parameter check */ + BUG_ON(packet == NULL); +@@ -416,7 +416,7 @@ static int ep93xx_eth_send_packet(struct eth_device *dev, + /* Fall through */ + + eth_send_out: +- debug("-ep93xx_eth_send_packet %d", ret); ++printf("-ep93xx_eth_send_packet %d", ret); + return ret; + } + +@@ -450,7 +450,7 @@ int ep93xx_eth_initialize(u8 dev_num, int base_addr) + struct eth_device *dev; + struct ep93xx_priv *priv; + +- debug("+ep93xx_eth_initialize"); ++printf("+ep93xx_eth_initialize"); + + priv = malloc(sizeof(*priv)); + if (!priv) { +@@ -535,7 +535,7 @@ eth_init_failed_0: + /* Fall through */ + + eth_init_done: +- debug("-ep93xx_eth_initialize %d", ret); ++printf("-ep93xx_eth_initialize %d", ret); + return ret; + } + +@@ -562,7 +562,7 @@ static int ep93xx_miiphy_read(struct mii_dev *bus, int addr, int devad, + int ret = -1; + uint32_t self_ctl; + +- debug("+ep93xx_miiphy_read"); ++printf("+ep93xx_miiphy_read"); + + /* Parameter checks */ + BUG_ON(bus->name == NULL); +@@ -599,7 +599,7 @@ static int ep93xx_miiphy_read(struct mii_dev *bus, int addr, int devad, + ret = 0; + /* Fall through */ + +- debug("-ep93xx_miiphy_read"); ++printf("-ep93xx_miiphy_read"); + if (ret < 0) + return ret; + return value; +@@ -615,7 +615,7 @@ static int ep93xx_miiphy_write(struct mii_dev *bus, int addr, int devad, + int ret = -1; + uint32_t self_ctl; + +- debug("+ep93xx_miiphy_write"); ++printf("+ep93xx_miiphy_write"); + + /* Parameter checks */ + BUG_ON(bus->name == NULL); +@@ -648,7 +648,7 @@ static int ep93xx_miiphy_write(struct mii_dev *bus, int addr, int devad, + ret = 0; + /* Fall through */ + +- debug("-ep93xx_miiphy_write"); ++printf("-ep93xx_miiphy_write"); + return ret; + } + #endif /* defined(CONFIG_MII) */ +diff --git a/drivers/net/eth-phy-uclass.c b/drivers/net/eth-phy-uclass.c +index 07aebd935..f8660c28a 100644 +--- a/drivers/net/eth-phy-uclass.c ++++ b/drivers/net/eth-phy-uclass.c +@@ -22,7 +22,7 @@ int eth_phy_binds_nodes(struct udevice *eth_dev) + + mdio_node = dev_read_subnode(eth_dev, "mdio"); + if (!ofnode_valid(mdio_node)) { +- debug("%s: %s mdio subnode not found!", __func__, ++printf("%s: %s mdio subnode not found!", __func__, + eth_dev->name); + return -ENXIO; + } +@@ -30,17 +30,17 @@ int eth_phy_binds_nodes(struct udevice *eth_dev) + ofnode_for_each_subnode(phy_node, mdio_node) { + node_name = ofnode_get_name(phy_node); + +- debug("* Found child node: '%s'\n", node_name); ++printf("* Found child node: '%s'\n", node_name); + + ret = device_bind_driver_to_node(eth_dev, + "eth_phy_generic_drv", + node_name, phy_node, NULL); + if (ret) { +- debug(" - Eth phy binding error: %d\n", ret); ++printf(" - Eth phy binding error: %d\n", ret); + continue; + } + +- debug(" - bound phy device: '%s'\n", node_name); ++printf(" - bound phy device: '%s'\n", node_name); + } + + return 0; +@@ -101,7 +101,7 @@ int eth_phy_get_addr(struct udevice *dev) + + if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, + &phandle_args)) { +- debug("Failed to find phy-handle"); ++printf("Failed to find phy-handle"); + return -ENODEV; + } + +diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c +index 7f146d4c8..133bcc551 100644 +--- a/drivers/net/ethoc.c ++++ b/drivers/net/ethoc.c +@@ -363,30 +363,30 @@ static int ethoc_update_rx_stats(struct ethoc_bd *bd) + int ret = 0; + + if (bd->stat & RX_BD_TL) { +- debug("ETHOC: " "RX: frame too long\n"); ++printf("ETHOC: " "RX: frame too long\n"); + ret++; + } + + if (bd->stat & RX_BD_SF) { +- debug("ETHOC: " "RX: frame too short\n"); ++printf("ETHOC: " "RX: frame too short\n"); + ret++; + } + + if (bd->stat & RX_BD_DN) +- debug("ETHOC: " "RX: dribble nibble\n"); ++printf("ETHOC: " "RX: dribble nibble\n"); + + if (bd->stat & RX_BD_CRC) { +- debug("ETHOC: " "RX: wrong CRC\n"); ++printf("ETHOC: " "RX: wrong CRC\n"); + ret++; + } + + if (bd->stat & RX_BD_OR) { +- debug("ETHOC: " "RX: overrun\n"); ++printf("ETHOC: " "RX: overrun\n"); + ret++; + } + + if (bd->stat & RX_BD_LC) { +- debug("ETHOC: " "RX: late collision\n"); ++printf("ETHOC: " "RX: late collision\n"); + ret++; + } + +@@ -403,7 +403,7 @@ static int ethoc_rx_common(struct ethoc *priv, uchar **packetp) + if (bd.stat & RX_BD_EMPTY) + return -EAGAIN; + +- debug("%s(): RX buffer %d, %x received\n", ++printf("%s(): RX buffer %d, %x received\n", + __func__, priv->cur_rx, bd.stat); + if (ethoc_update_rx_stats(&bd) == 0) { + int size = bd.stat >> 16; +@@ -426,9 +426,9 @@ static int ethoc_is_new_packet_received(struct ethoc *priv) + pending = ethoc_read(priv, INT_SOURCE); + ethoc_ack_irq(priv, pending); + if (pending & INT_MASK_BUSY) +- debug("%s(): packet dropped\n", __func__); ++printf("%s(): packet dropped\n", __func__); + if (pending & INT_MASK_RX) { +- debug("%s(): rx irq\n", __func__); ++printf("%s(): rx irq\n", __func__); + return 1; + } + +@@ -438,16 +438,16 @@ static int ethoc_is_new_packet_received(struct ethoc *priv) + static int ethoc_update_tx_stats(struct ethoc_bd *bd) + { + if (bd->stat & TX_BD_LC) +- debug("ETHOC: " "TX: late collision\n"); ++printf("ETHOC: " "TX: late collision\n"); + + if (bd->stat & TX_BD_RL) +- debug("ETHOC: " "TX: retransmit limit\n"); ++printf("ETHOC: " "TX: retransmit limit\n"); + + if (bd->stat & TX_BD_UR) +- debug("ETHOC: " "TX: underrun\n"); ++printf("ETHOC: " "TX: underrun\n"); + + if (bd->stat & TX_BD_CS) +- debug("ETHOC: " "TX: carrier sense lost\n"); ++printf("ETHOC: " "TX: carrier sense lost\n"); + + return 0; + } +@@ -499,19 +499,19 @@ static int ethoc_send_common(struct ethoc *priv, void *packet, int length) + pending = ethoc_read(priv, INT_SOURCE); + ethoc_ack_irq(priv, pending & ~INT_MASK_RX); + if (pending & INT_MASK_BUSY) +- debug("%s(): packet dropped\n", __func__); ++printf("%s(): packet dropped\n", __func__); + + if (pending & INT_MASK_TX) { + ethoc_tx(priv); + break; + } + if (get_timer(0) >= tmo) { +- debug("%s(): timed out\n", __func__); ++printf("%s(): timed out\n", __func__); + return -1; + } + } + +- debug("%s(): packet sent\n", __func__); ++printf("%s(): packet sent\n", __func__); + return 0; + } + +diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c +index 4fd5c01b4..05a8748f5 100644 +--- a/drivers/net/fec_mxc.c ++++ b/drivers/net/fec_mxc.c +@@ -124,7 +124,7 @@ static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyaddr, + + /* it's now safe to read the PHY's register */ + val = (unsigned short)readl(ð->mii_data); +- debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, ++printf("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, + regaddr, val); + return val; + } +@@ -148,7 +148,7 @@ static int fec_get_clk_rate(void *udev, int idx) + if (!dev) { + ret = uclass_get_device(UCLASS_ETH, idx, &dev); + if (ret < 0) { +- debug("Can't get FEC udev: %d\n", ret); ++printf("Can't get FEC udev: %d\n", ret); + return ret; + } + } +@@ -198,7 +198,7 @@ static void fec_mii_setspeed(struct ethernet_regs *eth) + speed--; + #endif + writel(speed << 1 | hold << 8, ð->mii_speed); +- debug("%s: mii_speed %08x\n", __func__, readl(ð->mii_speed)); ++printf("%s: mii_speed %08x\n", __func__, readl(ð->mii_speed)); + } + + static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyaddr, +@@ -225,7 +225,7 @@ static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyaddr, + + /* clear MII interrupt bit */ + writel(FEC_IEVENT_MII, ð->ievent); +- debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, ++printf("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyaddr, + regaddr, data); + + return 0; +@@ -480,7 +480,7 @@ static int fec_open(struct eth_device *edev) + ulong addr, size; + int i; + +- debug("fec_open: fec_open(dev)\n"); ++printf("fec_open: fec_open(dev)\n"); + /* full-duplex, heartbeat disabled */ + writel(1 << 2, &fec->eth->x_cntrl); + fec->rbd_index = 0; +@@ -577,7 +577,7 @@ static int fec_open(struct eth_device *edev) + writel(rcr, &fec->eth->r_cntrl); + } + #endif +- debug("%s:Speed=%i\n", __func__, speed); ++printf("%s:Speed=%i\n", __func__, speed); + + /* Enable SmartDMA receive task */ + fec_rx_task_enable(fec); +@@ -675,7 +675,7 @@ static void fec_halt(struct eth_device *dev) + writel(FEC_TCNTRL_GTS | readl(&fec->eth->x_cntrl), + &fec->eth->x_cntrl); + +- debug("eth_halt: wait for stop regs\n"); ++printf("eth_halt: wait for stop regs\n"); + /* wait for graceful stop to register */ + while ((counter--) && (!(readl(&fec->eth->ievent) & FEC_IEVENT_GRA))) + udelay(1); +@@ -692,7 +692,7 @@ static void fec_halt(struct eth_device *dev) + &fec->eth->ecntrl); + fec->rbd_index = 0; + fec->tbd_index = 0; +- debug("eth_halt: done\n"); ++printf("eth_halt: done\n"); + } + + /** +@@ -836,7 +836,7 @@ static int fec_send(struct eth_device *dev, void *packet, int length) + ret = -EINVAL; + + out: +- debug("fec_send: status 0x%x index %d ret %i\n", ++printf("fec_send: status 0x%x index %d ret %i\n", + readw(&fec->tbd_base[fec->tbd_index].status), + fec->tbd_index, ret); + /* for next transmission use the other buffer */ +@@ -884,7 +884,7 @@ static int fec_recv(struct eth_device *dev) + /* Check if any critical events have happened */ + ievent = readl(&fec->eth->ievent); + writel(ievent, &fec->eth->ievent); +- debug("fec_recv: ievent 0x%lx\n", ievent); ++printf("fec_recv: ievent 0x%lx\n", ievent); + if (ievent & FEC_IEVENT_BABR) { + #ifdef CONFIG_DM_ETH + fecmxc_halt(dev); +@@ -938,7 +938,7 @@ static int fec_recv(struct eth_device *dev) + invalidate_dcache_range(addr, addr + size); + + bd_status = readw(&rbd->status); +- debug("fec_recv: status 0x%x\n", bd_status); ++printf("fec_recv: status 0x%x\n", bd_status); + + if (!(bd_status & FEC_RBD_EMPTY)) { + if ((bd_status & FEC_RBD_LAST) && !(bd_status & FEC_RBD_ERR) && +@@ -965,7 +965,7 @@ static int fec_recv(struct eth_device *dev) + len = frame_length; + } else { + if (bd_status & FEC_RBD_ERR) +- debug("error frame: 0x%08lx 0x%08x\n", ++printf("error frame: 0x%08lx 0x%08x\n", + addr, bd_status); + } + +@@ -990,7 +990,7 @@ static int fec_recv(struct eth_device *dev) + fec_rx_task_enable(fec); + fec->rbd_index = (fec->rbd_index + 1) % FEC_RBD_NUM; + } +- debug("fec_recv: stop\n"); ++printf("fec_recv: stop\n"); + + return len; + } +@@ -1180,7 +1180,7 @@ static int fec_probe(struct bd_info *bd, int dev_id, uint32_t base_addr, + edev->index = fec->dev_id; + + if (fec_get_hwaddr(fec->dev_id, ethaddr) == 0) { +- debug("got MAC%d address from fuse: %pM\n", fec->dev_id, ethaddr); ++printf("got MAC%d address from fuse: %pM\n", fec->dev_id, ethaddr); + memcpy(edev->enetaddr, ethaddr, 6); + if (fec->dev_id) + sprintf(mac, "eth%daddr", fec->dev_id); +@@ -1226,7 +1226,7 @@ int fecmxc_initialize_multi(struct bd_info *bd, int dev_id, int phy_id, + #else + base_mii = addr; + #endif +- debug("eth_init: fec_probe(bd, %i, %i) @ %08x\n", dev_id, phy_id, addr); ++printf("eth_init: fec_probe(bd, %i, %i) @ %08x\n", dev_id, phy_id, addr); + bus = fec_get_miibus(base_mii, dev_id); + if (!bus) + return -ENOMEM; +@@ -1304,7 +1304,7 @@ static int device_get_phy_addr(struct fec_priv *priv, struct udevice *dev) + ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, + &phandle_args); + if (ret) { +- debug("Failed to find phy-handle (err = %d\n)", ret); ++printf("Failed to find phy-handle (err = %d\n)", ret); + return ret; + } + +@@ -1342,7 +1342,7 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev) + /* FEC GPIO reset */ + static void fec_gpio_reset(struct fec_priv *priv) + { +- debug("fec_gpio_reset: fec_gpio_reset(dev)\n"); ++printf("fec_gpio_reset: fec_gpio_reset(dev)\n"); + if (dm_gpio_is_valid(&priv->phy_reset_gpio)) { + dm_gpio_set_value(&priv->phy_reset_gpio, 1); + mdelay(priv->reset_delay); +@@ -1372,12 +1372,12 @@ static int fecmxc_probe(struct udevice *dev) + if (IS_ENABLED(CONFIG_IMX8)) { + ret = clk_get_by_name(dev, "ipg", &priv->ipg_clk); + if (ret < 0) { +- debug("Can't get FEC ipg clk: %d\n", ret); ++printf("Can't get FEC ipg clk: %d\n", ret); + return ret; + } + ret = clk_enable(&priv->ipg_clk); + if (ret < 0) { +- debug("Can't enable FEC ipg clk: %d\n", ret); ++printf("Can't enable FEC ipg clk: %d\n", ret); + return ret; + } + +@@ -1385,7 +1385,7 @@ static int fecmxc_probe(struct udevice *dev) + } else if (CONFIG_IS_ENABLED(CLK_CCF)) { + ret = clk_get_by_name(dev, "ipg", &priv->ipg_clk); + if (ret < 0) { +- debug("Can't get FEC ipg clk: %d\n", ret); ++printf("Can't get FEC ipg clk: %d\n", ret); + return ret; + } + ret = clk_enable(&priv->ipg_clk); +@@ -1394,7 +1394,7 @@ static int fecmxc_probe(struct udevice *dev) + + ret = clk_get_by_name(dev, "ahb", &priv->ahb_clk); + if (ret < 0) { +- debug("Can't get FEC ahb clk: %d\n", ret); ++printf("Can't get FEC ahb clk: %d\n", ret); + return ret; + } + ret = clk_enable(&priv->ahb_clk); +@@ -1552,7 +1552,7 @@ static int fecmxc_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c +index 7c23ccc1f..73bf09369 100644 +--- a/drivers/net/fm/eth.c ++++ b/drivers/net/fm/eth.c +@@ -72,7 +72,7 @@ qsgmii_loop: + value = PHY_SGMII_IF_MODE_SGMII | PHY_SGMII_IF_MODE_AN; + + for (j = 0; j <= 3; j++) +- debug("dump PCS reg %#x: %#x\n", j, ++printf("dump PCS reg %#x: %#x\n", j, + memac_mdio_read(&bus, i, MDIO_DEVAD_NONE, j)); + + memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x14, value); +@@ -294,7 +294,7 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth) + } + + memset(rx_buf_pool, 0, MAX_RXBUF_LEN * RX_BD_RING_SIZE); +- debug("%s: rx_buf_pool = %p\n", __func__, rx_buf_pool); ++printf("%s: rx_buf_pool = %p\n", __func__, rx_buf_pool); + + /* save them to fm_eth */ + fm_eth->rx_bd_ring = rx_bd_ring_base; +@@ -531,7 +531,7 @@ static int fm_eth_open(struct udevice *dev) + + /* set the MAC-PHY mode */ + mac->set_if_mode(mac, fm_eth->enet_if, fm_eth->phydev->speed); +- debug("MAC IF mode %d, speed %d, link %d\n", fm_eth->enet_if, ++printf("MAC IF mode %d, speed %d, link %d\n", fm_eth->enet_if, + fm_eth->phydev->speed, fm_eth->phydev->link); + + if (!fm_eth->phydev->link) +@@ -797,7 +797,7 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, void *reg) + + #ifndef CONFIG_SYS_FMAN_V3 + mdio = fman_mdio(fm_eth->dev->parent, fm_eth->mac_type, fm_eth->num); +- debug("MDIO %d @ %p\n", fm_eth->num, mdio); ++printf("MDIO %d @ %p\n", fm_eth->num, mdio); + #endif + + switch (fm_eth->mac_type) { +@@ -960,7 +960,7 @@ phy_interface_t fman_read_sys_if(struct udevice *dev) + const char *if_str; + + if_str = ofnode_read_string(dev_ofnode(dev), "phy-connection-type"); +- debug("MAC system interface mode %s\n", if_str); ++printf("MAC system interface mode %s\n", if_str); + + return phy_get_interface_by_name(if_str); + } +@@ -984,7 +984,7 @@ static int fm_eth_bind(struct udevice *dev) + sprintf(mac_name, "fm%d-mac%d", fm + 1, num + 1); + device_set_name(dev, mac_name); + +- debug("%s - binding %s\n", __func__, mac_name); ++printf("%s - binding %s\n", __func__, mac_name); + + return 0; + } +@@ -1013,7 +1013,7 @@ static struct udevice *fm_get_internal_mdio(struct udevice *dev) + ofnode_get_name(ofnode_get_parent(phandle.node))); + return NULL; + } +- debug("Found internal MDIO bus %p\n", mdiodev); ++printf("Found internal MDIO bus %p\n", mdiodev); + + return mdiodev; + } +@@ -1025,7 +1025,7 @@ static int fm_eth_probe(struct udevice *dev) + void *reg; + int ret, index; + +- debug("%s enter for dev %p fm_eth %p - %s\n", __func__, dev, fm_eth, ++printf("%s enter for dev %p fm_eth %p - %s\n", __func__, dev, fm_eth, + (dev) ? dev->name : "-"); + + if (fm_eth->dev) { +diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c +index 36f50d278..8a9b9f583 100644 +--- a/drivers/net/fm/memac.c ++++ b/drivers/net/fm/memac.c +@@ -130,8 +130,8 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac, + } + } + +- debug(" %s, if_mode = %x\n", __func__, if_mode); +- debug(" %s, if_status = %x\n", __func__, if_status); ++printf(" %s, if_mode = %x\n", __func__, if_mode); ++printf(" %s, if_status = %x\n", __func__, if_status); + out_be32(®s->if_mode, if_mode); + return; + } +@@ -139,7 +139,7 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac, + void init_memac(struct fsl_enet_mac *mac, void *base, + void *phyregs, int max_rx_len) + { +- debug("%s: @ %p, mdio @ %p\n", __func__, base, phyregs); ++printf("%s: @ %p, mdio @ %p\n", __func__, base, phyregs); + mac->base = base; + mac->phyregs = phyregs; + mac->max_rx_len = max_rx_len; +diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c +index 72b500a6d..ab92e975d 100644 +--- a/drivers/net/fm/memac_phy.c ++++ b/drivers/net/fm/memac_phy.c +@@ -97,7 +97,7 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, + return -EINVAL; + priv = dev_get_priv(bus->priv); + regs = priv->regs; +- debug("memac_mdio_write(regs %p, port %d, dev %d, reg %d, val %#x)\n", ++printf("memac_mdio_write(regs %p, port %d, dev %d, reg %d, val %#x)\n", + regs, port_addr, dev_addr, regnum, value); + #endif + +@@ -303,7 +303,7 @@ static int fm_mdio_probe(struct udevice *dev) + return -1; + } + priv->regs = (void *)(uintptr_t)dev_read_addr(dev); +- debug("%s priv %p @ regs %p, pdata %p\n", __func__, ++printf("%s priv %p @ regs %p, pdata %p\n", __func__, + priv, priv->regs, pdata); + + /* +diff --git a/drivers/net/fsl-mc/dpio/qbman_portal.c b/drivers/net/fsl-mc/dpio/qbman_portal.c +index 44ce00041..9147f1517 100644 +--- a/drivers/net/fsl-mc/dpio/qbman_portal.c ++++ b/drivers/net/fsl-mc/dpio/qbman_portal.c +@@ -240,7 +240,7 @@ int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d, + uint32_t *p; + const uint32_t *cl = qb_cl(d); + uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR); +- debug("EQAR=%08x\n", eqar); ++printf("EQAR=%08x\n", eqar); + if (!EQAR_SUCCESS(eqar)) + return -EBUSY; + p = qbman_cena_write_start(&s->sys, +@@ -549,7 +549,7 @@ int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d, + uint32_t *p; + const uint32_t *cl = qb_cl(d); + uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR); +- debug("RAR=%08x\n", rar); ++printf("RAR=%08x\n", rar); + if (!RAR_SUCCESS(rar)) + return -EBUSY; + BUG_ON(!num_buffers || (num_buffers > 7)); +diff --git a/drivers/net/fsl-mc/dpio/qbman_private.h b/drivers/net/fsl-mc/dpio/qbman_private.h +index 53f1300ea..0f85f97bf 100644 +--- a/drivers/net/fsl-mc/dpio/qbman_private.h ++++ b/drivers/net/fsl-mc/dpio/qbman_private.h +@@ -116,7 +116,7 @@ static inline void __hexdump(unsigned long start, unsigned long end, + if (!nl) + buf[pos++] = '\n'; + buf[pos] = '\0'; +- debug("%s", buf); ++printf("%s", buf); + } + } + static inline void hexdump(const void *ptr, size_t sz) +diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c +index 972db4cf3..8a1e8136f 100644 +--- a/drivers/net/fsl-mc/mc.c ++++ b/drivers/net/fsl-mc/mc.c +@@ -107,7 +107,7 @@ void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs) + static int mc_copy_image(const char *title, + u64 image_addr, u32 image_size, u64 mc_ram_addr) + { +- debug("%s copied to address %p\n", title, (void *)mc_ram_addr); ++printf("%s copied to address %p\n", title, (void *)mc_ram_addr); + memcpy((void *)mc_ram_addr, (void *)image_addr, image_size); + flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size); + return 0; +@@ -337,7 +337,7 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob) + + prop = fdt_getprop_w(blob, offset, "iommu-map", &lenp); + if (!prop) { +- debug("%s: fsl-mc: ERR: missing iommu-map in fsl-mc bus node\n", ++printf("%s: fsl-mc: ERR: missing iommu-map in fsl-mc bus node\n", + __func__); + return; + } +@@ -354,7 +354,7 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob) + /* get phandle to MSI controller */ + prop = (u32 *)fdt_getprop(blob, offset, "msi-parent", 0); + if (!prop) { +- debug("\n%s: ERROR: missing msi-parent\n", __func__); ++printf("\n%s: ERROR: missing msi-parent\n", __func__); + return; + } + phandle = fdt32_to_cpu(*prop); +@@ -802,7 +802,7 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) + if (error != 0) + goto out; + +- debug("mc_ccsr_regs %p\n", mc_ccsr_regs); ++printf("mc_ccsr_regs %p\n", mc_ccsr_regs); + dump_mc_ccsr_regs(mc_ccsr_regs); + + /* +@@ -853,7 +853,7 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) + } + + root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id); +- debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n", ++printf("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n", + portal_id, root_mc_io->mmio_regs); + + error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info); +@@ -1080,7 +1080,7 @@ static int dpio_init(void) + printf("dpio_enable() failed %d\n", err); + goto err_get_enable; + } +- debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n", ++printf("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n", + attr.qbman_portal_ce_offset, + attr.qbman_portal_ci_offset, + attr.qbman_portal_id, +diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c +index 5fd11db05..fdef89148 100644 +--- a/drivers/net/fsl_mdio.c ++++ b/drivers/net/fsl_mdio.c +@@ -230,7 +230,7 @@ static int tsec_mdio_probe(struct udevice *dev) + + data = (struct fsl_pq_mdio_data *)dev_get_driver_data(dev); + priv->regs = dev_remap_addr(dev) + data->mdio_regs_off; +- debug("%s priv %p @ regs %p, pdata %p\n", __func__, ++printf("%s priv %p @ regs %p, pdata %p\n", __func__, + priv, priv->regs, pdata); + + return 0; +diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c +index 0687230b4..f586359e7 100644 +--- a/drivers/net/ftgmac100.c ++++ b/drivers/net/ftgmac100.c +@@ -244,7 +244,7 @@ static void ftgmac100_reset(struct ftgmac100_data *priv) + { + struct ftgmac100 *ftgmac100 = priv->iobase; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + setbits_le32(&ftgmac100->maccr, FTGMAC100_MACCR_SW_RST); + +@@ -262,7 +262,7 @@ static int ftgmac100_set_mac(struct ftgmac100_data *priv, + unsigned int maddr = mac[0] << 8 | mac[1]; + unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5]; + +- debug("%s(%x %x)\n", __func__, maddr, laddr); ++printf("%s(%x %x)\n", __func__, maddr, laddr); + + writel(maddr, &ftgmac100->mac_madr); + writel(laddr, &ftgmac100->mac_ladr); +@@ -280,7 +280,7 @@ static int ftgmac100_get_mac(struct ftgmac100_data *priv, + unsigned int maddr = readl(&ftgmac100->mac_madr); + unsigned int laddr = readl(&ftgmac100->mac_ladr); + +- debug("%s(%x %x)\n", __func__, maddr, laddr); ++printf("%s(%x %x)\n", __func__, maddr, laddr); + + mac[0] = (maddr >> 8) & 0xff; + mac[1] = maddr & 0xff; +@@ -300,7 +300,7 @@ static void ftgmac100_stop(struct udevice *dev) + struct ftgmac100_data *priv = dev_get_priv(dev); + struct ftgmac100 *ftgmac100 = priv->iobase; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + writel(0, &ftgmac100->maccr); + +@@ -318,7 +318,7 @@ static int ftgmac100_start(struct udevice *dev) + int ret; + int i; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + ftgmac100_reset(priv); + +@@ -441,7 +441,7 @@ static int ftgmac100_recv(struct udevice *dev, int flags, uchar **packetp) + + rxlen = FTGMAC100_RXDES0_VDBC(curr_des->rxdes0); + +- debug("%s(): RX buffer %d, %x received\n", ++printf("%s(): RX buffer %d, %x received\n", + __func__, priv->rx_index, rxlen); + + /* Invalidate received data */ +@@ -487,7 +487,7 @@ static int ftgmac100_send(struct udevice *dev, void *packet, int length) + return -EPERM; + } + +- debug("%s(%x, %x)\n", __func__, (int)packet, length); ++printf("%s(%x, %x)\n", __func__, (int)packet, length); + + length = (length < ETH_ZLEN) ? ETH_ZLEN : length; + +@@ -517,7 +517,7 @@ static int ftgmac100_send(struct udevice *dev, void *packet, int length) + if (rc) + return rc; + +- debug("%s(): packet sent\n", __func__); ++printf("%s(): packet sent\n", __func__); + + /* Move to next descriptor */ + priv->tx_index = (priv->tx_index + 1) % PKTBUFSTX; +diff --git a/drivers/net/ftmac110.c b/drivers/net/ftmac110.c +index 265d813c4..6ba42c67f 100644 +--- a/drivers/net/ftmac110.c ++++ b/drivers/net/ftmac110.c +@@ -259,7 +259,7 @@ static int ftmac110_reset(struct eth_device *dev) + + static int ftmac110_probe(struct eth_device *dev, struct bd_info *bis) + { +- debug("ftmac110: probe\n"); ++printf("ftmac110: probe\n"); + + if (ftmac110_reset(dev)) + return -1; +@@ -275,7 +275,7 @@ static void ftmac110_halt(struct eth_device *dev) + writel(0, ®s->imr); + writel(0, ®s->maccr); + +- debug("ftmac110: halt\n"); ++printf("ftmac110: halt\n"); + } + + static int ftmac110_send(struct eth_device *dev, void *pkt, int len) +diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c +index f90966048..9ece025e1 100644 +--- a/drivers/net/gmac_rockchip.c ++++ b/drivers/net/gmac_rockchip.c +@@ -109,7 +109,7 @@ static int px30_gmac_fix_mac_speed(struct dw_eth_dev *priv) + return ret; + break; + default: +- debug("Unknown phy speed: %d\n", priv->phydev->speed); ++printf("Unknown phy speed: %d\n", priv->phydev->speed); + return -EINVAL; + } + +@@ -142,7 +142,7 @@ static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv) + clk = RK3228_GMAC_CLK_SEL_125M; + break; + default: +- debug("Unknown phy speed: %d\n", priv->phydev->speed); ++printf("Unknown phy speed: %d\n", priv->phydev->speed); + return -EINVAL; + } + +@@ -168,7 +168,7 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv) + clk = RK3288_GMAC_CLK_SEL_125M; + break; + default: +- debug("Unknown phy speed: %d\n", priv->phydev->speed); ++printf("Unknown phy speed: %d\n", priv->phydev->speed); + return -EINVAL; + } + +@@ -209,7 +209,7 @@ static int rk3308_gmac_fix_mac_speed(struct dw_eth_dev *priv) + return ret; + break; + default: +- debug("Unknown phy speed: %d\n", priv->phydev->speed); ++printf("Unknown phy speed: %d\n", priv->phydev->speed); + return -EINVAL; + } + +@@ -242,7 +242,7 @@ static int rk3328_gmac_fix_mac_speed(struct dw_eth_dev *priv) + clk = RK3328_GMAC_CLK_SEL_125M; + break; + default: +- debug("Unknown phy speed: %d\n", priv->phydev->speed); ++printf("Unknown phy speed: %d\n", priv->phydev->speed); + return -EINVAL; + } + +@@ -274,7 +274,7 @@ static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv) + clk = RK3368_GMAC_CLK_SEL_125M; + break; + default: +- debug("Unknown phy speed: %d\n", priv->phydev->speed); ++printf("Unknown phy speed: %d\n", priv->phydev->speed); + return -EINVAL; + } + +@@ -300,7 +300,7 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv) + clk = RK3399_GMAC_CLK_SEL_125M; + break; + default: +- debug("Unknown phy speed: %d\n", priv->phydev->speed); ++printf("Unknown phy speed: %d\n", priv->phydev->speed); + return -EINVAL; + } + +@@ -333,7 +333,7 @@ static int rv1108_set_rmii_speed(struct dw_eth_dev *priv) + speed = RV1108_GMAC_SPEED_100M; + break; + default: +- debug("Unknown phy speed: %d\n", priv->phydev->speed); ++printf("Unknown phy speed: %d\n", priv->phydev->speed); + return -EINVAL; + } + +@@ -567,7 +567,7 @@ static int gmac_rockchip_probe(struct udevice *dev) + + ret = clk_set_defaults(dev, 0); + if (ret) +- debug("%s clk_set_defaults failed %d\n", __func__, ret); ++printf("%s clk_set_defaults failed %d\n", __func__, ret); + + ret = clk_get_by_index(dev, 0, &clk); + if (ret) +@@ -656,7 +656,7 @@ static int gmac_rockchip_probe(struct udevice *dev) + break; + + default: +- debug("NO interface defined!\n"); ++printf("NO interface defined!\n"); + return -ENXIO; + } + +diff --git a/drivers/net/higmacv300.c b/drivers/net/higmacv300.c +index aa79d6eda..1ac7bcadc 100644 +--- a/drivers/net/higmacv300.c ++++ b/drivers/net/higmacv300.c +@@ -271,7 +271,7 @@ static int higmac_adjust_link(struct higmac_priv *priv) + val = MII_SPEED_10; + break; + default: +- debug("unsupported mode: %d\n", interface); ++printf("unsupported mode: %d\n", interface); + return -EINVAL; + } + +@@ -306,7 +306,7 @@ static int higmac_start(struct udevice *dev) + return ret; + + if (!phydev->link) { +- debug("%s: link down\n", phydev->dev->name); ++printf("%s: link down\n", phydev->dev->name); + return -ENODEV; + } + +@@ -577,7 +577,7 @@ static int higmac_of_to_plat(struct udevice *dev) + + phy_node = dev_read_subnode(dev, "phy"); + if (!ofnode_valid(phy_node)) { +- debug("failed to find phy node\n"); ++printf("failed to find phy node\n"); + return -ENODEV; + } + priv->phyaddr = ofnode_read_u32_default(phy_node, "reg", 0); +diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c +index 9dd9b3395..136819f08 100644 +--- a/drivers/net/ks8851_mll.c ++++ b/drivers/net/ks8851_mll.c +@@ -285,7 +285,7 @@ static int ks_read_selftest(struct ks_net *ks) + ret |= 2; + } + +- debug(DRIVERNAME ": the selftest passes\n"); ++printf(DRIVERNAME ": the selftest passes\n"); + + return ret; + } +@@ -349,7 +349,7 @@ static int ks8851_mll_detect_chip(struct ks_net *ks) + return -1; + } + +- debug("Read back KS8851 id 0x%x\n", val); ++printf("Read back KS8851 id 0x%x\n", val); + + if ((val & 0xfff0) != CIDER_ID) { + printf(DRIVERNAME ": Unknown chip ID %04x\n", val); +@@ -387,7 +387,7 @@ static void ks8851_mll_phy_configure(struct ks_net *ks) + data = ks_rdreg16(ks, KS_OBCR); + ks_wrreg16(ks, KS_OBCR, data | OBCR_ODS_16MA); + +- debug(DRIVERNAME ": phy initialized\n"); ++printf(DRIVERNAME ": phy initialized\n"); + } + + static void ks8851_mll_enable(struct ks_net *ks) +diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c +index 725173f62..ae64568c9 100644 +--- a/drivers/net/ldpaa_eth/ldpaa_eth.c ++++ b/drivers/net/ldpaa_eth/ldpaa_eth.c +@@ -249,7 +249,7 @@ static void ldpaa_eth_rx(struct ldpaa_eth_priv *priv, + fd_offset = ldpaa_fd_get_offset(fd); + fd_length = ldpaa_fd_get_len(fd); + +- debug("Rx frame:data addr=0x%p size=0x%x\n", (u64 *)fd_addr, fd_length); ++printf("Rx frame:data addr=0x%p size=0x%x\n", (u64 *)fd_addr, fd_length); + + if (fd->simple.frc & LDPAA_FD_FRC_FASV) { + /* Read the frame annotation status word and check for errors */ +@@ -268,7 +268,7 @@ static void ldpaa_eth_rx(struct ldpaa_eth_priv *priv, + } + } + +- debug("Rx frame: To Upper layer\n"); ++printf("Rx frame: To Upper layer\n"); + net_process_received_packet((uint8_t *)(fd_addr) + fd_offset, + fd_length); + +@@ -331,8 +331,8 @@ static int ldpaa_eth_pull_dequeue_rx(struct eth_device *dev) + */ + status = (uint8_t)ldpaa_dq_flags(dq); + if ((status & LDPAA_DQ_STAT_VALIDFRAME) == 0) { +- debug("Dequeue RX frames:"); +- debug("No frame delivered\n"); ++printf("Dequeue RX frames:"); ++printf("No frame delivered\n"); + + qbman_swp_dqrr_consume(swp, dq); + continue; +@@ -346,7 +346,7 @@ static int ldpaa_eth_pull_dequeue_rx(struct eth_device *dev) + break; + } else { + err = -ENODATA; +- debug("No DQRR entries\n"); ++printf("No DQRR entries\n"); + break; + } + } +@@ -388,7 +388,7 @@ static int ldpaa_eth_tx(struct eth_device *net_dev, void *buf, int len) + return -ENOMEM; + } + +- debug("TX data: malloc buffer start=0x%p\n", (u64 *)buffer_start); ++printf("TX data: malloc buffer start=0x%p\n", (u64 *)buffer_start); + + memcpy(((uint8_t *)(buffer_start) + data_offset), buf, len); + +@@ -736,7 +736,7 @@ static void ldpaa_dpbp_drain_cnt(int count) + } + for (i = 0; i < ret; i++) { + addr = (void *)buf_array[i]; +- debug("Free: buffer addr =0x%p\n", addr); ++printf("Free: buffer addr =0x%p\n", addr); + free(addr); + } + } while (ret); +@@ -767,7 +767,7 @@ static int ldpaa_bp_add_7(uint16_t bpid) + (u64)(addr + LDPAA_ETH_RX_BUFFER_SIZE)); + + buf_array[i] = (uint64_t)addr; +- debug("Release: buffer addr =0x%p\n", addr); ++printf("Release: buffer addr =0x%p\n", addr); + } + + release_bufs: +@@ -1046,7 +1046,7 @@ static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv) + + /* Accomodate SWA space. */ + priv->tx_data_offset += LDPAA_ETH_SWA_SIZE; +- debug("priv->tx_data_offset=%d\n", priv->tx_data_offset); ++printf("priv->tx_data_offset=%d\n", priv->tx_data_offset); + + return 0; + +@@ -1254,13 +1254,13 @@ int ldpaa_eth_init(int dpmac_id, phy_interface_t enet_if) + net_dev->priv = (void *)priv; + priv->net_dev = (struct eth_device *)net_dev; + priv->dpmac_id = dpmac_id; +- debug("%s dpmac_id=%d\n", __func__, dpmac_id); ++printf("%s dpmac_id=%d\n", __func__, dpmac_id); + + err = ldpaa_eth_netdev_init(net_dev, enet_if); + if (err) + goto err_netdev_init; + +- debug("ldpaa ethernet: Probed interface %s\n", net_dev->name); ++printf("ldpaa ethernet: Probed interface %s\n", net_dev->name); + return 0; + + err_netdev_init: +diff --git a/drivers/net/lpc32xx_eth.c b/drivers/net/lpc32xx_eth.c +index 3f281a515..69774d48c 100644 +--- a/drivers/net/lpc32xx_eth.c ++++ b/drivers/net/lpc32xx_eth.c +@@ -273,7 +273,7 @@ static int mii_reg_read(struct mii_dev *bus, int phy_adr, int devad, + + data = (u16) readl(®s->mrdd); + +- debug("%s:(adr %d, off %d) => %04x\n", __func__, phy_adr, ++printf("%s:(adr %d, off %d) => %04x\n", __func__, phy_adr, + reg_ofs, data); + + return data; +diff --git a/drivers/net/macb.c b/drivers/net/macb.c +index 57ea45e2d..0bf698a60 100644 +--- a/drivers/net/macb.c ++++ b/drivers/net/macb.c +@@ -1373,7 +1373,7 @@ static int macb_eth_probe(struct udevice *dev) + if (phy_mode) + macb->phy_interface = phy_get_interface_by_name(phy_mode); + if (macb->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/mdio_mux_i2creg.c b/drivers/net/mdio_mux_i2creg.c +index 365423011..71c39725f 100644 +--- a/drivers/net/mdio_mux_i2creg.c ++++ b/drivers/net/mdio_mux_i2creg.c +@@ -33,7 +33,7 @@ static int mdio_mux_i2creg_select(struct udevice *mux, int cur, int sel) + + val_old = dm_i2c_reg_read(priv->chip, priv->reg); + val = (val_old & ~priv->mask) | (sel & priv->mask); +- debug("%s: chip %s, reg %x, val %x => %x\n", __func__, priv->chip->name, ++printf("%s: chip %s, reg %x, val %x => %x\n", __func__, priv->chip->name, + priv->reg, val_old, val); + dm_i2c_reg_write(priv->chip, priv->reg, val); + +@@ -56,7 +56,7 @@ static int mdio_mux_i2creg_probe(struct udevice *dev) + /* read the register addr/mask pair */ + err = dev_read_u32_array(dev, "mux-reg-masks", reg_mask, 2); + if (err) { +- debug("%s: error reading mux-reg-masks property\n", __func__); ++printf("%s: error reading mux-reg-masks property\n", __func__); + return err; + } + +@@ -66,21 +66,21 @@ static int mdio_mux_i2creg_probe(struct udevice *dev) + + err = uclass_get_device_by_ofnode(UCLASS_I2C, bus_node, &i2c_bus); + if (err) { +- debug("%s: can't find I2C bus for node %s\n", __func__, ++printf("%s: can't find I2C bus for node %s\n", __func__, + ofnode_get_name(bus_node)); + return err; + } + + err = ofnode_read_u32(chip_node, "reg", &chip_addr); + if (err) { +- debug("%s: can't read chip address in %s\n", __func__, ++printf("%s: can't read chip address in %s\n", __func__, + ofnode_get_name(chip_node)); + return err; + } + + err = i2c_get_chip(i2c_bus, (uint)chip_addr, 1, &priv->chip); + if (err) { +- debug("%s: can't find i2c chip device for addr %x\n", __func__, ++printf("%s: can't find i2c chip device for addr %x\n", __func__, + chip_addr); + return err; + } +@@ -88,7 +88,7 @@ static int mdio_mux_i2creg_probe(struct udevice *dev) + priv->reg = (int)reg_mask[0]; + priv->mask = (int)reg_mask[1]; + +- debug("%s: chip %s, reg %x, mask %x\n", __func__, priv->chip->name, ++printf("%s: chip %s, reg %x, mask %x\n", __func__, priv->chip->name, + priv->reg, priv->mask); + + return 0; +diff --git a/drivers/net/mdio_mux_meson_g12a.c b/drivers/net/mdio_mux_meson_g12a.c +index b520bf98f..f5a69e120 100644 +--- a/drivers/net/mdio_mux_meson_g12a.c ++++ b/drivers/net/mdio_mux_meson_g12a.c +@@ -101,7 +101,7 @@ static int mdio_mux_meson_g12a_select(struct udevice *mux, int cur, int sel) + { + struct mdio_mux_meson_g12a_priv *priv = dev_get_priv(mux); + +- debug("%s: %x -> %x\n", __func__, (u32)cur, (u32)sel); ++printf("%s: %x -> %x\n", __func__, (u32)cur, (u32)sel); + + /* if last selection didn't change we're good to go */ + if (cur == sel) +diff --git a/drivers/net/mdio_mux_mmioreg.c b/drivers/net/mdio_mux_mmioreg.c +index e1a23e40a..cce09eec9 100644 +--- a/drivers/net/mdio_mux_mmioreg.c ++++ b/drivers/net/mdio_mux_mmioreg.c +@@ -24,7 +24,7 @@ static int mdio_mux_mmioreg_select(struct udevice *mux, int cur, int sel) + { + struct mdio_mux_mmioreg_priv *priv = dev_get_priv(mux); + +- debug("%s: %x -> %x\n", __func__, (u32)cur, (u32)sel); ++printf("%s: %x -> %x\n", __func__, (u32)cur, (u32)sel); + + /* if last selection didn't change we're good to go */ + if (cur == sel) +@@ -38,7 +38,7 @@ static int mdio_mux_mmioreg_select(struct udevice *mux, int cur, int sel) + y = (x & ~priv->mask) | (u32)sel; + if (x != y) { + iowrite8((x & ~priv->mask) | sel, (void *)priv->phys); +- debug("%s: %02x -> %02x\n", __func__, x, y); ++printf("%s: %02x -> %02x\n", __func__, x, y); + } + + break; +@@ -50,7 +50,7 @@ static int mdio_mux_mmioreg_select(struct udevice *mux, int cur, int sel) + y = (x & ~priv->mask) | (u32)sel; + if (x != y) { + iowrite16((x & ~priv->mask) | sel, (void *)priv->phys); +- debug("%s: %04x -> %04x\n", __func__, x, y); ++printf("%s: %04x -> %04x\n", __func__, x, y); + } + + break; +@@ -62,7 +62,7 @@ static int mdio_mux_mmioreg_select(struct udevice *mux, int cur, int sel) + y = (x & ~priv->mask) | (u32)sel; + if (x != y) { + iowrite32((x & ~priv->mask) | sel, (void *)priv->phys); +- debug("%s: %08x -> %08x\n", __func__, x, y); ++printf("%s: %08x -> %08x\n", __func__, x, y); + } + + break; +@@ -96,7 +96,7 @@ static int mdio_mux_mmioreg_probe(struct udevice *dev) + + err = dev_read_u32(dev, "mux-mask", ®_mask); + if (err) { +- debug("%s: error reading mux-mask property\n", __func__); ++printf("%s: error reading mux-mask property\n", __func__); + return err; + } + +@@ -109,7 +109,7 @@ static int mdio_mux_mmioreg_probe(struct udevice *dev) + priv->iosize = reg_size; + priv->mask = reg_mask; + +- debug("%s: %llx@%lld / %x\n", __func__, reg_base, reg_size, reg_mask); ++printf("%s: %llx@%lld / %x\n", __func__, reg_base, reg_size, reg_mask); + + return 0; + } +diff --git a/drivers/net/mscc_eswitch/mscc_xfer.c b/drivers/net/mscc_eswitch/mscc_xfer.c +index 6f7474645..4a804eeaa 100644 +--- a/drivers/net/mscc_eswitch/mscc_xfer.c ++++ b/drivers/net/mscc_eswitch/mscc_xfer.c +@@ -82,13 +82,13 @@ int mscc_recv(void __iomem *regs, const unsigned long *mscc_qs_offset, + + switch (cmp) { + case XTR_NOT_READY: +- debug("%d NOT_READY...?\n", byte_cnt); ++printf("%d NOT_READY...?\n", byte_cnt); + break; + case XTR_ABORT: + *rxbuf = readl(regs + mscc_qs_offset[MSCC_QS_XTR_RD]); + abort_flag = true; + eof_flag = true; +- debug("XTR_ABORT\n"); ++printf("XTR_ABORT\n"); + break; + case XTR_EOF_0: + case XTR_EOF_1: +@@ -97,19 +97,19 @@ int mscc_recv(void __iomem *regs, const unsigned long *mscc_qs_offset, + byte_cnt += XTR_VALID_BYTES(val); + *rxbuf = readl(regs + mscc_qs_offset[MSCC_QS_XTR_RD]); + eof_flag = true; +- debug("EOF\n"); ++printf("EOF\n"); + break; + case XTR_PRUNED: + /* But get the last 4 bytes as well */ + eof_flag = true; + pruned_flag = true; +- debug("PRUNED\n"); ++printf("PRUNED\n"); + /* fallthrough */ + case XTR_ESCAPE: + *rxbuf = readl(regs + mscc_qs_offset[MSCC_QS_XTR_RD]); + byte_cnt += 4; + rxbuf++; +- debug("ESCAPED\n"); ++printf("ESCAPED\n"); + break; + default: + *rxbuf = val; +@@ -119,7 +119,7 @@ int mscc_recv(void __iomem *regs, const unsigned long *mscc_qs_offset, + } + + if (abort_flag || pruned_flag || !eof_flag) { +- debug("Discarded frame: abort:%d pruned:%d eof:%d\n", ++printf("Discarded frame: abort:%d pruned:%d eof:%d\n", + abort_flag, pruned_flag, eof_flag); + return -EAGAIN; + } +diff --git a/drivers/net/mscc_eswitch/ocelot_switch.c b/drivers/net/mscc_eswitch/ocelot_switch.c +index d1d0a489a..e88abcc07 100644 +--- a/drivers/net/mscc_eswitch/ocelot_switch.c ++++ b/drivers/net/mscc_eswitch/ocelot_switch.c +@@ -412,7 +412,7 @@ static int ocelot_initialize(struct ocelot_private *priv) + + ocelot_cpu_capture_setup(priv); + +- debug("Ports enabled\n"); ++printf("Ports enabled\n"); + + return 0; + } +diff --git a/drivers/net/mscc_eswitch/serval_switch.c b/drivers/net/mscc_eswitch/serval_switch.c +index c4b81f752..16055c8ff 100644 +--- a/drivers/net/mscc_eswitch/serval_switch.c ++++ b/drivers/net/mscc_eswitch/serval_switch.c +@@ -365,7 +365,7 @@ static int serval_initialize(struct serval_private *priv) + + serval_cpu_capture_setup(priv); + +- debug("Ports enabled\n"); ++printf("Ports enabled\n"); + + return 0; + } +diff --git a/drivers/net/mt7620-eth.c b/drivers/net/mt7620-eth.c +index 222250d52..59661383b 100644 +--- a/drivers/net/mt7620-eth.c ++++ b/drivers/net/mt7620-eth.c +@@ -925,7 +925,7 @@ static int mt7620_eth_recv(struct udevice *dev, int flags, uchar **packetp) + uchar *pkt_base; + + if (!priv->rx_ring_noc[idx].rxd_info2.DDONE) { +- debug("mt7620_eth: RX DMA descriptor ring is empty\n"); ++printf("mt7620_eth: RX DMA descriptor ring is empty\n"); + return -EAGAIN; + } + +diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c +index 26f02847a..5930bbda8 100644 +--- a/drivers/net/mtk_eth.c ++++ b/drivers/net/mtk_eth.c +@@ -1038,7 +1038,7 @@ static void mtk_phy_link_adjust(struct mtk_eth_priv *priv) + if (flowctrl & FLOW_CTRL_RX) + mcr |= FORCE_RX_FC; + +- debug("rx pause %s, tx pause %s\n", ++printf("rx pause %s, tx pause %s\n", + flowctrl & FLOW_CTRL_RX ? "enabled" : "disabled", + flowctrl & FLOW_CTRL_TX ? "enabled" : "disabled"); + } +@@ -1054,18 +1054,18 @@ static int mtk_phy_start(struct mtk_eth_priv *priv) + ret = phy_startup(phydev); + + if (ret) { +- debug("Could not initialize PHY %s\n", phydev->dev->name); ++printf("Could not initialize PHY %s\n", phydev->dev->name); + return ret; + } + + if (!phydev->link) { +- debug("%s: link down.\n", phydev->dev->name); ++printf("%s: link down.\n", phydev->dev->name); + return 0; + } + + mtk_phy_link_adjust(priv); + +- debug("Speed: %d, %s duplex%s\n", phydev->speed, ++printf("Speed: %d, %s duplex%s\n", phydev->speed, + (phydev->duplex) ? "full" : "half", + (phydev->port == PORT_FIBRE) ? ", fiber mode" : ""); + +@@ -1300,7 +1300,7 @@ static int mtk_eth_send(struct udevice *dev, void *packet, int length) + void *pkt_base; + + if (!priv->tx_ring_noc[idx].txd_info2.DDONE) { +- debug("mtk-eth: TX DMA descriptor ring is full\n"); ++printf("mtk-eth: TX DMA descriptor ring is full\n"); + return -EPERM; + } + +@@ -1326,7 +1326,7 @@ static int mtk_eth_recv(struct udevice *dev, int flags, uchar **packetp) + u32 length; + + if (!priv->rx_ring_noc[idx].rxd_info2.DDONE) { +- debug("mtk-eth: RX DMA descriptor ring is empty\n"); ++printf("mtk-eth: RX DMA descriptor ring is empty\n"); + return -EAGAIN; + } + +diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c +index ce5b8eed6..4b2c0a327 100644 +--- a/drivers/net/mvgbe.c ++++ b/drivers/net/mvgbe.c +@@ -117,7 +117,7 @@ static int __mvgbe_mdio_read(struct mvgbe_device *dmvgbe, int phy_adr, + + data = (u16) (MVGBE_REG_RD(MVGBE_SMI_REG) & MVGBE_PHY_SMI_DATA_MASK); + +- debug("%s:(adr %d, off %d) value= %04x\n", __func__, phy_adr, reg_ofs, ++printf("%s:(adr %d, off %d) value= %04x\n", __func__, phy_adr, reg_ofs, + data); + + return data; +@@ -652,13 +652,13 @@ static int __mvgbe_recv(struct mvgbe_device *dmvgbe, uchar **packetp) + if (timeout < MVGBE_PHY_SMI_TIMEOUT) + timeout++; + else { +- debug("%s time out...\n", __func__); ++printf("%s time out...\n", __func__); + return -1; + } + } while (readl(&p_rxdesc_curr->cmd_sts) & MVGBE_BUFFER_OWNED_BY_DMA); + + if (p_rxdesc_curr->byte_cnt != 0) { +- debug("%s: Received %d byte Packet @ 0x%x (cmd_sts= %08x)\n", ++printf("%s: Received %d byte Packet @ 0x%x (cmd_sts= %08x)\n", + __func__, (u32) p_rxdesc_curr->byte_cnt, + (u32) p_rxdesc_curr->buf_ptr, + (u32) p_rxdesc_curr->cmd_sts); +@@ -685,7 +685,7 @@ static int __mvgbe_recv(struct mvgbe_device *dmvgbe, uchar **packetp) + + } else { + /* !!! call higher layer processing */ +- debug("%s: Sending Received packet to" ++printf("%s: Sending Received packet to" + " upper layer (net_process_received_packet)\n", + __func__); + +diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c +index 4a4268c2b..f0b733f8f 100644 +--- a/drivers/net/mvneta.c ++++ b/drivers/net/mvneta.c +@@ -1173,7 +1173,7 @@ static void mvneta_adjust_link(struct udevice *dev) + int status_change = 0; + + if (mvneta_port_is_fixed_link(pp)) { +- debug("Using fixed link, skip link adjust\n"); ++printf("Using fixed link, skip link adjust\n"); + return; + } + +@@ -1810,7 +1810,7 @@ static int mvneta_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c +index d79872af0..b9340552c 100644 +--- a/drivers/net/ns8382x.c ++++ b/drivers/net/ns8382x.c +@@ -322,7 +322,7 @@ ns8382x_initialize(struct bd_info * bis) + pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); + iobase &= ~0x3; /* 1: unused and 0:I/O Space Indicator */ + +- debug("ns8382x: NatSemi dp8382x @ 0x%x\n", iobase); ++printf("ns8382x: NatSemi dp8382x @ 0x%x\n", iobase); + + pci_write_config_dword(devno, PCI_COMMAND, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); +@@ -380,8 +380,8 @@ ns8382x_initialize(struct bd_info * bis) + rev = mdio_read(dev, phyAddress, PHYIDR2); + if ((rev & ~(0x000f)) == 0x00005c50 || + (rev & ~(0x000f)) == 0x00005c60) { +- debug("phy rev is %x\n", rev); +- debug("phy address is %x\n", ++printf("phy rev is %x\n", rev); ++printf("phy address is %x\n", + phyAddress); + break; + } +@@ -412,11 +412,11 @@ ns8382x_initialize(struct bd_info * bis) + u32 chpcfg = + INL(dev, ChipConfig) ^ SpeedStatus_Polarity; + +- debug("%s: Transceiver 10%s %s duplex.\n", dev->name, ++printf("%s: Transceiver 10%s %s duplex.\n", dev->name, + (chpcfg & GigSpeed) ? "00" : (chpcfg & HundSpeed) + ? "0" : "", + chpcfg & FullDuplex ? "full" : "half"); +- debug("%s: %02x:%02x:%02x:%02x:%02x:%02x\n", dev->name, ++printf("%s: %02x:%02x:%02x:%02x:%02x:%02x\n", dev->name, + dev->enetaddr[0], dev->enetaddr[1], + dev->enetaddr[2], dev->enetaddr[3], + dev->enetaddr[4], dev->enetaddr[5]); +@@ -560,8 +560,8 @@ ns8382x_init(struct eth_device *dev, struct bd_info * bis) + | TxCollRetry | TxMxdma_1024 | (0x1002); + rx_config = RxMxdma_1024 | 0x20; + +- debug("%s: Setting TxConfig Register %#08X\n", dev->name, tx_config); +- debug("%s: Setting RxConfig Register %#08X\n", dev->name, rx_config); ++printf("%s: Setting TxConfig Register %#08X\n", dev->name, tx_config); ++printf("%s: Setting RxConfig Register %#08X\n", dev->name, rx_config); + + OUTL(dev, tx_config, TxConfig); + OUTL(dev, rx_config, RxConfig); +@@ -626,7 +626,7 @@ ns8382x_init_txd(struct eth_device *dev) + OUTL(dev, 0x0, TxRingPtrHi); + OUTL(dev, phys_to_bus((u32)&txd), TxRingPtr); + +- debug("ns8382x_init_txd: TX descriptor register loaded with: %#08X (&txd: %p)\n", ++printf("ns8382x_init_txd: TX descriptor register loaded with: %#08X (&txd: %p)\n", + INL(dev, TxRingPtr), &txd); + } + +@@ -661,7 +661,7 @@ ns8382x_init_rxd(struct eth_device *dev) + } + OUTL(dev, phys_to_bus((u32) & rxd), RxRingPtr); + +- debug("ns8382x_init_rxd: RX descriptor register loaded with: %X\n", ++printf("ns8382x_init_rxd: RX descriptor register loaded with: %X\n", + INL(dev, RxRingPtr)); + } + +@@ -701,7 +701,7 @@ ns8382x_check_duplex(struct eth_device *dev) + gig = (config & GigSpeed) ? 1 : 0; + hun = (config & HundSpeed) ? 1 : 0; + +- debug("%s: Setting 10%s %s-duplex based on negotiated link" ++printf("%s: Setting 10%s %s-duplex based on negotiated link" + " capability.\n", dev->name, (gig) ? "00" : (hun) ? "0" : "", + duplex ? "full" : "half"); + +@@ -713,8 +713,8 @@ ns8382x_check_duplex(struct eth_device *dev) + tx_config &= ~(TxCarrierIgn | TxHeartIgn); + } + +- debug("%s: Resetting TxConfig Register %#08X\n", dev->name, tx_config); +- debug("%s: Resetting RxConfig Register %#08X\n", dev->name, rx_config); ++printf("%s: Resetting TxConfig Register %#08X\n", dev->name, tx_config); ++printf("%s: Resetting RxConfig Register %#08X\n", dev->name, rx_config); + + OUTL(dev, tx_config, TxConfig); + OUTL(dev, rx_config, RxConfig); +@@ -727,7 +727,7 @@ ns8382x_check_duplex(struct eth_device *dev) + else + config &= ~Mode1000; + +- debug("%s: %setting Mode1000\n", dev->name, (gig) ? "S" : "Uns"); ++printf("%s: %setting Mode1000\n", dev->name, (gig) ? "S" : "Uns"); + + OUTL(dev, config, ChipConfig); + } +@@ -743,7 +743,7 @@ static int ns8382x_send(struct eth_device *dev, void *packet, int length) + /* Stop the transmitter */ + OUTL(dev, TxOff, ChipCmd); + +- debug("ns8382x_send: sending %d bytes\n", (int)length); ++printf("ns8382x_send: sending %d bytes\n", (int)length); + + /* set the transmit buffer descriptor and enable Transmit State Machine */ + txd.link = cpu_to_le32(0x0); +@@ -754,9 +754,9 @@ static int ns8382x_send(struct eth_device *dev, void *packet, int length) + /* load Transmit Descriptor Register */ + OUTL(dev, phys_to_bus((u32) & txd), TxRingPtr); + +- debug("ns8382x_send: TX descriptor register loaded with: %#08X\n", ++printf("ns8382x_send: TX descriptor register loaded with: %#08X\n", + INL(dev, TxRingPtr)); +- debug("\ttxd.link:%X\tbufp:%X\texsts:%X\tcmdsts:%X\n", ++printf("\ttxd.link:%X\tbufp:%X\texsts:%X\tcmdsts:%X\n", + le32_to_cpu(txd.link), le32_to_cpu(txd.bufptr), + le32_to_cpu(txd.extsts), le32_to_cpu(txd.cmdsts)); + +@@ -776,7 +776,7 @@ static int ns8382x_send(struct eth_device *dev, void *packet, int length) + goto Done; + } + +- debug("ns8382x_send: tx_stat: %#08lX\n", tx_stat); ++printf("ns8382x_send: tx_stat: %#08lX\n", tx_stat); + + status = 1; + Done: +@@ -803,7 +803,7 @@ ns8382x_poll(struct eth_device *dev) + if (!(rx_status & (u32) DescOwn)) + return retstat; + +- debug("ns8382x_poll: got a packet: cur_rx:%u, status:%lx\n", ++printf("ns8382x_poll: got a packet: cur_rx:%u, status:%lx\n", + cur_rx, rx_status); + + length = (rx_status & DSIZE) - CRC_SIZE; +diff --git a/drivers/net/octeontx/bgx.c b/drivers/net/octeontx/bgx.c +index a5c0c9fe2..fab3a00c6 100644 +--- a/drivers/net/octeontx/bgx.c ++++ b/drivers/net/octeontx/bgx.c +@@ -117,8 +117,8 @@ static int gser_poll_reg(u64 reg, int bit, u64 mask, u64 expected_val, + { + u64 reg_val; + +- debug("%s reg = %#llx, mask = %#llx,", __func__, reg, mask); +- debug(" expected_val = %#llx, bit = %d\n", expected_val, bit); ++printf("%s reg = %#llx, mask = %#llx,", __func__, reg, mask); ++printf(" expected_val = %#llx, bit = %d\n", expected_val, bit); + while (timeout) { + reg_val = readq(reg) >> bit; + if ((reg_val & mask) == (expected_val)) +@@ -131,7 +131,7 @@ static int gser_poll_reg(u64 reg, int bit, u64 mask, u64 expected_val, + + static bool is_bgx_port_valid(int bgx, int lmac) + { +- debug("%s bgx %d lmac %d valid %d\n", __func__, bgx, lmac, ++printf("%s bgx %d lmac %d valid %d\n", __func__, bgx, lmac, + bgx_board_info[bgx].lmac_reg[lmac]); + + if (bgx_board_info[bgx].lmac_reg[lmac]) +@@ -179,7 +179,7 @@ void bgx_get_count(int node, int *bgx_count) + *bgx_count = 0; + for (i = 0; i < MAX_BGX_PER_NODE; i++) { + bgx = bgx_vnic[node * MAX_BGX_PER_NODE + i]; +- debug("bgx_vnic[%u]: %p\n", node * MAX_BGX_PER_NODE + i, ++printf("bgx_vnic[%u]: %p\n", node * MAX_BGX_PER_NODE + i, + bgx); + if (bgx) + *bgx_count |= (1 << i); +@@ -289,7 +289,7 @@ static int get_qlm_for_bgx(int node, int bgx_id, int index) + } + + cfg = readq(GSERX_CFG(qlm)) & GSERX_CFG_BGX; +- debug("%s:qlm%d: cfg = %lld\n", __func__, qlm, cfg); ++printf("%s:qlm%d: cfg = %lld\n", __func__, qlm, cfg); + + /* Check if DLM is configured as BGX# */ + if (cfg) { +@@ -307,7 +307,7 @@ static int bgx_lmac_sgmii_init(struct bgx *bgx, int lmacid) + + lmac = &bgx->lmac[lmacid]; + +- debug("%s:bgx_id = %d, lmacid = %d\n", __func__, bgx->bgx_id, lmacid); ++printf("%s:bgx_id = %d, lmacid = %d\n", __func__, bgx->bgx_id, lmacid); + + bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_THRESH, 0x30); + /* max packet size */ +@@ -375,7 +375,7 @@ static int bgx_lmac_sgmii_set_link_speed(struct lmac *lmac) + struct bgx *bgx = lmac->bgx; + unsigned int lmacid = lmac->lmacid; + +- debug("%s: lmacid %d\n", __func__, lmac->lmacid); ++printf("%s: lmacid %d\n", __func__, lmac->lmacid); + + /* Disable LMAC before setting up speed */ + cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); +@@ -542,7 +542,7 @@ static int bgx_lmac_xaui_init(struct bgx *bgx, int lmacid, int lmac_type) + /* max packet size */ + bgx_reg_modify(bgx, lmacid, BGX_SMUX_RX_JABBER, MAX_FRAME_SIZE); + +- debug("xaui_init: lmacid = %d, qlm = %d, qlm_mode = %d\n", ++printf("xaui_init: lmacid = %d, qlm = %d, qlm_mode = %d\n", + lmacid, lmac->qlm, lmac->qlm_mode); + /* RXAUI with Marvell PHY requires some tweaking */ + if (lmac->qlm_mode == QLM_MODE_RXAUI) { +@@ -552,7 +552,7 @@ static int bgx_lmac_xaui_init(struct bgx *bgx, int lmacid, int lmac_type) + phy = &bgx_board_info[bgx->bgx_id].phy_info[lmacid]; + snprintf(mii_name, sizeof(mii_name), "smi%d", phy->mdio_bus); + +- debug("mii_name: %s\n", mii_name); ++printf("mii_name: %s\n", mii_name); + lmac->mii_bus = miiphy_get_dev_by_name(mii_name); + lmac->phy_addr = phy->phy_addr; + rxaui_phy_xs_init(lmac->mii_bus, lmac->phy_addr); +@@ -585,15 +585,15 @@ int __rx_equalization(int qlm, int lane) + if (lane == -1) { + if (gser_poll_reg(GSER_RX_EIE_DETSTS(qlm), GSER_CDRLOCK, 0xf, + (1 << max_lanes) - 1, 100)) { +- debug("ERROR: CDR Lock not detected"); +- debug(" on DLM%d for 2 lanes\n", qlm); ++printf("ERROR: CDR Lock not detected"); ++printf(" on DLM%d for 2 lanes\n", qlm); + return -1; + } + } else { + if (gser_poll_reg(GSER_RX_EIE_DETSTS(qlm), GSER_CDRLOCK, + (0xf & (1 << lane)), (1 << lane), 100)) { +- debug("ERROR: DLM%d: CDR Lock not detected", qlm); +- debug(" on %d lane\n", lane); ++printf("ERROR: DLM%d: CDR Lock not detected", qlm); ++printf(" on %d lane\n", lane); + return -1; + } + } +@@ -632,11 +632,11 @@ int __rx_equalization(int qlm, int lane) + writeq(rctl, GSER_BR_RXX_CTL(qlm, l)); + + if (reer & GSER_BR_RXX_EER_RXT_ESV) { +- debug("Rx equalization completed on DLM%d", qlm); +- debug(" QLM%d rxt_esm = 0x%llx\n", l, (reer & 0x3fff)); ++printf("Rx equalization completed on DLM%d", qlm); ++printf(" QLM%d rxt_esm = 0x%llx\n", l, (reer & 0x3fff)); + } else { +- debug("Rx equalization timedout on DLM%d", qlm); +- debug(" lane %d\n", l); ++printf("Rx equalization timedout on DLM%d", qlm); ++printf(" lane %d\n", l); + fail = 1; + } + } +@@ -659,18 +659,18 @@ static int bgx_xaui_check_link(struct lmac *lmac) + cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_STATUS); + if (!(cfg & SPU_AN_STS_AN_COMPLETE)) { + /* Restart autonegotiation */ +- debug("restarting auto-neg\n"); ++printf("restarting auto-neg\n"); + bgx_reg_modify(bgx, lmacid, BGX_SPUX_AN_CONTROL, + SPU_AN_CTL_AN_RESTART); + return -1; + } + } + +- debug("%s link use_training %d\n", __func__, lmac->use_training); ++printf("%s link use_training %d\n", __func__, lmac->use_training); + if (lmac->use_training) { + cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); + if (!(cfg & (1ull << 13))) { +- debug("waiting for link training\n"); ++printf("waiting for link training\n"); + /* Clear the training interrupts (W1C) */ + cfg = (1ull << 13) | (1ull << 14); + bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); +@@ -850,13 +850,13 @@ static int bgx_lmac_enable(struct bgx *bgx, int8_t lmacid) + lmac = &bgx->lmac[lmacid]; + lmac->bgx = bgx; + +- debug("%s: lmac: %p, lmacid = %d\n", __func__, lmac, lmacid); ++printf("%s: lmac: %p, lmacid = %d\n", __func__, lmac, lmacid); + + if (lmac->qlm_mode == QLM_MODE_SGMII || + lmac->qlm_mode == QLM_MODE_RGMII || + lmac->qlm_mode == QLM_MODE_QSGMII) { + if (bgx_lmac_sgmii_init(bgx, lmacid)) { +- debug("bgx_lmac_sgmii_init failed\n"); ++printf("bgx_lmac_sgmii_init failed\n"); + return -1; + } + cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); +@@ -892,7 +892,7 @@ int bgx_poll_for_link(int node, int bgx_idx, int lmacid) + return 0; + } + +- debug("%s: %d, lmac: %d/%d/%d %p\n", ++printf("%s: %d, lmac: %d/%d/%d %p\n", + __FILE__, __LINE__, + node, bgx_idx, lmacid, lmac); + if (lmac->qlm_mode == QLM_MODE_SGMII || +@@ -908,13 +908,13 @@ int bgx_poll_for_link(int node, int bgx_idx, int lmacid) + snprintf(mii_name, sizeof(mii_name), "smi%d", + bgx_board_info[bgx_idx].phy_info[lmacid].mdio_bus); + +- debug("mii_name: %s\n", mii_name); ++printf("mii_name: %s\n", mii_name); + + lmac->mii_bus = miiphy_get_dev_by_name(mii_name); + phy = &bgx_board_info[bgx_idx].phy_info[lmacid]; + lmac->phy_addr = phy->phy_addr; + +- debug("lmac->mii_bus: %p\n", lmac->mii_bus); ++printf("lmac->mii_bus: %p\n", lmac->mii_bus); + if (!lmac->mii_bus) { + printf("MDIO device %s not found\n", mii_name); + ret = -ENODEV; +@@ -938,7 +938,7 @@ int bgx_poll_for_link(int node, int bgx_idx, int lmacid) + } + + ret = phy_startup(lmac->phydev); +- debug("%s: %d\n", __FILE__, __LINE__); ++printf("%s: %d\n", __FILE__, __LINE__); + if (ret) { + printf("%s: Could not initialize PHY %s\n", + __func__, lmac->phydev->dev->name); +@@ -953,10 +953,10 @@ int bgx_poll_for_link(int node, int bgx_idx, int lmacid) + lmac->last_speed = lmac->phydev->speed; + lmac->last_duplex = lmac->phydev->duplex; + +- debug("%s qlm_mode %d phy link status 0x%x,last speed 0x%x,", ++printf("%s qlm_mode %d phy link status 0x%x,last speed 0x%x,", + __func__, lmac->qlm_mode, lmac->link_up, + lmac->last_speed); +- debug(" duplex 0x%x\n", lmac->last_duplex); ++printf(" duplex 0x%x\n", lmac->last_duplex); + + if (lmac->qlm_mode != QLM_MODE_RGMII) + bgx_lmac_sgmii_set_link_speed(lmac); +@@ -971,16 +971,16 @@ int bgx_poll_for_link(int node, int bgx_idx, int lmacid) + tx_ctl = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SMUX_TX_CTL); + rx_ctl = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SMUX_RX_CTL); + +- debug("BGX%d LMAC%d BGX_SPUX_STATUS2: %lx\n", bgx_idx, lmacid, ++printf("BGX%d LMAC%d BGX_SPUX_STATUS2: %lx\n", bgx_idx, lmacid, + (unsigned long)bgx_reg_read(lmac->bgx, lmac->lmacid, + BGX_SPUX_STATUS2)); +- debug("BGX%d LMAC%d BGX_SPUX_STATUS1: %lx\n", bgx_idx, lmacid, ++printf("BGX%d LMAC%d BGX_SPUX_STATUS1: %lx\n", bgx_idx, lmacid, + (unsigned long)bgx_reg_read(lmac->bgx, lmac->lmacid, + BGX_SPUX_STATUS1)); +- debug("BGX%d LMAC%d BGX_SMUX_RX_CTL: %lx\n", bgx_idx, lmacid, ++printf("BGX%d LMAC%d BGX_SMUX_RX_CTL: %lx\n", bgx_idx, lmacid, + (unsigned long)bgx_reg_read(lmac->bgx, lmac->lmacid, + BGX_SMUX_RX_CTL)); +- debug("BGX%d LMAC%d BGX_SMUX_TX_CTL: %lx\n", bgx_idx, lmacid, ++printf("BGX%d LMAC%d BGX_SMUX_TX_CTL: %lx\n", bgx_idx, lmacid, + (unsigned long)bgx_reg_read(lmac->bgx, lmac->lmacid, + BGX_SMUX_TX_CTL)); + +@@ -1042,7 +1042,7 @@ static void bgx_init_hw(struct bgx *bgx) + struct lmac *tlmac; + + lmac = &bgx->lmac[lmacid]; +- debug("%s: lmacid = %d, qlm = %d, mode = %d\n", ++printf("%s: lmacid = %d, qlm = %d, mode = %d\n", + __func__, lmacid, lmac->qlm, lmac->qlm_mode); + /* If QLM is not programmed, skip */ + if (lmac->qlm == -1) +@@ -1292,7 +1292,7 @@ static void bgx_get_qlm_mode(struct bgx *bgx) + + lmac_type = bgx_reg_read(bgx, index, BGX_CMRX_CFG); + lmac->lmac_type = (lmac_type >> 8) & 0x07; +- debug("%s:%d:%d: lmac_type = %d, altpkg = %d\n", __func__, ++printf("%s:%d:%d: lmac_type = %d, altpkg = %d\n", __func__, + bgx->bgx_id, lmacid, lmac->lmac_type, otx_is_altpkg()); + + train_en = (readq(GSERX_SCRATCH(lmac->qlm))) & 0xf; +@@ -1304,7 +1304,7 @@ static void bgx_get_qlm_mode(struct bgx *bgx) + if (bgx->is_rgx) { + if (lmacid == 0) { + lmac->qlm_mode = QLM_MODE_RGMII; +- debug("BGX%d LMAC%d mode: RGMII\n", ++printf("BGX%d LMAC%d mode: RGMII\n", + bgx->bgx_id, lmacid); + } + continue; +@@ -1314,7 +1314,7 @@ static void bgx_get_qlm_mode(struct bgx *bgx) + continue; + } + lmac->qlm_mode = QLM_MODE_SGMII; +- debug("BGX%d QLM%d LMAC%d mode: %s\n", ++printf("BGX%d QLM%d LMAC%d mode: %s\n", + bgx->bgx_id, lmac->qlm, lmacid, + lmac->is_1gx ? "1000Base-X" : "SGMII"); + } +@@ -1325,7 +1325,7 @@ static void bgx_get_qlm_mode(struct bgx *bgx) + lmac->qlm_mode = QLM_MODE_XAUI; + if (lmacid != 0) + continue; +- debug("BGX%d QLM%d LMAC%d mode: XAUI\n", ++printf("BGX%d QLM%d LMAC%d mode: XAUI\n", + bgx->bgx_id, lmac->qlm, lmacid); + break; + case BGX_MODE_RXAUI: +@@ -1333,7 +1333,7 @@ static void bgx_get_qlm_mode(struct bgx *bgx) + continue; + lmac->qlm_mode = QLM_MODE_RXAUI; + if (index == lmacid) { +- debug("BGX%d QLM%d LMAC%d mode: RXAUI\n", ++printf("BGX%d QLM%d LMAC%d mode: RXAUI\n", + bgx->bgx_id, lmac->qlm, (index ? 1 : 0)); + } + break; +@@ -1345,11 +1345,11 @@ static void bgx_get_qlm_mode(struct bgx *bgx) + if ((lmacid < 2 && (train_en & (1 << lmacid))) || + (train_en & (1 << (lmacid - 2)))) { + lmac->qlm_mode = QLM_MODE_10G_KR; +- debug("BGX%d QLM%d LMAC%d mode: 10G_KR\n", ++printf("BGX%d QLM%d LMAC%d mode: 10G_KR\n", + bgx->bgx_id, lmac->qlm, lmacid); + } else { + lmac->qlm_mode = QLM_MODE_XFI; +- debug("BGX%d QLM%d LMAC%d mode: XFI\n", ++printf("BGX%d QLM%d LMAC%d mode: XFI\n", + bgx->bgx_id, lmac->qlm, lmacid); + } + break; +@@ -1360,13 +1360,13 @@ static void bgx_get_qlm_mode(struct bgx *bgx) + lmac->qlm_mode = QLM_MODE_40G_KR4; + if (lmacid != 0) + break; +- debug("BGX%d QLM%d LMAC%d mode: 40G_KR4\n", ++printf("BGX%d QLM%d LMAC%d mode: 40G_KR4\n", + bgx->bgx_id, lmac->qlm, lmacid); + } else { + lmac->qlm_mode = QLM_MODE_XLAUI; + if (lmacid != 0) + break; +- debug("BGX%d QLM%d LMAC%d mode: XLAUI\n", ++printf("BGX%d QLM%d LMAC%d mode: XLAUI\n", + bgx->bgx_id, lmac->qlm, lmacid); + } + break; +@@ -1380,7 +1380,7 @@ static void bgx_get_qlm_mode(struct bgx *bgx) + + if (lmacid == 0 || lmacid == 2) { + lmac->qlm_mode = QLM_MODE_QSGMII; +- debug("BGX%d QLM%d LMAC%d mode: QSGMII\n", ++printf("BGX%d QLM%d LMAC%d mode: QSGMII\n", + bgx->bgx_id, lmac->qlm, lmacid); + } + break; +@@ -1402,13 +1402,13 @@ void bgx_set_board_info(int bgx_id, int *mdio_bus, + bgx_board_info[bgx_id].phy_info[i].autoneg_dis = autoneg_dis[i]; + bgx_board_info[bgx_id].lmac_reg[i] = lmac_reg[i]; + bgx_board_info[bgx_id].lmac_enable[i] = lmac_enable[i]; +- debug("%s bgx_id %d lmac %d\n", __func__, bgx_id, i); +- debug("phy addr %x mdio bus %d autoneg_dis %d lmac_reg %d\n", ++printf("%s bgx_id %d lmac %d\n", __func__, bgx_id, i); ++printf("phy addr %x mdio bus %d autoneg_dis %d lmac_reg %d\n", + bgx_board_info[bgx_id].phy_info[i].phy_addr, + bgx_board_info[bgx_id].phy_info[i].mdio_bus, + bgx_board_info[bgx_id].phy_info[i].autoneg_dis, + bgx_board_info[bgx_id].lmac_reg[i]); +- debug("lmac_enable = %x\n", ++printf("lmac_enable = %x\n", + bgx_board_info[bgx_id].lmac_enable[i]); + } + } +@@ -1442,7 +1442,7 @@ int octeontx_bgx_remove(struct udevice *dev) + bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, cfg); + } + +- debug("%s disabling bgx%d lmacid%d\n", __func__, bgx->bgx_id, ++printf("%s disabling bgx%d lmacid%d\n", __func__, bgx->bgx_id, + lmacid); + bgx_lmac_disable(bgx, lmacid); + } +@@ -1461,7 +1461,7 @@ int octeontx_bgx_probe(struct udevice *dev) + bgx->reg_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, + PCI_REGION_MEM); + if (!bgx->reg_base) { +- debug("No PCI region found\n"); ++printf("No PCI region found\n"); + return 0; + } + +@@ -1501,7 +1501,7 @@ int octeontx_bgx_probe(struct udevice *dev) + */ + if (inc == 2) + qlm[lmac + 1] = qlm[lmac]; +- debug("qlm[%d] = %d\n", lmac, qlm[lmac]); ++printf("qlm[%d] = %d\n", lmac, qlm[lmac]); + } + + /* A BGX can take 1 or 2 DLMs, if both the DLMs are not configured +@@ -1522,7 +1522,7 @@ skip_qlm_config: + #endif + bgx_vnic[bgx->bgx_id] = bgx; + bgx_get_qlm_mode(bgx); +- debug("bgx_vnic[%u]: %p\n", bgx->bgx_id, bgx); ++printf("bgx_vnic[%u]: %p\n", bgx->bgx_id, bgx); + + bgx_init_hw(bgx); + +diff --git a/drivers/net/octeontx/nic_main.c b/drivers/net/octeontx/nic_main.c +index 8f05d4e72..22e8fe4b7 100644 +--- a/drivers/net/octeontx/nic_main.c ++++ b/drivers/net/octeontx/nic_main.c +@@ -98,7 +98,7 @@ static void nic_mbx_send_ready(struct nicpf *nic, int vf) + + while (timeout-- && (link <= 0)) { + link = bgx_poll_for_link(nic->node, bgx_idx, lmac); +- debug("Link status: %d\n", link); ++printf("Link status: %d\n", link); + if (link <= 0) + mdelay(2000); + } +@@ -174,7 +174,7 @@ void nic_handle_mbx_intr(struct nicpf *nic, int vf) + mbx_addr += sizeof(u64); + } + +- debug("%s: Mailbox msg %d from VF%d\n", __func__, mbx.msg.msg, vf); ++printf("%s: Mailbox msg %d from VF%d\n", __func__, mbx.msg.msg, vf); + switch (mbx.msg.msg) { + case NIC_MBOX_MSG_READY: + nic_mbx_send_ready(nic, vf); +@@ -397,14 +397,14 @@ static void nic_set_lmac_vf_mapping(struct nicpf *nic) + } + + bgx_get_count(nic->node, &bgx_count); +- debug("bgx_count: %d\n", bgx_count); ++printf("bgx_count: %d\n", bgx_count); + + for (bgx = 0; bgx < nic->hw->bgx_cnt; bgx++) { + if (!(bgx_count & (1 << bgx))) + continue; + nic->bgx_cnt++; + lmac_cnt = bgx_get_lmac_count(nic->node, bgx); +- debug("lmac_cnt: %d for BGX%d\n", lmac_cnt, bgx); ++printf("lmac_cnt: %d for BGX%d\n", lmac_cnt, bgx); + for (lmac = 0; lmac < lmac_cnt; lmac++) + nic->vf_lmac_map[next_bgx_lmac++] = + NIC_SET_VF_LMAC_MAP(bgx, lmac); +diff --git a/drivers/net/octeontx/nicvf_main.c b/drivers/net/octeontx/nicvf_main.c +index c30ba49c2..617ebdd93 100644 +--- a/drivers/net/octeontx/nicvf_main.c ++++ b/drivers/net/octeontx/nicvf_main.c +@@ -119,7 +119,7 @@ static void nicvf_handle_mbx_intr(struct nicvf *nic) + mbx_addr += sizeof(u64); + } + +- debug("Mbox message: msg: 0x%x\n", mbx.msg.msg); ++printf("Mbox message: msg: 0x%x\n", mbx.msg.msg); + switch (mbx.msg.msg) { + case NIC_MBOX_MSG_READY: + nic->pf_acked = true; +@@ -241,7 +241,7 @@ static int nicvf_rcv_pkt_handler(struct nicvf *nic, + + pkt = nicvf_get_rcv_pkt(nic, cq_desc, &pkt_len); + if (!pkt) { +- debug("Packet not received\n"); ++printf("Packet not received\n"); + return -1; + } + +@@ -284,18 +284,18 @@ int nicvf_cq_handler(struct nicvf *nic, void **ppkt, int *pkt_len) + + switch (cq_desc->cqe_type) { + case CQE_TYPE_RX: +- debug("%s: Got Rx CQE\n", nic->dev->name); ++printf("%s: Got Rx CQE\n", nic->dev->name); + *pkt_len = nicvf_rcv_pkt_handler(nic, cq, cq_desc, + ppkt, CQE_TYPE_RX); + processed_rq_cqe++; + break; + case CQE_TYPE_SEND: +- debug("%s: Got Tx CQE\n", nic->dev->name); ++printf("%s: Got Tx CQE\n", nic->dev->name); + nicvf_snd_pkt_handler(nic, cq, cq_desc, CQE_TYPE_SEND); + processed_sq_cqe++; + break; + default: +- debug("%s: Got CQ type %u\n", nic->dev->name, ++printf("%s: Got CQ type %u\n", nic->dev->name, + cq_desc->cqe_type); + break; + } +@@ -362,7 +362,7 @@ static int nicvf_xmit(struct udevice *dev, void *pkt, int pkt_len) + while (!ret && timeout--) { + ret = nicvf_cq_handler(nic, &rpkt, &rcv_len); + if (!ret) { +- debug("%s: %d, Not sent\n", __func__, __LINE__); ++printf("%s: %d, Not sent\n", __func__, __LINE__); + udelay(10); + } + } +@@ -455,11 +455,11 @@ int nicvf_write_hwaddr(struct udevice *dev) + if (!eth_env_get_enetaddr_by_index("eth", dev_seq(dev), ethaddr)) { + eth_env_set_enetaddr_by_index("eth", dev_seq(dev), + pdata->enetaddr); +- debug("%s: pMAC %pM\n", __func__, pdata->enetaddr); ++printf("%s: pMAC %pM\n", __func__, pdata->enetaddr); + } + eth_env_get_enetaddr_by_index("eth", dev_seq(dev), ethaddr); + if (memcmp(ethaddr, pdata->enetaddr, ARP_HLEN)) { +- debug("%s: pMAC %pM\n", __func__, pdata->enetaddr); ++printf("%s: pMAC %pM\n", __func__, pdata->enetaddr); + nicvf_hw_set_mac_addr(nic, dev); + } + return 0; +@@ -478,7 +478,7 @@ static void nicvf_probe_mdio_devices(void) + PCI_DEVICE_ID_CAVIUM_SMI, 0, + &pdev); + if (err) +- debug("%s couldn't find SMI device\n", __func__); ++printf("%s couldn't find SMI device\n", __func__); + probed = 1; + } + +@@ -512,7 +512,7 @@ int nicvf_initialize(struct udevice *dev) + nicvf->reg_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, + PCI_REGION_MEM); + +- debug("nicvf->reg_base: %p\n", nicvf->reg_base); ++printf("nicvf->reg_base: %p\n", nicvf->reg_base); + + if (!nicvf->reg_base) { + printf("Cannot map config register space, aborting\n"); +@@ -525,25 +525,25 @@ int nicvf_initialize(struct udevice *dev) + return -1; + + sprintf(name, "vnic%u", nicvf->vf_id); +- debug("%s name %s\n", __func__, name); ++printf("%s name %s\n", __func__, name); + device_set_name(dev, name); + + bgx = NIC_GET_BGX_FROM_VF_LMAC_MAP(pf->vf_lmac_map[nicvf->vf_id]); + lmac = NIC_GET_LMAC_FROM_VF_LMAC_MAP(pf->vf_lmac_map[nicvf->vf_id]); +- debug("%s VF %d BGX %d LMAC %d\n", __func__, nicvf->vf_id, bgx, lmac); +- debug("%s PF %p pfdev %p VF %p vfdev %p vf->pdata %p\n", ++printf("%s VF %d BGX %d LMAC %d\n", __func__, nicvf->vf_id, bgx, lmac); ++printf("%s PF %p pfdev %p VF %p vfdev %p vf->pdata %p\n", + __func__, nicvf->nicpf, nicvf->nicpf->udev, nicvf, nicvf->dev, + pdata); + + fdt_board_get_ethaddr(bgx, lmac, ethaddr); + +- debug("%s bgx %d lmac %d ethaddr %pM\n", __func__, bgx, lmac, ethaddr); ++printf("%s bgx %d lmac %d ethaddr %pM\n", __func__, bgx, lmac, ethaddr); + + if (is_valid_ethaddr(ethaddr)) { + memcpy(pdata->enetaddr, ethaddr, ARP_HLEN); + eth_env_set_enetaddr_by_index("eth", dev_seq(dev), ethaddr); + } +- debug("%s enetaddr %pM ethaddr %pM\n", __func__, ++printf("%s enetaddr %pM ethaddr %pM\n", __func__, + pdata->enetaddr, ethaddr); + + fail: +diff --git a/drivers/net/octeontx/nicvf_queues.c b/drivers/net/octeontx/nicvf_queues.c +index c7f262f44..7eec19ce1 100644 +--- a/drivers/net/octeontx/nicvf_queues.c ++++ b/drivers/net/octeontx/nicvf_queues.c +@@ -91,7 +91,7 @@ static int nicvf_init_rbdr(struct nicvf *nic, struct rbdr *rbdr, + rbdr->enable = true; + rbdr->thresh = RBDR_THRESH; + +- debug("%s: %d: allocating %lld bytes for rcv buffers\n", ++printf("%s: %d: allocating %lld bytes for rcv buffers\n", + __func__, __LINE__, + ring_len * buf_size + NICVF_RCV_BUF_ALIGN_BYTES); + rbdr->buf_mem = (uintptr_t)calloc(1, ring_len * buf_size +@@ -105,7 +105,7 @@ static int nicvf_init_rbdr(struct nicvf *nic, struct rbdr *rbdr, + rbdr->buffers = NICVF_ALIGNED_ADDR(rbdr->buf_mem, + NICVF_RCV_BUF_ALIGN_BYTES); + +- debug("%s: %d: rbdr->buf_mem: %lx, rbdr->buffers: %lx\n", ++printf("%s: %d: rbdr->buf_mem: %lx, rbdr->buffers: %lx\n", + __func__, __LINE__, rbdr->buf_mem, rbdr->buffers); + + for (idx = 0; idx < ring_len; idx++) { +@@ -127,7 +127,7 @@ static void nicvf_free_rbdr(struct nicvf *nic, struct rbdr *rbdr) + if (!rbdr->dmem.base) + return; + +- debug("%s: %d: rbdr->buf_mem: %p\n", __func__, ++printf("%s: %d: rbdr->buf_mem: %p\n", __func__, + __LINE__, (void *)rbdr->buf_mem); + free((void *)rbdr->buf_mem); + +@@ -164,7 +164,7 @@ void nicvf_refill_rbdr(struct nicvf *nic) + + rb_cnt = qs->rbdr_len - qcount - 1; + +- debug("%s: %d: qcount: %lu, head: %lx, tail: %lx, rb_cnt: %lu\n", ++printf("%s: %d: qcount: %lu, head: %lx, tail: %lx, rb_cnt: %lu\n", + __func__, __LINE__, qcount, head, tail, rb_cnt); + + /* Notify HW */ +@@ -232,7 +232,7 @@ static void nicvf_free_snd_queue(struct nicvf *nic, struct snd_queue *sq) + if (!sq->dmem.base) + return; + +- debug("%s: %d\n", __func__, __LINE__); ++printf("%s: %d\n", __func__, __LINE__); + free(sq->skbuff); + + nicvf_free_q_desc_mem(nic, &sq->dmem); +@@ -869,7 +869,7 @@ void *nicvf_get_rcv_pkt(struct nicvf *nic, void *cq_desc, size_t *pkt_len) + return NULL; + } + pkt_buf = buffer; +- debug("total pkt buf %p len %ld tot_len %d\n", pkt_buf, *pkt_len, ++printf("total pkt buf %p len %ld tot_len %d\n", pkt_buf, *pkt_len, + tot_len); + for (frag = 0; frag < cqe_rx->rb_cnt; frag++) { + payload_len = rb_lens[frag_num(frag)]; +@@ -887,7 +887,7 @@ void *nicvf_get_rcv_pkt(struct nicvf *nic, void *cq_desc, size_t *pkt_len) + + if (cqe_rx->align_pad) + pkt += cqe_rx->align_pad; +- debug("pkt_buf %p, pkt %p payload_len %d\n", pkt_buf, pkt, ++printf("pkt_buf %p, pkt %p payload_len %d\n", pkt_buf, pkt, + payload_len); + memcpy(buffer, pkt, payload_len); + buffer += payload_len; +diff --git a/drivers/net/octeontx/smi.c b/drivers/net/octeontx/smi.c +index d70fa820c..e6bc502a2 100644 +--- a/drivers/net/octeontx/smi.c ++++ b/drivers/net/octeontx/smi.c +@@ -150,7 +150,7 @@ int octeontx_phy_read(struct mii_dev *bus, int addr, int devad, int regnum) + + enum octeontx_smi_mode mode = (devad < 0) ? CLAUSE22 : CLAUSE45; + +- debug("RD: Mode: %u, baseaddr: %p, addr: %d, devad: %d, reg: %d\n", ++printf("RD: Mode: %u, baseaddr: %p, addr: %d, devad: %d, reg: %d\n", + mode, priv->baseaddr, addr, devad, regnum); + + octeontx_smi_setmode(bus, mode); +@@ -158,7 +158,7 @@ int octeontx_phy_read(struct mii_dev *bus, int addr, int devad, int regnum) + if (mode == CLAUSE45) { + ret = octeontx_c45_addr(bus, addr, devad, regnum); + +- debug("RD: ret: %u\n", ret); ++printf("RD: ret: %u\n", ret); + + if (ret) + return 0; +@@ -183,7 +183,7 @@ int octeontx_phy_read(struct mii_dev *bus, int addr, int devad, int regnum) + timeout--; + } while (smix_rd_dat.s.pending && timeout); + +- debug("SMIX_RD_DAT: %lx\n", (unsigned long)smix_rd_dat.u); ++printf("SMIX_RD_DAT: %lx\n", (unsigned long)smix_rd_dat.u); + + return smix_rd_dat.s.dat; + } +@@ -199,13 +199,13 @@ int octeontx_phy_write(struct mii_dev *bus, int addr, int devad, int regnum, + + enum octeontx_smi_mode mode = (devad < 0) ? CLAUSE22 : CLAUSE45; + +- debug("WR: Mode: %u, baseaddr: %p, addr: %d, devad: %d, reg: %d\n", ++printf("WR: Mode: %u, baseaddr: %p, addr: %d, devad: %d, reg: %d\n", + mode, priv->baseaddr, addr, devad, regnum); + + if (mode == CLAUSE45) { + ret = octeontx_c45_addr(bus, addr, devad, regnum); + +- debug("WR: ret: %u\n", ret); ++printf("WR: ret: %u\n", ret); + + if (ret) + return ret; +@@ -235,7 +235,7 @@ int octeontx_phy_write(struct mii_dev *bus, int addr, int devad, int regnum, + timeout--; + } while (smix_wr_dat.s.pending && timeout); + +- debug("SMIX_WR_DAT: %lx\n", (unsigned long)smix_wr_dat.u); ++printf("SMIX_WR_DAT: %lx\n", (unsigned long)smix_wr_dat.u); + + return timeout == 0; + } +@@ -270,15 +270,15 @@ int rxaui_phy_xs_init(struct mii_dev *bus, int phy_addr) + phy_id1 = octeontx_phy_read(bus, phy_addr, 1, 0x2); + phy_id2 = octeontx_phy_read(bus, phy_addr, 1, 0x3); + model_number = (phy_id2 >> 4) & 0x3F; +- debug("%s model %x\n", __func__, model_number); ++printf("%s model %x\n", __func__, model_number); + oui = phy_id1; + oui <<= 6; + oui |= (phy_id2 >> 10) & 0x3F; +- debug("%s oui %x\n", __func__, oui); ++printf("%s oui %x\n", __func__, oui); + switch (oui) { + case 0x5016: + if (model_number == 9) { +- debug("%s +\n", __func__); ++printf("%s +\n", __func__); + /* Perform hardware reset in XGXS control */ + reg = octeontx_phy_read(bus, phy_addr, 4, 0x0); + if ((reg & 0xffff) < 0) +@@ -308,7 +308,7 @@ int rxaui_phy_xs_init(struct mii_dev *bus, int phy_addr) + return 0; + + read_error: +- debug("M88X3120 PHY config read failed\n"); ++printf("M88X3120 PHY config read failed\n"); + return -1; + } + +@@ -321,7 +321,7 @@ int octeontx_smi_probe(struct udevice *dev) + ofnode subnode; + u64 baseaddr; + +- debug("SMI PCI device: %x\n", bdf); ++printf("SMI PCI device: %x\n", bdf); + if (!dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM)) { + printf("Failed to map PCI region for bdf %x\n", bdf); + return -1; +@@ -348,7 +348,7 @@ int octeontx_smi_probe(struct udevice *dev) + + priv->mode = CLAUSE22; + priv->baseaddr = (void __iomem *)baseaddr; +- debug("mdio base addr %p\n", priv->baseaddr); ++printf("mdio base addr %p\n", priv->baseaddr); + + /* use given name or generate its own unique name */ + snprintf(bus->name, MDIO_NAME_LEN, "smi%d", cnt++); +diff --git a/drivers/net/octeontx2/cgx.c b/drivers/net/octeontx2/cgx.c +index 189fe7c63..6456034b9 100644 +--- a/drivers/net/octeontx2/cgx.c ++++ b/drivers/net/octeontx2/cgx.c +@@ -68,7 +68,7 @@ struct lmac *nix_get_cgx_lmac(int lmac_instance) + continue; + + cgx = dev_get_priv(dev); +- debug("%s udev %p cgx %p instance %d\n", __func__, dev, cgx, ++printf("%s udev %p cgx %p instance %d\n", __func__, dev, cgx, + lmac_instance); + for (idx = 0; idx < cgx->lmac_count; idx++) { + if (cgx->lmac[idx]->instance == lmac_instance) +@@ -88,7 +88,7 @@ void cgx_lmac_mac_filter_clear(struct lmac *lmac) + reg_addr = lmac->cgx->reg_base + + CGXX_CMR_RX_DMACX_CAM0(lmac->lmac_id * 8); + writeq(dmac_cam0.u, reg_addr); +- debug("%s: reg %p dmac_cam0 %llx\n", __func__, reg_addr, dmac_cam0.u); ++printf("%s: reg %p dmac_cam0 %llx\n", __func__, reg_addr, dmac_cam0.u); + + dmac_ctl0.u = 0x0; + dmac_ctl0.s.bcst_accept = 1; +@@ -97,7 +97,7 @@ void cgx_lmac_mac_filter_clear(struct lmac *lmac) + reg_addr = lmac->cgx->reg_base + + CGXX_CMRX_RX_DMAC_CTL0(lmac->lmac_id); + writeq(dmac_ctl0.u, reg_addr); +- debug("%s: reg %p dmac_ctl0 %llx\n", __func__, reg_addr, dmac_ctl0.u); ++printf("%s: reg %p dmac_ctl0 %llx\n", __func__, reg_addr, dmac_ctl0.u); + } + + void cgx_lmac_mac_filter_setup(struct lmac *lmac) +@@ -108,10 +108,10 @@ void cgx_lmac_mac_filter_setup(struct lmac *lmac) + void *reg_addr; + + memcpy((void *)&tmp, lmac->mac_addr, 6); +- debug("%s: tmp %llx\n", __func__, tmp); +- debug("%s: swab tmp %llx\n", __func__, swab64(tmp)); ++printf("%s: tmp %llx\n", __func__, tmp); ++printf("%s: swab tmp %llx\n", __func__, swab64(tmp)); + mac = swab64(tmp) >> 16; +- debug("%s: mac %llx\n", __func__, mac); ++printf("%s: mac %llx\n", __func__, mac); + dmac_cam0.u = 0x0; + dmac_cam0.s.id = lmac->lmac_id; + dmac_cam0.s.adr = mac; +@@ -119,7 +119,7 @@ void cgx_lmac_mac_filter_setup(struct lmac *lmac) + reg_addr = lmac->cgx->reg_base + + CGXX_CMR_RX_DMACX_CAM0(lmac->lmac_id * 8); + writeq(dmac_cam0.u, reg_addr); +- debug("%s: reg %p dmac_cam0 %llx\n", __func__, reg_addr, dmac_cam0.u); ++printf("%s: reg %p dmac_cam0 %llx\n", __func__, reg_addr, dmac_cam0.u); + dmac_ctl0.u = 0x0; + dmac_ctl0.s.bcst_accept = 1; + dmac_ctl0.s.mcst_mode = 0; +@@ -127,7 +127,7 @@ void cgx_lmac_mac_filter_setup(struct lmac *lmac) + reg_addr = lmac->cgx->reg_base + + CGXX_CMRX_RX_DMAC_CTL0(lmac->lmac_id); + writeq(dmac_ctl0.u, reg_addr); +- debug("%s: reg %p dmac_ctl0 %llx\n", __func__, reg_addr, dmac_ctl0.u); ++printf("%s: reg %p dmac_ctl0 %llx\n", __func__, reg_addr, dmac_ctl0.u); + } + + int cgx_lmac_set_pkind(struct lmac *lmac, u8 lmac_id, int pkind) +@@ -143,7 +143,7 @@ int cgx_lmac_link_status(struct lmac *lmac, int lmac_id, u64 *status) + + ret = cgx_intf_get_link_sts(lmac->cgx->cgx_id, lmac_id, status); + if (ret) { +- debug("%s request failed for cgx%d lmac%d\n", ++printf("%s request failed for cgx%d lmac%d\n", + __func__, lmac->cgx->cgx_id, lmac->lmac_id); + ret = -1; + } +@@ -173,7 +173,7 @@ int cgx_lmac_link_enable(struct lmac *lmac, int lmac_id, bool enable, + ret = cgx_intf_link_up_dwn(lmac->cgx->cgx_id, lmac_id, enable, + status); + if (ret) { +- debug("%s request failed for cgx%d lmac%d\n", ++printf("%s request failed for cgx%d lmac%d\n", + __func__, lmac->cgx->cgx_id, lmac->lmac_id); + ret = -1; + } +@@ -217,7 +217,7 @@ static int cgx_lmac_init(struct cgx *cgx) + int i; + + cgx->lmac_count = cgx_read(cgx, 0, CGXX_CMR_RX_LMACS()); +- debug("%s: Found %d lmacs for cgx %d@%p\n", __func__, cgx->lmac_count, ++printf("%s: Found %d lmacs for cgx %d@%p\n", __func__, cgx->lmac_count, + cgx->cgx_id, cgx->reg_base); + + for (i = 0; i < cgx->lmac_count; i++) { +@@ -234,7 +234,7 @@ static int cgx_lmac_init(struct cgx *cgx) + lmac->lmac_id = i; + lmac->cgx = cgx; + cgx->lmac[i] = lmac; +- debug("%s: map id %d to lmac %p (%s), type:%d instance %d\n", ++printf("%s: map id %d to lmac %p (%s), type:%d instance %d\n", + __func__, i, lmac, lmac->name, lmac->lmac_type, + lmac->instance); + lmac->init_pend = 1; +@@ -242,7 +242,7 @@ static int cgx_lmac_init(struct cgx *cgx) + lmac->lmac_id, lmac_type_to_str[lmac->lmac_type]); + octeontx2_board_get_mac_addr((lmac->instance - 1), + lmac->mac_addr); +- debug("%s: MAC %pM\n", __func__, lmac->mac_addr); ++printf("%s: MAC %pM\n", __func__, lmac->mac_addr); + cgx_lmac_mac_filter_setup(lmac); + } + return 0; +@@ -258,9 +258,9 @@ int cgx_probe(struct udevice *dev) + cgx->dev = dev; + cgx->cgx_id = ((u64)(cgx->reg_base) >> 24) & 0x7; + +- debug("%s CGX BAR %p, id: %d\n", __func__, cgx->reg_base, ++printf("%s CGX BAR %p, id: %d\n", __func__, cgx->reg_base, + cgx->cgx_id); +- debug("%s CGX %p, udev: %p\n", __func__, cgx, dev); ++printf("%s CGX %p, udev: %p\n", __func__, cgx, dev); + + err = cgx_lmac_init(cgx); + +@@ -272,7 +272,7 @@ int cgx_remove(struct udevice *dev) + struct cgx *cgx = dev_get_priv(dev); + int i; + +- debug("%s: cgx remove reg_base %p cgx_id %d", ++printf("%s: cgx remove reg_base %p cgx_id %d", + __func__, cgx->reg_base, cgx->cgx_id); + for (i = 0; i < cgx->lmac_count; i++) + cgx_lmac_mac_filter_clear(cgx->lmac[i]); +diff --git a/drivers/net/octeontx2/cgx_intf.c b/drivers/net/octeontx2/cgx_intf.c +index 37d9a2bb7..96537f30c 100644 +--- a/drivers/net/octeontx2/cgx_intf.c ++++ b/drivers/net/octeontx2/cgx_intf.c +@@ -93,7 +93,7 @@ static int wait_for_ownership(u8 cgx, u8 lmac) + } + + if (timeout-- < 0) { +- debug("timeout waiting for ownership\n"); ++printf("timeout waiting for ownership\n"); + return -ETIMEDOUT; + } + mdelay(1); +@@ -139,7 +139,7 @@ int cgx_intf_req(u8 cgx, u8 lmac, union cgx_cmd_s cmd_args, u64 *rsp, + } while (timeout-- && (!scr0.s.evt_sts.ack) && + (scr1.s.own_status == CGX_OWN_FIRMWARE)); + if (timeout < 0) { +- debug("%s timeout waiting for ack\n", __func__); ++printf("%s timeout waiting for ack\n", __func__); + err = -ETIMEDOUT; + goto error; + } +@@ -148,19 +148,19 @@ int cgx_intf_req(u8 cgx, u8 lmac, union cgx_cmd_s cmd_args, u64 *rsp, + goto error; + + if (scr0.s.evt_sts.evt_type != CGX_EVT_CMD_RESP) { +- debug("%s received async event instead of cmd resp event\n", ++printf("%s received async event instead of cmd resp event\n", + __func__); + err = -1; + goto error; + } + if (scr0.s.evt_sts.id != cmd) { +- debug("%s received resp for cmd %d expected cmd %d\n", ++printf("%s received resp for cmd %d expected cmd %d\n", + __func__, scr0.s.evt_sts.id, cmd); + err = -1; + goto error; + } + if (scr0.s.evt_sts.stat != CGX_STAT_SUCCESS) { +- debug("%s cmd%d failed on cgx%u lmac%u with errcode %d\n", ++printf("%s cmd%d failed on cgx%u lmac%u with errcode %d\n", + __func__, cmd, cgx, lmac, scr0.s.link_sts.err_type); + err = -1; + } +diff --git a/drivers/net/octeontx2/nix.c b/drivers/net/octeontx2/nix.c +index 039c44b65..37d63d519 100644 +--- a/drivers/net/octeontx2/nix.c ++++ b/drivers/net/octeontx2/nix.c +@@ -50,7 +50,7 @@ static void *nix_memalloc(int num_elements, size_t elem_size, const char *msg) + else + memset(base, 0, alloc_size); + +- debug("NIX: Memory alloc for %s (%d * %zu = %zu bytes) at %p\n", ++printf("NIX: Memory alloc for %s (%d * %zu = %zu bytes) at %p\n", + msg ? msg : __func__, num_elements, elem_size, alloc_size, base); + return base; + } +@@ -85,7 +85,7 @@ static int npa_setup_pool(struct npa *npa, u32 pool_id, + __func__, index, buffer_size); + return -ENOMEM; + } +- debug("%s: allocating buffer %d, addr %p size: %zu\n", ++printf("%s: allocating buffer %d, addr %p size: %zu\n", + __func__, index, buffers[index], buffer_size); + + /* Add the newly obtained pointer to the pool. 128 bit +@@ -183,11 +183,11 @@ int npa_lf_setup(struct nix *nix) + for (idx = 0; idx < NPA_POOL_COUNT; idx++) { + aura = npa->aura_ctx + (idx * sizeof(union npa_aura_s)); + pool = npa->pool_ctx[idx]; +- debug("%s aura %p pool %p\n", __func__, aura, pool); ++printf("%s aura %p pool %p\n", __func__, aura, pool); + memset(aura, 0, sizeof(union npa_aura_s)); + aura->s.fc_ena = 0; + aura->s.pool_addr = (u64)npa->pool_ctx[idx]; +- debug("%s aura.s.pool_addr %llx pool_addr %p\n", __func__, ++printf("%s aura.s.pool_addr %llx pool_addr %p\n", __func__, + aura->s.pool_addr, npa->pool_ctx[idx]); + aura->s.shift = 64 - __builtin_clzll(npa->q_len[idx]) - 8; + aura->s.count = npa->q_len[idx]; +@@ -201,7 +201,7 @@ int npa_lf_setup(struct nix *nix) + pool->s.fc_ena = 0; + pool->s.nat_align = 1; + pool->s.stack_base = (u64)(npa->pool_stack[idx]); +- debug("%s pool.s.stack_base %llx stack_base %p\n", __func__, ++printf("%s pool.s.stack_base %llx stack_base %p\n", __func__, + pool->s.stack_base, npa->pool_stack[idx]); + pool->s.buf_size = + npa->buf_size[idx] / CONFIG_SYS_CACHELINE_SIZE; +@@ -371,7 +371,7 @@ int nix_lf_shutdown(struct nix *nix) + for (index = 0; index < NIX_CQ_COUNT; index++) + qmem_free(&nix->cq[index]); + +- debug("%s: nix lf %d reset --\n", __func__, nix->lf); ++printf("%s: nix lf %d reset --\n", __func__, nix->lf); + return 0; + } + +@@ -384,7 +384,7 @@ struct nix *nix_lf_alloc(struct udevice *dev) + union rvu_pf_func_s pf_func; + int err; + +- debug("%s(%s )\n", __func__, dev->name); ++printf("%s(%s )\n", __func__, dev->name); + + nix = (struct nix *)calloc(1, sizeof(*nix)); + if (!nix) { +@@ -432,9 +432,9 @@ struct nix *nix_lf_alloc(struct udevice *dev) + nix->lmac->pknd = nix->lmac->link_num; + + cgx_lmac_set_pkind(nix->lmac, nix->lmac->lmac_id, nix->lmac->pknd); +- debug("%s(%s CGX%x LMAC%x)\n", __func__, dev->name, ++printf("%s(%s CGX%x LMAC%x)\n", __func__, dev->name, + nix->lmac->cgx->cgx_id, nix->lmac->lmac_id); +- debug("%s(%s Link %x Chan %x Pknd %x)\n", __func__, dev->name, ++printf("%s(%s Link %x Chan %x Pknd %x)\n", __func__, dev->name, + nix->lmac->link_num, nix->lmac->chan_num, nix->lmac->pknd); + + err = npa_lf_setup(nix); +@@ -479,9 +479,9 @@ static inline void nix_write_lmt(struct nix *nix, void *buffer, + u64 *lmt_ptr = lmt_store_ptr(nix); + u64 *ptr = buffer; + +- debug("%s lmt_ptr %p %p\n", __func__, nix->lmt_base, lmt_ptr); ++printf("%s lmt_ptr %p %p\n", __func__, nix->lmt_base, lmt_ptr); + for (i = 0; i < num_words; i++) { +- debug("%s data %llx lmt_ptr %p\n", __func__, ptr[i], ++printf("%s data %llx lmt_ptr %p\n", __func__, ptr[i], + lmt_ptr + i); + lmt_ptr[i] = ptr[i]; + } +@@ -491,7 +491,7 @@ void nix_cqe_tx_pkt_handler(struct nix *nix, void *cqe) + { + union nix_cqe_hdr_s *txcqe = (union nix_cqe_hdr_s *)cqe; + +- debug("%s: txcqe: %p\n", __func__, txcqe); ++printf("%s: txcqe: %p\n", __func__, txcqe); + + if (txcqe->s.cqe_type != NIX_XQE_TYPE_E_SEND) { + printf("%s: Error: Unsupported CQ header type %d\n", +@@ -518,7 +518,7 @@ void nix_lf_flush_tx(struct udevice *dev) + head &= (nix->cq[NIX_CQ_TX].qsize - 1); + tail &= (nix->cq[NIX_CQ_TX].qsize - 1); + +- debug("%s cq tx head %d tail %d\n", __func__, head, tail); ++printf("%s cq tx head %d tail %d\n", __func__, head, tail); + while (head != tail) { + cqe = cq_tx_base + head * nix->cq[NIX_CQ_TX].entry_sz; + nix_cqe_tx_pkt_handler(nix, cqe); +@@ -527,7 +527,7 @@ void nix_lf_flush_tx(struct udevice *dev) + tail = op_status.s.tail; + head &= (nix->cq[NIX_CQ_TX].qsize - 1); + tail &= (nix->cq[NIX_CQ_TX].qsize - 1); +- debug("%s cq tx head %d tail %d\n", __func__, head, tail); ++printf("%s cq tx head %d tail %d\n", __func__, head, tail); + } + } + +@@ -549,7 +549,7 @@ int nix_lf_xmit(struct udevice *dev, void *pkt, int pkt_len) + return -1; + } + memcpy(packet, pkt, pkt_len); +- debug("%s TX buffer %p\n", __func__, packet); ++printf("%s TX buffer %p\n", __func__, packet); + + tx_dr.hdr.s.aura = NPA_POOL_TX; + tx_dr.hdr.s.df = 0; +@@ -557,7 +557,7 @@ int nix_lf_xmit(struct udevice *dev, void *pkt, int pkt_len) + tx_dr.hdr.s.sq = 0; + tx_dr.hdr.s.total = pkt_len; + tx_dr.hdr.s.sizem1 = dr_sz - 2; /* FIXME - for now hdr+sg+sg1addr */ +- debug("%s dr_sz %d\n", __func__, dr_sz); ++printf("%s dr_sz %d\n", __func__, dr_sz); + + tx_dr.tx_sg.s.segs = 1; + tx_dr.tx_sg.s.subdc = NIX_SUBDC_E_SG; +@@ -567,13 +567,13 @@ int nix_lf_xmit(struct udevice *dev, void *pkt, int pkt_len) + + #define DEBUG_PKT + #ifdef DEBUG_PKT +- debug("TX PKT Data\n"); ++printf("TX PKT Data\n"); + for (int i = 0; i < pkt_len; i++) { + if (i && (i % 8 == 0)) +- debug("\n"); +- debug("%02x ", *((u8 *)pkt + i)); ++printf("\n"); ++printf("%02x ", *((u8 *)pkt + i)); + } +- debug("\n"); ++printf("\n"); + #endif + do { + nix_write_lmt(nix, &tx_dr, (dr_sz - 1) * 2); +@@ -606,13 +606,13 @@ void nix_lf_flush_rx(struct udevice *dev) + head &= (nix->cq[NIX_CQ_RX].qsize - 1); + tail &= (nix->cq[NIX_CQ_RX].qsize - 1); + +- debug("%s cq rx head %d tail %d\n", __func__, head, tail); ++printf("%s cq rx head %d tail %d\n", __func__, head, tail); + while (head != tail) { + rx_dr = (struct nix_rx_dr *)cq_rx_base + head * rx_cqe_sz; + rxparse = &rx_dr->rx_parse; + +- debug("%s: rx parse: %p\n", __func__, rxparse); +- debug("%s: rx parse: desc_sizem1 %x pkt_lenm1 %x\n", ++printf("%s: rx parse: %p\n", __func__, rxparse); ++printf("%s: rx parse: desc_sizem1 %x pkt_lenm1 %x\n", + __func__, rxparse->s.desc_sizem1, rxparse->s.pkt_lenm1); + + seg = (dma_addr_t *)(&rx_dr->rx_sg + 1); +@@ -620,7 +620,7 @@ void nix_lf_flush_rx(struct udevice *dev) + st128(nix->npa->npa_base + NPA_LF_AURA_OP_FREE0(), + seg[0], (1ULL << 63) | NPA_POOL_RX); + +- debug("%s return %llx to NPA\n", __func__, seg[0]); ++printf("%s return %llx to NPA\n", __func__, seg[0]); + nix_pf_reg_write(nix, NIXX_LF_CQ_OP_DOOR(), + (NIX_CQ_RX << 32) | 1); + +@@ -629,7 +629,7 @@ void nix_lf_flush_rx(struct udevice *dev) + tail = op_status.s.tail; + head &= (nix->cq[NIX_CQ_RX].qsize - 1); + tail &= (nix->cq[NIX_CQ_RX].qsize - 1); +- debug("%s cq rx head %d tail %d\n", __func__, head, tail); ++printf("%s cq rx head %d tail %d\n", __func__, head, tail); + } + } + +@@ -639,7 +639,7 @@ int nix_lf_free_pkt(struct udevice *dev, uchar *pkt, int pkt_len) + struct nix *nix = rvu->nix; + + /* Return rx packet to NPA */ +- debug("%s return %p to NPA\n", __func__, pkt); ++printf("%s return %p to NPA\n", __func__, pkt); + st128(nix->npa->npa_base + NPA_LF_AURA_OP_FREE0(), (u64)pkt, + (1ULL << 63) | NPA_POOL_RX); + nix_pf_reg_write(nix, NIXX_LF_CQ_OP_DOOR(), +@@ -668,22 +668,22 @@ int nix_lf_recv(struct udevice *dev, int flags, uchar **packetp) + tail = op_status.s.tail; + head &= (nix->cq[NIX_CQ_RX].qsize - 1); + tail &= (nix->cq[NIX_CQ_RX].qsize - 1); +- debug("%s cq rx head %d tail %d\n", __func__, head, tail); ++printf("%s cq rx head %d tail %d\n", __func__, head, tail); + if (head == tail) + return -EAGAIN; + +- debug("%s: rx_base %p head %d sz %d\n", __func__, cq_rx_base, head, ++printf("%s: rx_base %p head %d sz %d\n", __func__, cq_rx_base, head, + nix->cq[NIX_CQ_RX].entry_sz); + cqe = cq_rx_base + head * nix->cq[NIX_CQ_RX].entry_sz; + rx_dr = (struct nix_rx_dr *)cqe; + rxparse = &rx_dr->rx_parse; + +- debug("%s: rx completion: %p\n", __func__, cqe); +- debug("%s: rx dr: %p\n", __func__, rx_dr); +- debug("%s: rx parse: %p\n", __func__, rxparse); +- debug("%s: rx parse: desc_sizem1 %x pkt_lenm1 %x\n", ++printf("%s: rx completion: %p\n", __func__, cqe); ++printf("%s: rx dr: %p\n", __func__, rx_dr); ++printf("%s: rx parse: %p\n", __func__, rxparse); ++printf("%s: rx parse: desc_sizem1 %x pkt_lenm1 %x\n", + __func__, rxparse->s.desc_sizem1, rxparse->s.pkt_lenm1); +- debug("%s: rx parse: pkind %x chan %x\n", ++printf("%s: rx parse: pkind %x chan %x\n", + __func__, rxparse->s.pkind, rxparse->s.chan); + + if (rx_dr->hdr.s.cqe_type != NIX_XQE_TYPE_E_RX) { +@@ -696,26 +696,26 @@ int nix_lf_recv(struct udevice *dev, int flags, uchar **packetp) + addr = (dma_addr_t *)(&rx_dr->rx_sg + 1); + pkt = (void *)addr[0]; + +- debug("%s: segs: %d (%d@0x%llx, %d@0x%llx, %d@0x%llx)\n", __func__, ++printf("%s: segs: %d (%d@0x%llx, %d@0x%llx, %d@0x%llx)\n", __func__, + rx_dr->rx_sg.s.segs, rx_dr->rx_sg.s.seg1_size, addr[0], + rx_dr->rx_sg.s.seg2_size, addr[1], + rx_dr->rx_sg.s.seg3_size, addr[2]); + if (pkt_len < rx_dr->rx_sg.s.seg1_size + rx_dr->rx_sg.s.seg2_size + + rx_dr->rx_sg.s.seg3_size) { +- debug("%s: Error: rx buffer size too small\n", __func__); ++printf("%s: Error: rx buffer size too small\n", __func__); + return -1; + } + + __iowmb(); + #define DEBUG_PKT + #ifdef DEBUG_PKT +- debug("RX PKT Data\n"); ++printf("RX PKT Data\n"); + for (int i = 0; i < pkt_len; i++) { + if (i && (i % 8 == 0)) +- debug("\n"); +- debug("%02x ", *((u8 *)pkt + i)); ++printf("\n"); ++printf("%02x ", *((u8 *)pkt + i)); + } +- debug("\n"); ++printf("\n"); + #endif + + *packetp = (uchar *)pkt; +@@ -743,10 +743,10 @@ int nix_lf_setup_mac(struct udevice *dev) + * in sh_fwdata to use in Linux. + */ + cgx_intf_set_macaddr(dev); +- debug("%s: lMAC %pM\n", __func__, nix->lmac->mac_addr); +- debug("%s: pMAC %pM\n", __func__, pdata->enetaddr); ++printf("%s: lMAC %pM\n", __func__, nix->lmac->mac_addr); ++printf("%s: pMAC %pM\n", __func__, pdata->enetaddr); + } +- debug("%s: setupMAC %pM\n", __func__, pdata->enetaddr); ++printf("%s: setupMAC %pM\n", __func__, pdata->enetaddr); + return 0; + } + +@@ -795,7 +795,7 @@ int nix_lf_init(struct udevice *dev) + link = link_sts & 0x1; + speed = (link_sts >> 2) & 0xf; + errcode = (link_sts >> 6) & 0x2ff; +- debug("%s: link %x speed %x errcode %x\n", ++printf("%s: link %x speed %x errcode %x\n", + __func__, link, speed, errcode); + + /* Print link status */ +diff --git a/drivers/net/octeontx2/nix.h b/drivers/net/octeontx2/nix.h +index 03260dddb..080af66aa 100644 +--- a/drivers/net/octeontx2/nix.h ++++ b/drivers/net/octeontx2/nix.h +@@ -254,7 +254,7 @@ static inline u64 nix_af_reg_read(struct nix_af *nix_af, u64 offset) + { + u64 val = readq(nix_af->nix_af_base + offset); + +- debug("%s reg %p val %llx\n", __func__, nix_af->nix_af_base + offset, ++printf("%s reg %p val %llx\n", __func__, nix_af->nix_af_base + offset, + val); + return val; + } +@@ -262,7 +262,7 @@ static inline u64 nix_af_reg_read(struct nix_af *nix_af, u64 offset) + static inline void nix_af_reg_write(struct nix_af *nix_af, u64 offset, + u64 val) + { +- debug("%s reg %p val %llx\n", __func__, nix_af->nix_af_base + offset, ++printf("%s reg %p val %llx\n", __func__, nix_af->nix_af_base + offset, + val); + writeq(val, nix_af->nix_af_base + offset); + } +@@ -271,7 +271,7 @@ static inline u64 nix_pf_reg_read(struct nix *nix, u64 offset) + { + u64 val = readq(nix->nix_base + offset); + +- debug("%s reg %p val %llx\n", __func__, nix->nix_base + offset, ++printf("%s reg %p val %llx\n", __func__, nix->nix_base + offset, + val); + return val; + } +@@ -279,7 +279,7 @@ static inline u64 nix_pf_reg_read(struct nix *nix, u64 offset) + static inline void nix_pf_reg_write(struct nix *nix, u64 offset, + u64 val) + { +- debug("%s reg %p val %llx\n", __func__, nix->nix_base + offset, ++printf("%s reg %p val %llx\n", __func__, nix->nix_base + offset, + val); + writeq(val, nix->nix_base + offset); + } +@@ -288,7 +288,7 @@ static inline u64 npa_af_reg_read(struct npa_af *npa_af, u64 offset) + { + u64 val = readq(npa_af->npa_af_base + offset); + +- debug("%s reg %p val %llx\n", __func__, npa_af->npa_af_base + offset, ++printf("%s reg %p val %llx\n", __func__, npa_af->npa_af_base + offset, + val); + return val; + } +@@ -296,7 +296,7 @@ static inline u64 npa_af_reg_read(struct npa_af *npa_af, u64 offset) + static inline void npa_af_reg_write(struct npa_af *npa_af, u64 offset, + u64 val) + { +- debug("%s reg %p val %llx\n", __func__, npa_af->npa_af_base + offset, ++printf("%s reg %p val %llx\n", __func__, npa_af->npa_af_base + offset, + val); + writeq(val, npa_af->npa_af_base + offset); + } +@@ -305,7 +305,7 @@ static inline u64 npc_af_reg_read(struct nix_af *nix_af, u64 offset) + { + u64 val = readq(nix_af->npc_af_base + offset); + +- debug("%s reg %p val %llx\n", __func__, nix_af->npc_af_base + offset, ++printf("%s reg %p val %llx\n", __func__, nix_af->npc_af_base + offset, + val); + return val; + } +@@ -313,7 +313,7 @@ static inline u64 npc_af_reg_read(struct nix_af *nix_af, u64 offset) + static inline void npc_af_reg_write(struct nix_af *nix_af, u64 offset, + u64 val) + { +- debug("%s reg %p val %llx\n", __func__, nix_af->npc_af_base + offset, ++printf("%s reg %p val %llx\n", __func__, nix_af->npc_af_base + offset, + val); + writeq(val, nix_af->npc_af_base + offset); + } +diff --git a/drivers/net/octeontx2/nix_af.c b/drivers/net/octeontx2/nix_af.c +index d513917ee..f01f8b8df 100644 +--- a/drivers/net/octeontx2/nix_af.c ++++ b/drivers/net/octeontx2/nix_af.c +@@ -41,7 +41,7 @@ int npa_attach_aura(struct nix_af *nix_af, int lf, + u64 head; + ulong start; + +- debug("%s(%p, %d, %p, %u)\n", __func__, nix_af, lf, desc, aura_id); ++printf("%s(%p, %d, %p, %u)\n", __func__, nix_af, lf, desc, aura_id); + aq_stat.u = npa_af_reg_read(npa, NPA_AF_AQ_STATUS()); + head = aq_stat.s.head_ptr; + inst = (union npa_aq_inst_s *)(npa->aq.inst.base) + head; +@@ -86,7 +86,7 @@ int npa_attach_pool(struct nix_af *nix_af, int lf, + u64 head; + ulong start; + +- debug("%s(%p, %d, %p, %u)\n", __func__, nix_af, lf, desc, pool_id); ++printf("%s(%p, %d, %p, %u)\n", __func__, nix_af, lf, desc, pool_id); + aq_stat.u = npa_af_reg_read(npa, NPA_AF_AQ_STATUS()); + head = aq_stat.s.head_ptr; + +@@ -128,7 +128,7 @@ int npa_lf_admin_setup(struct npa *npa, int lf, dma_addr_t aura_base) + union npa_af_lfx_auras_cfg auras_cfg; + struct npa_af *npa_af = npa->npa_af; + +- debug("%s(%p, %d, 0x%llx)\n", __func__, npa_af, lf, aura_base); ++printf("%s(%p, %d, 0x%llx)\n", __func__, npa_af, lf, aura_base); + lf_rst.u = 0; + lf_rst.s.exec = 1; + lf_rst.s.lf = lf; +@@ -207,7 +207,7 @@ int npa_lf_admin_shutdown(struct nix_af *nix_af, int lf, u32 pool_count) + pool_id); + return -1; + } +- debug("%s(LF %d, pool id %d) disabled\n", __func__, lf, ++printf("%s(LF %d, pool id %d) disabled\n", __func__, lf, + pool_id); + } + +@@ -243,7 +243,7 @@ int npa_lf_admin_shutdown(struct nix_af *nix_af, int lf, u32 pool_count) + pool_id); + return -1; + } +- debug("%s(LF %d, aura id %d) disabled\n", __func__, lf, ++printf("%s(LF %d, aura id %d) disabled\n", __func__, lf, + pool_id); + } + +@@ -276,7 +276,7 @@ int npa_af_setup(struct npa_af *npa_af) + printf("%s: Error %d allocating admin queue\n", __func__, err); + return err; + } +- debug("%s: NPA admin queue allocated at %p %llx\n", __func__, ++printf("%s: NPA admin queue allocated at %p %llx\n", __func__, + npa_af->aq.inst.base, npa_af->aq.inst.iova); + + blk_rst.u = 0; +@@ -323,7 +323,7 @@ int npa_af_shutdown(struct npa_af *npa_af) + + rvu_aq_free(&npa_af->aq); + +- debug("%s: npa af reset --\n", __func__); ++printf("%s: npa af reset --\n", __func__); + + return 0; + } +@@ -458,7 +458,7 @@ static int nix_aq_issue_command(struct nix_af *nix_af, + union nix_aq_res_s *result = resp; + ulong start; + +- debug("%s(%p, 0x%x, 0x%x, 0x%x, 0x%x, %p)\n", __func__, nix_af, lf, ++printf("%s(%p, 0x%x, 0x%x, 0x%x, 0x%x, %p)\n", __func__, nix_af, lf, + op, ctype, cindex, resp); + aq_status.u = nix_af_reg_read(nix_af, NIXX_AF_AQ_STATUS()); + aq_inst = (union nix_aq_inst_s *)(nix_af->aq.inst.base) + +@@ -471,7 +471,7 @@ static int nix_aq_issue_command(struct nix_af *nix_af, + aq_inst->s.cindex = cindex; + aq_inst->s.doneint = 0; + aq_inst->s.res_addr = (u64)resp; +- debug("%s: inst@%p: 0x%llx 0x%llx\n", __func__, aq_inst, ++printf("%s: inst@%p: 0x%llx 0x%llx\n", __func__, aq_inst, + aq_inst->u[0], aq_inst->u[1]); + __iowmb(); + +@@ -498,7 +498,7 @@ static int nix_attach_receive_queue(struct nix_af *nix_af, int lf) + struct nix_aq_rq_request rq_req ALIGNED; + int err; + +- debug("%s(%p, %d)\n", __func__, nix_af, lf); ++printf("%s(%p, %d)\n", __func__, nix_af, lf); + + memset(&rq_req, 0, sizeof(struct nix_aq_rq_request)); + +@@ -554,7 +554,7 @@ static int nix_attach_send_queue(struct nix *nix) + struct nix_aq_sq_request sq_req ALIGNED; + int err; + +- debug("%s(%p)\n", __func__, nix_af); ++printf("%s(%p)\n", __func__, nix_af); + err = nix_af_setup_sq(nix); + + memset(&sq_req, 0, sizeof(sq_req)); +@@ -592,7 +592,7 @@ static int nix_attach_completion_queue(struct nix *nix, int cq_idx) + struct nix_aq_cq_request cq_req ALIGNED; + int err; + +- debug("%s(%p)\n", __func__, nix_af); ++printf("%s(%p)\n", __func__, nix_af); + memset(&cq_req, 0, sizeof(cq_req)); + cq_req.cq.s.ena = 1; + cq_req.cq.s.bpid = nix->lmac->pknd; +@@ -604,7 +604,7 @@ static int nix_attach_completion_queue(struct nix *nix, int cq_idx) + cq_req.cq.s.qint_idx = 0; + cq_req.cq.s.cint_idx = 0; + cq_req.cq.s.base = nix->cq[cq_idx].iova; +- debug("%s: CQ(%d) base %p\n", __func__, cq_idx, ++printf("%s: CQ(%d) base %p\n", __func__, cq_idx, + nix->cq[cq_idx].base); + + err = nix_aq_issue_command(nix_af, nix->lf, +@@ -615,7 +615,7 @@ static int nix_attach_completion_queue(struct nix *nix, int cq_idx) + printf("%s: Error requesting completion queue\n", __func__); + return err; + } +- debug("%s: CQ(%d) allocated, base %p\n", __func__, cq_idx, ++printf("%s: CQ(%d) allocated, base %p\n", __func__, cq_idx, + nix->cq[cq_idx].base); + + return 0; +@@ -708,7 +708,7 @@ int nix_lf_admin_setup(struct nix *nix) + nix_af_reg_write(nix_af, NIXX_AF_LFX_QINTS_CFG(nix->lf), + qints_cfg.u); + +- debug("%s(%p, %d, %d)\n", __func__, nix_af, nix->lf, nix->pf); ++printf("%s(%p, %d, %d)\n", __func__, nix_af, nix->lf, nix->pf); + + /* Enable LMTST for this NIX LF */ + tx_cfg2.u = nix_af_reg_read(nix_af, NIXX_AF_LFX_TX_CFG2(nix->lf)); +@@ -785,7 +785,7 @@ int nix_lf_admin_shutdown(struct nix_af *nix_af, int lf, + __func__, lf, index); + return err; + } +- debug("%s: LF %d RQ(%d) disabled\n", __func__, lf, index); ++printf("%s: LF %d RQ(%d) disabled\n", __func__, lf, index); + } + + for (index = 0; index < sq_count; index++) { +@@ -803,7 +803,7 @@ int nix_lf_admin_shutdown(struct nix_af *nix_af, int lf, + __func__, lf, index); + return err; + } +- debug("%s: LF %d SQ(%d) disabled\n", __func__, lf, index); ++printf("%s: LF %d SQ(%d) disabled\n", __func__, lf, index); + } + + for (index = 0; index < cq_count; index++) { +@@ -821,7 +821,7 @@ int nix_lf_admin_shutdown(struct nix_af *nix_af, int lf, + __func__, lf, index); + return err; + } +- debug("%s: LF %d CQ(%d) disabled\n", __func__, lf, index); ++printf("%s: LF %d CQ(%d) disabled\n", __func__, lf, index); + } + + /* Reset the LF */ +@@ -859,7 +859,7 @@ int npc_lf_admin_setup(struct nix *nix) + int index; + u64 offset; + +- debug("%s(%p, pkind 0x%x)\n", __func__, nix_af, pkind); ++printf("%s(%p, pkind 0x%x)\n", __func__, nix_af, pkind); + af_const.u = npc_af_reg_read(nix_af, NPC_AF_CONST()); + kpus = af_const.s.kpus; + +@@ -898,7 +898,7 @@ int npc_lf_admin_setup(struct nix *nix) + + camx_w0.u = 0; + camx_w0.s.md = ~(nix->lmac->chan_num) & (~((~0x0ull) << 12)); +- debug("NPC LF ADMIN camx_w0.u %llx\n", camx_w0.u); ++printf("NPC LF ADMIN camx_w0.u %llx\n", camx_w0.u); + npc_af_reg_write(nix_af, + NPC_AF_MCAMEX_BANKX_CAMX_W0(pkind, 0, 0), + camx_w0.u); +@@ -975,7 +975,7 @@ int npc_af_shutdown(struct nix_af *nix_af) + WATCHDOG_RESET(); + } while (blk_rst.s.busy); + +- debug("%s: npc af reset --\n", __func__); ++printf("%s: npc af reset --\n", __func__); + + return 0; + } +@@ -992,7 +992,7 @@ int nix_af_setup(struct nix_af *nix_af) + union nixx_af_aq_cfg aq_cfg; + union nixx_af_blk_rst blk_rst; + +- debug("%s(%p)\n", __func__, nix_af); ++printf("%s(%p)\n", __func__, nix_af); + err = rvu_aq_alloc(&nix_af->aq, Q_COUNT(AQ_SIZE), + sizeof(union nix_aq_inst_s), + sizeof(union nix_aq_res_s)); +@@ -1096,7 +1096,7 @@ int nix_af_shutdown(struct nix_af *nix_af) + + rvu_aq_free(&nix_af->aq); + +- debug("%s: nix af reset --\n", __func__); ++printf("%s: nix af reset --\n", __func__); + + return 0; + } +diff --git a/drivers/net/octeontx2/rvu_af.c b/drivers/net/octeontx2/rvu_af.c +index d2f965486..7999debd1 100644 +--- a/drivers/net/octeontx2/rvu_af.c ++++ b/drivers/net/octeontx2/rvu_af.c +@@ -47,7 +47,7 @@ void rvu_get_lfid_for_pf(int pf, int *nixid, int *npaid) + if (nix_lf_dbg.s.lf_valid) + *nixid = nix_lf_dbg.s.lf; + +- debug("%s: nix lf_valid %d lf %d nixid %d\n", __func__, ++printf("%s: nix lf_valid %d lf %d nixid %d\n", __func__, + nix_lf_dbg.s.lf_valid, nix_lf_dbg.s.lf, *nixid); + + npa_lf_dbg.u = 0; +@@ -62,7 +62,7 @@ void rvu_get_lfid_for_pf(int pf, int *nixid, int *npaid) + + if (npa_lf_dbg.s.lf_valid) + *npaid = npa_lf_dbg.s.lf; +- debug("%s: npa lf_valid %d lf %d npaid %d\n", __func__, ++printf("%s: npa lf_valid %d lf %d npaid %d\n", __func__, + npa_lf_dbg.s.lf_valid, npa_lf_dbg.s.lf, *npaid); + } + +@@ -98,19 +98,19 @@ struct nix_af *rvu_af_init(struct rvu_af *rvu_af) + block_addr.s.block = RVU_BLOCK_ADDR_E_NPC; + nix_af->npc_af_base = rvu_af->af_base + block_addr.u; + +- debug("%s: Setting up npa admin\n", __func__); ++printf("%s: Setting up npa admin\n", __func__); + err = npa_af_setup(nix_af->npa_af); + if (err) { + printf("%s: Error %d setting up NPA admin\n", __func__, err); + goto error; + } +- debug("%s: Setting up nix af\n", __func__); ++printf("%s: Setting up nix af\n", __func__); + err = nix_af_setup(nix_af); + if (err) { + printf("%s: Error %d setting up NIX admin\n", __func__, err); + goto error; + } +- debug("%s: nix_af: %p\n", __func__, nix_af); ++printf("%s: nix_af: %p\n", __func__, nix_af); + return nix_af; + + error: +@@ -129,7 +129,7 @@ int rvu_af_probe(struct udevice *dev) + + af_ptr->af_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, + PCI_REGION_MEM); +- debug("%s RVU AF BAR %p\n", __func__, af_ptr->af_base); ++printf("%s RVU AF BAR %p\n", __func__, af_ptr->af_base); + af_ptr->dev = dev; + rvu_af_dev = dev; + +@@ -138,7 +138,7 @@ int rvu_af_probe(struct udevice *dev) + printf("%s: Error: could not initialize NIX AF\n", __func__); + return -1; + } +- debug("%s: Done\n", __func__); ++printf("%s: Done\n", __func__); + + return 0; + } +@@ -151,7 +151,7 @@ int rvu_af_remove(struct udevice *dev) + npa_af_shutdown(rvu_af->nix_af->npa_af); + npc_af_shutdown(rvu_af->nix_af); + +- debug("%s: rvu af down --\n", __func__); ++printf("%s: rvu af down --\n", __func__); + return 0; + } + +diff --git a/drivers/net/octeontx2/rvu_common.c b/drivers/net/octeontx2/rvu_common.c +index 173b28ba4..3642f2c6c 100644 +--- a/drivers/net/octeontx2/rvu_common.c ++++ b/drivers/net/octeontx2/rvu_common.c +@@ -21,7 +21,7 @@ int qmem_alloc(struct qmem *q, u32 qsize, size_t entry_sz) + q->qsize = qsize; + q->alloc_sz = (size_t)qsize * entry_sz; + q->iova = (dma_addr_t)(q->base); +- debug("NIX: qmem alloc for (%d * %d = %ld bytes) at %p\n", ++printf("NIX: qmem alloc for (%d * %d = %ld bytes) at %p\n", + q->qsize, q->entry_sz, q->alloc_sz, q->base); + return 0; + } +diff --git a/drivers/net/octeontx2/rvu_pf.c b/drivers/net/octeontx2/rvu_pf.c +index 4b0017898..edbab3fb2 100644 +--- a/drivers/net/octeontx2/rvu_pf.c ++++ b/drivers/net/octeontx2/rvu_pf.c +@@ -22,7 +22,7 @@ int rvu_pf_init(struct rvu_pf *rvu) + struct nix *nix; + struct eth_pdata *pdata = dev_get_plat(rvu->dev); + +- debug("%s: Allocating nix lf\n", __func__); ++printf("%s: Allocating nix lf\n", __func__); + nix = nix_lf_alloc(rvu->dev); + if (!nix) { + printf("%s: Error allocating lf for pf %d\n", +@@ -56,7 +56,7 @@ int rvu_pf_probe(struct udevice *dev) + int err; + char name[16]; + +- debug("%s: name: %s\n", __func__, dev->name); ++printf("%s: name: %s\n", __func__, dev->name); + + rvu->pf_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_2, PCI_REGION_MEM); + rvu->pfid = dev_seq(dev) + 1; // RVU PF's start from 1; +@@ -68,7 +68,7 @@ int rvu_pf_probe(struct udevice *dev) + } + rvu->afdev = rvu_af_dev; + +- debug("RVU PF %u BAR2 %p\n", rvu->pfid, rvu->pf_base); ++printf("RVU PF %u BAR2 %p\n", rvu->pfid, rvu->pf_base); + + rvu_get_lfid_for_pf(rvu->pfid, &rvu->nix_lfid, &rvu->npa_lfid); + +@@ -82,7 +82,7 @@ int rvu_pf_probe(struct udevice *dev) + */ + sprintf(name, "rvu_pf#%d", dev_seq(dev)); + device_set_name(dev, name); +- debug("%s: name: %s\n", __func__, dev->name); ++printf("%s: name: %s\n", __func__, dev->name); + return err; + } + +@@ -93,7 +93,7 @@ int rvu_pf_remove(struct udevice *dev) + nix_lf_shutdown(rvu->nix); + npa_lf_shutdown(rvu->nix); + +- debug("%s: rvu pf%d down --\n", __func__, rvu->pfid); ++printf("%s: rvu pf%d down --\n", __func__, rvu->pfid); + + return 0; + } +diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c +index fabcf85c0..f059caf61 100644 +--- a/drivers/net/pch_gbe.c ++++ b/drivers/net/pch_gbe.c +@@ -32,7 +32,7 @@ static void pch_gbe_mac_read(struct pch_gbe_regs *mac_regs, u8 *addr) + + macid_hi = readl(&mac_regs->mac_adr[0].high); + macid_lo = readl(&mac_regs->mac_adr[0].low) & 0xffff; +- debug("pch_gbe: macid_hi %#x macid_lo %#x\n", macid_hi, macid_lo); ++printf("pch_gbe: macid_hi %#x macid_lo %#x\n", macid_hi, macid_lo); + + addr[0] = (u8)(macid_hi & 0xff); + addr[1] = (u8)((macid_hi >> 8) & 0xff); +@@ -107,7 +107,7 @@ static int pch_gbe_reset(struct udevice *dev) + udelay(10); + } + +- debug("pch_gbe: reset timeout\n"); ++printf("pch_gbe: reset timeout\n"); + return -ETIME; + } + +@@ -285,7 +285,7 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length) + udelay(10); + } + +- debug("pch_gbe: sent failed\n"); ++printf("pch_gbe: sent failed\n"); + return -ETIME; + } + +@@ -396,7 +396,7 @@ static int pch_gbe_mdio_init(const char *name, struct pch_gbe_regs *mac_regs) + + bus = mdio_alloc(); + if (!bus) { +- debug("pch_gbe: failed to allocate MDIO bus\n"); ++printf("pch_gbe: failed to allocate MDIO bus\n"); + return -ENOMEM; + } + +diff --git a/drivers/net/pfe_eth/pfe_cmd.c b/drivers/net/pfe_eth/pfe_cmd.c +index 364750f65..b97ca1161 100644 +--- a/drivers/net/pfe_eth/pfe_cmd.c ++++ b/drivers/net/pfe_eth/pfe_cmd.c +@@ -409,7 +409,7 @@ static void send_dummy_pkt_to_hif(void) + /*Allocate BMU2 buffer */ + buf = readl(BMU2_BASE_ADDR + BMU_ALLOC_CTRL); + +- debug("Sending a dummy pkt to HIF %x\n", buf); ++printf("Sending a dummy pkt to HIF %x\n", buf); + buf += 0x80; + memcpy((void *)DDR_PFE_TO_VIRT(buf), dummy_pkt, sizeof(dummy_pkt)); + +diff --git a/drivers/net/pfe_eth/pfe_driver.c b/drivers/net/pfe_eth/pfe_driver.c +index 6f443b4ea..c76b88353 100644 +--- a/drivers/net/pfe_eth/pfe_driver.c ++++ b/drivers/net/pfe_eth/pfe_driver.c +@@ -46,8 +46,8 @@ int pfe_recv(uchar **pkt_ptr, int *phy_port) + hif_header = (struct hif_header_s *)DDR_PFE_TO_VIRT(readl(&bd->data)); + + /* Get the receive port info from the packet */ +- debug("Pkt received:"); +- debug(" Pkt ptr(%p), len(%d), gemac_port(%d) status(%08x)\n", ++printf("Pkt received:"); ++printf(" Pkt ptr(%p), len(%d), gemac_port(%d) status(%08x)\n", + hif_header, len, hif_header->port_no, readl(&bd->status)); + #ifdef DEBUG + { +@@ -81,7 +81,7 @@ int pfe_eth_free_pkt(struct udevice *dev, uchar *packet, int length) + struct rx_desc_s *rx_desc = g_rx_desc; + struct buf_desc *bd; + +- debug("%s:rx_base: %p, rx_to_read: %d\n", __func__, rx_desc->rx_base, ++printf("%s:rx_base: %p, rx_to_read: %d\n", __func__, rx_desc->rx_base, + rx_desc->rx_to_read); + + bd = rx_desc->rx_base + rx_desc->rx_to_read; +@@ -91,7 +91,7 @@ int pfe_eth_free_pkt(struct udevice *dev, uchar *packet, int length) + | BD_CTRL_DIR), &bd->ctrl); + writel(0, &bd->status); + +- debug("Rx Done : status: %08x, ctrl: %08x\n", readl(&bd->status), ++printf("Rx Done : status: %08x, ctrl: %08x\n", readl(&bd->status), + readl(&bd->ctrl)); + + /* Give START_STROBE to BDP to fetch the descriptor __NOW__, +@@ -105,7 +105,7 @@ int pfe_eth_free_pkt(struct udevice *dev, uchar *packet, int length) + rx_desc->rx_to_read = (rx_desc->rx_to_read + 1) + & (rx_desc->rx_ring_size - 1); + +- debug("Rx next pkt location: %d\n", rx_desc->rx_to_read); ++printf("Rx next pkt location: %d\n", rx_desc->rx_to_read); + + return 0; + } +@@ -131,7 +131,7 @@ int pfe_send(int phy_port, void *data, int length) + struct hif_header_s hif_header; + u8 *tx_buf_va; + +- debug("%s:pkt: %p, len: %d, tx_base: %p, tx_to_send: %d\n", __func__, ++printf("%s:pkt: %p, len: %d, tx_base: %p, tx_to_send: %d\n", __func__, + data, length, tx_desc->tx_base, tx_desc->tx_to_send); + + bd = tx_desc->tx_base + tx_desc->tx_to_send; +@@ -145,7 +145,7 @@ int pfe_send(int phy_port, void *data, int length) + length = MIN_PKT_SIZE; + + tx_buf_va = (void *)DDR_PFE_TO_VIRT(readl(&bd->data)); +- debug("%s: tx_buf_va: %p, tx_buf_pa: %08x\n", __func__, tx_buf_va, ++printf("%s: tx_buf_va: %p, tx_buf_pa: %08x\n", __func__, tx_buf_va, + readl(&bd->data)); + + /* Fill the gemac/phy port number to send this packet out */ +@@ -169,7 +169,7 @@ int pfe_send(int phy_port, void *data, int length) + } + #endif + +- debug("Tx Done: status: %08x, ctrl: %08x\n", readl(&bd->status), ++printf("Tx Done: status: %08x, ctrl: %08x\n", readl(&bd->status), + readl(&bd->ctrl)); + + /* fill the tx desc */ +@@ -198,7 +198,7 @@ int pfe_tx_done(void) + struct tx_desc_s *tx_desc = g_tx_desc; + struct buf_desc *bd; + +- debug("%s:tx_base: %p, tx_to_send: %d\n", __func__, tx_desc->tx_base, ++printf("%s:tx_base: %p, tx_to_send: %d\n", __func__, tx_desc->tx_base, + tx_desc->tx_to_send); + + bd = tx_desc->tx_base + tx_desc->tx_to_send; +@@ -211,14 +211,14 @@ int pfe_tx_done(void) + writel(0, &bd->ctrl); + writel(0, &bd->status); + +- debug("Tx Done : status: %08x, ctrl: %08x\n", readl(&bd->status), ++printf("Tx Done : status: %08x, ctrl: %08x\n", readl(&bd->status), + readl(&bd->ctrl)); + + /* increment the txtosend index to next location */ + tx_desc->tx_to_send = (tx_desc->tx_to_send + 1) + & (tx_desc->tx_ring_size - 1); + +- debug("Tx next pkt location: %d\n", tx_desc->tx_to_send); ++printf("Tx next pkt location: %d\n", tx_desc->tx_to_send); + + return 0; + } +@@ -240,10 +240,10 @@ static inline void hif_rx_desc_dump(void) + rx_desc = g_rx_desc; + bd_va = rx_desc->rx_base; + +- debug("HIF rx desc: base_va: %p, base_pa: %08x\n", rx_desc->rx_base, ++printf("HIF rx desc: base_va: %p, base_pa: %08x\n", rx_desc->rx_base, + rx_desc->rx_base_pa); + for (i = 0; i < rx_desc->rx_ring_size; i++) { +- debug("status: %08x, ctrl: %08x, data: %08x, next: 0x%08x\n", ++printf("status: %08x, ctrl: %08x, data: %08x, next: 0x%08x\n", + readl(&bd_va->status), + readl(&bd_va->ctrl), + readl(&bd_va->data), +@@ -314,7 +314,7 @@ static int hif_rx_desc_init(struct pfe_ddr_address *pfe_addr) + + rx_buf_pa = pfe_addr->ddr_pfe_phys_baseaddr + HIF_RX_PKT_DDR_BASEADDR; + +- debug("%s: Rx desc base: %p, base_pa: %08x, desc_count: %d\n", ++printf("%s: Rx desc base: %p, base_pa: %08x, desc_count: %d\n", + __func__, rx_desc->rx_base, rx_desc->rx_base_pa, + rx_desc->rx_ring_size); + +@@ -357,7 +357,7 @@ static inline void hif_tx_desc_dump(void) + tx_desc = g_tx_desc; + bd_va = tx_desc->tx_base; + +- debug("HIF tx desc: base_va: %p, base_pa: %08x\n", tx_desc->tx_base, ++printf("HIF tx desc: base_va: %p, base_pa: %08x\n", tx_desc->tx_base, + tx_desc->tx_base_pa); + + for (i = 0; i < tx_desc->tx_ring_size; i++) +@@ -401,7 +401,7 @@ static int hif_tx_desc_init(struct pfe_ddr_address *pfe_addr) + tx_desc->tx_base_pa = (unsigned long)bd_pa; + tx_desc->tx_base = bd_va; + +- debug("%s: Tx desc_base: %p, base_pa: %08x, desc_count: %d\n", ++printf("%s: Tx desc_base: %p, base_pa: %08x, desc_count: %d\n", + __func__, tx_desc->tx_base, tx_desc->tx_base_pa, + tx_desc->tx_ring_size); + +@@ -438,7 +438,7 @@ static void pfe_class_init(struct pfe_ddr_address *pfe_addr) + + class_init(&class_cfg); + +- debug("class init complete\n"); ++printf("class init complete\n"); + } + + /* +@@ -454,7 +454,7 @@ static void pfe_tmu_init(struct pfe_ddr_address *pfe_addr) + + tmu_init(&tmu_cfg); + +- debug("tmu init complete\n"); ++printf("tmu init complete\n"); + } + + /* +@@ -476,10 +476,10 @@ static void pfe_bmu_init(struct pfe_ddr_address *pfe_addr) + }; + + bmu_init(BMU1_BASE_ADDR, &bmu1_cfg); +- debug("bmu1 init: done\n"); ++printf("bmu1 init: done\n"); + + bmu_init(BMU2_BASE_ADDR, &bmu2_cfg); +- debug("bmu2 init: done\n"); ++printf("bmu2 init: done\n"); + } + + /* +@@ -507,13 +507,13 @@ static void pfe_gpi_init(struct pfe_ddr_address *pfe_addr) + }; + + gpi_init(EGPI1_BASE_ADDR, &egpi1_cfg); +- debug("GPI1 init complete\n"); ++printf("GPI1 init complete\n"); + + gpi_init(EGPI2_BASE_ADDR, &egpi2_cfg); +- debug("GPI2 init complete\n"); ++printf("GPI2 init complete\n"); + + gpi_init(HGPI_BASE_ADDR, &hgpi_cfg); +- debug("HGPI init complete\n"); ++printf("HGPI init complete\n"); + } + + /* +@@ -541,7 +541,7 @@ static int pfe_hif_init(struct pfe_ddr_address *pfe_addr) + hif_rx_desc_dump(); + hif_tx_desc_dump(); + +- debug("HIF init complete\n"); ++printf("HIF init complete\n"); + return ret; + } + +@@ -563,7 +563,7 @@ static int pfe_hw_init(struct pfe_ddr_address *pfe_addr) + { + int ret = 0; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + + writel(0x3, CLASS_PE_SYS_CLK_RATIO); + writel(0x3, TMU_PE_SYS_CLK_RATIO); +@@ -583,12 +583,12 @@ static int pfe_hw_init(struct pfe_ddr_address *pfe_addr) + return ret; + + bmu_enable(BMU1_BASE_ADDR); +- debug("bmu1 enabled\n"); ++printf("bmu1 enabled\n"); + + bmu_enable(BMU2_BASE_ADDR); +- debug("bmu2 enabled\n"); ++printf("bmu2 enabled\n"); + +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + + return ret; + } +diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c +index 0c27a668b..22c009379 100644 +--- a/drivers/net/pfe_eth/pfe_eth.c ++++ b/drivers/net/pfe_eth/pfe_eth.c +@@ -199,7 +199,7 @@ static int pfe_eth_recv(struct udevice *dev, int flags, uchar **packetp) + else if (len < 0) + return -EAGAIN; + +- debug("Rx pkt: pkt_buf(0x%p), phy_port(%d), len(%d)\n", pkt_buf, ++printf("Rx pkt: pkt_buf(0x%p), phy_port(%d), len(%d)\n", pkt_buf, + phy_port, len); + if (phy_port != priv->gemac_port) { + printf("Rx pkt not on expected port\n"); +@@ -225,7 +225,7 @@ static int pfe_eth_probe(struct udevice *dev) + pfe_addr.ddr_pfe_phys_baseaddr = + (unsigned long)pdata->pfe_ddr_addr.ddr_pfe_phys_baseaddr; + +- debug("ddr_pfe_baseaddr: %p, ddr_pfe_phys_baseaddr: %08x\n", ++printf("ddr_pfe_baseaddr: %p, ddr_pfe_phys_baseaddr: %08x\n", + pfe_addr.ddr_pfe_baseaddr, + (u32)pfe_addr.ddr_pfe_phys_baseaddr); + +diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c +index ac86e33c5..9715d4157 100644 +--- a/drivers/net/pfe_eth/pfe_firmware.c ++++ b/drivers/net/pfe_eth/pfe_firmware.c +@@ -48,7 +48,7 @@ static int pfe_load_elf(int pe_mask, uint8_t *pfe_firmware) + int id, section; + int ret; + +- debug("%s: no of sections: %d\n", __func__, sections); ++printf("%s: no of sections: %d\n", __func__, sections); + + /* Some sanity checks */ + if (strncmp((char *)&elf_hdr->e_ident[EI_MAG0], ELFMAG, SELFMAG)) { +@@ -372,7 +372,7 @@ int pfe_firmware_init(void) + pfe_firmware_name); + goto err; + } +- debug("%s: %s firmware loaded\n", __func__, pfe_firmware_name); ++printf("%s: %s firmware loaded\n", __func__, pfe_firmware_name); + free(pfe_firmware); + } + +@@ -390,7 +390,7 @@ err: + */ + void pfe_firmware_exit(void) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + class_disable(); + tmu_disable(0xf); +diff --git a/drivers/net/pfe_eth/pfe_hw.c b/drivers/net/pfe_eth/pfe_hw.c +index 722f5c238..7b45f1f2b 100644 +--- a/drivers/net/pfe_eth/pfe_hw.c ++++ b/drivers/net/pfe_eth/pfe_hw.c +@@ -373,7 +373,7 @@ static int pe_load_pmem_section(int id, const void *data, Elf32_Shdr *shdr) + return -1; + } + +- debug("pmem pe%d @%x len %d\n", id, addr, size); ++printf("pmem pe%d @%x len %d\n", id, addr, size); + switch (type) { + case SHT_PROGBITS: + pe_pmem_memcpy_to32(id, addr, data + offset, size); +@@ -422,12 +422,12 @@ static int pe_load_dmem_section(int id, const void *data, Elf32_Shdr *shdr) + + switch (type) { + case SHT_PROGBITS: +- debug("dmem pe%d @%x len %d\n", id, addr, size); ++printf("dmem pe%d @%x len %d\n", id, addr, size); + pe_dmem_memcpy_to32(id, addr, data + offset, size); + break; + + case SHT_NOBITS: +- debug("dmem zero pe%d @%x len %d\n", id, addr, size); ++printf("dmem zero pe%d @%x len %d\n", id, addr, size); + for (i = 0; i < size32; i++, addr += 4) + pe_dmem_write(id, 0, addr, 4); + +@@ -464,12 +464,12 @@ static int pe_load_ddr_section(int id, const void *data, Elf32_Shdr *shdr) + + switch (type) { + case SHT_PROGBITS: +- debug("ddr pe%d @%x len %d\n", id, addr, size); ++printf("ddr pe%d @%x len %d\n", id, addr, size); + if (flags & SHF_EXECINSTR) { + if (id <= CLASS_MAX_ID) { + /* DO the loading only once in DDR */ + if (id == CLASS0_ID) { +- debug( ++printf( + "%s: load address(%x) and elf file address(%lx) rcvd\n" + , __func__, addr, + (unsigned long)data + offset); +@@ -516,7 +516,7 @@ static int pe_load_ddr_section(int id, const void *data, Elf32_Shdr *shdr) + break; + + case SHT_NOBITS: +- debug("ddr zero pe%d @%x len %d\n", id, addr, size); ++printf("ddr zero pe%d @%x len %d\n", id, addr, size); + memset((void *)DDR_PFE_TO_VIRT(addr), 0, size); + + break; +@@ -565,7 +565,7 @@ static int pe_load_pe_lmem_section(int id, const void *data, Elf32_Shdr *shdr) + return -1; + } + +- debug("lmem pe%d @%x len %d\n", id, addr, size); ++printf("lmem pe%d @%x len %d\n", id, addr, size); + + switch (type) { + case SHT_PROGBITS: +@@ -895,10 +895,10 @@ void tmu_init(struct tmu_cfg *cfg) + } + + /* Extra packet pointers will be stored from this address onwards */ +- debug("TMU_LLM_BASE_ADDR %x\n", cfg->llm_base_addr); ++printf("TMU_LLM_BASE_ADDR %x\n", cfg->llm_base_addr); + writel(cfg->llm_base_addr, TMU_LLM_BASE_ADDR); + +- debug("TMU_LLM_QUE_LEN %x\n", cfg->llm_queue_len); ++printf("TMU_LLM_QUE_LEN %x\n", cfg->llm_queue_len); + writel(cfg->llm_queue_len, TMU_LLM_QUE_LEN); + + writel(5, TMU_TDQ_IIFG_CFG); +diff --git a/drivers/net/pfe_eth/pfe_mdio.c b/drivers/net/pfe_eth/pfe_mdio.c +index 3228b8df4..cc260cbdd 100644 +--- a/drivers/net/pfe_eth/pfe_mdio.c ++++ b/drivers/net/pfe_eth/pfe_mdio.c +@@ -99,7 +99,7 @@ static int pfe_phy_read(struct mii_dev *bus, int phy_addr, int dev_addr, + * it's now safe to read the PHY's register + */ + val = (u16)readl(reg_base + EMAC_MII_DATA_REG); +- debug("%s: %p phy: 0x%x reg:0x%08x val:%#x\n", __func__, reg_base, ++printf("%s: %p phy: 0x%x reg:0x%08x val:%#x\n", __func__, reg_base, + phy_addr, reg_addr, val); + + return val; +@@ -149,7 +149,7 @@ static int pfe_phy_write(struct mii_dev *bus, int phy_addr, int dev_addr, + */ + writel(EMAC_IEVENT_MII, reg_base + EMAC_IEVENT_REG); + +- debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phy_addr, ++printf("%s: phy: %02x reg:%02x val:%#x\n", __func__, phy_addr, + reg_addr, data); + + return 0; +diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c +index 9061afa62..c1d32709f 100644 +--- a/drivers/net/phy/aquantia.c ++++ b/drivers/net/phy/aquantia.c +@@ -136,7 +136,7 @@ static int aquantia_read_fw(u8 **fw_addr, size_t *fw_length) + + *fw_addr = NULL; + *fw_length = 0; +- debug("Loading Acquantia microcode from %s %s\n", ++printf("Loading Acquantia microcode from %s %s\n", + CONFIG_PHY_AQUANTIA_FW_PART, CONFIG_PHY_AQUANTIA_FW_NAME); + ret = fs_set_blk_dev("mmc", CONFIG_PHY_AQUANTIA_FW_PART, FS_TYPE_ANY); + if (ret < 0) +@@ -163,7 +163,7 @@ static int aquantia_read_fw(u8 **fw_addr, size_t *fw_length) + + *fw_addr = addr; + *fw_length = length; +- debug("Found Acquantia microcode.\n"); ++printf("Found Acquantia microcode.\n"); + + cleanup: + if (ret < 0) { +@@ -252,7 +252,7 @@ static int aquantia_upload_firmware(struct phy_device *phydev) + dram_offset = primary_offset + unpack_u24(header->dram_offset); + dram_size = unpack_u24(header->dram_size); + +- debug("primary %d iram offset=%d size=%d dram offset=%d size=%d\n", ++printf("primary %d iram offset=%d size=%d dram offset=%d size=%d\n", + primary_offset, iram_offset, iram_size, dram_offset, dram_size); + + strlcpy(version, (char *)&addr[dram_offset + VERSION_STRING_OFFSET], +@@ -263,14 +263,14 @@ static int aquantia_upload_firmware(struct phy_device *phydev) + phy_write(phydev, MDIO_MMD_VEND1, UP_CONTROL, + UP_RUN_STALL | UP_RUN_STALL_OVERRIDE); + +- debug("loading dram 0x%08x from offset=%d size=%d\n", ++printf("loading dram 0x%08x from offset=%d size=%d\n", + DRAM_BASE_ADDR, dram_offset, dram_size); + ret = aquantia_load_memory(phydev, DRAM_BASE_ADDR, &addr[dram_offset], + dram_size); + if (ret != 0) + goto done; + +- debug("loading iram 0x%08x from offset=%d size=%d\n", ++printf("loading iram 0x%08x from offset=%d size=%d\n", + IRAM_BASE_ADDR, iram_offset, iram_size); + ret = aquantia_load_memory(phydev, IRAM_BASE_ADDR, &addr[iram_offset], + iram_size); +@@ -352,7 +352,7 @@ static int aquantia_dts_config(struct phy_device *phydev) + return 0; + + if (!ofnode_read_u32(node, "mdi-reversal", &prop)) { +- debug("mdi-reversal = %d\n", (int)prop); ++printf("mdi-reversal = %d\n", (int)prop); + reg = phy_read(phydev, MDIO_MMD_PMAPMD, + AQUANTIA_PMA_RX_VENDOR_P1); + reg &= ~AQUANTIA_PMA_RX_VENDOR_P1_MDI_MSK; +@@ -362,7 +362,7 @@ static int aquantia_dts_config(struct phy_device *phydev) + reg); + } + if (!ofnode_read_u32(node, "smb-addr", &prop)) { +- debug("smb-addr = %x\n", (int)prop); ++printf("smb-addr = %x\n", (int)prop); + /* + * there are two addresses here, normally just one bus would + * be in use so we're setting both regs using the same DT +@@ -428,7 +428,7 @@ int aquantia_config(struct phy_device *phydev) + fault = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_FAULT); + + if (id != 0) +- debug("%s running firmware version %X.%X.%X\n", ++printf("%s running firmware version %X.%X.%X\n", + phydev->dev->name, (id >> 8), id & 0xff, + (rstatus >> 4) & 0xf); + +@@ -447,7 +447,7 @@ int aquantia_config(struct phy_device *phydev) + * on FW config + */ + if (interface == PHY_INTERFACE_MODE_XGMII) { +- debug("use XFI or USXGMII SI protos, XGMII is not valid\n"); ++printf("use XFI or USXGMII SI protos, XGMII is not valid\n"); + + reg_val1 = phy_read(phydev, MDIO_MMD_PHYXS, + AQUANTIA_SYSTEM_INTERFACE_SR); +@@ -511,11 +511,11 @@ int aquantia_config(struct phy_device *phydev) + + if (usx_an) { + reg_val1 |= AQUANTIA_USX_AUTONEG_CONTROL_ENA; +- debug("%s: system interface USXGMII\n", ++printf("%s: system interface USXGMII\n", + phydev->dev->name); + } else { + reg_val1 &= ~AQUANTIA_USX_AUTONEG_CONTROL_ENA; +- debug("%s: system interface XFI\n", ++printf("%s: system interface XFI\n", + phydev->dev->name); + } + +@@ -543,7 +543,7 @@ int aquantia_config(struct phy_device *phydev) + val = phy_read(phydev, MDIO_MMD_VEND1, AQUANTIA_RESERVED_STATUS); + reg_val1 = phy_read(phydev, MDIO_MMD_VEND1, AQUANTIA_FIRMWARE_ID); + +- debug("%s: %s Firmware Version %x.%x.%x\n", phydev->dev->name, ++printf("%s: %s Firmware Version %x.%x.%x\n", phydev->dev->name, + phydev->drv->name, + (reg_val1 & AQUANTIA_FIRMWARE_MAJOR_MASK) >> 8, + reg_val1 & AQUANTIA_FIRMWARE_MINOR_MASK, +diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c +index f922fecd6..ff28ee3ad 100644 +--- a/drivers/net/phy/atheros.c ++++ b/drivers/net/phy/atheros.c +@@ -208,7 +208,7 @@ static int ar803x_of_init(struct phy_device *phydev) + + phydev->priv = priv; + +- debug("%s: found PHY node: %s\n", __func__, ofnode_get_name(node)); ++printf("%s: found PHY node: %s\n", __func__, ofnode_get_name(node)); + + if (ofnode_read_bool(node, "qca,keep-pll-enabled")) + priv->flags |= AR803x_FLAG_KEEP_PLL_ENABLED; +@@ -304,7 +304,7 @@ static int ar803x_of_init(struct phy_device *phydev) + priv->clk_25m_reg |= FIELD_PREP(AR803x_CLK_25M_DR_MASK, sel); + } + +- debug("%s: flags=%x clk_25m_reg=%04x clk_25m_mask=%04x\n", __func__, ++printf("%s: flags=%x clk_25m_reg=%04x clk_25m_mask=%04x\n", __func__, + priv->flags, priv->clk_25m_reg, priv->clk_25m_mask); + #endif + +diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c +index b381a431f..e2224994c 100644 +--- a/drivers/net/phy/cortina.c ++++ b/drivers/net/phy/cortina.c +@@ -262,7 +262,7 @@ int cs4340_phy_init(struct phy_device *phydev) + #endif + reg_value = phy_read(phydev, 0x00, VILLA_GLOBAL_DWNLD_CHECKSUM_STATUS); + if (reg_value) { +- debug("%s checksum status failed.\n", __func__); ++printf("%s checksum status failed.\n", __func__); + return -1; + } + +diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c +index eada4541c..72281b703 100644 +--- a/drivers/net/phy/dp83867.c ++++ b/drivers/net/phy/dp83867.c +@@ -226,7 +226,7 @@ static int dp83867_of_init(struct phy_device *phydev) + ret = ofnode_read_u32(node, "ti,tx-internal-delay", + &dp83867->tx_id_delay); + if (ret) { +- debug("ti,tx-internal-delay must be specified\n"); ++printf("ti,tx-internal-delay must be specified\n"); + return ret; + } + if (dp83867->tx_id_delay > DP83867_RGMII_TX_CLK_DELAY_MAX) { +diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c +index d1a643cf5..7e4e28090 100644 +--- a/drivers/net/phy/mscc.c ++++ b/drivers/net/phy/mscc.c +@@ -984,7 +984,7 @@ static int vsc8584_config_pre_init(struct phy_device *phydev) + goto out; + + if (crc != MSCC_VSC8584_REVB_INT8051_FW_CRC) { +- debug("FW CRC is not the expected one, patching FW...\n"); ++printf("FW CRC is not the expected one, patching FW...\n"); + if (vsc8584_patch_fw(bus, phy0, fw_patch_vsc8584, + ARRAY_SIZE(fw_patch_vsc8584))) + pr_warn("failed to patch FW, expect non-optimal device\n"); +diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c +index 7eff37b24..3e45fa451 100644 +--- a/drivers/net/phy/mv88e61xx.c ++++ b/drivers/net/phy/mv88e61xx.c +@@ -924,7 +924,7 @@ static int mv88e61xx_priv_reg_offs_pre_init(struct phy_device *phydev) + return 0; + } + +- debug("%s Unknown ID 0x%x\n", __func__, priv->id); ++printf("%s Unknown ID 0x%x\n", __func__, priv->id); + return -ENODEV; + } + +@@ -986,7 +986,7 @@ static int mv88e61xx_probe(struct phy_device *phydev) + if (res < 0) + return res; + +- debug("%s ID 0x%x\n", __func__, priv->id); ++printf("%s ID 0x%x\n", __func__, priv->id); + + switch (priv->id) { + case PORT_SWITCH_ID_6096: +diff --git a/drivers/net/phy/mv88e6352.c b/drivers/net/phy/mv88e6352.c +index 62a7f1921..b64daf36e 100644 +--- a/drivers/net/phy/mv88e6352.c ++++ b/drivers/net/phy/mv88e6352.c +@@ -68,7 +68,7 @@ static int sw_reg_read(const char *devname, u8 phy_addr, u8 port, + + command = SMI_HDR | SMIRD_OP | ((port&SMI_MASK) << PORT_SHIFT) | + (reg & SMI_MASK); +- debug("%s: write to command: %#x\n", __func__, command); ++printf("%s: write to command: %#x\n", __func__, command); + ret = miiphy_write(devname, phy_addr, COMMAND_REG, command); + if (ret) + return ret; +@@ -92,14 +92,14 @@ static int sw_reg_write(const char *devname, u8 phy_addr, u8 port, + if (ret) + return ret; + +- debug("%s: write to data: %#x\n", __func__, data); ++printf("%s: write to data: %#x\n", __func__, data); + ret = miiphy_write(devname, phy_addr, DATA_REG, data); + if (ret) + return ret; + + value = SMI_HDR | SMIWR_OP | ((port & SMI_MASK) << PORT_SHIFT) | + (reg & SMI_MASK); +- debug("%s: write to command: %#x\n", __func__, value); ++printf("%s: write to command: %#x\n", __func__, value); + ret = miiphy_write(devname, phy_addr, COMMAND_REG, value); + if (ret) + return ret; +diff --git a/drivers/net/phy/ncsi.c b/drivers/net/phy/ncsi.c +index bf1e832be..a555f7800 100644 +--- a/drivers/net/phy/ncsi.c ++++ b/drivers/net/phy/ncsi.c +@@ -368,7 +368,7 @@ static void ncsi_rsp_cis(struct ncsi_rsp_pkt *pkt) + * This is fine in general but in the current design we + * don't send CIS commands to known channels. + */ +- debug("NCSI: Duplicate channel 0x%02x\n", nc); ++printf("NCSI: Duplicate channel 0x%02x\n", nc); + return; + } + +@@ -380,7 +380,7 @@ static void ncsi_rsp_cis(struct ncsi_rsp_pkt *pkt) + return; + } + +- debug("NCSI: New channel 0x%02x\n", nc); ++printf("NCSI: New channel 0x%02x\n", nc); + + package->channels[nc].id = nc; + package->channels[nc].has_link = false; +@@ -398,7 +398,7 @@ static void ncsi_rsp_dp(struct ncsi_rsp_pkt *pkt) + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + if (np >= ncsi_priv->n_packages) +- debug("NCSI: DP response from unknown package %d\n", np); ++printf("NCSI: DP response from unknown package %d\n", np); + } + + static void ncsi_rsp_sp(struct ncsi_rsp_pkt *pkt) +@@ -410,11 +410,11 @@ static void ncsi_rsp_sp(struct ncsi_rsp_pkt *pkt) + + if (np < ncsi_priv->n_packages) { + /* Already know about this package */ +- debug("NCSI: package 0x%02x selected\n", np); ++printf("NCSI: package 0x%02x selected\n", np); + return; + } + +- debug("NCSI: adding new package %d\n", np); ++printf("NCSI: adding new package %d\n", np); + + ncsi_priv->packages = realloc(ncsi_priv->packages, + sizeof(struct ncsi_package) * +@@ -585,7 +585,7 @@ static void ncsi_handle_aen(struct ip_udp_hdr *ip, unsigned int len) + break; + case NCSI_PKT_AEN_HNCDSC: + /* Host notifcation - N/A but weird */ +- debug("NCSI: HNCDSC AEN received\n"); ++printf("NCSI: HNCDSC AEN received\n"); + return; + default: + printf("%s: Invalid type 0x%02x\n", __func__, hdr->type); +diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c +index ed197fa46..4bd757f87 100644 +--- a/drivers/net/phy/phy.c ++++ b/drivers/net/phy/phy.c +@@ -309,8 +309,8 @@ int genphy_parse_link(struct phy_device *phydev) + */ + gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); + if (gblpa < 0) { +- debug("Could not read MII_STAT1000. "); +- debug("Ignoring gigabit capability\n"); ++printf("Could not read MII_STAT1000. "); ++printf("Ignoring gigabit capability\n"); + gblpa = 0; + } + gblpa &= phy_read(phydev, +@@ -818,14 +818,14 @@ static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, + return phydev; + } + +- debug("\n%s PHY: ", bus->name); ++printf("\n%s PHY: ", bus->name); + while (phy_mask) { + int addr = ffs(phy_mask) - 1; + +- debug("%d ", addr); ++printf("%d ", addr); + phy_mask &= ~(1 << addr); + } +- debug("not found\n"); ++printf("not found\n"); + + return NULL; + } +@@ -865,7 +865,7 @@ int phy_reset(struct phy_device *phydev) + #endif + + if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { +- debug("PHY reset failed\n"); ++printf("PHY reset failed\n"); + return -1; + } + +@@ -882,7 +882,7 @@ int phy_reset(struct phy_device *phydev) + reg = phy_read(phydev, devad, MII_BMCR); + + if (reg < 0) { +- debug("PHY status read failed\n"); ++printf("PHY status read failed\n"); + return -1; + } + udelay(1000); +@@ -939,7 +939,7 @@ void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) + phydev->dev->name, dev->name); + } + phydev->dev = dev; +- debug("%s connected to %s\n", dev->name, phydev->drv->name); ++printf("%s connected to %s\n", dev->name, phydev->drv->name); + } + + #ifdef CONFIG_PHY_XILINX_GMII2RGMII +diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c +index 635c0570e..3bcc4322a 100644 +--- a/drivers/net/phy/xilinx_gmii2rgmii.c ++++ b/drivers/net/phy/xilinx_gmii2rgmii.c +@@ -24,7 +24,7 @@ static int xilinxgmiitorgmii_config(struct phy_device *phydev) + int ext_phyaddr = -1; + int ret; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (!ofnode_valid(node)) + return -EINVAL; +@@ -47,7 +47,7 @@ static int xilinxgmiitorgmii_config(struct phy_device *phydev) + ext_phydev->node = phandle.node; + phydev->priv = ext_phydev; + +- debug("%s, gmii2rgmmi:0x%x, extphy:0x%x\n", __func__, phydev->addr, ++printf("%s, gmii2rgmmi:0x%x, extphy:0x%x\n", __func__, phydev->addr, + ext_phyaddr); + + if (ext_phydev->drv->config) +@@ -61,7 +61,7 @@ static int xilinxgmiitorgmii_extread(struct phy_device *phydev, int addr, + { + struct phy_device *ext_phydev = phydev->priv; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + if (ext_phydev->drv->readext) + ext_phydev->drv->readext(ext_phydev, addr, devaddr, regnum); + +@@ -74,7 +74,7 @@ static int xilinxgmiitorgmii_extwrite(struct phy_device *phydev, int addr, + { + struct phy_device *ext_phydev = phydev->priv; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + if (ext_phydev->drv->writeext) + ext_phydev->drv->writeext(ext_phydev, addr, devaddr, regnum, + val); +@@ -87,7 +87,7 @@ static int xilinxgmiitorgmii_startup(struct phy_device *phydev) + u16 val = 0; + struct phy_device *ext_phydev = phydev->priv; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + ext_phydev->dev = phydev->dev; + if (ext_phydev->drv->startup) + ext_phydev->drv->startup(ext_phydev); +@@ -112,7 +112,7 @@ static int xilinxgmiitorgmii_startup(struct phy_device *phydev) + + static int xilinxgmiitorgmii_probe(struct phy_device *phydev) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (phydev->interface != PHY_INTERFACE_MODE_GMII) { + printf("Incorrect interface type\n"); +diff --git a/drivers/net/phy/xilinx_phy.c b/drivers/net/phy/xilinx_phy.c +index 39dbfdb7d..e0cbdda42 100644 +--- a/drivers/net/phy/xilinx_phy.c ++++ b/drivers/net/phy/xilinx_phy.c +@@ -36,7 +36,7 @@ static int xilinxphy_startup(struct phy_device *phydev) + int err; + int status = 0; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + /* Update the link, but return if there + * was an error + */ +@@ -102,7 +102,7 @@ static int xilinxphy_of_init(struct phy_device *phydev) + u32 phytype; + ofnode node; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + node = phy_get_ofnode(phydev); + if (!ofnode_valid(node)) + return -EINVAL; +@@ -118,7 +118,7 @@ static int xilinxphy_config(struct phy_device *phydev) + { + int temp; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + xilinxphy_of_init(phydev); + temp = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); + temp &= XPCSPMA_PHY_CTRL_ISOLATE_DISABLE; +@@ -139,7 +139,7 @@ static struct phy_driver xilinxphy_driver = { + + int phy_xilinx_init(void) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + phy_register(&xilinxphy_driver); + + return 0; +diff --git a/drivers/net/pic32_eth.c b/drivers/net/pic32_eth.c +index 5a678d1cf..3e130b793 100644 +--- a/drivers/net/pic32_eth.c ++++ b/drivers/net/pic32_eth.c +@@ -403,7 +403,7 @@ static int pic32_eth_send(struct udevice *dev, void *packet, int length) + /* pass buffer address to hardware */ + txd->data_buff = virt_to_phys(packet); + +- debug("%s: %d / .hdr %x, .data_buff %x, .stat %x, .nexted %x\n", ++printf("%s: %d / .hdr %x, .data_buff %x, .stat %x, .nexted %x\n", + __func__, __LINE__, txd->hdr, txd->data_buff, txd->stat2, + txd->next_ed); + +@@ -468,13 +468,13 @@ static int pic32_eth_recv(struct udevice *dev, int flags, uchar **packetp) + return 0; + } + +- debug("%s: %d /idx %i, hdr=%x, data_buff %x, stat %x, nexted %x\n", ++printf("%s: %d /idx %i, hdr=%x, data_buff %x, stat %x, nexted %x\n", + __func__, __LINE__, idx, rxd->hdr, + rxd->data_buff, rxd->stat2, rxd->next_ed); + + /* Sanity check on rx_stat: OK, CRC */ + if (!RSV_RX_OK(rxd->stat2) || RSV_CRC_ERR(rxd->stat2)) { +- debug("%s: %s: Error, rx problem detected\n", ++printf("%s: %s: Error, rx problem detected\n", + __FILE__, __func__); + return 0; + } +@@ -513,7 +513,7 @@ static int pic32_eth_free_pkt(struct udevice *dev, uchar *packet, int length) + /* decrement rx pkt count */ + writel(ETHCON_BUFCDEC, &ectl_p->con1.set); + +- debug("%s: %d / idx %i, hdr %x, data_buff %x, stat %x, nexted %x\n", ++printf("%s: %d / idx %i, hdr %x, data_buff %x, stat %x, nexted %x\n", + __func__, __LINE__, idx, rxd->hdr, rxd->data_buff, + rxd->stat2, rxd->next_ed); + +@@ -556,7 +556,7 @@ static int pic32_eth_probe(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/qe/dm_qe_uec.c b/drivers/net/qe/dm_qe_uec.c +index eb0501bc5..eac2ccab2 100644 +--- a/drivers/net/qe/dm_qe_uec.c ++++ b/drivers/net/qe/dm_qe_uec.c +@@ -1143,7 +1143,7 @@ static int qe_uec_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/qe/dm_qe_uec_phy.c b/drivers/net/qe/dm_qe_uec_phy.c +index 038b81046..dac04274f 100644 +--- a/drivers/net/qe/dm_qe_uec_phy.c ++++ b/drivers/net/qe/dm_qe_uec_phy.c +@@ -30,7 +30,7 @@ qe_uec_mdio_read(struct udevice *dev, int addr, int devad, int reg) + u32 tmp_reg; + u16 value; + +- debug("%s: regs: %p addr: %x devad: %x reg: %x\n", __func__, regs, ++printf("%s: regs: %p addr: %x devad: %x reg: %x\n", __func__, regs, + addr, devad, reg); + /* Setting up the MII management Address Register */ + tmp_reg = ((u32)addr << MIIMADD_PHY_ADDRESS_SHIFT) | reg; +@@ -64,7 +64,7 @@ qe_uec_mdio_write(struct udevice *dev, int addr, int devad, int reg, + struct ucc_mii_mng *regs = priv->base; + u32 tmp_reg; + +- debug("%s: regs: %p addr: %x devad: %x reg: %x val: %x\n", __func__, ++printf("%s: regs: %p addr: %x devad: %x reg: %x val: %x\n", __func__, + regs, addr, devad, reg, value); + + /* Stop the MII management read cycle */ +diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c +index 6953b7286..9712bcee9 100644 +--- a/drivers/net/ravb.c ++++ b/drivers/net/ravb.c +@@ -657,7 +657,7 @@ int ravb_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c +index feeea930f..34dc35a7a 100644 +--- a/drivers/net/rtl8139.c ++++ b/drivers/net/rtl8139.c +@@ -619,7 +619,7 @@ int rtl8139_initialize(struct bd_info *bis) + pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); + iobase &= ~0xf; + +- debug("rtl8139: REALTEK RTL8139 @0x%x\n", iobase); ++printf("rtl8139: REALTEK RTL8139 @0x%x\n", iobase); + + priv = calloc(1, sizeof(*priv)); + if (!priv) { +@@ -742,7 +742,7 @@ static int rtl8139_probe(struct udevice *dev) + dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); + iobase &= ~0xf; + +- debug("rtl8139: REALTEK RTL8139 @0x%x\n", iobase); ++printf("rtl8139: REALTEK RTL8139 @0x%x\n", iobase); + + priv->devno = dev; + priv->ioaddr = (unsigned long)bus_to_phys(dev, iobase); +diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c +index da2cfb7f5..3f2a07c68 100644 +--- a/drivers/net/rtl8169.c ++++ b/drivers/net/rtl8169.c +@@ -1194,7 +1194,7 @@ static int rtl8169_eth_probe(struct udevice *dev) + int region; + int ret; + +- debug("rtl8169: REALTEK RTL8169 @0x%x\n", iobase); ++printf("rtl8169: REALTEK RTL8169 @0x%x\n", iobase); + switch (pplat->device) { + case 0x8168: + region = 2; +@@ -1222,7 +1222,7 @@ static int rtl8169_eth_probe(struct udevice *dev) + */ + + u32 val = RTL_R32(FuncEvent); +- debug("%s: FuncEvent/Misc (0xF0) = 0x%08X\n", __func__, val); ++printf("%s: FuncEvent/Misc (0xF0) = 0x%08X\n", __func__, val); + val &= ~RxDv_Gated_En; + RTL_W32(FuncEvent, val); + +diff --git a/drivers/net/sandbox-raw.c b/drivers/net/sandbox-raw.c +index ce66ff781..26587431b 100644 +--- a/drivers/net/sandbox-raw.c ++++ b/drivers/net/sandbox-raw.c +@@ -26,7 +26,7 @@ static int sb_eth_raw_start(struct udevice *dev) + struct eth_pdata *pdata = dev_get_plat(dev); + int ret; + +- debug("eth_sandbox_raw: Start\n"); ++printf("eth_sandbox_raw: Start\n"); + + ret = sandbox_eth_raw_os_start(priv, pdata->enetaddr); + if (priv->local) { +@@ -42,7 +42,7 @@ static int sb_eth_raw_send(struct udevice *dev, void *packet, int length) + { + struct eth_sandbox_raw_priv *priv = dev_get_priv(dev); + +- debug("eth_sandbox_raw: Send packet %d\n", length); ++printf("eth_sandbox_raw: Send packet %d\n", length); + + if (priv->local) { + struct ethernet_hdr *eth = packet; +@@ -116,7 +116,7 @@ static int sb_eth_raw_recv(struct udevice *dev, int flags, uchar **packetp) + length += ETHER_HDR_SIZE; + } + +- debug("eth_sandbox_raw: received packet %d\n", ++printf("eth_sandbox_raw: received packet %d\n", + length); + *packetp = net_rx_packets[0]; + return length; +@@ -128,7 +128,7 @@ static void sb_eth_raw_stop(struct udevice *dev) + { + struct eth_sandbox_raw_priv *priv = dev_get_priv(dev); + +- debug("eth_sandbox_raw: Stop\n"); ++printf("eth_sandbox_raw: Stop\n"); + + sandbox_eth_raw_os_stop(priv); + } +diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c +index 37459dfa0..cd1e11644 100644 +--- a/drivers/net/sandbox.c ++++ b/drivers/net/sandbox.c +@@ -324,7 +324,7 @@ static int sb_eth_start(struct udevice *dev) + { + struct eth_sandbox_priv *priv = dev_get_priv(dev); + +- debug("eth_sandbox: Start\n"); ++printf("eth_sandbox: Start\n"); + + priv->recv_packets = 0; + for (int i = 0; i < PKTBUFSRX; i++) { +@@ -339,7 +339,7 @@ static int sb_eth_send(struct udevice *dev, void *packet, int length) + { + struct eth_sandbox_priv *priv = dev_get_priv(dev); + +- debug("eth_sandbox: Send packet %d\n", length); ++printf("eth_sandbox: Send packet %d\n", length); + + if (priv->disabled) + return 0; +@@ -359,7 +359,7 @@ static int sb_eth_recv(struct udevice *dev, int flags, uchar **packetp) + if (priv->recv_packets) { + int lcl_recv_packet_length = priv->recv_packet_length[0]; + +- debug("eth_sandbox: received packet[%d], %d waiting\n", ++printf("eth_sandbox: received packet[%d], %d waiting\n", + lcl_recv_packet_length, priv->recv_packets - 1); + *packetp = priv->recv_packet_buffer[0]; + return lcl_recv_packet_length; +@@ -389,14 +389,14 @@ static int sb_eth_free_pkt(struct udevice *dev, uchar *packet, int length) + + static void sb_eth_stop(struct udevice *dev) + { +- debug("eth_sandbox: Stop\n"); ++printf("eth_sandbox: Stop\n"); + } + + static int sb_eth_write_hwaddr(struct udevice *dev) + { + struct eth_pdata *pdata = dev_get_plat(dev); + +- debug("eth_sandbox %s: Write HW ADDR - %pM\n", dev->name, ++printf("eth_sandbox %s: Write HW ADDR - %pM\n", dev->name, + pdata->enetaddr); + return 0; + } +diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c +index 3143a5813..c1ea970b5 100644 +--- a/drivers/net/sh_eth.c ++++ b/drivers/net/sh_eth.c +@@ -926,7 +926,7 @@ int sh_ether_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c +index d7553fe16..d4b8d7930 100644 +--- a/drivers/net/sun8i_emac.c ++++ b/drivers/net/sun8i_emac.c +@@ -369,7 +369,7 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata, + } + /* RMII not supported on A83T */ + default: +- debug("%s: Invalid PHY interface\n", __func__); ++printf("%s: Invalid PHY interface\n", __func__); + return -EINVAL; + } + +@@ -625,17 +625,17 @@ static int sun8i_emac_eth_recv(struct udevice *dev, int flags, uchar **packetp) + data_start + roundup(length, ARCH_DMA_MINALIGN)); + + if (status & EMAC_DESC_RX_ERROR_MASK) { +- debug("RX: packet error: 0x%x\n", ++printf("RX: packet error: 0x%x\n", + status & EMAC_DESC_RX_ERROR_MASK); + return 0; + } + if (length < 0x40) { +- debug("RX: Bad Packet (runt)\n"); ++printf("RX: Bad Packet (runt)\n"); + return 0; + } + + if (length > CONFIG_ETH_RXSIZE) { +- debug("RX: Too large packet (%d bytes)\n", length); ++printf("RX: Too large packet (%d bytes)\n", length); + return 0; + } + +@@ -765,7 +765,7 @@ static int sun8i_mdio_init(const char *name, struct udevice *priv) + struct mii_dev *bus = mdio_alloc(); + + if (!bus) { +- debug("Failed to allocate MDIO bus\n"); ++printf("Failed to allocate MDIO bus\n"); + return -ENOMEM; + } + +@@ -896,7 +896,7 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) + + pdata->iobase = dev_read_addr(dev); + if (pdata->iobase == FDT_ADDR_T_NONE) { +- debug("%s: Cannot find MAC base address\n", __func__); ++printf("%s: Cannot find MAC base address\n", __func__); + return -EINVAL; + } + +@@ -921,20 +921,20 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) + + offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon"); + if (offset < 0) { +- debug("%s: cannot find syscon node\n", __func__); ++printf("%s: cannot find syscon node\n", __func__); + return -EINVAL; + } + + reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL); + if (!reg) { +- debug("%s: cannot find reg property in syscon node\n", ++printf("%s: cannot find reg property in syscon node\n", + __func__); + return -EINVAL; + } + priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob, + offset, reg); + if (priv->sysctl_reg == FDT_ADDR_T_NONE) { +- debug("%s: Cannot find syscon base address\n", __func__); ++printf("%s: Cannot find syscon base address\n", __func__); + return -EINVAL; + } + +@@ -944,7 +944,7 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) + + offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy-handle"); + if (offset < 0) { +- debug("%s: Cannot find PHY address\n", __func__); ++printf("%s: Cannot find PHY address\n", __func__); + return -EINVAL; + } + priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1); +@@ -956,7 +956,7 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev) + printf("phy interface%d\n", pdata->phy_interface); + + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + +diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c +index 17ad88e73..6341ad492 100644 +--- a/drivers/net/sunxi_emac.c ++++ b/drivers/net/sunxi_emac.c +@@ -321,7 +321,7 @@ static void emac_reset(struct emac_eth_dev *priv) + { + struct emac_regs *regs = priv->regs; + +- debug("resetting device\n"); ++printf("resetting device\n"); + + /* RESET device */ + writel(0, ®s->ctl); +@@ -460,7 +460,7 @@ static int _sunxi_emac_eth_recv(struct emac_eth_dev *priv, void *packet) + /* Packet Status check */ + if (rx_len < 0x40) { + good_packet = 0; +- debug("RX: Bad Packet (runt)\n"); ++printf("RX: Bad Packet (runt)\n"); + } + + /* rx_status is identical to RSR register. */ +diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c +index 68f4191fe..7a9662bda 100644 +--- a/drivers/net/ti/cpsw.c ++++ b/drivers/net/ti/cpsw.c +@@ -1349,7 +1349,7 @@ static int cpsw_eth_of_to_plat(struct udevice *dev) + + pdata->phy_interface = data->slave_data[data->active_slave].phy_if; + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, ++printf("%s: Invalid PHY interface '%s'\n", __func__, + phy_string_for_interface(pdata->phy_interface)); + return -EINVAL; + } +diff --git a/drivers/net/ti/cpsw_mdio.c b/drivers/net/ti/cpsw_mdio.c +index f4cb86d10..1d3b2eb53 100644 +--- a/drivers/net/ti/cpsw_mdio.c ++++ b/drivers/net/ti/cpsw_mdio.c +@@ -137,13 +137,13 @@ struct mii_dev *cpsw_mdio_init(const char *name, phys_addr_t mdio_base, + + cpsw_mdio = calloc(1, sizeof(*cpsw_mdio)); + if (!cpsw_mdio) { +- debug("failed to alloc cpsw_mdio\n"); ++printf("failed to alloc cpsw_mdio\n"); + return NULL; + } + + cpsw_mdio->bus = mdio_alloc(); + if (!cpsw_mdio->bus) { +- debug("failed to alloc mii bus\n"); ++printf("failed to alloc mii bus\n"); + free(cpsw_mdio); + return NULL; + } +@@ -179,7 +179,7 @@ struct mii_dev *cpsw_mdio_init(const char *name, phys_addr_t mdio_base, + + ret = mdio_register(cpsw_mdio->bus); + if (ret < 0) { +- debug("failed to register mii bus\n"); ++printf("failed to register mii bus\n"); + goto free_bus; + } + +diff --git a/drivers/net/ti/davinci_emac.c b/drivers/net/ti/davinci_emac.c +index bfe1b84cd..fd7ff7684 100644 +--- a/drivers/net/ti/davinci_emac.c ++++ b/drivers/net/ti/davinci_emac.c +@@ -810,7 +810,7 @@ static int davinci_emac_probe(struct udevice *dev) + phy[i].get_link_speed = gen_get_link_speed; + phy[i].auto_negotiate = gen_auto_negotiate; + +- debug("Ethernet PHY: %s\n", phy[i].name); ++printf("Ethernet PHY: %s\n", phy[i].name); + + int retval; + struct mii_dev *mdiodev = mdio_alloc(); +diff --git a/drivers/net/vsc7385.c b/drivers/net/vsc7385.c +index af8d99cef..da7d5c524 100644 +--- a/drivers/net/vsc7385.c ++++ b/drivers/net/vsc7385.c +@@ -78,7 +78,7 @@ int vsc7385_upload_firmware(void *firmware, unsigned int size) + value = (u8) in_be32(icpu_data); + udelay(20); + if (value != fw[i]) { +- debug("VSC7385: Upload mismatch: address 0x%x, " ++printf("VSC7385: Upload mismatch: address 0x%x, " + "read value 0x%x, image value 0x%x\n", + i, value, fw[i]); + +diff --git a/drivers/net/vsc9953.c b/drivers/net/vsc9953.c +index 29f26b4b3..0850f5101 100644 +--- a/drivers/net/vsc9953.c ++++ b/drivers/net/vsc9953.c +@@ -86,7 +86,7 @@ static void vsc9953_mdio_write(struct vsc9953_mii_mng *phyregs, int port_addr, + udelay(1); + + if (timeout == 0) +- debug("Timeout waiting for MDIO write\n"); ++printf("Timeout waiting for MDIO write\n"); + } + + static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr, +@@ -98,7 +98,7 @@ static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr, + while ((in_le32(&phyregs->miimstatus) & MIIMIND_OPR_PEND) && --timeout) + udelay(1); + if (timeout == 0) { +- debug("Timeout waiting for MDIO operation to finish\n"); ++printf("Timeout waiting for MDIO operation to finish\n"); + return value; + } + +@@ -114,7 +114,7 @@ static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr, + while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout) + udelay(1); + if (timeout == 0) +- debug("Timeout waiting for MDIO read\n"); ++printf("Timeout waiting for MDIO read\n"); + + /* Grab the value read from the PHY */ + value = in_le32(&phyregs->miimdata); +@@ -210,7 +210,7 @@ static void vsc9953_vlan_table_membership_set(int vid, u32 port_no, u8 add) + VSC9953_ANA_OFFSET); + + if (vsc9953_vlan_table_poll_idle() < 0) { +- debug("VLAN table timeout\n"); ++printf("VLAN table timeout\n"); + return; + } + +@@ -222,7 +222,7 @@ static void vsc9953_vlan_table_membership_set(int vid, u32 port_no, u8 add) + VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ); + + if (vsc9953_vlan_table_poll_idle() < 0) { +- debug("VLAN table timeout\n"); ++printf("VLAN table timeout\n"); + return; + } + +@@ -247,7 +247,7 @@ static void vsc9953_vlan_table_membership_set(int vid, u32 port_no, u8 add) + + /* wait for VLAN table command to flush */ + if (vsc9953_vlan_table_poll_idle() < 0) { +- debug("VLAN table timeout\n"); ++printf("VLAN table timeout\n"); + return; + } + } +@@ -266,7 +266,7 @@ static void vsc9953_vlan_membership_show(int port_no) + + for (vid = 0; vid < VSC9953_MAX_VLAN; vid++) { + if (vsc9953_vlan_table_poll_idle() < 0) { +- debug("VLAN table timeout\n"); ++printf("VLAN table timeout\n"); + return; + } + +@@ -279,7 +279,7 @@ static void vsc9953_vlan_membership_show(int port_no) + VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ); + + if (vsc9953_vlan_table_poll_idle() < 0) { +- debug("VLAN table timeout\n"); ++printf("VLAN table timeout\n"); + return; + } + +@@ -303,7 +303,7 @@ static void vsc9953_vlan_table_membership_all_set(int vid, int set_member) + VSC9953_ANA_OFFSET); + + if (vsc9953_vlan_table_poll_idle() < 0) { +- debug("VLAN table timeout\n"); ++printf("VLAN table timeout\n"); + return; + } + +@@ -316,7 +316,7 @@ static void vsc9953_vlan_table_membership_all_set(int vid, int set_member) + VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ); + + if (vsc9953_vlan_table_poll_idle() < 0) { +- debug("VLAN table timeout\n"); ++printf("VLAN table timeout\n"); + return; + } + +@@ -1119,7 +1119,7 @@ static int vsc9953_mac_table_cmd(enum mac_table_cmd cmd) + } + + if (vsc9953_mac_table_poll_idle() < 0) { +- debug("MAC table timeout\n"); ++printf("MAC table timeout\n"); + return -1; + } + +@@ -1177,7 +1177,7 @@ static void vsc9953_mac_table_show(int port_no, int vid) + printf("%10s %17s %5s %4s\n", "EntryType", "MAC", "PORT", "VID"); + do { + if (vsc9953_mac_table_cmd(MAC_TABLE_GET_NEXT) < 0) { +- debug("GET NEXT MAC table command failed\n"); ++printf("GET NEXT MAC table command failed\n"); + break; + } + +@@ -1306,7 +1306,7 @@ static int vsc9953_mac_table_del(uchar mac[6], u16 vid) + (mac[5] << 0)); + + if (vsc9953_mac_table_cmd(MAC_TABLE_LOOKUP) < 0) { +- debug("Lookup in the MAC table failed\n"); ++printf("Lookup in the MAC table failed\n"); + return -1; + } + +@@ -1340,7 +1340,7 @@ static int vsc9953_mac_table_del(uchar mac[6], u16 vid) + (mac[3] << 16) | (mac[4] << 8) | (mac[5] << 0)); + + if (vsc9953_mac_table_cmd(MAC_TABLE_LOOKUP) < 0) { +- debug("Lookup in the MAC table failed\n"); ++printf("Lookup in the MAC table failed\n"); + return -1; + } + if (in_le32(&l2ana_reg->ana_tables.mac_access) & +@@ -2457,7 +2457,7 @@ void vsc9953_default_configuration(void) + int i; + + if (vsc9953_autoage_time_set(VSC9953_DEFAULT_AGE_TIME)) +- debug("VSC9953: failed to set AGE time to %d\n", ++printf("VSC9953: failed to set AGE time to %d\n", + VSC9953_DEFAULT_AGE_TIME); + + for (i = 0; i < VSC9953_MAX_VLAN; i++) +@@ -2469,7 +2469,7 @@ void vsc9953_default_configuration(void) + vsc9953_vlan_ingr_fltr_learn_drop(1); + vsc9953_port_all_vlan_egress_untagged_set(EGRESS_UNTAG_PVID_AND_ZERO); + if (vsc9953_aggr_code_set(AGGR_CODE_ALL)) +- debug("VSC9953: failed to set default aggregation code mode\n"); ++printf("VSC9953: failed to set default aggregation code mode\n"); + } + + static void vcap_entry2cache_init(u32 target, u32 entry_words) +@@ -2545,7 +2545,7 @@ static void vsc9953_vcap_init(void) + cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, TCAM_SEL_ENTRY, + ENTRY_WORDS_ES0); + if (cmd_ret != CMD_RET_SUCCESS) +- debug("VSC9953:%d invalid TCAM_SEL_ENTRY\n", ++printf("VSC9953:%d invalid TCAM_SEL_ENTRY\n", + __LINE__); + + /* write actions and counters */ +@@ -2557,7 +2557,7 @@ static void vsc9953_vcap_init(void) + cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, + TCAM_SEL_ACTION | TCAM_SEL_COUNTER, ENTRY_WORDS_ES0); + if (cmd_ret != CMD_RET_SUCCESS) +- debug("VSC9953:%d invalid TCAM_SEL_ACTION | TCAM_SEL_COUNTER\n", ++printf("VSC9953:%d invalid TCAM_SEL_ACTION | TCAM_SEL_COUNTER\n", + __LINE__); + + tgt = VSC9953_IS1; +@@ -2567,7 +2567,7 @@ static void vsc9953_vcap_init(void) + cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, TCAM_SEL_ENTRY, + ENTRY_WORDS_IS1); + if (cmd_ret != CMD_RET_SUCCESS) +- debug("VSC9953:%d invalid TCAM_SEL_ENTRY\n", ++printf("VSC9953:%d invalid TCAM_SEL_ENTRY\n", + __LINE__); + + /* write actions and counters */ +@@ -2579,7 +2579,7 @@ static void vsc9953_vcap_init(void) + cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, + TCAM_SEL_ACTION | TCAM_SEL_COUNTER, ENTRY_WORDS_IS1); + if (cmd_ret != CMD_RET_SUCCESS) +- debug("VSC9953:%d invalid TCAM_SEL_ACTION | TCAM_SEL_COUNTER\n", ++printf("VSC9953:%d invalid TCAM_SEL_ACTION | TCAM_SEL_COUNTER\n", + __LINE__); + + tgt = VSC9953_IS2; +@@ -2589,7 +2589,7 @@ static void vsc9953_vcap_init(void) + cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, TCAM_SEL_ENTRY, + ENTRY_WORDS_IS2); + if (cmd_ret != CMD_RET_SUCCESS) +- debug("VSC9953:%d invalid selection: TCAM_SEL_ENTRY\n", ++printf("VSC9953:%d invalid selection: TCAM_SEL_ENTRY\n", + __LINE__); + + /* write actions and counters */ +@@ -2601,7 +2601,7 @@ static void vsc9953_vcap_init(void) + cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, + TCAM_SEL_ACTION | TCAM_SEL_COUNTER, ENTRY_WORDS_IS2); + if (cmd_ret != CMD_RET_SUCCESS) +- debug("VSC9953:%d invalid TCAM_SEL_ACTION | TCAM_SEL_COUNTER\n", ++printf("VSC9953:%d invalid TCAM_SEL_ACTION | TCAM_SEL_COUNTER\n", + __LINE__); + } + +@@ -2639,7 +2639,7 @@ void vsc9953_init(struct bd_info *bis) + VSC9953_SOFT_SWC_RST_ENA) && --timeout) + udelay(1); /* busy wait for vsc9953 soft reset */ + if (timeout == 0) +- debug("Timeout waiting for VSC9953 to reset\n"); ++printf("Timeout waiting for VSC9953 to reset\n"); + + out_le32(&l2sys_reg->sys.reset_cfg, VSC9953_MEM_ENABLE | + VSC9953_MEM_INIT); +@@ -2649,7 +2649,7 @@ void vsc9953_init(struct bd_info *bis) + VSC9953_MEM_INIT) && --timeout) + udelay(1); /* busy wait for vsc9953 memory init */ + if (timeout == 0) +- debug("Timeout waiting for VSC9953 memory to initialize\n"); ++printf("Timeout waiting for VSC9953 memory to initialize\n"); + + out_le32(&l2sys_reg->sys.reset_cfg, (in_le32(&l2sys_reg->sys.reset_cfg) + | VSC9953_CORE_ENABLE)); +@@ -2737,7 +2737,7 @@ void vsc9953_init(struct bd_info *bis) + phy_addr, 0x01) & 0x0020) && --timeout) + udelay(1); /* wait for AN to complete */ + if (timeout == 0) +- debug("Timeout waiting for AN to complete\n"); ++printf("Timeout waiting for AN to complete\n"); + } + } + +@@ -2746,7 +2746,7 @@ void vsc9953_init(struct bd_info *bis) + + #ifdef CONFIG_CMD_ETHSW + if (ethsw_define_functions(&vsc9953_cmd_func) < 0) +- debug("Unable to use \"ethsw\" commands\n"); ++printf("Unable to use \"ethsw\" commands\n"); + #endif + + printf("VSC9953 L2 switch initialized\n"); +diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c +index 2ce6271af..51b8466bf 100644 +--- a/drivers/net/xilinx_axi_emac.c ++++ b/drivers/net/xilinx_axi_emac.c +@@ -269,7 +269,7 @@ static int axiemac_phy_init(struct udevice *dev) + ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { + /* Found a valid PHY address */ + priv->phyaddr = i; +- debug("axiemac: Found valid phy address, %x\n", ++printf("axiemac: Found valid phy address, %x\n", + i); + break; + } +@@ -372,7 +372,7 @@ static void axiemac_stop(struct udevice *dev) + temp &= ~XAXIDMA_CR_RUNSTOP_MASK; + writel(temp, &priv->dmarx->control); + +- debug("axiemac: Halted\n"); ++printf("axiemac: Halted\n"); + } + + static int axi_ethernet_init(struct axidma_priv *priv) +@@ -420,7 +420,7 @@ static int axi_ethernet_init(struct axidma_priv *priv) + /* Set default MDIO divisor */ + writel(XAE_MDIO_DIV_DFT | XAE_MDIO_MC_MDIOEN_MASK, ®s->mdio_mc); + +- debug("axiemac: InitHw done\n"); ++printf("axiemac: InitHw done\n"); + return 0; + } + +@@ -470,7 +470,7 @@ static int axiemac_start(struct udevice *dev) + struct axi_regs *regs = priv->iobase; + u32 temp; + +- debug("axiemac: Init started\n"); ++printf("axiemac: Init started\n"); + /* + * Initialize AXIDMA engine. AXIDMA engine must be initialized before + * AxiEthernet. During AXIDMA engine initialization, AXIDMA hardware is +@@ -526,7 +526,7 @@ static int axiemac_start(struct udevice *dev) + return -1; + } + +- debug("axiemac: Init complete\n"); ++printf("axiemac: Init complete\n"); + return 0; + } + +@@ -570,7 +570,7 @@ static int axiemac_send(struct udevice *dev, void *ptr, int len) + axienet_dma_write(&tx_bd, &priv->dmatx->tail); + + /* Wait for transmission to complete */ +- debug("axiemac: Waiting for tx to be done\n"); ++printf("axiemac: Waiting for tx to be done\n"); + timeout = 200; + while (timeout && (!(readl(&priv->dmatx->status) & + (XAXIDMA_IRQ_DELAY_MASK | XAXIDMA_IRQ_IOC_MASK)))) { +@@ -582,7 +582,7 @@ static int axiemac_send(struct udevice *dev, void *ptr, int len) + return 1; + } + +- debug("axiemac: Sending complete\n"); ++printf("axiemac: Sending complete\n"); + return 0; + } + +@@ -616,7 +616,7 @@ static int axiemac_recv(struct udevice *dev, int flags, uchar **packetp) + if (!isrxready(priv)) + return -1; + +- debug("axiemac: RX data ready\n"); ++printf("axiemac: RX data ready\n"); + + /* Disable IRQ for a moment till packet is handled */ + temp = readl(&priv->dmarx->control); +@@ -664,7 +664,7 @@ static int axiemac_free_pkt(struct udevice *dev, uchar *packet, int length) + /* Rx BD is ready - start again */ + axienet_dma_write(&rx_bd, &priv->dmarx->tail); + +- debug("axiemac: RX completed, framelength = %d\n", length); ++printf("axiemac: RX completed, framelength = %d\n", length); + + return 0; + } +@@ -676,7 +676,7 @@ static int axiemac_miiphy_read(struct mii_dev *bus, int addr, + u16 value; + + ret = phyread(bus->priv, addr, reg, &value); +- debug("axiemac: Read MII 0x%x, 0x%x, 0x%x, %d\n", addr, reg, ++printf("axiemac: Read MII 0x%x, 0x%x, 0x%x, %d\n", addr, reg, + value, ret); + return value; + } +@@ -684,7 +684,7 @@ static int axiemac_miiphy_read(struct mii_dev *bus, int addr, + static int axiemac_miiphy_write(struct mii_dev *bus, int addr, int devad, + int reg, u16 value) + { +- debug("axiemac: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, value); ++printf("axiemac: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, value); + return phywrite(bus->priv, addr, reg, value); + } + +diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c +index 43fc36dc6..afc151393 100644 +--- a/drivers/net/xilinx_emaclite.c ++++ b/drivers/net/xilinx_emaclite.c +@@ -176,7 +176,7 @@ static int wait_for_bit(const char *func, u32 *reg, const u32 mask, + udelay(1); + } + +- debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n", ++printf("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n", + func, reg, mask, set); + + return -ETIMEDOUT; +@@ -239,7 +239,7 @@ static u32 phywrite(struct xemaclite *emaclite, u32 phyaddress, u32 registernum, + + static void emaclite_stop(struct udevice *dev) + { +- debug("eth_stop\n"); ++printf("eth_stop\n"); + } + + /* Use MII register 1 (MII status register) to detect PHY */ +@@ -270,10 +270,10 @@ static int setup_phy(struct udevice *dev) + if ((phyreg != 0xFFFF) && + ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { + /* Found a valid PHY address */ +- debug("Default phy address %d is valid\n", ++printf("Default phy address %d is valid\n", + emaclite->phyaddr); + } else { +- debug("PHY address is not setup correctly %d\n", ++printf("PHY address is not setup correctly %d\n", + emaclite->phyaddr); + emaclite->phyaddr = -1; + } +@@ -287,7 +287,7 @@ static int setup_phy(struct udevice *dev) + ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { + /* Found a valid PHY address */ + emaclite->phyaddr = i; +- debug("emaclite: Found valid phy address, %d\n", ++printf("emaclite: Found valid phy address, %d\n", + i); + break; + } +@@ -326,7 +326,7 @@ static int emaclite_start(struct udevice *dev) + struct eth_pdata *pdata = dev_get_plat(dev); + struct emaclite_regs *regs = emaclite->regs; + +- debug("EmacLite Initialization Started\n"); ++printf("EmacLite Initialization Started\n"); + + /* + * TX - TX_PING & TX_PONG initialization +@@ -371,7 +371,7 @@ static int emaclite_start(struct udevice *dev) + if (!setup_phy(dev)) + return -1; + +- debug("EmacLite Initialization complete\n"); ++printf("EmacLite Initialization complete\n"); + return 0; + } + +@@ -420,7 +420,7 @@ static int emaclite_send(struct udevice *dev, void *ptr, int len) + /* Determine if the expected buffer address is empty */ + reg = __raw_readl(®s->tx_ping_tsr); + if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { +- debug("Send packet from tx_ping buffer\n"); ++printf("Send packet from tx_ping buffer\n"); + /* Write the frame to the buffer */ + xemaclite_alignedwrite(ptr, ®s->tx_ping, len); + __raw_writel(len +@@ -436,7 +436,7 @@ static int emaclite_send(struct udevice *dev, void *ptr, int len) + /* Determine if the expected buffer address is empty */ + reg = __raw_readl(®s->tx_pong_tsr); + if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { +- debug("Send packet from tx_pong buffer\n"); ++printf("Send packet from tx_pong buffer\n"); + /* Write the frame to the buffer */ + xemaclite_alignedwrite(ptr, ®s->tx_pong, len); + __raw_writel(len & +@@ -466,13 +466,13 @@ static int emaclite_recv(struct udevice *dev, int flags, uchar **packetp) + try_again: + if (!emaclite->use_rx_pong_buffer_next) { + reg = __raw_readl(®s->rx_ping_rsr); +- debug("Testing data at rx_ping\n"); ++printf("Testing data at rx_ping\n"); + if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { +- debug("Data found in rx_ping buffer\n"); ++printf("Data found in rx_ping buffer\n"); + addr = ®s->rx_ping; + ack = ®s->rx_ping_rsr; + } else { +- debug("Data not found in rx_ping buffer\n"); ++printf("Data not found in rx_ping buffer\n"); + /* Pong buffer is not available - return immediately */ + if (!emaclite->rxpp) + return -1; +@@ -486,13 +486,13 @@ try_again: + } + } else { + reg = __raw_readl(®s->rx_pong_rsr); +- debug("Testing data at rx_pong\n"); ++printf("Testing data at rx_pong\n"); + if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { +- debug("Data found in rx_pong buffer\n"); ++printf("Data found in rx_pong buffer\n"); + addr = ®s->rx_pong; + ack = ®s->rx_pong_rsr; + } else { +- debug("Data not found in rx_pong buffer\n"); ++printf("Data not found in rx_pong buffer\n"); + /* Try ping buffer if this is first attempt */ + if (attempt++) + return -1; +@@ -511,16 +511,16 @@ try_again: + switch (ntohs(eth->et_protlen)) { + case PROT_ARP: + length = first_read; +- debug("ARP Packet %x\n", length); ++printf("ARP Packet %x\n", length); + break; + case PROT_IP: + ip = (struct ip_udp_hdr *)(etherrxbuff + ETHER_HDR_SIZE); + length = ntohs(ip->ip_len); + length += ETHER_HDR_SIZE + ETH_FCS_LEN; +- debug("IP Packet %x\n", length); ++printf("IP Packet %x\n", length); + break; + default: +- debug("Other Packet\n"); ++printf("Other Packet\n"); + length = PKTSIZE; + break; + } +@@ -536,7 +536,7 @@ try_again: + reg &= ~XEL_RSR_RECV_DONE_MASK; + __raw_writel(reg, ack); + +- debug("Packet receive from 0x%p, length %dB\n", addr, length); ++printf("Packet receive from 0x%p, length %dB\n", addr, length); + *packetp = etherrxbuff; + return length; + } +@@ -548,14 +548,14 @@ static int emaclite_miiphy_read(struct mii_dev *bus, int addr, + u16 val = 0; + + ret = phyread(bus->priv, addr, reg, &val); +- debug("emaclite: Read MII 0x%x, 0x%x, 0x%x, %d\n", addr, reg, val, ret); ++printf("emaclite: Read MII 0x%x, 0x%x, 0x%x, %d\n", addr, reg, val, ret); + return val; + } + + static int emaclite_miiphy_write(struct mii_dev *bus, int addr, int devad, + int reg, u16 value) + { +- debug("emaclite: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, value); ++printf("emaclite: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, value); + return phywrite(bus->priv, addr, reg, value); + } + +diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c +index ff5998226..2a4f26863 100644 +--- a/drivers/net/zynq_gem.c ++++ b/drivers/net/zynq_gem.c +@@ -255,7 +255,7 @@ static int phyread(struct zynq_gem_priv *priv, u32 phy_addr, + ZYNQ_GEM_PHYMNTNC_OP_R_MASK, val); + + if (!ret) +- debug("%s: phy_addr %d, regnum 0x%x, val 0x%x\n", __func__, ++printf("%s: phy_addr %d, regnum 0x%x, val 0x%x\n", __func__, + phy_addr, regnum, *val); + + return ret; +@@ -264,7 +264,7 @@ static int phyread(struct zynq_gem_priv *priv, u32 phy_addr, + static int phywrite(struct zynq_gem_priv *priv, u32 phy_addr, + u32 regnum, u16 data) + { +- debug("%s: phy_addr %d, regnum 0x%x, data 0x%x\n", __func__, phy_addr, ++printf("%s: phy_addr %d, regnum 0x%x, data 0x%x\n", __func__, phy_addr, + regnum, data); + + return phy_setup_op(priv, phy_addr, regnum, +@@ -360,7 +360,7 @@ static int zynq_gem_init(struct udevice *dev) + } + #else + if (priv->dma_64bit) +- debug("WARN: %s: Not using 64-bit dma even HW supports it\n", ++printf("WARN: %s: Not using 64-bit dma even HW supports it\n", + __func__); + #endif + +@@ -671,7 +671,7 @@ static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr, + u16 val = 0; + + ret = phyread(priv, addr, reg, &val); +- debug("%s 0x%x, 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val, ret); ++printf("%s 0x%x, 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val, ret); + return val; + } + +@@ -680,7 +680,7 @@ static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad, + { + struct zynq_gem_priv *priv = bus->priv; + +- debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, value); ++printf("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, value); + return phywrite(priv, addr, reg, value); + } + +@@ -791,7 +791,7 @@ static int zynq_gem_of_to_plat(struct udevice *dev) + fdt_addr_t addr; + ofnode parent; + +- debug("phy-handle does exist %s\n", dev->name); ++printf("phy-handle does exist %s\n", dev->name); + priv->phyaddr = ofnode_read_u32_default(phandle_args.node, + "reg", -1); + priv->phy_of_node = phandle_args.node; +@@ -802,7 +802,7 @@ static int zynq_gem_of_to_plat(struct udevice *dev) + parent = ofnode_get_parent(phandle_args.node); + addr = ofnode_get_addr(parent); + if (addr != FDT_ADDR_T_NONE) { +- debug("MDIO bus not found %s\n", dev->name); ++printf("MDIO bus not found %s\n", dev->name); + priv->mdiobase = (struct zynq_gem_regs *)addr; + } + } +@@ -811,7 +811,7 @@ static int zynq_gem_of_to_plat(struct udevice *dev) + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { +- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); ++printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + priv->interface = pdata->phy_interface; +diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c +index f6465ea7f..47f51a8df 100644 +--- a/drivers/nvme/nvme.c ++++ b/drivers/nvme/nvme.c +@@ -363,13 +363,13 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) + unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12; + + if (page_shift < dev_page_min) { +- debug("Device minimum page size (%u) too large for host (%u)\n", ++printf("Device minimum page size (%u) too large for host (%u)\n", + 1 << dev_page_min, 1 << page_shift); + return -ENODEV; + } + + if (page_shift > dev_page_max) { +- debug("Device maximum page size (%u) smaller than host (%u)\n", ++printf("Device maximum page size (%u) smaller than host (%u)\n", + 1 << dev_page_max, 1 << page_shift); + page_shift = dev_page_max; + } +diff --git a/drivers/pch/pch7.c b/drivers/pch/pch7.c +index 5fb35a19e..e957ec7df 100644 +--- a/drivers/pch/pch7.c ++++ b/drivers/pch/pch7.c +@@ -54,7 +54,7 @@ static int pch7_get_gpio_base(struct udevice *dev, u32 *gbasep) + */ + dm_pci_read_config32(dev, GPIO_BASE, &base); + if (base == 0x00000000 || base == 0xffffffff) { +- debug("%s: unexpected BASE value\n", __func__); ++printf("%s: unexpected BASE value\n", __func__); + return -ENODEV; + } + +diff --git a/drivers/pch/pch9.c b/drivers/pch/pch9.c +index 3bd011518..00069ee55 100644 +--- a/drivers/pch/pch9.c ++++ b/drivers/pch/pch9.c +@@ -38,7 +38,7 @@ static int pch9_get_gpio_base(struct udevice *dev, u32 *gbasep) + */ + dm_pci_read_config32(dev, GPIO_BASE, &base); + if (base == 0x00000000 || base == 0xffffffff) { +- debug("%s: unexpected BASE value\n", __func__); ++printf("%s: unexpected BASE value\n", __func__); + return -ENODEV; + } + +@@ -59,7 +59,7 @@ static int pch9_get_io_base(struct udevice *dev, u32 *iobasep) + + dm_pci_read_config32(dev, IO_BASE, &base); + if (base == 0x00000000 || base == 0xffffffff) { +- debug("%s: unexpected BASE value\n", __func__); ++printf("%s: unexpected BASE value\n", __func__); + return -ENODEV; + } + +diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c +index fc3327ec5..6688d631d 100644 +--- a/drivers/pci/fsl_pci_init.c ++++ b/drivers/pci/fsl_pci_init.c +@@ -210,7 +210,7 @@ static int fsl_pci_setup_inbound_windows(struct pci_controller *hose, + static void fsl_pcie_boot_master(pit_t *pi) + { + /* configure inbound window for slave's u-boot image */ +- debug("PCIEBOOT - MASTER: Inbound window for slave's image; " ++printf("PCIEBOOT - MASTER: Inbound window for slave's image; " + "Local = 0x%llx, Bus = 0x%llx, Size = 0x%x\n", + (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, + (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1, +@@ -228,7 +228,7 @@ static void fsl_pcie_boot_master(pit_t *pi) + CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); + + /* configure inbound window for slave's u-boot image */ +- debug("PCIEBOOT - MASTER: Inbound window for slave's image; " ++printf("PCIEBOOT - MASTER: Inbound window for slave's image; " + "Local = 0x%llx, Bus = 0x%llx, Size = 0x%x\n", + (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS, + (u64)CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2, +@@ -243,7 +243,7 @@ static void fsl_pcie_boot_master(pit_t *pi) + CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE); + + /* configure inbound window for slave's ucode and ENV */ +- debug("PCIEBOOT - MASTER: Inbound window for slave's " ++printf("PCIEBOOT - MASTER: Inbound window for slave's " + "ucode and ENV; " + "Local = 0x%llx, Bus = 0x%llx, Size = 0x%x\n", + (u64)CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS, +@@ -290,10 +290,10 @@ static void fsl_pcie_boot_master_release_slave(int port) + if (release_addr != 0) { + out_be32((void *)release_addr, + CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK); +- debug("PCIEBOOT - MASTER: " ++printf("PCIEBOOT - MASTER: " + "Release slave successfully! Now the slave should start up!\n"); + } else { +- debug("PCIEBOOT - MASTER: " ++printf("PCIEBOOT - MASTER: " + "Release slave failed!\n"); + } + } +@@ -373,7 +373,7 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) + po++; + } + } +- debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); ++printf("Outbound memory range: %llx:%llx\n", out_lo, out_hi); + + /* setup PCSRBAR/PEXCSRBAR */ + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff); +@@ -389,7 +389,7 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) + + out_lo = min(out_lo, (u64)pcicsrbar); + +- debug("PCICSRBAR @ 0x%x\n", pcicsrbar); ++printf("PCICSRBAR @ 0x%x\n", pcicsrbar); + + pci_set_region(reg++, pcicsrbar, CONFIG_SYS_CCSRBAR_PHYS, + pcicsrbar_sz, PCI_REGION_SYS_MEMORY); +@@ -410,7 +410,7 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) + sprintf(pcie, "PCIE%d", pci_info->pci_num); + + if (s && (strcmp(s, pcie) == 0)) { +- debug("PCIEBOOT - MASTER: Master port [ %d ] for pcie boot.\n", ++printf("PCIEBOOT - MASTER: Master port [ %d ] for pcie boot.\n", + pci_info->pci_num); + fsl_pcie_boot_master((pit_t *)pi); + } else { +@@ -424,7 +424,7 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) + #endif + + for (r = 0; r < hose->region_count; r++) +- debug("PCI reg:%d %016llx:%016llx %016llx %08lx\n", r, ++printf("PCI reg:%d %016llx:%016llx %016llx %08lx\n", r, + (u64)hose->regions[r].phys_start, + (u64)hose->regions[r].bus_start, + (u64)hose->regions[r].size, +@@ -483,12 +483,12 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) + #ifdef CONFIG_FSL_PCIE_RESET + if (ltssm == 1) { + int i; +- debug("....PCIe link error. " "LTSSM=0x%02x.", ltssm); ++printf("....PCIe link error. " "LTSSM=0x%02x.", ltssm); + /* assert PCIe reset */ + setbits_be32(&pci->pdb_stat, 0x08000000); + (void) in_be32(&pci->pdb_stat); + udelay(100); +- debug(" Asserting PCIe reset @%p = %x\n", ++printf(" Asserting PCIe reset @%p = %x\n", + &pci->pdb_stat, in_be32(&pci->pdb_stat)); + /* clear PCIe reset */ + clrbits_be32(&pci->pdb_stat, 0x08000000); +@@ -497,7 +497,7 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) + pci_hose_read_config_word(hose, dev, PCI_LTSSM, + <ssm); + udelay(1000); +- debug("....PCIe link error. " ++printf("....PCIe link error. " + "LTSSM=0x%02x.\n", ltssm); + } + enabled = ltssm >= PCI_LTSSM_L0; +@@ -580,11 +580,11 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) + + #ifndef CONFIG_PCI_NOSCAN + if (!fsl_is_pci_agent(hose)) { +- debug(" Scanning PCI bus %02x\n", ++printf(" Scanning PCI bus %02x\n", + hose->current_busno); + hose->last_busno = pci_hose_scan_bus(hose, hose->current_busno); + } else { +- debug(" Not scanning PCI bus %02x. PI=%x\n", ++printf(" Not scanning PCI bus %02x. PI=%x\n", + hose->current_busno, temp8); + hose->last_busno = hose->current_busno; + } +diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c +index a0b8afb87..55fcadea8 100644 +--- a/drivers/pci/pci-emul-uclass.c ++++ b/drivers/pci/pci-emul-uclass.c +@@ -26,7 +26,7 @@ int sandbox_pci_get_emul(const struct udevice *bus, pci_dev_t find_devfn, + *containerp = NULL; + ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(find_devfn), &dev); + if (ret) { +- debug("%s: Could not find emulator for dev %x\n", __func__, ++printf("%s: Could not find emulator for dev %x\n", __func__, + find_devfn); + return ret; + } +diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c +index 22a033e63..bce282c2a 100644 +--- a/drivers/pci/pci-uclass.c ++++ b/drivers/pci/pci-uclass.c +@@ -87,7 +87,7 @@ static int pci_get_bus_max(void) + ret = dev_seq(bus); + } + +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + + return ret; + } +@@ -532,7 +532,7 @@ int pci_auto_config_devices(struct udevice *bus) + int ret; + + sub_bus = dev_seq(bus); +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + pciauto_config_init(hose); + for (ret = device_find_first_child(bus, &dev); + !ret && dev; +@@ -540,7 +540,7 @@ int pci_auto_config_devices(struct udevice *bus) + unsigned int max_bus; + int ret; + +- debug("%s: device %s\n", __func__, dev->name); ++printf("%s: device %s\n", __func__, dev->name); + if (dev_has_ofnode(dev) && + dev_read_bool(dev, "pci,no-autoconfig")) + continue; +@@ -554,7 +554,7 @@ int pci_auto_config_devices(struct udevice *bus) + if (pplat->class == (PCI_CLASS_DISPLAY_VGA << 8)) + set_vga_bridge_bits(dev); + } +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + + return log_msg_ret("sub", sub_bus); + } +@@ -626,7 +626,7 @@ int dm_pci_hose_probe_bus(struct udevice *bus) + int ea_pos; + u8 reg; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + ea_pos = dm_pci_find_capability(bus, PCI_CAP_ID_EA); + if (ea_pos) { +@@ -636,12 +636,12 @@ int dm_pci_hose_probe_bus(struct udevice *bus) + } else { + sub_bus = pci_get_bus_max() + 1; + } +- debug("%s: bus = %d/%s\n", __func__, sub_bus, bus->name); ++printf("%s: bus = %d/%s\n", __func__, sub_bus, bus->name); + dm_pciauto_prescan_setup_bridge(bus, sub_bus); + + ret = device_probe(bus); + if (ret) { +- debug("%s: Cannot probe bus %s: %d\n", __func__, bus->name, ++printf("%s: Cannot probe bus %s: %d\n", __func__, bus->name, + ret); + return log_msg_ret("probe", ret); + } +@@ -702,7 +702,7 @@ static int pci_find_and_bind_driver(struct udevice *parent, + + *devp = NULL; + +- debug("%s: Searching for driver: vendor=%x, device=%x\n", __func__, ++printf("%s: Searching for driver: vendor=%x, device=%x\n", __func__, + find_id->vendor, find_id->device); + + /* Determine optional OF node */ +@@ -710,7 +710,7 @@ static int pci_find_and_bind_driver(struct udevice *parent, + pci_dev_find_ofnode(parent, bdf, &node); + + if (ofnode_valid(node) && !ofnode_is_available(node)) { +- debug("%s: Ignoring disabled device\n", __func__); ++printf("%s: Ignoring disabled device\n", __func__); + return log_msg_ret("dis", -EPERM); + } + +@@ -751,7 +751,7 @@ static int pci_find_and_bind_driver(struct udevice *parent, + &dev); + if (ret) + goto error; +- debug("%s: Match found: %s\n", __func__, drv->name); ++printf("%s: Match found: %s\n", __func__, drv->name); + dev->driver_data = id->driver_data; + *devp = dev; + return 0; +@@ -777,16 +777,16 @@ static int pci_find_and_bind_driver(struct udevice *parent, + + ret = device_bind_driver_to_node(parent, drv, str, node, devp); + if (ret) { +- debug("%s: Failed to bind generic driver: %d\n", __func__, ret); ++printf("%s: Failed to bind generic driver: %d\n", __func__, ret); + free(str); + return ret; + } +- debug("%s: No match found: bound generic driver instead\n", __func__); ++printf("%s: No match found: bound generic driver instead\n", __func__); + + return 0; + + error: +- debug("%s: No match found: error %d\n", __func__, ret); ++printf("%s: No match found: error %d\n", __func__, ret); + return ret; + } + +@@ -832,7 +832,7 @@ int pci_bind_bus_devices(struct udevice *bus) + if (!PCI_FUNC(bdf)) + found_multi = header_type & 0x80; + +- debug("%s: bus %d/%s: found device %x, function %d", __func__, ++printf("%s: bus %d/%s: found device %x, function %d", __func__, + dev_seq(bus), bus->name, PCI_DEV(bdf), PCI_FUNC(bdf)); + pci_bus_read_config(bus, bdf, PCI_DEVICE_ID, &device, + PCI_SIZE_16); +@@ -842,7 +842,7 @@ int pci_bind_bus_devices(struct udevice *bus) + + /* Find this device in the device tree */ + ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), &dev); +- debug(": find ret=%d\n", ret); ++printf(": find ret=%d\n", ret); + + /* If nothing in the device tree, bind a device */ + if (ret == -ENODEV) { +@@ -923,7 +923,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, + + prop = ofnode_get_property(node, "ranges", &len); + if (!prop) { +- debug("%s: Cannot decode regions\n", __func__); ++printf("%s: Cannot decode regions\n", __func__); + return; + } + +@@ -935,7 +935,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, + len /= sizeof(u32); + cells_per_record = pci_addr_cells + addr_cells + size_cells; + hose->region_count = 0; +- debug("%s: len=%d, cells_per_record=%d\n", __func__, len, ++printf("%s: len=%d, cells_per_record=%d\n", __func__, len, + cells_per_record); + + /* Dynamically allocate the regions array */ +@@ -960,7 +960,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, + prop += addr_cells; + size = fdtdec_get_number(prop, size_cells); + prop += size_cells; +- debug("%s: region %d, pci_addr=%llx, addr=%llx, size=%llx, space_code=%d\n", ++printf("%s: region %d, pci_addr=%llx, addr=%llx, size=%llx, space_code=%d\n", + __func__, hose->region_count, pci_addr, addr, size, space_code); + if (space_code & 2) { + type = flags & (1U << 30) ? PCI_REGION_PREFETCH : +@@ -973,7 +973,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, + + if (!IS_ENABLED(CONFIG_SYS_PCI_64BIT) && + type == PCI_REGION_MEM && upper_32_bits(pci_addr)) { +- debug(" - beyond the 32-bit boundary, ignoring\n"); ++printf(" - beyond the 32-bit boundary, ignoring\n"); + continue; + } + +@@ -987,7 +987,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, + + if (pos == -1) + pos = hose->region_count++; +- debug(" - type=%d, pos=%d\n", type, pos); ++printf(" - type=%d, pos=%d\n", type, pos); + pci_set_region(hose->regions + pos, pci_addr, addr, size, type); + } + +@@ -1015,7 +1015,7 @@ static int pci_uclass_pre_probe(struct udevice *bus) + struct uclass *uc; + int ret; + +- debug("%s, bus=%d/%s, parent=%s\n", __func__, dev_seq(bus), bus->name, ++printf("%s, bus=%d/%s, parent=%s\n", __func__, dev_seq(bus), bus->name, + bus->parent->name); + hose = dev_get_uclass_priv(bus); + +@@ -1060,7 +1060,7 @@ static int pci_uclass_post_probe(struct udevice *bus) + struct pci_controller *hose = dev_get_uclass_priv(bus); + int ret; + +- debug("%s: probing bus %d\n", __func__, dev_seq(bus)); ++printf("%s: probing bus %d\n", __func__, dev_seq(bus)); + ret = pci_bind_bus_devices(bus); + if (ret) + return log_msg_ret("bind", ret); +@@ -1254,7 +1254,7 @@ int pci_get_dma_regions(struct udevice *dev, struct pci_region *memp, int index) + /* PCI addresses are always 3-cells */ + len /= sizeof(u32); + cells_per_record = pci_addr_cells + addr_cells + size_cells; +- debug("%s: len=%d, cells_per_record=%d\n", __func__, len, ++printf("%s: len=%d, cells_per_record=%d\n", __func__, len, + cells_per_record); + + while (len) { +@@ -1710,7 +1710,7 @@ int pci_sriov_init(struct udevice *pdev, int vf_en) + + pos = dm_pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); + if (!pos) { +- debug("Error: SRIOV capability not found\n"); ++printf("Error: SRIOV capability not found\n"); + return -ENOENT; + } + +@@ -1750,7 +1750,7 @@ int pci_sriov_init(struct udevice *pdev, int vf_en) + pci_bus_read_config(bus, bdf, PCI_CLASS_DEVICE, + &class, PCI_SIZE_16); + +- debug("%s: bus %d/%s: found VF %x:%x\n", __func__, ++printf("%s: bus %d/%s: found VF %x:%x\n", __func__, + dev_seq(bus), bus->name, PCI_DEV(bdf), PCI_FUNC(bdf)); + + /* Find this device in the device tree */ +@@ -1781,7 +1781,7 @@ int pci_sriov_init(struct udevice *pdev, int vf_en) + pplat->pfdev = pdev; + pplat->virtid = vf * vf_stride + vf_offset; + +- debug("%s: bus %d/%s: found VF %x:%x %x:%x class %lx id %x\n", ++printf("%s: bus %d/%s: found VF %x:%x %x:%x class %lx id %x\n", + __func__, dev_seq(dev), dev->name, PCI_DEV(bdf), + PCI_FUNC(bdf), vendor, device, class, pplat->virtid); + bdf += PCI_BDF(0, 0, vf_stride); +@@ -1797,7 +1797,7 @@ int pci_sriov_get_totalvfs(struct udevice *pdev) + + pos = dm_pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); + if (!pos) { +- debug("Error: SRIOV capability not found\n"); ++printf("Error: SRIOV capability not found\n"); + return -ENOENT; + } + +diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c +index d8f923952..ad3121eb7 100644 +--- a/drivers/pci/pci.c ++++ b/drivers/pci/pci.c +@@ -199,7 +199,7 @@ static int pci_hose_config_device(struct pci_controller *hose, pci_dev_t dev, + unsigned char pin; + int bar, found_mem64; + +- debug("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n", io, ++printf("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n", io, + (u64)mem, command); + + pci_hose_write_config_dword(hose, dev, PCI_COMMAND, 0); +@@ -373,7 +373,7 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus) + if (!PCI_FUNC(dev)) + found_multi = header_type & 0x80; + +- debug("PCI Scan: Found Bus %d, Device %d, Function %d\n", ++printf("PCI Scan: Found Bus %d, Device %d, Function %d\n", + PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev)); + + pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device); +diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c +index 05663c72b..594cef0b9 100644 +--- a/drivers/pci/pci_auto.c ++++ b/drivers/pci/pci_auto.c +@@ -59,7 +59,7 @@ static void dm_pciauto_setup_device(struct udevice *dev, int bars_num, + + bar_res = io; + +- debug("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ", ++printf("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ", + bar_nr, (unsigned long long)bar_size); + } else { + if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == +@@ -88,7 +88,7 @@ static void dm_pciauto_setup_device(struct udevice *dev, int bars_num, + else + bar_res = mem; + +- debug("PCI Autoconfig: BAR %d, %s%s, size=0x%llx, ", ++printf("PCI Autoconfig: BAR %d, %s%s, size=0x%llx, ", + bar_nr, bar_res == prefetch ? "Prf" : "Mem", + found_mem64 ? "64" : "", + (unsigned long long)bar_size); +@@ -122,7 +122,7 @@ static void dm_pciauto_setup_device(struct udevice *dev, int bars_num, + cmdstat |= (bar_response & PCI_BASE_ADDRESS_SPACE) ? + PCI_COMMAND_IO : PCI_COMMAND_MEMORY; + +- debug("\n"); ++printf("\n"); + + bar_nr++; + } +@@ -137,14 +137,14 @@ static void dm_pciauto_setup_device(struct udevice *dev, int bars_num, + dm_pci_read_config32(dev, rom_addr, &bar_response); + if (bar_response) { + bar_size = -(bar_response & ~1); +- debug("PCI Autoconfig: ROM, size=%#x, ", ++printf("PCI Autoconfig: ROM, size=%#x, ", + (unsigned int)bar_size); + if (pciauto_region_allocate(mem, bar_size, &bar_value, + false) == 0) { + dm_pci_write_config32(dev, rom_addr, bar_value); + } + cmdstat |= PCI_COMMAND_MEMORY; +- debug("\n"); ++printf("\n"); + } + } + +@@ -319,7 +319,7 @@ int dm_pciauto_config_device(struct udevice *dev) + + switch (class) { + case PCI_CLASS_BRIDGE_PCI: +- debug("PCI Autoconfig: Found P2P bridge, device %d\n", ++printf("PCI Autoconfig: Found P2P bridge, device %d\n", + PCI_DEV(dm_pci_get_bdf(dev))); + + dm_pciauto_setup_device(dev, 2, pci_mem, pci_prefetch, pci_io); +@@ -337,14 +337,14 @@ int dm_pciauto_config_device(struct udevice *dev) + */ + dm_pciauto_setup_device(dev, 0, pci_mem, pci_prefetch, pci_io); + +- debug("PCI Autoconfig: Found P2CardBus bridge, device %d\n", ++printf("PCI Autoconfig: Found P2CardBus bridge, device %d\n", + PCI_DEV(dm_pci_get_bdf(dev))); + + break; + + #if defined(CONFIG_PCIAUTO_SKIP_HOST_BRIDGE) + case PCI_CLASS_BRIDGE_OTHER: +- debug("PCI Autoconfig: Skipping bridge device %d\n", ++printf("PCI Autoconfig: Skipping bridge device %d\n", + PCI_DEV(dm_pci_get_bdf(dev))); + break; + #endif +@@ -357,14 +357,14 @@ int dm_pciauto_config_device(struct udevice *dev) + * device claiming resources io/mem/irq.. we only allow for + * the PIMMR window to be allocated (BAR0 - 1MB size) + */ +- debug("PCI Autoconfig: Broken bridge found, only minimal config\n"); ++printf("PCI Autoconfig: Broken bridge found, only minimal config\n"); + dm_pciauto_setup_device(dev, 0, hose->pci_mem, + hose->pci_prefetch, hose->pci_io); + break; + #endif + + case PCI_CLASS_PROCESSOR_POWERPC: /* an agent or end-point */ +- debug("PCI AutoConfig: Found PowerPC device\n"); ++printf("PCI AutoConfig: Found PowerPC device\n"); + /* fall through */ + + default: +diff --git a/drivers/pci/pci_auto_common.c b/drivers/pci/pci_auto_common.c +index c0a53dcc9..7ea04135f 100644 +--- a/drivers/pci/pci_auto_common.c ++++ b/drivers/pci/pci_auto_common.c +@@ -39,27 +39,27 @@ int pciauto_region_allocate(struct pci_region *res, pci_size_t size, + pci_addr_t addr; + + if (!res) { +- debug("No resource\n"); ++printf("No resource\n"); + goto error; + } + + addr = ((res->bus_lower - 1) | (size - 1)) + 1; + + if (addr - res->bus_start + size > res->size) { +- debug("No room in resource, avail start=%llx / size=%llx, " ++printf("No room in resource, avail start=%llx / size=%llx, " + "need=%llx\n", (unsigned long long)res->bus_lower, + (unsigned long long)res->size, (unsigned long long)size); + goto error; + } + + if (upper_32_bits(addr) && !supports_64bit) { +- debug("Cannot assign 64-bit address to 32-bit-only resource\n"); ++printf("Cannot assign 64-bit address to 32-bit-only resource\n"); + goto error; + } + + res->bus_lower = addr + size; + +- debug("address=0x%llx bus_lower=0x%llx\n", (unsigned long long)addr, ++printf("address=0x%llx bus_lower=0x%llx\n", (unsigned long long)addr, + (unsigned long long)res->bus_lower); + + *bar = addr; +@@ -73,7 +73,7 @@ int pciauto_region_allocate(struct pci_region *res, pci_size_t size, + static void pciauto_show_region(const char *name, struct pci_region *region) + { + pciauto_region_init(region); +- debug("PCI Autoconfig: Bus %s region: [%llx-%llx],\n" ++printf("PCI Autoconfig: Bus %s region: [%llx-%llx],\n" + "\t\tPhysical Memory [%llx-%llxx]\n", name, + (unsigned long long)region->bus_start, + (unsigned long long)(region->bus_start + region->size - 1), +diff --git a/drivers/pci/pci_auto_old.c b/drivers/pci/pci_auto_old.c +index c56ff53c4..e92a4370a 100644 +--- a/drivers/pci/pci_auto_old.c ++++ b/drivers/pci/pci_auto_old.c +@@ -64,7 +64,7 @@ void pciauto_setup_device(struct pci_controller *hose, + & 0xffff) + 1; + bar_res = io; + +- debug("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ", ++printf("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ", + bar_nr, (unsigned long long)bar_size); + } else { + if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == +@@ -89,7 +89,7 @@ void pciauto_setup_device(struct pci_controller *hose, + else + bar_res = mem; + +- debug("PCI Autoconfig: BAR %d, %s, size=0x%llx, ", ++printf("PCI Autoconfig: BAR %d, %s, size=0x%llx, ", + bar_nr, bar_res == prefetch ? "Prf" : "Mem", + (unsigned long long)bar_size); + } +@@ -117,7 +117,7 @@ void pciauto_setup_device(struct pci_controller *hose, + cmdstat |= (bar_response & PCI_BASE_ADDRESS_SPACE) ? + PCI_COMMAND_IO : PCI_COMMAND_MEMORY; + +- debug("\n"); ++printf("\n"); + + bar_nr++; + } +@@ -132,7 +132,7 @@ void pciauto_setup_device(struct pci_controller *hose, + pci_hose_read_config_dword(hose, dev, rom_addr, &bar_response); + if (bar_response) { + bar_size = -(bar_response & ~1); +- debug("PCI Autoconfig: ROM, size=%#x, ", ++printf("PCI Autoconfig: ROM, size=%#x, ", + (unsigned int)bar_size); + if (pciauto_region_allocate(mem, bar_size, + &bar_value, false) == 0) { +@@ -140,7 +140,7 @@ void pciauto_setup_device(struct pci_controller *hose, + bar_value); + } + cmdstat |= PCI_COMMAND_MEMORY; +- debug("\n"); ++printf("\n"); + } + } + +@@ -317,7 +317,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) + + switch (class) { + case PCI_CLASS_BRIDGE_PCI: +- debug("PCI Autoconfig: Found P2P bridge, device %d\n", ++printf("PCI Autoconfig: Found P2P bridge, device %d\n", + PCI_DEV(dev)); + + pciauto_setup_device(hose, dev, 2, pci_mem, +@@ -347,7 +347,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) + pciauto_setup_device(hose, dev, 0, pci_mem, + pci_prefetch, pci_io); + +- debug("PCI Autoconfig: Found P2CardBus bridge, device %d\n", ++printf("PCI Autoconfig: Found P2CardBus bridge, device %d\n", + PCI_DEV(dev)); + + hose->current_busno++; +@@ -355,7 +355,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) + + #if defined(CONFIG_PCIAUTO_SKIP_HOST_BRIDGE) + case PCI_CLASS_BRIDGE_OTHER: +- debug("PCI Autoconfig: Skipping bridge device %d\n", ++printf("PCI Autoconfig: Skipping bridge device %d\n", + PCI_DEV(dev)); + break; + #endif +@@ -368,14 +368,14 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) + * device claiming resources io/mem/irq.. we only allow for + * the PIMMR window to be allocated (BAR0 - 1MB size) + */ +- debug("PCI Autoconfig: Broken bridge found, only minimal config\n"); ++printf("PCI Autoconfig: Broken bridge found, only minimal config\n"); + pciauto_setup_device(hose, dev, 0, hose->pci_mem, + hose->pci_prefetch, hose->pci_io); + break; + #endif + + case PCI_CLASS_PROCESSOR_POWERPC: /* an agent or end-point */ +- debug("PCI AutoConfig: Found PowerPC device\n"); ++printf("PCI AutoConfig: Found PowerPC device\n"); + + default: + pciauto_setup_device(hose, dev, 6, pci_mem, +diff --git a/drivers/pci/pci_compat.c b/drivers/pci/pci_compat.c +index 9dddca8ef..9370655b1 100644 +--- a/drivers/pci/pci_compat.c ++++ b/drivers/pci/pci_compat.c +@@ -45,7 +45,7 @@ struct pci_controller *pci_bus_to_hose(int busnum) + + ret = pci_get_bus(busnum, &bus); + if (ret) { +- debug("%s: Cannot get bus %d: ret=%d\n", __func__, busnum, ret); ++printf("%s: Cannot get bus %d: ret=%d\n", __func__, busnum, ret); + return NULL; + } + +diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c +index 32fac878a..340bd491f 100644 +--- a/drivers/pci/pci_ftpci100.c ++++ b/drivers/pci/pci_ftpci100.c +@@ -74,7 +74,7 @@ static void setup_pci_bar(unsigned int bus, unsigned int dev, unsigned func, + PCI_BASE_ADDRESS_0 + i * 4, + priv->io_base); + +- debug("Allocated IO address 0x%X-" \ ++printf("Allocated IO address 0x%X-" \ + "0x%X for Bus %d, Device %d, Function %d\n", + priv->io_base, + priv->io_base + size_mask, bus, dev, func); +@@ -102,7 +102,7 @@ static void setup_pci_bar(unsigned int bus, unsigned int dev, unsigned func, + pci_hose_write_config_dword(hose, dev_nu, + PCI_BASE_ADDRESS_0 + i * 4, alloc_base); + +- debug("Allocated %s address 0x%X-" \ ++printf("Allocated %s address 0x%X-" \ + "0x%X for Bus %d, Device %d, Function %d\n", + is_pref ? "MEM" : "MMIO", alloc_base, + alloc_base + size_mask, bus, dev, func); +@@ -110,8 +110,8 @@ static void setup_pci_bar(unsigned int bus, unsigned int dev, unsigned func, + devs[priv->ndevs].bar[i].addr = alloc_base; + devs[priv->ndevs].bar[i].size = size_mask + 1; + +- debug("BAR address BAR size\n"); +- debug("%010x %08d\n", ++printf("BAR address BAR size\n"); ++printf("%010x %08d\n", + devs[priv->ndevs].bar[0].addr, + devs[priv->ndevs].bar[0].size); + +@@ -203,7 +203,7 @@ static void pci_bus_scan(struct ftpci100_data *priv) + pci_hose_read_config_dword(hose, dev_nu, + PCI_CLASS_DEVICE, &data32); + +- debug("%06d %03d %03d " \ ++printf("%06d %03d %03d " \ + "%04d %08x %08x " \ + "%03d %08x %06d %08x\n", + priv->ndevs, devs[priv->ndevs].bus, +@@ -241,7 +241,7 @@ static void ftpci_preinit(struct ftpci100_data *priv) + printf("FTPCI100\n"); + + /* dump basic configuration */ +- debug("%s: Config addr is %08X, data port is %08X\n", ++printf("%s: Config addr is %08X, data port is %08X\n", + __func__, pci_config_addr, pci_config_data); + + /* PCI memory space */ +@@ -299,7 +299,7 @@ void pci_ftpci_init(void) + + ftpci_preinit(priv); + +- debug("Device bus dev func deviceID vendorID pin address" \ ++printf("Device bus dev func deviceID vendorID pin address" \ + " size class\n"); + + pci_bus_scan(priv); +diff --git a/drivers/pci/pci_gt64120.c b/drivers/pci/pci_gt64120.c +index 80f11fedd..cfab1c170 100644 +--- a/drivers/pci/pci_gt64120.c ++++ b/drivers/pci/pci_gt64120.c +@@ -59,7 +59,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt, + } + + if (access_type == PCI_ACCESS_WRITE) +- debug("PCI WR %02x:%02x.%x reg:%02d data:%08x\n", ++printf("PCI WR %02x:%02x.%x reg:%02d data:%08x\n", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data); + + /* Clear cause register bits */ +@@ -108,7 +108,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt, + } + + if (access_type == PCI_ACCESS_READ) +- debug("PCI RD %02x:%02x.%x reg:%02d data:%08x\n", ++printf("PCI RD %02x:%02x.%x reg:%02d data:%08x\n", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data); + + return 0; +diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c +index 0c1d7cd77..f3e0eab92 100644 +--- a/drivers/pci/pci_mvebu.c ++++ b/drivers/pci/pci_mvebu.c +@@ -171,11 +171,11 @@ static int mvebu_pcie_read_config(const struct udevice *bus, pci_dev_t bdf, + struct mvebu_pcie *pcie = dev_get_plat(bus); + u32 data; + +- debug("PCIE CFG read: (b,d,f)=(%2d,%2d,%2d) ", ++printf("PCIE CFG read: (b,d,f)=(%2d,%2d,%2d) ", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); + + if (!mvebu_pcie_valid_addr(pcie, bdf)) { +- debug("- out of range\n"); ++printf("- out of range\n"); + *valuep = pci_get_ff(size); + return 0; + } +@@ -185,7 +185,7 @@ static int mvebu_pcie_read_config(const struct udevice *bus, pci_dev_t bdf, + + /* read data */ + data = readl(pcie->base + PCIE_CONF_DATA_OFF); +- debug("(addr,size,val)=(0x%04x, %d, 0x%08x)\n", offset, size, data); ++printf("(addr,size,val)=(0x%04x, %d, 0x%08x)\n", offset, size, data); + *valuep = pci_conv_32_to_size(data, offset, size); + + return 0; +@@ -198,12 +198,12 @@ static int mvebu_pcie_write_config(struct udevice *bus, pci_dev_t bdf, + struct mvebu_pcie *pcie = dev_get_plat(bus); + u32 data; + +- debug("PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ", ++printf("PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); +- debug("(addr,size,val)=(0x%04x, %d, 0x%08lx)\n", offset, size, value); ++printf("(addr,size,val)=(0x%04x, %d, 0x%08lx)\n", offset, size, value); + + if (!mvebu_pcie_valid_addr(pcie, bdf)) { +- debug("- out of range\n"); ++printf("- out of range\n"); + return 0; + } + +@@ -280,11 +280,11 @@ static int mvebu_pcie_probe(struct udevice *dev) + int bus = dev_seq(dev); + u32 reg; + +- debug("%s: PCIe %d.%d - up, base %08x\n", __func__, ++printf("%s: PCIe %d.%d - up, base %08x\n", __func__, + pcie->port, pcie->lane, (u32)pcie->base); + + /* Read Id info and local bus/dev */ +- debug("direct conf read %08x, local bus %d, local dev %d\n", ++printf("direct conf read %08x, local bus %d, local dev %d\n", + readl(pcie->base), mvebu_pcie_get_local_bus_nr(pcie), + mvebu_pcie_get_local_dev_nr(pcie)); + +@@ -468,7 +468,7 @@ static int mvebu_pcie_of_to_plat(struct udevice *dev) + + /* Check link and skip ports that have no link */ + if (!mvebu_pcie_link_up(pcie)) { +- debug("%s: %s - down\n", __func__, pcie->name); ++printf("%s: %s - down\n", __func__, pcie->name); + ret = -ENODEV; + goto err; + } +diff --git a/drivers/pci/pci_octeontx.c b/drivers/pci/pci_octeontx.c +index 46855c5cd..9d284f52d 100644 +--- a/drivers/pci/pci_octeontx.c ++++ b/drivers/pci/pci_octeontx.c +@@ -127,7 +127,7 @@ static int octeontx_ecam_read_config(const struct udevice *bus, pci_dev_t bdf, + 0, bdf, offset); + *valuep = readl_size(address, size); + +- debug("%02x.%02x.%02x: u%d %x -> %lx\n", ++printf("%02x.%02x.%02x: u%d %x -> %lx\n", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, *valuep); + + return 0; +@@ -145,7 +145,7 @@ static int octeontx_ecam_write_config(struct udevice *bus, pci_dev_t bdf, + 0, bdf, offset); + writel_size(address, size, value); + +- debug("%02x.%02x.%02x: u%d %x <- %lx\n", ++printf("%02x.%02x.%02x: u%d %x <- %lx\n", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, value); + + return 0; +@@ -207,7 +207,7 @@ static int octeontx_pem_write_config(struct udevice *bus, pci_dev_t bdf, + + writel_size(address + offset, size, value); + +- debug("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n", ++printf("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, + address, value); + +@@ -232,7 +232,7 @@ static int octeontx2_pem_read_config(const struct udevice *bus, pci_dev_t bdf, + + *valuep = readl_size(address + offset, size); + +- debug("%02x.%02x.%02x: u%d %x (%lx) -> %lx\n", ++printf("%02x.%02x.%02x: u%d %x (%lx) -> %lx\n", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, + address, *valuep); + +@@ -255,7 +255,7 @@ static int octeontx2_pem_write_config(struct udevice *bus, pci_dev_t bdf, + + writel_size(address + offset, size, value); + +- debug("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n", ++printf("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, + address, value); + +@@ -326,13 +326,13 @@ static int pci_octeontx_probe(struct udevice *dev) + + err = dev_read_resource(dev, 0, &pcie->cfg); + if (err) { +- debug("Error reading resource: %s\n", fdt_strerror(err)); ++printf("Error reading resource: %s\n", fdt_strerror(err)); + return err; + } + + err = dev_read_pci_bus_range(dev, &pcie->bus); + if (err) { +- debug("Error reading resource: %s\n", fdt_strerror(err)); ++printf("Error reading resource: %s\n", fdt_strerror(err)); + return err; + } + +diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c +index 7bad4c82c..cd29a2f4d 100644 +--- a/drivers/pci/pci_rom.c ++++ b/drivers/pci/pci_rom.c +@@ -81,7 +81,7 @@ static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) + vendev = pplat->vendor << 16 | pplat->device; + mapped_vendev = board_map_oprom_vendev(vendev); + if (vendev != mapped_vendev) +- debug("Device ID mapped to %#08x\n", mapped_vendev); ++printf("Device ID mapped to %#08x\n", mapped_vendev); + + #ifdef CONFIG_VGA_BIOS_ADDR + rom_address = CONFIG_VGA_BIOS_ADDR; +@@ -89,7 +89,7 @@ static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) + + dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address); + if (rom_address == 0x00000000 || rom_address == 0xffffffff) { +- debug("%s: rom_address=%x\n", __func__, rom_address); ++printf("%s: rom_address=%x\n", __func__, rom_address); + return -ENOENT; + } + +@@ -97,10 +97,10 @@ static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) + dm_pci_write_config32(dev, PCI_ROM_ADDRESS, + rom_address | PCI_ROM_ADDRESS_ENABLE); + #endif +- debug("Option ROM address %x\n", rom_address); ++printf("Option ROM address %x\n", rom_address); + rom_header = (struct pci_rom_header *)(unsigned long)rom_address; + +- debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n", ++printf("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n", + le16_to_cpu(rom_header->signature), + rom_header->size * 512, le16_to_cpu(rom_header->data)); + +@@ -118,7 +118,7 @@ static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) + rom_vendor = le16_to_cpu(rom_data->vendor); + rom_device = le16_to_cpu(rom_data->device); + +- debug("PCI ROM image, vendor ID %04x, device ID %04x,\n", ++printf("PCI ROM image, vendor ID %04x, device ID %04x,\n", + rom_vendor, rom_device); + + /* If the device id is mapped, a mismatch is expected */ +@@ -130,11 +130,11 @@ static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) + } + + rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo; +- debug("PCI ROM image, Class Code %06x, Code Type %02x\n", ++printf("PCI ROM image, Class Code %06x, Code Type %02x\n", + rom_class, rom_data->type); + + if (pplat->class != rom_class) { +- debug("Class Code mismatch ROM %06x, dev %06x\n", ++printf("Class Code mismatch ROM %06x, dev %06x\n", + rom_class, pplat->class); + } + *hdrp = rom_header; +@@ -189,14 +189,14 @@ static int pci_rom_load(struct pci_rom_header *rom_header, + if (target != rom_header) { + ulong start = get_timer(0); + +- debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n", ++printf("Copying VGA ROM Image from %p to %p, 0x%x bytes\n", + rom_header, target, rom_size); + memcpy(target, rom_header, rom_size); + if (memcmp(target, rom_header, rom_size)) { + printf("VGA ROM copy failed\n"); + return -EFAULT; + } +- debug("Copy took %lums\n", get_timer(start)); ++printf("Copy took %lums\n", get_timer(start)); + } + *ram_headerp = target; + +@@ -245,7 +245,7 @@ int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), + + /* Only execute VGA ROMs */ + if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) { +- debug("%s: Class %#x, should be %#x\n", __func__, pplat->class, ++printf("%s: Class %#x, should be %#x\n", __func__, pplat->class, + PCI_CLASS_DISPLAY_VGA); + return -ENODEV; + } +@@ -270,7 +270,7 @@ int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), + defined(CONFIG_FRAMEBUFFER_VESA_MODE) + vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE; + #endif +- debug("Selected vesa mode %#x\n", vesa_mode); ++printf("Selected vesa mode %#x\n", vesa_mode); + + if (exec_method & PCI_ROM_USE_NATIVE) { + #ifdef CONFIG_X86 +@@ -317,7 +317,7 @@ int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), + &mode_info); + #endif + } +- debug("Final vesa mode %#x\n", mode_info.video_mode); ++printf("Final vesa mode %#x\n", mode_info.video_mode); + ret = 0; + + err: +@@ -375,7 +375,7 @@ int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void)) + PCI_ROM_ALLOW_FALLBACK); + bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD); + if (ret) { +- debug("failed to run video BIOS: %d\n", ret); ++printf("failed to run video BIOS: %d\n", ret); + return ret; + } + +@@ -390,7 +390,7 @@ int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void)) + dev->driver->name); + } + +- debug("No video mode configured\n"); ++printf("No video mode configured\n"); + return ret; + } + +diff --git a/drivers/pci/pci_sandbox.c b/drivers/pci/pci_sandbox.c +index ca44d0023..68ec540c2 100644 +--- a/drivers/pci/pci_sandbox.c ++++ b/drivers/pci/pci_sandbox.c +@@ -93,7 +93,7 @@ static int sandbox_pci_probe(struct udevice *dev) + int i; + + for (i = 0; i < num; i++) { +- debug("dev info #%d: %02x %02x %04x %04x\n", i, ++printf("dev info #%d: %02x %02x %04x %04x\n", i, + fdt32_to_cpu(cell[0]), fdt32_to_cpu(cell[1]), + fdt32_to_cpu(cell[2]), fdt32_to_cpu(cell[3])); + +diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c +index 9cb441483..0e3c4ccb1 100644 +--- a/drivers/pci/pci_tegra.c ++++ b/drivers/pci/pci_tegra.c +@@ -386,12 +386,12 @@ static int tegra_pcie_get_xbar_config(ofnode node, u32 lanes, + case TEGRA20_PCIE: + switch (lanes) { + case 0x00000004: +- debug("single-mode configuration\n"); ++printf("single-mode configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_SINGLE; + return 0; + + case 0x00000202: +- debug("dual-mode configuration\n"); ++printf("dual-mode configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_DUAL; + return 0; + } +@@ -399,17 +399,17 @@ static int tegra_pcie_get_xbar_config(ofnode node, u32 lanes, + case TEGRA30_PCIE: + switch (lanes) { + case 0x00000204: +- debug("4x1, 2x1 configuration\n"); ++printf("4x1, 2x1 configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_420; + return 0; + + case 0x00020202: +- debug("2x3 configuration\n"); ++printf("2x3 configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_222; + return 0; + + case 0x00010104: +- debug("4x1, 1x2 configuration\n"); ++printf("4x1, 1x2 configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_411; + return 0; + } +@@ -418,12 +418,12 @@ static int tegra_pcie_get_xbar_config(ofnode node, u32 lanes, + case TEGRA210_PCIE: + switch (lanes) { + case 0x0000104: +- debug("4x1, 1x1 configuration\n"); ++printf("4x1, 1x1 configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_X4_X1; + return 0; + + case 0x0000102: +- debug("2x1, 1x1 configuration\n"); ++printf("2x1, 1x1 configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_X2_X1; + return 0; + } +@@ -431,17 +431,17 @@ static int tegra_pcie_get_xbar_config(ofnode node, u32 lanes, + case TEGRA186_PCIE: + switch (lanes) { + case 0x0010004: +- debug("x4 x1 configuration\n"); ++printf("x4 x1 configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_401; + return 0; + + case 0x0010102: +- debug("x2 x1 x1 configuration\n"); ++printf("x2 x1 x1 configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_211; + return 0; + + case 0x0010101: +- debug("x1 x1 x1 configuration\n"); ++printf("x1 x1 x1 configuration\n"); + *xbar = AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_T186_111; + return 0; + } +@@ -972,7 +972,7 @@ static bool tegra_pcie_port_check_link(struct tegra_pcie_port *port) + } while (--timeout); + + if (!timeout) { +- debug("link %u down, retrying\n", port->index); ++printf("link %u down, retrying\n", port->index); + goto retry; + } + +@@ -1020,7 +1020,7 @@ static int tegra_pcie_enable(struct tegra_pcie *pcie) + struct tegra_pcie_port *port, *tmp; + + list_for_each_entry_safe(port, tmp, &pcie->ports, list) { +- debug("probing port %u, using %u lanes\n", port->index, ++printf("probing port %u, using %u lanes\n", port->index, + port->num_lanes); + + tegra_pcie_port_enable(port); +@@ -1028,7 +1028,7 @@ static int tegra_pcie_enable(struct tegra_pcie *pcie) + if (tegra_pcie_port_check_link(port)) + continue; + +- debug("link %u down, ignoring\n", port->index); ++printf("link %u down, ignoring\n", port->index); + + tegra_pcie_port_disable(port); + tegra_pcie_port_free(port); +@@ -1116,37 +1116,37 @@ static int pci_tegra_probe(struct udevice *dev) + #ifdef CONFIG_TEGRA186 + err = clk_get_by_name(dev, "afi", &pcie->clk_afi); + if (err) { +- debug("clk_get_by_name(afi) failed: %d\n", err); ++printf("clk_get_by_name(afi) failed: %d\n", err); + return err; + } + + err = clk_get_by_name(dev, "pex", &pcie->clk_pex); + if (err) { +- debug("clk_get_by_name(pex) failed: %d\n", err); ++printf("clk_get_by_name(pex) failed: %d\n", err); + return err; + } + + err = reset_get_by_name(dev, "afi", &pcie->reset_afi); + if (err) { +- debug("reset_get_by_name(afi) failed: %d\n", err); ++printf("reset_get_by_name(afi) failed: %d\n", err); + return err; + } + + err = reset_get_by_name(dev, "pex", &pcie->reset_pex); + if (err) { +- debug("reset_get_by_name(pex) failed: %d\n", err); ++printf("reset_get_by_name(pex) failed: %d\n", err); + return err; + } + + err = reset_get_by_name(dev, "pcie_x", &pcie->reset_pcie_x); + if (err) { +- debug("reset_get_by_name(pcie_x) failed: %d\n", err); ++printf("reset_get_by_name(pcie_x) failed: %d\n", err); + return err; + } + + err = power_domain_get(dev, &pcie->pwrdom); + if (err) { +- debug("power_domain_get() failed: %d\n", err); ++printf("power_domain_get() failed: %d\n", err); + return err; + } + #endif +diff --git a/drivers/pci/pcie_dw_common.c b/drivers/pci/pcie_dw_common.c +index e66fb1490..9cb3107c2 100644 +--- a/drivers/pci/pcie_dw_common.c ++++ b/drivers/pci/pcie_dw_common.c +@@ -206,7 +206,7 @@ int pcie_dw_read_config(const struct udevice *bus, pci_dev_t bdf, + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); + + if (!pcie_dw_addr_valid(bdf, pcie->first_busno)) { +- debug("- out of range\n"); ++printf("- out of range\n"); + *valuep = pci_get_ff(size); + return 0; + } +@@ -215,7 +215,7 @@ int pcie_dw_read_config(const struct udevice *bus, pci_dev_t bdf, + + value = readl((void __iomem *)va_address); + +- debug("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value); ++printf("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value); + *valuep = pci_conv_32_to_size(value, offset, size); + + return pcie_dw_prog_outbound_atu_unroll(pcie, PCIE_ATU_REGION_INDEX1, +@@ -251,7 +251,7 @@ int pcie_dw_write_config(struct udevice *bus, pci_dev_t bdf, + dev_dbg(pcie->dev, "(addr,val)=(0x%04x, 0x%08lx)\n", offset, value); + + if (!pcie_dw_addr_valid(bdf, pcie->first_busno)) { +- debug("- out of range\n"); ++printf("- out of range\n"); + return 0; + } + +diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c +index 0525ecbea..aa9eba51b 100644 +--- a/drivers/pci/pcie_dw_meson.c ++++ b/drivers/pci/pcie_dw_meson.c +@@ -153,13 +153,13 @@ static int meson_pcie_wait_link_up(struct meson_pcie *priv) + speed_okay = 1; + + if (smlh_up) +- debug("%s: smlh_link_up is on\n", __func__); ++printf("%s: smlh_link_up is on\n", __func__); + if (rdlh_up) +- debug("%s: rdlh_link_up is on\n", __func__); ++printf("%s: rdlh_link_up is on\n", __func__); + if (ltssm_up) +- debug("%s: ltssm_up is on\n", __func__); ++printf("%s: ltssm_up is on\n", __func__); + if (speed_okay) +- debug("%s: speed_okay\n", __func__); ++printf("%s: speed_okay\n", __func__); + + if (smlh_up && rdlh_up && ltssm_up && speed_okay) + return 0; +@@ -212,7 +212,7 @@ static int meson_size_to_payload(int size) + * than 2^12, just set to default size 2^(1+7). + */ + if (!is_power_of_2(size) || size < 128 || size > 4096) { +- debug("%s: payload size %d, set to default 256\n", __func__, size); ++printf("%s: payload size %d, set to default 256\n", __func__, size); + return 1; + } + +diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c +index 0490fd337..f7bb62de9 100644 +--- a/drivers/pci/pcie_dw_mvebu.c ++++ b/drivers/pci/pcie_dw_mvebu.c +@@ -252,11 +252,11 @@ static int pcie_dw_mvebu_read_config(const struct udevice *bus, pci_dev_t bdf, + uintptr_t va_address; + ulong value; + +- debug("PCIE CFG read: (b,d,f)=(%2d,%2d,%2d) ", ++printf("PCIE CFG read: (b,d,f)=(%2d,%2d,%2d) ", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); + + if (!pcie_dw_addr_valid(bdf, pcie->first_busno)) { +- debug("- out of range\n"); ++printf("- out of range\n"); + *valuep = pci_get_ff(size); + return 0; + } +@@ -265,7 +265,7 @@ static int pcie_dw_mvebu_read_config(const struct udevice *bus, pci_dev_t bdf, + + value = readl(va_address); + +- debug("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value); ++printf("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value); + *valuep = pci_conv_32_to_size(value, offset, size); + + if (pcie->region_count > 1) +@@ -299,12 +299,12 @@ static int pcie_dw_mvebu_write_config(struct udevice *bus, pci_dev_t bdf, + uintptr_t va_address; + ulong old; + +- debug("PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ", ++printf("PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); +- debug("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value); ++printf("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value); + + if (!pcie_dw_addr_valid(bdf, pcie->first_busno)) { +- debug("- out of range\n"); ++printf("- out of range\n"); + return 0; + } + +@@ -501,7 +501,7 @@ static int pcie_dw_mvebu_probe(struct udevice *dev) + mdelay(200); + } + #else +- debug("PCIE Reset on GPIO support is missing\n"); ++printf("PCIE Reset on GPIO support is missing\n"); + #endif /* DM_GPIO */ + + pcie->first_busno = dev_seq(dev); +diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c +index bc22af423..e45f76014 100644 +--- a/drivers/pci/pcie_dw_rockchip.c ++++ b/drivers/pci/pcie_dw_rockchip.c +@@ -189,10 +189,10 @@ static void rk_pcie_debug_dump(struct rk_pcie *rk_pcie) + { + u32 loop; + +- debug("ltssm = 0x%x\n", ++printf("ltssm = 0x%x\n", + rk_pcie_readl_apb(rk_pcie, PCIE_CLIENT_LTSSM_STATUS)); + for (loop = 0; loop < 64; loop++) +- debug("fifo_status = 0x%x\n", ++printf("fifo_status = 0x%x\n", + rk_pcie_readl_apb(rk_pcie, PCIE_CLIENT_DBG_FIFO_STATUS)); + } + +diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c +index 73875e00d..b5b5a568d 100644 +--- a/drivers/pci/pcie_imx.c ++++ b/drivers/pci/pcie_imx.c +@@ -661,7 +661,7 @@ static int imx_pcie_link_up(struct imx_pcie_priv *priv) + #ifdef CONFIG_PCI_SCAN_SHOW + puts("PCI: pcie phy link never came up\n"); + #endif +- debug("DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n", ++printf("DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n", + readl(priv->dbi_base + PCIE_PHY_DEBUG_R0), + readl(priv->dbi_base + PCIE_PHY_DEBUG_R1)); + return -EINVAL; +diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c +index 12ce9d525..c63df2be7 100644 +--- a/drivers/pci/pcie_iproc.c ++++ b/drivers/pci/pcie_iproc.c +@@ -745,12 +745,12 @@ static inline int iproc_pcie_ob_write(struct iproc_pcie *pcie, int window_idx, + writel(lower_32_bits(pci_addr), pcie->base + omap_offset); + writel(upper_32_bits(pci_addr), pcie->base + omap_offset + 4); + +- debug("ob window [%d]: offset 0x%x axi %pap pci %pap\n", ++printf("ob window [%d]: offset 0x%x axi %pap pci %pap\n", + window_idx, oarr_offset, &axi_addr, &pci_addr); +- debug("oarr lo 0x%x oarr hi 0x%x\n", ++printf("oarr lo 0x%x oarr hi 0x%x\n", + readl(pcie->base + oarr_offset), + readl(pcie->base + oarr_offset + 4)); +- debug("omap lo 0x%x omap hi 0x%x\n", ++printf("omap lo 0x%x omap hi 0x%x\n", + readl(pcie->base + omap_offset), + readl(pcie->base + omap_offset + 4)); + +@@ -884,7 +884,7 @@ static int iproc_pcie_map_ranges(struct udevice *dev) + for (i = 0; i < hose->region_count; i++) { + if (hose->regions[i].flags == PCI_REGION_MEM || + hose->regions[i].flags == PCI_REGION_PREFETCH) { +- debug("%d: bus_addr %p, axi_addr %p, size 0x%lx\n", ++printf("%d: bus_addr %p, axi_addr %p, size 0x%lx\n", + i, &hose->regions[i].bus_start, + &hose->regions[i].phys_start, + hose->regions[i].size); +@@ -935,7 +935,7 @@ static int iproc_pcie_ib_write(struct iproc_pcie *pcie, int region_idx, + iproc_pcie_reg_is_invalid(imap_offset)) + return -EINVAL; + +- debug("ib region [%d]: offset 0x%x axi %pap pci %pap\n", ++printf("ib region [%d]: offset 0x%x axi %pap pci %pap\n", + region_idx, iarr_offset, &axi_addr, &pci_addr); + + /* +@@ -946,7 +946,7 @@ static int iproc_pcie_ib_write(struct iproc_pcie *pcie, int region_idx, + pcie->base + iarr_offset); + writel(upper_32_bits(pci_addr), pcie->base + iarr_offset + 4); + +- debug("iarr lo 0x%x iarr hi 0x%x\n", ++printf("iarr lo 0x%x iarr hi 0x%x\n", + readl(pcie->base + iarr_offset), + readl(pcie->base + iarr_offset + 4)); + +@@ -962,7 +962,7 @@ static int iproc_pcie_ib_write(struct iproc_pcie *pcie, int region_idx, + writel(upper_32_bits(axi_addr), + pcie->base + imap_offset + ib_map->imap_addr_offset); + +- debug("imap window [%d] lo 0x%x hi 0x%x\n", ++printf("imap window [%d] lo 0x%x hi 0x%x\n", + window_idx, readl(pcie->base + imap_offset), + readl(pcie->base + imap_offset + + ib_map->imap_addr_offset)); +@@ -1181,9 +1181,9 @@ static int iproc_pcie_probe(struct udevice *dev) + int ret; + + pcie->type = (enum iproc_pcie_type)dev_get_driver_data(dev); +- debug("PAX type %d\n", pcie->type); ++printf("PAX type %d\n", pcie->type); + pcie->base = dev_read_addr_ptr(dev); +- debug("PAX reg base %p\n", pcie->base); ++printf("PAX reg base %p\n", pcie->base); + + if (!pcie->base) + return -ENODEV; +diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c +index 3c7c4ca18..f50fd93d9 100644 +--- a/drivers/pci/pcie_layerscape.c ++++ b/drivers/pci/pcie_layerscape.c +@@ -128,22 +128,22 @@ void ls_pcie_dump_atu(struct ls_pcie *pcie, u32 win_num, u32 type) + + for (win_idx = 0; win_idx < win_num; win_idx++) { + dbi_writel(pcie, type | win_idx, PCIE_ATU_VIEWPORT); +- debug("iATU%d:\n", win_idx); +- debug("\tLOWER PHYS 0x%08x\n", ++printf("iATU%d:\n", win_idx); ++printf("\tLOWER PHYS 0x%08x\n", + dbi_readl(pcie, PCIE_ATU_LOWER_BASE)); +- debug("\tUPPER PHYS 0x%08x\n", ++printf("\tUPPER PHYS 0x%08x\n", + dbi_readl(pcie, PCIE_ATU_UPPER_BASE)); + if (type == PCIE_ATU_REGION_OUTBOUND) { +- debug("\tLOWER BUS 0x%08x\n", ++printf("\tLOWER BUS 0x%08x\n", + dbi_readl(pcie, PCIE_ATU_LOWER_TARGET)); +- debug("\tUPPER BUS 0x%08x\n", ++printf("\tUPPER BUS 0x%08x\n", + dbi_readl(pcie, PCIE_ATU_UPPER_TARGET)); +- debug("\tLIMIT 0x%08x\n", ++printf("\tLIMIT 0x%08x\n", + dbi_readl(pcie, PCIE_ATU_LIMIT)); + } +- debug("\tCR1 0x%08x\n", ++printf("\tCR1 0x%08x\n", + dbi_readl(pcie, PCIE_ATU_CR1)); +- debug("\tCR2 0x%08x\n", ++printf("\tCR2 0x%08x\n", + dbi_readl(pcie, PCIE_ATU_CR2)); + } + } +diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c +index a58e7a389..0e21edf7b 100644 +--- a/drivers/pci/pcie_layerscape_fixup.c ++++ b/drivers/pci/pcie_layerscape_fixup.c +@@ -128,7 +128,7 @@ static void fdt_pcie_set_msi_map_entry_ls(void *blob, + /* get phandle to MSI controller */ + prop = (u32 *)fdt_getprop(blob, nodeoffset, "msi-parent", 0); + if (prop == NULL) { +- debug("\n%s: ERROR: missing msi-parent: PCIe%d\n", ++printf("\n%s: ERROR: missing msi-parent: PCIe%d\n", + __func__, pcie->idx); + return; + } +@@ -166,7 +166,7 @@ static void fdt_pcie_set_iommu_map_entry_ls(void *blob, + /* get phandle to iommu controller */ + prop = fdt_getprop_w(blob, nodeoffset, "iommu-map", &lenp); + if (prop == NULL) { +- debug("\n%s: ERROR: missing iommu-map: PCIe%d\n", ++printf("\n%s: ERROR: missing iommu-map: PCIe%d\n", + __func__, pcie->idx); + return; + } +diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/pcie_layerscape_gen4.c +index 255e73181..2fc5e7801 100644 +--- a/drivers/pci/pcie_layerscape_gen4.c ++++ b/drivers/pci/pcie_layerscape_gen4.c +@@ -124,23 +124,23 @@ static void ls_pcie_g4_dump_wins(struct ls_pcie_g4 *pcie, int wins) + int i; + + for (i = 0; i < wins; i++) { +- debug("APIO Win%d:\n", i); +- debug("\tLOWER PHYS: 0x%08x\n", ++printf("APIO Win%d:\n", i); ++printf("\tLOWER PHYS: 0x%08x\n", + ccsr_readl(pcie, PAB_AXI_AMAP_AXI_WIN(i))); +- debug("\tUPPER PHYS: 0x%08x\n", ++printf("\tUPPER PHYS: 0x%08x\n", + ccsr_readl(pcie, PAB_EXT_AXI_AMAP_AXI_WIN(i))); +- debug("\tLOWER BUS: 0x%08x\n", ++printf("\tLOWER BUS: 0x%08x\n", + ccsr_readl(pcie, PAB_AXI_AMAP_PEX_WIN_L(i))); +- debug("\tUPPER BUS: 0x%08x\n", ++printf("\tUPPER BUS: 0x%08x\n", + ccsr_readl(pcie, PAB_AXI_AMAP_PEX_WIN_H(i))); +- debug("\tSIZE: 0x%08x\n", ++printf("\tSIZE: 0x%08x\n", + ccsr_readl(pcie, PAB_AXI_AMAP_CTRL(i)) & + (AXI_AMAP_CTRL_SIZE_MASK << AXI_AMAP_CTRL_SIZE_SHIFT)); +- debug("\tEXT_SIZE: 0x%08x\n", ++printf("\tEXT_SIZE: 0x%08x\n", + ccsr_readl(pcie, PAB_EXT_AXI_AMAP_SIZE(i))); +- debug("\tPARAM: 0x%08x\n", ++printf("\tPARAM: 0x%08x\n", + ccsr_readl(pcie, PAB_AXI_AMAP_PCI_HDR_PARAM(i))); +- debug("\tCTRL: 0x%08x\n", ++printf("\tCTRL: 0x%08x\n", + ccsr_readl(pcie, PAB_AXI_AMAP_CTRL(i))); + } + } +@@ -525,7 +525,7 @@ static int ls_pcie_g4_probe(struct udevice *dev) + + pcie->big_endian = fdtdec_get_bool(fdt, node, "big-endian"); + +- debug("%s ccsr:%lx, cfg:0x%lx, big-endian:%d\n", ++printf("%s ccsr:%lx, cfg:0x%lx, big-endian:%d\n", + dev->name, (unsigned long)pcie->ccsr, (unsigned long)pcie->cfg, + pcie->big_endian); + +diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c +index e9ee15558..b68fd9b0f 100644 +--- a/drivers/pci/pcie_layerscape_gen4_fixup.c ++++ b/drivers/pci/pcie_layerscape_gen4_fixup.c +@@ -69,14 +69,14 @@ static void fdt_pcie_set_msi_map_entry_ls_gen4(void *blob, + #error "No CONFIG_FSL_PCIE_COMPAT defined" + #endif + if (nodeoff < 0) { +- debug("%s: ERROR: failed to find pcie compatiable\n", __func__); ++printf("%s: ERROR: failed to find pcie compatiable\n", __func__); + return; + } + + /* get phandle to MSI controller */ + prop = (u32 *)fdt_getprop(blob, nodeoff, "msi-parent", 0); + if (!prop) { +- debug("\n%s: ERROR: missing msi-parent: PCIe%d\n", ++printf("\n%s: ERROR: missing msi-parent: PCIe%d\n", + __func__, pcie->idx); + return; + } +@@ -113,14 +113,14 @@ static void fdt_pcie_set_iommu_map_entry_ls_gen4(void *blob, + #error "No CONFIG_FSL_PCIE_COMPAT defined" + #endif + if (nodeoff < 0) { +- debug("%s: ERROR: failed to find pcie compatiable\n", __func__); ++printf("%s: ERROR: failed to find pcie compatiable\n", __func__); + return; + } + + /* get phandle to iommu controller */ + prop = fdt_getprop_w(blob, nodeoff, "iommu-map", &lenp); + if (!prop) { +- debug("\n%s: ERROR: missing iommu-map: PCIe%d\n", ++printf("\n%s: ERROR: missing iommu-map: PCIe%d\n", + __func__, pcie->idx); + return; + } +@@ -153,7 +153,7 @@ static void fdt_fixup_pcie_ls_gen4(void *blob) + + streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx); + if (streamid < 0) { +- debug("ERROR: no stream ids free\n"); ++printf("ERROR: no stream ids free\n"); + continue; + } else { + pcie->stream_id_cur++; +@@ -161,7 +161,7 @@ static void fdt_fixup_pcie_ls_gen4(void *blob) + + index = ls_pcie_g4_next_lut_index(pcie); + if (index < 0) { +- debug("ERROR: no LUT indexes free\n"); ++printf("ERROR: no LUT indexes free\n"); + continue; + } + +@@ -187,7 +187,7 @@ static void ft_pcie_ep_layerscape_gen4_fix(void *blob, struct ls_pcie_g4 *pcie) + pcie->ccsr_res.start); + + if (off < 0) { +- debug("%s: ERROR: failed to find pcie compatiable\n", ++printf("%s: ERROR: failed to find pcie compatiable\n", + __func__); + return; + } +@@ -209,7 +209,7 @@ static void ft_pcie_rc_layerscape_gen4_fix(void *blob, struct ls_pcie_g4 *pcie) + #error "No CONFIG_FSL_PCIE_COMPAT defined" + #endif + if (off < 0) { +- debug("%s: ERROR: failed to find pcie compatiable\n", __func__); ++printf("%s: ERROR: failed to find pcie compatiable\n", __func__); + return; + } + +diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c +index bd2c19f7f..9023f4840 100644 +--- a/drivers/pci/pcie_layerscape_rc.c ++++ b/drivers/pci/pcie_layerscape_rc.c +@@ -345,7 +345,7 @@ static int ls_pcie_probe(struct udevice *dev) + + pcie->big_endian = fdtdec_get_bool(fdt, node, "big-endian"); + +- debug("%s dbi:%lx lut:%lx ctrl:0x%lx cfg0:0x%lx, big-endian:%d\n", ++printf("%s dbi:%lx lut:%lx ctrl:0x%lx cfg0:0x%lx, big-endian:%d\n", + dev->name, (unsigned long)pcie->dbi, (unsigned long)pcie->lut, + (unsigned long)pcie->ctrl, (unsigned long)pcie_rc->cfg0, + pcie->big_endian); +diff --git a/drivers/pci/pcie_mediatek.c b/drivers/pci/pcie_mediatek.c +index f55567138..255908e26 100644 +--- a/drivers/pci/pcie_mediatek.c ++++ b/drivers/pci/pcie_mediatek.c +@@ -257,7 +257,7 @@ static struct mtk_pcie_port *mtk_pcie_find_port(const struct udevice *bus, + if (PCI_BUS(bdf) != 0) { + ret = pci_get_bus(PCI_BUS(bdf), &dev); + if (ret) { +- debug("No such device,ret = %d\n", ret); ++printf("No such device,ret = %d\n", ret); + return NULL; + } + +@@ -482,37 +482,37 @@ static void mtk_pcie_enable_port_v2(struct mtk_pcie_port *port) + + err = clk_enable(&port->sys_ck); + if (err) { +- debug("clk_enable(sys_ck) failed: %d\n", err); ++printf("clk_enable(sys_ck) failed: %d\n", err); + goto exit; + } + + err = clk_enable(&port->ahb_ck); + if (err) { +- debug("clk_enable(ahb_ck) failed: %d\n", err); ++printf("clk_enable(ahb_ck) failed: %d\n", err); + goto exit; + } + + err = clk_enable(&port->aux_ck); + if (err) { +- debug("clk_enable(aux_ck) failed: %d\n", err); ++printf("clk_enable(aux_ck) failed: %d\n", err); + goto exit; + } + + err = clk_enable(&port->axi_ck); + if (err) { +- debug("clk_enable(axi_ck) failed: %d\n", err); ++printf("clk_enable(axi_ck) failed: %d\n", err); + goto exit; + } + + err = clk_enable(&port->obff_ck); + if (err) { +- debug("clk_enable(obff_ck) failed: %d\n", err); ++printf("clk_enable(obff_ck) failed: %d\n", err); + goto exit; + } + + err = clk_enable(&port->pipe_ck); + if (err) { +- debug("clk_enable(pipe_ck) failed: %d\n", err); ++printf("clk_enable(pipe_ck) failed: %d\n", err); + goto exit; + } + +@@ -577,49 +577,49 @@ static int mtk_pcie_parse_port_v2(struct udevice *dev, u32 slot) + snprintf(name, sizeof(name), "port%d", slot); + port->base = dev_remap_addr_name(dev, name); + if (!port->base) { +- debug("failed to map port%d base\n", slot); ++printf("failed to map port%d base\n", slot); + return -ENOENT; + } + + snprintf(name, sizeof(name), "sys_ck%d", slot); + err = clk_get_by_name(dev, name, &port->sys_ck); + if (err) { +- debug("clk_get_by_name(sys_ck) failed: %d\n", err); ++printf("clk_get_by_name(sys_ck) failed: %d\n", err); + return err; + } + + snprintf(name, sizeof(name), "ahb_ck%d", slot); + err = clk_get_by_name(dev, name, &port->ahb_ck); + if (err) { +- debug("clk_get_by_name(ahb_ck) failed: %d\n", err); ++printf("clk_get_by_name(ahb_ck) failed: %d\n", err); + return err; + } + + snprintf(name, sizeof(name), "aux_ck%d", slot); + err = clk_get_by_name(dev, name, &port->aux_ck); + if (err) { +- debug("clk_get_by_name(aux_ck) failed: %d\n", err); ++printf("clk_get_by_name(aux_ck) failed: %d\n", err); + return err; + } + + snprintf(name, sizeof(name), "axi_ck%d", slot); + err = clk_get_by_name(dev, name, &port->axi_ck); + if (err) { +- debug("clk_get_by_name(axi_ck) failed: %d\n", err); ++printf("clk_get_by_name(axi_ck) failed: %d\n", err); + return err; + } + + snprintf(name, sizeof(name), "obff_ck%d", slot); + err = clk_get_by_name(dev, name, &port->obff_ck); + if (err) { +- debug("clk_get_by_name(obff_ck) failed: %d\n", err); ++printf("clk_get_by_name(obff_ck) failed: %d\n", err); + return err; + } + + snprintf(name, sizeof(name), "pipe_ck%d", slot); + err = clk_get_by_name(dev, name, &port->pipe_ck); + if (err) { +- debug("clk_get_by_name(pipe_ck) failed: %d\n", err); ++printf("clk_get_by_name(pipe_ck) failed: %d\n", err); + return err; + } + +diff --git a/drivers/pci/pcie_octeon.c b/drivers/pci/pcie_octeon.c +index 3b28bd814..40802eb2e 100644 +--- a/drivers/pci/pcie_octeon.c ++++ b/drivers/pci/pcie_octeon.c +@@ -46,9 +46,9 @@ static int pcie_octeon_write_config(struct udevice *bus, pci_dev_t bdf, + int busno; + int port; + +- debug("PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ", ++printf("PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); +- debug("(addr,size,val)=(0x%04x, %d, 0x%08lx)\n", offset, size, value); ++printf("(addr,size,val)=(0x%04x, %d, 0x%08lx)\n", offset, size, value); + + port = pcie->pcie_port; + busno = PCI_BUS(bdf) - hose->first_busno + 1; +@@ -106,7 +106,7 @@ static int pcie_octeon_read_config(const struct udevice *bus, pci_dev_t bdf, + printf("Invalid size\n"); + }; + +- debug("%02x.%02x.%02x: u%d %x -> %lx\n", ++printf("%02x.%02x.%02x: u%d %x -> %lx\n", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, *valuep); + + return 0; +diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c +index 5723c9803..d4cade2f5 100644 +--- a/drivers/phy/allwinner/phy-sun4i-usb.c ++++ b/drivers/phy/allwinner/phy-sun4i-usb.c +@@ -371,7 +371,7 @@ static int sun4i_usb_phy_xlate(struct phy *phy, + else + phy->id = 0; + +- debug("%s: phy_id = %ld\n", __func__, phy->id); ++printf("%s: phy_id = %ld\n", __func__, phy->id); + return 0; + } + +@@ -381,7 +381,7 @@ int sun4i_usb_phy_vbus_detect(struct phy *phy) + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + int err, retries = 3; + +- debug("%s: id_det = %d\n", __func__, usb_phy->gpio_id_det); ++printf("%s: id_det = %d\n", __func__, usb_phy->gpio_id_det); + + if (usb_phy->gpio_vbus_det < 0) + return usb_phy->gpio_vbus_det; +@@ -405,7 +405,7 @@ int sun4i_usb_phy_id_detect(struct phy *phy) + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + +- debug("%s: id_det = %d\n", __func__, usb_phy->gpio_id_det); ++printf("%s: id_det = %d\n", __func__, usb_phy->gpio_id_det); + + if (usb_phy->gpio_id_det < 0) + return usb_phy->gpio_id_det; +@@ -508,7 +508,7 @@ static int sun4i_usb_phy_probe(struct udevice *dev) + phy->id = i; + }; + +- debug("Allwinner Sun4I USB PHY driver loaded\n"); ++printf("Allwinner Sun4I USB PHY driver loaded\n"); + return 0; + } + +diff --git a/drivers/phy/keystone-usb-phy.c b/drivers/phy/keystone-usb-phy.c +index 12f8a265f..61d844050 100644 +--- a/drivers/phy/keystone-usb-phy.c ++++ b/drivers/phy/keystone-usb-phy.c +@@ -40,7 +40,7 @@ static int keystone_usb_init(struct phy *phy) + /* Release USB from reset */ + rc = psc_enable_module(keystone->psc_domain); + if (rc) { +- debug("Cannot enable USB module"); ++printf("Cannot enable USB module"); + return -rc; + } + mdelay(10); +@@ -90,7 +90,7 @@ static int keystone_usb_exit(struct phy *phy) + struct keystone_usb_phy *keystone = dev_get_priv(dev); + + if (psc_disable_module(keystone->psc_domain)) +- debug("failed to disable USB module!\n"); ++printf("failed to disable USB module!\n"); + + return 0; + } +diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c +index 06822d1d1..f09780925 100644 +--- a/drivers/phy/marvell/comphy_a3700.c ++++ b/drivers/phy/marvell/comphy_a3700.c +@@ -156,7 +156,7 @@ static u32 comphy_poll_reg(void *addr, u32 val, u32 mask, u8 op_type) + udelay(10000); + } + +- debug("Time out waiting (%p = %#010x)\n", addr, rval); ++printf("Time out waiting (%p = %#010x)\n", addr, rval); + return 0; + } + +@@ -818,7 +818,7 @@ static int comphy_sgmii_power_up(u32 lane, u32 speed, u32 invert) + * 40 MHz. For REF clock 25 MHz the default values stored in PHY + * registers are OK. + */ +- debug("Running C-DPI phy init %s mode\n", ++printf("Running C-DPI phy init %s mode\n", + speed == COMPHY_SPEED_3_125G ? "2G5" : "1G"); + if (get_ref_clk() == 40) + comphy_sgmii_phy_init(lane, speed); +@@ -922,13 +922,13 @@ void comphy_dedicated_phys_init(void) + if (!ret) + printf("Failed to initialize UTMI PHY\n"); + else +- debug("UTMI PHY init succeed\n"); ++printf("UTMI PHY init succeed\n"); + } else { +- debug("USB%d node is disabled\n", ++printf("USB%d node is disabled\n", + usb32 == 0 ? 2 : 3); + } + } else { +- debug("No USB%d node in DT\n", usb32 == 0 ? 2 : 3); ++printf("No USB%d node in DT\n", usb32 == 0 ? 2 : 3); + } + } + +@@ -945,12 +945,12 @@ void comphy_dedicated_phys_init(void) + if (!ret) + printf("Failed to initialize SDIO/eMMC PHY\n"); + else +- debug("SDIO/eMMC PHY init succeed\n"); ++printf("SDIO/eMMC PHY init succeed\n"); + } else { +- debug("SDIO/eMMC node is disabled\n"); ++printf("SDIO/eMMC node is disabled\n"); + } + } else { +- debug("No SDIO/eMMC node in DT\n"); ++printf("No SDIO/eMMC node in DT\n"); + } + + debug_exit(); +@@ -971,8 +971,8 @@ int comphy_a3700_init(struct chip_serdes_phy_config *chip_cfg, + + for (lane = 0, comphy_map = serdes_map; lane < comphy_max_count; + lane++, comphy_map++) { +- debug("Initialize serdes number %d\n", lane); +- debug("Serdes type = 0x%x invert=%d\n", ++printf("Initialize serdes number %d\n", lane); ++printf("Serdes type = 0x%x invert=%d\n", + comphy_map->type, comphy_map->invert); + + switch (comphy_map->type) { +@@ -1004,7 +1004,7 @@ int comphy_a3700_init(struct chip_serdes_phy_config *chip_cfg, + break; + + default: +- debug("Unknown SerDes type, skip initialize SerDes %d\n", ++printf("Unknown SerDes type, skip initialize SerDes %d\n", + lane); + ret = 1; + break; +diff --git a/drivers/phy/marvell/comphy_core.h b/drivers/phy/marvell/comphy_core.h +index ba64491df..c3f82f5ac 100644 +--- a/drivers/phy/marvell/comphy_core.h ++++ b/drivers/phy/marvell/comphy_core.h +@@ -57,11 +57,11 @@ static inline void reg_set_silent(void __iomem *addr, u32 data, u32 mask) + + static inline void reg_set(void __iomem *addr, u32 data, u32 mask) + { +- debug("Write to address = %#010lx, data = %#010x (mask = %#010x) - ", ++printf("Write to address = %#010lx, data = %#010x (mask = %#010x) - ", + (unsigned long)addr, data, mask); +- debug("old value = %#010x ==> ", readl(addr)); ++printf("old value = %#010x ==> ", readl(addr)); + reg_set_silent(addr, data, mask); +- debug("new value %#010x\n", readl(addr)); ++printf("new value %#010x\n", readl(addr)); + } + + static inline void reg_set_silent16(void __iomem *addr, u16 data, u16 mask) +@@ -76,11 +76,11 @@ static inline void reg_set_silent16(void __iomem *addr, u16 data, u16 mask) + + static inline void reg_set16(void __iomem *addr, u16 data, u16 mask) + { +- debug("Write to address = %#010lx, data = %#06x (mask = %#06x) - ", ++printf("Write to address = %#010lx, data = %#06x (mask = %#06x) - ", + (unsigned long)addr, data, mask); +- debug("old value = %#06x ==> ", readw(addr)); ++printf("old value = %#06x ==> ", readw(addr)); + reg_set_silent16(addr, data, mask); +- debug("new value %#06x\n", readw(addr)); ++printf("new value %#06x\n", readw(addr)); + } + + /* SoC specific init functions */ +diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c +index 418318d12..cd88cf300 100644 +--- a/drivers/phy/marvell/comphy_cp110.c ++++ b/drivers/phy/marvell/comphy_cp110.c +@@ -160,9 +160,9 @@ static int comphy_sata_power_up(u32 lane, void __iomem *hpipe_base, + return 0; + } + +- debug("SATA address found in FDT %p\n", sata_base); ++printf("SATA address found in FDT %p\n", sata_base); + +- debug("stage: MAC configuration - power down comphy\n"); ++printf("stage: MAC configuration - power down comphy\n"); + /* + * MAC configuration powe down comphy use indirect address for + * vendor spesific SATA control register +@@ -229,7 +229,7 @@ static void comphy_utmi_power_down(u32 utmi_index, void __iomem *utmi_base_addr, + u32 mask, data; + + debug_enter(); +- debug("stage: UTMI %d - Power down transceiver (power down Phy), Power down PLL, and SuspendDM\n", ++printf("stage: UTMI %d - Power down transceiver (power down Phy), Power down PLL, and SuspendDM\n", + utmi_index); + /* Power down UTMI PHY */ + reg_set(utmi_cfg_addr, 0x0 << UTMI_PHY_CFG_PU_OFFSET, +@@ -240,7 +240,7 @@ static void comphy_utmi_power_down(u32 utmi_index, void __iomem *utmi_base_addr, + * (Device can be connected to UTMI0 or to UTMI1) + */ + if (utmi_phy_port == UTMI_PHY_TO_USB3_DEVICE0) { +- debug("stage: UTMI %d - Enable Device mode and configure UTMI mux\n", ++printf("stage: UTMI %d - Enable Device mode and configure UTMI mux\n", + utmi_index); + /* USB3 Device UTMI enable */ + mask = UTMI_USB_CFG_DEVICE_EN_MASK; +@@ -275,7 +275,7 @@ static void comphy_utmi_phy_config(u32 utmi_index, void __iomem *utmi_pll_addr, + u32 mask, data; + + debug_exit(); +- debug("stage: Configure UTMI PHY %d registers\n", utmi_index); ++printf("stage: Configure UTMI PHY %d registers\n", utmi_index); + /* Reference Clock Divider Select */ + mask = UTMI_PLL_CTRL_REFDIV_MASK; + data = 0x5 << UTMI_PLL_CTRL_REFDIV_OFFSET; +@@ -347,7 +347,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_pll_addr, + void __iomem *addr; + + debug_enter(); +- debug("stage: UTMI %d - Power up transceiver(Power up Phy), and exit SuspendDM\n", ++printf("stage: UTMI %d - Power up transceiver(Power up Phy), and exit SuspendDM\n", + utmi_index); + /* Power UP UTMI PHY */ + reg_set(utmi_cfg_addr, 0x1 << UTMI_PHY_CFG_PU_OFFSET, +@@ -357,14 +357,14 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_pll_addr, + 0x0 << UTMI_CTRL_STATUS0_TEST_SEL_OFFSET, + UTMI_CTRL_STATUS0_TEST_SEL_MASK); + +- debug("stage: Polling for PLL and impedance calibration done, and PLL ready done\n"); ++printf("stage: Polling for PLL and impedance calibration done, and PLL ready done\n"); + addr = utmi_pll_addr + UTMI_CALIB_CTRL_REG; + data = UTMI_CALIB_CTRL_IMPCAL_DONE_MASK; + mask = data; + data = polling_with_timeout(addr, data, mask, 100); + if (data != 0) { + pr_err("Impedance calibration is not done\n"); +- debug("Read from reg = %p - value = 0x%x\n", addr, data); ++printf("Read from reg = %p - value = 0x%x\n", addr, data); + ret = 0; + } + +@@ -373,7 +373,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_pll_addr, + data = polling_with_timeout(addr, data, mask, 100); + if (data != 0) { + pr_err("PLL calibration is not done\n"); +- debug("Read from reg = %p - value = 0x%x\n", addr, data); ++printf("Read from reg = %p - value = 0x%x\n", addr, data); + ret = 0; + } + +@@ -383,14 +383,14 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_pll_addr, + data = polling_with_timeout(addr, data, mask, 100); + if (data != 0) { + pr_err("PLL is not ready\n"); +- debug("Read from reg = %p - value = 0x%x\n", addr, data); ++printf("Read from reg = %p - value = 0x%x\n", addr, data); + ret = 0; + } + + if (ret) +- debug("Passed\n"); ++printf("Passed\n"); + else +- debug("\n"); ++printf("\n"); + + debug_exit(); + return ret; +@@ -421,7 +421,7 @@ static void comphy_utmi_phy_init(u32 utmi_phy_count, + cp110_utmi_data[i].utmi_phy_port); + } + /* PLL Power down */ +- debug("stage: UTMI PHY power down PLL\n"); ++printf("stage: UTMI PHY power down PLL\n"); + for (i = 0; i < utmi_phy_count; i++) { + reg_set(cp110_utmi_data[i].usb_cfg_addr, + 0x0 << UTMI_USB_CFG_PLL_OFFSET, UTMI_USB_CFG_PLL_MASK); +@@ -453,7 +453,7 @@ static void comphy_utmi_phy_init(u32 utmi_phy_count, + cp110_utmi_data[i].utmi_phy_port); + } + /* PLL Power up */ +- debug("stage: UTMI PHY power up PLL\n"); ++printf("stage: UTMI PHY power up PLL\n"); + for (i = 0; i < utmi_phy_count; i++) { + reg_set(cp110_utmi_data[i].usb_cfg_addr, + 0x1 << UTMI_USB_CFG_PLL_OFFSET, UTMI_USB_CFG_PLL_MASK); +@@ -475,7 +475,7 @@ void comphy_dedicated_phys_init(void) + int parent = -1; + + debug_enter(); +- debug("Initialize USB UTMI PHYs\n"); ++printf("Initialize USB UTMI PHYs\n"); + + for (node_idx = 0; node_idx < MAX_UTMI_PHY_COUNT;) { + /* Find the UTMI phy node in device tree */ +@@ -575,8 +575,8 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, + + for (lane = 0, ptr_comphy_map = serdes_map; lane < comphy_max_count; + lane++, ptr_comphy_map++) { +- debug("Initialize serdes number %d\n", lane); +- debug("Serdes type = 0x%x\n", ptr_comphy_map->type); ++printf("Initialize serdes number %d\n", lane); ++printf("Serdes type = 0x%x\n", ptr_comphy_map->type); + if (lane == 4) { + /* + * PCIe lanes above the first 4 lanes, can be only +@@ -633,7 +633,7 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, + id = ptr_comphy_map->type - COMPHY_TYPE_SGMII0; + + if (ptr_comphy_map->speed == COMPHY_SPEED_INVALID) { +- debug("Warning: SGMII PHY speed in lane %d is invalid, set PHY speed to 1.25G\n", ++printf("Warning: SGMII PHY speed in lane %d is invalid, set PHY speed to 1.25G\n", + lane); + ptr_comphy_map->speed = COMPHY_SPEED_1_25G; + } +@@ -661,7 +661,7 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, + mode); + break; + default: +- debug("Unknown SerDes type, skip initialize SerDes %d\n", ++printf("Unknown SerDes type, skip initialize SerDes %d\n", + lane); + break; + } +diff --git a/drivers/phy/marvell/comphy_mux.c b/drivers/phy/marvell/comphy_mux.c +index 10981d25e..cee3e898c 100644 +--- a/drivers/phy/marvell/comphy_mux.c ++++ b/drivers/phy/marvell/comphy_mux.c +@@ -39,13 +39,13 @@ static void comphy_mux_check_config(struct comphy_mux_data *mux_data, + } + } + if (valid == 0) { +- debug("lane number %d, had invalid type %d\n", ++printf("lane number %d, had invalid type %d\n", + lane, comphy_map_data->type); +- debug("set lane %d as type %d\n", lane, ++printf("set lane %d as type %d\n", lane, + COMPHY_TYPE_UNCONNECTED); + comphy_map_data->type = COMPHY_TYPE_UNCONNECTED; + } else { +- debug("lane number %d, has type %d\n", ++printf("lane number %d, has type %d\n", + lane, comphy_map_data->type); + } + } +diff --git a/drivers/phy/phy-bcm-sr-pcie.c b/drivers/phy/phy-bcm-sr-pcie.c +index f0e795333..030728431 100644 +--- a/drivers/phy/phy-bcm-sr-pcie.c ++++ b/drivers/phy/phy-bcm-sr-pcie.c +@@ -109,7 +109,7 @@ static int sr_pcie_phy_init(struct phy *phy) + struct sr_pcie_phy_core *core = dev_get_priv(phy->dev); + unsigned int core_idx = phy->id; + +- debug("%s %lx\n", __func__, phy->id); ++printf("%s %lx\n", __func__, phy->id); + /* + * Check whether this PHY is for root complex or not. If yes, return + * zero so the host driver can proceed to enumeration. If not, return +@@ -123,7 +123,7 @@ static int sr_pcie_phy_init(struct phy *phy) + + static int sr_pcie_phy_xlate(struct phy *phy, struct ofnode_phandle_args *args) + { +- debug("%s %d\n", __func__, args->args[0]); ++printf("%s %d\n", __func__, args->args[0]); + if (args->args_count && args->args[0] < SR_NR_PCIE_PHYS) + phy->id = args->args[0]; + else +@@ -145,8 +145,8 @@ static int sr_pcie_phy_probe(struct udevice *dev) + + core->base = (void __iomem *)devfdt_get_addr_name(dev, "reg_base"); + core->cdru = (void __iomem *)devfdt_get_addr_name(dev, "cdru_base"); +- debug("ip base %p\n", core->base); +- debug("cdru base %p\n", core->cdru); ++printf("ip base %p\n", core->base); ++printf("cdru base %p\n", core->cdru); + + /* read the PCIe PIPEMUX strap setting */ + core->pipemux = pipemux_strap_read(core); +@@ -154,7 +154,7 @@ static int sr_pcie_phy_probe(struct udevice *dev) + pr_err("invalid PCIe PIPEMUX strap %u\n", core->pipemux); + return -EIO; + } +- debug("%s %#x\n", __func__, core->pipemux); ++printf("%s %#x\n", __func__, core->pipemux); + + pr_info("Stingray PCIe PHY driver initialized\n"); + +diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c +index d025188ea..d5f65ef55 100644 +--- a/drivers/phy/phy-da8xx-usb.c ++++ b/drivers/phy/phy-da8xx-usb.c +@@ -33,7 +33,7 @@ static int da8xx_usb_phy_power_on(struct phy *phy) + return 0; + } + +- debug("Phy was not turned on\n"); ++printf("Phy was not turned on\n"); + + return -ENODEV; + } +diff --git a/drivers/phy/phy-ti-am654.c b/drivers/phy/phy-ti-am654.c +index 82010e7c9..3710241b2 100644 +--- a/drivers/phy/phy-ti-am654.c ++++ b/drivers/phy/phy-ti-am654.c +@@ -99,7 +99,7 @@ static int serdes_am654_mux_clk_probe(struct udevice *dev) + struct regmap *regmap; + int ret; + +- debug("%s(dev=%s)\n", __func__, dev->name); ++printf("%s(dev=%s)\n", __func__, dev->name); + + if (!data) + return -ENOMEM; +@@ -147,7 +147,7 @@ static int serdes_am654_mux_clk_set_parent(struct clk *clk, struct clk *parent) + u32 val; + int i; + +- debug("%s(clk=%s, parent=%s)\n", __func__, clk->dev->name, ++printf("%s(clk=%s, parent=%s)\n", __func__, clk->dev->name, + parent->dev->name); + + /* +diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c +index 43ffbcee0..20ea75eb5 100644 +--- a/drivers/phy/phy-uclass.c ++++ b/drivers/phy/phy-uclass.c +@@ -18,10 +18,10 @@ static inline struct phy_ops *phy_dev_ops(struct udevice *dev) + static int generic_phy_xlate_offs_flags(struct phy *phy, + struct ofnode_phandle_args *args) + { +- debug("%s(phy=%p)\n", __func__, phy); ++printf("%s(phy=%p)\n", __func__, phy); + + if (args->args_count > 1) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -40,7 +40,7 @@ int generic_phy_get_by_index_nodev(ofnode node, int index, struct phy *phy) + struct udevice *phydev; + int i, ret; + +- debug("%s(node=%s, index=%d, phy=%p)\n", ++printf("%s(node=%s, index=%d, phy=%p)\n", + __func__, ofnode_get_name(node), index, phy); + + assert(phy); +@@ -48,14 +48,14 @@ int generic_phy_get_by_index_nodev(ofnode node, int index, struct phy *phy) + ret = ofnode_parse_phandle_with_args(node, "phys", "#phy-cells", 0, + index, &args); + if (ret) { +- debug("%s: dev_read_phandle_with_args failed: err=%d\n", ++printf("%s: dev_read_phandle_with_args failed: err=%d\n", + __func__, ret); + return ret; + } + + ret = uclass_get_device_by_ofnode(UCLASS_PHY, args.node, &phydev); + if (ret) { +- debug("%s: uclass_get_device_by_ofnode failed: err=%d\n", ++printf("%s: uclass_get_device_by_ofnode failed: err=%d\n", + __func__, ret); + + /* Check if args.node's parent is a PHY provider */ +@@ -82,7 +82,7 @@ int generic_phy_get_by_index_nodev(ofnode node, int index, struct phy *phy) + else + ret = generic_phy_xlate_offs_flags(phy, &args); + if (ret) { +- debug("of_xlate() failed: %d\n", ret); ++printf("of_xlate() failed: %d\n", ret); + goto err; + } + +@@ -103,11 +103,11 @@ int generic_phy_get_by_name(struct udevice *dev, const char *phy_name, + { + int index; + +- debug("%s(dev=%p, name=%s, phy=%p)\n", __func__, dev, phy_name, phy); ++printf("%s(dev=%p, name=%s, phy=%p)\n", __func__, dev, phy_name, phy); + + index = dev_read_stringlist_search(dev, "phy-names", phy_name); + if (index < 0) { +- debug("dev_read_stringlist_search() failed: %d\n", index); ++printf("dev_read_stringlist_search() failed: %d\n", index); + return index; + } + +diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2500.c b/drivers/pinctrl/aspeed/pinctrl_ast2500.c +index 3c2e10b88..f5075dc49 100644 +--- a/drivers/pinctrl/aspeed/pinctrl_ast2500.c ++++ b/drivers/pinctrl/aspeed/pinctrl_ast2500.c +@@ -65,7 +65,7 @@ static const struct ast2500_group_config ast2500_groups[] = { + + static int ast2500_pinctrl_get_groups_count(struct udevice *dev) + { +- debug("PINCTRL: get_(functions/groups)_count\n"); ++printf("PINCTRL: get_(functions/groups)_count\n"); + + return ARRAY_SIZE(ast2500_groups); + } +@@ -73,7 +73,7 @@ static int ast2500_pinctrl_get_groups_count(struct udevice *dev) + static const char *ast2500_pinctrl_get_group_name(struct udevice *dev, + unsigned selector) + { +- debug("PINCTRL: get_(function/group)_name %u\n", selector); ++printf("PINCTRL: get_(function/group)_name %u\n", selector); + + return ast2500_groups[selector].group_name; + } +@@ -85,7 +85,7 @@ static int ast2500_pinctrl_group_set(struct udevice *dev, unsigned selector, + const struct ast2500_group_config *config; + u32 *ctrl_reg; + +- debug("PINCTRL: group_set <%u, %u>\n", selector, func_selector); ++printf("PINCTRL: group_set <%u, %u>\n", selector, func_selector); + if (selector >= ARRAY_SIZE(ast2500_groups)) + return -EINVAL; + +diff --git a/drivers/pinctrl/ath79/pinctrl_ar933x.c b/drivers/pinctrl/ath79/pinctrl_ar933x.c +index eb673a9f6..e18c8b929 100644 +--- a/drivers/pinctrl/ath79/pinctrl_ar933x.c ++++ b/drivers/pinctrl/ath79/pinctrl_ar933x.c +@@ -55,7 +55,7 @@ static int ar933x_pinctrl_request(struct udevice *dev, int func, int flags) + { + struct ar933x_pinctrl_priv *priv = dev_get_priv(dev); + +- debug("%s: func=%x, flags=%x\n", __func__, func, flags); ++printf("%s: func=%x, flags=%x\n", __func__, func, flags); + switch (func) { + case PERIPH_ID_SPI0: + pinctrl_ar933x_spi_config(priv, flags); +diff --git a/drivers/pinctrl/ath79/pinctrl_qca953x.c b/drivers/pinctrl/ath79/pinctrl_qca953x.c +index 0d534268e..894ab7d75 100644 +--- a/drivers/pinctrl/ath79/pinctrl_qca953x.c ++++ b/drivers/pinctrl/ath79/pinctrl_qca953x.c +@@ -75,7 +75,7 @@ static int qca953x_pinctrl_request(struct udevice *dev, int func, int flags) + { + struct qca953x_pinctrl_priv *priv = dev_get_priv(dev); + +- debug("%s: func=%x, flags=%x\n", __func__, func, flags); ++printf("%s: func=%x, flags=%x\n", __func__, func, flags); + switch (func) { + case PERIPH_ID_SPI0: + pinctrl_qca953x_spi_config(priv, flags); +diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c +index 44a310f83..fc435dec2 100644 +--- a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c ++++ b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c +@@ -69,7 +69,7 @@ int bcm283x_pinctrl_set_state(struct udevice *dev, struct udevice *config) + if (!dev_read_prop(config, "brcm,pins", &len) || !len || + len & 0x3 || dev_read_u32_array(config, "brcm,pins", pin_arr, + len / sizeof(u32))) { +- debug("Failed reading pins array for pinconfig %s (%d)\n", ++printf("Failed reading pins array for pinconfig %s (%d)\n", + config->name, len); + return -EINVAL; + } +@@ -78,7 +78,7 @@ int bcm283x_pinctrl_set_state(struct udevice *dev, struct udevice *config) + + function = dev_read_u32_default(config, "brcm,function", -1); + if (function < 0) { +- debug("Failed reading function for pinconfig %s (%d)\n", ++printf("Failed reading function for pinconfig %s (%d)\n", + config->name, function); + return -EINVAL; + } +@@ -112,7 +112,7 @@ int bcm283x_pinctl_of_to_plat(struct udevice *dev) + + priv->base_reg = dev_read_addr_ptr(dev); + if (!priv->base_reg) { +- debug("%s: Failed to get base address\n", __func__); ++printf("%s: Failed to get base address\n", __func__); + return -EINVAL; + } + +diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c +index cfe94cf9e..8b81e84a3 100644 +--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c ++++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c +@@ -82,7 +82,7 @@ static int meson_axg_pinmux_group_set(struct udevice *dev, + pmx_data = (struct meson_pmx_axg_data *)group->data; + func = &priv->data->funcs[func_selector]; + +- debug("pinmux: set group %s func %s\n", group->name, func->name); ++printf("pinmux: set group %s func %s\n", group->name, func->name); + + for (i = 0; i < group->num_pins; i++) { + ret = meson_axg_pmx_update_function(dev, group->pins[i], +diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c +index 159f3406a..1c5fed9e9 100644 +--- a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c ++++ b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c +@@ -30,7 +30,7 @@ static void meson_gx_pinmux_disable_other_groups(struct meson_pinctrl *priv, + for (j = 0; j < group->num_pins; j++) { + if (group->pins[j] == pin) { + /* We have found a group using the pin */ +- debug("pinmux: disabling %s\n", group->name); ++printf("pinmux: disabling %s\n", group->name); + addr = priv->reg_mux + pmx_data->reg * 4; + writel(readl(addr) & ~BIT(pmx_data->bit), addr); + } +@@ -53,7 +53,7 @@ static int meson_gx_pinmux_group_set(struct udevice *dev, + pmx_data = (struct meson_gx_pmx_data *)group->data; + func = &priv->data->funcs[func_selector]; + +- debug("pinmux: set group %s func %s\n", group->name, func->name); ++printf("pinmux: set group %s func %s\n", group->name, func->name); + + /* + * Disable groups using the same pins. +diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c +index ee362d846..a95ec0c4a 100644 +--- a/drivers/pinctrl/meson/pinctrl-meson.c ++++ b/drivers/pinctrl/meson/pinctrl-meson.c +@@ -351,13 +351,13 @@ int meson_pinctrl_probe(struct udevice *dev) + /* FIXME: Should use livetree */ + na = fdt_address_cells(gd->fdt_blob, dev_of_offset(dev->parent)); + if (na < 1) { +- debug("bad #address-cells\n"); ++printf("bad #address-cells\n"); + return -EINVAL; + } + + ns = fdt_size_cells(gd->fdt_blob, dev_of_offset(dev->parent)); + if (ns < 1) { +- debug("bad #size-cells\n"); ++printf("bad #size-cells\n"); + return -EINVAL; + } + +@@ -369,20 +369,20 @@ int meson_pinctrl_probe(struct udevice *dev) + } + + if (!gpio) { +- debug("gpio node not found\n"); ++printf("gpio node not found\n"); + return -EINVAL; + } + + addr = parse_address(gpio, "mux", na, ns); + if (addr == FDT_ADDR_T_NONE) { +- debug("mux address not found\n"); ++printf("mux address not found\n"); + return -EINVAL; + } + priv->reg_mux = (void __iomem *)addr; + + addr = parse_address(gpio, "gpio", na, ns); + if (addr == FDT_ADDR_T_NONE) { +- debug("gpio address not found\n"); ++printf("gpio address not found\n"); + return -EINVAL; + } + priv->reg_gpio = (void __iomem *)addr; +diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c +index 536c6aff9..3e52eeb55 100644 +--- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c ++++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c +@@ -83,7 +83,7 @@ int mvebu_pinctrl_set_state(struct udevice *dev, struct udevice *config) + pin_arr, + MVEBU_MAX_PINS_PER_BANK); + if (pin_count <= 0) { +- debug("Failed reading pins array for pinconfig %s (%d)\n", ++printf("Failed reading pins array for pinconfig %s (%d)\n", + config->name, pin_count); + return -EINVAL; + } +@@ -103,7 +103,7 @@ int mvebu_pinctrl_set_state(struct udevice *dev, struct udevice *config) + int pin = pin_arr[i]; + + if (function > priv->max_func) { +- debug("Illegal function %d for pinconfig %s\n", ++printf("Illegal function %d for pinconfig %s\n", + function, config->name); + return -EINVAL; + } +@@ -141,7 +141,7 @@ static int mvebu_pinctrl_set_state_all(struct udevice *dev, + err = fdtdec_get_int_array(blob, node, "pin-func", + func_arr, priv->pin_cnt); + if (err) { +- debug("Failed reading pin functions for bank %s\n", ++printf("Failed reading pin functions for bank %s\n", + priv->bank_name); + return -EINVAL; + } +@@ -161,11 +161,11 @@ static int mvebu_pinctrl_set_state_all(struct udevice *dev, + + /* Bypass pins with function 0xFF */ + if (func == 0xff) { +- debug("Warning: pin %d value is not modified ", pin); +- debug("(kept as default)\n"); ++printf("Warning: pin %d value is not modified ", pin); ++printf("(kept as default)\n"); + continue; + } else if (func > priv->max_func) { +- debug("Illegal function %d for pin %d\n", func, pin); ++printf("Illegal function %d for pin %d\n", func, pin); + return -EINVAL; + } + +@@ -190,13 +190,13 @@ int mvebu_pinctl_probe(struct udevice *dev) + + priv = dev_get_priv(dev); + if (!priv) { +- debug("%s: Failed to get private\n", __func__); ++printf("%s: Failed to get private\n", __func__); + return -EINVAL; + } + + priv->base_reg = dev_read_addr_ptr(dev); + if (!priv->base_reg) { +- debug("%s: Failed to get base address\n", __func__); ++printf("%s: Failed to get base address\n", __func__); + return -EINVAL; + } + +diff --git a/drivers/pinctrl/nxp/pinctrl-mxs.c b/drivers/pinctrl/nxp/pinctrl-mxs.c +index e6b10a377..b2febc304 100644 +--- a/drivers/pinctrl/nxp/pinctrl-mxs.c ++++ b/drivers/pinctrl/nxp/pinctrl-mxs.c +@@ -55,7 +55,7 @@ static int mxs_pinctrl_set_mux(struct udevice *dev, u32 val, int bank, int pin) + shift = pin % 16 * 2; + + mxs_pinctrl_rmwl(muxsel, 0x3, shift, reg); +- debug(" mux %d,", muxsel); ++printf(" mux %d,", muxsel); + + return 0; + } +@@ -67,7 +67,7 @@ static int mxs_pinctrl_set_state(struct udevice *dev, struct udevice *conf) + int npins, size, i, ret; + unsigned long config; + +- debug("\n%s: set state: %s\n", __func__, conf->name); ++printf("\n%s: set state: %s\n", __func__, conf->name); + + size = dev_read_size(conf, "fsl,pinmux-ids"); + if (size < 0) +@@ -108,11 +108,11 @@ static int mxs_pinctrl_set_state(struct udevice *dev, struct udevice *conf) + bank = PINID_TO_BANK(pinid); + pin = PINID_TO_PIN(pinid); + +- debug("(val: 0x%x) pin %d,", val, pinid); ++printf("(val: 0x%x) pin %d,", val, pinid); + /* Setup pinmux */ + mxs_pinctrl_set_mux(dev, val, bank, pin); + +- debug(" ma: %d, vol: %d, pull: %d\n", ma, vol, pull); ++printf(" ma: %d, vol: %d, pull: %d\n", ma, vol, pull); + + /* drive */ + reg = iomux->base + iomux->regs->drive; +diff --git a/drivers/pinctrl/nxp/pinctrl-scu.c b/drivers/pinctrl/nxp/pinctrl-scu.c +index c032be782..7d643d490 100644 +--- a/drivers/pinctrl/nxp/pinctrl-scu.c ++++ b/drivers/pinctrl/nxp/pinctrl-scu.c +@@ -30,7 +30,7 @@ static int imx_pinconf_scu_set(struct imx_pinctrl_soc_info *info, u32 pad, + */ + + if (!sc_rm_is_pad_owned(-1, pad)) { +- debug("Pad[%u] is not owned by curr partition\n", pad); ++printf("Pad[%u] is not owned by curr partition\n", pad); + return -EPERM; + } + +diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c +index b7aab12f1..d8077ea07 100644 +--- a/drivers/pinctrl/pinctrl-at91.c ++++ b/drivers/pinctrl/pinctrl-at91.c +@@ -424,12 +424,12 @@ static int at91_pin_check_config(struct udevice *dev, u32 bank, u32 pin) + struct at91_pinctrl_priv *priv = dev_get_priv(dev); + + if (bank >= priv->nbanks) { +- debug("pin conf bank %d >= nbanks %d\n", bank, priv->nbanks); ++printf("pin conf bank %d >= nbanks %d\n", bank, priv->nbanks); + return -EINVAL; + } + + if (pin >= MAX_NB_GPIO_PER_BANK) { +- debug("pin conf pin %d >= %d\n", pin, MAX_NB_GPIO_PER_BANK); ++printf("pin conf pin %d >= %d\n", pin, MAX_NB_GPIO_PER_BANK); + return -EINVAL; + } + +diff --git a/drivers/pinctrl/pinctrl-generic.c b/drivers/pinctrl/pinctrl-generic.c +index 3c8e24088..70a284147 100644 +--- a/drivers/pinctrl/pinctrl-generic.c ++++ b/drivers/pinctrl/pinctrl-generic.c +@@ -350,7 +350,7 @@ static int pinctrl_generic_set_state_subnode(struct udevice *dev, + + subnode_type = pinctrl_generic_get_subnode_type(dev, config, &count); + +- debug("%s(%s, %s): count=%d\n", __func__, dev->name, config->name, ++printf("%s(%s, %s): count=%d\n", __func__, dev->name, config->name, + count); + + if (subnode_type == PST_PINMUX) { +diff --git a/drivers/pinctrl/pinctrl-kendryte.c b/drivers/pinctrl/pinctrl-kendryte.c +index 09d51ca67..c6e4ed6c3 100644 +--- a/drivers/pinctrl/pinctrl-kendryte.c ++++ b/drivers/pinctrl/pinctrl-kendryte.c +@@ -488,7 +488,7 @@ static int k210_pc_pinmux_set(struct udevice *dev, u32 pinmux_group) + u32 mode = k210_pc_mode_id_to_mode[info->mode_id]; + u32 val = func | mode | (do_oe ? K210_PC_DO_OE : 0); + +- debug("%s(%.8x): IO_%.2u = %3u | %.8x\n", __func__, pinmux_group, pin, ++printf("%s(%.8x): IO_%.2u = %3u | %.8x\n", __func__, pinmux_group, pin, + func, mode); + + writel(val, &priv->fpioa->pins[pin]); +@@ -702,7 +702,7 @@ static int k210_pc_probe(struct udevice *dev) + if (ret) + goto err; + +- debug("%s: fpioa = %p sysctl = %p power offset = %x\n", __func__, ++printf("%s: fpioa = %p sysctl = %p power offset = %x\n", __func__, + priv->fpioa, (void *)priv->sysctl->ranges[0].start, + priv->power_offset); + +diff --git a/drivers/pinctrl/pinctrl-sandbox.c b/drivers/pinctrl/pinctrl-sandbox.c +index 776597745..6010f572a 100644 +--- a/drivers/pinctrl/pinctrl-sandbox.c ++++ b/drivers/pinctrl/pinctrl-sandbox.c +@@ -154,7 +154,7 @@ static int sandbox_pinmux_set(struct udevice *dev, unsigned pin_selector, + int mux; + struct sandbox_pinctrl_priv *priv = dev_get_priv(dev); + +- debug("sandbox pinmux: pin = %d (%s), function = %d (%s)\n", ++printf("sandbox pinmux: pin = %d (%s), function = %d (%s)\n", + pin_selector, sandbox_get_pin_name(dev, pin_selector), + func_selector, sandbox_get_function_name(dev, func_selector)); + +@@ -190,7 +190,7 @@ static int sandbox_pinmux_group_set(struct udevice *dev, + struct sandbox_pinctrl_priv *priv = dev_get_priv(dev); + unsigned int mask; + +- debug("sandbox pinmux: group = %d (%s), function = %d (%s)\n", ++printf("sandbox pinmux: group = %d (%s), function = %d (%s)\n", + group_selector, sandbox_get_group_name(dev, group_selector), + func_selector, sandbox_get_function_name(dev, func_selector)); + +@@ -245,7 +245,7 @@ static int sandbox_pinconf_set(struct udevice *dev, unsigned pin_selector, + { + struct sandbox_pinctrl_priv *priv = dev_get_priv(dev); + +- debug("sandbox pinconf: pin = %d (%s), param = %d, arg = %d\n", ++printf("sandbox pinconf: pin = %d (%s), param = %d, arg = %d\n", + pin_selector, sandbox_get_pin_name(dev, pin_selector), + param, argument); + +@@ -262,7 +262,7 @@ static int sandbox_pinconf_group_set(struct udevice *dev, + unsigned group_selector, + unsigned param, unsigned argument) + { +- debug("sandbox pinconf: group = %d (%s), param = %d, arg = %d\n", ++printf("sandbox pinconf: group = %d (%s), param = %d, arg = %d\n", + group_selector, sandbox_get_group_name(dev, group_selector), + param, argument); + +diff --git a/drivers/pinctrl/pinctrl_pic32.c b/drivers/pinctrl/pinctrl_pic32.c +index 54d97ac0a..8d9972ba3 100644 +--- a/drivers/pinctrl/pinctrl_pic32.c ++++ b/drivers/pinctrl/pinctrl_pic32.c +@@ -270,7 +270,7 @@ static int pic32_pinctrl_request(struct udevice *dev, int func, int flags) + pic32_sdhci_pin_config(dev); + break; + default: +- debug("%s: unknown-unhandled case\n", __func__); ++printf("%s: unknown-unhandled case\n", __func__); + break; + } + +@@ -322,7 +322,7 @@ static int pic32_pinctrl_set_state_simple(struct udevice *dev, + { + int func; + +- debug("%s: periph %s\n", __func__, periph->name); ++printf("%s: periph %s\n", __func__, periph->name); + func = pic32_pinctrl_get_periph_id(dev, periph); + if (func < 0) + return func; +diff --git a/drivers/pinctrl/rockchip/pinctrl-px30.c b/drivers/pinctrl/rockchip/pinctrl-px30.c +index 6058d0f4c..7eb228d41 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-px30.c ++++ b/drivers/pinctrl/rockchip/pinctrl-px30.c +@@ -151,7 +151,7 @@ static int px30_set_pull(struct rockchip_pin_bank *bank, + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { +- debug("unsupported pull setting %d\n", pull); ++printf("unsupported pull setting %d\n", pull); + return ret; + } + +@@ -205,7 +205,7 @@ static int px30_set_drive(struct rockchip_pin_bank *bank, + px30_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); + ret = rockchip_translate_drive_value(drv_type, strength); + if (ret < 0) { +- debug("unsupported driver strength %d\n", strength); ++printf("unsupported driver strength %d\n", strength); + return ret; + } + +@@ -242,7 +242,7 @@ static int px30_set_drive(struct rockchip_pin_bank *bank, + bit -= 16; + break; + default: +- debug("unsupported bit: %d for pinctrl drive type: %d\n", ++printf("unsupported bit: %d for pinctrl drive type: %d\n", + bit, drv_type); + return -EINVAL; + } +@@ -253,7 +253,7 @@ static int px30_set_drive(struct rockchip_pin_bank *bank, + rmask_bits = ROCKCHIP_DRV_BITS_PER_PIN; + break; + default: +- debug("unsupported pinctrl drive type: %d\n", ++printf("unsupported pinctrl drive type: %d\n", + drv_type); + return -EINVAL; + } +diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c +index 06d53e22d..62f3fb406 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c ++++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c +@@ -87,7 +87,7 @@ static int rk3188_set_pull(struct rockchip_pin_bank *bank, + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { +- debug("unsupported pull setting %d\n", pull); ++printf("unsupported pull setting %d\n", pull); + return ret; + } + +diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c +index fe386933c..bebd847a2 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c ++++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c +@@ -208,7 +208,7 @@ static int rk3228_set_pull(struct rockchip_pin_bank *bank, + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { +- debug("unsupported pull setting %d\n", pull); ++printf("unsupported pull setting %d\n", pull); + return ret; + } + +@@ -249,7 +249,7 @@ static int rk3228_set_drive(struct rockchip_pin_bank *bank, + rk3228_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); + ret = rockchip_translate_drive_value(type, strength); + if (ret < 0) { +- debug("unsupported driver strength %d\n", strength); ++printf("unsupported driver strength %d\n", strength); + return ret; + } + +diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c +index fc2810248..d8c11c930 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c ++++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c +@@ -114,7 +114,7 @@ static int rk3288_set_pull(struct rockchip_pin_bank *bank, + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { +- debug("unsupported pull setting %d\n", pull); ++printf("unsupported pull setting %d\n", pull); + return ret; + } + +@@ -172,7 +172,7 @@ static int rk3288_set_drive(struct rockchip_pin_bank *bank, + rk3288_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); + ret = rockchip_translate_drive_value(type, strength); + if (ret < 0) { +- debug("unsupported driver strength %d\n", strength); ++printf("unsupported driver strength %d\n", strength); + return ret; + } + +diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3308.c b/drivers/pinctrl/rockchip/pinctrl-rk3308.c +index a9b87b745..a41e22051 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-rk3308.c ++++ b/drivers/pinctrl/rockchip/pinctrl-rk3308.c +@@ -319,7 +319,7 @@ static int rk3308_set_pull(struct rockchip_pin_bank *bank, + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { +- debug("unsupported pull setting %d\n", pull); ++printf("unsupported pull setting %d\n", pull); + return ret; + } + +@@ -361,7 +361,7 @@ static int rk3308_set_drive(struct rockchip_pin_bank *bank, + rk3308_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); + ret = rockchip_translate_drive_value(type, strength); + if (ret < 0) { +- debug("unsupported driver strength %d\n", strength); ++printf("unsupported driver strength %d\n", strength); + return ret; + } + +diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c +index aa8bd76d6..633755f85 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c ++++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c +@@ -191,7 +191,7 @@ static int rk3328_set_pull(struct rockchip_pin_bank *bank, + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { +- debug("unsupported pull setting %d\n", pull); ++printf("unsupported pull setting %d\n", pull); + return ret; + } + +@@ -232,7 +232,7 @@ static int rk3328_set_drive(struct rockchip_pin_bank *bank, + rk3328_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); + ret = rockchip_translate_drive_value(type, strength); + if (ret < 0) { +- debug("unsupported driver strength %d\n", strength); ++printf("unsupported driver strength %d\n", strength); + return ret; + } + +diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c +index 18d3e3a9b..5f4141a53 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c ++++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c +@@ -79,7 +79,7 @@ static int rk3368_set_pull(struct rockchip_pin_bank *bank, + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { +- debug("unsupported pull setting %d\n", pull); ++printf("unsupported pull setting %d\n", pull); + return ret; + } + +@@ -130,7 +130,7 @@ static int rk3368_set_drive(struct rockchip_pin_bank *bank, + rk3368_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); + ret = rockchip_translate_drive_value(type, strength); + if (ret < 0) { +- debug("unsupported driver strength %d\n", strength); ++printf("unsupported driver strength %d\n", strength); + return ret; + } + +diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c +index 0c1adc379..31e123eca 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c ++++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c +@@ -130,7 +130,7 @@ static int rk3399_set_pull(struct rockchip_pin_bank *bank, + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { +- debug("unsupported pull setting %d\n", pull); ++printf("unsupported pull setting %d\n", pull); + return ret; + } + +@@ -175,7 +175,7 @@ static int rk3399_set_drive(struct rockchip_pin_bank *bank, + rk3399_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); + ret = rockchip_translate_drive_value(drv_type, strength); + if (ret < 0) { +- debug("unsupported driver strength %d\n", strength); ++printf("unsupported driver strength %d\n", strength); + return ret; + } + +@@ -212,7 +212,7 @@ static int rk3399_set_drive(struct rockchip_pin_bank *bank, + bit -= 16; + break; + default: +- debug("unsupported bit: %d for pinctrl drive type: %d\n", ++printf("unsupported bit: %d for pinctrl drive type: %d\n", + bit, drv_type); + return -EINVAL; + } +@@ -223,7 +223,7 @@ static int rk3399_set_drive(struct rockchip_pin_bank *bank, + rmask_bits = ROCKCHIP_DRV_BITS_PER_PIN; + break; + default: +- debug("unsupported pinctrl drive type: %d\n", ++printf("unsupported pinctrl drive type: %d\n", + drv_type); + return -EINVAL; + } +diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c +index 630513ba3..b4ab6b108 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c ++++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c +@@ -26,12 +26,12 @@ static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin) + struct rockchip_pin_ctrl *ctrl = priv->ctrl; + + if (bank >= ctrl->nr_banks) { +- debug("pin conf bank %d >= nbanks %d\n", bank, ctrl->nr_banks); ++printf("pin conf bank %d >= nbanks %d\n", bank, ctrl->nr_banks); + return -EINVAL; + } + + if (pin >= MAX_ROCKCHIP_GPIO_PER_BANK) { +- debug("pin conf pin %d >= %d\n", pin, ++printf("pin conf pin %d >= %d\n", pin, + MAX_ROCKCHIP_GPIO_PER_BANK); + return -EINVAL; + } +@@ -125,7 +125,7 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) + return -EINVAL; + + if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { +- debug("pin %d is unrouted\n", pin); ++printf("pin %d is unrouted\n", pin); + return -EINVAL; + } + +@@ -167,13 +167,13 @@ static int rockchip_verify_mux(struct rockchip_pin_bank *bank, + return -EINVAL; + + if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { +- debug("pin %d is unrouted\n", pin); ++printf("pin %d is unrouted\n", pin); + return -EINVAL; + } + + if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) { + if (mux != IOMUX_GPIO_ONLY) { +- debug("pin %d only supports a gpio mux\n", pin); ++printf("pin %d only supports a gpio mux\n", pin); + return -ENOTSUPP; + } + } +@@ -208,7 +208,7 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) + if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) + return 0; + +- debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); ++printf("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); + + if (!ctrl->set_mux) + return -ENOTSUPP; +@@ -250,7 +250,7 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank, + struct rockchip_pinctrl_priv *priv = bank->priv; + struct rockchip_pin_ctrl *ctrl = priv->ctrl; + +- debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num, ++printf("setting drive of GPIO%d-%d to %d\n", bank->bank_num, + pin_num, strength); + + if (!ctrl->set_drive) +@@ -296,7 +296,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank, + struct rockchip_pinctrl_priv *priv = bank->priv; + struct rockchip_pin_ctrl *ctrl = priv->ctrl; + +- debug("setting pull of GPIO%d-%d to %d\n", bank->bank_num, ++printf("setting pull of GPIO%d-%d to %d\n", bank->bank_num, + pin_num, pull); + + if (!ctrl->set_pull) +@@ -311,7 +311,7 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank, + struct rockchip_pinctrl_priv *priv = bank->priv; + struct rockchip_pin_ctrl *ctrl = priv->ctrl; + +- debug("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num, ++printf("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num, + pin_num, enable); + + if (!ctrl->set_schmitt) +@@ -409,13 +409,13 @@ static int rockchip_pinctrl_set_state(struct udevice *dev, + #endif + data = dev_read_prop(config, "rockchip,pins", &count); + if (count < 0) { +- debug("%s: bad array size %d\n", __func__, count); ++printf("%s: bad array size %d\n", __func__, count); + return -EINVAL; + } + + count /= sizeof(u32); + if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) { +- debug("%s: unsupported pins array count %d\n", ++printf("%s: unsupported pins array count %d\n", + __func__, count); + return -EINVAL; + } +@@ -467,7 +467,7 @@ static int rockchip_pinctrl_set_state(struct udevice *dev, + ret = rockchip_pinconf_set(&ctrl->pin_banks[bank], pin, + param, arg); + if (ret) { +- debug("%s: rockchip_pinconf_set fail: %d\n", ++printf("%s: rockchip_pinconf_set fail: %d\n", + __func__, ret); + return ret; + } +@@ -535,7 +535,7 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d + drv_pmu_offs : drv_grf_offs; + } + +- debug("bank %d, iomux %d has iom_offset 0x%x drv_offset 0x%x\n", ++printf("bank %d, iomux %d has iom_offset 0x%x drv_offset 0x%x\n", + i, j, iom->offset, drv->offset); + + /* +@@ -604,14 +604,14 @@ int rockchip_pinctrl_probe(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf", + &syscon); + if (ret) { +- debug("unable to find rockchip,grf syscon device (%d)\n", ret); ++printf("unable to find rockchip,grf syscon device (%d)\n", ret); + return ret; + } + + /* get grf-reg base address */ + regmap = syscon_get_regmap(syscon); + if (!regmap) { +- debug("unable to find rockchip grf regmap\n"); ++printf("unable to find rockchip grf regmap\n"); + return -ENODEV; + } + priv->regmap_base = regmap; +@@ -623,7 +623,7 @@ int rockchip_pinctrl_probe(struct udevice *dev) + /* get pmugrf-reg base address */ + regmap = syscon_get_regmap(syscon); + if (!regmap) { +- debug("unable to find rockchip pmu regmap\n"); ++printf("unable to find rockchip pmu regmap\n"); + return -ENODEV; + } + priv->regmap_pmu = regmap; +@@ -631,7 +631,7 @@ int rockchip_pinctrl_probe(struct udevice *dev) + + ctrl = rockchip_pinctrl_get_soc_data(dev); + if (!ctrl) { +- debug("driver data not available\n"); ++printf("driver data not available\n"); + return -EINVAL; + } + +diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c +index d35425b5f..97cb2bbc4 100644 +--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c ++++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c +@@ -145,7 +145,7 @@ static int rv1108_set_pull(struct rockchip_pin_bank *bank, + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { +- debug("unsupported pull setting %d\n", pull); ++printf("unsupported pull setting %d\n", pull); + return ret; + } + +@@ -197,7 +197,7 @@ static int rv1108_set_drive(struct rockchip_pin_bank *bank, + rv1108_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit); + ret = rockchip_translate_drive_value(type, strength); + if (ret < 0) { +- debug("unsupported driver strength %d\n", strength); ++printf("unsupported driver strength %d\n", strength); + return ret; + } + +diff --git a/drivers/power/acpi_pmc/acpi-pmc-uclass.c b/drivers/power/acpi_pmc/acpi-pmc-uclass.c +index 34446a34e..ee20f6daf 100644 +--- a/drivers/power/acpi_pmc/acpi-pmc-uclass.c ++++ b/drivers/power/acpi_pmc/acpi-pmc-uclass.c +@@ -107,7 +107,7 @@ int pmc_disable_tco_base(ulong tco_base) + { + struct tco_regs *regs = (struct tco_regs *)tco_base; + +- debug("tco_base %lx = %x\n", (ulong)®s->tco1_cnt, TCO1_CNT_HLT); ++printf("tco_base %lx = %x\n", (ulong)®s->tco1_cnt, TCO1_CNT_HLT); + setio_32(®s->tco1_cnt, TCO1_CNT_HLT); + + return 0; +diff --git a/drivers/power/acpi_pmc/pmc_emul.c b/drivers/power/acpi_pmc/pmc_emul.c +index a61eb5bd8..4c69f80a1 100644 +--- a/drivers/power/acpi_pmc/pmc_emul.c ++++ b/drivers/power/acpi_pmc/pmc_emul.c +@@ -113,7 +113,7 @@ static int sandbox_pmc_emul_write_config(struct udevice *emul, uint offset, + barnum = pci_offset_to_barnum(offset); + bar = &plat->bar[barnum]; + +- debug("w bar %d=%lx\n", barnum, value); ++printf("w bar %d=%lx\n", barnum, value); + *bar = value; + /* space indicator (bit#0) is read-only */ + *bar |= barinfo[barnum].type; +diff --git a/drivers/power/battery/bat_trats.c b/drivers/power/battery/bat_trats.c +index 54b2bf91e..17613aeef 100644 +--- a/drivers/power/battery/bat_trats.c ++++ b/drivers/power/battery/bat_trats.c +@@ -33,7 +33,7 @@ static int power_battery_charge(struct pmic *bat) + bat->fg->fg_battery_update(p_bat->fg, bat); + + if (k == 200) { +- debug(" %d [V]", battery->voltage_uV); ++printf(" %d [V]", battery->voltage_uV); + puts("\n"); + k = 0; + } +@@ -80,7 +80,7 @@ int power_bat_init(unsigned char bus) + return -ENOMEM; + } + +- debug("Board BAT init\n"); ++printf("Board BAT init\n"); + + p->interface = PMIC_NONE; + p->name = name; +diff --git a/drivers/power/battery/bat_trats2.c b/drivers/power/battery/bat_trats2.c +index 1172970d1..7e1e7e008 100644 +--- a/drivers/power/battery/bat_trats2.c ++++ b/drivers/power/battery/bat_trats2.c +@@ -54,7 +54,7 @@ int power_bat_init(unsigned char bus) + return -ENOMEM; + } + +- debug("Board BAT init\n"); ++printf("Board BAT init\n"); + + p->interface = PMIC_NONE; + p->name = name; +diff --git a/drivers/power/domain/imx8-power-domain-legacy.c b/drivers/power/domain/imx8-power-domain-legacy.c +index e2fae2dbc..92d9e0b96 100644 +--- a/drivers/power/domain/imx8-power-domain-legacy.c ++++ b/drivers/power/domain/imx8-power-domain-legacy.c +@@ -63,7 +63,7 @@ int imx8_power_domain_lookup_name(const char *name, + struct power_domain_ops *ops; + int ret; + +- debug("%s(power_domain=%p name=%s)\n", __func__, power_domain, name); ++printf("%s(power_domain=%p name=%s)\n", __func__, power_domain, name); + + ret = uclass_get_device_by_name(UCLASS_POWER_DOMAIN, name, &dev); + if (ret) { +@@ -75,25 +75,25 @@ int imx8_power_domain_lookup_name(const char *name, + power_domain->dev = dev; + ret = ops->request(power_domain); + if (ret) { +- debug("ops->request() failed: %d\n", ret); ++printf("ops->request() failed: %d\n", ret); + return ret; + } + +- debug("%s ok: %s\n", __func__, dev->name); ++printf("%s ok: %s\n", __func__, dev->name); + + return 0; + } + + static int imx8_power_domain_request(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + return 0; + } + + static int imx8_power_domain_free(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + return 0; + } +@@ -120,7 +120,7 @@ static int imx8_power_domain_on(struct power_domain *power_domain) + pdata = (struct imx8_power_domain_plat *)dev_get_plat(dev); + ppriv = (struct imx8_power_domain_priv *)dev_get_priv(dev); + +- debug("%s(power_domain=%s) resource_id %d\n", __func__, dev->name, ++printf("%s(power_domain=%s) resource_id %d\n", __func__, dev->name, + pdata->resource_id); + + /* Already powered on */ +@@ -141,7 +141,7 @@ static int imx8_power_domain_on(struct power_domain *power_domain) + } + + ppriv->state_on = true; +- debug("%s is powered on\n", dev->name); ++printf("%s is powered on\n", dev->name); + + return 0; + } +@@ -158,7 +158,7 @@ static int imx8_power_domain_off_node(struct power_domain *power_domain) + ppriv = dev_get_priv(dev); + pdata = dev_get_plat(dev); + +- debug("%s, %s, state_on %d\n", __func__, dev->name, ppriv->state_on); ++printf("%s, %s, state_on %d\n", __func__, dev->name, ppriv->state_on); + + /* Already powered off */ + if (!ppriv->state_on) +@@ -191,7 +191,7 @@ static int imx8_power_domain_off_node(struct power_domain *power_domain) + } + + ppriv->state_on = false; +- debug("%s is powered off\n", dev->name); ++printf("%s is powered off\n", dev->name); + + return 0; + } +@@ -212,7 +212,7 @@ static int imx8_power_domain_off_parentnodes(struct power_domain *power_domain) + (struct imx8_power_domain_plat *)dev_get_plat(parent); + ppriv = (struct imx8_power_domain_priv *)dev_get_priv(parent); + +- debug("%s, %s, state_on %d\n", __func__, parent->name, ++printf("%s, %s, state_on %d\n", __func__, parent->name, + ppriv->state_on); + + /* Already powered off */ +@@ -230,7 +230,7 @@ static int imx8_power_domain_off_parentnodes(struct power_domain *power_domain) + dev_get_priv(child); + /* Find a power on sibling */ + if (child_ppriv->state_on) { +- debug("sibling %s, state_on %d\n", ++printf("sibling %s, state_on %d\n", + child->name, + child_ppriv->state_on); + return 0; +@@ -251,7 +251,7 @@ static int imx8_power_domain_off_parentnodes(struct power_domain *power_domain) + } + + ppriv->state_on = false; +- debug("%s is powered off\n", parent->name); ++printf("%s is powered off\n", parent->name); + + parent_pd.dev = parent; + imx8_power_domain_off_parentnodes(&parent_pd); +@@ -264,12 +264,12 @@ static int imx8_power_domain_off(struct power_domain *power_domain) + { + int ret; + +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + /* Turn off the node */ + ret = imx8_power_domain_off_node(power_domain); + if (ret) { +- debug("Can't power off the node of dev %s, ret = %d\n", ++printf("Can't power off the node of dev %s, ret = %d\n", + power_domain->dev->name, ret); + return ret; + } +@@ -288,7 +288,7 @@ static int imx8_power_domain_off(struct power_domain *power_domain) + static int imx8_power_domain_of_xlate(struct power_domain *power_domain, + struct ofnode_phandle_args *args) + { +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + /* Do nothing to the xlate, since we don't have args used */ + +@@ -301,7 +301,7 @@ static int imx8_power_domain_bind(struct udevice *dev) + const char *name; + int ret = 0; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + offset = dev_of_offset(dev); + for (offset = fdt_first_subnode(gd->fdt_blob, offset); offset > 0; +@@ -330,7 +330,7 @@ static int imx8_power_domain_probe(struct udevice *dev) + { + struct imx8_power_domain_priv *ppriv; + +- debug("%s(dev=%s)\n", __func__, dev->name); ++printf("%s(dev=%s)\n", __func__, dev->name); + + ppriv = (struct imx8_power_domain_priv *)dev_get_priv(dev); + +@@ -348,12 +348,12 @@ static int imx8_power_domain_of_to_plat(struct udevice *dev) + + reg = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "reg", -1); + if (reg == -1) { +- debug("%s: Invalid resource id %d\n", __func__, reg); ++printf("%s: Invalid resource id %d\n", __func__, reg); + return -EINVAL; + } + pdata->resource_id = (sc_rsrc_t)reg; + +- debug("%s resource_id %d\n", __func__, pdata->resource_id); ++printf("%s resource_id %d\n", __func__, pdata->resource_id); + + return 0; + } +diff --git a/drivers/power/domain/imx8-power-domain.c b/drivers/power/domain/imx8-power-domain.c +index 6461ab23d..d534e22e9 100644 +--- a/drivers/power/domain/imx8-power-domain.c ++++ b/drivers/power/domain/imx8-power-domain.c +@@ -14,14 +14,14 @@ + + static int imx8_power_domain_request(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + return 0; + } + + static int imx8_power_domain_free(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + return 0; + } +@@ -31,7 +31,7 @@ static int imx8_power_domain_on(struct power_domain *power_domain) + u32 resource_id = power_domain->id; + int ret; + +- debug("%s: resource_id %u\n", __func__, resource_id); ++printf("%s: resource_id %u\n", __func__, resource_id); + + ret = sc_pm_set_resource_power_mode(-1, resource_id, SC_PM_PW_MODE_ON); + if (ret) { +@@ -48,7 +48,7 @@ static int imx8_power_domain_off(struct power_domain *power_domain) + u32 resource_id = power_domain->id; + int ret; + +- debug("%s: resource_id %u\n", __func__, resource_id); ++printf("%s: resource_id %u\n", __func__, resource_id); + + ret = sc_pm_set_resource_power_mode(-1, resource_id, SC_PM_PW_MODE_OFF); + if (ret) { +@@ -62,7 +62,7 @@ static int imx8_power_domain_off(struct power_domain *power_domain) + + static int imx8_power_domain_probe(struct udevice *dev) + { +- debug("%s(dev=%s)\n", __func__, dev->name); ++printf("%s(dev=%s)\n", __func__, dev->name); + + return 0; + } +diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c +index a4d50e701..e61d7f19f 100644 +--- a/drivers/power/domain/meson-ee-pwrc.c ++++ b/drivers/power/domain/meson-ee-pwrc.c +@@ -372,14 +372,14 @@ static int meson_ee_pwrc_of_xlate(struct power_domain *power_domain, + /* #power-domain-cells is 1 */ + + if (args->args_count < 1) { +- debug("Invalid args_count: %d\n", args->args_count); ++printf("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + + power_domain->id = args->args[0]; + + if (power_domain->id >= priv->data->count) { +- debug("Invalid domain ID: %lu\n", power_domain->id); ++printf("Invalid domain ID: %lu\n", power_domain->id); + return -EINVAL; + } + +diff --git a/drivers/power/domain/meson-gx-pwrc-vpu.c b/drivers/power/domain/meson-gx-pwrc-vpu.c +index eb94af2cf..e21c14460 100644 +--- a/drivers/power/domain/meson-gx-pwrc-vpu.c ++++ b/drivers/power/domain/meson-gx-pwrc-vpu.c +@@ -266,7 +266,7 @@ static int meson_pwrc_vpu_of_xlate(struct power_domain *power_domain, + /* #power-domain-cells is 0 */ + + if (args->args_count != 0) { +- debug("Invalid args_count: %d\n", args->args_count); ++printf("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + +diff --git a/drivers/power/domain/power-domain-uclass.c b/drivers/power/domain/power-domain-uclass.c +index af829db9d..454c660a1 100644 +--- a/drivers/power/domain/power-domain-uclass.c ++++ b/drivers/power/domain/power-domain-uclass.c +@@ -19,10 +19,10 @@ static inline struct power_domain_ops *power_domain_dev_ops(struct udevice *dev) + static int power_domain_of_xlate_default(struct power_domain *power_domain, + struct ofnode_phandle_args *args) + { +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + if (args->args_count != 1) { +- debug("Invalid args_count: %d\n", args->args_count); ++printf("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -39,13 +39,13 @@ int power_domain_get_by_index(struct udevice *dev, + struct udevice *dev_power_domain; + struct power_domain_ops *ops; + +- debug("%s(dev=%p, power_domain=%p)\n", __func__, dev, power_domain); ++printf("%s(dev=%p, power_domain=%p)\n", __func__, dev, power_domain); + + ret = dev_read_phandle_with_args(dev, "power-domains", + "#power-domain-cells", 0, index, + &args); + if (ret) { +- debug("%s: dev_read_phandle_with_args failed: %d\n", ++printf("%s: dev_read_phandle_with_args failed: %d\n", + __func__, ret); + return ret; + } +@@ -53,7 +53,7 @@ int power_domain_get_by_index(struct udevice *dev, + ret = uclass_get_device_by_ofnode(UCLASS_POWER_DOMAIN, args.node, + &dev_power_domain); + if (ret) { +- debug("%s: uclass_get_device_by_ofnode failed: %d\n", ++printf("%s: uclass_get_device_by_ofnode failed: %d\n", + __func__, ret); + return ret; + } +@@ -65,13 +65,13 @@ int power_domain_get_by_index(struct udevice *dev, + else + ret = power_domain_of_xlate_default(power_domain, &args); + if (ret) { +- debug("of_xlate() failed: %d\n", ret); ++printf("of_xlate() failed: %d\n", ret); + return ret; + } + + ret = ops->request(power_domain); + if (ret) { +- debug("ops->request() failed: %d\n", ret); ++printf("ops->request() failed: %d\n", ret); + return ret; + } + +@@ -87,7 +87,7 @@ int power_domain_free(struct power_domain *power_domain) + { + struct power_domain_ops *ops = power_domain_dev_ops(power_domain->dev); + +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + return ops->rfree(power_domain); + } +@@ -96,7 +96,7 @@ int power_domain_on(struct power_domain *power_domain) + { + struct power_domain_ops *ops = power_domain_dev_ops(power_domain->dev); + +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + return ops->on(power_domain); + } +@@ -105,7 +105,7 @@ int power_domain_off(struct power_domain *power_domain) + { + struct power_domain_ops *ops = power_domain_dev_ops(power_domain->dev); + +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + return ops->off(power_domain); + } +diff --git a/drivers/power/domain/sandbox-power-domain.c b/drivers/power/domain/sandbox-power-domain.c +index 04a071044..552334858 100644 +--- a/drivers/power/domain/sandbox-power-domain.c ++++ b/drivers/power/domain/sandbox-power-domain.c +@@ -19,7 +19,7 @@ struct sandbox_power_domain { + + static int sandbox_power_domain_request(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + if (power_domain->id >= SANDBOX_POWER_DOMAINS) + return -EINVAL; +@@ -29,7 +29,7 @@ static int sandbox_power_domain_request(struct power_domain *power_domain) + + static int sandbox_power_domain_free(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + return 0; + } +@@ -38,7 +38,7 @@ static int sandbox_power_domain_on(struct power_domain *power_domain) + { + struct sandbox_power_domain *sbr = dev_get_priv(power_domain->dev); + +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + sbr->on[power_domain->id] = true; + +@@ -49,7 +49,7 @@ static int sandbox_power_domain_off(struct power_domain *power_domain) + { + struct sandbox_power_domain *sbr = dev_get_priv(power_domain->dev); + +- debug("%s(power_domain=%p)\n", __func__, power_domain); ++printf("%s(power_domain=%p)\n", __func__, power_domain); + + sbr->on[power_domain->id] = false; + +@@ -58,14 +58,14 @@ static int sandbox_power_domain_off(struct power_domain *power_domain) + + static int sandbox_power_domain_bind(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } + + static int sandbox_power_domain_probe(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +@@ -96,7 +96,7 @@ int sandbox_power_domain_query(struct udevice *dev, unsigned long id) + { + struct sandbox_power_domain *sbr = dev_get_priv(dev); + +- debug("%s(dev=%p, id=%ld)\n", __func__, dev, id); ++printf("%s(dev=%p, id=%ld)\n", __func__, dev, id); + + if (id >= SANDBOX_POWER_DOMAINS) + return -EINVAL; +diff --git a/drivers/power/domain/tegra186-power-domain.c b/drivers/power/domain/tegra186-power-domain.c +index 707735cf8..df5692c4b 100644 +--- a/drivers/power/domain/tegra186-power-domain.c ++++ b/drivers/power/domain/tegra186-power-domain.c +@@ -17,7 +17,7 @@ + + static int tegra186_power_domain_request(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, ++printf("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, + power_domain, power_domain->dev, power_domain->id); + + return 0; +@@ -25,7 +25,7 @@ static int tegra186_power_domain_request(struct power_domain *power_domain) + + static int tegra186_power_domain_free(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, ++printf("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, + power_domain, power_domain->dev, power_domain->id); + + return 0; +@@ -58,7 +58,7 @@ static int tegra186_power_domain_common(struct power_domain *power_domain, + + static int tegra186_power_domain_on(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, ++printf("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, + power_domain, power_domain->dev, power_domain->id); + + return tegra186_power_domain_common(power_domain, true); +@@ -66,7 +66,7 @@ static int tegra186_power_domain_on(struct power_domain *power_domain) + + static int tegra186_power_domain_off(struct power_domain *power_domain) + { +- debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, ++printf("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, + power_domain, power_domain->dev, power_domain->id); + + return tegra186_power_domain_common(power_domain, false); +@@ -81,7 +81,7 @@ struct power_domain_ops tegra186_power_domain_ops = { + + static int tegra186_power_domain_probe(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +diff --git a/drivers/power/domain/ti-sci-power-domain.c b/drivers/power/domain/ti-sci-power-domain.c +index f18e45617..8fb9cd64d 100644 +--- a/drivers/power/domain/ti-sci-power-domain.c ++++ b/drivers/power/domain/ti-sci-power-domain.c +@@ -31,7 +31,7 @@ static int ti_sci_power_domain_probe(struct udevice *dev) + { + struct ti_sci_power_domain_data *data = dev_get_priv(dev); + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + if (!data) + return -ENOMEM; +@@ -46,13 +46,13 @@ static int ti_sci_power_domain_probe(struct udevice *dev) + + static int ti_sci_power_domain_request(struct power_domain *pd) + { +- debug("%s(pd=%p)\n", __func__, pd); ++printf("%s(pd=%p)\n", __func__, pd); + return 0; + } + + static int ti_sci_power_domain_free(struct power_domain *pd) + { +- debug("%s(pd=%p)\n", __func__, pd); ++printf("%s(pd=%p)\n", __func__, pd); + return 0; + } + +@@ -64,7 +64,7 @@ static int ti_sci_power_domain_on(struct power_domain *pd) + u8 flags = (uintptr_t)pd->priv; + int ret; + +- debug("%s(pd=%p)\n", __func__, pd); ++printf("%s(pd=%p)\n", __func__, pd); + + if (flags & TI_SCI_PD_EXCLUSIVE) + ret = dops->get_device_exclusive(sci, pd->id); +@@ -85,7 +85,7 @@ static int ti_sci_power_domain_off(struct power_domain *pd) + const struct ti_sci_dev_ops *dops = &sci->ops.dev_ops; + int ret; + +- debug("%s(pd=%p)\n", __func__, pd); ++printf("%s(pd=%p)\n", __func__, pd); + + ret = dops->put_device(sci, pd->id); + if (ret) +@@ -100,10 +100,10 @@ static int ti_sci_power_domain_of_xlate(struct power_domain *pd, + { + u8 flags; + +- debug("%s(power_domain=%p)\n", __func__, pd); ++printf("%s(power_domain=%p)\n", __func__, pd); + + if (args->args_count < 1) { +- debug("Invalid args_count: %d\n", args->args_count); ++printf("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + +diff --git a/drivers/power/exynos-tmu.c b/drivers/power/exynos-tmu.c +index 4fba7b527..9aa7c9d4c 100644 +--- a/drivers/power/exynos-tmu.c ++++ b/drivers/power/exynos-tmu.c +@@ -168,7 +168,7 @@ enum tmu_status_t tmu_monitor(int *temp) + out: + /* Temperature code does not lie between min 25 and max 125 */ + gbl_info.tmu_state = TMU_STATUS_INIT; +- debug("EXYNOS_TMU: Thermal reading failed\n"); ++printf("EXYNOS_TMU: Thermal reading failed\n"); + return TMU_STATUS_INIT; + } + +@@ -190,7 +190,7 @@ static int get_tmu_fdt_values(struct tmu_info *info, const void *blob) + node = fdtdec_next_compatible(blob, 0, + COMPAT_SAMSUNG_EXYNOS_TMU); + if (node < 0) { +- debug("EXYNOS_TMU: No node for tmu in device tree\n"); ++printf("EXYNOS_TMU: No node for tmu in device tree\n"); + return -ENODEV; + } + +@@ -202,7 +202,7 @@ static int get_tmu_fdt_values(struct tmu_info *info, const void *blob) + */ + addr = fdtdec_get_addr(blob, node, "reg"); + if (addr == FDT_ADDR_T_NONE) { +- debug("%s: Missing tmu-base\n", __func__); ++printf("%s: Missing tmu-base\n", __func__); + return -ENODEV; + } + info->tmu_base = (struct exynos5_tmu_reg *)addr; +@@ -246,7 +246,7 @@ static int get_tmu_fdt_values(struct tmu_info *info, const void *blob) + error |= (info->dc_value == -1); + + if (error) { +- debug("fail to get tmu node properties\n"); ++printf("fail to get tmu node properties\n"); + return -EINVAL; + } + #else +diff --git a/drivers/power/fuel_gauge/fg_max17042.c b/drivers/power/fuel_gauge/fg_max17042.c +index a395d587a..ba7ffa6d0 100644 +--- a/drivers/power/fuel_gauge/fg_max17042.c ++++ b/drivers/power/fuel_gauge/fg_max17042.c +@@ -188,7 +188,7 @@ lock_model: + + status_msg = "OK!"; + error: +- debug("%s: model init status: %s\n", p->name, status_msg); ++printf("%s: model init status: %s\n", p->name, status_msg); + return; + } + +@@ -207,7 +207,7 @@ static int power_update_battery(struct pmic *p, struct pmic *bat) + pb->bat->state_of_chrg = (val >> 8); + + pmic_reg_read(p, MAX17042_VCELL, &val); +- debug("vfsoc: 0x%x\n", val); ++printf("vfsoc: 0x%x\n", val); + pb->bat->voltage_uV = ((val & 0xFFUL) >> 3) + ((val & 0xFF00) >> 3); + pb->bat->voltage_uV = (pb->bat->voltage_uV * 625); + +@@ -229,7 +229,7 @@ static int power_check_battery(struct pmic *p, struct pmic *bat) + } + + ret |= pmic_reg_read(p, MAX17042_STATUS, &val); +- debug("fg status: 0x%x\n", val); ++printf("fg status: 0x%x\n", val); + + if (val & MAX17042_POR) + por_fuelgauge_init(p); +@@ -238,7 +238,7 @@ static int power_check_battery(struct pmic *p, struct pmic *bat) + pb->bat->version = val; + + power_update_battery(p, bat); +- debug("fg ver: 0x%x\n", pb->bat->version); ++printf("fg ver: 0x%x\n", pb->bat->version); + printf("BAT: state_of_charge(SOC):%d%%\n", + pb->bat->state_of_chrg); + +@@ -272,7 +272,7 @@ int power_fg_init(unsigned char bus) + return -ENOMEM; + } + +- debug("Board Fuel Gauge init\n"); ++printf("Board Fuel Gauge init\n"); + + p->name = name; + p->interface = PMIC_I2C; +diff --git a/drivers/power/mfd/fg_max77693.c b/drivers/power/mfd/fg_max77693.c +index 983a6d4a2..026cf6f91 100644 +--- a/drivers/power/mfd/fg_max77693.c ++++ b/drivers/power/mfd/fg_max77693.c +@@ -78,7 +78,7 @@ static int power_check_battery(struct pmic *p, struct pmic *bat) + ret = pmic_reg_read(p, MAX77693_STATUS, &val); + if (ret) + return ret; +- debug("fg status: 0x%x\n", val); ++printf("fg status: 0x%x\n", val); + + ret = pmic_reg_read(p, MAX77693_VERSION, &pb->bat->version); + if (ret) +@@ -87,7 +87,7 @@ static int power_check_battery(struct pmic *p, struct pmic *bat) + ret = power_update_battery(p, bat); + if (ret) + return ret; +- debug("fg ver: 0x%x\n", pb->bat->version); ++printf("fg ver: 0x%x\n", pb->bat->version); + printf("BAT: state_of_charge(SOC):%d%%\n", + pb->bat->state_of_chrg); + +@@ -121,7 +121,7 @@ int power_fg_init(unsigned char bus) + return -ENOMEM; + } + +- debug("Board Fuel Gauge init\n"); ++printf("Board Fuel Gauge init\n"); + + p->name = name; + p->interface = PMIC_I2C; +diff --git a/drivers/power/mfd/muic_max77693.c b/drivers/power/mfd/muic_max77693.c +index 36ee44b9a..2edbea8e2 100644 +--- a/drivers/power/mfd/muic_max77693.c ++++ b/drivers/power/mfd/muic_max77693.c +@@ -62,7 +62,7 @@ int power_muic_init(unsigned int bus) + return -ENOMEM; + } + +- debug("Board Micro USB Interface Controller init\n"); ++printf("Board Micro USB Interface Controller init\n"); + + p->name = name; + p->interface = PMIC_I2C; +diff --git a/drivers/power/mfd/pmic_max77693.c b/drivers/power/mfd/pmic_max77693.c +index e32a9722a..f6e551105 100644 +--- a/drivers/power/mfd/pmic_max77693.c ++++ b/drivers/power/mfd/pmic_max77693.c +@@ -81,7 +81,7 @@ int pmic_init_max77693(unsigned char bus) + return -ENOMEM; + } + +- debug("Board PMIC init\n"); ++printf("Board PMIC init\n"); + + p->name = name; + p->interface = PMIC_I2C; +diff --git a/drivers/power/pmic/act8846.c b/drivers/power/pmic/act8846.c +index 8f0f5a6d9..ee9d5dd33 100644 +--- a/drivers/power/pmic/act8846.c ++++ b/drivers/power/pmic/act8846.c +@@ -27,7 +27,7 @@ static int act8846_write(struct udevice *dev, uint reg, const uint8_t *buff, + int len) + { + if (dm_i2c_write(dev, reg, buff, len)) { +- debug("write error to device: %p register: %#x!\n", dev, reg); ++printf("write error to device: %p register: %#x!\n", dev, reg); + return -EIO; + } + +@@ -37,7 +37,7 @@ static int act8846_write(struct udevice *dev, uint reg, const uint8_t *buff, + static int act8846_read(struct udevice *dev, uint reg, uint8_t *buff, int len) + { + if (dm_i2c_read(dev, reg, buff, len)) { +- debug("read error from device: %p register: %#x!\n", dev, reg); ++printf("read error from device: %p register: %#x!\n", dev, reg); + return -EIO; + } + +@@ -51,16 +51,16 @@ static int act8846_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +diff --git a/drivers/power/pmic/as3722.c b/drivers/power/pmic/as3722.c +index 3aa3cce94..6e9d4f28e 100644 +--- a/drivers/power/pmic/as3722.c ++++ b/drivers/power/pmic/as3722.c +@@ -111,7 +111,7 @@ static int as3722_probe(struct udevice *dev) + return -ENOENT; + } + +- debug("AS3722 revision %#x found on I2C bus %s\n", revision, dev->name); ++printf("AS3722 revision %#x found on I2C bus %s\n", revision, dev->name); + + return 0; + } +@@ -132,17 +132,17 @@ static int as3722_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found\n", __func__, ++printf("%s: %s regulators subnode not found\n", __func__, + dev->name); + return -ENXIO; + } + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + ret = device_bind_driver(dev, "gpio_as3722", "gpio_as3722", &gpio_dev); + if (ret) { +- debug("%s: Cannot bind GPIOs (ret=%d)\n", __func__, ret); ++printf("%s: Cannot bind GPIOs (ret=%d)\n", __func__, ret); + return ret; + } + +diff --git a/drivers/power/pmic/bd71837.c b/drivers/power/pmic/bd71837.c +index cb9238972..cb7ac169c 100644 +--- a/drivers/power/pmic/bd71837.c ++++ b/drivers/power/pmic/bd71837.c +@@ -56,16 +56,16 @@ static int bd71837_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +@@ -79,11 +79,11 @@ static int bd718x7_probe(struct udevice *dev) + /* Unlock the PMIC regulator control before probing the children */ + ret = pmic_clrsetbits(dev, BD718XX_REGLOCK, mask, 0); + if (ret) { +- debug("%s: %s Failed to unlock regulator control\n", __func__, ++printf("%s: %s Failed to unlock regulator control\n", __func__, + dev->name); + return ret; + } +- debug("%s: '%s' - BD718x7 PMIC registers unlocked\n", __func__, ++printf("%s: '%s' - BD718x7 PMIC registers unlocked\n", __func__, + dev->name); + + return 0; +diff --git a/drivers/power/pmic/da9063.c b/drivers/power/pmic/da9063.c +index 25101d18f..647ac1124 100644 +--- a/drivers/power/pmic/da9063.c ++++ b/drivers/power/pmic/da9063.c +@@ -90,16 +90,16 @@ static int da9063_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!", __func__, ++printf("%s: %s regulators subnode not found!", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +diff --git a/drivers/power/pmic/fan53555.c b/drivers/power/pmic/fan53555.c +index 4d1e686d2..b25f3e818 100644 +--- a/drivers/power/pmic/fan53555.c ++++ b/drivers/power/pmic/fan53555.c +@@ -53,7 +53,7 @@ static int pmic_fan53555_bind(struct udevice *dev) + struct udevice *child; + struct driver *drv; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + drv = lists_driver_lookup_name(regulator_driver_name); + if (!drv) { +diff --git a/drivers/power/pmic/i2c_pmic_emul.c b/drivers/power/pmic/i2c_pmic_emul.c +index abe3a1051..015aa0735 100644 +--- a/drivers/power/pmic/i2c_pmic_emul.c ++++ b/drivers/power/pmic/i2c_pmic_emul.c +@@ -38,7 +38,7 @@ static int sandbox_i2c_pmic_read_data(struct udevice *emul, uchar chip, + return -EFAULT; + } + +- debug("Read PMIC: %#x at register: %#x idx: %#x count: %d\n", ++printf("Read PMIC: %#x at register: %#x idx: %#x count: %d\n", + (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); + + memcpy(buffer, plat->reg + plat->rw_idx, len); +@@ -60,7 +60,7 @@ static int sandbox_i2c_pmic_write_data(struct udevice *emul, uchar chip, + plat->rw_reg = *buffer; + plat->rw_idx = plat->rw_reg * plat->trans_len; + +- debug("Write PMIC: %#x at register: %#x idx: %#x count: %d\n", ++printf("Write PMIC: %#x at register: %#x idx: %#x count: %d\n", + (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); + + /* For read operation, set (write) only chip reg */ +@@ -108,7 +108,7 @@ static int sandbox_i2c_pmic_of_to_plat(struct udevice *emul) + struct sandbox_i2c_pmic_plat_data *plat = dev_get_plat(emul); + struct udevice *pmic_dev = i2c_emul_get_device(emul); + +- debug("%s:%d Setting PMIC default registers\n", __func__, __LINE__); ++printf("%s:%d Setting PMIC default registers\n", __func__, __LINE__); + plat->reg_count = pmic_reg_count(pmic_dev); + + return 0; +@@ -126,7 +126,7 @@ static int sandbox_i2c_pmic_probe(struct udevice *emul) + + plat->reg = calloc(1, plat->buf_size); + if (!plat->reg) { +- debug("Canot allocate memory (%d B) for PMIC I2C emulation!\n", ++printf("Canot allocate memory (%d B) for PMIC I2C emulation!\n", + plat->buf_size); + return -ENOMEM; + } +diff --git a/drivers/power/pmic/lp873x.c b/drivers/power/pmic/lp873x.c +index 2b1260ec6..82409eff6 100644 +--- a/drivers/power/pmic/lp873x.c ++++ b/drivers/power/pmic/lp873x.c +@@ -49,7 +49,7 @@ static int lp873x_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } +diff --git a/drivers/power/pmic/lp87565.c b/drivers/power/pmic/lp87565.c +index f4a4bd03d..fa507bc10 100644 +--- a/drivers/power/pmic/lp87565.c ++++ b/drivers/power/pmic/lp87565.c +@@ -50,12 +50,12 @@ static int lp87565_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +diff --git a/drivers/power/pmic/max77686.c b/drivers/power/pmic/max77686.c +index 9f02c0b6f..f28329cdb 100644 +--- a/drivers/power/pmic/max77686.c ++++ b/drivers/power/pmic/max77686.c +@@ -53,16 +53,16 @@ static int max77686_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "voltage-regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +diff --git a/drivers/power/pmic/mp5416.c b/drivers/power/pmic/mp5416.c +index 6180adf77..02b9c3832 100644 +--- a/drivers/power/pmic/mp5416.c ++++ b/drivers/power/pmic/mp5416.c +@@ -53,19 +53,19 @@ static int mp5416_bind(struct udevice *dev) + int children; + ofnode regulators_node; + +- debug("%s %s\n", __func__, dev->name); ++printf("%s %s\n", __func__, dev->name); + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +@@ -73,7 +73,7 @@ static int mp5416_bind(struct udevice *dev) + + static int mp5416_probe(struct udevice *dev) + { +- debug("%s %s\n", __func__, dev->name); ++printf("%s %s\n", __func__, dev->name); + + return 0; + } +diff --git a/drivers/power/pmic/muic_max8997.c b/drivers/power/pmic/muic_max8997.c +index 969ce9023..f1b75dcd4 100644 +--- a/drivers/power/pmic/muic_max8997.c ++++ b/drivers/power/pmic/muic_max8997.c +@@ -60,7 +60,7 @@ int power_muic_init(unsigned int bus) + return -ENOMEM; + } + +- debug("Board Micro USB Interface Controller init\n"); ++printf("Board Micro USB Interface Controller init\n"); + + p->name = name; + p->interface = PMIC_I2C; +diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c +index 6080cbff0..70c07ff95 100644 +--- a/drivers/power/pmic/palmas.c ++++ b/drivers/power/pmic/palmas.c +@@ -61,20 +61,20 @@ static int palmas_bind(struct udevice *dev) + } + + if (!ofnode_valid(pmic_node)) { +- debug("%s: %s pmic subnode not found!\n", __func__, dev->name); ++printf("%s: %s pmic subnode not found!\n", __func__, dev->name); + return -ENXIO; + } + + regulators_node = ofnode_find_subnode(pmic_node, "regulators"); + + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s reg subnode not found!\n", __func__, dev->name); ++printf("%s: %s reg subnode not found!\n", __func__, dev->name); + return -ENXIO; + } + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c +index a886647f1..65ccb0bb5 100644 +--- a/drivers/power/pmic/pca9450.c ++++ b/drivers/power/pmic/pca9450.c +@@ -58,17 +58,17 @@ static int pca9450_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!", __func__, ++printf("%s: %s regulators subnode not found!", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, + pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +diff --git a/drivers/power/pmic/pfuze100.c b/drivers/power/pmic/pfuze100.c +index 65c445697..e7bdd347e 100644 +--- a/drivers/power/pmic/pfuze100.c ++++ b/drivers/power/pmic/pfuze100.c +@@ -42,7 +42,7 @@ static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff, + static int pfuze100_read(struct udevice *dev, uint reg, uint8_t *buff, int len) + { + if (dm_i2c_read(dev, reg, buff, len)) { +- debug("read error from device: %p register: %#x!\n", dev, reg); ++printf("read error from device: %p register: %#x!\n", dev, reg); + return -EIO; + } + +@@ -56,16 +56,16 @@ static int pfuze100_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c +index 79166b8bb..7b82271b8 100644 +--- a/drivers/power/pmic/pmic-uclass.c ++++ b/drivers/power/pmic/pmic-uclass.c +@@ -30,17 +30,17 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent, + int prefix_len; + int ret; + +- debug("%s for '%s' at node offset: %d\n", __func__, pmic->name, ++printf("%s for '%s' at node offset: %d\n", __func__, pmic->name, + dev_of_offset(pmic)); + + ofnode_for_each_subnode(node, parent) { + node_name = ofnode_get_name(node); + +- debug("* Found child node: '%s'\n", node_name); ++printf("* Found child node: '%s'\n", node_name); + + child = NULL; + for (info = child_info; info->prefix && info->driver; info++) { +- debug(" - compatible prefix: '%s'\n", info->prefix); ++printf(" - compatible prefix: '%s'\n", info->prefix); + + prefix_len = strlen(info->prefix); + if (strncmp(info->prefix, node_name, prefix_len)) { +@@ -54,25 +54,25 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent, + + drv = lists_driver_lookup_name(info->driver); + if (!drv) { +- debug(" - driver: '%s' not found!\n", ++printf(" - driver: '%s' not found!\n", + info->driver); + continue; + } + +- debug(" - found child driver: '%s'\n", drv->name); ++printf(" - found child driver: '%s'\n", drv->name); + + ret = device_bind_with_driver_data(pmic, drv, node_name, + 0, node, &child); + if (ret) { +- debug(" - child binding error: %d\n", ret); ++printf(" - child binding error: %d\n", ret); + continue; + } + +- debug(" - bound child device: '%s'\n", child->name); ++printf(" - bound child device: '%s'\n", child->name); + + child->driver_data = trailing_strtol(node_name); + +- debug(" - set 'child->driver_data': %lu\n", ++printf(" - set 'child->driver_data': %lu\n", + child->driver_data); + break; + } +@@ -80,10 +80,10 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent, + if (child) + bind_count++; + else +- debug(" - compatible prefix not found\n"); ++printf(" - compatible prefix not found\n"); + } + +- debug("Bound: %d children for PMIC: '%s'\n", bind_count, pmic->name); ++printf("Bound: %d children for PMIC: '%s'\n", bind_count, pmic->name); + return bind_count; + } + #endif +@@ -136,13 +136,13 @@ int pmic_reg_read(struct udevice *dev, uint reg) + int ret; + + if (priv->trans_len < 1 || priv->trans_len > sizeof(val)) { +- debug("Wrong transmission size [%d]\n", priv->trans_len); ++printf("Wrong transmission size [%d]\n", priv->trans_len); + return -EINVAL; + } + +- debug("%s: reg=%x priv->trans_len:%d", __func__, reg, priv->trans_len); ++printf("%s: reg=%x priv->trans_len:%d", __func__, reg, priv->trans_len); + ret = pmic_read(dev, reg, (uint8_t *)&val, priv->trans_len); +- debug(", value=%x, ret=%d\n", val, ret); ++printf(", value=%x, ret=%d\n", val, ret); + + return ret ? ret : val; + } +@@ -153,14 +153,14 @@ int pmic_reg_write(struct udevice *dev, uint reg, uint value) + int ret; + + if (priv->trans_len < 1 || priv->trans_len > sizeof(value)) { +- debug("Wrong transmission size [%d]\n", priv->trans_len); ++printf("Wrong transmission size [%d]\n", priv->trans_len); + return -EINVAL; + } + +- debug("%s: reg=%x, value=%x priv->trans_len:%d", __func__, reg, value, ++printf("%s: reg=%x, value=%x priv->trans_len:%d", __func__, reg, value, + priv->trans_len); + ret = pmic_write(dev, reg, (uint8_t *)&value, priv->trans_len); +- debug(", ret=%d\n", ret); ++printf(", ret=%d\n", ret); + + return ret; + } +@@ -172,7 +172,7 @@ int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set) + int ret; + + if (priv->trans_len < 1 || priv->trans_len > sizeof(val)) { +- debug("Wrong transmission size [%d]\n", priv->trans_len); ++printf("Wrong transmission size [%d]\n", priv->trans_len); + return -EINVAL; + } + +diff --git a/drivers/power/pmic/pmic_tps65910_dm.c b/drivers/power/pmic/pmic_tps65910_dm.c +index e03ddc98d..4f9cbd470 100644 +--- a/drivers/power/pmic/pmic_tps65910_dm.c ++++ b/drivers/power/pmic/pmic_tps65910_dm.c +@@ -54,13 +54,13 @@ static int pmic_tps65910_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s regulators subnode not found\n", dev->name); ++printf("%s regulators subnode not found\n", dev->name); + return -EINVAL; + } + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s has no children (regulators)\n", dev->name); ++printf("%s has no children (regulators)\n", dev->name); + + return 0; + } +diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c +index 5f442fea6..d91548a29 100644 +--- a/drivers/power/pmic/rk8xx.c ++++ b/drivers/power/pmic/rk8xx.c +@@ -37,7 +37,7 @@ static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff, + + ret = dm_i2c_write(dev, reg, buff, len); + if (ret) { +- debug("write error to device: %p register: %#x!\n", dev, reg); ++printf("write error to device: %p register: %#x!\n", dev, reg); + return ret; + } + +@@ -50,7 +50,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len) + + ret = dm_i2c_read(dev, reg, buff, len); + if (ret) { +- debug("read error from device: %p register: %#x!\n", dev, reg); ++printf("read error from device: %p register: %#x!\n", dev, reg); + return ret; + } + +@@ -65,16 +65,16 @@ static int rk8xx_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +@@ -152,7 +152,7 @@ static int rk8xx_probe(struct udevice *dev) + __func__, init_data[i].reg, ret); + } + +- debug("%s: reg[0x%x] = 0x%x\n", __func__, init_data[i].reg, ++printf("%s: reg[0x%x] = 0x%x\n", __func__, init_data[i].reg, + pmic_reg_read(dev, init_data[i].reg)); + } + +diff --git a/drivers/power/pmic/rn5t567.c b/drivers/power/pmic/rn5t567.c +index d9a8298eb..d2518fe92 100644 +--- a/drivers/power/pmic/rn5t567.c ++++ b/drivers/power/pmic/rn5t567.c +@@ -25,7 +25,7 @@ static int rn5t567_write(struct udevice *dev, uint reg, const uint8_t *buff, + + ret = dm_i2c_write(dev, reg, buff, len); + if (ret) { +- debug("write error to device: %p register: %#x!\n", dev, reg); ++printf("write error to device: %p register: %#x!\n", dev, reg); + return ret; + } + +@@ -38,7 +38,7 @@ static int rn5t567_read(struct udevice *dev, uint reg, uint8_t *buff, int len) + + ret = dm_i2c_read(dev, reg, buff, len); + if (ret) { +- debug("read error from device: %p register: %#x!\n", dev, reg); ++printf("read error from device: %p register: %#x!\n", dev, reg); + return ret; + } + +diff --git a/drivers/power/pmic/s2mps11.c b/drivers/power/pmic/s2mps11.c +index 1ba1640a8..bf16c7875 100644 +--- a/drivers/power/pmic/s2mps11.c ++++ b/drivers/power/pmic/s2mps11.c +@@ -54,16 +54,16 @@ static int s2mps11_probe(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "voltage-regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + return 0; + } +diff --git a/drivers/power/pmic/s5m8767.c b/drivers/power/pmic/s5m8767.c +index db6d0357e..0b58c1e1d 100644 +--- a/drivers/power/pmic/s5m8767.c ++++ b/drivers/power/pmic/s5m8767.c +@@ -57,16 +57,16 @@ static int s5m8767_bind(struct udevice *dev) + + node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +diff --git a/drivers/power/pmic/tps65090.c b/drivers/power/pmic/tps65090.c +index b81df0dff..5e612240b 100644 +--- a/drivers/power/pmic/tps65090.c ++++ b/drivers/power/pmic/tps65090.c +@@ -55,16 +55,16 @@ static int tps65090_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + /* Always return success for this device */ + return 0; +diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c +index 3dfc1918d..83fe65f8d 100644 +--- a/drivers/power/pmic/tps65941.c ++++ b/drivers/power/pmic/tps65941.c +@@ -49,12 +49,12 @@ static int tps65941_bind(struct udevice *dev) + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { +- debug("%s: %s regulators subnode not found!\n", __func__, ++printf("%s: %s regulators subnode not found!\n", __func__, + dev->name); + return -ENXIO; + } + +- debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); ++printf("%s: '%s' - found regulators subnode\n", __func__, dev->name); + + children = pmic_bind_children(dev, regulators_node, pmic_children_info); + if (!children) +diff --git a/drivers/power/power_core.c b/drivers/power/power_core.c +index eeed8e24a..d3d8cda73 100644 +--- a/drivers/power/power_core.c ++++ b/drivers/power/power_core.c +@@ -60,7 +60,7 @@ struct pmic *pmic_alloc(void) + + list_add_tail(&p->list, &pmic_list); + +- debug("%s: new pmic struct: 0x%p\n", __func__, p); ++printf("%s: new pmic struct: 0x%p\n", __func__, p); + + return p; + } +@@ -71,7 +71,7 @@ struct pmic *pmic_get(const char *s) + + list_for_each_entry(p, &pmic_list, list) { + if (strcmp(p->name, s) == 0) { +- debug("%s: pmic %s -> 0x%p\n", __func__, p->name, p); ++printf("%s: pmic %s -> 0x%p\n", __func__, p->name, p); + return p; + } + } +@@ -144,7 +144,7 @@ static int do_pmic(struct cmd_tbl *cmdtp, int flag, int argc, + name = argv[1]; + cmd = argv[2]; + +- debug("%s: name: %s cmd: %s\n", __func__, name, cmd); ++printf("%s: name: %s cmd: %s\n", __func__, name, cmd); + p = pmic_get(name); + if (!p) + return CMD_RET_FAILURE; +diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c +index b67ac2f02..8394aed0d 100644 +--- a/drivers/power/power_i2c.c ++++ b/drivers/power/power_i2c.c +@@ -130,7 +130,7 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val) + + int pmic_probe(struct pmic *p) + { +- debug("Bus: %d PMIC:%s probed!\n", p->bus, p->name); ++printf("Bus: %d PMIC:%s probed!\n", p->bus, p->name); + #if CONFIG_IS_ENABLED(DM_I2C) + struct udevice *dev; + int ret; +diff --git a/drivers/power/regulator/as3722_regulator.c b/drivers/power/regulator/as3722_regulator.c +index ec0776b44..82572ecd7 100644 +--- a/drivers/power/regulator/as3722_regulator.c ++++ b/drivers/power/regulator/as3722_regulator.c +@@ -34,7 +34,7 @@ static int stepdown_set_enable(struct udevice *dev, bool enable) + + ret = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd); + if (ret < 0) { +- debug("%s: failed to write SD control register: %d", __func__, ++printf("%s: failed to write SD control register: %d", __func__, + ret); + return ret; + } +@@ -50,7 +50,7 @@ static int stepdown_get_enable(struct udevice *dev) + + ret = pmic_reg_read(pmic, AS3722_SD_CONTROL); + if (ret < 0) { +- debug("%s: failed to read SD control register: %d", __func__, ++printf("%s: failed to read SD control register: %d", __func__, + ret); + return ret; + } +@@ -82,7 +82,7 @@ static int ldo_set_enable(struct udevice *dev, bool enable) + + ret = pmic_clrsetbits(pmic, ctrl_reg, !enable << ldo, enable << ldo); + if (ret < 0) { +- debug("%s: failed to write LDO control register: %d", __func__, ++printf("%s: failed to write LDO control register: %d", __func__, + ret); + return ret; + } +@@ -104,7 +104,7 @@ static int ldo_get_enable(struct udevice *dev) + + ret = pmic_reg_read(pmic, ctrl_reg); + if (ret < 0) { +- debug("%s: failed to read SD control register: %d", __func__, ++printf("%s: failed to read SD control register: %d", __func__, + ret); + return ret; + } +diff --git a/drivers/power/regulator/bd71837.c b/drivers/power/regulator/bd71837.c +index 74011d629..4843550d2 100644 +--- a/drivers/power/regulator/bd71837.c ++++ b/drivers/power/regulator/bd71837.c +@@ -418,7 +418,7 @@ static int bd71837_regulator_probe(struct udevice *dev) + data_amnt = ARRAY_SIZE(bd71847_reg_data); + break; + default: +- debug("Unknown PMIC type\n"); ++printf("Unknown PMIC type\n"); + init_data = NULL; + data_amnt = 0; + break; +diff --git a/drivers/power/regulator/fan53555.c b/drivers/power/regulator/fan53555.c +index 9d8a235b7..25966aee1 100644 +--- a/drivers/power/regulator/fan53555.c ++++ b/drivers/power/regulator/fan53555.c +@@ -147,7 +147,7 @@ static int fan53555_regulator_get_value(struct udevice *dev) + return reg; + voltage = priv->vsel_min + (reg & 0x3f) * priv->vsel_step; + +- debug("%s: %d uV\n", __func__, voltage); ++printf("%s: %d uV\n", __func__, voltage); + return voltage; + } + +@@ -158,7 +158,7 @@ static int fan53555_regulator_set_value(struct udevice *dev, int uV) + u8 vol; + + vol = (uV - priv->vsel_min) / priv->vsel_step; +- debug("%s: uV=%d; writing volume %d: %02x\n", ++printf("%s: uV=%d; writing volume %d: %02x\n", + __func__, uV, pdata->vol_reg, vol); + + return pmic_clrsetbits(dev->parent, pdata->vol_reg, GENMASK(6, 0), vol); +@@ -204,7 +204,7 @@ static int fan53555_probe(struct udevice *dev) + struct fan53555_priv *priv = dev_get_priv(dev); + int ID1, ID2; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + /* read chip ID1 and ID2 (two registers, starting at ID1) */ + ID1 = pmic_reg_read(dev->parent, FAN53555_ID1); +@@ -223,7 +223,7 @@ static int fan53555_probe(struct udevice *dev) + if (fan53555_voltages_setup(dev) < 0) + return -ENODATA; + +- debug("%s: FAN53555 option %d rev %d detected\n", ++printf("%s: FAN53555 option %d rev %d detected\n", + __func__, priv->die_id, priv->die_rev); + + return 0; +diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c +index d3e0fb672..a841041df 100644 +--- a/drivers/power/regulator/fixed.c ++++ b/drivers/power/regulator/fixed.c +@@ -38,7 +38,7 @@ static int fixed_regulator_get_value(struct udevice *dev) + return -ENXIO; + + if (uc_pdata->min_uV != uc_pdata->max_uV) { +- debug("Invalid constraints for: %s\n", uc_pdata->name); ++printf("Invalid constraints for: %s\n", uc_pdata->name); + return -EINVAL; + } + +@@ -54,7 +54,7 @@ static int fixed_regulator_get_current(struct udevice *dev) + return -ENXIO; + + if (uc_pdata->min_uA != uc_pdata->max_uA) { +- debug("Invalid constraints for: %s\n", uc_pdata->name); ++printf("Invalid constraints for: %s\n", uc_pdata->name); + return -EINVAL; + } + +diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c +index e5e08a33d..d8652fb6c 100644 +--- a/drivers/power/regulator/gpio-regulator.c ++++ b/drivers/power/regulator/gpio-regulator.c +@@ -51,7 +51,7 @@ static int gpio_regulator_of_to_plat(struct udevice *dev) + gpio = &dev_pdata->gpio; + ret = gpio_request_by_name(dev, "gpios", 0, gpio, GPIOD_IS_OUT); + if (ret) +- debug("regulator gpio - not found! Error: %d", ret); ++printf("regulator gpio - not found! Error: %d", ret); + + ret = dev_read_size(dev, "states"); + if (ret < 0) +@@ -59,7 +59,7 @@ static int gpio_regulator_of_to_plat(struct udevice *dev) + + count = ret / sizeof(states_array[0]); + if (count > ARRAY_SIZE(states_array)) { +- debug("regulator gpio - to many states (%d > %d)", ++printf("regulator gpio - to many states (%d > %d)", + count / 2, GPIO_REGULATOR_MAX_STATES); + count = ARRAY_SIZE(states_array); + } +@@ -88,7 +88,7 @@ static int gpio_regulator_get_value(struct udevice *dev) + + uc_pdata = dev_get_uclass_plat(dev); + if (uc_pdata->min_uV > uc_pdata->max_uV) { +- debug("Invalid constraints for: %s\n", uc_pdata->name); ++printf("Invalid constraints for: %s\n", uc_pdata->name); + return -EINVAL; + } + +diff --git a/drivers/power/regulator/lp87565_regulator.c b/drivers/power/regulator/lp87565_regulator.c +index 7214dc1b8..6254053f5 100644 +--- a/drivers/power/regulator/lp87565_regulator.c ++++ b/drivers/power/regulator/lp87565_regulator.c +@@ -131,7 +131,7 @@ static int lp87565_buck_probe(struct udevice *dev) + + idx = dev->driver_data; + if (idx == 0 || idx == 1 || idx == 2 || idx == 3) { +- debug("Single phase regulator\n"); ++printf("Single phase regulator\n"); + } else if (idx == 23) { + idx = 5; + } else if (idx == 10) { +diff --git a/drivers/power/regulator/pbias_regulator.c b/drivers/power/regulator/pbias_regulator.c +index 5bf186e4d..d571c2aa8 100644 +--- a/drivers/power/regulator/pbias_regulator.c ++++ b/drivers/power/regulator/pbias_regulator.c +@@ -106,7 +106,7 @@ static int pbias_bind(struct udevice *dev) + children = pmic_bind_children(dev, dev_ofnode(dev), + pmic_children_info); + if (!children) +- debug("%s: %s - no child found\n", __func__, dev->name); ++printf("%s: %s - no child found\n", __func__, dev->name); + + return 0; + } +@@ -191,7 +191,7 @@ static int pbias_regulator_probe(struct udevice *dev) + rc = dev_read_stringlist_search(dev, "regulator-name", + (*p)->name); + if (rc >= 0) { +- debug("found regulator %s\n", (*p)->name); ++printf("found regulator %s\n", (*p)->name); + break; + } else if (rc != -ENODATA) { + return rc; +@@ -202,10 +202,10 @@ static int pbias_regulator_probe(struct udevice *dev) + int i = 0; + const char *s; + +- debug("regulator "); ++printf("regulator "); + while (dev_read_string_index(dev, "regulator-name", i++, &s) >= 0) +- debug("%s'%s' ", (i > 1) ? ", " : "", s); +- debug("%s not supported\n", (i > 2) ? "are" : "is"); ++printf("%s'%s' ", (i > 1) ? ", " : "", s); ++printf("%s not supported\n", (i > 2) ? "are" : "is"); + return -EINVAL; + } + +@@ -225,7 +225,7 @@ static int pbias_regulator_get_value(struct udevice *dev) + if (rc) + return rc; + +- debug("%s voltage id %s\n", p->name, ++printf("%s voltage id %s\n", p->name, + (reg & p->vmode) ? "3.0v" : "1.8v"); + return (reg & p->vmode) ? 3000000 : 1800000; + } +@@ -250,7 +250,7 @@ static int pbias_regulator_set_value(struct udevice *dev, int uV) + else + return -EINVAL; + +- debug("Setting %s voltage to %s\n", p->name, ++printf("Setting %s voltage to %s\n", p->name, + (reg & p->vmode) ? "3.0v" : "1.8v"); + + #ifdef CONFIG_MMC_OMAP36XX_PINS +@@ -282,7 +282,7 @@ static int pbias_regulator_get_enable(struct udevice *dev) + if (rc) + return rc; + +- debug("%s id %s\n", p->name, ++printf("%s id %s\n", p->name, + (reg & p->enable_mask) == (p->disable_val) ? "on" : "off"); + + return (reg & p->enable_mask) == (p->disable_val); +@@ -297,7 +297,7 @@ static int pbias_regulator_set_enable(struct udevice *dev, bool enable) + u32 wkup_ctrl = readl(OMAP34XX_CTRL_WKUP_CTRL); + #endif + +- debug("Turning %s %s\n", enable ? "on" : "off", p->name); ++printf("Turning %s %s\n", enable ? "on" : "off", p->name); + + #ifdef CONFIG_MMC_OMAP36XX_PINS + if (get_cpu_family() == CPU_OMAP36XX) { +diff --git a/drivers/power/regulator/pfuze100.c b/drivers/power/regulator/pfuze100.c +index 698a6fa59..579354e55 100644 +--- a/drivers/power/regulator/pfuze100.c ++++ b/drivers/power/regulator/pfuze100.c +@@ -281,11 +281,11 @@ static int pfuze100_regulator_probe(struct udevice *dev) + dev->name); + break; + default: +- debug("Unsupported PFUZE\n"); ++printf("Unsupported PFUZE\n"); + return -EINVAL; + } + if (!desc) { +- debug("Do not support regulator %s\n", dev->name); ++printf("Do not support regulator %s\n", dev->name); + return -EINVAL; + } + +@@ -466,7 +466,7 @@ static int pfuze100_regulator_val(struct udevice *dev, int op, int *uV) + *uV = desc->volt_table[val]; + } else { + if (uc_pdata->min_uV < 0) { +- debug("Need to provide min_uV in dts.\n"); ++printf("Need to provide min_uV in dts.\n"); + return -EINVAL; + } + val = pmic_reg_read(dev->parent, desc->vsel_reg); +@@ -480,7 +480,7 @@ static int pfuze100_regulator_val(struct udevice *dev, int op, int *uV) + } + + if (uc_pdata->type == REGULATOR_TYPE_FIXED) { +- debug("Set voltage for REGULATOR_TYPE_FIXED regulator\n"); ++printf("Set voltage for REGULATOR_TYPE_FIXED regulator\n"); + return -EINVAL; + } else if (desc->volt_table) { + for (i = 0; i <= desc->vsel_mask; i++) { +@@ -488,7 +488,7 @@ static int pfuze100_regulator_val(struct udevice *dev, int op, int *uV) + break; + } + if (i == desc->vsel_mask + 1) { +- debug("Unsupported voltage %u\n", *uV); ++printf("Unsupported voltage %u\n", *uV); + return -EINVAL; + } + +@@ -496,7 +496,7 @@ static int pfuze100_regulator_val(struct udevice *dev, int op, int *uV) + desc->vsel_mask, i); + } else { + if (uc_pdata->min_uV < 0) { +- debug("Need to provide min_uV in dts.\n"); ++printf("Need to provide min_uV in dts.\n"); + return -EINVAL; + } + return pmic_clrsetbits(dev->parent, desc->vsel_reg, +diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c +index ca59f3ae3..6917c8ee7 100644 +--- a/drivers/power/regulator/pwm_regulator.c ++++ b/drivers/power/regulator/pwm_regulator.c +@@ -98,7 +98,7 @@ static int pwm_regulator_of_to_plat(struct udevice *dev) + + ret = dev_read_phandle_with_args(dev, "pwms", "#pwm-cells", 0, 0, &args); + if (ret) { +- debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret); ++printf("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret); + return ret; + } + +@@ -113,7 +113,7 @@ static int pwm_regulator_of_to_plat(struct udevice *dev) + + ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm); + if (ret) { +- debug("%s: Cannot get PWM: ret=%d\n", __func__, ret); ++printf("%s: Cannot get PWM: ret=%d\n", __func__, ret); + return ret; + } + +diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c +index fac960682..cb316b255 100644 +--- a/drivers/power/regulator/regulator-uclass.c ++++ b/drivers/power/regulator/regulator-uclass.c +@@ -42,7 +42,7 @@ static void regulator_set_value_ramp_delay(struct udevice *dev, int old_uV, + { + int delay = DIV_ROUND_UP(abs(new_uV - old_uV), ramp_delay); + +- debug("regulator %s: delay %u us (%d uV -> %d uV)\n", dev->name, delay, ++printf("regulator %s: delay %u us (%d uV -> %d uV)\n", dev->name, delay, + old_uV, new_uV); + + udelay(delay); +@@ -250,7 +250,7 @@ int regulator_get_by_platname(const char *plat_name, struct udevice **devp) + for (ret = uclass_find_first_device(UCLASS_REGULATOR, &dev); dev; + ret = uclass_find_next_device(&dev)) { + if (ret) { +- debug("regulator %s, ret=%d\n", dev->name, ret); ++printf("regulator %s, ret=%d\n", dev->name, ret); + continue; + } + +@@ -261,7 +261,7 @@ int regulator_get_by_platname(const char *plat_name, struct udevice **devp) + return uclass_get_device_tail(dev, 0, devp); + } + +- debug("%s: can't find: %s, ret=%d\n", __func__, plat_name, ret); ++printf("%s: can't find: %s, ret=%d\n", __func__, plat_name, ret); + + return -ENODEV; + } +@@ -348,7 +348,7 @@ int regulator_autoset_by_name(const char *platname, struct udevice **devp) + if (devp) + *devp = dev; + if (ret) { +- debug("Can get the regulator: %s (err=%d)\n", platname, ret); ++printf("Can get the regulator: %s (err=%d)\n", platname, ret); + return ret; + } + +@@ -414,7 +414,7 @@ static int regulator_post_bind(struct udevice *dev) + /* Regulator's mandatory constraint */ + uc_pdata->name = dev_read_string(dev, property); + if (!uc_pdata->name) { +- debug("%s: dev '%s' has no property '%s'\n", ++printf("%s: dev '%s' has no property '%s'\n", + __func__, dev->name, property); + uc_pdata->name = dev_read_name(dev); + if (!uc_pdata->name) +@@ -424,7 +424,7 @@ static int regulator_post_bind(struct udevice *dev) + if (regulator_name_is_unique(dev, uc_pdata->name)) + return 0; + +- debug("'%s' of dev: '%s', has nonunique value: '%s\n", ++printf("'%s' of dev: '%s', has nonunique value: '%s\n", + property, dev->name, uc_pdata->name); + + return -EINVAL; +diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c +index 93d8196b3..813777b22 100644 +--- a/drivers/power/regulator/regulator_common.c ++++ b/drivers/power/regulator/regulator_common.c +@@ -29,7 +29,7 @@ int regulator_common_of_to_plat(struct udevice *dev, + gpio = &dev_pdata->gpio; + ret = gpio_request_by_name(dev, enable_gpio_name, 0, gpio, flags); + if (ret) { +- debug("Regulator '%s' optional enable GPIO - not found! Error: %d\n", ++printf("Regulator '%s' optional enable GPIO - not found! Error: %d\n", + dev->name, ret); + if (ret != -ENOENT) + return ret; +@@ -63,7 +63,7 @@ int regulator_common_set_enable(const struct udevice *dev, + { + int ret; + +- debug("%s: dev='%s', enable=%d, delay=%d, has_gpio=%d\n", __func__, ++printf("%s: dev='%s', enable=%d, delay=%d, has_gpio=%d\n", __func__, + dev->name, enable, dev_pdata->startup_delay_us, + dm_gpio_is_valid(&dev_pdata->gpio)); + /* Enable GPIO is optional */ +@@ -82,7 +82,7 @@ int regulator_common_set_enable(const struct udevice *dev, + + if (enable && dev_pdata->startup_delay_us) + udelay(dev_pdata->startup_delay_us); +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + + if (!enable && dev_pdata->off_on_delay_us) + udelay(dev_pdata->off_on_delay_us); +diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c +index 0ee07ad29..93edce04f 100644 +--- a/drivers/power/regulator/rk8xx.c ++++ b/drivers/power/regulator/rk8xx.c +@@ -287,7 +287,7 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt) + else + val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel; + +- debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n", ++printf("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n", + __func__, uvolt, buck + 1, info->vsel_reg, mask, val); + + if (priv->variant == RK816_ID) { +@@ -372,7 +372,7 @@ static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt) + else + val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel; + +- debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n", ++printf("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n", + __func__, uvolt, buck + 1, info->vsel_sleep_reg, mask, val); + + return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val); +@@ -812,7 +812,7 @@ static int ldo_set_value(struct udevice *dev, int uvolt) + else + val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel; + +- debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n", ++printf("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n", + __func__, uvolt, ldo + 1, info->vsel_reg, mask, val); + + return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val); +@@ -833,7 +833,7 @@ static int ldo_set_suspend_value(struct udevice *dev, int uvolt) + else + val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel; + +- debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n", ++printf("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n", + __func__, uvolt, ldo + 1, info->vsel_sleep_reg, mask, val); + + return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val); +@@ -910,7 +910,7 @@ static int switch_set_enable(struct udevice *dev, bool enable) + break; + } + +- debug("%s: switch%d, enable=%d, mask=0x%x\n", ++printf("%s: switch%d, enable=%d, mask=0x%x\n", + __func__, sw + 1, enable, mask); + + return ret; +@@ -977,7 +977,7 @@ static int switch_set_suspend_enable(struct udevice *dev, bool enable) + break; + } + +- debug("%s: switch%d, enable=%d, mask=0x%x\n", ++printf("%s: switch%d, enable=%d, mask=0x%x\n", + __func__, sw + 1, enable, mask); + + return ret; +diff --git a/drivers/power/regulator/tps65090_regulator.c b/drivers/power/regulator/tps65090_regulator.c +index 174ee58d0..e311ecb4f 100644 +--- a/drivers/power/regulator/tps65090_regulator.c ++++ b/drivers/power/regulator/tps65090_regulator.c +@@ -30,7 +30,7 @@ static int tps65090_fet_get_enable(struct udevice *dev) + int ret, fet_id; + + fet_id = dev->driver_data; +- debug("%s: fet_id=%d\n", __func__, fet_id); ++printf("%s: fet_id=%d\n", __func__, fet_id); + + ret = pmic_reg_read(pmic, REG_FET_BASE + fet_id); + if (ret < 0) +@@ -68,7 +68,7 @@ static int tps65090_fet_set(struct udevice *pmic, int fet_id, bool set) + return ret; + + /* Check that the FET went into the expected state */ +- debug("%s: flags=%x\n", __func__, ret); ++printf("%s: flags=%x\n", __func__, ret); + if (!!(ret & FET_CTRL_PGFET) == set) + return 0; + +@@ -79,7 +79,7 @@ static int tps65090_fet_set(struct udevice *pmic, int fet_id, bool set) + mdelay(1); + } + +- debug("FET %d: Power good should have set to %d but reg=%#02x\n", ++printf("FET %d: Power good should have set to %d but reg=%#02x\n", + fet_id, set, ret); + return -EAGAIN; + } +@@ -92,7 +92,7 @@ static int tps65090_fet_set_enable(struct udevice *dev, bool enable) + int loops; + + fet_id = dev->driver_data; +- debug("%s: fet_id=%d, enable=%d\n", __func__, fet_id, enable); ++printf("%s: fet_id=%d, enable=%d\n", __func__, fet_id, enable); + + start = get_timer(0); + for (loops = 0;; loops++) { +@@ -108,10 +108,10 @@ static int tps65090_fet_set_enable(struct udevice *dev, bool enable) + } + + if (ret) +- debug("%s: FET%d failed to power on: time=%lums, loops=%d\n", ++printf("%s: FET%d failed to power on: time=%lums, loops=%d\n", + __func__, fet_id, get_timer(start), loops); + else if (loops) +- debug("%s: FET%d powered on after %lums, loops=%d\n", ++printf("%s: FET%d powered on after %lums, loops=%d\n", + __func__, fet_id, get_timer(start), loops); + + /* +diff --git a/drivers/power/regulator/tps65910_regulator.c b/drivers/power/regulator/tps65910_regulator.c +index 0ed4952a1..3e2d60c75 100644 +--- a/drivers/power/regulator/tps65910_regulator.c ++++ b/drivers/power/regulator/tps65910_regulator.c +@@ -398,15 +398,15 @@ static int tps65910_regulator_of_to_plat(struct udevice *dev) + return -EINVAL; + supply_name = supply_names[regulator_supplies[pdata->unit]]; + +- debug("Looking up supply power %s\n", supply_name); ++printf("Looking up supply power %s\n", supply_name); + ret = device_get_supply_regulator(dev->parent, supply_name, &supply); + if (ret) { +- debug(" missing supply power %s\n", supply_name); ++printf(" missing supply power %s\n", supply_name); + return ret; + } + pdata->supply = regulator_get_value(supply); + if (pdata->supply < 0) { +- debug(" invalid supply voltage for regulator %s\n", ++printf(" invalid supply voltage for regulator %s\n", + supply->name); + return -EINVAL; + } +diff --git a/drivers/power/regulator/tps65941_regulator.c b/drivers/power/regulator/tps65941_regulator.c +index d73f83248..64c1de44b 100644 +--- a/drivers/power/regulator/tps65941_regulator.c ++++ b/drivers/power/regulator/tps65941_regulator.c +@@ -272,7 +272,7 @@ static int tps65941_ldo_probe(struct udevice *dev) + + idx = dev->driver_data; + if (idx == 1 || idx == 2 || idx == 3 || idx == 4) { +- debug("Single phase regulator\n"); ++printf("Single phase regulator\n"); + } else { + printf("Wrong ID for regulator\n"); + return -EINVAL; +@@ -294,7 +294,7 @@ static int tps65941_buck_probe(struct udevice *dev) + + idx = dev->driver_data; + if (idx == 1 || idx == 2 || idx == 3 || idx == 4 || idx == 5) { +- debug("Single phase regulator\n"); ++printf("Single phase regulator\n"); + } else if (idx == 12) { + idx = 1; + } else if (idx == 34) { +diff --git a/drivers/power/tps6586x.c b/drivers/power/tps6586x.c +index 49b28a5e6..2b8fe1b5b 100644 +--- a/drivers/power/tps6586x.c ++++ b/drivers/power/tps6586x.c +@@ -48,9 +48,9 @@ static int tps6586x_read(int reg) + } + + exit: +- debug("pmu_read %x=%x\n", reg, retval); ++printf("pmu_read %x=%x\n", reg, retval); + if (retval < 0) +- debug("%s: failed to read register %#x: %d\n", __func__, reg, ++printf("%s: failed to read register %#x: %d\n", __func__, reg, + retval); + return retval; + } +@@ -71,11 +71,11 @@ static int tps6586x_write(int reg, uchar *data, uint len) + } + + exit: +- debug("pmu_write %x=%x: ", reg, retval); ++printf("pmu_write %x=%x: ", reg, retval); + for (i = 0; i < len; i++) +- debug("%x ", data[i]); ++printf("%x ", data[i]); + if (retval) +- debug("%s: failed to write register %#x\n", __func__, reg); ++printf("%s: failed to write register %#x\n", __func__, reg); + return retval; + } + +@@ -162,7 +162,7 @@ int tps6586x_set_pwm_mode(int mask) + } + + if (ret == -1) +- debug("%s: Failed to read/write PWM mode reg\n", __func__); ++printf("%s: Failed to read/write PWM mode reg\n", __func__); + + return ret; + } +@@ -177,7 +177,7 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, + + /* get current voltage settings */ + if (read_voltages(&sm0, &sm1)) { +- debug("%s: Cannot read voltage settings\n", __func__); ++printf("%s: Cannot read voltage settings\n", __func__); + return -EINVAL; + } + +@@ -188,7 +188,7 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, + * This condition may happen when system reboots due to kernel crash. + */ + if (min_sm0_over_sm1 != -1 && sm0 < sm1 + min_sm0_over_sm1) { +- debug("%s: SM0 is %d, SM1 is %d, but min_sm0_over_sm1 is %d\n", ++printf("%s: SM0 is %d, SM1 is %d, but min_sm0_over_sm1 is %d\n", + __func__, sm0, sm1, min_sm0_over_sm1); + return -EINVAL; + } +@@ -216,7 +216,7 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, + while (!bad && (sm0 != sm0_target || sm1 != sm1_target)) { + int adjust_sm0_late = 0; /* flag to adjust vdd_core later */ + +- debug("%d-%d %d-%d ", sm0, sm0_target, sm1, sm1_target); ++printf("%d-%d %d-%d ", sm0, sm0_target, sm1, sm1_target); + + if (sm0 != sm0_target) { + /* +@@ -237,9 +237,9 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, + + if (adjust_sm0_late) + bad |= set_voltage(SM0_VOLTAGE_V1, sm0, rate); +- debug("%d\n", adjust_sm0_late); ++printf("%d\n", adjust_sm0_late); + } +- debug("%d-%d %d-%d done\n", sm0, sm0_target, sm1, sm1_target); ++printf("%d-%d %d-%d done\n", sm0, sm0_target, sm1, sm1_target); + + return bad ? -EINVAL : 0; + } +diff --git a/drivers/pwm/cros_ec_pwm.c b/drivers/pwm/cros_ec_pwm.c +index 4a39c319a..d991b3ef2 100644 +--- a/drivers/pwm/cros_ec_pwm.c ++++ b/drivers/pwm/cros_ec_pwm.c +@@ -19,7 +19,7 @@ static int cros_ec_pwm_set_config(struct udevice *dev, uint channel, + uint duty; + int ret; + +- debug("%s: period_ns=%u, duty_ns=%u asked\n", __func__, ++printf("%s: period_ns=%u, duty_ns=%u asked\n", __func__, + period_ns, duty_ns); + + /* No way to set the period, only a relative duty cycle */ +@@ -29,18 +29,18 @@ static int cros_ec_pwm_set_config(struct udevice *dev, uint channel, + + if (!priv->enabled) { + priv->duty = duty; +- debug("%s: duty=%#x to-be-set\n", __func__, duty); ++printf("%s: duty=%#x to-be-set\n", __func__, duty); + return 0; + } + + ret = cros_ec_set_pwm_duty(dev->parent, channel, duty); + if (ret) { +- debug("%s: duty=%#x failed\n", __func__, duty); ++printf("%s: duty=%#x failed\n", __func__, duty); + return ret; + } + + priv->duty = duty; +- debug("%s: duty=%#x set\n", __func__, duty); ++printf("%s: duty=%#x set\n", __func__, duty); + + return 0; + } +@@ -54,12 +54,12 @@ static int cros_ec_pwm_set_enable(struct udevice *dev, uint channel, + ret = cros_ec_set_pwm_duty(dev->parent, channel, + enable ? priv->duty : 0); + if (ret) { +- debug("%s: enable=%d failed\n", __func__, enable); ++printf("%s: enable=%d failed\n", __func__, enable); + return ret; + } + + priv->enabled = enable; +- debug("%s: enable=%d (duty=%#x) set\n", __func__, ++printf("%s: enable=%d (duty=%#x) set\n", __func__, + enable, priv->duty); + + return 0; +diff --git a/drivers/pwm/exynos_pwm.c b/drivers/pwm/exynos_pwm.c +index 1afaf784d..8e87f5f17 100644 +--- a/drivers/pwm/exynos_pwm.c ++++ b/drivers/pwm/exynos_pwm.c +@@ -28,7 +28,7 @@ static int exynos_pwm_set_config(struct udevice *dev, uint channel, + + if (channel >= 5) + return -EINVAL; +- debug("%s: Configure '%s' channel %u, period_ns %u, duty_ns %u\n", ++printf("%s: Configure '%s' channel %u, period_ns %u, duty_ns %u\n", + __func__, dev->name, channel, period_ns, duty_ns); + + val = readl(®s->tcfg0); +@@ -36,13 +36,13 @@ static int exynos_pwm_set_config(struct udevice *dev, uint channel, + div = (readl(®s->tcfg1) >> MUX_DIV_SHIFT(channel)) & 0xf; + + rate = get_pwm_clk() / ((prescaler + 1) * (1 << div)); +- debug("%s: pwm_clk %lu, rate %u\n", __func__, get_pwm_clk(), rate); ++printf("%s: pwm_clk %lu, rate %u\n", __func__, get_pwm_clk(), rate); + + if (channel < 4) { + rate_ns = 1000000000 / rate; + tcnt = period_ns / rate_ns; + tcmp = duty_ns / rate_ns; +- debug("%s: tcnt %u, tcmp %u\n", __func__, tcnt, tcmp); ++printf("%s: tcnt %u, tcmp %u\n", __func__, tcnt, tcmp); + offset = channel * 3; + writel(tcnt, ®s->tcntb0 + offset); + writel(tcmp, ®s->tcmpb0 + offset); +@@ -71,7 +71,7 @@ static int exynos_pwm_set_enable(struct udevice *dev, uint channel, + + if (channel >= 4) + return -EINVAL; +- debug("%s: Enable '%s' channel %u\n", __func__, dev->name, channel); ++printf("%s: Enable '%s' channel %u\n", __func__, dev->name, channel); + mask = TCON_START(channel); + clrsetbits_le32(®s->tcon, mask, enable ? mask : 0); + +diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c +index 2008c1520..9917665c0 100644 +--- a/drivers/pwm/pwm-imx.c ++++ b/drivers/pwm/pwm-imx.c +@@ -90,7 +90,7 @@ static int imx_pwm_set_invert(struct udevice *dev, uint channel, + { + struct imx_pwm_priv *priv = dev_get_priv(dev); + +- debug("%s: polarity=%u\n", __func__, polarity); ++printf("%s: polarity=%u\n", __func__, polarity); + priv->invert = polarity; + + return 0; +@@ -103,7 +103,7 @@ static int imx_pwm_set_config(struct udevice *dev, uint channel, + struct pwm_regs *regs = priv->regs; + unsigned long period_cycles, duty_cycles, prescale; + +- debug("%s: Config '%s' channel: %d\n", __func__, dev->name, channel); ++printf("%s: Config '%s' channel: %d\n", __func__, dev->name, channel); + + pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles, + &prescale); +@@ -116,7 +116,7 @@ static int imx_pwm_set_enable(struct udevice *dev, uint channel, bool enable) + struct imx_pwm_priv *priv = dev_get_priv(dev); + struct pwm_regs *regs = priv->regs; + +- debug("%s: Enable '%s' state: %d\n", __func__, dev->name, enable); ++printf("%s: Enable '%s' state: %d\n", __func__, dev->name, enable); + + if (enable) + setbits_le32(®s->cr, PWMCR_EN); +diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c +index 03eeacc28..54ac956c2 100644 +--- a/drivers/pwm/pwm-meson.c ++++ b/drivers/pwm/pwm-meson.c +@@ -117,7 +117,7 @@ static int meson_pwm_set_config(struct udevice *dev, uint channeln, + else + duty = duty_ns; + +- debug("%s%d: polarity %s duty %d period %d\n", __func__, channeln, ++printf("%s%d: polarity %s duty %d period %d\n", __func__, channeln, + channel->polarity ? "true" : "false", duty, period); + + fin_freq = clk_get_rate(&channel->clk); +@@ -126,7 +126,7 @@ static int meson_pwm_set_config(struct udevice *dev, uint channeln, + return -EINVAL; + } + +- debug("%s%d: fin_freq: %lu Hz\n", __func__, channeln, fin_freq); ++printf("%s%d: fin_freq: %lu Hz\n", __func__, channeln, fin_freq); + + pre_div = div64_u64(fin_freq * (u64)period, NSEC_PER_SEC * 0xffffLL); + if (pre_div > MISC_CLK_DIV_MASK) { +@@ -140,7 +140,7 @@ static int meson_pwm_set_config(struct udevice *dev, uint channeln, + return -EINVAL; + } + +- debug("%s%d: period=%u pre_div=%u cnt=%u\n", __func__, channeln, period, pre_div, cnt); ++printf("%s%d: period=%u pre_div=%u cnt=%u\n", __func__, channeln, period, pre_div, cnt); + + if (duty == period) { + channel->pre_div = pre_div; +@@ -158,7 +158,7 @@ static int meson_pwm_set_config(struct udevice *dev, uint channeln, + return -EINVAL; + } + +- debug("%s%d: duty=%u pre_div=%u duty_cnt=%u\n", ++printf("%s%d: duty=%u pre_div=%u duty_cnt=%u\n", + __func__, channeln, duty, pre_div, duty_cnt); + + channel->pre_div = pre_div; +@@ -212,7 +212,7 @@ static int meson_pwm_set_enable(struct udevice *dev, uint channeln, bool enable) + value |= channel_data->pwm_en_mask; + writel(value, priv->base + REG_MISC_AB); + +- debug("%s%d: enabled\n", __func__, channeln); ++printf("%s%d: enabled\n", __func__, channeln); + channel->enabled = true; + } else { + if (!channel->enabled) +@@ -222,7 +222,7 @@ static int meson_pwm_set_enable(struct udevice *dev, uint channeln, bool enable) + value &= channel_data->pwm_en_mask; + writel(value, priv->base + REG_MISC_AB); + +- debug("%s%d: disabled\n", __func__, channeln); ++printf("%s%d: disabled\n", __func__, channeln); + channel->enabled = false; + } + +@@ -237,7 +237,7 @@ static int meson_pwm_set_invert(struct udevice *dev, uint channeln, bool polarit + if (channeln >= MESON_NUM_PWMS) + return -ENODEV; + +- debug("%s%d: set invert %s\n", __func__, channeln, polarity ? "true" : "false"); ++printf("%s%d: set invert %s\n", __func__, channeln, polarity ? "true" : "false"); + + channel = &priv->channels[channeln]; + +@@ -384,7 +384,7 @@ static int meson_pwm_probe(struct udevice *dev) + /* switch parent in mux */ + reg = readl(priv->base + REG_MISC_AB); + +- debug("%s%d: switching parent %d to %d\n", __func__, i, ++printf("%s%d: switching parent %d to %d\n", __func__, i, + (reg >> channel_data->clk_sel_shift) & MISC_CLK_SEL_MASK, p); + + reg &= MISC_CLK_SEL_MASK << channel_data->clk_sel_shift; +diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c +index b9813a3b6..d276ed62a 100644 +--- a/drivers/pwm/pwm-sifive.c ++++ b/drivers/pwm/pwm-sifive.c +@@ -69,7 +69,7 @@ static int pwm_sifive_set_config(struct udevice *dev, uint channel, + unsigned long long num; + u32 scale, val = 0, frac; + +- debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns); ++printf("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns); + + /* + * The PWM unit is used with pwmzerocmp=0, so the only way to modify the +@@ -105,7 +105,7 @@ static int pwm_sifive_set_enable(struct udevice *dev, uint channel, bool enable) + struct pwm_sifive_priv *priv = dev_get_priv(dev); + const struct pwm_sifive_regs *regs = &priv->data->regs; + +- debug("%s: Enable '%s'\n", __func__, dev->name); ++printf("%s: Enable '%s'\n", __func__, dev->name); + + if (enable) + writel(PWM_SIFIVE_CHANNEL_ENABLE_VAL, priv->base + +@@ -134,7 +134,7 @@ static int pwm_sifive_probe(struct udevice *dev) + + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) { +- debug("%s get clock fail!\n", __func__); ++printf("%s get clock fail!\n", __func__); + return -EINVAL; + } + +diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c +index 071eb04fd..29707e44b 100644 +--- a/drivers/pwm/rk_pwm.c ++++ b/drivers/pwm/rk_pwm.c +@@ -41,11 +41,11 @@ static int rk_pwm_set_invert(struct udevice *dev, uint channel, bool polarity) + struct rk_pwm_priv *priv = dev_get_priv(dev); + + if (!priv->data->supports_polarity) { +- debug("%s: Do not support polarity\n", __func__); ++printf("%s: Do not support polarity\n", __func__); + return 0; + } + +- debug("%s: polarity=%u\n", __func__, polarity); ++printf("%s: polarity=%u\n", __func__, polarity); + if (polarity) + priv->conf_polarity = PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE; + else +@@ -62,7 +62,7 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, + unsigned long period, duty; + u32 ctrl; + +- debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns); ++printf("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns); + + ctrl = readl(priv->base + regs->ctrl); + /* +@@ -96,7 +96,7 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns, + ctrl &= ~PWM_LOCK; + writel(ctrl, priv->base + regs->ctrl); + +- debug("%s: period=%lu, duty=%lu\n", __func__, period, duty); ++printf("%s: period=%lu, duty=%lu\n", __func__, period, duty); + + return 0; + } +@@ -107,7 +107,7 @@ static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable) + const struct rockchip_pwm_regs *regs = &priv->data->regs; + u32 ctrl; + +- debug("%s: Enable '%s'\n", __func__, dev->name); ++printf("%s: Enable '%s'\n", __func__, dev->name); + + ctrl = readl(priv->base + regs->ctrl); + ctrl &= ~priv->data->enable_conf_mask; +@@ -139,7 +139,7 @@ static int rk_pwm_probe(struct udevice *dev) + + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) { +- debug("%s get clock fail!\n", __func__); ++printf("%s get clock fail!\n", __func__); + return -EINVAL; + } + +diff --git a/drivers/pwm/sunxi_pwm.c b/drivers/pwm/sunxi_pwm.c +index e3d5ee456..672886983 100644 +--- a/drivers/pwm/sunxi_pwm.c ++++ b/drivers/pwm/sunxi_pwm.c +@@ -58,7 +58,7 @@ static int sunxi_pwm_set_invert(struct udevice *dev, uint channel, + { + struct sunxi_pwm_priv *priv = dev_get_priv(dev); + +- debug("%s: polarity=%u\n", __func__, polarity); ++printf("%s: polarity=%u\n", __func__, polarity); + priv->invert = polarity; + + return 0; +@@ -74,7 +74,7 @@ static int sunxi_pwm_set_config(struct udevice *dev, uint channel, + u64 best_scaled_freq = 0; + const u32 nsecs_per_sec = 1000000000U; + +- debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns); ++printf("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns); + + for (int prescaler = 0; prescaler <= SUNXI_PWM_CTRL_PRESCALE0_MASK; + prescaler++) { +@@ -93,7 +93,7 @@ static int sunxi_pwm_set_config(struct udevice *dev, uint channel, + } + + if (best_period - 1 > SUNXI_PWM_CH0_PERIOD_MAX) { +- debug("%s: failed to find prescaler value\n", __func__); ++printf("%s: failed to find prescaler value\n", __func__); + return -EINVAL; + } + +@@ -115,7 +115,7 @@ static int sunxi_pwm_set_config(struct udevice *dev, uint channel, + writel(SUNXI_PWM_CH0_PERIOD_PRD(best_period) | + SUNXI_PWM_CH0_PERIOD_DUTY(duty), ®s->ch0_period); + +- debug("%s: prescaler: %d, period: %d, duty: %d\n", ++printf("%s: prescaler: %d, period: %d, duty: %d\n", + __func__, priv->prescaler, + best_period, duty); + +@@ -128,7 +128,7 @@ static int sunxi_pwm_set_enable(struct udevice *dev, uint channel, bool enable) + struct sunxi_pwm *regs = priv->regs; + u32 v; + +- debug("%s: Enable '%s'\n", __func__, dev->name); ++printf("%s: Enable '%s'\n", __func__, dev->name); + + v = readl(®s->ctrl); + if (!enable) { +diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c +index 36c35c608..c16cb7298 100644 +--- a/drivers/pwm/tegra_pwm.c ++++ b/drivers/pwm/tegra_pwm.c +@@ -25,7 +25,7 @@ static int tegra_pwm_set_config(struct udevice *dev, uint channel, + + if (channel >= 4) + return -EINVAL; +- debug("%s: Configure '%s' channel %u\n", __func__, dev->name, channel); ++printf("%s: Configure '%s' channel %u\n", __func__, dev->name, channel); + /* We ignore the period here and just use 32KHz */ + clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, 32768); + +@@ -34,7 +34,7 @@ static int tegra_pwm_set_config(struct udevice *dev, uint channel, + reg = pulse_width << PWM_WIDTH_SHIFT; + reg |= 1 << PWM_DIVIDER_SHIFT; + writel(reg, ®s[channel].control); +- debug("%s: pulse_width=%u\n", __func__, pulse_width); ++printf("%s: pulse_width=%u\n", __func__, pulse_width); + + return 0; + } +@@ -46,7 +46,7 @@ static int tegra_pwm_set_enable(struct udevice *dev, uint channel, bool enable) + + if (channel >= 4) + return -EINVAL; +- debug("%s: Enable '%s' channel %u\n", __func__, dev->name, channel); ++printf("%s: Enable '%s' channel %u\n", __func__, dev->name, channel); + clrsetbits_le32(®s[channel].control, PWM_ENABLE_MASK, + enable ? PWM_ENABLE_MASK : 0); + +diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c +index 5da971ddc..a39aa61f3 100644 +--- a/drivers/qe/uec.c ++++ b/drivers/qe/uec.c +@@ -603,7 +603,7 @@ static int uec_miiphy_find_dev_by_name(const char *devname) + + /* If device cannot be found, returns -1 */ + if (i == MAXCONTROLLERS) { +- debug("%s: device %s not found in devlist\n", __func__, ++printf("%s: device %s not found in devlist\n", __func__, + devname); + i = -1; + } +@@ -623,7 +623,7 @@ static int uec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg) + int devindex = 0; + + if (!bus->name) { +- debug("%s: NULL pointer given\n", __func__); ++printf("%s: NULL pointer given\n", __func__); + } else { + devindex = uec_miiphy_find_dev_by_name(bus->name); + if (devindex >= 0) +@@ -644,7 +644,7 @@ static int uec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg, + int devindex = 0; + + if (!bus->name) { +- debug("%s: NULL pointer given\n", __func__); ++printf("%s: NULL pointer given\n", __func__); + } else { + devindex = uec_miiphy_find_dev_by_name(bus->name); + if (devindex >= 0) +diff --git a/drivers/ram/aspeed/sdram_ast2500.c b/drivers/ram/aspeed/sdram_ast2500.c +index 141b19b57..106c09f23 100644 +--- a/drivers/ram/aspeed/sdram_ast2500.c ++++ b/drivers/ram/aspeed/sdram_ast2500.c +@@ -274,7 +274,7 @@ static int ast2500_sdrammc_init_ddr4(struct dram_info *info) + + ret = ast2500_sdrammc_ddr4_calibrate_vref(info); + if (ret < 0) { +- debug("Vref calibration failed!\n"); ++printf("Vref calibration failed!\n"); + return ret; + } + +@@ -336,26 +336,26 @@ static int ast2500_sdrammc_probe(struct udevice *dev) + int ret = clk_get_by_index(dev, 0, &priv->ddr_clk); + + if (ret) { +- debug("DDR:No CLK\n"); ++printf("DDR:No CLK\n"); + return ret; + } + + priv->scu = ast_get_scu(); + if (IS_ERR(priv->scu)) { +- debug("%s(): can't get SCU\n", __func__); ++printf("%s(): can't get SCU\n", __func__); + return PTR_ERR(priv->scu); + } + + clk_set_rate(&priv->ddr_clk, priv->clock_rate); + ret = reset_get_by_index(dev, 0, &reset_ctl); + if (ret) { +- debug("%s(): Failed to get reset signal\n", __func__); ++printf("%s(): Failed to get reset signal\n", __func__); + return ret; + } + + ret = reset_assert(&reset_ctl); + if (ret) { +- debug("%s(): SDRAM reset failed: %u\n", __func__, ret); ++printf("%s(): SDRAM reset failed: %u\n", __func__, ret); + return ret; + } + +@@ -377,7 +377,7 @@ static int ast2500_sdrammc_probe(struct udevice *dev) + if (readl(&priv->scu->hwstrap) & SCU_HWSTRAP_DDR4) { + ast2500_sdrammc_init_ddr4(priv); + } else { +- debug("Unsupported DRAM3\n"); ++printf("Unsupported DRAM3\n"); + return -EINVAL; + } + +@@ -404,7 +404,7 @@ static int ast2500_sdrammc_of_to_plat(struct udevice *dev) + "clock-frequency", 0); + + if (!priv->clock_rate) { +- debug("DDR Clock Rate not defined\n"); ++printf("DDR Clock Rate not defined\n"); + return -EINVAL; + } + +diff --git a/drivers/ram/aspeed/sdram_ast2600.c b/drivers/ram/aspeed/sdram_ast2600.c +index 9ad398d24..ccbba549a 100644 +--- a/drivers/ram/aspeed/sdram_ast2600.c ++++ b/drivers/ram/aspeed/sdram_ast2600.c +@@ -476,7 +476,7 @@ static void ast2600_sdramphy_init(u32 *p_tbl, struct dram_info *info) + + while (1) { + if (addr < reg_base) { +- debug("invalid DDR-PHY addr: 0x%08x\n", addr); ++printf("invalid DDR-PHY addr: 0x%08x\n", addr); + break; + } + data = p_tbl[i++]; +@@ -502,68 +502,68 @@ static int ast2600_sdramphy_check_status(struct dram_info *info) + u32 reg_base = (u32)info->phy_status; + int need_retrain = 0; + +- debug("\nSDRAM PHY training report:\n"); ++printf("\nSDRAM PHY training report:\n"); + + /* training status */ + value = readl(reg_base + 0x00); +- debug("rO_DDRPHY_reg offset 0x00 = 0x%08x\n", value); ++printf("rO_DDRPHY_reg offset 0x00 = 0x%08x\n", value); + + if (value & BIT(3)) +- debug("\tinitial PVT calibration fail\n"); ++printf("\tinitial PVT calibration fail\n"); + + if (value & BIT(5)) +- debug("\truntime calibration fail\n"); ++printf("\truntime calibration fail\n"); + + /* PU & PD */ + value = readl(reg_base + 0x30); +- debug("rO_DDRPHY_reg offset 0x30 = 0x%08x\n", value); +- debug(" PU = 0x%02x\n", value & 0xff); +- debug(" PD = 0x%02x\n", (value >> 16) & 0xff); ++printf("rO_DDRPHY_reg offset 0x30 = 0x%08x\n", value); ++printf(" PU = 0x%02x\n", value & 0xff); ++printf(" PD = 0x%02x\n", (value >> 16) & 0xff); + + /* read eye window */ + value = readl(reg_base + 0x68); + if (0 == (value & GENMASK(7, 0))) + need_retrain = 1; + +- debug("rO_DDRPHY_reg offset 0x68 = 0x%08x\n", value); +- debug(" rising edge of read data eye training pass window\n"); ++printf("rO_DDRPHY_reg offset 0x68 = 0x%08x\n", value); ++printf(" rising edge of read data eye training pass window\n"); + tmp = (((value & GENMASK(7, 0)) >> 0) * 100) / 255; +- debug(" B0:%d%%\n", tmp); ++printf(" B0:%d%%\n", tmp); + tmp = (((value & GENMASK(15, 8)) >> 8) * 100) / 255; +- debug(" B1:%d%%\n", tmp); ++printf(" B1:%d%%\n", tmp); + + value = readl(reg_base + 0xC8); +- debug("rO_DDRPHY_reg offset 0xC8 = 0x%08x\n", value); +- debug(" falling edge of read data eye training pass window\n"); ++printf("rO_DDRPHY_reg offset 0xC8 = 0x%08x\n", value); ++printf(" falling edge of read data eye training pass window\n"); + tmp = (((value & GENMASK(7, 0)) >> 0) * 100) / 255; +- debug(" B0:%d%%\n", tmp); ++printf(" B0:%d%%\n", tmp); + tmp = (((value & GENMASK(15, 8)) >> 8) * 100) / 255; +- debug(" B1:%d%%\n", tmp); ++printf(" B1:%d%%\n", tmp); + + /* write eye window */ + value = readl(reg_base + 0x7c); + if (0 == (value & GENMASK(7, 0))) + need_retrain = 1; + +- debug("rO_DDRPHY_reg offset 0x7C = 0x%08x\n", value); +- debug(" rising edge of write data eye training pass window\n"); ++printf("rO_DDRPHY_reg offset 0x7C = 0x%08x\n", value); ++printf(" rising edge of write data eye training pass window\n"); + tmp = (((value & GENMASK(7, 0)) >> 0) * 100) / 255; +- debug(" B0:%d%%\n", tmp); ++printf(" B0:%d%%\n", tmp); + tmp = (((value & GENMASK(15, 8)) >> 8) * 100) / 255; +- debug(" B1:%d%%\n", tmp); ++printf(" B1:%d%%\n", tmp); + + /* read Vref training result */ + value = readl(reg_base + 0x88); +- debug("rO_DDRPHY_reg offset 0x88 = 0x%08x\n", value); +- debug(" read Vref training result\n"); ++printf("rO_DDRPHY_reg offset 0x88 = 0x%08x\n", value); ++printf(" read Vref training result\n"); + tmp = (((value & GENMASK(7, 0)) >> 0) * 100) / 127; +- debug(" B0:%d%%\n", tmp); ++printf(" B0:%d%%\n", tmp); + tmp = (((value & GENMASK(15, 8)) >> 8) * 100) / 127; +- debug(" B1:%d%%\n", tmp); ++printf(" B1:%d%%\n", tmp); + + /* write Vref training result */ + value = readl(reg_base + 0x90); +- debug("rO_DDRPHY_reg offset 0x90 = 0x%08x\n", value); ++printf("rO_DDRPHY_reg offset 0x90 = 0x%08x\n", value); + + /* gate train */ + value = readl(reg_base + 0x50); +@@ -572,7 +572,7 @@ static int ast2600_sdramphy_check_status(struct dram_info *info) + need_retrain = 1; + } + +- debug("rO_DDRPHY_reg offset 0x50 = 0x%08x\n", value); ++printf("rO_DDRPHY_reg offset 0x50 = 0x%08x\n", value); + + return need_retrain; + } +@@ -604,7 +604,7 @@ int ast2600_sdrammc_dg_test(struct dram_info *info, unsigned int datagen, u32 mo + return 0; + + if (++timeout > TIMEOUT_DRAM) { +- debug("Timeout!!\n"); ++printf("Timeout!!\n"); + writel(0, ®s->ecc_test_ctrl); + return -1; + } +@@ -647,25 +647,25 @@ static int ast2600_sdrammc_test(struct dram_info *info) + u32 i = 0; + bool finish = false; + +- debug("sdram mc test:\n"); ++printf("sdram mc test:\n"); + while (!finish) { + pattern = as2600_sdrammc_test_pattern[i++]; + i = i % MC_TEST_PATTERN_N; +- debug(" pattern = %08X : ", pattern); ++printf(" pattern = %08X : ", pattern); + writel(pattern, ®s->test_init_val); + + if (ast2600_sdrammc_cbr_test(info)) { +- debug("fail\n"); ++printf("fail\n"); + fail_cnt++; + } else { +- debug("pass\n"); ++printf("pass\n"); + pass_cnt++; + } + + if (++test_cnt == target_cnt) + finish = true; + } +- debug("statistics: pass/fail/total:%d/%d/%d\n", pass_cnt, fail_cnt, ++printf("statistics: pass/fail/total:%d/%d/%d\n", pass_cnt, fail_cnt, + target_cnt); + + return fail_cnt; +@@ -950,13 +950,13 @@ static int ast2600_sdrammc_probe(struct udevice *dev) + ret = uclass_get_device_by_driver(UCLASS_CLK, + DM_DRIVER_GET(aspeed_ast2600_scu), &clk_dev); + if (ret) { +- debug("clock device not defined\n"); ++printf("clock device not defined\n"); + return ret; + } + + priv->scu = devfdt_get_addr_ptr(clk_dev); + if (IS_ERR(priv->scu)) { +- debug("%s(): can't get SCU\n", __func__); ++printf("%s(): can't get SCU\n", __func__); + return PTR_ERR(priv->scu); + } + +@@ -1026,7 +1026,7 @@ static int ast2600_sdrammc_of_to_plat(struct udevice *dev) + priv->clock_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), + "clock-frequency", 0); + if (!priv->clock_rate) { +- debug("DDR Clock Rate not defined\n"); ++printf("DDR Clock Rate not defined\n"); + return -EINVAL; + } + +diff --git a/drivers/ram/imxrt_sdram.c b/drivers/ram/imxrt_sdram.c +index ca2eec767..9ec72fc4d 100644 +--- a/drivers/ram/imxrt_sdram.c ++++ b/drivers/ram/imxrt_sdram.c +@@ -376,13 +376,13 @@ static int imxrt_semc_of_to_plat(struct udevice *dev) + return -EINVAL; + } + +- debug("Found bank %s %u\n", bank_name, ++printf("Found bank %s %u\n", bank_name, + bank_params->target_bank); + bank++; + } + + params->no_sdram_banks = bank; +- debug("%s, no of banks = %d\n", __func__, params->no_sdram_banks); ++printf("%s, no of banks = %d\n", __func__, params->no_sdram_banks); + + return 0; + } +diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c +index 4ec12bf42..2cee532f4 100644 +--- a/drivers/ram/k3-am654-ddrss.c ++++ b/drivers/ram/k3-am654-ddrss.c +@@ -54,7 +54,7 @@ static inline u32 ddrss_readl(void __iomem *addr, unsigned int offset) + static inline void ddrss_writel(void __iomem *addr, unsigned int offset, + u32 data) + { +- debug("%s: addr = 0x%p, value = 0x%x\n", __func__, addr + offset, data); ++printf("%s: addr = 0x%p, value = 0x%x\n", __func__, addr + offset, data); + writel(data, addr + offset); + } + +@@ -114,7 +114,7 @@ static void am654_ddrss_ctrl_configuration(struct am654_ddrss_desc *ddrss) + struct ddrss_ddrctl_map_params *map = &ddrss->params.ctl_map; + u32 val; + +- debug("%s: DDR controller register configuration started\n", __func__); ++printf("%s: DDR controller register configuration started\n", __func__); + + ddrss_ctl_writel(DDRSS_DDRCTL_MSTR, reg->ddrctl_mstr); + ddrss_ctl_writel(DDRSS_DDRCTL_RFSHCTL0, reg->ddrctl_rfshctl0); +@@ -177,7 +177,7 @@ static void am654_ddrss_ctrl_configuration(struct am654_ddrss_desc *ddrss) + val |= 0x01; + ddrss_ctl_writel(DDRSS_DDRCTL_RFSHCTL3, val); + +- debug("%s: DDR controller configuration completed\n", __func__); ++printf("%s: DDR controller configuration completed\n", __func__); + } + + #define ddrss_phy_writel(off, val) \ +@@ -205,7 +205,7 @@ static void am654_ddrss_phy_configuration(struct am654_ddrss_desc *ddrss) + struct ddrss_ddrphy_cfg_params *cfg = &ddrss->params.phy_cfg; + struct ddrss_ddrphy_zq_params *zq = &ddrss->params.phy_zq; + +- debug("%s: DDR phy register configuration started\n", __func__); ++printf("%s: DDR phy register configuration started\n", __func__); + + ddrss_phy_writel(DDRSS_DDRPHY_PGCR0, cfg->ddrphy_pgcr0); + ddrss_phy_writel(DDRSS_DDRPHY_PGCR1, cfg->ddrphy_pgcr1); +@@ -301,7 +301,7 @@ static void am654_ddrss_phy_configuration(struct am654_ddrss_desc *ddrss) + ddrss_phy_writel(DDRSS_DDRPHY_DX8SL1DQSCTL, cfg->ddrphy_dx8sl1dqsctl); + ddrss_phy_writel(DDRSS_DDRPHY_DX8SL2DQSCTL, cfg->ddrphy_dx8sl2dqsctl); + +- debug("%s: DDR phy register configuration completed\n", __func__); ++printf("%s: DDR phy register configuration completed\n", __func__); + } + + static int __phy_builtin_init_routine(struct am654_ddrss_desc *ddrss, +@@ -321,7 +321,7 @@ static int __phy_builtin_init_routine(struct am654_ddrss_desc *ddrss, + sdelay(16); /* Delay at least 32 clock cycles */ + + ret = ddrss_phy_readl(DDRSS_DDRPHY_PGSR0); +- debug("%s: PGSR0 val = 0x%x\n", __func__, ret); ++printf("%s: PGSR0 val = 0x%x\n", __func__, ret); + if (ret & err_mask) + return -EINVAL; + +@@ -332,7 +332,7 @@ int write_leveling(struct am654_ddrss_desc *ddrss) + { + int ret; + +- debug("%s: Write leveling started\n", __func__); ++printf("%s: Write leveling started\n", __func__); + + ret = __phy_builtin_init_routine(ddrss, PIR_WL_MASK, PGSR0_WLDONE_MASK, + PGSR0_WLERR_MASK); +@@ -345,7 +345,7 @@ int write_leveling(struct am654_ddrss_desc *ddrss) + return ret; + } + +- debug("%s: Write leveling completed\n", __func__); ++printf("%s: Write leveling completed\n", __func__); + return 0; + } + +@@ -353,7 +353,7 @@ int read_dqs_training(struct am654_ddrss_desc *ddrss) + { + int ret; + +- debug("%s: Read DQS training started\n", __func__); ++printf("%s: Read DQS training started\n", __func__); + + ret = __phy_builtin_init_routine(ddrss, PIR_QSGATE_MASK, + PGSR0_QSGDONE_MASK, PGSR0_QSGERR_MASK); +@@ -366,7 +366,7 @@ int read_dqs_training(struct am654_ddrss_desc *ddrss) + return ret; + } + +- debug("%s: Read DQS training completed\n", __func__); ++printf("%s: Read DQS training completed\n", __func__); + return 0; + } + +@@ -374,7 +374,7 @@ int dqs2dq_training(struct am654_ddrss_desc *ddrss) + { + int ret; + +- debug("%s: DQS2DQ training started\n", __func__); ++printf("%s: DQS2DQ training started\n", __func__); + + ret = __phy_builtin_init_routine(ddrss, PIR_DQS2DQ_MASK, + PGSR0_DQS2DQDONE_MASK, +@@ -389,7 +389,7 @@ int dqs2dq_training(struct am654_ddrss_desc *ddrss) + return ret; + } + +- debug("%s: DQS2DQ training completed\n", __func__); ++printf("%s: DQS2DQ training completed\n", __func__); + return 0; + } + +@@ -397,7 +397,7 @@ int write_leveling_adjustment(struct am654_ddrss_desc *ddrss) + { + int ret; + +- debug("%s: Write Leveling adjustment\n", __func__); ++printf("%s: Write Leveling adjustment\n", __func__); + ret = __phy_builtin_init_routine(ddrss, PIR_WLADJ_MASK, + PGSR0_WLADONE_MASK, PGSR0_WLAERR_MASK); + if (ret) { +@@ -416,9 +416,9 @@ int rest_training(struct am654_ddrss_desc *ddrss) + { + int ret; + +- debug("%s: Rest of the training started\n", __func__); ++printf("%s: Rest of the training started\n", __func__); + +- debug("%s: Read Deskew adjustment\n", __func__); ++printf("%s: Read Deskew adjustment\n", __func__); + ret = __phy_builtin_init_routine(ddrss, PIR_RDDSKW_MASK, + PGSR0_RDDONE_MASK, PGSR0_RDERR_MASK); + if (ret) { +@@ -429,7 +429,7 @@ int rest_training(struct am654_ddrss_desc *ddrss) + return ret; + } + +- debug("%s: Write Deskew adjustment\n", __func__); ++printf("%s: Write Deskew adjustment\n", __func__); + ret = __phy_builtin_init_routine(ddrss, PIR_WRDSKW_MASK, + PGSR0_WDDONE_MASK, PGSR0_WDERR_MASK); + if (ret) { +@@ -440,7 +440,7 @@ int rest_training(struct am654_ddrss_desc *ddrss) + return ret; + } + +- debug("%s: Read Eye training\n", __func__); ++printf("%s: Read Eye training\n", __func__); + ret = __phy_builtin_init_routine(ddrss, PIR_RDEYE_MASK, + PGSR0_REDONE_MASK, PGSR0_REERR_MASK); + if (ret) { +@@ -453,7 +453,7 @@ int rest_training(struct am654_ddrss_desc *ddrss) + return ret; + } + +- debug("%s: Write Eye training\n", __func__); ++printf("%s: Write Eye training\n", __func__); + ret = __phy_builtin_init_routine(ddrss, PIR_WREYE_MASK, + PGSR0_WEDONE_MASK, PGSR0_WEERR_MASK); + if (ret) { +@@ -471,7 +471,7 @@ int rest_training(struct am654_ddrss_desc *ddrss) + int VREF_training(struct am654_ddrss_desc *ddrss) + { + int ret; +- debug("%s: VREF training\n", __func__); ++printf("%s: VREF training\n", __func__); + ret = __phy_builtin_init_routine(ddrss, PIR_VREF_MASK, PGSR0_VDONE_MASK, + PGSR0_VERR_MASK); + if (ret) { +@@ -610,7 +610,7 @@ int cleanup_training(struct am654_ddrss_desc *ddrss) + /* Do nothing */ + }; + +- debug("%s: Rest of the training completed\n", __func__); ++printf("%s: Rest of the training completed\n", __func__); + return 0; + } + +@@ -629,9 +629,9 @@ static int am654_ddrss_init(struct am654_ddrss_desc *ddrss) + u32 val; + struct ddrss_ss_reg_params *reg = &ddrss->params.ss_reg; + +- debug("Starting DDR initialization...\n"); ++printf("Starting DDR initialization...\n"); + +- debug("%s(ddrss=%p)\n", __func__, ddrss); ++printf("%s(ddrss=%p)\n", __func__, ddrss); + + ddrss_writel(ddrss->ddrss_ss_cfg, DDRSS_V2H_CTL_REG, + reg->ddrss_v2h_ctl_reg); +@@ -644,7 +644,7 @@ static int am654_ddrss_init(struct am654_ddrss_desc *ddrss) + + am654_ddrss_phy_configuration(ddrss); + +- debug("Starting DDR training...\n"); ++printf("Starting DDR training...\n"); + ret = __phy_builtin_init_routine(ddrss, PIR_PHY_INIT, 0x1, 0); + if (ret) { + dev_err(ddrss->dev, "PHY initialization failed %d\n", ret); +@@ -726,12 +726,12 @@ static int am654_ddrss_init(struct am654_ddrss_desc *ddrss) + if (ret) + return ret; + +- debug("LPDDR4 training complete\n"); ++printf("LPDDR4 training complete\n"); + break; + + case DDR_TYPE_DDR4: + +- debug("Starting DDR4 training\n"); ++printf("Starting DDR4 training\n"); + + ret = __phy_builtin_init_routine(ddrss, PIR_DRAM_INIT, + PGSR0_DRAM_INIT_MASK, 0); +@@ -767,12 +767,12 @@ static int am654_ddrss_init(struct am654_ddrss_desc *ddrss) + ret = VREF_training(ddrss); + if (ret) + return ret; +- debug("DDR4 training complete\n"); ++printf("DDR4 training complete\n"); + break; + + case DDR_TYPE_DDR3: + +- debug("Starting DDR3 training\n"); ++printf("Starting DDR3 training\n"); + + ret = __phy_builtin_init_routine(ddrss, PIR_DRAM_INIT, + PGSR0_DRAM_INIT_MASK, 0); +@@ -813,7 +813,7 @@ static int am654_ddrss_init(struct am654_ddrss_desc *ddrss) + if (ret) + return ret; + +- debug("DDR3 training complete\n"); ++printf("DDR3 training complete\n"); + break; + default: + printf("%s: ERROR: Unsupported DDR type\n", __func__); +@@ -832,7 +832,7 @@ static int am654_ddrss_init(struct am654_ddrss_desc *ddrss) + ddrss_phy_writel(DDRSS_DDRPHY_PGCR1, + ddrss_phy_readl(DDRSS_DDRPHY_PGCR1) & ~0x40); + +- debug("Completed DDR training\n"); ++printf("Completed DDR training\n"); + + return 0; + } +@@ -849,7 +849,7 @@ static int am654_ddrss_power_on(struct am654_ddrss_desc *ddrss) + { + int ret; + +- debug("%s(ddrss=%p)\n", __func__, ddrss); ++printf("%s(ddrss=%p)\n", __func__, ddrss); + + ret = clk_enable(&ddrss->ddrss_clk); + if (ret) { +@@ -876,7 +876,7 @@ static int am654_ddrss_power_on(struct am654_ddrss_desc *ddrss) + ret = regulator_set_value(ddrss->vtt_supply, 3300000); + if (ret) + return ret; +- debug("VTT regulator enabled\n"); ++printf("VTT regulator enabled\n"); + #endif + + return 0; +@@ -894,7 +894,7 @@ static int am654_ddrss_ofdata_to_priv(struct udevice *dev) + phys_addr_t reg; + int ret; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + ret = clk_get_by_index(dev, 0, &ddrss->ddrss_clk); + if (ret) { +@@ -1046,7 +1046,7 @@ static int am654_ddrss_probe(struct udevice *dev) + struct am654_ddrss_desc *ddrss = dev_get_priv(dev); + int ret; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + ret = am654_ddrss_ofdata_to_priv(dev); + if (ret) +diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c +index cb8edcbc1..96b1ec1ce 100644 +--- a/drivers/ram/k3-ddrss/k3-ddrss.c ++++ b/drivers/ram/k3-ddrss/k3-ddrss.c +@@ -117,7 +117,7 @@ static void k3_lpddr4_freq_update(void) + req_type = readl(ddrss->ddrss_ctrl_mmr + + CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS) & 0x03; + +- debug("%s: received freq change req: req type = %d, req no. = %d\n", ++printf("%s: received freq change req: req type = %d, req no. = %d\n", + __func__, req_type, counter); + + if (req_type == 1) +@@ -148,7 +148,7 @@ static void k3_lpddr4_ack_freq_upd_req(void) + { + u32 dram_class; + +- debug("--->>> LPDDR4 Initialization is in progress ... <<<---\n"); ++printf("--->>> LPDDR4 Initialization is in progress ... <<<---\n"); + + dram_class = k3_lpddr4_read_ddr_type(); + +@@ -203,7 +203,7 @@ static int k3_ddrss_power_on(struct k3_ddrss_desc *ddrss) + { + int ret; + +- debug("%s(ddrss=%p)\n", __func__, ddrss); ++printf("%s(ddrss=%p)\n", __func__, ddrss); + + ret = power_domain_on(&ddrss->ddrcfg_pwrdmn); + if (ret) { +@@ -238,7 +238,7 @@ static int k3_ddrss_ofdata_to_priv(struct udevice *dev) + phys_addr_t reg; + int ret; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + reg = dev_read_addr_name(dev, "cfg"); + if (reg == FDT_ADDR_T_NONE) { +@@ -301,7 +301,7 @@ void k3_lpddr4_probe(void) + printf("%s: FAIL\n", __func__); + hang(); + } else { +- debug("%s: PASS\n", __func__); ++printf("%s: PASS\n", __func__); + } + } + +@@ -327,7 +327,7 @@ void k3_lpddr4_init(void) + printf("%s: FAIL\n", __func__); + hang(); + } else { +- debug("%s: PASS\n", __func__); ++printf("%s: PASS\n", __func__); + } + } + +@@ -412,7 +412,7 @@ void k3_lpddr4_start(void) + printf("%s: Post start FAIL\n", __func__); + hang(); + } else { +- debug("%s: Post start PASS\n", __func__); ++printf("%s: Post start PASS\n", __func__); + } + } + +@@ -422,7 +422,7 @@ static int k3_ddrss_probe(struct udevice *dev) + + ddrss = dev_get_priv(dev); + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + ret = k3_ddrss_ofdata_to_priv(dev); + if (ret) +diff --git a/drivers/ram/mpc83xx_sdram.c b/drivers/ram/mpc83xx_sdram.c +index a53ff93a6..452c15b2b 100644 +--- a/drivers/ram/mpc83xx_sdram.c ++++ b/drivers/ram/mpc83xx_sdram.c +@@ -106,7 +106,7 @@ int dram_init(void) + /* Current assumption: There is only one RAM controller */ + ret = uclass_first_device_err(UCLASS_RAM, &ram_ctrl); + if (ret) { +- debug("%s: uclass_first_device_err failed: %d\n", ++printf("%s: uclass_first_device_err failed: %d\n", + __func__, ret); + return ret; + } +@@ -165,7 +165,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + case AUTO_PRECHARGE_DISABLE: + break; + default: +- debug("%s: auto_precharge value %d invalid.\n", ++printf("%s: auto_precharge value %d invalid.\n", + ofnode_get_name(node), auto_precharge); + return -EINVAL; + } +@@ -175,7 +175,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + case ODT_RD_ONLY_OTHER_DIMM: + if (!IS_ENABLED(CONFIG_ARCH_MPC8360) && + !IS_ENABLED(CONFIG_ARCH_MPC837X)) { +- debug("%s: odt_rd_cfg value %d invalid.\n", ++printf("%s: odt_rd_cfg value %d invalid.\n", + ofnode_get_name(node), odt_rd_cfg); + return -EINVAL; + } +@@ -187,7 +187,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + !IS_ENABLED(CONFIG_ARCH_MPC831X) && + !IS_ENABLED(CONFIG_ARCH_MPC8360) && + !IS_ENABLED(CONFIG_ARCH_MPC837X)) { +- debug("%s: odt_rd_cfg value %d invalid.\n", ++printf("%s: odt_rd_cfg value %d invalid.\n", + ofnode_get_name(node), odt_rd_cfg); + return -EINVAL; + } +@@ -196,7 +196,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + case ODT_RD_ALL: + break; + default: +- debug("%s: odt_rd_cfg value %d invalid.\n", ++printf("%s: odt_rd_cfg value %d invalid.\n", + ofnode_get_name(node), odt_rd_cfg); + return -EINVAL; + } +@@ -206,7 +206,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + case ODT_WR_ONLY_OTHER_DIMM: + if (!IS_ENABLED(CONFIG_ARCH_MPC8360) && + !IS_ENABLED(CONFIG_ARCH_MPC837X)) { +- debug("%s: odt_wr_cfg value %d invalid.\n", ++printf("%s: odt_wr_cfg value %d invalid.\n", + ofnode_get_name(node), odt_wr_cfg); + return -EINVAL; + } +@@ -218,7 +218,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + !IS_ENABLED(CONFIG_ARCH_MPC831X) && + !IS_ENABLED(CONFIG_ARCH_MPC8360) && + !IS_ENABLED(CONFIG_ARCH_MPC837X)) { +- debug("%s: odt_wr_cfg value %d invalid.\n", ++printf("%s: odt_wr_cfg value %d invalid.\n", + ofnode_get_name(node), odt_wr_cfg); + return -EINVAL; + } +@@ -227,7 +227,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + case ODT_WR_ALL: + break; + default: +- debug("%s: odt_wr_cfg value %d invalid.\n", ++printf("%s: odt_wr_cfg value %d invalid.\n", + ofnode_get_name(node), odt_wr_cfg); + return -EINVAL; + } +@@ -241,7 +241,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + bank_bits_mask = BANK_BITS_3; + break; + default: +- debug("%s: bank_bits value %d invalid.\n", ++printf("%s: bank_bits value %d invalid.\n", + ofnode_get_name(node), bank_bits); + return -EINVAL; + } +@@ -258,7 +258,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + row_bits_mask = ROW_BITS_14; + break; + default: +- debug("%s: row_bits value %d invalid.\n", ++printf("%s: row_bits value %d invalid.\n", + ofnode_get_name(node), row_bits); + return -EINVAL; + } +@@ -278,7 +278,7 @@ static int mpc83xx_sdram_static_init(ofnode node, u32 cs, u32 mapaddr, u32 size) + col_bits_mask = COL_BITS_11; + break; + default: +- debug("%s: col_bits value %d invalid.\n", ++printf("%s: col_bits value %d invalid.\n", + ofnode_get_name(node), col_bits); + return -EINVAL; + } +@@ -368,7 +368,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + + dso = dev_read_u32_default(dev, "driver_software_override", 0); + if (dso > 1) { +- debug("%s: driver_software_override value %d invalid.\n", ++printf("%s: driver_software_override value %d invalid.\n", + dev->name, dso); + return -EINVAL; + } +@@ -383,7 +383,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case DSO_P_IMPEDANCE_LOWER_Z: + break; + default: +- debug("%s: p_impedance_override value %d invalid.\n", ++printf("%s: p_impedance_override value %d invalid.\n", + dev->name, pz_override); + return -EINVAL; + } +@@ -398,35 +398,35 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case DSO_N_IMPEDANCE_LOWER_Z: + break; + default: +- debug("%s: n_impedance_override value %d invalid.\n", ++printf("%s: n_impedance_override value %d invalid.\n", + dev->name, nz_override); + return -EINVAL; + } + + odt_term = dev_read_u32_default(dev, "odt_termination_value", 0); + if (odt_term > 1) { +- debug("%s: odt_termination_value value %d invalid.\n", ++printf("%s: odt_termination_value value %d invalid.\n", + dev->name, odt_term); + return -EINVAL; + } + + ddr_type = dev_read_u32_default(dev, "ddr_type", 0); + if (ddr_type > 1) { +- debug("%s: ddr_type value %d invalid.\n", ++printf("%s: ddr_type value %d invalid.\n", + dev->name, ddr_type); + return -EINVAL; + } + + mvref_sel = dev_read_u32_default(dev, "mvref_sel", 0); + if (mvref_sel > 1) { +- debug("%s: mvref_sel value %d invalid.\n", ++printf("%s: mvref_sel value %d invalid.\n", + dev->name, mvref_sel); + return -EINVAL; + } + + m_odr = dev_read_u32_default(dev, "m_odr", 0); + if (mvref_sel > 1) { +- debug("%s: m_odr value %d invalid.\n", ++printf("%s: m_odr value %d invalid.\n", + dev->name, m_odr); + return -EINVAL; + } +@@ -454,7 +454,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + size = val[2]; + + if (cs > 1) { +- debug("%s: chip select value %d invalid.\n", ++printf("%s: chip select value %d invalid.\n", + dev->name, cs); + return -EINVAL; + } +@@ -467,7 +467,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + ret = mpc83xx_sdram_static_init(subnode, cs, addr, + size); + if (ret) { +- debug("%s: RAM init failed.\n", dev->name); ++printf("%s: RAM init failed.\n", dev->name); + return ret; + } + }; +@@ -485,7 +485,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case CLOCK_ADJUST_1: + break; + default: +- debug("%s: clock_adjust value %d invalid.\n", ++printf("%s: clock_adjust value %d invalid.\n", + dev->name, clock_adjust); + return -EINVAL; + } +@@ -520,7 +520,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + ext_refresh_rec_mask = 7 << TIMING_CFG3_EXT_REFREC_SHIFT; + break; + default: +- debug("%s: ext_refresh_rec value %d invalid.\n", ++printf("%s: ext_refresh_rec value %d invalid.\n", + dev->name, ext_refresh_rec); + return -EINVAL; + } +@@ -530,28 +530,28 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + + read_to_write = dev_read_u32_default(dev, "read_to_write", 0); + if (read_to_write > 3) { +- debug("%s: read_to_write value %d invalid.\n", ++printf("%s: read_to_write value %d invalid.\n", + dev->name, read_to_write); + return -EINVAL; + } + + write_to_read = dev_read_u32_default(dev, "write_to_read", 0); + if (write_to_read > 3) { +- debug("%s: write_to_read value %d invalid.\n", ++printf("%s: write_to_read value %d invalid.\n", + dev->name, write_to_read); + return -EINVAL; + } + + read_to_read = dev_read_u32_default(dev, "read_to_read", 0); + if (read_to_read > 3) { +- debug("%s: read_to_read value %d invalid.\n", ++printf("%s: read_to_read value %d invalid.\n", + dev->name, read_to_read); + return -EINVAL; + } + + write_to_write = dev_read_u32_default(dev, "write_to_write", 0); + if (write_to_write > 3) { +- debug("%s: write_to_write value %d invalid.\n", ++printf("%s: write_to_write value %d invalid.\n", + dev->name, write_to_write); + return -EINVAL; + } +@@ -559,7 +559,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + active_powerdown_exit = + dev_read_u32_default(dev, "active_powerdown_exit", 0); + if (active_powerdown_exit > 7) { +- debug("%s: active_powerdown_exit value %d invalid.\n", ++printf("%s: active_powerdown_exit value %d invalid.\n", + dev->name, active_powerdown_exit); + return -EINVAL; + } +@@ -567,21 +567,21 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + precharge_powerdown_exit = + dev_read_u32_default(dev, "precharge_powerdown_exit", 0); + if (precharge_powerdown_exit > 7) { +- debug("%s: precharge_powerdown_exit value %d invalid.\n", ++printf("%s: precharge_powerdown_exit value %d invalid.\n", + dev->name, precharge_powerdown_exit); + return -EINVAL; + } + + odt_powerdown_exit = dev_read_u32_default(dev, "odt_powerdown_exit", 0); + if (odt_powerdown_exit > 15) { +- debug("%s: odt_powerdown_exit value %d invalid.\n", ++printf("%s: odt_powerdown_exit value %d invalid.\n", + dev->name, odt_powerdown_exit); + return -EINVAL; + } + + mode_reg_set_cycle = dev_read_u32_default(dev, "mode_reg_set_cycle", 0); + if (mode_reg_set_cycle > 15) { +- debug("%s: mode_reg_set_cycle value %d invalid.\n", ++printf("%s: mode_reg_set_cycle value %d invalid.\n", + dev->name, mode_reg_set_cycle); + return -EINVAL; + } +@@ -600,7 +600,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + precharge_to_activate = + dev_read_u32_default(dev, "precharge_to_activate", 0); + if (precharge_to_activate > 7 || precharge_to_activate == 0) { +- debug("%s: precharge_to_activate value %d invalid.\n", ++printf("%s: precharge_to_activate value %d invalid.\n", + dev->name, precharge_to_activate); + return -EINVAL; + } +@@ -608,7 +608,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + activate_to_precharge = + dev_read_u32_default(dev, "activate_to_precharge", 0); + if (activate_to_precharge > 19) { +- debug("%s: activate_to_precharge value %d invalid.\n", ++printf("%s: activate_to_precharge value %d invalid.\n", + dev->name, activate_to_precharge); + return -EINVAL; + } +@@ -616,7 +616,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + activate_to_readwrite = + dev_read_u32_default(dev, "activate_to_readwrite", 0); + if (activate_to_readwrite > 7 || activate_to_readwrite == 0) { +- debug("%s: activate_to_readwrite value %d invalid.\n", ++printf("%s: activate_to_readwrite value %d invalid.\n", + dev->name, activate_to_readwrite); + return -EINVAL; + } +@@ -626,7 +626,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case CASLAT_20: + case CASLAT_25: + if (!IS_ENABLED(CONFIG_ARCH_MPC8308)) { +- debug("%s: MCAS latency < 3.0 unsupported on MPC8308\n", ++printf("%s: MCAS latency < 3.0 unsupported on MPC8308\n", + dev->name); + return -EINVAL; + } +@@ -644,14 +644,14 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case CASLAT_80: + break; + default: +- debug("%s: mcas_latency value %d invalid.\n", ++printf("%s: mcas_latency value %d invalid.\n", + dev->name, mcas_latency); + return -EINVAL; + } + + refresh_recovery = dev_read_u32_default(dev, "refresh_recovery", 0); + if (refresh_recovery > 23 || refresh_recovery < 8) { +- debug("%s: refresh_recovery value %d invalid.\n", ++printf("%s: refresh_recovery value %d invalid.\n", + dev->name, refresh_recovery); + return -EINVAL; + } +@@ -659,7 +659,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + last_data_to_precharge = + dev_read_u32_default(dev, "last_data_to_precharge", 0); + if (last_data_to_precharge > 7 || last_data_to_precharge == 0) { +- debug("%s: last_data_to_precharge value %d invalid.\n", ++printf("%s: last_data_to_precharge value %d invalid.\n", + dev->name, last_data_to_precharge); + return -EINVAL; + } +@@ -667,7 +667,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + activate_to_activate = + dev_read_u32_default(dev, "activate_to_activate", 0); + if (activate_to_activate > 7 || activate_to_activate == 0) { +- debug("%s: activate_to_activate value %d invalid.\n", ++printf("%s: activate_to_activate value %d invalid.\n", + dev->name, activate_to_activate); + return -EINVAL; + } +@@ -675,7 +675,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + last_write_data_to_read = + dev_read_u32_default(dev, "last_write_data_to_read", 0); + if (last_write_data_to_read > 7 || last_write_data_to_read == 0) { +- debug("%s: last_write_data_to_read value %d invalid.\n", ++printf("%s: last_write_data_to_read value %d invalid.\n", + dev->name, last_write_data_to_read); + return -EINVAL; + } +@@ -696,7 +696,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + + additive_latency = dev_read_u32_default(dev, "additive_latency", 0); + if (additive_latency > 5) { +- debug("%s: additive_latency value %d invalid.\n", ++printf("%s: additive_latency value %d invalid.\n", + dev->name, additive_latency); + return -EINVAL; + } +@@ -726,21 +726,21 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case READ_LAT_PLUS_19_4: + break; + default: +- debug("%s: mcas_to_preamble_override value %d invalid.\n", ++printf("%s: mcas_to_preamble_override value %d invalid.\n", + dev->name, mcas_to_preamble_override); + return -EINVAL; + } + + write_latency = dev_read_u32_default(dev, "write_latency", 0); + if (write_latency > 7 || write_latency == 0) { +- debug("%s: write_latency value %d invalid.\n", ++printf("%s: write_latency value %d invalid.\n", + dev->name, write_latency); + return -EINVAL; + } + + read_to_precharge = dev_read_u32_default(dev, "read_to_precharge", 0); + if (read_to_precharge > 4 || read_to_precharge == 0) { +- debug("%s: read_to_precharge value %d invalid.\n", ++printf("%s: read_to_precharge value %d invalid.\n", + dev->name, read_to_precharge); + return -EINVAL; + } +@@ -757,7 +757,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case CLOCK_DELAY_3_2: + break; + default: +- debug("%s: write_cmd_to_write_data value %d invalid.\n", ++printf("%s: write_cmd_to_write_data value %d invalid.\n", + dev->name, write_cmd_to_write_data); + return -EINVAL; + } +@@ -765,7 +765,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + minimum_cke_pulse_width = + dev_read_u32_default(dev, "minimum_cke_pulse_width", 0); + if (minimum_cke_pulse_width > 4 || minimum_cke_pulse_width == 0) { +- debug("%s: minimum_cke_pulse_width value %d invalid.\n", ++printf("%s: minimum_cke_pulse_width value %d invalid.\n", + dev->name, minimum_cke_pulse_width); + return -EINVAL; + } +@@ -773,7 +773,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + four_activates_window = + dev_read_u32_default(dev, "four_activates_window", 0); + if (four_activates_window > 20 || four_activates_window == 0) { +- debug("%s: four_activates_window value %d invalid.\n", ++printf("%s: four_activates_window value %d invalid.\n", + dev->name, four_activates_window); + return -EINVAL; + } +@@ -794,7 +794,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case SREN_ENABLE: + break; + default: +- debug("%s: self_refresh value %d invalid.\n", ++printf("%s: self_refresh value %d invalid.\n", + dev->name, self_refresh); + return -EINVAL; + } +@@ -805,7 +805,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case ECC_ENABLE: + break; + default: +- debug("%s: ecc value %d invalid.\n", dev->name, ecc); ++printf("%s: ecc value %d invalid.\n", dev->name, ecc); + return -EINVAL; + } + +@@ -815,7 +815,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case RD_ENABLE: + break; + default: +- debug("%s: registered_dram value %d invalid.\n", ++printf("%s: registered_dram value %d invalid.\n", + dev->name, registered_dram); + return -EINVAL; + } +@@ -826,7 +826,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case TYPE_DDR2: + break; + default: +- debug("%s: sdram_type value %d invalid.\n", ++printf("%s: sdram_type value %d invalid.\n", + dev->name, sdram_type); + return -EINVAL; + } +@@ -838,7 +838,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case DYN_PWR_ENABLE: + break; + default: +- debug("%s: dynamic_power_management value %d invalid.\n", ++printf("%s: dynamic_power_management value %d invalid.\n", + dev->name, dynamic_power_management); + return -EINVAL; + } +@@ -849,7 +849,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case DATA_BUS_WIDTH_32: + break; + default: +- debug("%s: databus_width value %d invalid.\n", ++printf("%s: databus_width value %d invalid.\n", + dev->name, databus_width); + return -EINVAL; + } +@@ -860,7 +860,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case NCAP_ENABLE: + break; + default: +- debug("%s: nc_auto_precharge value %d invalid.\n", ++printf("%s: nc_auto_precharge value %d invalid.\n", + dev->name, nc_auto_precharge); + return -EINVAL; + } +@@ -871,7 +871,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case TIMING_2T: + break; + default: +- debug("%s: timing_2t value %d invalid.\n", ++printf("%s: timing_2t value %d invalid.\n", + dev->name, timing_2t); + return -EINVAL; + } +@@ -883,7 +883,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case INTERLEAVE_1_AND_2: + break; + default: +- debug("%s: bank_interleaving_ctrl value %d invalid.\n", ++printf("%s: bank_interleaving_ctrl value %d invalid.\n", + dev->name, bank_interleaving_ctrl); + return -EINVAL; + } +@@ -894,7 +894,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case PRECHARGE_MA_8: + break; + default: +- debug("%s: precharge_bit_8 value %d invalid.\n", ++printf("%s: precharge_bit_8 value %d invalid.\n", + dev->name, precharge_bit_8); + return -EINVAL; + } +@@ -905,7 +905,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case STRENGTH_HALF: + break; + default: +- debug("%s: half_strength value %d invalid.\n", ++printf("%s: half_strength value %d invalid.\n", + dev->name, half_strength); + return -EINVAL; + } +@@ -917,7 +917,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case INITIALIZATION_BYPASS: + break; + default: +- debug("%s: bypass_initialization value %d invalid.\n", ++printf("%s: bypass_initialization value %d invalid.\n", + dev->name, bypass_initialization); + return -EINVAL; + } +@@ -943,7 +943,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case MODE_REFRESH: + break; + default: +- debug("%s: force_self_refresh value %d invalid.\n", ++printf("%s: force_self_refresh value %d invalid.\n", + dev->name, force_self_refresh); + return -EINVAL; + } +@@ -954,7 +954,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case DLL_RESET_DISABLE: + break; + default: +- debug("%s: dll_reset value %d invalid.\n", ++printf("%s: dll_reset value %d invalid.\n", + dev->name, dll_reset); + return -EINVAL; + } +@@ -964,7 +964,7 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case DQS_TRUE: + break; + default: +- debug("%s: dqs_config value %d invalid.\n", ++printf("%s: dqs_config value %d invalid.\n", + dev->name, dqs_config); + return -EINVAL; + } +@@ -977,14 +977,14 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + case ODT_ASSERT_ALWAYS: + break; + default: +- debug("%s: odt_config value %d invalid.\n", ++printf("%s: odt_config value %d invalid.\n", + dev->name, odt_config); + return -EINVAL; + } + + posted_refreshes = dev_read_u32_default(dev, "posted_refreshes", 0); + if (posted_refreshes > 8 || posted_refreshes == 0) { +- debug("%s: posted_refreshes value %d invalid.\n", ++printf("%s: posted_refreshes value %d invalid.\n", + dev->name, posted_refreshes); + return -EINVAL; + } +@@ -999,14 +999,14 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + + sdmode = dev_read_u32_default(dev, "sdmode", 0); + if (sdmode > 0xFFFF) { +- debug("%s: sdmode value %d invalid.\n", ++printf("%s: sdmode value %d invalid.\n", + dev->name, sdmode); + return -EINVAL; + } + + esdmode = dev_read_u32_default(dev, "esdmode", 0); + if (esdmode > 0xFFFF) { +- debug("%s: esdmode value %d invalid.\n", dev->name, esdmode); ++printf("%s: esdmode value %d invalid.\n", dev->name, esdmode); + return -EINVAL; + } + +@@ -1017,13 +1017,13 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + + esdmode2 = dev_read_u32_default(dev, "esdmode2", 0); + if (esdmode2 > 0xFFFF) { +- debug("%s: esdmode2 value %d invalid.\n", dev->name, esdmode2); ++printf("%s: esdmode2 value %d invalid.\n", dev->name, esdmode2); + return -EINVAL; + } + + esdmode3 = dev_read_u32_default(dev, "esdmode3", 0); + if (esdmode3 > 0xFFFF) { +- debug("%s: esdmode3 value %d invalid.\n", dev->name, esdmode3); ++printf("%s: esdmode3 value %d invalid.\n", dev->name, esdmode3); + return -EINVAL; + } + +@@ -1034,14 +1034,14 @@ static int mpc83xx_sdram_probe(struct udevice *dev) + + refresh_interval = dev_read_u32_default(dev, "refresh_interval", 0); + if (refresh_interval > 0xFFFF) { +- debug("%s: refresh_interval value %d invalid.\n", ++printf("%s: refresh_interval value %d invalid.\n", + dev->name, refresh_interval); + return -EINVAL; + } + + precharge_interval = dev_read_u32_default(dev, "precharge_interval", 0); + if (precharge_interval > 0x3FFF) { +- debug("%s: precharge_interval value %d invalid.\n", ++printf("%s: precharge_interval value %d invalid.\n", + dev->name, precharge_interval); + return -EINVAL; + } +diff --git a/drivers/ram/octeon/dimm_spd_eeprom.c b/drivers/ram/octeon/dimm_spd_eeprom.c +index 30db54804..d1709ae23 100644 +--- a/drivers/ram/octeon/dimm_spd_eeprom.c ++++ b/drivers/ram/octeon/dimm_spd_eeprom.c +@@ -111,7 +111,7 @@ static int validate_spd_checksum(struct ddr_priv *priv, + int silent, u8 rv) + { + if (ddr_verbose(priv)) +- debug("Validating DIMM at address 0x%x\n", twsi_addr); ++printf("Validating DIMM at address 0x%x\n", twsi_addr); + + if (rv >= 0x8 && rv <= 0xA) + printf("%s: Error: DDR2 support disabled\n", __func__); +@@ -173,7 +173,7 @@ int read_spd_init(struct dimm_config *dimm_config, int dimm_index) + + ret = i2c_get_chip_for_busnum(busno, cmdno, 2, &dev_i2c); + if (ret) { +- debug("Cannot find SPL EEPROM: %d\n", ret); ++printf("Cannot find SPL EEPROM: %d\n", ret); + return -ENODEV; + } + +@@ -190,7 +190,7 @@ int validate_dimm(struct ddr_priv *priv, struct dimm_config *dimm_config, + dimm_index = !!dimm_index; /* Normalize to 0/1 */ + spd_addr = dimm_config->spd_addrs[dimm_index]; + +- debug("Validating dimm %d, spd addr: 0x%02x spd ptr: %p\n", ++printf("Validating dimm %d, spd addr: 0x%02x spd ptr: %p\n", + dimm_index, + dimm_config->spd_addrs[dimm_index], + dimm_config->spd_ptrs[dimm_index]); +@@ -266,7 +266,7 @@ int validate_dimm(struct ddr_priv *priv, struct dimm_config *dimm_config, + return 0; + + default: +- debug("Unknown DIMM type 0x%x for DIMM %d @ 0x%x\n", ++printf("Unknown DIMM type 0x%x for DIMM %d @ 0x%x\n", + dimm_type, dimm_index, + dimm_config->spd_addrs[dimm_index]); + return 0; /* Failed to read dimm */ +@@ -282,7 +282,7 @@ int get_ddr_type(struct dimm_config *dimm_config, int upper_dimm) + + spd_ddr_type = read_spd(dimm_config, upper_dimm, DEVICE_TYPE); + +- debug("%s:%d spd_ddr_type=0x%02x\n", __func__, __LINE__, ++printf("%s:%d spd_ddr_type=0x%02x\n", __func__, __LINE__, + spd_ddr_type); + + /* we return only DDR4 or DDR3 */ +diff --git a/drivers/ram/octeon/octeon3_lmc.c b/drivers/ram/octeon/octeon3_lmc.c +index 349abc179..aa2a6aae2 100644 +--- a/drivers/ram/octeon/octeon3_lmc.c ++++ b/drivers/ram/octeon/octeon3_lmc.c +@@ -92,7 +92,7 @@ static void cn7xxx_lmc_ddr3_reset(struct ddr_priv *priv, int if_num, int reset) + * delay between DDRn_RESET_L deassertion and DDRn_DIMM*_CKE* + * assertion. + */ +- debug("LMC%d %s DDR_RESET_L\n", if_num, ++printf("LMC%d %s DDR_RESET_L\n", if_num, + (reset == + LMC_DDR3_RESET_DEASSERT) ? "De-asserting" : "Asserting"); + +@@ -235,7 +235,7 @@ void oct3_ddr3_seq(struct ddr_priv *priv, int rank_mask, int if_num, + rank_mask, sequence, sequence_str[sequence]); + + if (seq_ctl.s.seq_sel == 3) +- debug("LMC%d: Exiting Self-refresh Rank_mask:%x\n", if_num, ++printf("LMC%d: Exiting Self-refresh Rank_mask:%x\n", if_num, + rank_mask); + + lmc_wr(priv, CVMX_LMCX_SEQ_CTL(if_num), seq_ctl.u64); +@@ -311,7 +311,7 @@ static int test_dram_byte64(struct ddr_priv *priv, int lmc, u64 p, + #define I_INC BIT_ULL(3) + #define I_MAX BIT_ULL(7) + +- debug("N%d.LMC%d: %s: phys_addr=0x%llx/0x%llx (0x%llx)\n", ++printf("N%d.LMC%d: %s: phys_addr=0x%llx/0x%llx (0x%llx)\n", + node, lmc, __func__, p, p + p2offset, 1ULL << kbitno); + + // loops are ordered so that only a single 64-bit slot is written to +@@ -342,7 +342,7 @@ static int test_dram_byte64(struct ddr_priv *priv, int lmc, u64 p, + + CVMX_DCACHE_INVALIDATE; + +- debug("N%d.LMC%d: dram_tuning_mem_xor: done INIT loop\n", node, lmc); ++printf("N%d.LMC%d: dram_tuning_mem_xor: done INIT loop\n", node, lmc); + + /* Make a series of passes over the memory areas. */ + +@@ -384,7 +384,7 @@ static int test_dram_byte64(struct ddr_priv *priv, int lmc, u64 p, + + CVMX_DCACHE_INVALIDATE; + +- debug("N%d.LMC%d: dram_tuning_mem_xor: done MODIFY loop\n", ++printf("N%d.LMC%d: dram_tuning_mem_xor: done MODIFY loop\n", + node, lmc); + + /* +@@ -435,7 +435,7 @@ static int test_dram_byte64(struct ddr_priv *priv, int lmc, u64 p, + bad_bits[0] |= xor; + + while (xor != 0) { +- debug("ERROR(%03d): [0x%016llX] [0x%016llX] expected 0x%016llX d1 %016llX d2 %016llX\n", ++printf("ERROR(%03d): [0x%016llX] [0x%016llX] expected 0x%016llX d1 %016llX d2 %016llX\n", + burst, p1, p2, v, + d1, d2); + // error(s) in this lane +@@ -473,7 +473,7 @@ static int test_dram_byte64(struct ddr_priv *priv, int lmc, u64 p, + } + } + +- debug("N%d.LMC%d: dram_tuning_mem_xor: done TEST loop\n", ++printf("N%d.LMC%d: dram_tuning_mem_xor: done TEST loop\n", + node, lmc); + } + +@@ -515,7 +515,7 @@ static void set_mpr_mode(struct ddr_priv *priv, int rank_mask, + { + int rankx; + +- debug("All Ranks: Set mpr mode = %x %c-side\n", ++printf("All Ranks: Set mpr mode = %x %c-side\n", + mpr, (bg1 == 0) ? 'A' : 'B'); + + for (rankx = 0; rankx < dimm_count * 4; rankx++) { +@@ -548,15 +548,15 @@ static void do_ddr4_mpr_read(struct ddr_priv *priv, int if_num, + /* MPR register access sequence */ + oct3_ddr3_seq(priv, 1 << rank, if_num, 0x9); + +- debug("LMC_MR_MPR_CTL : 0x%016llx\n", ++printf("LMC_MR_MPR_CTL : 0x%016llx\n", + lmc_mr_mpr_ctl.u64); +- debug("lmc_mr_mpr_ctl.cn70xx.mr_wr_addr: 0x%02x\n", ++printf("lmc_mr_mpr_ctl.cn70xx.mr_wr_addr: 0x%02x\n", + lmc_mr_mpr_ctl.cn70xx.mr_wr_addr); +- debug("lmc_mr_mpr_ctl.cn70xx.mr_wr_sel : 0x%02x\n", ++printf("lmc_mr_mpr_ctl.cn70xx.mr_wr_sel : 0x%02x\n", + lmc_mr_mpr_ctl.cn70xx.mr_wr_sel); +- debug("lmc_mr_mpr_ctl.cn70xx.mpr_loc : 0x%02x\n", ++printf("lmc_mr_mpr_ctl.cn70xx.mpr_loc : 0x%02x\n", + lmc_mr_mpr_ctl.cn70xx.mpr_loc); +- debug("lmc_mr_mpr_ctl.cn70xx.mpr_wr : 0x%02x\n", ++printf("lmc_mr_mpr_ctl.cn70xx.mpr_wr : 0x%02x\n", + lmc_mr_mpr_ctl.cn70xx.mpr_wr); + } + +@@ -568,7 +568,7 @@ static int set_rdimm_mode(struct ddr_priv *priv, int if_num, int enable) + lmc_control.u64 = lmc_rd(priv, CVMX_LMCX_CONTROL(if_num)); + save_rdimm_mode = lmc_control.s.rdimm_ena; + lmc_control.s.rdimm_ena = enable; +- debug("Setting RDIMM_ENA = %x\n", enable); ++printf("Setting RDIMM_ENA = %x\n", enable); + lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), lmc_control.u64); + + return save_rdimm_mode; +@@ -593,14 +593,14 @@ static void display_mpr_page(struct ddr_priv *priv, int rank_mask, + if (!(rank_mask & (1 << rankx))) + continue; + +- debug("N0.LMC%d.R%d: MPR Page %d loc [0:3]: ", ++printf("N0.LMC%d.R%d: MPR Page %d loc [0:3]: ", + if_num, rankx, page); + for (location = 0; location < 4; location++) { + ddr4_mpr_read(priv, if_num, rankx, page, location, + mpr_data); +- debug("0x%02llx ", mpr_data[0] & 0xFF); ++printf("0x%02llx ", mpr_data[0] & 0xFF); + } +- debug("\n"); ++printf("\n"); + + } /* for (rankx = 0; rankx < 4; rankx++) */ + } +@@ -621,15 +621,15 @@ static void ddr4_mpr_write(struct ddr_priv *priv, int if_num, int rank, + /* MPR register access sequence */ + oct3_ddr3_seq(priv, 1 << rank, if_num, 0x9); + +- debug("LMC_MR_MPR_CTL : 0x%016llx\n", ++printf("LMC_MR_MPR_CTL : 0x%016llx\n", + lmc_mr_mpr_ctl.u64); +- debug("lmc_mr_mpr_ctl.cn70xx.mr_wr_addr: 0x%02x\n", ++printf("lmc_mr_mpr_ctl.cn70xx.mr_wr_addr: 0x%02x\n", + lmc_mr_mpr_ctl.cn70xx.mr_wr_addr); +- debug("lmc_mr_mpr_ctl.cn70xx.mr_wr_sel : 0x%02x\n", ++printf("lmc_mr_mpr_ctl.cn70xx.mr_wr_sel : 0x%02x\n", + lmc_mr_mpr_ctl.cn70xx.mr_wr_sel); +- debug("lmc_mr_mpr_ctl.cn70xx.mpr_loc : 0x%02x\n", ++printf("lmc_mr_mpr_ctl.cn70xx.mpr_loc : 0x%02x\n", + lmc_mr_mpr_ctl.cn70xx.mpr_loc); +- debug("lmc_mr_mpr_ctl.cn70xx.mpr_wr : 0x%02x\n", ++printf("lmc_mr_mpr_ctl.cn70xx.mpr_wr : 0x%02x\n", + lmc_mr_mpr_ctl.cn70xx.mpr_wr); + } + +@@ -682,7 +682,7 @@ static void set_dram_output_inversion(struct ddr_priv *priv, int if_num, + lmc_ddr4_dimm_ctl.u64 = 0; + lmc_wr(priv, CVMX_LMCX_DDR4_DIMM_CTL(if_num), lmc_ddr4_dimm_ctl.u64); + +- debug("All DIMMs: Register Control Word RC0 : %x\n", ++printf("All DIMMs: Register Control Word RC0 : %x\n", + (inversion & 1)); + + for (dimm_no = 0; dimm_no < dimm_count; ++dimm_no) { +@@ -701,7 +701,7 @@ static void set_dram_output_inversion(struct ddr_priv *priv, int if_num, + lmc_dimm_ctl.s.dimm0_wmask = 0x1; + lmc_dimm_ctl.s.dimm1_wmask = (dimm_count > 1) ? 0x0001 : 0x0000; + +- debug("LMC DIMM_CTL : 0x%016llx\n", ++printf("LMC DIMM_CTL : 0x%016llx\n", + lmc_dimm_ctl.u64); + lmc_wr(priv, CVMX_LMCX_DIMM_CTL(if_num), lmc_dimm_ctl.u64); + +@@ -767,7 +767,7 @@ static void change_rdimm_mpr_pattern(struct ddr_priv *priv, int rank_mask, + + /* 1) Disable refresh (REF_ZQCS_INT = 0) */ + +- debug("1) Disable refresh (REF_ZQCS_INT = 0)\n"); ++printf("1) Disable refresh (REF_ZQCS_INT = 0)\n"); + + lmc_config.u64 = lmc_rd(priv, CVMX_LMCX_CONFIG(if_num)); + save_ref_zqcs_int = lmc_config.cn78xx.ref_zqcs_int; +@@ -781,7 +781,7 @@ static void change_rdimm_mpr_pattern(struct ddr_priv *priv, int rank_mask, + * MR_MPR_CTL[MR_WR_USE_DEFAULT_VALUE]=1) + */ + +- debug("2) Put all devices in MPR mode (Run MRW sequence (sequence=8)\n"); ++printf("2) Put all devices in MPR mode (Run MRW sequence (sequence=8)\n"); + + /* A-side */ + set_mpr_mode(priv, rank_mask, if_num, dimm_count, 1, 0); +@@ -799,7 +799,7 @@ static void change_rdimm_mpr_pattern(struct ddr_priv *priv, int rank_mask, + * work if inversion disabled + */ + +- debug("3) Disable RCD Parity\n"); ++printf("3) Disable RCD Parity\n"); + + /* + * 4) Disable Inversion in the RCD. +@@ -809,7 +809,7 @@ static void change_rdimm_mpr_pattern(struct ddr_priv *priv, int rank_mask, + * MR_MPR_CTL[MR_WR_ADDR][7:4]=RCD reg + */ + +- debug("4) Disable Inversion in the RCD.\n"); ++printf("4) Disable Inversion in the RCD.\n"); + + set_dram_output_inversion(priv, if_num, dimm_count, rank_mask, 1); + +@@ -818,7 +818,7 @@ static void change_rdimm_mpr_pattern(struct ddr_priv *priv, int rank_mask, + * non-inverted. + */ + +- debug("5) Disable CONTROL[RDIMM_ENA]\n"); ++printf("5) Disable CONTROL[RDIMM_ENA]\n"); + + set_rdimm_mode(priv, if_num, 0); + +@@ -829,25 +829,25 @@ static void change_rdimm_mpr_pattern(struct ddr_priv *priv, int rank_mask, + * MR_MPR_CTL.MR_WR_SEL=0, MR_MPR_CTL.MR_WR_ADDR[7:0]=pattern + */ + +- debug("6) Write all 4 MPR page 0 Training Patterns\n"); ++printf("6) Write all 4 MPR page 0 Training Patterns\n"); + + write_mpr_page0_pattern(priv, rank_mask, if_num, dimm_count, 0x55, 0x8); + + /* 7) Re-enable RDIMM_ENA */ + +- debug("7) Re-enable RDIMM_ENA\n"); ++printf("7) Re-enable RDIMM_ENA\n"); + + set_rdimm_mode(priv, if_num, 1); + + /* 8) Re-enable RDIMM inversion */ + +- debug("8) Re-enable RDIMM inversion\n"); ++printf("8) Re-enable RDIMM inversion\n"); + + set_dram_output_inversion(priv, if_num, dimm_count, rank_mask, 0); + + /* 9) Re-enable RDIMM parity (if desired) */ + +- debug("9) Re-enable RDIMM parity (if desired)\n"); ++printf("9) Re-enable RDIMM parity (if desired)\n"); + + /* + * 10)Take B-side devices out of MPR mode (Run MRW sequence +@@ -856,7 +856,7 @@ static void change_rdimm_mpr_pattern(struct ddr_priv *priv, int rank_mask, + * MR_MPR_CTL[MR_WR_USE_DEFAULT_VALUE]=1) + */ + +- debug("10)Take B-side devices out of MPR mode\n"); ++printf("10)Take B-side devices out of MPR mode\n"); + + set_mpr_mode(priv, rank_mask, if_num, dimm_count, + /* mpr */ 0, /* bg1 */ 1); +@@ -868,7 +868,7 @@ static void change_rdimm_mpr_pattern(struct ddr_priv *priv, int rank_mask, + + /* 11)Re-enable refresh (REF_ZQCS_INT=previous value) */ + +- debug("11)Re-enable refresh (REF_ZQCS_INT=previous value)\n"); ++printf("11)Re-enable refresh (REF_ZQCS_INT=previous value)\n"); + + lmc_config.u64 = lmc_rd(priv, CVMX_LMCX_CONFIG(if_num)); + lmc_config.cn78xx.ref_zqcs_int = save_ref_zqcs_int; +@@ -1021,16 +1021,16 @@ static void display_deskew_settings(struct ddr_priv *priv, int if_num, + byte_limit = ((lmc_config.s.mode32b) ? 4 : 8) + lmc_config.s.ecc_ena; + + if (print_enable) { +- debug("N0.LMC%d: Deskew Data: Bit => :", ++printf("N0.LMC%d: Deskew Data: Bit => :", + if_num); + for (bit_num = 7; bit_num >= 0; --bit_num) +- debug(" %3d ", bit_num); +- debug("\n"); ++printf(" %3d ", bit_num); ++printf("\n"); + } + + for (byte_lane = 0; byte_lane < byte_limit; byte_lane++) { + if (print_enable) +- debug("N0.LMC%d: Bit Deskew Byte %d %s :", ++printf("N0.LMC%d: Bit Deskew Byte %d %s :", + if_num, byte_lane, + (print_enable >= 3) ? "FINAL" : " "); + +@@ -1039,12 +1039,12 @@ static void display_deskew_settings(struct ddr_priv *priv, int if_num, + deskew = dskdat->bytes[byte_lane].bits[bit_num] >> 3; + + if (print_enable) +- debug(" %3d %c", deskew, fc[flags ^ 1]); ++printf(" %3d %c", deskew, fc[flags ^ 1]); + + } /* for (bit_num = 7; bit_num >= 0; --bit_num) */ + + if (print_enable) +- debug("\n"); ++printf("\n"); + } + } + +@@ -1174,7 +1174,7 @@ static void process_by_rank_dac(struct ddr_priv *priv, int if_num, + &dacsum.bytes[0], "All-Rank VREF"); + + if (lane_probs) { +- debug("N0.LMC%d: All-Rank VREF DAC Problem Bytelane(s): 0x%03x\n", ++printf("N0.LMC%d: All-Rank VREF DAC Problem Bytelane(s): 0x%03x\n", + if_num, lane_probs); + } + +@@ -1281,16 +1281,16 @@ static void validate_deskew_training(struct ddr_priv *priv, int rank_mask, + get_deskew_settings(priv, if_num, &dskdat); + + if (print_enable) { +- debug("N0.LMC%d: Deskew Settings: Bit => :", ++printf("N0.LMC%d: Deskew Settings: Bit => :", + if_num); + for (bit_index = 7; bit_index >= 0; --bit_index) +- debug(" %3d ", bit_index); +- debug("\n"); ++printf(" %3d ", bit_index); ++printf("\n"); + } + + for (byte_lane = 0; byte_lane < byte_limit; byte_lane++) { + if (print_enable) +- debug("N0.LMC%d: Bit Deskew Byte %d %s :", ++printf("N0.LMC%d: Bit Deskew Byte %d %s :", + if_num, byte_lane, + (print_flags & 2) ? "FINAL" : " "); + +@@ -1304,7 +1304,7 @@ static void validate_deskew_training(struct ddr_priv *priv, int rank_mask, + if (lmc_config.s.mode32b == 1 && byte_lane == 4) { + bit_last = 3; + if (print_enable) +- debug(" "); ++printf(" "); + } else { + bit_last = 7; + } +@@ -1330,7 +1330,7 @@ static void validate_deskew_training(struct ddr_priv *priv, int rank_mask, + } + + if (print_enable) +- debug(" %3d %c", deskew, fc[flags ^ 1]); ++printf(" %3d %c", deskew, fc[flags ^ 1]); + } + + /* +@@ -1363,14 +1363,14 @@ static void validate_deskew_training(struct ddr_priv *priv, int rank_mask, + + if ((nibrng_errs != 0 || nibunl_errs != 0 || + bitval_errs != 0) && print_enable) { +- debug(" %c%c%c", ++printf(" %c%c%c", + (nibrng_errs) ? 'R' : ' ', + (nibunl_errs) ? 'U' : ' ', + (bitval_errs) ? 'V' : ' '); + } + + if (print_enable) +- debug("\n"); ++printf("\n"); + + counts->nibrng_errs |= (nibrng_errs << byte_lane); + counts->nibunl_errs |= (nibunl_errs << byte_lane); +@@ -1470,7 +1470,7 @@ static void display_dac_dbi_settings(int lmc, int dac_or_dbi, + int deskew; + const char *fc = " ?-=+*#&"; + +- debug("N0.LMC%d: %s %s Settings %d:0 :", ++printf("N0.LMC%d: %s %s Settings %d:0 :", + lmc, title, (dac_or_dbi) ? "DAC" : "DBI", 7 + ecc_ena); + // FIXME: what about 32-bit mode? + for (byte = (7 + ecc_ena); byte >= 0; --byte) { +@@ -1481,9 +1481,9 @@ static void display_dac_dbi_settings(int lmc, int dac_or_dbi, + flags = settings[byte] & 7; + deskew = (settings[byte] >> 3) & 0x7f; + } +- debug(" %3d %c", deskew, fc[flags ^ 1]); ++printf(" %3d %c", deskew, fc[flags ^ 1]); + } +- debug("\n"); ++printf("\n"); + } + + // Find a HWL majority +@@ -1563,7 +1563,7 @@ static void perform_offset_training(struct ddr_priv *priv, int rank_mask, + + // do not print or write if CSR does not change... + if (lmc_phy_ctl.u64 != orig_phy_ctl) { +- debug("PHY_CTL : 0x%016llx\n", ++printf("PHY_CTL : 0x%016llx\n", + lmc_phy_ctl.u64); + lmc_wr(priv, CVMX_LMCX_PHY_CTL(if_num), lmc_phy_ctl.u64); + } +@@ -1695,7 +1695,7 @@ static int perform_deskew_training(struct ddr_priv *priv, int rank_mask, + octeon_is_cpuid(OCTEON_CNF75XX); + int disable_bitval_retries = 1; // default to disabled + +- debug("N0.LMC%d: Performing Deskew Training.\n", if_num); ++printf("N0.LMC%d: Performing Deskew Training.\n", if_num); + + sat_retries = 0; + sat_retries_limit = (has_no_sat) ? 5 : DEFAULT_SAT_RETRY_LIMIT; +@@ -1785,13 +1785,13 @@ perform_deskew_training: + if (lock_retries <= lock_retries_limit) { + goto perform_deskew_training; + } else { +- debug("N0.LMC%d: LOCK RETRIES failed after %d retries\n", ++printf("N0.LMC%d: LOCK RETRIES failed after %d retries\n", + if_num, lock_retries_limit); + } + } else { + // only print if we did try + if (lock_retries_total > 0) +- debug("N0.LMC%d: LOCK RETRIES successful after %d retries\n", ++printf("N0.LMC%d: LOCK RETRIES successful after %d retries\n", + if_num, lock_retries); + } + } /* if (unsaturated || spd_rawcard_aorb) */ +@@ -1803,14 +1803,14 @@ perform_deskew_training: + * benefit from SAT retries; if so, exit + */ + if (spd_rawcard_aorb && !has_no_sat) { +- debug("N0.LMC%d: Deskew Training Loop: Exiting for RAWCARD == A or B.\n", ++printf("N0.LMC%d: Deskew Training Loop: Exiting for RAWCARD == A or B.\n", + if_num); + break; // no sat or lock retries + } + + } while (!unsaturated && (sat_retries < sat_retries_limit)); + +- debug("N0.LMC%d: Deskew Training %s. %d sat-retries, %d lock-retries\n", ++printf("N0.LMC%d: Deskew Training %s. %d sat-retries, %d lock-retries\n", + if_num, (sat_retries >= DEFAULT_SAT_RETRY_LIMIT) ? + "Timed Out" : "Completed", sat_retries - 1, lock_retries_total); + +@@ -1821,7 +1821,7 @@ perform_deskew_training: + if (dsk_counts.nibrng_errs != 0 || dsk_counts.nibunl_errs != 0 || + (dsk_counts.bitval_errs != 0 && !disable_bitval_retries) || + !unsaturated) { +- debug("N0.LMC%d: Nibble or Saturation Error(s) found, returning FAULT\n", ++printf("N0.LMC%d: Nibble or Saturation Error(s) found, returning FAULT\n", + if_num); + // FIXME: do we want this output always for errors? + validate_deskew_training(priv, rank_mask, if_num, +@@ -1877,9 +1877,9 @@ static int compute_vref_1slot_2rank(int rtt_wr, int rtt_park, int dqx_ctl, + else + vref_value |= vref_range; + +- debug("rtt_wr: %d, rtt_park: %d, dqx_ctl: %d, rank_count: %d\n", ++printf("rtt_wr: %d, rtt_park: %d, dqx_ctl: %d, rank_count: %d\n", + rtt_wr, rtt_park, dqx_ctl, rank_count); +- debug("rtt_wr_s: %lld, rtt_park_s: %lld, dqx_ctl_s: %lld, vref_value: 0x%x, range: %d\n", ++printf("rtt_wr_s: %lld, rtt_park_s: %lld, dqx_ctl_s: %lld, vref_value: 0x%x, range: %d\n", + rtt_wr_s, rtt_park_s, dqx_ctl_s, vref_value ^ vref_range, + vref_range ? 2 : 1); + +@@ -1944,7 +1944,7 @@ static int compute_vref_2slot_2rank(int rtt_wr, int rtt_park_00, + else + vref_value |= vref_range; + +- debug("rtt_wr:%d, rtt_park_00:%d, rtt_park_01:%d, dqx_ctl:%d, rtt_nom:%d, vref_value:%d (0x%x)\n", ++printf("rtt_wr:%d, rtt_park_00:%d, rtt_park_01:%d, dqx_ctl:%d, rtt_nom:%d, vref_value:%d (0x%x)\n", + rtt_wr, rtt_park_00, rtt_park_01, dqx_ctl, rtt_nom, vref_value, + vref_value); + +@@ -1968,7 +1968,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx, + int rtt_park_00; + int rtt_park_01; + +- debug("N0.LMC%d.R%d: %s(...dram_connection = %d)\n", ++printf("N0.LMC%d.R%d: %s(...dram_connection = %d)\n", + if_num, rankx, __func__, dram_connection); + + // allow some overrides... +@@ -1976,7 +1976,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx, + if (s) { + enable_adjust = !!simple_strtoul(s, NULL, 0); + if (!enable_adjust) { +- debug("N0.LMC%d.R%d: DISABLE adjustment of computed VREF\n", ++printf("N0.LMC%d.R%d: DISABLE adjustment of computed VREF\n", + if_num, rankx); + } + } +@@ -1985,7 +1985,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx, + if (s) { + int new_vref = simple_strtoul(s, NULL, 0); + +- debug("N0.LMC%d.R%d: OVERRIDE computed VREF to 0x%x (%d)\n", ++printf("N0.LMC%d.R%d: OVERRIDE computed VREF to 0x%x (%d)\n", + if_num, rankx, new_vref, new_vref); + return new_vref; + } +@@ -2080,7 +2080,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx, + + // we must have adjusted it, so print it out if + // verbosity is right +- debug("N0.LMC%d.R%d: adjusting computed vref from %2d (0x%02x) to %2d (0x%02x)\n", ++printf("N0.LMC%d.R%d: adjusting computed vref from %2d (0x%02x) to %2d (0x%02x)\n", + if_num, rankx, computed_final_vref_value, + computed_final_vref_value, + computed_final_vref_value + adj, +@@ -2197,7 +2197,7 @@ static void do_display_rl(int if_num, + msg_buf = hex_buf; + } + +- debug("N0.LMC%d.R%d: Rlevel Rank %#4x, %s : %5d %5d %5d %5d %5d %5d %5d %5d %5d %s\n", ++printf("N0.LMC%d.R%d: Rlevel Rank %#4x, %s : %5d %5d %5d %5d %5d %5d %5d %5d %5d %s\n", + if_num, rank, lmc_rlevel_rank.s.status, msg_buf, + lmc_rlevel_rank.s.byte8, lmc_rlevel_rank.s.byte7, + lmc_rlevel_rank.s.byte6, lmc_rlevel_rank.s.byte5, +@@ -2267,7 +2267,7 @@ static void display_rl_with_rodt(int if_num, + rodt_ohms); + } + +- debug("N0.LMC%d.R%d: Rlevel %s %s : %5d %5d %5d %5d %5d %5d %5d %5d %5d (%d)\n", ++printf("N0.LMC%d.R%d: Rlevel %s %s : %5d %5d %5d %5d %5d %5d %5d %5d %5d (%d)\n", + if_num, rank, set_buf, msg_buf, lmc_rlevel_rank.s.byte8, + lmc_rlevel_rank.s.byte7, lmc_rlevel_rank.s.byte6, + lmc_rlevel_rank.s.byte5, lmc_rlevel_rank.s.byte4, +@@ -2290,7 +2290,7 @@ static void do_display_wl(int if_num, + msg_buf = hex_buf; + } + +- debug("N0.LMC%d.R%d: Wlevel Rank %#4x, %s : %5d %5d %5d %5d %5d %5d %5d %5d %5d\n", ++printf("N0.LMC%d.R%d: Wlevel Rank %#4x, %s : %5d %5d %5d %5d %5d %5d %5d %5d %5d\n", + if_num, rank, lmc_wlevel_rank.s.status, msg_buf, + lmc_wlevel_rank.s.byte8, lmc_wlevel_rank.s.byte7, + lmc_wlevel_rank.s.byte6, lmc_wlevel_rank.s.byte5, +@@ -2342,7 +2342,7 @@ static void do_display_bm(int if_num, int rank, void *bm, + // print them + int *bitmasks = (int *)bm; + +- debug("N0.LMC%d.R%d: Wlevel Debug Bitmasks : %05x %05x %05x %05x %05x %05x %05x %05x %05x\n", ++printf("N0.LMC%d.R%d: Wlevel Debug Bitmasks : %05x %05x %05x %05x %05x %05x %05x %05x %05x\n", + if_num, rank, bitmasks[8], bitmasks[7], bitmasks[6], + bitmasks[5], bitmasks[4], bitmasks[3], bitmasks[2], + bitmasks[1], bitmasks[0] +@@ -2353,7 +2353,7 @@ static void do_display_bm(int if_num, int rank, void *bm, + struct rlevel_bitmask *rlevel_bitmask = + (struct rlevel_bitmask *)bm; + +- debug("N0.LMC%d.R%d: Rlevel Debug Bitmasks 8:0 : %05llx %05llx %05llx %05llx %05llx %05llx %05llx %05llx %05llx\n", ++printf("N0.LMC%d.R%d: Rlevel Debug Bitmasks 8:0 : %05llx %05llx %05llx %05llx %05llx %05llx %05llx %05llx %05llx\n", + if_num, rank, ppbm(rlevel_bitmask[8].bm), + ppbm(rlevel_bitmask[7].bm), ppbm(rlevel_bitmask[6].bm), + ppbm(rlevel_bitmask[5].bm), ppbm(rlevel_bitmask[4].bm), +@@ -2366,7 +2366,7 @@ static void do_display_bm(int if_num, int rank, void *bm, + struct rlevel_bitmask *rlevel_bitmask = + (struct rlevel_bitmask *)bm; + +- debug("N0.LMC%d.R%d: Rlevel Debug Bitmask Scores 8:0 : %5d %5d %5d %5d %5d %5d %5d %5d %5d\n", ++printf("N0.LMC%d.R%d: Rlevel Debug Bitmask Scores 8:0 : %5d %5d %5d %5d %5d %5d %5d %5d %5d\n", + if_num, rank, rlevel_bitmask[8].errs, + rlevel_bitmask[7].errs, rlevel_bitmask[6].errs, + rlevel_bitmask[5].errs, rlevel_bitmask[4].errs, +@@ -2378,7 +2378,7 @@ static void do_display_bm(int if_num, int rank, void *bm, + struct rlevel_byte_data *rlevel_byte = + (struct rlevel_byte_data *)bm; + +- debug("N0.LMC%d.R%d: Rlevel Debug Non-seq Scores 8:0 : %5d %5d %5d %5d %5d %5d %5d %5d %5d\n", ++printf("N0.LMC%d.R%d: Rlevel Debug Non-seq Scores 8:0 : %5d %5d %5d %5d %5d %5d %5d %5d %5d\n", + if_num, rank, rlevel_byte[XPU(8, ecc)].sqerrs, + rlevel_byte[XPU(7, ecc)].sqerrs, + rlevel_byte[XPU(6, ecc)].sqerrs, +@@ -2821,7 +2821,7 @@ static void lmc_config(struct ddr_priv *priv) + s = lookup_env_ull(priv, "ddr_config"); + if (s) + cfg.u64 = simple_strtoull(s, NULL, 0); +- debug("LMC_CONFIG : 0x%016llx\n", ++printf("LMC_CONFIG : 0x%016llx\n", + cfg.u64); + lmc_wr(priv, CVMX_LMCX_CONFIG(if_num), cfg.u64); + } +@@ -2892,7 +2892,7 @@ static void lmc_control(struct ddr_priv *priv) + if (s) + ctrl.u64 = simple_strtoull(s, NULL, 0); + +- debug("LMC_CONTROL : 0x%016llx\n", ++printf("LMC_CONTROL : 0x%016llx\n", + ctrl.u64); + lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), ctrl.u64); + } +@@ -2906,7 +2906,7 @@ static void lmc_timing_params0(struct ddr_priv *priv) + tp0.u64 = lmc_rd(priv, CVMX_LMCX_TIMING_PARAMS0(if_num)); + + trp_value = divide_roundup(trp, tclk_psecs) - 1; +- debug("TIMING_PARAMS0[TRP]: NEW 0x%x, OLD 0x%x\n", trp_value, ++printf("TIMING_PARAMS0[TRP]: NEW 0x%x, OLD 0x%x\n", trp_value, + trp_value + + (unsigned int)(divide_roundup(max(4ull * tclk_psecs, 7500ull), + tclk_psecs)) - 4); +@@ -2916,7 +2916,7 @@ static void lmc_timing_params0(struct ddr_priv *priv) + trp_value += + divide_roundup(max(4ull * tclk_psecs, 7500ull), + tclk_psecs) - 4; +- debug("TIMING_PARAMS0[trp]: USING OLD 0x%x\n", ++printf("TIMING_PARAMS0[trp]: USING OLD 0x%x\n", + trp_value); + } + } +@@ -2965,7 +2965,7 @@ static void lmc_timing_params0(struct ddr_priv *priv) + s = lookup_env_ull(priv, "ddr_timing_params0"); + if (s) + tp0.u64 = simple_strtoull(s, NULL, 0); +- debug("TIMING_PARAMS0 : 0x%016llx\n", ++printf("TIMING_PARAMS0 : 0x%016llx\n", + tp0.u64); + lmc_wr(priv, CVMX_LMCX_TIMING_PARAMS0(if_num), tp0.u64); + } +@@ -2985,7 +2985,7 @@ static void lmc_timing_params1(struct ddr_priv *priv) + + temp_trcd = divide_roundup(trcd, tclk_psecs); + if (temp_trcd > 15) { +- debug("TIMING_PARAMS1[trcd]: need extension bit for 0x%x\n", ++printf("TIMING_PARAMS1[trcd]: need extension bit for 0x%x\n", + temp_trcd); + } + if (octeon_is_cpuid(OCTEON_CN78XX_PASS1_X) && temp_trcd > 15) { +@@ -3022,7 +3022,7 @@ static void lmc_timing_params1(struct ddr_priv *priv) + txp = divide_roundup(max((unsigned int)(3 * tclk_psecs), txp), + tclk_psecs) - 1; + if (txp > 7) { +- debug("TIMING_PARAMS1[txp]: need extension bit for 0x%x\n", ++printf("TIMING_PARAMS1[txp]: need extension bit for 0x%x\n", + txp); + } + if (octeon_is_cpuid(OCTEON_CN78XX_PASS1_X) && txp > 7) +@@ -3054,12 +3054,12 @@ static void lmc_timing_params1(struct ddr_priv *priv) + trfc_dlr = 0; + + if (trfc_dlr == 0) { +- debug("N%d.LMC%d: ERROR: tRFC_DLR: die_capacity %u Mbit is illegal\n", ++printf("N%d.LMC%d: ERROR: tRFC_DLR: die_capacity %u Mbit is illegal\n", + node, if_num, die_capacity); + } else { + tp1.cn78xx.trfc_dlr = + divide_roundup(trfc_dlr * 1000UL, 8 * tclk_psecs); +- debug("N%d.LMC%d: TIMING_PARAMS1[trfc_dlr] set to %u\n", ++printf("N%d.LMC%d: TIMING_PARAMS1[trfc_dlr] set to %u\n", + node, if_num, tp1.cn78xx.trfc_dlr); + } + } +@@ -3068,7 +3068,7 @@ static void lmc_timing_params1(struct ddr_priv *priv) + if (s) + tp1.u64 = simple_strtoull(s, NULL, 0); + +- debug("TIMING_PARAMS1 : 0x%016llx\n", ++printf("TIMING_PARAMS1 : 0x%016llx\n", + tp1.u64); + lmc_wr(priv, CVMX_LMCX_TIMING_PARAMS1(if_num), tp1.u64); + } +@@ -3082,12 +3082,12 @@ static void lmc_timing_params2(struct ddr_priv *priv) + + tp1.u64 = lmc_rd(priv, CVMX_LMCX_TIMING_PARAMS1(if_num)); + tp2.u64 = lmc_rd(priv, CVMX_LMCX_TIMING_PARAMS2(if_num)); +- debug("TIMING_PARAMS2 : 0x%016llx\n", ++printf("TIMING_PARAMS2 : 0x%016llx\n", + tp2.u64); + + temp_trrd_l = divide_roundup(ddr4_trrd_lmin, tclk_psecs) - 2; + if (temp_trrd_l > 7) +- debug("TIMING_PARAMS2[trrd_l]: need extension bit for 0x%x\n", ++printf("TIMING_PARAMS2[trrd_l]: need extension bit for 0x%x\n", + temp_trrd_l); + if (octeon_is_cpuid(OCTEON_CN78XX_PASS1_X) && temp_trrd_l > 7) + temp_trrd_l = 7; // max it out +@@ -3101,7 +3101,7 @@ static void lmc_timing_params2(struct ddr_priv *priv) + tp2.s.trtp = divide_roundup(max(4ull * tclk_psecs, 7500ull), + tclk_psecs) - 1; + +- debug("TIMING_PARAMS2 : 0x%016llx\n", ++printf("TIMING_PARAMS2 : 0x%016llx\n", + tp2.u64); + lmc_wr(priv, CVMX_LMCX_TIMING_PARAMS2(if_num), tp2.u64); + +@@ -3111,9 +3111,9 @@ static void lmc_timing_params2(struct ddr_priv *priv) + */ + if (tp1.cn78xx.twtr < (tp2.s.twtr_l - 4)) { + tp1.cn78xx.twtr = tp2.s.twtr_l - 4; +- debug("ERRATA 25823: NEW: TWTR: %d, TWTR_L: %d\n", ++printf("ERRATA 25823: NEW: TWTR: %d, TWTR_L: %d\n", + tp1.cn78xx.twtr, tp2.s.twtr_l); +- debug("TIMING_PARAMS1 : 0x%016llx\n", ++printf("TIMING_PARAMS1 : 0x%016llx\n", + tp1.u64); + lmc_wr(priv, CVMX_LMCX_TIMING_PARAMS1(if_num), tp1.u64); + } +@@ -3176,11 +3176,11 @@ static void lmc_modereg_params0(struct ddr_priv *priv) + mp0.s.cwl = simple_strtoul(s, NULL, 0) - 5; + + if (ddr_type == DDR4_DRAM) { +- debug("%-45s : %d, [0x%x]\n", "CAS Write Latency CWL, [CSR]", ++printf("%-45s : %d, [0x%x]\n", "CAS Write Latency CWL, [CSR]", + mp0.s.cwl + 9 + + ((mp0.s.cwl > 2) ? (mp0.s.cwl - 3) * 2 : 0), mp0.s.cwl); + } else { +- debug("%-45s : %d, [0x%x]\n", "CAS Write Latency CWL, [CSR]", ++printf("%-45s : %d, [0x%x]\n", "CAS Write Latency CWL, [CSR]", + mp0.s.cwl + 5, mp0.s.cwl); + } + +@@ -3198,7 +3198,7 @@ static void lmc_modereg_params0(struct ddr_priv *priv) + s = lookup_env(priv, "ddr_cl"); + if (s) { + cl = simple_strtoul(s, NULL, 0); +- debug("CAS Latency : %6d\n", ++printf("CAS Latency : %6d\n", + cl); + } + +@@ -3294,14 +3294,14 @@ static void lmc_modereg_params0(struct ddr_priv *priv) + if (s) + mp0.s.wrp = simple_strtoul(s, NULL, 0); + +- debug("%-45s : %d, [0x%x]\n", ++printf("%-45s : %d, [0x%x]\n", + "Write recovery for auto precharge WRP, [CSR]", param, mp0.s.wrp); + + s = lookup_env_ull(priv, "ddr_modereg_params0"); + if (s) + mp0.u64 = simple_strtoull(s, NULL, 0); + +- debug("MODEREG_PARAMS0 : 0x%016llx\n", ++printf("MODEREG_PARAMS0 : 0x%016llx\n", + mp0.u64); + lmc_wr(priv, CVMX_LMCX_MODEREG_PARAMS0(if_num), mp0.u64); + } +@@ -3408,7 +3408,7 @@ static void lmc_modereg_params1(struct ddr_priv *priv) + if (extr_wr(mp1.u64, i) > 3) { + // FIXME? always insert 120 + insrt_wr(&mp1.u64, i, 1); +- debug("RTT_WR_%d%d set to 120 for CN78XX pass 1\n", ++printf("RTT_WR_%d%d set to 120 for CN78XX pass 1\n", + !!(i & 2), i & 1); + } + } +@@ -3439,7 +3439,7 @@ static void lmc_modereg_params1(struct ddr_priv *priv) + if (s) + mp1.u64 = simple_strtoull(s, NULL, 0); + +- debug("RTT_NOM %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", ++printf("RTT_NOM %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", + imp_val->rtt_nom_ohms[mp1.s.rtt_nom_11], + imp_val->rtt_nom_ohms[mp1.s.rtt_nom_10], + imp_val->rtt_nom_ohms[mp1.s.rtt_nom_01], +@@ -3447,7 +3447,7 @@ static void lmc_modereg_params1(struct ddr_priv *priv) + mp1.s.rtt_nom_11, + mp1.s.rtt_nom_10, mp1.s.rtt_nom_01, mp1.s.rtt_nom_00); + +- debug("RTT_WR %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", ++printf("RTT_WR %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", + imp_val->rtt_wr_ohms[extr_wr(mp1.u64, 3)], + imp_val->rtt_wr_ohms[extr_wr(mp1.u64, 2)], + imp_val->rtt_wr_ohms[extr_wr(mp1.u64, 1)], +@@ -3455,14 +3455,14 @@ static void lmc_modereg_params1(struct ddr_priv *priv) + extr_wr(mp1.u64, 3), + extr_wr(mp1.u64, 2), extr_wr(mp1.u64, 1), extr_wr(mp1.u64, 0)); + +- debug("DIC %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", ++printf("DIC %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", + imp_val->dic_ohms[mp1.s.dic_11], + imp_val->dic_ohms[mp1.s.dic_10], + imp_val->dic_ohms[mp1.s.dic_01], + imp_val->dic_ohms[mp1.s.dic_00], + mp1.s.dic_11, mp1.s.dic_10, mp1.s.dic_01, mp1.s.dic_00); + +- debug("MODEREG_PARAMS1 : 0x%016llx\n", ++printf("MODEREG_PARAMS1 : 0x%016llx\n", + mp1.u64); + lmc_wr(priv, CVMX_LMCX_MODEREG_PARAMS1(if_num), mp1.u64); + } +@@ -3503,7 +3503,7 @@ static void lmc_modereg_params2(struct ddr_priv *priv) + if (s) + mp2.u64 = simple_strtoull(s, NULL, 0); + +- debug("RTT_PARK %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", ++printf("RTT_PARK %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", + imp_val->rtt_nom_ohms[mp2.s.rtt_park_11], + imp_val->rtt_nom_ohms[mp2.s.rtt_park_10], + imp_val->rtt_nom_ohms[mp2.s.rtt_park_01], +@@ -3511,17 +3511,17 @@ static void lmc_modereg_params2(struct ddr_priv *priv) + mp2.s.rtt_park_11, mp2.s.rtt_park_10, mp2.s.rtt_park_01, + mp2.s.rtt_park_00); + +- debug("%-45s : 0x%x,0x%x,0x%x,0x%x\n", "VREF_RANGE", ++printf("%-45s : 0x%x,0x%x,0x%x,0x%x\n", "VREF_RANGE", + mp2.s.vref_range_11, + mp2.s.vref_range_10, + mp2.s.vref_range_01, mp2.s.vref_range_00); + +- debug("%-45s : 0x%x,0x%x,0x%x,0x%x\n", "VREF_VALUE", ++printf("%-45s : 0x%x,0x%x,0x%x,0x%x\n", "VREF_VALUE", + mp2.s.vref_value_11, + mp2.s.vref_value_10, + mp2.s.vref_value_01, mp2.s.vref_value_00); + +- debug("MODEREG_PARAMS2 : 0x%016llx\n", ++printf("MODEREG_PARAMS2 : 0x%016llx\n", + mp2.u64); + lmc_wr(priv, CVMX_LMCX_MODEREG_PARAMS2(if_num), mp2.u64); + } +@@ -3555,7 +3555,7 @@ static void lmc_modereg_params3(struct ddr_priv *priv) + } + + lmc_wr(priv, CVMX_LMCX_MODEREG_PARAMS3(if_num), mp3.u64); +- debug("MODEREG_PARAMS3 : 0x%016llx\n", ++printf("MODEREG_PARAMS3 : 0x%016llx\n", + mp3.u64); + } + } +@@ -3585,7 +3585,7 @@ static void lmc_nxm(struct ddr_priv *priv) + if (s) + lmc_nxm.u64 = simple_strtoull(s, NULL, 0); + +- debug("LMC_NXM : 0x%016llx\n", ++printf("LMC_NXM : 0x%016llx\n", + lmc_nxm.u64); + lmc_wr(priv, CVMX_LMCX_NXM(if_num), lmc_nxm.u64); + } +@@ -3601,7 +3601,7 @@ static void lmc_wodt_mask(struct ddr_priv *priv) + if (s) + wodt_mask.u64 = simple_strtoull(s, NULL, 0); + +- debug("WODT_MASK : 0x%016llx\n", ++printf("WODT_MASK : 0x%016llx\n", + wodt_mask.u64); + lmc_wr(priv, CVMX_LMCX_WODT_MASK(if_num), wodt_mask.u64); + } +@@ -3618,7 +3618,7 @@ static void lmc_rodt_mask(struct ddr_priv *priv) + if (s) + rodt_mask.u64 = simple_strtoull(s, NULL, 0); + +- debug("%-45s : 0x%016llx\n", "RODT_MASK", rodt_mask.u64); ++printf("%-45s : 0x%016llx\n", "RODT_MASK", rodt_mask.u64); + lmc_wr(priv, CVMX_LMCX_RODT_MASK(if_num), rodt_mask.u64); + + dyn_rtt_nom_mask = 0; +@@ -3641,7 +3641,7 @@ static void lmc_rodt_mask(struct ddr_priv *priv) + dyn_rtt_nom_mask &= ~2; + dyn_rtt_nom_mask |= odt1_bit << 1; + } +- debug("%-45s : 0x%02x\n", "DYN_RTT_NOM_MASK", dyn_rtt_nom_mask); ++printf("%-45s : 0x%02x\n", "DYN_RTT_NOM_MASK", dyn_rtt_nom_mask); + } + + static void lmc_comp_ctl2(struct ddr_priv *priv) +@@ -3681,7 +3681,7 @@ static void lmc_comp_ctl2(struct ddr_priv *priv) + ddr_hertz >= 1000000000) { + // lowest for DDR4 is 26 ohms + cc2.s.ck_ctl = ddr4_driver_26_ohm; +- debug("N%d.LMC%d: Forcing DDR4 COMP_CTL2[CK_CTL] to %d, %d ohms\n", ++printf("N%d.LMC%d: Forcing DDR4 COMP_CTL2[CK_CTL] to %d, %d ohms\n", + node, if_num, cc2.s.ck_ctl, + imp_val->drive_strength[cc2.s.ck_ctl]); + } +@@ -3695,7 +3695,7 @@ static void lmc_comp_ctl2(struct ddr_priv *priv) + cc2.cn78xx.control_ctl = ddr4_driver_26_ohm; + // lowest for DDR4 is 26 ohms + cc2.cn78xx.cmd_ctl = ddr4_driver_26_ohm; +- debug("N%d.LMC%d: Forcing DDR4 COMP_CTL2[CONTROL_CTL,CMD_CTL] to %d, %d ohms\n", ++printf("N%d.LMC%d: Forcing DDR4 COMP_CTL2[CONTROL_CTL,CMD_CTL] to %d, %d ohms\n", + node, if_num, ddr4_driver_26_ohm, + imp_val->drive_strength[ddr4_driver_26_ohm]); + } +@@ -3716,19 +3716,19 @@ static void lmc_comp_ctl2(struct ddr_priv *priv) + if (s) + cc2.cn78xx.dqx_ctl = simple_strtoul(s, NULL, 0); + +- debug("%-45s : %d, %d ohms\n", "DQX_CTL ", cc2.cn78xx.dqx_ctl, ++printf("%-45s : %d, %d ohms\n", "DQX_CTL ", cc2.cn78xx.dqx_ctl, + imp_val->drive_strength[cc2.cn78xx.dqx_ctl]); +- debug("%-45s : %d, %d ohms\n", "CK_CTL ", cc2.cn78xx.ck_ctl, ++printf("%-45s : %d, %d ohms\n", "CK_CTL ", cc2.cn78xx.ck_ctl, + imp_val->drive_strength[cc2.cn78xx.ck_ctl]); +- debug("%-45s : %d, %d ohms\n", "CMD_CTL ", cc2.cn78xx.cmd_ctl, ++printf("%-45s : %d, %d ohms\n", "CMD_CTL ", cc2.cn78xx.cmd_ctl, + imp_val->drive_strength[cc2.cn78xx.cmd_ctl]); +- debug("%-45s : %d, %d ohms\n", "CONTROL_CTL ", ++printf("%-45s : %d, %d ohms\n", "CONTROL_CTL ", + cc2.cn78xx.control_ctl, + imp_val->drive_strength[cc2.cn78xx.control_ctl]); +- debug("Read ODT_CTL : 0x%x (%d ohms)\n", ++printf("Read ODT_CTL : 0x%x (%d ohms)\n", + cc2.cn78xx.rodt_ctl, imp_val->rodt_ohms[cc2.cn78xx.rodt_ctl]); + +- debug("%-45s : 0x%016llx\n", "COMP_CTL2", cc2.u64); ++printf("%-45s : 0x%016llx\n", "COMP_CTL2", cc2.u64); + lmc_wr(priv, CVMX_LMCX_COMP_CTL2(if_num), cc2.u64); + } + +@@ -3745,11 +3745,11 @@ static void lmc_phy_ctl(struct ddr_priv *priv) + // C0 is TEN, C1 is A17 + phy_ctl.s.c0_sel = 2; + phy_ctl.s.c1_sel = 2; +- debug("N%d.LMC%d: 3DS: setting PHY_CTL[cx_csel] = %d\n", ++printf("N%d.LMC%d: 3DS: setting PHY_CTL[cx_csel] = %d\n", + node, if_num, phy_ctl.s.c1_sel); + } + +- debug("PHY_CTL : 0x%016llx\n", ++printf("PHY_CTL : 0x%016llx\n", + phy_ctl.u64); + lmc_wr(priv, CVMX_LMCX_PHY_CTL(if_num), phy_ctl.u64); + } +@@ -3787,12 +3787,12 @@ static void lmc_ext_config(struct ddr_priv *priv) + if (!octeon_is_cpuid(OCTEON_CN78XX_PASS1_X) && lranks_per_prank > 1) { + ext_cfg.s.dimm0_cid = lranks_bits; + ext_cfg.s.dimm1_cid = lranks_bits; +- debug("N%d.LMC%d: 3DS: setting EXT_CONFIG[dimmx_cid] = %d\n", ++printf("N%d.LMC%d: 3DS: setting EXT_CONFIG[dimmx_cid] = %d\n", + node, if_num, ext_cfg.s.dimm0_cid); + } + + lmc_wr(priv, CVMX_LMCX_EXT_CONFIG(if_num), ext_cfg.u64); +- debug("%-45s : 0x%016llx\n", "EXT_CONFIG", ext_cfg.u64); ++printf("%-45s : 0x%016llx\n", "EXT_CONFIG", ext_cfg.u64); + } + + static void lmc_ext_config2(struct ddr_priv *priv) +@@ -3818,7 +3818,7 @@ static void lmc_ext_config2(struct ddr_priv *priv) + ext_cfg2.s.delay_unload_r3 = value; + + lmc_wr(priv, CVMX_LMCX_EXT_CONFIG2(if_num), ext_cfg2.u64); +- debug("%-45s : 0x%016llx\n", "EXT_CONFIG2", ext_cfg2.u64); ++printf("%-45s : 0x%016llx\n", "EXT_CONFIG2", ext_cfg2.u64); + } + } + +@@ -3955,7 +3955,7 @@ static void lmc_dimm01_params_loop(struct ddr_priv *priv) + lmc_wr(priv, CVMX_LMCX_DIMMX_DDR4_PARAMS1(dimmx, if_num), + ddr4_p1.u64); + +- debug("DIMM%d Register Control Words RCBx:RC1x : %x %x %x %x %x %x %x %x %x %x %x\n", ++printf("DIMM%d Register Control Words RCBx:RC1x : %x %x %x %x %x %x %x %x %x %x %x\n", + dimmx, ddr4_p1.s.rcbx, ddr4_p1.s.rcax, + ddr4_p1.s.rc9x, ddr4_p0.s.rc8x, + ddr4_p0.s.rc7x, ddr4_p0.s.rc6x, +@@ -4066,7 +4066,7 @@ static void lmc_dimm01_params_loop(struct ddr_priv *priv) + + lmc_wr(priv, CVMX_LMCX_DIMMX_PARAMS(dimmx, if_num), dimm_p.u64); + +- debug("DIMM%d Register Control Words RC15:RC0 : %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x\n", ++printf("DIMM%d Register Control Words RC15:RC0 : %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x\n", + dimmx, dimm_p.s.rc15, dimm_p.s.rc14, dimm_p.s.rc13, + dimm_p.s.rc12, dimm_p.s.rc11, dimm_p.s.rc10, + dimm_p.s.rc9, dimm_p.s.rc8, dimm_p.s.rc7, +@@ -4077,7 +4077,7 @@ static void lmc_dimm01_params_loop(struct ddr_priv *priv) + // and treat it specially + if (ddr_type == DDR3_DRAM && num_ranks == 4 && + spd_rdimm_registers == 2 && dimmx == 0) { +- debug("DDR3: Copying DIMM0_PARAMS to DIMM1_PARAMS for pseudo-DIMM #1...\n"); ++printf("DDR3: Copying DIMM0_PARAMS to DIMM1_PARAMS for pseudo-DIMM #1...\n"); + lmc_wr(priv, CVMX_LMCX_DIMMX_PARAMS(1, if_num), dimm_p.u64); + } + } +@@ -4120,7 +4120,7 @@ static void lmc_dimm01_params(struct ddr_priv *priv) + if (s) + dimm_ctl.s.tcws = simple_strtoul(s, NULL, 0); + +- debug("LMC DIMM_CTL : 0x%016llx\n", ++printf("LMC DIMM_CTL : 0x%016llx\n", + dimm_ctl.u64); + lmc_wr(priv, CVMX_LMCX_DIMM_CTL(if_num), dimm_ctl.u64); + +@@ -4131,7 +4131,7 @@ static void lmc_dimm01_params(struct ddr_priv *priv) + dimm_ctl.s.dimm0_wmask = 0x2000; + dimm_ctl.s.dimm1_wmask = (dimm_count > 1) ? + 0x2000 : 0x0000; +- debug("LMC DIMM_CTL : 0x%016llx\n", ++printf("LMC DIMM_CTL : 0x%016llx\n", + dimm_ctl.u64); + lmc_wr(priv, CVMX_LMCX_DIMM_CTL(if_num), dimm_ctl.u64); + +@@ -4149,7 +4149,7 @@ static void lmc_dimm01_params(struct ddr_priv *priv) + // FIXME: recognize a DDR3 RDIMM with 4 ranks and 2 + // registers, and treat it specially + if (num_ranks == 4 && spd_rdimm_registers == 2) { +- debug("DDR3: Activating DIMM_CTL[dimm1_mask] bits...\n"); ++printf("DDR3: Activating DIMM_CTL[dimm1_mask] bits...\n"); + dimm_ctl.s.dimm1_wmask = 0xffff; + } else { + dimm_ctl.s.dimm1_wmask = +@@ -4178,7 +4178,7 @@ static void lmc_dimm01_params(struct ddr_priv *priv) + if (s) + dimm_ctl.s.tcws = simple_strtoul(s, NULL, 0); + +- debug("LMC DIMM_CTL : 0x%016llx\n", ++printf("LMC DIMM_CTL : 0x%016llx\n", + dimm_ctl.u64); + lmc_wr(priv, CVMX_LMCX_DIMM_CTL(if_num), dimm_ctl.u64); + +@@ -4215,7 +4215,7 @@ start_by_rank_init: + if (by_rank == 0) + rank_mask = saved_rank_mask; + +- debug("\n>>>>> BY_RANK: starting rank %d with mask 0x%02x\n\n", ++printf("\n>>>>> BY_RANK: starting rank %d with mask 0x%02x\n\n", + by_rank, rank_mask); + } + +@@ -4244,7 +4244,7 @@ start_by_rank_init: + + if (spd_rdimm && ddr_type == DDR4_DRAM && + octeon_is_cpuid(OCTEON_CN7XXX)) { +- debug("Running init sequence 1\n"); ++printf("Running init sequence 1\n"); + change_rdimm_mpr_pattern(priv, rank_mask, if_num, dimm_count); + } + +@@ -4256,7 +4256,7 @@ start_by_rank_init: + + // FIXME: disable internal VREF if deskew is disabled? + if (disable_deskew_training) { +- debug("N%d.LMC%d: internal VREF Training disabled, leaving them in RESET.\n", ++printf("N%d.LMC%d: internal VREF Training disabled, leaving them in RESET.\n", + node, if_num); + num_samples = 0; + } else if (ddr_type == DDR4_DRAM && +@@ -4306,11 +4306,11 @@ perform_internal_vref_training: + dac_eval_retries += 1; + if (dac_eval_retries > + DAC_RETRIES_LIMIT) { +- debug("N%d.LMC%d: DDR4 internal VREF DAC settings: retries exhausted; continuing...\n", ++printf("N%d.LMC%d: DDR4 internal VREF DAC settings: retries exhausted; continuing...\n", + node, if_num); + dac_eval_exhausted += 1; + } else { +- debug("N%d.LMC%d: DDR4 internal VREF DAC settings inconsistent; retrying....\n", ++printf("N%d.LMC%d: DDR4 internal VREF DAC settings inconsistent; retrying....\n", + node, if_num); + total_dac_eval_retries += 1; + // try another sample +@@ -4335,12 +4335,12 @@ perform_internal_vref_training: + } + + if (ddr_type == DDR4_DRAM && dac_eval_exhausted > 0) { +- debug("N%d.LMC%d: DDR internal VREF DAC settings: total retries %d, exhausted %d\n", ++printf("N%d.LMC%d: DDR internal VREF DAC settings: total retries %d, exhausted %d\n", + node, if_num, total_dac_eval_retries, dac_eval_exhausted); + } + + if (num_samples > 1) { +- debug("N%d.LMC%d: DDR4 internal VREF DAC settings: processing multiple samples...\n", ++printf("N%d.LMC%d: DDR4 internal VREF DAC settings: processing multiple samples...\n", + node, if_num); + + for (lane = 0; lane < last_lane; lane++) { +@@ -4383,7 +4383,7 @@ perform_internal_vref_training: + if (ddr_type == DDR3_DRAM && !octeon_is_cpuid(OCTEON_CN78XX_PASS1_X) && + !disable_deskew_training) { + load_dac_override(priv, if_num, 127, /* all */ 0x0A); +- debug("N%d.LMC%d: Overriding DDR3 internal VREF DAC settings to 127.\n", ++printf("N%d.LMC%d: Overriding DDR3 internal VREF DAC settings to 127.\n", + node, if_num); + } + +@@ -4405,16 +4405,16 @@ perform_internal_vref_training: + if (internal_retries < + DEFAULT_INTERNAL_VREF_TRAINING_LIMIT) { + internal_retries++; +- debug("N%d.LMC%d: Deskew training results still unsettled - retrying internal vref training (%d)\n", ++printf("N%d.LMC%d: Deskew training results still unsettled - retrying internal vref training (%d)\n", + node, if_num, internal_retries); + goto perform_internal_vref_training; + } else { + if (restart_if_dsk_incomplete) { +- debug("N%d.LMC%d: INFO: Deskew training incomplete - %d retries exhausted, Restarting LMC init...\n", ++printf("N%d.LMC%d: INFO: Deskew training incomplete - %d retries exhausted, Restarting LMC init...\n", + node, if_num, internal_retries); + return -EAGAIN; + } +- debug("N%d.LMC%d: Deskew training incomplete - %d retries exhausted, but continuing...\n", ++printf("N%d.LMC%d: Deskew training incomplete - %d retries exhausted, but continuing...\n", + node, if_num, internal_retries); + } + } /* if (deskew_training_errors) */ +@@ -4425,7 +4425,7 @@ perform_internal_vref_training: + validate_deskew_training(priv, rank_mask, if_num, + &deskew_training_results, 1); + } else { /* if (! disable_deskew_training) */ +- debug("N%d.LMC%d: Deskew Training disabled, printing settings before HWL.\n", ++printf("N%d.LMC%d: Deskew Training disabled, printing settings before HWL.\n", + node, if_num); + validate_deskew_training(priv, rank_mask, if_num, + &deskew_training_results, 1); +@@ -4435,7 +4435,7 @@ perform_internal_vref_training: + read_dac_dbi_settings(priv, if_num, /*dac */ 1, + &rank_dac[by_rank].bytes[0]); + get_deskew_settings(priv, if_num, &rank_dsk[by_rank]); +- debug("\n>>>>> BY_RANK: ending rank %d\n\n", by_rank); ++printf("\n>>>>> BY_RANK: ending rank %d\n\n", by_rank); + } + + end_by_rank_init: +@@ -4456,7 +4456,7 @@ end_by_rank_init: + // FIXME: set this to prevent later checking!!! + disable_deskew_training = 1; + +- debug("\n>>>>> BY_RANK: FINISHED!!\n\n"); ++printf("\n>>>>> BY_RANK: FINISHED!!\n\n"); + } + + return 0; +@@ -4499,7 +4499,7 @@ static void lmc_config_2(struct ddr_priv *priv) + 100 * 512 * 128) / (10000 * 10000) + 10 * + ((u64)32 * tclk_psecs * 100 * 512 * 128) / (10000 * 10000); + +- debug("Waiting %lld usecs for ZQCS calibrations to start\n", ++printf("Waiting %lld usecs for ZQCS calibrations to start\n", + temp_delay_usecs); + udelay(temp_delay_usecs); + +@@ -4558,7 +4558,7 @@ static void lmc_write_leveling_loop(struct ddr_priv *priv, int rankx) + if (rankx == 3) + rank_nom = mp1.s.rtt_nom_11; + +- debug("N%d.LMC%d.R%d: Setting WLEVEL_CTL[rtt_nom] to %d (%d)\n", ++printf("N%d.LMC%d.R%d: Setting WLEVEL_CTL[rtt_nom] to %d (%d)\n", + node, if_num, rankx, rank_nom, + imp_val->rtt_nom_ohms[rank_nom]); + } +@@ -4648,7 +4648,7 @@ static void lmc_write_leveling_loop(struct ddr_priv *priv, int rankx) + // is high enough (DEV?) + // FIXME: do we want to show the bad bitmaps + // or delays here also? +- debug("N%d.LMC%d.R%d: H/W Write-Leveling had %s errors - retrying...\n", ++printf("N%d.LMC%d.R%d: H/W Write-Leveling had %s errors - retrying...\n", + node, if_num, rankx, + (wl_mask_err) ? "Bitmask" : "Validity"); + // this takes us back to the top without +@@ -4657,7 +4657,7 @@ static void lmc_write_leveling_loop(struct ddr_priv *priv, int rankx) + } + + // retries exhausted, do not print at normal VBL +- debug("N%d.LMC%d.R%d: H/W Write-Leveling issues: %s errors\n", ++printf("N%d.LMC%d.R%d: H/W Write-Leveling issues: %s errors\n", + node, if_num, rankx, + (wl_mask_err) ? "Bitmask" : "Validity"); + wloop_retries_exhausted++; +@@ -4712,7 +4712,7 @@ static void lmc_write_leveling_loop(struct ddr_priv *priv, int rankx) + + if (extra_bumps) { + if (wl_print > 1) { +- debug("N%d.LMC%d.R%d: HWL sample had %d bumps (0x%02x).\n", ++printf("N%d.LMC%d.R%d: HWL sample had %d bumps (0x%02x).\n", + node, if_num, rankx, extra_bumps, + extra_mask); + } +@@ -4739,7 +4739,7 @@ static void lmc_write_leveling_loop(struct ddr_priv *priv, int rankx) + &xmx, &xmc, &xxc, &xcc); + if (maj != xmaj) { + if (wl_print) { +- debug("N%d.LMC%d.R%d: Byte %d: HWL maj %d(%d), USING xmaj %d(%d)\n", ++printf("N%d.LMC%d.R%d: Byte %d: HWL maj %d(%d), USING xmaj %d(%d)\n", + node, if_num, rankx, + byte_idx, maj, xc, xmaj, xxc); + } +@@ -4764,7 +4764,7 @@ static void lmc_write_leveling_loop(struct ddr_priv *priv, int rankx) + hwl_alts[rankx].hwl_alt_delay[byte_idx] = + ix << 1; + if (wl_print > 1) { +- debug("N%d.LMC%d.R%d: SWL_TRY_HWL_ALT: Byte %d maj %d (%d) alt %d (%d).\n", ++printf("N%d.LMC%d.R%d: SWL_TRY_HWL_ALT: Byte %d maj %d (%d) alt %d (%d).\n", + node, + if_num, + rankx, +@@ -4820,13 +4820,13 @@ static void lmc_write_leveling_loop(struct ddr_priv *priv, int rankx) + // FIXME: does this help make the output a little easier + // to focus? + if (wl_print > 0) +- debug("-----------\n"); ++printf("-----------\n"); + + } /* if (wl_loops > 1) */ + + // maybe print an error summary for the rank + if (wl_mask_err_rank != 0 || wl_val_err_rank != 0) { +- debug("N%d.LMC%d.R%d: H/W Write-Leveling errors - %d bitmask, %d validity, %d retries, %d exhausted\n", ++printf("N%d.LMC%d.R%d: H/W Write-Leveling errors - %d bitmask, %d validity, %d retries, %d exhausted\n", + node, if_num, rankx, wl_mask_err_rank, + wl_val_err_rank, wloop_retries_total, + wloop_retries_exhausted); +@@ -4987,12 +4987,12 @@ static void lmc_write_leveling(struct ddr_priv *priv) + wl_pbm_pump = 4; // FIXME: is 4 too much? + + if (wl_loops) { +- debug("N%d.LMC%d: Performing Hardware Write-Leveling\n", node, ++printf("N%d.LMC%d: Performing Hardware Write-Leveling\n", node, + if_num); + } else { + /* Force software write-leveling to run */ + wl_mask_err = 1; +- debug("N%d.LMC%d: Forcing software Write-Leveling\n", node, ++printf("N%d.LMC%d: Forcing software Write-Leveling\n", node, + if_num); + } + +@@ -5004,7 +5004,7 @@ static void lmc_write_leveling(struct ddr_priv *priv) + save_mode32b = cfg.cn78xx.mode32b; + cfg.cn78xx.mode32b = (!if_64b); + lmc_wr(priv, CVMX_LMCX_CONFIG(if_num), cfg.u64); +- debug("%-45s : %d\n", "MODE32B", cfg.cn78xx.mode32b); ++printf("%-45s : %d\n", "MODE32B", cfg.cn78xx.mode32b); + + s = lookup_env(priv, "ddr_wlevel_roundup"); + if (s) +@@ -5045,7 +5045,7 @@ static void lmc_write_leveling(struct ddr_priv *priv) + if (dram_width == 4) { + default_bitmask = 0x0f; + if (wl_print) { +- debug("N%d.LMC%d: WLEVEL_CTL: default bitmask is 0x%02x for DDR4 x4\n", ++printf("N%d.LMC%d: WLEVEL_CTL: default bitmask is 0x%02x for DDR4 x4\n", + node, if_num, default_bitmask); + } + } +@@ -5066,7 +5066,7 @@ static void lmc_write_leveling(struct ddr_priv *priv) + // print only if not defaults + if (wl_ctl.s.or_dis != default_or_dis || + wl_ctl.s.bitmask != default_bitmask) { +- debug("N%d.LMC%d: WLEVEL_CTL: or_dis=%d, bitmask=0x%02x\n", ++printf("N%d.LMC%d: WLEVEL_CTL: or_dis=%d, bitmask=0x%02x\n", + node, if_num, wl_ctl.s.or_dis, wl_ctl.s.bitmask); + } + +@@ -5081,14 +5081,14 @@ static void lmc_write_leveling(struct ddr_priv *priv) + cfg.u64 = lmc_rd(priv, CVMX_LMCX_CONFIG(if_num)); + cfg.cn78xx.mode32b = save_mode32b; + lmc_wr(priv, CVMX_LMCX_CONFIG(if_num), cfg.u64); +- debug("%-45s : %d\n", "MODE32B", cfg.cn78xx.mode32b); ++printf("%-45s : %d\n", "MODE32B", cfg.cn78xx.mode32b); + + // At the end of HW Write Leveling, check on some DESKEW things... + if (!disable_deskew_training) { + struct deskew_counts dsk_counts; + int retry_count = 0; + +- debug("N%d.LMC%d: Check Deskew Settings before Read-Leveling.\n", ++printf("N%d.LMC%d: Check Deskew Settings before Read-Leveling.\n", + node, if_num); + + do { +@@ -5102,7 +5102,7 @@ static void lmc_write_leveling(struct ddr_priv *priv) + (dsk_counts.nibrng_errs != 0 || + dsk_counts.nibunl_errs != 0)) { + retry_count++; +- debug("N%d.LMC%d: Deskew Status indicates saturation or nibble errors - retry %d Training.\n", ++printf("N%d.LMC%d: Deskew Status indicates saturation or nibble errors - retry %d Training.\n", + node, if_num, retry_count); + perform_deskew_training(priv, rank_mask, if_num, + spd_rawcard_aorb); +@@ -5127,21 +5127,21 @@ static void lmc_workaround(struct ddr_priv *priv) + ctrl.u64 = lmc_rd(priv, CVMX_LMCX_CONTROL(if_num)); + + if (tp1.cn78xx.trcd == 0) { +- debug("Workaround Trcd overflow by using Additive latency.\n"); ++printf("Workaround Trcd overflow by using Additive latency.\n"); + /* Hard code this to 12 and enable additive latency */ + tp1.cn78xx.trcd = 12; + mp0.s.al = 2; /* CL-2 */ + ctrl.s.pocas = 1; + +- debug("MODEREG_PARAMS0 : 0x%016llx\n", ++printf("MODEREG_PARAMS0 : 0x%016llx\n", + mp0.u64); + lmc_wr(priv, CVMX_LMCX_MODEREG_PARAMS0(if_num), + mp0.u64); +- debug("TIMING_PARAMS1 : 0x%016llx\n", ++printf("TIMING_PARAMS1 : 0x%016llx\n", + tp1.u64); + lmc_wr(priv, CVMX_LMCX_TIMING_PARAMS1(if_num), tp1.u64); + +- debug("LMC_CONTROL : 0x%016llx\n", ++printf("LMC_CONTROL : 0x%016llx\n", + ctrl.u64); + lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), ctrl.u64); + +@@ -5160,7 +5160,7 @@ static void lmc_workaround(struct ddr_priv *priv) + if (!disable_deskew_training) { + struct deskew_counts dsk_counts; + +- debug("N%d.LMC%d: Check Deskew Settings before software Write-Leveling.\n", ++printf("N%d.LMC%d: Check Deskew Settings before software Write-Leveling.\n", + node, if_num); + validate_deskew_training(priv, rank_mask, if_num, &dsk_counts, + 3); +@@ -5195,7 +5195,7 @@ static void lmc_workaround(struct ddr_priv *priv) + if (dll_ctl3.s.wr_deskew_ena == 1 && increased_dsk_adj) { + ext_cfg.s.drive_ena_bprch = 1; + lmc_wr(priv, CVMX_LMCX_EXT_CONFIG(if_num), ext_cfg.u64); +- debug("LMC%d: Forcing DRIVE_ENA_BPRCH for Workaround Errata 26304.\n", ++printf("LMC%d: Forcing DRIVE_ENA_BPRCH for Workaround Errata 26304.\n", + if_num); + } + } +@@ -5255,7 +5255,7 @@ static void ddr4_vref_loop(struct ddr_priv *priv, int rankx) + + /* Always print the computed first if its valid */ + if (computed_final_vref_val >= 0) { +- debug("N%d.LMC%d.R%d: vref Computed Summary : %2d (0x%02x)\n", ++printf("N%d.LMC%d.R%d: vref Computed Summary : %2d (0x%02x)\n", + node, if_num, rankx, + computed_final_vref_val, computed_final_vref_val); + } +@@ -5296,7 +5296,7 @@ static void ddr4_vref_loop(struct ddr_priv *priv, int rankx) + vrhi = 1; + vvhi -= VREF_RANGE2_LIMIT; + } +- debug("N%d.LMC%d.R%d: vref Training Summary : 0x%02x/%1d <----- 0x%02x/%1d -----> 0x%02x/%1d, range: %2d\n", ++printf("N%d.LMC%d.R%d: vref Training Summary : 0x%02x/%1d <----- 0x%02x/%1d -----> 0x%02x/%1d, range: %2d\n", + node, if_num, rankx, vvlo, vrlo, + final_vref_val, + final_vref_range + 1, vvhi, vrhi, +@@ -5317,7 +5317,7 @@ static void ddr4_vref_loop(struct ddr_priv *priv, int rankx) + final_vref_range = (mp2.u64 >> + (rankx * 10 + 9)) & 0x01; + +- debug("N%d.LMC%d.R%d: vref Using Default : %2d <----- %2d (0x%02x) -----> %2d, range%1d\n", ++printf("N%d.LMC%d.R%d: vref Using Default : %2d <----- %2d (0x%02x) -----> %2d, range%1d\n", + node, if_num, rankx, final_vref_val, + final_vref_val, final_vref_val, + final_vref_val, final_vref_range + 1); +@@ -5375,7 +5375,7 @@ static void lmc_sw_write_leveling_loop(struct ddr_priv *priv, int rankx) + sum_dram_ops += stop_dram_ops - start_dram_ops; + } + +- debug("WL pass1: test_dram_byte returned 0x%x\n", errors); ++printf("WL pass1: test_dram_byte returned 0x%x\n", errors); + + // remember, errors will not be returned for byte-lanes that have + // maxxed out... +@@ -5396,13 +5396,13 @@ static void lmc_sw_write_leveling_loop(struct ddr_priv *priv, int rankx) + delay = byte_delay[b]; + // yes, an error in this byte lane + if (errors & (1 << b)) { +- debug(" byte %d delay %2d Errors\n", b, delay); ++printf(" byte %d delay %2d Errors\n", b, delay); + // since this byte had an error, we move to the next + // delay value, unless done with it + delay += 8; // incr by 8 to do delay high-order bits + if (delay < 32) { + upd_wl_rank(&wl_rank, b, delay); +- debug(" byte %d delay %2d New\n", ++printf(" byte %d delay %2d New\n", + b, delay); + byte_delay[b] = delay; + } else { +@@ -5422,9 +5422,9 @@ static void lmc_sw_write_leveling_loop(struct ddr_priv *priv, int rankx) + ~(1 << b); + upd_wl_rank(&wl_rank, b, delay); + byte_delay[b] = delay; +- debug(" byte %d delay %2d ALTERNATE\n", ++printf(" byte %d delay %2d ALTERNATE\n", + b, delay); +- debug("N%d.LMC%d.R%d: SWL: Byte %d: %d FAIL, trying ALTERNATE %d\n", ++printf("N%d.LMC%d.R%d: SWL: Byte %d: %d FAIL, trying ALTERNATE %d\n", + node, if_num, + rankx, b, bad_delay, delay); + +@@ -5448,12 +5448,12 @@ static void lmc_sw_write_leveling_loop(struct ddr_priv *priv, int rankx) + bytes_todo &= ~(1 << b); + // make sure this is set for this case + byte_test_status[b] = WL_ESTIMATED; +- debug(" byte %d delay %2d Exhausted\n", ++printf(" byte %d delay %2d Exhausted\n", + b, delay); + if (!measured_vref_flag) { + // this is too noisy when doing + // measured VREF +- debug("N%d.LMC%d.R%d: SWL: Byte %d (0x%02x): delay %d EXHAUSTED\n", ++printf("N%d.LMC%d.R%d: SWL: Byte %d (0x%02x): delay %d EXHAUSTED\n", + node, if_num, rankx, + b, bits_bad, delay); + } +@@ -5462,7 +5462,7 @@ static void lmc_sw_write_leveling_loop(struct ddr_priv *priv, int rankx) + } else { + // no error, stay with current delay, but keep testing + // it... +- debug(" byte %d delay %2d Passed\n", b, delay); ++printf(" byte %d delay %2d Passed\n", b, delay); + byte_test_status[b] = WL_HARDWARE; // change status + } + } /* for (b = 0; b < 9; ++b) */ +@@ -5530,7 +5530,7 @@ static void sw_write_lvl_use_ecc(struct ddr_priv *priv, int rankx) + */ + // ESTIMATED means there may be an issue + if (byte_test_status[8] == WL_ESTIMATED) { +- debug("N%d.LMC%d.R%d: SWL: (%cDIMM): calculated ECC delay unexpected (%d/%d/%d)\n", ++printf("N%d.LMC%d.R%d: SWL: (%cDIMM): calculated ECC delay unexpected (%d/%d/%d)\n", + node, if_num, rankx, + (spd_rdimm ? 'R' : 'U'), wl_rank.s.byte4, + test_byte8, wl_rank.s.byte3); +@@ -5567,7 +5567,7 @@ static __maybe_unused void parallel_wl_block_delay(struct ddr_priv *priv, + bytes_todo = if_bytemask; + + for (wl_offset = sw_wl_offset; wl_offset >= 0; --wl_offset) { +- debug("Starting wl_offset for-loop: %d\n", wl_offset); ++printf("Starting wl_offset for-loop: %d\n", wl_offset); + + bytemask = 0; + +@@ -5587,7 +5587,7 @@ static __maybe_unused void parallel_wl_block_delay(struct ddr_priv *priv, + + // start a pass if there is any byte lane to test + while (bytemask != 0) { +- debug("Starting bytemask while-loop: 0x%llx\n", ++printf("Starting bytemask while-loop: 0x%llx\n", + bytemask); + + // write this set of WL delays +@@ -5609,7 +5609,7 @@ static __maybe_unused void parallel_wl_block_delay(struct ddr_priv *priv, + NULL); + } + +- debug("test_dram_byte returned 0x%x\n", errors); ++printf("test_dram_byte returned 0x%x\n", errors); + + // check errors by byte + for (b = 0; b < 8; ++b) { +@@ -5618,14 +5618,14 @@ static __maybe_unused void parallel_wl_block_delay(struct ddr_priv *priv, + + delay = byte_delay[b]; + if (errors & (1 << b)) { // yes, an error +- debug(" byte %d delay %2d Errors\n", ++printf(" byte %d delay %2d Errors\n", + b, delay); + byte_passed[b] = 0; + } else { // no error + byte_passed[b] += 1; + // Look for consecutive working settings + if (byte_passed[b] == (1 + wl_offset)) { +- debug(" byte %d delay %2d FULLY Passed\n", ++printf(" byte %d delay %2d FULLY Passed\n", + b, delay); + if (wl_offset == 1) { + byte_test_status[b] = +@@ -5646,7 +5646,7 @@ static __maybe_unused void parallel_wl_block_delay(struct ddr_priv *priv, + // delay updating!! + continue; + } else { +- debug(" byte %d delay %2d Passed\n", ++printf(" byte %d delay %2d Passed\n", + b, delay); + } + } +@@ -5658,20 +5658,20 @@ static __maybe_unused void parallel_wl_block_delay(struct ddr_priv *priv, + delay += 2; + if (delay < 32) { + upd_wl_rank(&wl_rank, b, delay); +- debug(" byte %d delay %2d New\n", ++printf(" byte %d delay %2d New\n", + b, delay); + byte_delay[b] = delay; + } else { + // reached max delay, done with this + // byte +- debug(" byte %d delay %2d Exhausted\n", ++printf(" byte %d delay %2d Exhausted\n", + b, delay); + // test no longer, remove from byte + // mask this pass + bytemask &= ~(0xffULL << (8 * b)); + } + } /* for (b = 0; b < 8; ++b) */ +- debug("End of for-loop: bytemask 0x%llx\n", bytemask); ++printf("End of for-loop: bytemask 0x%llx\n", bytemask); + } /* while (bytemask != 0) */ + } + +@@ -5684,7 +5684,7 @@ static __maybe_unused void parallel_wl_block_delay(struct ddr_priv *priv, + * Last resort. Use Rlevel settings to estimate + * Wlevel if software write-leveling fails + */ +- debug("Using RLEVEL as WLEVEL estimate for byte %d\n", ++printf("Using RLEVEL as WLEVEL estimate for byte %d\n", + b); + lmc_rlevel_rank.u64 = + lmc_rd(priv, CVMX_LMCX_RLEVEL_RANKX(rankx, +@@ -5787,7 +5787,7 @@ static int lmc_sw_write_leveling(struct ddr_priv *priv) + if (!(rank_mask & (1 << rankx))) + continue; + +- debug("N%d.LMC%d.R%d: Performing Software Write-Leveling %s\n", ++printf("N%d.LMC%d.R%d: Performing Software Write-Leveling %s\n", + node, if_num, rankx, + (sw_wl_hw) ? "with H/W assist" : + "with S/W algorithm"); +@@ -5845,7 +5845,7 @@ static int lmc_sw_write_leveling(struct ddr_priv *priv) + if (rank_addr > 0x10000000) + rank_addr += 0x10000000; + +- debug("N%d.LMC%d.R%d: Active Rank %d Address: 0x%llx\n", ++printf("N%d.LMC%d.R%d: Active Rank %d Address: 0x%llx\n", + node, if_num, rankx, active_rank, + rank_addr); + +@@ -5888,13 +5888,13 @@ static int lmc_sw_write_leveling(struct ddr_priv *priv) + sum_dram_dclk = 1; + percent_x10 = sum_dram_ops * 1000 / + sum_dram_dclk; +- debug("N%d.LMC%d.R%d: ops %llu, cycles %llu, used %llu.%llu%%\n", ++printf("N%d.LMC%d.R%d: ops %llu, cycles %llu, used %llu.%llu%%\n", + node, if_num, rankx, sum_dram_ops, + sum_dram_dclk, percent_x10 / 10, + percent_x10 % 10); + } + if (errors) { +- debug("End WLEV_64 while loop: vref_val %d(0x%x), errors 0x%02x\n", ++printf("End WLEV_64 while loop: vref_val %d(0x%x), errors 0x%02x\n", + vref_val, vref_val, errors); + } + // end parallel write-leveling block for +@@ -5904,7 +5904,7 @@ static int lmc_sw_write_leveling(struct ddr_priv *priv) + // when approp. + if (sw_wl_hw) { + if (wl_print) { +- debug("N%d.LMC%d.R%d: HW-assisted SWL - ECC estimate not needed.\n", ++printf("N%d.LMC%d.R%d: HW-assisted SWL - ECC estimate not needed.\n", + node, if_num, rankx); + } + goto no_ecc_estimate; +@@ -5972,7 +5972,7 @@ no_ecc_estimate: + if (vref_val_count > best_vref_val_count) { + best_vref_val_count = vref_val_count; + best_vref_val_start = vref_val_start; +- debug("N%d.LMC%d.R%d: vref Training (%2d) : 0x%02x <----- ???? -----> 0x%02x\n", ++printf("N%d.LMC%d.R%d: vref Training (%2d) : 0x%02x <----- ???? -----> 0x%02x\n", + node, if_num, rankx, vref_val, + best_vref_val_start, + best_vref_val_start + +@@ -5980,7 +5980,7 @@ no_ecc_estimate: + } + } else { + vref_val_count = 0; +- debug("N%d.LMC%d.R%d: vref Training (%2d) : failed\n", ++printf("N%d.LMC%d.R%d: vref Training (%2d) : failed\n", + node, if_num, rankx, vref_val); + } + } +@@ -5995,12 +5995,12 @@ no_ecc_estimate: + if (rank_addr > 0x10000000) + rank_addr += 0x10000000; + +- debug("Rank Address: 0x%llx\n", rank_addr); ++printf("Rank Address: 0x%llx\n", rank_addr); + + if (bytes_failed) { + // FIXME? the big hammer, did not even try SW WL pass2, + // assume only chip reset will help +- debug("N%d.LMC%d.R%d: S/W write-leveling pass 1 failed\n", ++printf("N%d.LMC%d.R%d: S/W write-leveling pass 1 failed\n", + node, if_num, rankx); + sw_wl_failed = 1; + } else { /* if (bytes_failed) */ +@@ -6033,7 +6033,7 @@ no_ecc_estimate: + } + + if (errors) { +- debug("N%d.LMC%d.R%d: Wlevel Rank Final Test errors 0x%03x\n", ++printf("N%d.LMC%d.R%d: Wlevel Rank Final Test errors 0x%03x\n", + node, if_num, rankx, errors); + sw_wl_failed = 1; + } +@@ -6041,7 +6041,7 @@ no_ecc_estimate: + + // FIXME? dump the WL settings, so we get more of a clue + // as to what happened where +- debug("N%d.LMC%d.R%d: Wlevel Rank %#4x, 0x%016llX : %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %s\n", ++printf("N%d.LMC%d.R%d: Wlevel Rank %#4x, 0x%016llX : %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %2d%3s %s\n", + node, if_num, rankx, wl_rank.s.status, wl_rank.u64, + wl_rank.s.byte8, wl_status_strings[byte_test_status[8]], + wl_rank.s.byte7, wl_status_strings[byte_test_status[7]], +@@ -6065,7 +6065,7 @@ no_ecc_estimate: + do_reset(NULL, 0, 0, NULL); + } else { + // return error flag so LMC init can be retried. +- debug("N%d.LMC%d.R%d: INFO: Short memory test indicates a retry is needed. Restarting LMC init...\n", ++printf("N%d.LMC%d.R%d: INFO: Short memory test indicates a retry is needed. Restarting LMC init...\n", + node, if_num, rankx); + return -EAGAIN; // 0 indicates restart possible. + } +@@ -6111,14 +6111,14 @@ no_ecc_estimate: + // if there are unused entries to be filled + if ((rank_mask & 0x0F) != 0x0F) { + if (rankx < 3) { +- debug("N%d.LMC%d.R%d: checking for WLEVEL_RANK unused entries.\n", ++printf("N%d.LMC%d.R%d: checking for WLEVEL_RANK unused entries.\n", + node, if_num, rankx); + + // if rank 0, write ranks 1 and 2 here if empty + if (rankx == 0) { + // check that rank 1 is empty + if (!(rank_mask & (1 << 1))) { +- debug("N%d.LMC%d.R%d: writing WLEVEL_RANK unused entry R%d.\n", ++printf("N%d.LMC%d.R%d: writing WLEVEL_RANK unused entry R%d.\n", + node, if_num, rankx, 1); + lmc_wr(priv, + CVMX_LMCX_WLEVEL_RANKX(1, +@@ -6128,7 +6128,7 @@ no_ecc_estimate: + + // check that rank 2 is empty + if (!(rank_mask & (1 << 2))) { +- debug("N%d.LMC%d.R%d: writing WLEVEL_RANK unused entry R%d.\n", ++printf("N%d.LMC%d.R%d: writing WLEVEL_RANK unused entry R%d.\n", + node, if_num, rankx, 2); + lmc_wr(priv, + CVMX_LMCX_WLEVEL_RANKX(2, +@@ -6140,7 +6140,7 @@ no_ecc_estimate: + // if rank 0, 1 or 2, write rank 3 here if empty + // check that rank 3 is empty + if (!(rank_mask & (1 << 3))) { +- debug("N%d.LMC%d.R%d: writing WLEVEL_RANK unused entry R%d.\n", ++printf("N%d.LMC%d.R%d: writing WLEVEL_RANK unused entry R%d.\n", + node, if_num, rankx, 3); + lmc_wr(priv, + CVMX_LMCX_WLEVEL_RANKX(3, +@@ -6154,7 +6154,7 @@ no_ecc_estimate: + /* Enable 32-bit mode if required. */ + cfg.u64 = lmc_rd(priv, CVMX_LMCX_CONFIG(if_num)); + cfg.cn78xx.mode32b = (!if_64b); +- debug("%-45s : %d\n", "MODE32B", cfg.cn78xx.mode32b); ++printf("%-45s : %d\n", "MODE32B", cfg.cn78xx.mode32b); + + /* Restore the ECC configuration */ + if (!sw_wl_hw_default) +@@ -6179,12 +6179,12 @@ static void lmc_dll(struct ddr_priv *priv) + lmc_rd(priv, CVMX_LMCX_DLL_CTL3(if_num)); + ddr_dll_ctl3.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL3(if_num)); + setting[i] = GET_DDR_DLL_CTL3(dll90_setting); +- debug("%d. LMC%d_DLL_CTL3[%d] = %016llx %d\n", i, if_num, ++printf("%d. LMC%d_DLL_CTL3[%d] = %016llx %d\n", i, if_num, + GET_DDR_DLL_CTL3(dll90_byte_sel), ddr_dll_ctl3.u64, + setting[i]); + } + +- debug("N%d.LMC%d: %-36s : %5d %5d %5d %5d %5d %5d %5d %5d %5d\n", ++printf("N%d.LMC%d: %-36s : %5d %5d %5d %5d %5d %5d %5d %5d %5d\n", + node, if_num, "DLL90 Setting 8:0", + setting[8], setting[7], setting[6], setting[5], setting[4], + setting[3], setting[2], setting[1], setting[0]); +@@ -6311,18 +6311,18 @@ static void lmc_final(struct ddr_priv *priv) + for (tad = 0; tad < num_tads; tad++) { + l2c_wr(priv, CVMX_L2C_TADX_INT_REL(tad), + l2c_rd(priv, CVMX_L2C_TADX_INT_REL(tad))); +- debug("%-45s : (%d) 0x%08llx\n", "CVMX_L2C_TAD_INT", tad, ++printf("%-45s : (%d) 0x%08llx\n", "CVMX_L2C_TAD_INT", tad, + l2c_rd(priv, CVMX_L2C_TADX_INT_REL(tad))); + } + + for (mci = 0; mci < num_mcis; mci++) { + l2c_wr(priv, CVMX_L2C_MCIX_INT_REL(mci), + l2c_rd(priv, CVMX_L2C_MCIX_INT_REL(mci))); +- debug("%-45s : (%d) 0x%08llx\n", "L2C_MCI_INT", mci, ++printf("%-45s : (%d) 0x%08llx\n", "L2C_MCI_INT", mci, + l2c_rd(priv, CVMX_L2C_MCIX_INT_REL(mci))); + } + +- debug("%-45s : 0x%08llx\n", "LMC_INT", ++printf("%-45s : 0x%08llx\n", "LMC_INT", + lmc_rd(priv, CVMX_LMCX_INT(if_num))); + } + +@@ -6366,7 +6366,7 @@ static void lmc_scrambling(struct ddr_priv *priv) + lmc_scramble_cfg0.u64 = simple_strtoull(s, NULL, 0); + ctrl.s.scramble_ena = 1; + } +- debug("%-45s : 0x%016llx\n", "LMC_SCRAMBLE_CFG0", ++printf("%-45s : 0x%016llx\n", "LMC_SCRAMBLE_CFG0", + lmc_scramble_cfg0.u64); + + lmc_wr(priv, CVMX_LMCX_SCRAMBLE_CFG0(if_num), lmc_scramble_cfg0.u64); +@@ -6376,7 +6376,7 @@ static void lmc_scrambling(struct ddr_priv *priv) + lmc_scramble_cfg1.u64 = simple_strtoull(s, NULL, 0); + ctrl.s.scramble_ena = 1; + } +- debug("%-45s : 0x%016llx\n", "LMC_SCRAMBLE_CFG1", ++printf("%-45s : 0x%016llx\n", "LMC_SCRAMBLE_CFG1", + lmc_scramble_cfg1.u64); + lmc_wr(priv, CVMX_LMCX_SCRAMBLE_CFG1(if_num), lmc_scramble_cfg1.u64); + +@@ -6386,7 +6386,7 @@ static void lmc_scrambling(struct ddr_priv *priv) + lmc_scramble_cfg2.u64 = simple_strtoull(s, NULL, 0); + ctrl.s.scramble_ena = 1; + } +- debug("%-45s : 0x%016llx\n", "LMC_SCRAMBLE_CFG2", ++printf("%-45s : 0x%016llx\n", "LMC_SCRAMBLE_CFG2", + lmc_scramble_cfg1.u64); + lmc_wr(priv, CVMX_LMCX_SCRAMBLE_CFG2(if_num), + lmc_scramble_cfg2.u64); +@@ -6395,7 +6395,7 @@ static void lmc_scrambling(struct ddr_priv *priv) + s = lookup_env_ull(priv, "ddr_ns_ctl"); + if (s) + lmc_ns_ctl.u64 = simple_strtoull(s, NULL, 0); +- debug("%-45s : 0x%016llx\n", "LMC_NS_CTL", lmc_ns_ctl.u64); ++printf("%-45s : 0x%016llx\n", "LMC_NS_CTL", lmc_ns_ctl.u64); + lmc_wr(priv, CVMX_LMCX_NS_CTL(if_num), lmc_ns_ctl.u64); + + lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), ctrl.u64); +@@ -6480,7 +6480,7 @@ static void rodt_loop(struct ddr_priv *priv, int rankx, struct rl_score + cc2.u64 = lmc_rd(priv, CVMX_LMCX_COMP_CTL2(if_num)); + udelay(1); /* Give it a little time to take affect */ + if (rl_print > 1) { +- debug("Read ODT_CTL : 0x%x (%d ohms)\n", ++printf("Read ODT_CTL : 0x%x (%d ohms)\n", + cc2.cn78xx.rodt_ctl, + imp_val->rodt_ohms[cc2.cn78xx.rodt_ctl]); + } +@@ -6833,7 +6833,7 @@ static void rodt_loop(struct ddr_priv *priv, int rankx, struct rl_score + imp_val->rodt_ohms[rodt_ctl], + WITH_RODT_BESTSCORE); + +- debug("-----------\n"); ++printf("-----------\n"); + } + } + +@@ -6855,18 +6855,18 @@ static void rodt_loop(struct ddr_priv *priv, int rankx, struct rl_score + num_values = __builtin_popcountll(temp_mask); + i = __builtin_ffsll(temp_mask) - 1; + +- debug("N%d.LMC%d.R%d: PERFECT: RODT %3d: Byte %d: mask 0x%02llx (%d): ", ++printf("N%d.LMC%d.R%d: PERFECT: RODT %3d: Byte %d: mask 0x%02llx (%d): ", + node, if_num, rankx, + imp_val->rodt_ohms[rodt_ctl], + i, temp_mask >> i, num_values); + + while (temp_mask != 0) { + i = __builtin_ffsll(temp_mask) - 1; +- debug("%2d(%2d) ", i, ++printf("%2d(%2d) ", i, + rodt_perfect_counts.count[i][i]); + temp_mask &= ~(1UL << i); + } /* while (temp_mask != 0) */ +- debug("\n"); ++printf("\n"); + } + } + } +@@ -6909,7 +6909,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + dimm_rank_mask <<= 2; + } + } +- debug("DIMM rank mask: 0x%x, rank mask: 0x%x, rankx: %d\n", ++printf("DIMM rank mask: 0x%x, rank mask: 0x%x, rankx: %d\n", + dimm_rank_mask, rank_mask, rankx); + + // this is the start of the BEST ROW SCORE LOOP +@@ -6917,7 +6917,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + for (rtt_idx = min_rtt_nom_idx; rtt_idx <= max_rtt_nom_idx; ++rtt_idx) { + rtt_nom = imp_val->rtt_nom_table[rtt_idx]; + +- debug("N%d.LMC%d.R%d: starting RTT_NOM %d (%d)\n", ++printf("N%d.LMC%d.R%d: starting RTT_NOM %d (%d)\n", + node, if_num, rankx, rtt_nom, + imp_val->rtt_nom_ohms[rtt_nom]); + +@@ -6931,7 +6931,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // evaluating, but we need to allow all the + // non-skipped ones to be candidates for "best" + if (((1 << rodt_ctl) & rodt_row_skip_mask) != 0) { +- debug("N%d.LMC%d.R%d: SKIPPING rodt:%d (%d) with rank_score:%d\n", ++printf("N%d.LMC%d.R%d: SKIPPING rodt:%d (%d) with rank_score:%d\n", + node, if_num, rankx, rodt_ctl, + next_ohms, next_score); + continue; +@@ -6966,7 +6966,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + } + // else next_score is less than current best, + // so always choose it +- debug("N%d.LMC%d.R%d: new best score: rank %d, rodt %d(%3d), new best %d, previous best %d(%d)\n", ++printf("N%d.LMC%d.R%d: new best score: rank %d, rodt %d(%3d), new best %d, previous best %d(%d)\n", + node, if_num, rankx, orankx, rodt_ctl, next_ohms, next_score, + best_rank_score, best_rank_ohms); + best_rank_score = next_score; +@@ -7097,7 +7097,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + } + } + } +- debug("N%d.LMC%d.R%d: RLROWS: selected %d+%d, zero_scores %d+%d, mask_skipped %d+%d, score_skipped %d+%d\n", ++printf("N%d.LMC%d.R%d: RLROWS: selected %d+%d, zero_scores %d+%d, mask_skipped %d+%d, score_skipped %d+%d\n", + node, if_num, rankx, selected_rows[0], selected_rows[1], + zero_scores[0], zero_scores[1], mask_skipped[0], mask_skipped[1], + score_skipped[0], score_skipped[1]); +@@ -7184,7 +7184,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + } + + if (rl_print) { +- debug("N%d.LMC%d.R%d: START: Byte %d: best %d is different by %d from average %d, using %d.\n", ++printf("N%d.LMC%d.R%d: START: Byte %d: best %d is different by %d from average %d, using %d.\n", + node, if_num, rankx, + i, best_byte, avg_diff, avg_byte, new_byte); + } +@@ -7268,7 +7268,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + } + + if (rl_print) { +- debug("N%d.LMC%d.R%d: COUNT: Byte %d: orig %d now %d, more %d same %d less %d (%d/%d/%d)\n", ++printf("N%d.LMC%d.R%d: COUNT: Byte %d: orig %d now %d, more %d same %d less %d (%d/%d/%d)\n", + node, if_num, rankx, + i, orig_best_byte, best_byte, + count_more, count_same, count_less, +@@ -7313,7 +7313,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + } + + if (rl_print) { +- debug("N%d.LMC%d.R%d: AVERAGE: Byte %d: neighbor %d too different %d from average %d, picking %d.\n", ++printf("N%d.LMC%d.R%d: AVERAGE: Byte %d: neighbor %d too different %d from average %d, picking %d.\n", + node, if_num, rankx, + i, neighbor, neigh_byte, avg_pick, + new_byte); +@@ -7345,14 +7345,14 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // print only when majority choice is + // different from average + if (rl_print) { +- debug("N%d.LMC%d.R%d: MAJORTY: Byte %d: picking majority of %d over average %d.\n", ++printf("N%d.LMC%d.R%d: MAJORTY: Byte %d: picking majority of %d over average %d.\n", + node, if_num, rankx, i, maj_byte, + new_byte); + } + new_byte = maj_byte; + } else { + if (rl_print) { +- debug("N%d.LMC%d.R%d: AVERAGE: Byte %d: picking average of %d.\n", ++printf("N%d.LMC%d.R%d: AVERAGE: Byte %d: picking average of %d.\n", + node, if_num, rankx, i, new_byte); + } + } +@@ -7380,7 +7380,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // ignore if less than + if (rank_maj < new_byte) { + if (rl_print) { +- debug("N%d.LMC%d.R%d: RANKMAJ: Byte %d: LESS: NOT using %d over %d.\n", ++printf("N%d.LMC%d.R%d: RANKMAJ: Byte %d: LESS: NOT using %d over %d.\n", + node, if_num, + rankx, i, + rank_maj, +@@ -7398,7 +7398,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // majority choice is + // selected + if (rl_print) { +- debug("N%d.LMC%d.R%d: RANKMAJ: Byte %d: picking %d over %d.\n", ++printf("N%d.LMC%d.R%d: RANKMAJ: Byte %d: picking %d over %d.\n", + node, + if_num, + rankx, +@@ -7413,7 +7413,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // have chosen RANKMAJ + // but did not + if (rl_print) { +- debug("N%d.LMC%d.R%d: RANKMAJ: Byte %d: NOT using %d over %d (best=%d,sum=%d).\n", ++printf("N%d.LMC%d.R%d: RANKMAJ: Byte %d: NOT using %d over %d (best=%d,sum=%d).\n", + node, + if_num, + rankx, +@@ -7435,7 +7435,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + if (new_byte == count_byte && count_same == 0) { + new_byte = orig_best_byte; + if (rl_print) { +- debug("N%d.LMC%d.R%d: FAILSAF: Byte %d: going back to original %d.\n", ++printf("N%d.LMC%d.R%d: FAILSAF: Byte %d: going back to original %d.\n", + node, if_num, rankx, i, new_byte); + } + } +@@ -7455,7 +7455,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + disable_rlv_bump_this_byte = 1; + i = __builtin_ffsll(temp_mask) - 1; + if (rl_print) +- debug("N%d.LMC%d.R%d: PERFECT: Byte %d: OFF1: mask 0x%02llx (%d): ", ++printf("N%d.LMC%d.R%d: PERFECT: Byte %d: OFF1: mask 0x%02llx (%d): ", + node, if_num, rankx, i, value_mask >> i, + num_values); + +@@ -7464,7 +7464,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + delay_count = rank_perf[rankx].count[i][i]; + sum_counts += delay_count; + if (rl_print) +- debug("%2d(%2d) ", i, delay_count); ++printf("%2d(%2d) ", i, delay_count); + if (delay_count >= delay_max) { + delay_max = delay_count; + del_val = i; +@@ -7475,7 +7475,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // if sum_counts is small, just use NEW_BYTE + if (sum_counts < pbm_lowsum_limit) { + if (rl_print) +- debug(": LOWSUM (%2d), choose ORIG ", ++printf(": LOWSUM (%2d), choose ORIG ", + sum_counts); + del_val = new_byte; + delay_max = rank_perf[rankx].count[i][del_val]; +@@ -7483,7 +7483,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + + // finish printing here... + if (rl_print) { +- debug(": USING %2d (%2d) D%d\n", del_val, ++printf(": USING %2d (%2d) D%d\n", del_val, + delay_max, disable_rlv_bump_this_byte); + } + +@@ -7498,7 +7498,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + + i = __builtin_ffsll(temp_mask) - 1; + if (rl_print) +- debug("N%d.LMC%d.R%d: PERFECT: Byte %d: mask 0x%02llx (%d): ", ++printf("N%d.LMC%d.R%d: PERFECT: Byte %d: mask 0x%02llx (%d): ", + node, if_num, rankx, i, value_mask >> i, + num_values); + while (temp_mask != 0) { +@@ -7506,7 +7506,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + delay_count = rank_perf[rankx].count[i][i]; + sum_counts += delay_count; + if (rl_print) +- debug("%2d(%2d) ", i, delay_count); ++printf("%2d(%2d) ", i, delay_count); + temp_mask &= ~(1UL << i); + } /* while (temp_mask != 0) */ + +@@ -7521,7 +7521,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // NEW_BYTE + if (sum_counts < pbm_lowsum_limit) { + if (rl_print) +- debug(": LOWSUM (%2d), choose ORIG", ++printf(": LOWSUM (%2d), choose ORIG", + sum_counts); + i = 99; // SPECIAL case... + } +@@ -7569,7 +7569,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // take the top + del_val += 1; + if (rl_print) +- debug(": TOP7 "); ++printf(": TOP7 "); + } + } + } +@@ -7578,7 +7578,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + + default: // all others... + if (rl_print) +- debug(": ABNORMAL, choose ORIG"); ++printf(": ABNORMAL, choose ORIG"); + + case 99: // special + // FIXME: choose original choice? +@@ -7591,7 +7591,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + + // finish printing here... + if (rl_print) +- debug(": USING %2d (%2d) D%d\n", del_val, ++printf(": USING %2d (%2d) D%d\n", del_val, + delay_count, disable_rlv_bump_this_byte); + new_byte = del_val; // override with best PBM choice + } else { +@@ -7599,7 +7599,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // FIXME: remove or increase VBL for this + // output... + if (rl_print) +- debug("N%d.LMC%d.R%d: PERFECT: Byte %d: ZERO PBMs, USING %d\n", ++printf("N%d.LMC%d.R%d: PERFECT: Byte %d: ZERO PBMs, USING %d\n", + node, if_num, rankx, i, + new_byte); + // prevent ODD bump, rely on original +@@ -7614,7 +7614,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + int bump_value = new_byte + rldelay_bump_incr; + + if (rl_print) { +- debug("N%d.LMC%d.R%d: RLVBUMP: Byte %d: CHANGING %d to %d (%s)\n", ++printf("N%d.LMC%d.R%d: RLVBUMP: Byte %d: CHANGING %d to %d (%s)\n", + node, if_num, rankx, i, + new_byte, bump_value, + (value_mask & +@@ -7630,7 +7630,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + count_less == 0) { + // we really should take best_byte + 1 + if (rl_print) { +- debug("N%d.LMC%d.R%d: CADJMOR: Byte %d: CHANGING %d to %d\n", ++printf("N%d.LMC%d.R%d: CADJMOR: Byte %d: CHANGING %d to %d\n", + node, if_num, rankx, i, + new_byte, best_byte + 1); + new_byte = best_byte + 1; +@@ -7638,7 +7638,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + } else if ((new_byte < best_byte) && (count_same > 0)) { + // we really should take best_byte + if (rl_print) { +- debug("N%d.LMC%d.R%d: CADJSAM: Byte %d: CHANGING %d to %d\n", ++printf("N%d.LMC%d.R%d: CADJSAM: Byte %d: CHANGING %d to %d\n", + node, if_num, rankx, i, + new_byte, best_byte); + new_byte = best_byte; +@@ -7648,7 +7648,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + count_more == 0 && count_less > 0) { + // we really should take best_byte + if (rl_print) { +- debug("N%d.LMC%d.R%d: CADJLE1: Byte %d: CHANGING %d to %d\n", ++printf("N%d.LMC%d.R%d: CADJLE1: Byte %d: CHANGING %d to %d\n", + node, if_num, rankx, i, + new_byte, best_byte); + new_byte = best_byte; +@@ -7656,7 +7656,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + } else if ((new_byte >= (best_byte + 2)) && + ((count_more > 0) || (count_same > 0))) { + if (rl_print) { +- debug("N%d.LMC%d.R%d: CADJLE2: Byte %d: CHANGING %d to %d\n", ++printf("N%d.LMC%d.R%d: CADJLE2: Byte %d: CHANGING %d to %d\n", + node, if_num, rankx, i, + new_byte, best_byte + 1); + new_byte = best_byte + 1; +@@ -7665,7 +7665,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + } + + if (rl_print) { +- debug("N%d.LMC%d.R%d: SUMMARY: Byte %d: orig %d now %d, more %d same %d less %d, using %d\n", ++printf("N%d.LMC%d.R%d: SUMMARY: Byte %d: orig %d now %d, more %d same %d less %d, using %d\n", + node, if_num, rankx, i, orig_best_byte, + best_byte, count_more, count_same, count_less, + new_byte); +@@ -7686,15 +7686,15 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + rl_rank.u64); + rl_rank.u64 = lmc_rd(priv, + CVMX_LMCX_RLEVEL_RANKX(rankx, if_num)); +- debug("Adjusting Read-Leveling per-RANK settings.\n"); ++printf("Adjusting Read-Leveling per-RANK settings.\n"); + } else { +- debug("Not Adjusting Read-Leveling per-RANK settings.\n"); ++printf("Not Adjusting Read-Leveling per-RANK settings.\n"); + } + display_rl_with_final(if_num, rl_rank, rankx); + + // FIXME: does this help make the output a little easier to focus? + if (rl_print > 0) +- debug("-----------\n"); ++printf("-----------\n"); + + #define RLEVEL_RANKX_EXTRAS_INCR 0 + // if there are unused entries to be filled +@@ -7720,7 +7720,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + if (rankx == 0) { + // check that rank 1 is empty + if (!(rank_mask & (1 << 1))) { +- debug("N%d.LMC%d.R%d: writing RLEVEL_RANK unused entry R%d.\n", ++printf("N%d.LMC%d.R%d: writing RLEVEL_RANK unused entry R%d.\n", + node, if_num, rankx, 1); + lmc_wr(priv, + CVMX_LMCX_RLEVEL_RANKX(1, +@@ -7730,7 +7730,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + + // check that rank 2 is empty + if (!(rank_mask & (1 << 2))) { +- debug("N%d.LMC%d.R%d: writing RLEVEL_RANK unused entry R%d.\n", ++printf("N%d.LMC%d.R%d: writing RLEVEL_RANK unused entry R%d.\n", + node, if_num, rankx, 2); + lmc_wr(priv, + CVMX_LMCX_RLEVEL_RANKX(2, +@@ -7742,7 +7742,7 @@ static void rank_major_loop(struct ddr_priv *priv, int rankx, struct rl_score + // if ranks 0, 1 or 2, write rank 3 here if empty + // check that rank 3 is empty + if (!(rank_mask & (1 << 3))) { +- debug("N%d.LMC%d.R%d: writing RLEVEL_RANK unused entry R%d.\n", ++printf("N%d.LMC%d.R%d: writing RLEVEL_RANK unused entry R%d.\n", + node, if_num, rankx, 3); + lmc_wr(priv, CVMX_LMCX_RLEVEL_RANKX(3, if_num), + temp_rl_rank.u64); +@@ -7905,7 +7905,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + + lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), ctl.u64); + +- debug("LMC%d: Performing Read-Leveling\n", if_num); ++printf("LMC%d: Performing Read-Leveling\n", if_num); + + rl_ctl.u64 = lmc_rd(priv, CVMX_LMCX_RLEVEL_CTL(if_num)); + +@@ -8004,11 +8004,11 @@ static void lmc_read_leveling(struct ddr_priv *priv) + if (s) + rl_print = simple_strtoul(s, NULL, 0); + +- debug("RLEVEL_CTL : 0x%016llx\n", ++printf("RLEVEL_CTL : 0x%016llx\n", + rl_ctl.u64); +- debug("RLEVEL_OFFSET : %6d\n", ++printf("RLEVEL_OFFSET : %6d\n", + rl_ctl.cn78xx.offset); +- debug("RLEVEL_OFFSET_EN : %6d\n", ++printf("RLEVEL_OFFSET_EN : %6d\n", + rl_ctl.cn78xx.offset_en); + + /* +@@ -8056,13 +8056,13 @@ static void lmc_read_leveling(struct ddr_priv *priv) + + i = 0; + while (c_cfg->rl_tbl[i].part) { +- debug("DIMM part number:\"%s\", SPD: \"%s\"\n", ++printf("DIMM part number:\"%s\", SPD: \"%s\"\n", + c_cfg->rl_tbl[i].part, part_number); + if ((strcmp(part_number, + c_cfg->rl_tbl[i].part) == 0) && + (abs(c_cfg->rl_tbl[i].speed - + 2 * ddr_hertz / (1000 * 1000)) < 10)) { +- debug("Using hard-coded read leveling for DIMM part number: \"%s\"\n", ++printf("Using hard-coded read leveling for DIMM part number: \"%s\"\n", + part_number); + rl_rank.u64 = + c_cfg->rl_tbl[i].rl_rank[if_num][rankx]; +@@ -8124,7 +8124,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + lmc_rd(priv, CVMX_LMCX_COMP_CTL2(if_num)); + /* Read again */ + cc2.u64 = lmc_rd(priv, CVMX_LMCX_COMP_CTL2(if_num)); +- debug("DDR__PTUNE/DDR__NTUNE : %d/%d\n", ++printf("DDR__PTUNE/DDR__NTUNE : %d/%d\n", + cc2.cn78xx.ddr__ptune, cc2.cn78xx.ddr__ntune); + } + +@@ -8161,8 +8161,8 @@ static void lmc_read_leveling(struct ddr_priv *priv) + mp1.u64); + + if (print_nom_ohms >= 0 && rl_print > 1) { +- debug("\n"); +- debug("RTT_NOM %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", ++printf("\n"); ++printf("RTT_NOM %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", + imp_val->rtt_nom_ohms[mp1.s.rtt_nom_11], + imp_val->rtt_nom_ohms[mp1.s.rtt_nom_10], + imp_val->rtt_nom_ohms[mp1.s.rtt_nom_01], +@@ -8199,7 +8199,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + + /* Read again */ + cc2.u64 = lmc_rd(priv, CVMX_LMCX_COMP_CTL2(if_num)); +- debug("DDR__PTUNE/DDR__NTUNE : %d/%d\n", ++printf("DDR__PTUNE/DDR__NTUNE : %d/%d\n", + cc2.cn78xx.ddr__ptune, cc2.cn78xx.ddr__ntune); + + ctl.u64 = lmc_rd(priv, CVMX_LMCX_CONTROL(if_num)); +@@ -8235,7 +8235,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + /* Read again */ + cc2.u64 = lmc_rd(priv, CVMX_LMCX_COMP_CTL2(if_num)); + +- debug("DDR__PTUNE/DDR__NTUNE : %d/%d\n", ++printf("DDR__PTUNE/DDR__NTUNE : %d/%d\n", + cc2.cn78xx.ptune, cc2.cn78xx.ntune); + } + +@@ -8282,7 +8282,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + if (dimm_count == 2 && num_ranks == 1) + rodt_row_skip_mask = 0; + +- debug("Evaluating Read-Leveling Scoreboard for AUTO settings.\n"); ++printf("Evaluating Read-Leveling Scoreboard for AUTO settings.\n"); + for (rtt_idx = min_rtt_nom_idx; + rtt_idx <= max_rtt_nom_idx; ++rtt_idx) { + rtt_nom = imp_val->rtt_nom_table[rtt_idx]; +@@ -8295,7 +8295,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + if (!(rank_mask & (1 << rankx))) + continue; + +- debug("rl_score[rtt_nom=%d][rodt_ctl=%d][rankx=%d].score:%d\n", ++printf("rl_score[rtt_nom=%d][rodt_ctl=%d][rankx=%d].score:%d\n", + rtt_nom, rodt_ctl, rankx, + rl_score[rtt_nom][rodt_ctl][rankx].score); + rodt_score += +@@ -8316,7 +8316,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + (rodt_score == best_rodt_score && + (imp_val->rodt_ohms[rodt_ctl] > + imp_val->rodt_ohms[auto_rodt_ctl]))) { +- debug("AUTO: new best score for rodt:%d (%d), new score:%d, previous score:%d\n", ++printf("AUTO: new best score for rodt:%d (%d), new score:%d, previous score:%d\n", + rodt_ctl, + imp_val->rodt_ohms[rodt_ctl], + rodt_score, +@@ -8353,7 +8353,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + + lmc_wr(priv, CVMX_LMCX_MODEREG_PARAMS1(if_num), + mp1.u64); +- debug("RTT_NOM %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", ++printf("RTT_NOM %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", + imp_val->rtt_nom_ohms[mp1.s.rtt_nom_11], + imp_val->rtt_nom_ohms[mp1.s.rtt_nom_10], + imp_val->rtt_nom_ohms[mp1.s.rtt_nom_01], +@@ -8363,7 +8363,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + mp1.s.rtt_nom_01, + mp1.s.rtt_nom_00); + +- debug("RTT_WR %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", ++printf("RTT_WR %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", + imp_val->rtt_wr_ohms[extr_wr(mp1.u64, 3)], + imp_val->rtt_wr_ohms[extr_wr(mp1.u64, 2)], + imp_val->rtt_wr_ohms[extr_wr(mp1.u64, 1)], +@@ -8373,7 +8373,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + extr_wr(mp1.u64, 1), + extr_wr(mp1.u64, 0)); + +- debug("DIC %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", ++printf("DIC %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", + imp_val->dic_ohms[mp1.s.dic_11], + imp_val->dic_ohms[mp1.s.dic_10], + imp_val->dic_ohms[mp1.s.dic_01], +@@ -8395,7 +8395,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + mp2.u64 = lmc_rd(priv, + CVMX_LMCX_MODEREG_PARAMS2(if_num)); + +- debug("RTT_PARK %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", ++printf("RTT_PARK %3d, %3d, %3d, %3d ohms : %x,%x,%x,%x\n", + imp_val->rtt_nom_ohms[mp2.s.rtt_park_11], + imp_val->rtt_nom_ohms[mp2.s.rtt_park_10], + imp_val->rtt_nom_ohms[mp2.s.rtt_park_01], +@@ -8405,14 +8405,14 @@ static void lmc_read_leveling(struct ddr_priv *priv) + mp2.s.rtt_park_01, + mp2.s.rtt_park_00); + +- debug("%-45s : 0x%x,0x%x,0x%x,0x%x\n", ++printf("%-45s : 0x%x,0x%x,0x%x,0x%x\n", + "VREF_RANGE", + mp2.s.vref_range_11, + mp2.s.vref_range_10, + mp2.s.vref_range_01, + mp2.s.vref_range_00); + +- debug("%-45s : 0x%x,0x%x,0x%x,0x%x\n", ++printf("%-45s : 0x%x,0x%x,0x%x,0x%x\n", + "VREF_VALUE", + mp2.s.vref_value_11, + mp2.s.vref_value_10, +@@ -8429,7 +8429,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + } + lmc_wr(priv, CVMX_LMCX_COMP_CTL2(if_num), cc2.u64); + cc2.u64 = lmc_rd(priv, CVMX_LMCX_COMP_CTL2(if_num)); +- debug("Read ODT_CTL : 0x%x (%d ohms)\n", ++printf("Read ODT_CTL : 0x%x (%d ohms)\n", + cc2.cn78xx.rodt_ctl, + imp_val->rodt_ohms[cc2.cn78xx.rodt_ctl]); + +@@ -8437,7 +8437,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + * Use the delays associated with the best score for + * each individual rank + */ +- debug("Evaluating Read-Leveling Scoreboard for per-RANK settings.\n"); ++printf("Evaluating Read-Leveling Scoreboard for per-RANK settings.\n"); + + // this is the the RANK MAJOR LOOP + for (rankx = 0; rankx < dimm_count * 4; rankx++) +@@ -8449,7 +8449,7 @@ static void lmc_read_leveling(struct ddr_priv *priv) + lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), ctl.u64); + ctl.u64 = lmc_rd(priv, CVMX_LMCX_CONTROL(if_num)); + /* Display final 2T value */ +- debug("DDR2T : %6d\n", ++printf("DDR2T : %6d\n", + ctl.cn78xx.ddr2t); + + ddr_init_seq(priv, rank_mask, if_num); +@@ -8570,7 +8570,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + ddr4_trrd_lmin = 6000; + ddr4_tccd_lmin = 6000; + +- debug("\nInitializing node %d DDR interface %d, DDR Clock %d, DDR Reference Clock %d, CPUID 0x%08x\n", ++printf("\nInitializing node %d DDR interface %d, DDR Clock %d, DDR Reference Clock %d, CPUID 0x%08x\n", + node, if_num, ddr_hertz, ddr_ref_hertz, read_c0_prid()); + + if (dimm_config_table[0].spd_addrs[0] == 0 && +@@ -8667,7 +8667,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + /* ddr_type only indicates DDR4 or DDR3 */ + ddr_type = (read_spd(&dimm_config_table[0], 0, + DDR4_SPD_KEY_BYTE_DEVICE_TYPE) == 0x0C) ? 4 : 3; +- debug("DRAM Device Type: DDR%d\n", ddr_type); ++printf("DRAM Device Type: DDR%d\n", ddr_type); + + if (ddr_type == DDR4_DRAM) { + int spd_module_type; +@@ -8696,7 +8696,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + DDR4_SPD_PACKAGE_TYPE); + if (spd_package & 0x80) { // non-monolithic device + is_stacked_die = ((spd_package & 0x73) == 0x11); +- debug("DDR4: Package Type 0x%02x (%s), %d die\n", ++printf("DDR4: Package Type 0x%02x (%s), %d die\n", + spd_package, signal_load[(spd_package & 3)], + ((spd_package >> 4) & 7) + 1); + is_3ds_dimm = ((spd_package & 3) == 2); // is it 3DS? +@@ -8710,7 +8710,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + } + } else if (spd_package != 0) { + // FIXME: print non-zero monolithic device definition +- debug("DDR4: Package Type MONOLITHIC: %d die, signal load %d\n", ++printf("DDR4: Package Type MONOLITHIC: %d die, signal load %d\n", + ((spd_package >> 4) & 7) + 1, (spd_package & 3)); + } + +@@ -8719,7 +8719,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + int spd_secondary_pkg = + read_spd(&dimm_config_table[0], 0, + DDR4_SPD_SECONDARY_PACKAGE_TYPE); +- debug("DDR4: Module Organization: ASYMMETRICAL: Secondary Package Type 0x%02x\n", ++printf("DDR4: Module Organization: ASYMMETRICAL: Secondary Package Type 0x%02x\n", + spd_secondary_pkg); + } else { + u64 bus_width = +@@ -8732,7 +8732,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + + die_capacity = (shift < 8) ? (256UL << shift) : + ((12UL << (shift & 1)) << 10); +- debug("DDR4: Module Organization: SYMMETRICAL: capacity per die %d %cbit\n", ++printf("DDR4: Module Organization: SYMMETRICAL: capacity per die %d %cbit\n", + (die_capacity > 512) ? (die_capacity >> 10) : + die_capacity, (die_capacity > 512) ? 'G' : 'M'); + module_cap = ((u64)die_capacity << 20) / 8UL * +@@ -8744,20 +8744,20 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + module_cap *= (u64)(((spd_package >> 4) & 7) + + 1); + } +- debug("DDR4: Module Organization: SYMMETRICAL: capacity per module %lld GB\n", ++printf("DDR4: Module Organization: SYMMETRICAL: capacity per module %lld GB\n", + module_cap >> 30); + } + + spd_rawcard = + 0xFF & read_spd(&dimm_config_table[0], 0, + DDR4_SPD_REFERENCE_RAW_CARD); +- debug("DDR4: Reference Raw Card 0x%02x\n", spd_rawcard); ++printf("DDR4: Reference Raw Card 0x%02x\n", spd_rawcard); + + spd_module_type = + read_spd(&dimm_config_table[0], 0, + DDR4_SPD_KEY_BYTE_MODULE_TYPE); + if (spd_module_type & 0x80) { // HYBRID module +- debug("DDR4: HYBRID module, type %s\n", ++printf("DDR4: HYBRID module, type %s\n", + ((spd_module_type & 0x70) == + 0x10) ? "NVDIMM" : "UNKNOWN"); + } +@@ -8792,7 +8792,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + if (manu_ids[mc] == spd_mfgr_id) + break; + +- debug("DDR4: RDIMM Register Manufacturer ID: %s, Revision: 0x%02x\n", ++printf("DDR4: RDIMM Register Manufacturer ID: %s, Revision: 0x%02x\n", + (mc >= 4) ? "UNKNOWN" : manu_names[mc], + spd_register_rev); + +@@ -8804,7 +8804,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + 0xFFU & read_spd(&dimm_config_table[0], 0, + DDR4_SPD_UDIMM_ADDR_MAPPING_FROM_EDGE); + spd_rdimm_registers = ((1 << (spd_mod_attr & 3)) >> 1); +- debug("DDR4: RDIMM Module Attributes (0x%02x): Register Type DDR4RCD%02d, DRAM rows %d, Registers %d\n", ++printf("DDR4: RDIMM Module Attributes (0x%02x): Register Type DDR4RCD%02d, DRAM rows %d, Registers %d\n", + spd_mod_attr, (spd_mod_attr >> 4) + 1, + ((1 << ((spd_mod_attr >> 2) & 3)) >> 1), + spd_rdimm_registers); +@@ -8838,12 +8838,12 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + 0xFF & read_spd(&dimm_config_table[0], 0, + DDR3_SPD_SDRAM_DEVICE_TYPE); + if (spd_package & 0x80) { // non-standard device +- debug("DDR3: Device Type 0x%02x (%s), %d die\n", ++printf("DDR3: Device Type 0x%02x (%s), %d die\n", + spd_package, signal_load[(spd_package & 3)], + ((1 << ((spd_package >> 4) & 7)) >> 1)); + } else if (spd_package != 0) { + // FIXME: print non-zero monolithic device definition +- debug("DDR3: Device Type MONOLITHIC: %d die, signal load %d\n", ++printf("DDR3: Device Type MONOLITHIC: %d die, signal load %d\n", + ((1 << (spd_package >> 4) & 7) >> 1), + (spd_package & 3)); + } +@@ -8851,7 +8851,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + spd_rawcard = + 0xFF & read_spd(&dimm_config_table[0], 0, + DDR3_SPD_REFERENCE_RAW_CARD); +- debug("DDR3: Reference Raw Card 0x%02x\n", spd_rawcard); ++printf("DDR3: Reference Raw Card 0x%02x\n", spd_rawcard); + spd_thermal_sensor = + read_spd(&dimm_config_table[0], 0, + DDR3_SPD_MODULE_THERMAL_SENSOR); +@@ -8870,14 +8870,14 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + spd_register_rev = + 0xFFU & read_spd(&dimm_config_table[0], 0, + DDR3_SPD_REGISTER_REVISION_NUMBER); +- debug("DDR3: RDIMM Register Manufacturer ID 0x%x Revision 0x%02x\n", ++printf("DDR3: RDIMM Register Manufacturer ID 0x%x Revision 0x%02x\n", + spd_mfgr_id, spd_register_rev); + // Module Attributes + spd_mod_attr = + 0xFFU & read_spd(&dimm_config_table[0], 0, + DDR3_SPD_ADDRESS_MAPPING); + spd_rdimm_registers = ((1 << (spd_mod_attr & 3)) >> 1); +- debug("DDR3: RDIMM Module Attributes (0x%02x): DRAM rows %d, Registers %d\n", ++printf("DDR3: RDIMM Module Attributes (0x%02x): DRAM rows %d, Registers %d\n", + spd_mod_attr, + ((1 << ((spd_mod_attr >> 2) & 3)) >> 1), + spd_rdimm_registers); +@@ -8886,13 +8886,13 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + } + + if (spd_thermal_sensor & 0x80) { +- debug("DDR%d: SPD: Thermal Sensor PRESENT\n", ++printf("DDR%d: SPD: Thermal Sensor PRESENT\n", + (ddr_type == DDR4_DRAM) ? 4 : 3); + } + +- debug("spd_addr : %#06x\n", spd_addr); +- debug("spd_org : %#06x\n", spd_org); +- debug("spd_banks : %#06x\n", spd_banks); ++printf("spd_addr : %#06x\n", spd_addr); ++printf("spd_org : %#06x\n", spd_org); ++printf("spd_banks : %#06x\n", spd_banks); + + row_bits = 12 + ((spd_addr >> 3) & 0x7); + col_bits = 9 + ((spd_addr >> 0) & 0x7); +@@ -8923,7 +8923,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + int by_rank_rodt, by_rank_wr, by_rank_park; + + // Do ODT settings changes which work best for 2R-1S configs +- debug("DDR4: 2R-1S special BY-RANK init ODT settings updated\n"); ++printf("DDR4: 2R-1S special BY-RANK init ODT settings updated\n"); + + // setup for modifying config table values - 2 ranks and 1 DIMM + odt_config = +@@ -9022,15 +9022,15 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + read_c0_prid()); + + row_lsb = column_bits_start + col_bits + bank_bits - (!if_64b); +- debug("row_lsb = column_bits_start + col_bits + bank_bits = %d\n", ++printf("row_lsb = column_bits_start + col_bits + bank_bits = %d\n", + row_lsb); + + pbank_lsb = row_lsb + row_bits + bunk_enable; +- debug("pbank_lsb = row_lsb + row_bits + bunk_enable = %d\n", pbank_lsb); ++printf("pbank_lsb = row_lsb + row_bits + bunk_enable = %d\n", pbank_lsb); + + if (lranks_per_prank > 1) { + pbank_lsb = row_lsb + row_bits + lranks_bits + bunk_enable; +- debug("DDR4: 3DS: pbank_lsb = (%d row_lsb) + (%d row_bits) + (%d lranks_bits) + (%d bunk_enable) = %d\n", ++printf("DDR4: 3DS: pbank_lsb = (%d row_lsb) + (%d row_bits) + (%d lranks_bits) + (%d bunk_enable) = %d\n", + row_lsb, row_bits, lranks_bits, bunk_enable, pbank_lsb); + } + +@@ -9069,7 +9069,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + * already set up. Just return the memory size + */ + if (priv->flags & FLAG_RAM_RESIDENT) { +- debug("Ram Boot: Skipping LMC config\n"); ++printf("Ram Boot: Skipping LMC config\n"); + return mem_size_mbytes; + } + +@@ -9088,7 +9088,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + char rank_spec[8]; + + printable_rank_spec(rank_spec, num_ranks, dram_width, spd_package); +- debug("Summary: %d %s%s %s %s, row bits=%d, col bits=%d, bank bits=%d\n", ++printf("Summary: %d %s%s %s %s, row bits=%d, col bits=%d, bank bits=%d\n", + dimm_count, dimm_type_name, (dimm_count > 1) ? "s" : "", + rank_spec, + (spd_ecc) ? "ECC" : "non-ECC", row_bits, col_bits, bank_bits); +@@ -9119,7 +9119,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + read_spd(&dimm_config_table[0], 0, + DDR3_SPD_CAS_LATENCIES_MSB)) << 8); + } +- debug("spd_cas_latency : %#06x\n", spd_cas_latency); ++printf("spd_cas_latency : %#06x\n", spd_cas_latency); + + if (ddr_type == DDR4_DRAM) { + /* +@@ -9210,43 +9210,43 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + spdftb * (signed char)read_spd(&dimm_config_table[0], 0, + DDR4_SPD_MIN_CAS_TO_CAS_DELAY_FINE_TCCD_LMIN); + +- debug("%-45s : %6d ps\n", "Medium Timebase (MTB)", spdmtb); +- debug("%-45s : %6d ps\n", "Fine Timebase (FTB)", spdftb); ++printf("%-45s : %6d ps\n", "Medium Timebase (MTB)", spdmtb); ++printf("%-45s : %6d ps\n", "Fine Timebase (FTB)", spdftb); + +- debug("%-45s : %6d ps (%ld MT/s)\n", ++printf("%-45s : %6d ps (%ld MT/s)\n", + "SDRAM Minimum Cycle Time (tCKAVGmin)", ddr4_tckavgmin, + pretty_psecs_to_mts(ddr4_tckavgmin)); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "SDRAM Maximum Cycle Time (tCKAVGmax)", ddr4_tckavgmax); +- debug("%-45s : %6d ps\n", "Minimum CAS Latency Time (taamin)", ++printf("%-45s : %6d ps\n", "Minimum CAS Latency Time (taamin)", + taamin); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum RAS to CAS Delay Time (tRCDmin)", ddr4_trdcmin); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum Row Precharge Delay Time (tRPmin)", ddr4_trpmin); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum Active to Precharge Delay (tRASmin)", + ddr4_trasmin); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum Active to Active/Refr. Delay (tRCmin)", + ddr4_trcmin); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum Refresh Recovery Delay (tRFC1min)", + ddr4_trfc1min); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum Refresh Recovery Delay (tRFC2min)", + ddr4_trfc2min); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum Refresh Recovery Delay (tRFC4min)", + ddr4_trfc4min); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum Four Activate Window Time (tFAWmin)", + ddr4_tfawmin); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum Act. to Act. Delay (tRRD_Smin)", ddr4_trrd_smin); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum Act. to Act. Delay (tRRD_Lmin)", ddr4_trrd_lmin); +- debug("%-45s : %6d ps\n", ++printf("%-45s : %6d ps\n", + "Minimum CAS to CAS Delay Time (tCCD_Lmin)", + ddr4_tccd_lmin); + +@@ -9272,7 +9272,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + spd_addr_mirror = read_spd(&dimm_config_table[0], 0, + DDR4_SPD_UDIMM_ADDR_MAPPING_FROM_EDGE) & 0x1; + } +- debug("spd_addr_mirror : %#06x\n", spd_addr_mirror); ++printf("spd_addr_mirror : %#06x\n", spd_addr_mirror); + } else { + spd_mtb_dividend = + 0xff & read_spd(&dimm_config_table[0], 0, +@@ -9348,17 +9348,17 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + /* Make sure that it is not 0 */ + ftb_divisor = (ftb_divisor == 0) ? 1 : ftb_divisor; + +- debug("spd_twr : %#06x\n", spd_twr); +- debug("spd_trcd : %#06x\n", spd_trcd); +- debug("spd_trrd : %#06x\n", spd_trrd); +- debug("spd_trp : %#06x\n", spd_trp); +- debug("spd_tras : %#06x\n", spd_tras); +- debug("spd_trc : %#06x\n", spd_trc); +- debug("spd_trfc : %#06x\n", spd_trfc); +- debug("spd_twtr : %#06x\n", spd_twtr); +- debug("spd_trtp : %#06x\n", spd_trtp); +- debug("spd_tfaw : %#06x\n", spd_tfaw); +- debug("spd_addr_mirror : %#06x\n", spd_addr_mirror); ++printf("spd_twr : %#06x\n", spd_twr); ++printf("spd_trcd : %#06x\n", spd_trcd); ++printf("spd_trrd : %#06x\n", spd_trrd); ++printf("spd_trp : %#06x\n", spd_trp); ++printf("spd_tras : %#06x\n", spd_tras); ++printf("spd_trc : %#06x\n", spd_trc); ++printf("spd_trfc : %#06x\n", spd_trfc); ++printf("spd_twtr : %#06x\n", spd_twtr); ++printf("spd_trtp : %#06x\n", spd_trtp); ++printf("spd_tfaw : %#06x\n", spd_tfaw); ++printf("spd_addr_mirror : %#06x\n", spd_addr_mirror); + + mtb_psec = spd_mtb_dividend * 1000 / spd_mtb_divisor; + taamin = mtb_psec * spd_taa_min; +@@ -9393,7 +9393,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + new_trfc = 260000; + } + } +- debug("N%d.LMC%d: Adjusting tRFC from %d to %d, for CN78XX Pass 2.x\n", ++printf("N%d.LMC%d: Adjusting tRFC from %d to %d, for CN78XX Pass 2.x\n", + node, if_num, trfc, new_trfc); + trfc = new_trfc; + } +@@ -9402,31 +9402,31 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + trtp = spd_trtp * mtb_psec; + tfaw = spd_tfaw * mtb_psec; + +- debug("Medium Timebase (MTB) : %6d ps\n", ++printf("Medium Timebase (MTB) : %6d ps\n", + mtb_psec); +- debug("Minimum Cycle Time (tckmin) : %6d ps (%ld MT/s)\n", ++printf("Minimum Cycle Time (tckmin) : %6d ps (%ld MT/s)\n", + tckmin, pretty_psecs_to_mts(tckmin)); +- debug("Minimum CAS Latency Time (taamin) : %6d ps\n", ++printf("Minimum CAS Latency Time (taamin) : %6d ps\n", + taamin); +- debug("Write Recovery Time (tWR) : %6d ps\n", ++printf("Write Recovery Time (tWR) : %6d ps\n", + twr); +- debug("Minimum RAS to CAS delay (tRCD) : %6d ps\n", ++printf("Minimum RAS to CAS delay (tRCD) : %6d ps\n", + trcd); +- debug("Minimum Row Active to Row Active delay (tRRD) : %6d ps\n", ++printf("Minimum Row Active to Row Active delay (tRRD) : %6d ps\n", + trrd); +- debug("Minimum Row Precharge Delay (tRP) : %6d ps\n", ++printf("Minimum Row Precharge Delay (tRP) : %6d ps\n", + trp); +- debug("Minimum Active to Precharge (tRAS) : %6d ps\n", ++printf("Minimum Active to Precharge (tRAS) : %6d ps\n", + tras); +- debug("Minimum Active to Active/Refresh Delay (tRC) : %6d ps\n", ++printf("Minimum Active to Active/Refresh Delay (tRC) : %6d ps\n", + trc); +- debug("Minimum Refresh Recovery Delay (tRFC) : %6d ps\n", ++printf("Minimum Refresh Recovery Delay (tRFC) : %6d ps\n", + trfc); +- debug("Internal write to read command delay (tWTR) : %6d ps\n", ++printf("Internal write to read command delay (tWTR) : %6d ps\n", + twtr); +- debug("Min Internal Rd to Precharge Cmd Delay (tRTP) : %6d ps\n", ++printf("Min Internal Rd to Precharge Cmd Delay (tRTP) : %6d ps\n", + trtp); +- debug("Minimum Four Activate Window Delay (tFAW) : %6d ps\n", ++printf("Minimum Four Activate Window Delay (tFAW) : %6d ps\n", + tfaw); + } + +@@ -9443,9 +9443,9 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + tclk_psecs, (ulong)tckmin); + } + +- debug("DDR Clock Rate (tCLK) : %6ld ps\n", ++printf("DDR Clock Rate (tCLK) : %6ld ps\n", + tclk_psecs); +- debug("Core Clock Rate (eCLK) : %6ld ps\n", ++printf("Core Clock Rate (eCLK) : %6ld ps\n", + eclk_psecs); + + s = env_get("ddr_use_ecc"); +@@ -9459,37 +9459,37 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + if_bytemask = if_64b ? (use_ecc ? 0x1ff : 0xff) + : (use_ecc ? 0x01f : 0x0f); + +- debug("DRAM Interface width: %d bits %s bytemask 0x%03x\n", ++printf("DRAM Interface width: %d bits %s bytemask 0x%03x\n", + if_64b ? 64 : 32, use_ecc ? "+ECC" : "", if_bytemask); + +- debug("\n------ Board Custom Configuration Settings ------\n"); +- debug("%-45s : %d\n", "MIN_RTT_NOM_IDX ", c_cfg->min_rtt_nom_idx); +- debug("%-45s : %d\n", "MAX_RTT_NOM_IDX ", c_cfg->max_rtt_nom_idx); +- debug("%-45s : %d\n", "MIN_RODT_CTL ", c_cfg->min_rodt_ctl); +- debug("%-45s : %d\n", "MAX_RODT_CTL ", c_cfg->max_rodt_ctl); +- debug("%-45s : %d\n", "MIN_CAS_LATENCY ", c_cfg->min_cas_latency); +- debug("%-45s : %d\n", "OFFSET_EN ", c_cfg->offset_en); +- debug("%-45s : %d\n", "OFFSET_UDIMM ", c_cfg->offset_udimm); +- debug("%-45s : %d\n", "OFFSET_RDIMM ", c_cfg->offset_rdimm); +- debug("%-45s : %d\n", "DDR_RTT_NOM_AUTO ", c_cfg->ddr_rtt_nom_auto); +- debug("%-45s : %d\n", "DDR_RODT_CTL_AUTO ", c_cfg->ddr_rodt_ctl_auto); ++printf("\n------ Board Custom Configuration Settings ------\n"); ++printf("%-45s : %d\n", "MIN_RTT_NOM_IDX ", c_cfg->min_rtt_nom_idx); ++printf("%-45s : %d\n", "MAX_RTT_NOM_IDX ", c_cfg->max_rtt_nom_idx); ++printf("%-45s : %d\n", "MIN_RODT_CTL ", c_cfg->min_rodt_ctl); ++printf("%-45s : %d\n", "MAX_RODT_CTL ", c_cfg->max_rodt_ctl); ++printf("%-45s : %d\n", "MIN_CAS_LATENCY ", c_cfg->min_cas_latency); ++printf("%-45s : %d\n", "OFFSET_EN ", c_cfg->offset_en); ++printf("%-45s : %d\n", "OFFSET_UDIMM ", c_cfg->offset_udimm); ++printf("%-45s : %d\n", "OFFSET_RDIMM ", c_cfg->offset_rdimm); ++printf("%-45s : %d\n", "DDR_RTT_NOM_AUTO ", c_cfg->ddr_rtt_nom_auto); ++printf("%-45s : %d\n", "DDR_RODT_CTL_AUTO ", c_cfg->ddr_rodt_ctl_auto); + if (spd_rdimm) +- debug("%-45s : %d\n", "RLEVEL_COMP_OFFSET", ++printf("%-45s : %d\n", "RLEVEL_COMP_OFFSET", + c_cfg->rlevel_comp_offset_rdimm); + else +- debug("%-45s : %d\n", "RLEVEL_COMP_OFFSET", ++printf("%-45s : %d\n", "RLEVEL_COMP_OFFSET", + c_cfg->rlevel_comp_offset_udimm); +- debug("%-45s : %d\n", "RLEVEL_COMPUTE ", c_cfg->rlevel_compute); +- debug("%-45s : %d\n", "DDR2T_UDIMM ", c_cfg->ddr2t_udimm); +- debug("%-45s : %d\n", "DDR2T_RDIMM ", c_cfg->ddr2t_rdimm); +- debug("%-45s : %d\n", "FPRCH2 ", c_cfg->fprch2); +- debug("%-45s : %d\n", "PTUNE_OFFSET ", c_cfg->ptune_offset); +- debug("%-45s : %d\n", "NTUNE_OFFSET ", c_cfg->ntune_offset); +- debug("-------------------------------------------------\n"); ++printf("%-45s : %d\n", "RLEVEL_COMPUTE ", c_cfg->rlevel_compute); ++printf("%-45s : %d\n", "DDR2T_UDIMM ", c_cfg->ddr2t_udimm); ++printf("%-45s : %d\n", "DDR2T_RDIMM ", c_cfg->ddr2t_rdimm); ++printf("%-45s : %d\n", "FPRCH2 ", c_cfg->fprch2); ++printf("%-45s : %d\n", "PTUNE_OFFSET ", c_cfg->ptune_offset); ++printf("%-45s : %d\n", "NTUNE_OFFSET ", c_cfg->ntune_offset); ++printf("-------------------------------------------------\n"); + + cl = divide_roundup(taamin, tclk_psecs); + +- debug("Desired CAS Latency : %6d\n", cl); ++printf("Desired CAS Latency : %6d\n", cl); + + min_cas_latency = c_cfg->min_cas_latency; + +@@ -9497,17 +9497,17 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + if (s) + min_cas_latency = simple_strtoul(s, NULL, 0); + +- debug("CAS Latencies supported in DIMM :"); ++printf("CAS Latencies supported in DIMM :"); + base_cl = (ddr_type == DDR4_DRAM) ? 7 : 4; + for (i = 0; i < 32; ++i) { + if ((spd_cas_latency >> i) & 1) { +- debug(" %d", i + base_cl); ++printf(" %d", i + base_cl); + max_cas_latency = i + base_cl; + if (min_cas_latency == 0) + min_cas_latency = i + base_cl; + } + } +- debug("\n"); ++printf("\n"); + + /* + * Use relaxed timing when running slower than the minimum +@@ -9518,7 +9518,7 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + ulong adjusted_tclk = taamin / min_cas_latency; + + cl = min_cas_latency; +- debug("Slow clock speed. Adjusting timing: tClk = %ld, Adjusted tClk = %ld\n", ++printf("Slow clock speed. Adjusting timing: tClk = %ld, Adjusted tClk = %ld\n", + tclk_psecs, adjusted_tclk); + tclk_psecs = adjusted_tclk; + } +@@ -9544,10 +9544,10 @@ int init_octeon3_ddr3_interface(struct ddr_priv *priv, + if (override_cas_latency != 0) + cl = override_cas_latency; + +- debug("CAS Latency : %6d\n", cl); ++printf("CAS Latency : %6d\n", cl); + + if ((cl * tckmin) > 20000) { +- debug("(CLactual * tckmin) = %d exceeds 20 ns\n", ++printf("(CLactual * tckmin) = %d exceeds 20 ns\n", + (cl * tckmin)); + } + +@@ -9919,10 +9919,10 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p, + int temp = simple_strtoul(s, NULL, 0); + + if (temp < 22 || temp > 28) { +- debug("N%d.LMC%d: ILLEGAL override of kshift to %d, using default %d\n", ++printf("N%d.LMC%d: ILLEGAL override of kshift to %d, using default %d\n", + node, if_num, temp, kshift); + } else { +- debug("N%d.LMC%d: overriding kshift (%d) to %d\n", ++printf("N%d.LMC%d: overriding kshift (%d) to %d\n", + node, if_num, kshift, temp); + kshift = temp; + } +@@ -9964,7 +9964,7 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p, + + cvmx_dram_address_extract_info(priv, p, &node_address, &lmc, &dimm, + &prank, &lrank, &bank, &row, &col); +- debug("%s: START at A:0x%012llx, N%d L%d D%d/%d R%d B%1x Row:%05x Col:%05x\n", ++printf("%s: START at A:0x%012llx, N%d L%d D%d/%d R%d B%1x Row:%05x Col:%05x\n", + __func__, p, node_address, lmc, dimm, prank, lrank, bank, + row, col); + +@@ -10232,17 +10232,17 @@ static int choose_best_hw_patterns(int lmc, int mode) + + case DBTRAIN_LFSR: // forced already + if (!octeon_is_cpuid(OCTEON_CN78XX_PASS2_X)) { +- debug("ERROR: illegal HW assist mode %d\n", mode); ++printf("ERROR: illegal HW assist mode %d\n", mode); + new_mode = DBTRAIN_TEST; + } + break; + + default: +- debug("ERROR: unknown HW assist mode %d\n", mode); ++printf("ERROR: unknown HW assist mode %d\n", mode); + } + + if (new_mode != mode) +- debug("%s: changing mode %d to %d\n", __func__, mode, new_mode); ++printf("%s: changing mode %d to %d\n", __func__, mode, new_mode); + + return new_mode; + } +@@ -10266,7 +10266,7 @@ int run_best_hw_patterns(struct ddr_priv *priv, int lmc, u64 phys_addr, + } + errs = test_dram_byte_hw(priv, lmc, phys_addr, mode, xor_data); + +- debug("%s: PATTERN %d at A:0x%012llx errors 0x%x\n", ++printf("%s: PATTERN %d at A:0x%012llx errors 0x%x\n", + __func__, pattern, phys_addr, errs); + + errors |= errs; +@@ -10321,7 +10321,7 @@ static void hw_assist_test_dll_offset(struct ddr_priv *priv, + 1ull << (28 + lmcx_config.s.pbank_lsb - lmcx_config.s.rank_ena + + (num_lmcs / 2)); + +- debug("N%d: %s: starting LMC%d with rank offset 0x%016llx\n", ++printf("N%d: %s: starting LMC%d with rank offset 0x%016llx\n", + node, __func__, lmc, (unsigned long long)hw_rank_offset); + + // start of pattern loop +@@ -10396,7 +10396,7 @@ static void hw_assist_test_dll_offset(struct ddr_priv *priv, + if (errors[rankx] & (1 << byte)) { + off_errors |= (1 << byte); + +- debug("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test %3d: Address 0x%012llx errors\n", ++printf("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test %3d: Address 0x%012llx errors\n", + node, lmc, rankx, byte, + mode_str, byte_offset, + phys_addr); +@@ -10404,7 +10404,7 @@ static void hw_assist_test_dll_offset(struct ddr_priv *priv, + // had started run + if (rank_delay_count + [rankx][byte] > 0) { +- debug("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test %3d: stopping a run here\n", ++printf("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test %3d: stopping a run here\n", + node, lmc, rankx, + byte, mode_str, + byte_offset); +@@ -10420,7 +10420,7 @@ static void hw_assist_test_dll_offset(struct ddr_priv *priv, + // first success, set run start + if (rank_delay_count[rankx] + [byte] == 0) { +- debug("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test %3d: starting a run here\n", ++printf("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test %3d: starting a run here\n", + node, lmc, rankx, + byte, mode_str, + byte_offset); +@@ -10446,7 +10446,7 @@ static void hw_assist_test_dll_offset(struct ddr_priv *priv, + [rankx][byte] = + rank_delay_start + [rankx][byte]; +- debug("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test %3d: updating best to %d/%d\n", ++printf("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test %3d: updating best to %d/%d\n", + node, lmc, rankx, + byte, mode_str, + byte_offset, +@@ -10486,7 +10486,7 @@ static void hw_assist_test_dll_offset(struct ddr_priv *priv, + BYTE_OFFSET_INCR; + pat_end = min(pat_end, rank_end); + +- debug("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test: Rank Window %3d:%3d\n", ++printf("N%d.LMC%d.R%d: Bytelane %d DLL %s Offset Test: Rank Window %3d:%3d\n", + node, lmc, rankx, byte, mode_str, + rank_beg, rank_end); + +@@ -10499,15 +10499,15 @@ static void hw_assist_test_dll_offset(struct ddr_priv *priv, + } + + // now print them on 1 line, descending order... +- debug("N%d.LMC%d: HW DLL %s Offset Pattern %d :", ++printf("N%d.LMC%d: HW DLL %s Offset Pattern %d :", + node, lmc, mode_str, pattern); + for (byte = byte_hi; byte >= byte_lo; --byte) +- debug(" %4d", pat_best_offset[byte]); +- debug("\n"); ++printf(" %4d", pat_best_offset[byte]); ++printf("\n"); + } + // end of pattern loop + +- debug("N%d.LMC%d: HW DLL %s Offset Average : ", node, lmc, mode_str); ++printf("N%d.LMC%d: HW DLL %s Offset Average : ", node, lmc, mode_str); + + // print in decending byte index order + for (byte = byte_hi; byte >= byte_lo; --byte) { +@@ -10519,9 +10519,9 @@ static void hw_assist_test_dll_offset(struct ddr_priv *priv, + + // print just the offset of all the bytes + if (bytelane == 0x0A) +- debug("%4d ", new_best_offset[byte]); ++printf("%4d ", new_best_offset[byte]); + else // print the bytelanes also +- debug("(byte %d) %4d ", byte, new_best_offset[byte]); ++printf("(byte %d) %4d ", byte, new_best_offset[byte]); + + // done with testing, load up the best offsets we found... + // disable offsets while we load... +@@ -10532,7 +10532,7 @@ static void hw_assist_test_dll_offset(struct ddr_priv *priv, + change_dll_offset_enable(priv, lmc, 1); + } + +- debug("\n"); ++printf("\n"); + } + + /* +@@ -10564,7 +10564,7 @@ static int perform_HW_dll_offset_tuning(struct ddr_priv *priv, + dram_tune_byte_bursts = strtoul(s, NULL, 10); + + // print current working values +- debug("N%d: H/W Tuning for bytelane %d will use %d loops, %d bursts, and %d patterns.\n", ++printf("N%d: H/W Tuning for bytelane %d will use %d loops, %d bursts, and %d patterns.\n", + node, bytelane, loops, dram_tune_byte_bursts, NUM_BYTE_PATTERNS); + + // FIXME? get flag from LMC0 only +@@ -10579,7 +10579,7 @@ static int perform_HW_dll_offset_tuning(struct ddr_priv *priv, + // do once for each active LMC + + for (lmc = 0; lmc < num_lmcs; lmc++) { +- debug("N%d: H/W Tuning: starting LMC%d bytelane %d tune.\n", ++printf("N%d: H/W Tuning: starting LMC%d bytelane %d tune.\n", + node, lmc, bytelane); + + /* Enable ECC for the HW tests */ +@@ -10602,7 +10602,7 @@ static int perform_HW_dll_offset_tuning(struct ddr_priv *priv, + } + + // perform cleanup on active LMC +- debug("N%d: H/W Tuning: finishing LMC%d bytelane %d tune.\n", ++printf("N%d: H/W Tuning: finishing LMC%d bytelane %d tune.\n", + node, lmc, bytelane); + + /* Restore ECC for DRAM tests */ +@@ -10642,9 +10642,9 @@ static int cvmx_tune_node(struct ddr_priv *priv) + int node = 0; + + // Automatically tune the data and ECC byte DLL read offsets +- debug("N%d: Starting DLL Read Offset Tuning for LMCs\n", node); ++printf("N%d: Starting DLL Read Offset Tuning for LMCs\n", node); + errs = perform_HW_dll_offset_tuning(priv, 2, 0x0A /* all bytelanes */); +- debug("N%d: Finished DLL Read Offset Tuning for LMCs, %d errors\n", ++printf("N%d: Finished DLL Read Offset Tuning for LMCs, %d errors\n", + node, errs); + tot_errs = errs; + +@@ -10655,11 +10655,11 @@ static int cvmx_tune_node(struct ddr_priv *priv) + if (str) + do_dllwo = !!strtoul(str, NULL, 0); + if (do_dllwo) { +- debug("N%d: Starting DLL Write Offset Tuning for LMCs\n", node); ++printf("N%d: Starting DLL Write Offset Tuning for LMCs\n", node); + errs = + perform_HW_dll_offset_tuning(priv, 1, + 0x0A /* all bytelanes */); +- debug("N%d: Finished DLL Write Offset Tuning for LMCs, %d errors\n", ++printf("N%d: Finished DLL Write Offset Tuning for LMCs, %d errors\n", + node, errs); + tot_errs += errs; + } +@@ -10749,7 +10749,7 @@ void cvmx_maybe_tune_node(struct ddr_priv *priv, u32 ddr_speed) + ddr_min_speed = ddr_speed_filter[is_ddr4][is_rdimm][is_1slot]; + do_tune = ((ddr_min_speed != 0) && (ddr_speed > ddr_min_speed)); + +- debug("N%d: DDR%d %cDIMM %d-slot at %d MHz %s eligible for auto-tuning.\n", ++printf("N%d: DDR%d %cDIMM %d-slot at %d MHz %s eligible for auto-tuning.\n", + node, (is_ddr4) ? 4 : 3, (is_rdimm) ? 'R' : 'U', + (is_1slot) ? 1 : 2, ddr_speed, (do_tune) ? "is" : "is not"); + +@@ -10793,7 +10793,7 @@ static void cvmx_dbi_switchover_interface(struct ddr_priv *priv, int lmc) + // FIXME: must filter out any non-supported configs + // ie, no DDR3, no x4 devices + if (ddr_pll_ctl.s.ddr4_mode == 0 || lmcx_config.s.mode_x4dev == 1) { +- debug("N%d.LMC%d: DBI switchover: inappropriate device; EXITING...\n", ++printf("N%d.LMC%d: DBI switchover: inappropriate device; EXITING...\n", + node, lmc); + return; + } +@@ -10803,7 +10803,7 @@ static void cvmx_dbi_switchover_interface(struct ddr_priv *priv, int lmc) + rank_offset = 1ull << (28 + lmcx_config.s.pbank_lsb - + lmcx_config.s.rank_ena + (num_lmcs / 2)); + +- debug("N%d.LMC%d: DBI switchover: rank mask 0x%x, rank size 0x%016llx.\n", ++printf("N%d.LMC%d: DBI switchover: rank mask 0x%x, rank size 0x%016llx.\n", + node, lmc, rank_mask, (unsigned long long)rank_offset); + + /* +@@ -10917,7 +10917,7 @@ static void cvmx_dbi_switchover_interface(struct ddr_priv *priv, int lmc) + new_cl = -1; + break; + } +- debug("N%d.LMC%d: DBI switchover: CL ADJ: old_cl 0x%x, old_cwl 0x%x, new_cl 0x%x.\n", ++printf("N%d.LMC%d: DBI switchover: CL ADJ: old_cl 0x%x, old_cwl 0x%x, new_cl 0x%x.\n", + node, lmc, old_cl, old_cwl, new_cl); + modereg_params0.s.cl = new_cl; + lmc_wr(priv, CVMX_LMCX_MODEREG_PARAMS0(lmc), +@@ -10960,7 +10960,7 @@ static void cvmx_dbi_switchover_interface(struct ddr_priv *priv, int lmc) + */ + + // NOW - do the training +- debug("N%d.LMC%d: DBI switchover: TRAINING begins...\n", node, lmc); ++printf("N%d.LMC%d: DBI switchover: TRAINING begins...\n", node, lmc); + + active_ranks = 0; + for (rankx = 0; rankx < rank_max; rankx++) { +@@ -10981,7 +10981,7 @@ restart_training: + errors = + test_dram_byte_hw(priv, lmc, phys_addr, DBTRAIN_DBI, NULL); + +- debug("N%d.LMC%d: DBI switchover: TEST: rank %d, phys_addr 0x%llx, errors 0x%x.\n", ++printf("N%d.LMC%d: DBI switchover: TEST: rank %d, phys_addr 0x%llx, errors 0x%x.\n", + node, lmc, rankx, (unsigned long long)phys_addr, errors); + + // NEXT - check for locking +@@ -10997,13 +10997,13 @@ restart_training: + dbi_settings, " RANK"); + + if (unlocked > 0) { +- debug("N%d.LMC%d: DBI switchover: LOCK: %d still unlocked.\n", ++printf("N%d.LMC%d: DBI switchover: LOCK: %d still unlocked.\n", + node, lmc, unlocked); + retries++; + if (retries < 10) { + goto restart_training; + } else { +- debug("N%d.LMC%d: DBI switchover: LOCK: %d retries exhausted.\n", ++printf("N%d.LMC%d: DBI switchover: LOCK: %d retries exhausted.\n", + node, lmc, retries); + } + } +diff --git a/drivers/ram/octeon/octeon_ddr.c b/drivers/ram/octeon/octeon_ddr.c +index e7b61d39f..10c5edd67 100644 +--- a/drivers/ram/octeon/octeon_ddr.c ++++ b/drivers/ram/octeon/octeon_ddr.c +@@ -156,7 +156,7 @@ static u32 octeon3_refclock(u32 alt_refclk, u32 ddr_hertz, + int ddr_type; + int spd_dimm_type; + +- debug("%s(%u, %u, %p)\n", __func__, alt_refclk, ddr_hertz, dimm_config); ++printf("%s(%u, %u, %p)\n", __func__, alt_refclk, ddr_hertz, dimm_config); + + /* Octeon 3 case... */ + +@@ -180,7 +180,7 @@ static u32 octeon3_refclock(u32 alt_refclk, u32 ddr_hertz, + ddr_type = get_ddr_type(dimm_config, 0); + spd_dimm_type = get_dimm_module_type(dimm_config, 0, ddr_type); + +- debug("ddr type: 0x%x, dimm type: 0x%x\n", ddr_type, ++printf("ddr type: 0x%x, dimm type: 0x%x\n", ddr_type, + spd_dimm_type); + /* Is DDR4 and RDIMM just to be sure. */ + if (ddr_type == DDR4_DRAM && +@@ -192,7 +192,7 @@ static u32 octeon3_refclock(u32 alt_refclk, u32 ddr_hertz, + } + } + +- debug("%s: speed: %u\n", __func__, ddr_ref_hertz); ++printf("%s: speed: %u\n", __func__, ddr_ref_hertz); + return ddr_ref_hertz; + } + +@@ -378,7 +378,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + + reset_ctl.u64 = lmc_rd(priv, CVMX_LMCX_RESET_CTL(i)); + if (reset_ctl.s.ddr3psv == 1) { +- debug("LMC%d Preserving memory\n", i); ++printf("LMC%d Preserving memory\n", i); + set_ddr_memory_preserved(priv); + + /* Re-initialize flags */ +@@ -604,13 +604,13 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + if (s) { + ddr_pll_ctl.cn78xx.dclk_invert = + !!simple_strtoul(s, NULL, 0); +- debug("LMC0: override DDR_PLL_CTL[dclk_invert] to %d\n", ++printf("LMC0: override DDR_PLL_CTL[dclk_invert] to %d\n", + ddr_pll_ctl.cn78xx.dclk_invert); + } + } + + lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(0), ddr_pll_ctl.u64); +- debug("%-45s : 0x%016llx\n", "LMC0: DDR_PLL_CTL", ++printf("%-45s : 0x%016llx\n", "LMC0: DDR_PLL_CTL", + ddr_pll_ctl.u64); + + // only when LMC1 is active +@@ -653,7 +653,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + !!simple_strtoul(s, NULL, 0); + override = 1; + } +- debug("LMC1: %s DDR_PLL_CTL[dclk_invert] to %d (LMC0 %d)\n", ++printf("LMC1: %s DDR_PLL_CTL[dclk_invert] to %d (LMC0 %d)\n", + (override) ? "override" : + "default", lmc1_dclk_invert, + lmc0_dclk_invert); +@@ -664,7 +664,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + + // but always write LMC1 CSR if it is active + lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(1), ddr_pll_ctl.u64); +- debug("%-45s : 0x%016llx\n", ++printf("%-45s : 0x%016llx\n", + "LMC1: DDR_PLL_CTL", ddr_pll_ctl.u64); + } + +@@ -688,7 +688,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + + reset_ctl.u64 = lmc_rd(priv, CVMX_LMCX_RESET_CTL(i)); + reset_ctl.cn78xx.ddr3rst = 0; /* Reset asserted */ +- debug("LMC%d Asserting DDR_RESET_L\n", i); ++printf("LMC%d Asserting DDR_RESET_L\n", i); + lmc_wr(priv, CVMX_LMCX_RESET_CTL(i), reset_ctl.u64); + lmc_rd(priv, CVMX_LMCX_RESET_CTL(i)); + } +@@ -716,7 +716,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + error = ddr_hertz; + best_error = ddr_hertz; + +- debug("DDR Reference Hertz = %d\n", ddr_ref_hertz); ++printf("DDR Reference Hertz = %d\n", ddr_ref_hertz); + + while (best_error == ddr_hertz) { + for (clkr = 0; clkr < 4; ++clkr) { +@@ -753,7 +753,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + if (abs(error) > abs(best_error)) + continue; + +- debug("clkr: %2llu, en[%d]: %2d, clkf: %4llu, pll_MHz: %4llu, ddr_hertz: %8llu, error: %8lld\n", ++printf("clkr: %2llu, en[%d]: %2d, clkf: %4llu, pll_MHz: %4llu, ddr_hertz: %8llu, error: %8lld\n", + clkr, save_en_idx, + _en[save_en_idx], clkf, pll_MHz, + calculated_ddr_hertz, error); +@@ -805,7 +805,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + ddr_hertz - best_calculated_ddr_hertz; + } + +- debug("clkr: %2llu, en[%d]: %2d, clkf: %4llu, pll_MHz: %4llu, ddr_hertz: %8llu, error: %8lld <==\n", ++printf("clkr: %2llu, en[%d]: %2d, clkf: %4llu, pll_MHz: %4llu, ddr_hertz: %8llu, error: %8lld <==\n", + best_clkr, best_en_idx, _en[best_en_idx], + best_clkf, best_pll_MHz, + best_calculated_ddr_hertz, best_error); +@@ -828,12 +828,12 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + } + + new_bwadj = (best_clkf + 1) / 10; +- debug("bwadj: %2d\n", new_bwadj); ++printf("bwadj: %2d\n", new_bwadj); + + s = lookup_env(priv, "ddr_pll_bwadj"); + if (s) { + new_bwadj = strtoul(s, NULL, 0); +- debug("bwadj: %2d\n", new_bwadj); ++printf("bwadj: %2d\n", new_bwadj); + } + + for (i = 0; i < 2; ++i) { +@@ -842,7 +842,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + + ddr_pll_ctl.u64 = + lmc_rd(priv, CVMX_LMCX_DDR_PLL_CTL(i)); +- debug("LMC%d: DDR_PLL_CTL : 0x%016llx\n", ++printf("LMC%d: DDR_PLL_CTL : 0x%016llx\n", + i, ddr_pll_ctl.u64); + + ddr_pll_ctl.cn78xx.ddr_ps_en = best_en_idx; +@@ -852,7 +852,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + ddr_pll_ctl.cn78xx.bwadj = new_bwadj; + + lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(i), ddr_pll_ctl.u64); +- debug("LMC%d: DDR_PLL_CTL : 0x%016llx\n", ++printf("LMC%d: DDR_PLL_CTL : 0x%016llx\n", + i, ddr_pll_ctl.u64); + + /* +@@ -1407,7 +1407,7 @@ int initialize_ddr_clock(struct ddr_priv *priv, struct ddr_conf *ddr_conf, + lmc_phy_ctl.s.lv_mode = (~i) & 1; + } + +- debug("LMC%d: PHY_CTL : 0x%016llx\n", ++printf("LMC%d: PHY_CTL : 0x%016llx\n", + i, lmc_phy_ctl.u64); + lmc_wr(priv, CVMX_LMCX_PHY_CTL(i), + lmc_phy_ctl.u64); +@@ -1517,9 +1517,9 @@ static u32 measure_octeon_ddr_clock(struct ddr_priv *priv, + calc_ddr_hertz = ddr_clocks * cpu_hertz / core_clocks; + } + +- debug("core clocks: %llu, ddr clocks: %llu, calc rate: %llu\n", ++printf("core clocks: %llu, ddr clocks: %llu, calc rate: %llu\n", + core_clocks, ddr_clocks, calc_ddr_hertz); +- debug("LMC%d: Measured DDR clock: %lld, cpu clock: %u, ddr clocks: %llu\n", ++printf("LMC%d: Measured DDR clock: %lld, cpu clock: %u, ddr clocks: %llu\n", + if_num, calc_ddr_hertz, cpu_hertz, ddr_clocks); + + /* Check for unreasonable settings. */ +@@ -1764,7 +1764,7 @@ restart_lmc_init: + } + } + +- debug("N0.LMC%d Configuration Completed: %d MB\n", ++printf("N0.LMC%d Configuration Completed: %d MB\n", + if_num, mem_size_mbytes); + + return mem_size_mbytes; +@@ -1832,10 +1832,10 @@ void rlevel_to_wlevel(union cvmx_lmcx_rlevel_rankx *lmc_rlevel_rank, + { + int byte_delay = get_rl_rank(lmc_rlevel_rank, byte); + +- debug("Estimating Wlevel delay byte %d: ", byte); +- debug("Rlevel=%d => ", byte_delay); ++printf("Estimating Wlevel delay byte %d: ", byte); ++printf("Rlevel=%d => ", byte_delay); + byte_delay = divide_roundup(byte_delay, 2) & 0x1e; +- debug("Wlevel=%d\n", byte_delay); ++printf("Wlevel=%d\n", byte_delay); + upd_wl_rank(lmc_wlevel_rank, byte, byte_delay); + } + +@@ -1981,7 +1981,7 @@ static void oct2_ddr3_seq(struct ddr_priv *priv, int rank_mask, int if_num, + * parts. See errata (LMC-14548) Issues with registered + * DIMMs. + */ +- debug("Forcing DDR 2T during init seq. Re: Pass 1 LMC-14548\n"); ++printf("Forcing DDR 2T during init seq. Re: Pass 1 LMC-14548\n"); + lmc_control.s.ddr2t = 1; + } + +@@ -1999,7 +1999,7 @@ static void oct2_ddr3_seq(struct ddr_priv *priv, int rank_mask, int if_num, + lmc_config.s.rankmask = rank_mask; + + #ifdef DEBUG_PERFORM_DDR3_SEQUENCE +- debug("Performing LMC sequence: rank_mask=0x%02x, sequence=%d, %s\n", ++printf("Performing LMC sequence: rank_mask=0x%02x, sequence=%d, %s\n", + rank_mask, sequence, sequence_str[sequence]); + #endif + +@@ -2126,7 +2126,7 @@ void process_custom_dll_offsets(struct ddr_priv *priv, int if_num, + + change_dll_offset_enable(priv, if_num, 1); + +- debug("N0.LMC%d: DLL %s Offset 8:0 : 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n", ++printf("N0.LMC%d: DLL %s Offset 8:0 : 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n", + if_num, (mode == 2) ? "Read " : "Write", + offset[8], offset[7], offset[6], offset[5], offset[4], + offset[3], offset[2], offset[1], offset[0]); +@@ -2335,7 +2335,7 @@ static int octeon_ddr_initialize(struct ddr_priv *priv, u32 cpu_hertz, + if (s) + l2c_ctl.cn78xx.rdf_cnt = simple_strtoul(s, NULL, 0); + +- debug("%-45s : %d, cpu_hertz:%d, ddr_hertz:%d\n", ++printf("%-45s : %d, cpu_hertz:%d, ddr_hertz:%d\n", + "EARLY FILL COUNT ", l2c_ctl.cn78xx.rdf_cnt, cpu_hertz, + ddr_hertz); + l2c_wr(priv, CVMX_L2C_CTL_REL, l2c_ctl.u64); +@@ -2452,7 +2452,7 @@ try_again: + } + } else { + if (ddr_ref_hertz == 100000000) { +- debug("N0: DRAM init: requested 100 MHz refclk NOT SUPPORTED\n"); ++printf("N0: DRAM init: requested 100 MHz refclk NOT SUPPORTED\n"); + ddr_ref_hertz = CONFIG_REF_HERTZ; + } + } +@@ -2485,20 +2485,20 @@ try_again: + abs((int)tmp_hertz - (int)ddr_hertz); + if (hertz_diff > ((int)ddr_hertz * 5 / 100)) { + // nope, diff is greater than than 5% +- debug("N0: DRAM init: requested 100 MHz refclk NOT FOUND\n"); ++printf("N0: DRAM init: requested 100 MHz refclk NOT FOUND\n"); + ddr_ref_hertz = CONFIG_REF_HERTZ; + // clear the flag before trying again!! + set_ddr_clock_initialized(priv, 0, 0); + goto try_again; + } else { +- debug("N0: DRAM Init: requested 100 MHz refclk FOUND and SELECTED\n"); ++printf("N0: DRAM Init: requested 100 MHz refclk FOUND and SELECTED\n"); + } + } + } + + if (tmp_hertz > 0) + calc_ddr_hertz = tmp_hertz; +- debug("LMC%d: measured speed: %u hz\n", if_idx, tmp_hertz); ++printf("LMC%d: measured speed: %u hz\n", if_idx, tmp_hertz); + } + + if (measured_ddr_hertz) +@@ -2553,7 +2553,7 @@ try_again: + } + } + +- debug("LMC Initialization complete. Total DRAM %d MB\n", ++printf("LMC Initialization complete. Total DRAM %d MB\n", + memsize_mbytes); + + return memsize_mbytes; +@@ -2601,7 +2601,7 @@ static int octeon_ddr_probe(struct udevice *dev) + + /* Get LMC base address */ + priv->lmc_base = dev_remap_addr(dev); +- debug("%s: lmc_base=%p\n", __func__, priv->lmc_base); ++printf("%s: lmc_base=%p\n", __func__, priv->lmc_base); + + /* Get L2C base address */ + ret = dev_read_phandle_with_args(dev, "l2c-handle", NULL, 0, 0, +@@ -2618,7 +2618,7 @@ static int octeon_ddr_probe(struct udevice *dev) + } + + priv->l2c_base = map_physmem(addr, 0, MAP_NOCACHE); +- debug("%s: l2c_base=%p\n", __func__, priv->l2c_base); ++printf("%s: l2c_base=%p\n", __func__, priv->l2c_base); + + ddr_conf_ptr = octeon_ddr_conf_table_get(&conf_table_count, + &def_ddr_freq); +@@ -2652,18 +2652,18 @@ static int octeon_ddr_probe(struct udevice *dev) + ddr_hertz, + &ddr_conf_ptr[0].dimm_config_table[0]); + +- debug("Initializing DDR, clock = %uhz, reference = %uhz\n", ++printf("Initializing DDR, clock = %uhz, reference = %uhz\n", + ddr_hertz, ddr_ref_hertz); + + mem_mbytes = octeon_ddr_initialize(priv, gd->cpu_clk, + ddr_hertz, ddr_ref_hertz, + ddr_conf_valid_mask, + ddr_conf_ptr, &measured_ddr_hertz); +- debug("Mem size in MBYTES: %u\n", mem_mbytes); ++printf("Mem size in MBYTES: %u\n", mem_mbytes); + + gd->mem_clk = divide_nint(measured_ddr_hertz, 1000000); + +- debug("Measured DDR clock %d Hz\n", measured_ddr_hertz); ++printf("Measured DDR clock %d Hz\n", measured_ddr_hertz); + + if (measured_ddr_hertz != 0) { + if (!gd->mem_clk) { +@@ -2696,7 +2696,7 @@ static int octeon_ddr_probe(struct udevice *dev) + */ + cvmx_l2c_set_big_size(priv, mem_mbytes, 0); + +- debug("Ram size %uMiB\n", mem_mbytes); ++printf("Ram size %uMiB\n", mem_mbytes); + + return 0; + } +diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c +index a9d051852..b29c0f0ff 100644 +--- a/drivers/ram/rockchip/dmc-rk3368.c ++++ b/drivers/ram/rockchip/dmc-rk3368.c +@@ -198,7 +198,7 @@ static void send_command(struct rk3368_ddr_pctl *pctl, u32 rank, u32 cmd) + { + u32 mcmd = START_CMD | cmd | rank; + +- debug("%s: writing %x to MCMD\n", __func__, mcmd); ++printf("%s: writing %x to MCMD\n", __func__, mcmd); + writel(mcmd, &pctl->mcmd); + while (readl(&pctl->mcmd) & START_CMD) + /* spin */; +@@ -209,7 +209,7 @@ static void send_mrs(struct rk3368_ddr_pctl *pctl, + { + u32 mcmd = START_CMD | MRS_CMD | rank | (mr_num << 17) | (mr_data << 4); + +- debug("%s: writing %x to MCMD\n", __func__, mcmd); ++printf("%s: writing %x to MCMD\n", __func__, mcmd); + writel(mcmd, &pctl->mcmd); + while (readl(&pctl->mcmd) & START_CMD) + /* spin */; +@@ -651,7 +651,7 @@ static int sdram_col_row_detect(struct udevice *dev) + } + + /* Record results */ +- debug("%s: col %d, row %d\n", __func__, col, row); ++printf("%s: col %d, row %d\n", __func__, col, row); + params->chan.col = col; + params->chan.cs0_row = row; + params->chan.cs1_row = row; +@@ -760,7 +760,7 @@ static int msch_niu_config(struct rk3368_msch *msch, + } + + if (match) { +- debug("%s: setting ddrconf 0x%x\n", __func__, i); ++printf("%s: setting ddrconf 0x%x\n", __func__, i); + writel(i, &msch->ddrconf); + return 0; + } +@@ -811,7 +811,7 @@ static int setup_sdram(struct udevice *dev) + /* The input clock (i.e. DPLL) needs to be 2x the DRAM frequency */ + ret = clk_set_rate(&priv->ddr_clk, 2 * params->ddr_freq); + if (ret < 0) { +- debug("%s: could not set DDR clock: %d\n", __func__, ret); ++printf("%s: could not set DDR clock: %d\n", __func__, ret); + return ret; + } + +@@ -929,7 +929,7 @@ static int rk3368_dmc_probe(struct udevice *dev) + #endif + + priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); +- debug("%s: pmugrf=%p\n", __func__, priv->pmugrf); ++printf("%s: pmugrf=%p\n", __func__, priv->pmugrf); + + #ifdef CONFIG_TPL_BUILD + pctl = (struct rk3368_ddr_pctl *)plat->of_plat.reg[0]; +diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c +index c024a0cd6..4bf98db71 100644 +--- a/drivers/ram/rockchip/sdram_px30.c ++++ b/drivers/ram/rockchip/sdram_px30.c +@@ -725,7 +725,7 @@ static int px30_dmc_probe(struct udevice *dev) + struct dram_info *priv = dev_get_priv(dev); + + priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); +- debug("%s: grf=%p\n", __func__, priv->pmugrf); ++printf("%s: grf=%p\n", __func__, priv->pmugrf); + priv->info.base = CONFIG_SYS_SDRAM_BASE; + priv->info.size = + rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]); +diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c +index 16cfbf947..0ed60e369 100644 +--- a/drivers/ram/rockchip/sdram_rk3128.c ++++ b/drivers/ram/rockchip/sdram_rk3128.c +@@ -22,7 +22,7 @@ static int rk3128_dmc_probe(struct udevice *dev) + struct dram_info *priv = dev_get_priv(dev); + + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); +- debug("%s: grf=%p\n", __func__, priv->grf); ++printf("%s: grf=%p\n", __func__, priv->grf); + priv->info.base = CONFIG_SYS_SDRAM_BASE; + priv->info.size = rockchip_sdram_size( + (phys_addr_t)&priv->grf->os_reg[1]); +diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c +index 25ae69e9a..99edd37d5 100644 +--- a/drivers/ram/rockchip/sdram_rk3188.c ++++ b/drivers/ram/rockchip/sdram_rk3188.c +@@ -673,7 +673,7 @@ static int sdram_col_row_detect(struct dram_info *dram, int channel, + } else { + sdram_params->ch[channel].cs1_row = row; + sdram_params->ch[channel].row_3_4 = 0; +- debug("chn %d col %d, row %d\n", channel, col, row); ++printf("chn %d col %d, row %d\n", channel, col, row); + sdram_params->ch[channel].cs0_row = row; + } + +@@ -703,7 +703,7 @@ static int sdram_get_niu_config(struct rk3188_sdram_params *sdram_params) + printf("niu config not found\n"); + ret = -EINVAL; + } else { +- debug("niu config %d\n", i); ++printf("niu config %d\n", i); + sdram_params->base.ddrconfig = i; + } + +@@ -798,7 +798,7 @@ static int sdram_init(struct dram_info *dram, + goto error; + + dram_all_config(dram, sdram_params); +- debug("%s done\n", __func__); ++printf("%s done\n", __func__); + + return 0; + error: +diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c +index a933abf0d..450bcefce 100644 +--- a/drivers/ram/rockchip/sdram_rk3288.c ++++ b/drivers/ram/rockchip/sdram_rk3288.c +@@ -631,7 +631,7 @@ static int sdram_rank_bw_detect(struct dram_info *dram, int channel, + reg = readl(&publ->datx8[0].dxgsr[0]); + /* Check the result for rank 0 */ + if ((channel == 0) && (reg & DQS_GATE_TRAINING_ERROR_RANK0)) { +- debug("data training fail!\n"); ++printf("data training fail!\n"); + return -EIO; + } else if ((channel == 1) && + (reg & DQS_GATE_TRAINING_ERROR_RANK0)) { +@@ -665,7 +665,7 @@ static int sdram_rank_bw_detect(struct dram_info *dram, int channel, + ddr_phy_ctl_reset(dram->cru, channel, 0); + udelay(10); + } +- debug("2nd data training failed!"); ++printf("2nd data training failed!"); + return -EIO; + } + +@@ -718,7 +718,7 @@ static int sdram_col_row_detect(struct dram_info *dram, int channel, + } else { + sdram_params->ch[channel].cs1_row = row; + sdram_params->ch[channel].row_3_4 = 0; +- debug("chn %d col %d, row %d\n", channel, col, row); ++printf("chn %d col %d, row %d\n", channel, col, row); + sdram_params->ch[channel].cs0_row = row; + } + +@@ -789,20 +789,20 @@ static int sdram_init(struct dram_info *dram, + int zqcr; + int ret; + +- debug("%s start\n", __func__); ++printf("%s start\n", __func__); + if ((sdram_params->base.dramtype == DDR3 && + sdram_params->base.ddr_freq > 800000000) || + (sdram_params->base.dramtype == LPDDR3 && + sdram_params->base.ddr_freq > 533000000)) { +- debug("SDRAM frequency is too high!"); ++printf("SDRAM frequency is too high!"); + return -E2BIG; + } + +- debug("ddr clk dpll\n"); ++printf("ddr clk dpll\n"); + ret = clk_set_rate(&dram->ddr_clk, sdram_params->base.ddr_freq); +- debug("ret=%d\n", ret); ++printf("ret=%d\n", ret); + if (ret) { +- debug("Could not set DDR clock\n"); ++printf("Could not set DDR clock\n"); + return ret; + } + +@@ -885,7 +885,7 @@ static int sdram_init(struct dram_info *dram, + send_command_op(pctl, 1, MRR_CMD, 8, 0); + /* S8 */ + if ((readl(&pctl->mrrstat0) & 0x3) != 3) { +- debug("failed!"); ++printf("failed!"); + return -EREMOTEIO; + } + } +@@ -919,7 +919,7 @@ static int sdram_init(struct dram_info *dram, + goto error; + + dram_all_config(dram, sdram_params); +- debug("%s done\n", __func__); ++printf("%s done\n", __func__); + + return 0; + error: +@@ -983,21 +983,21 @@ static int rk3288_dmc_of_to_plat(struct udevice *dev) + (u32 *)¶ms->pctl_timing, + sizeof(params->pctl_timing) / sizeof(u32)); + if (ret) { +- debug("%s: Cannot read rockchip,pctl-timing\n", __func__); ++printf("%s: Cannot read rockchip,pctl-timing\n", __func__); + return -EINVAL; + } + ret = dev_read_u32_array(dev, "rockchip,phy-timing", + (u32 *)¶ms->phy_timing, + sizeof(params->phy_timing) / sizeof(u32)); + if (ret) { +- debug("%s: Cannot read rockchip,phy-timing\n", __func__); ++printf("%s: Cannot read rockchip,phy-timing\n", __func__); + return -EINVAL; + } + ret = dev_read_u32_array(dev, "rockchip,sdram-params", + (u32 *)¶ms->base, + sizeof(params->base) / sizeof(u32)); + if (ret) { +- debug("%s: Cannot read rockchip,sdram-params\n", __func__); ++printf("%s: Cannot read rockchip,sdram-params\n", __func__); + return -EINVAL; + } + #ifdef CONFIG_ROCKCHIP_FAST_SPL +diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c +index 9af4c372d..a9386b39c 100644 +--- a/drivers/ram/rockchip/sdram_rk3328.c ++++ b/drivers/ram/rockchip/sdram_rk3328.c +@@ -475,7 +475,7 @@ static int sdram_init_detect(struct dram_info *dram, + u32 sys_reg3 = 0; + struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info; + +- debug("Starting SDRAM initialization...\n"); ++printf("Starting SDRAM initialization...\n"); + + memcpy(&sdram_ch, &sdram_params->ch, + sizeof(struct rk3328_sdram_channel)); +@@ -535,7 +535,7 @@ static int rk3328_dmc_init(struct udevice *dev) + priv->msch = regmap_get_range(plat->map, 4); + priv->ddr_grf = regmap_get_range(plat->map, 5); + +- debug("%s phy %p pctrl %p grf %p cru %p msch %p ddr_grf %p\n", ++printf("%s phy %p pctrl %p grf %p cru %p msch %p ddr_grf %p\n", + __func__, priv->phy, priv->pctl, priv->grf, priv->cru, + priv->msch, priv->ddr_grf); + ret = sdram_init_detect(priv, params); +@@ -579,7 +579,7 @@ static int rk3328_dmc_probe(struct udevice *dev) + struct dram_info *priv = dev_get_priv(dev); + + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); +- debug("%s: grf=%p\n", __func__, priv->grf); ++printf("%s: grf=%p\n", __func__, priv->grf); + priv->info.base = CONFIG_SYS_SDRAM_BASE; + priv->info.size = rockchip_sdram_size( + (phys_addr_t)&priv->grf->os_reg[2]); +diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c +index a83a670b3..b58f9892f 100644 +--- a/drivers/ram/rockchip/sdram_rk3399.c ++++ b/drivers/ram/rockchip/sdram_rk3399.c +@@ -387,7 +387,7 @@ static int phy_io_config(u32 *denali_phy, u32 *denali_ctl, + vref_value_dq = 0x36; + break; + default: +- debug("Invalid ODT value.\n"); ++printf("Invalid ODT value.\n"); + return -EINVAL; + } + } else if (ds_value == LPDDR3_DS_40) { +@@ -402,7 +402,7 @@ static int phy_io_config(u32 *denali_phy, u32 *denali_ctl, + vref_value_dq = 0x31; + break; + default: +- debug("Invalid ODT value.\n"); ++printf("Invalid ODT value.\n"); + return -EINVAL; + } + } else if (ds_value == LPDDR3_DS_34) { +@@ -417,11 +417,11 @@ static int phy_io_config(u32 *denali_phy, u32 *denali_ctl, + vref_value_dq = 0x2e; + break; + default: +- debug("Invalid ODT value.\n"); ++printf("Invalid ODT value.\n"); + return -EINVAL; + } + } else { +- debug("Invalid DRV value.\n"); ++printf("Invalid DRV value.\n"); + return -EINVAL; + } + } else { +@@ -439,7 +439,7 @@ static int phy_io_config(u32 *denali_phy, u32 *denali_ctl, + vref_value_ac = 0x1f; + mode_sel = 0x1; + } else { +- debug("Unknown DRAM type.\n"); ++printf("Unknown DRAM type.\n"); + return -EINVAL; + } + +@@ -1403,7 +1403,7 @@ static int data_training(struct dram_info *dram, u32 channel, + if ((training_flag & PI_CA_TRAINING) == PI_CA_TRAINING) { + ret = data_training_ca(chan, channel, params); + if (ret < 0) { +- debug("%s: data training ca failed\n", __func__); ++printf("%s: data training ca failed\n", __func__); + return ret; + } + } +@@ -1412,7 +1412,7 @@ static int data_training(struct dram_info *dram, u32 channel, + if ((training_flag & PI_WRITE_LEVELING) == PI_WRITE_LEVELING) { + ret = data_training_wl(chan, channel, params); + if (ret < 0) { +- debug("%s: data training wl failed\n", __func__); ++printf("%s: data training wl failed\n", __func__); + return ret; + } + } +@@ -1421,7 +1421,7 @@ static int data_training(struct dram_info *dram, u32 channel, + if ((training_flag & PI_READ_GATE_TRAINING) == PI_READ_GATE_TRAINING) { + ret = data_training_rg(chan, channel, params); + if (ret < 0) { +- debug("%s: data training rg failed\n", __func__); ++printf("%s: data training rg failed\n", __func__); + return ret; + } + } +@@ -1430,7 +1430,7 @@ static int data_training(struct dram_info *dram, u32 channel, + if ((training_flag & PI_READ_LEVELING) == PI_READ_LEVELING) { + ret = data_training_rl(chan, channel, params); + if (ret < 0) { +- debug("%s: data training rl failed\n", __func__); ++printf("%s: data training rl failed\n", __func__); + return ret; + } + } +@@ -1439,7 +1439,7 @@ static int data_training(struct dram_info *dram, u32 channel, + if ((training_flag & PI_WDQ_LEVELING) == PI_WDQ_LEVELING) { + ret = data_training_wdql(chan, channel, params); + if (ret < 0) { +- debug("%s: data training wdql failed\n", __func__); ++printf("%s: data training wdql failed\n", __func__); + return ret; + } + } +@@ -1659,7 +1659,7 @@ static int switch_to_phy_index1(struct dram_info *dram, + mdelay(10); + i++; + if (i > 10) { +- debug("index1 frequency change overtime\n"); ++printf("index1 frequency change overtime\n"); + return -ETIME; + } + } +@@ -1670,7 +1670,7 @@ static int switch_to_phy_index1(struct dram_info *dram, + mdelay(10); + i++; + if (i > 10) { +- debug("index1 frequency done overtime\n"); ++printf("index1 frequency done overtime\n"); + return -ETIME; + } + } +@@ -1680,7 +1680,7 @@ static int switch_to_phy_index1(struct dram_info *dram, + clrsetbits_le32(&denali_phy[896], (0x3 << 8) | 1, 1 << 8); + ret = data_training(dram, channel, params, PI_FULL_TRAINING); + if (ret < 0) { +- debug("index1 training failed\n"); ++printf("index1 training failed\n"); + return ret; + } + } +@@ -2530,7 +2530,7 @@ static int lpddr4_set_ctl(struct dram_info *dram, + printf("%s: channel %d training failed!\n", + __func__, channel); + else +- debug("%s: channel %d training pass\n", ++printf("%s: channel %d training pass\n", + __func__, channel); + } + } +@@ -2907,12 +2907,12 @@ static int sdram_init(struct dram_info *dram, + int channel, ch, rank; + u32 tmp, ret; + +- debug("Starting SDRAM initialization...\n"); ++printf("Starting SDRAM initialization...\n"); + + if ((dramtype == DDR3 && ddr_freq > 933) || + (dramtype == LPDDR3 && ddr_freq > 933) || + (dramtype == LPDDR4 && ddr_freq > 800)) { +- debug("SDRAM frequency is to high!"); ++printf("SDRAM frequency is to high!"); + return -E2BIG; + } + +@@ -2946,7 +2946,7 @@ static int sdram_init(struct dram_info *dram, + ret = dram->ops->data_training_first(dram, ch, + rank, params); + if (!ret) { +- debug("%s: data trained for rank %d, ch %d\n", ++printf("%s: data trained for rank %d, ch %d\n", + __func__, rank, ch); + break; + } +@@ -3007,7 +3007,7 @@ static int sdram_init(struct dram_info *dram, + + dram->ops->set_rate_index(dram, params); + +- debug("Finish SDRAM initialization...\n"); ++printf("Finish SDRAM initialization...\n"); + return 0; + } + +@@ -3097,12 +3097,12 @@ static int rk3399_dmc_init(struct udevice *dev) + priv->chan[1].publ = regmap_get_range(plat->map, 6); + priv->chan[1].msch = regmap_get_range(plat->map, 7); + +- debug("con reg %p %p %p %p %p %p %p %p\n", ++printf("con reg %p %p %p %p %p %p %p %p\n", + priv->chan[0].pctl, priv->chan[0].pi, + priv->chan[0].publ, priv->chan[0].msch, + priv->chan[1].pctl, priv->chan[1].pi, + priv->chan[1].publ, priv->chan[1].msch); +- debug("cru %p, cic %p, grf %p, sgrf %p, pmucru %p, pmu %p\n", priv->cru, ++printf("cru %p, cic %p, grf %p, sgrf %p, pmucru %p, pmu %p\n", priv->cru, + priv->cic, priv->pmugrf, priv->pmusgrf, priv->pmucru, priv->pmu); + + #if CONFIG_IS_ENABLED(OF_PLATDATA) +@@ -3141,7 +3141,7 @@ static int rk3399_dmc_probe(struct udevice *dev) + struct dram_info *priv = dev_get_priv(dev); + + priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); +- debug("%s: pmugrf = %p\n", __func__, priv->pmugrf); ++printf("%s: pmugrf = %p\n", __func__, priv->pmugrf); + priv->info.base = CONFIG_SYS_SDRAM_BASE; + priv->info.size = + rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg2); +diff --git a/drivers/ram/sifive/sifive_ddr.c b/drivers/ram/sifive/sifive_ddr.c +index ba1846603..c33c85cd8 100644 +--- a/drivers/ram/sifive/sifive_ddr.c ++++ b/drivers/ram/sifive/sifive_ddr.c +@@ -316,7 +316,7 @@ static int sifive_ddr_setup(struct udevice *dev) + priv->info.size = get_ram_size((long *)priv->info.base, + ddr_size); + +- debug("%s : %lx\n", __func__, (uintptr_t)priv->info.size); ++printf("%s : %lx\n", __func__, (uintptr_t)priv->info.size); + + /* check memory access for all memory */ + if (priv->info.size != ddr_size) { +@@ -342,30 +342,30 @@ static int sifive_ddr_probe(struct udevice *dev) + int ret; + u32 clock = 0; + +- debug("sifive DDR probe\n"); ++printf("sifive DDR probe\n"); + priv->dev = dev; + + ret = clk_get_by_index(dev, 0, &priv->ddr_clk); + if (ret) { +- debug("clk get failed %d\n", ret); ++printf("clk get failed %d\n", ret); + return ret; + } + + ret = dev_read_u32(dev, "clock-frequency", &clock); + if (ret) { +- debug("clock-frequency not found in dt %d\n", ret); ++printf("clock-frequency not found in dt %d\n", ret); + return ret; + } else { + ret = clk_set_rate(&priv->ddr_clk, clock); + if (ret < 0) { +- debug("Could not set DDR clock\n"); ++printf("Could not set DDR clock\n"); + return ret; + } + } + + ret = clk_enable(&priv->ddr_clk); + if (ret < 0) { +- debug("Could not enable DDR clock\n"); ++printf("Could not enable DDR clock\n"); + return ret; + } + +diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c +index 3e25cc7a0..ae6c7986f 100644 +--- a/drivers/ram/stm32_sdram.c ++++ b/drivers/ram/stm32_sdram.c +@@ -319,7 +319,7 @@ static int stm32_fmc_of_to_plat(struct udevice *dev) + return -EINVAL; + } + +- debug("Find bank %s %u\n", bank_name, bank_params->target_bank); ++printf("Find bank %s %u\n", bank_name, bank_params->target_bank); + + params->bank_params[bank].sdram_control = + (struct stm32_sdram_control *) +diff --git a/drivers/remoteproc/k3_system_controller.c b/drivers/remoteproc/k3_system_controller.c +index 89cb90207..0af47f616 100644 +--- a/drivers/remoteproc/k3_system_controller.c ++++ b/drivers/remoteproc/k3_system_controller.c +@@ -124,7 +124,7 @@ static int k3_sysctrler_load_response(struct udevice *dev, u32 *buf) + return -EINVAL; + } + +- debug("%s: Firmware authentication passed\n", __func__); ++printf("%s: Firmware authentication passed\n", __func__); + + return 0; + } +@@ -146,7 +146,7 @@ static int k3_sysctrler_boot_notification_response(struct udevice *dev, + return -EINVAL; + } + +- debug("%s: Boot notification received\n", __func__); ++printf("%s: Boot notification received\n", __func__); + + return 0; + } +@@ -166,7 +166,7 @@ static int k3_sysctrler_load(struct udevice *dev, ulong addr, ulong size) + struct k3_sec_proxy_msg msg; + int ret; + +- debug("%s: Loading binary from 0x%08lX, size 0x%08lX\n", ++printf("%s: Loading binary from 0x%08lX, size 0x%08lX\n", + __func__, addr, size); + + memset(&firmware, 0, sizeof(firmware)); +@@ -198,7 +198,7 @@ static int k3_sysctrler_load(struct udevice *dev, ulong addr, ulong size) + if (ret) + return ret; + +- debug("%s: Firmware Loaded successfully on dev %s\n", ++printf("%s: Firmware Loaded successfully on dev %s\n", + __func__, dev->name); + + return 0; +@@ -220,7 +220,7 @@ static int k3_sysctrler_start(struct udevice *dev) + struct k3_sec_proxy_msg msg; + int ret; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + /* Receive the boot notification. Note that it is sent only once. */ + ret = mbox_recv(&priv->chan_rx, &msg, priv->desc->max_rx_timeout_us); +@@ -235,7 +235,7 @@ static int k3_sysctrler_start(struct udevice *dev) + if (ret) + return ret; + +- debug("%s: Boot notification received successfully on dev %s\n", ++printf("%s: Boot notification received successfully on dev %s\n", + __func__, dev->name); + + return 0; +@@ -286,7 +286,7 @@ static int k3_sysctrler_probe(struct udevice *dev) + struct k3_sysctrler_privdata *priv; + int ret; + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + priv = dev_get_priv(dev); + +diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c +index 5919c8bb9..5c5b631a5 100644 +--- a/drivers/remoteproc/rproc-uclass.c ++++ b/drivers/remoteproc/rproc-uclass.c +@@ -122,10 +122,10 @@ static int rproc_pre_probe(struct udevice *dev) + const void *blob = gd->fdt_blob; + bool tmp; + if (!blob) { +- debug("'%s' no dt?\n", dev->name); ++printf("'%s' no dt?\n", dev->name); + return -EINVAL; + } +- debug("'%s': using fdt\n", dev->name); ++printf("'%s': using fdt\n", dev->name); + uc_pdata->name = fdt_getprop(blob, node, + "remoteproc-name", NULL); + +@@ -143,7 +143,7 @@ static int rproc_pre_probe(struct udevice *dev) + } else { + struct dm_rproc_uclass_pdata *pdata = dev_get_plat(dev); + +- debug("'%s': using legacy data\n", dev->name); ++printf("'%s': using legacy data\n", dev->name); + if (pdata->name) + uc_pdata->name = pdata->name; + uc_pdata->mem_type = pdata->mem_type; +@@ -154,23 +154,23 @@ static int rproc_pre_probe(struct udevice *dev) + if (!uc_pdata->name) + uc_pdata->name = dev->name; + if (!uc_pdata->name) { +- debug("Unnamed device!"); ++printf("Unnamed device!"); + return -EINVAL; + } + + if (!rproc_name_is_unique(dev, uc_pdata->name)) { +- debug("%s duplicate name '%s'\n", dev->name, uc_pdata->name); ++printf("%s duplicate name '%s'\n", dev->name, uc_pdata->name); + return -EINVAL; + } + + ops = rproc_get_ops(dev); + if (!ops) { +- debug("%s driver has no ops?\n", dev->name); ++printf("%s driver has no ops?\n", dev->name); + return -EINVAL; + } + + if (!ops->load || !ops->start) { +- debug("%s driver has missing mandatory ops?\n", dev->name); ++printf("%s driver has missing mandatory ops?\n", dev->name); + return -EINVAL; + } + +@@ -195,7 +195,7 @@ static int rproc_post_probe(struct udevice *dev) + + ops = rproc_get_ops(dev); + if (!ops) { +- debug("%s driver has no ops?\n", dev->name); ++printf("%s driver has no ops?\n", dev->name); + return -EINVAL; + } + +@@ -232,7 +232,7 @@ static int _rproc_probe_dev(struct udevice *dev, + ret = device_probe(dev); + + if (ret) +- debug("%s: Failed to initialize - %d\n", dev->name, ret); ++printf("%s: Failed to initialize - %d\n", dev->name, ret); + return ret; + } + +@@ -265,7 +265,7 @@ int rproc_init(void) + int ret; + + if (rproc_is_initialized()) { +- debug("Already initialized\n"); ++printf("Already initialized\n"); + return -EINVAL; + } + +@@ -280,14 +280,14 @@ int rproc_dev_init(int id) + + ret = uclass_get_device_by_seq(UCLASS_REMOTEPROC, id, &dev); + if (ret) { +- debug("Unknown remote processor id '%d' requested(%d)\n", ++printf("Unknown remote processor id '%d' requested(%d)\n", + id, ret); + return ret; + } + + ret = device_probe(dev); + if (ret) +- debug("%s: Failed to initialize - %d\n", dev->name, ret); ++printf("%s: Failed to initialize - %d\n", dev->name, ret); + + return ret; + } +@@ -301,7 +301,7 @@ int rproc_load(int id, ulong addr, ulong size) + + ret = uclass_get_device_by_seq(UCLASS_REMOTEPROC, id, &dev); + if (ret) { +- debug("Unknown remote processor id '%d' requested(%d)\n", ++printf("Unknown remote processor id '%d' requested(%d)\n", + id, ret); + return ret; + } +@@ -310,16 +310,16 @@ int rproc_load(int id, ulong addr, ulong size) + + ops = rproc_get_ops(dev); + if (!ops) { +- debug("%s driver has no ops?\n", dev->name); ++printf("%s driver has no ops?\n", dev->name); + return -EINVAL; + } + +- debug("Loading to '%s' from address 0x%08lX size of %lu bytes\n", ++printf("Loading to '%s' from address 0x%08lX size of %lu bytes\n", + uc_pdata->name, addr, size); + if (ops->load) + return ops->load(dev, addr, size); + +- debug("%s: data corruption?? mandatory function is missing!\n", ++printf("%s: data corruption?? mandatory function is missing!\n", + dev->name); + + return -EINVAL; +@@ -361,7 +361,7 @@ static int _rproc_ops_wrapper(int id, enum rproc_ops op) + + ret = uclass_get_device_by_seq(UCLASS_REMOTEPROC, id, &dev); + if (ret) { +- debug("Unknown remote processor id '%d' requested(%d)\n", ++printf("Unknown remote processor id '%d' requested(%d)\n", + id, ret); + return ret; + } +@@ -370,7 +370,7 @@ static int _rproc_ops_wrapper(int id, enum rproc_ops op) + + ops = rproc_get_ops(dev); + if (!ops) { +- debug("%s driver has no ops?\n", dev->name); ++printf("%s driver has no ops?\n", dev->name); + return -EINVAL; + } + switch (op) { +@@ -396,16 +396,16 @@ static int _rproc_ops_wrapper(int id, enum rproc_ops op) + op_str = "Pinging"; + break; + default: +- debug("what is '%d' operation??\n", op); ++printf("what is '%d' operation??\n", op); + return -EINVAL; + } + +- debug("%s %s...\n", op_str, uc_pdata->name); ++printf("%s %s...\n", op_str, uc_pdata->name); + if (fn) + return fn(dev); + + if (mandatory) +- debug("%s: data corruption?? mandatory function is missing!\n", ++printf("%s: data corruption?? mandatory function is missing!\n", + dev->name); + + return -ENOSYS; +diff --git a/drivers/remoteproc/sandbox_testproc.c b/drivers/remoteproc/sandbox_testproc.c +index 6836eca4c..70a721abf 100644 +--- a/drivers/remoteproc/sandbox_testproc.c ++++ b/drivers/remoteproc/sandbox_testproc.c +@@ -80,7 +80,7 @@ static int sandbox_dev_move_to_state(struct udevice *dev, + if (ddata->current_state == next_state) + return 0; + +- debug("current_state=%d, next_state=%d\n", ddata->current_state, ++printf("current_state=%d, next_state=%d\n", ddata->current_state, + next_state); + switch (ddata->current_state) { + case sb_booted: +@@ -131,11 +131,11 @@ static int sandbox_testproc_probe(struct udevice *dev) + uc_pdata = dev_get_uclass_plat(dev); + ddata = dev_get_priv(dev); + if (!ddata) { +- debug("%s: platform private data missing\n", uc_pdata->name); ++printf("%s: platform private data missing\n", uc_pdata->name); + return -EINVAL; + } + ret = sandbox_dev_move_to_state(dev, sb_booted); +- debug("%s: called(%d)\n", uc_pdata->name, ret); ++printf("%s: called(%d)\n", uc_pdata->name, ret); + + return ret; + } +@@ -155,9 +155,9 @@ static int sandbox_testproc_init(struct udevice *dev) + + ret = sandbox_dev_move_to_state(dev, sb_init); + +- debug("%s: called(%d)\n", uc_pdata->name, ret); ++printf("%s: called(%d)\n", uc_pdata->name, ret); + if (ret) +- debug("%s init failed\n", uc_pdata->name); ++printf("%s init failed\n", uc_pdata->name); + + return ret; + } +@@ -177,10 +177,10 @@ static int sandbox_testproc_reset(struct udevice *dev) + + ret = sandbox_dev_move_to_state(dev, sb_reset); + +- debug("%s: called(%d)\n", uc_pdata->name, ret); ++printf("%s: called(%d)\n", uc_pdata->name, ret); + + if (ret) +- debug("%s reset failed\n", uc_pdata->name); ++printf("%s reset failed\n", uc_pdata->name); + return ret; + } + +@@ -201,11 +201,11 @@ static int sandbox_testproc_load(struct udevice *dev, ulong addr, ulong size) + + ret = sandbox_dev_move_to_state(dev, sb_loaded); + +- debug("%s: called(%d) Loading to %08lX %lu size\n", ++printf("%s: called(%d) Loading to %08lX %lu size\n", + uc_pdata->name, ret, addr, size); + + if (ret) +- debug("%s load failed\n", uc_pdata->name); ++printf("%s load failed\n", uc_pdata->name); + return ret; + } + +@@ -224,10 +224,10 @@ static int sandbox_testproc_start(struct udevice *dev) + + ret = sandbox_dev_move_to_state(dev, sb_running); + +- debug("%s: called(%d)\n", uc_pdata->name, ret); ++printf("%s: called(%d)\n", uc_pdata->name, ret); + + if (ret) +- debug("%s start failed\n", uc_pdata->name); ++printf("%s start failed\n", uc_pdata->name); + return ret; + } + +@@ -246,10 +246,10 @@ static int sandbox_testproc_stop(struct udevice *dev) + + ret = sandbox_dev_move_to_state(dev, sb_init); + +- debug("%s: called(%d)\n", uc_pdata->name, ret); ++printf("%s: called(%d)\n", uc_pdata->name, ret); + + if (ret) +- debug("%s stop failed\n", uc_pdata->name); ++printf("%s stop failed\n", uc_pdata->name); + return ret; + } + +@@ -270,7 +270,7 @@ static int sandbox_testproc_is_running(struct udevice *dev) + + if (ddata->current_state == sb_running) + ret = 0; +- debug("%s: called(%d)\n", uc_pdata->name, ret); ++printf("%s: called(%d)\n", uc_pdata->name, ret); + + return ret; + } +@@ -295,9 +295,9 @@ static int sandbox_testproc_ping(struct udevice *dev) + else + ret = -EINVAL; + +- debug("%s: called(%d)\n", uc_pdata->name, ret); ++printf("%s: called(%d)\n", uc_pdata->name, ret); + if (ret) +- debug("%s: No response.(Not started?)\n", uc_pdata->name); ++printf("%s: No response.(Not started?)\n", uc_pdata->name); + + return ret; + } +diff --git a/drivers/remoteproc/ti_k3_r5f_rproc.c b/drivers/remoteproc/ti_k3_r5f_rproc.c +index 3c569a3b7..e8ddf3f9f 100644 +--- a/drivers/remoteproc/ti_k3_r5f_rproc.c ++++ b/drivers/remoteproc/ti_k3_r5f_rproc.c +@@ -165,7 +165,7 @@ static int k3_r5f_lockstep_release(struct k3_r5f_cluster *cluster) + { + int ret, c; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + for (c = NR_CORES - 1; c >= 0; c--) { + ret = ti_sci_proc_power_domain_on(&cluster->cores[c]->tsp); +@@ -451,7 +451,7 @@ static int k3_r5f_lockstep_reset(struct k3_r5f_cluster *cluster) + { + int ret = 0, c; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + for (c = 0; c < NR_CORES; c++) + if (reset_assert(&cluster->cores[c]->reset)) +diff --git a/drivers/remoteproc/ti_power_proc.c b/drivers/remoteproc/ti_power_proc.c +index 86d544cc8..2e228bba6 100644 +--- a/drivers/remoteproc/ti_power_proc.c ++++ b/drivers/remoteproc/ti_power_proc.c +@@ -40,19 +40,19 @@ static int ti_of_to_priv(struct udevice *dev, + int tmp; + + if (!blob) { +- debug("'%s' no dt?\n", dev->name); ++printf("'%s' no dt?\n", dev->name); + return -EINVAL; + } + + priv->loadaddr = fdtdec_get_addr(blob, node, "reg"); + if (priv->loadaddr == FDT_ADDR_T_NONE) { +- debug("'%s': no 'reg' property\n", dev->name); ++printf("'%s': no 'reg' property\n", dev->name); + return -EINVAL; + } + + tmp = fdtdec_get_int(blob, node, "ti,lpsc_module", -EINVAL); + if (tmp < 0) { +- debug("'%s': no 'ti,lpsc_module' property\n", dev->name); ++printf("'%s': no 'ti,lpsc_module' property\n", dev->name); + return tmp; + } + priv->psc_module = tmp; +@@ -77,7 +77,7 @@ static int ti_powerproc_probe(struct udevice *dev) + + ret = ti_of_to_priv(dev, priv); + +- debug("%s probed with slave_addr=0x%08lX module=%d(%d)\n", ++printf("%s probed with slave_addr=0x%08lX module=%d(%d)\n", + uc_pdata->name, priv->loadaddr, priv->psc_module, ret); + + return ret; +@@ -99,24 +99,24 @@ static int ti_powerproc_load(struct udevice *dev, ulong addr, ulong size) + + uc_pdata = dev_get_uclass_plat(dev); + if (!uc_pdata) { +- debug("%s: no uc pdata!\n", dev->name); ++printf("%s: no uc pdata!\n", dev->name); + return -EINVAL; + } + + priv = dev_get_priv(dev); + ret = psc_module_keep_in_reset_enabled(priv->psc_module, false); + if (ret) { +- debug("%s Unable to disable module '%d'(ret=%d)\n", ++printf("%s Unable to disable module '%d'(ret=%d)\n", + uc_pdata->name, priv->psc_module, ret); + return ret; + } + +- debug("%s: Loading binary from 0x%08lX, size 0x%08lX to 0x%08lX\n", ++printf("%s: Loading binary from 0x%08lX, size 0x%08lX to 0x%08lX\n", + uc_pdata->name, addr, size, priv->loadaddr); + + memcpy((void *)priv->loadaddr, (void *)addr, size); + +- debug("%s: Complete!\n", uc_pdata->name); ++printf("%s: Complete!\n", uc_pdata->name); + return 0; + } + +@@ -134,27 +134,27 @@ static int ti_powerproc_start(struct udevice *dev) + + uc_pdata = dev_get_uclass_plat(dev); + if (!uc_pdata) { +- debug("%s: no uc pdata!\n", dev->name); ++printf("%s: no uc pdata!\n", dev->name); + return -EINVAL; + } + + priv = dev_get_priv(dev); + ret = psc_disable_module(priv->psc_module); + if (ret) { +- debug("%s Unable to disable module '%d'(ret=%d)\n", ++printf("%s Unable to disable module '%d'(ret=%d)\n", + uc_pdata->name, priv->psc_module, ret); + return ret; + } + + ret = psc_module_release_from_reset(priv->psc_module); + if (ret) { +- debug("%s Failed to wait for module '%d'(ret=%d)\n", ++printf("%s Failed to wait for module '%d'(ret=%d)\n", + uc_pdata->name, priv->psc_module, ret); + return ret; + } + ret = psc_enable_module(priv->psc_module); + if (ret) { +- debug("%s Unable to disable module '%d'(ret=%d)\n", ++printf("%s Unable to disable module '%d'(ret=%d)\n", + uc_pdata->name, priv->psc_module, ret); + return ret; + } +diff --git a/drivers/remoteproc/ti_sci_proc.h b/drivers/remoteproc/ti_sci_proc.h +index f8299d1af..067391554 100644 +--- a/drivers/remoteproc/ti_sci_proc.h ++++ b/drivers/remoteproc/ti_sci_proc.h +@@ -33,7 +33,7 @@ static inline int ti_sci_proc_request(struct ti_sci_proc *tsp) + { + int ret; + +- debug("%s: proc_id = %d\n", __func__, tsp->proc_id); ++printf("%s: proc_id = %d\n", __func__, tsp->proc_id); + + ret = tsp->ops->proc_request(tsp->sci, tsp->proc_id); + if (ret) +@@ -45,7 +45,7 @@ static inline int ti_sci_proc_release(struct ti_sci_proc *tsp) + { + int ret; + +- debug("%s: proc_id = %d\n", __func__, tsp->proc_id); ++printf("%s: proc_id = %d\n", __func__, tsp->proc_id); + + if (tsp->host_id != TISCI_INVALID_HOST) + ret = tsp->ops->proc_handover(tsp->sci, tsp->proc_id, +@@ -62,7 +62,7 @@ static inline int ti_sci_proc_handover(struct ti_sci_proc *tsp) + { + int ret; + +- debug("%s: proc_id = %d\n", __func__, tsp->proc_id); ++printf("%s: proc_id = %d\n", __func__, tsp->proc_id); + + ret = tsp->ops->proc_handover(tsp->sci, tsp->proc_id, tsp->host_id); + if (ret) +@@ -83,7 +83,7 @@ static inline int ti_sci_proc_get_status(struct ti_sci_proc *tsp, + if (ret) + pr_err("ti-sci processor get_status failed: %d\n", ret); + +- debug("%s: proc_id = %d, boot_vector = 0x%llx, cfg_flags = 0x%x, ctrl_flags = 0x%x, sts = 0x%x\n", ++printf("%s: proc_id = %d, boot_vector = 0x%llx, cfg_flags = 0x%x, ctrl_flags = 0x%x, sts = 0x%x\n", + __func__, tsp->proc_id, *boot_vector, *cfg_flags, *ctrl_flags, + *status_flags); + return ret; +@@ -95,7 +95,7 @@ static inline int ti_sci_proc_set_config(struct ti_sci_proc *tsp, + { + int ret; + +- debug("%s: proc_id = %d, boot_vector = 0x%llx, cfg_set = 0x%x, cfg_clr = 0x%x\n", ++printf("%s: proc_id = %d, boot_vector = 0x%llx, cfg_set = 0x%x, cfg_clr = 0x%x\n", + __func__, tsp->proc_id, boot_vector, cfg_set, cfg_clr); + + ret = tsp->ops->set_proc_boot_cfg(tsp->sci, tsp->proc_id, boot_vector, +@@ -110,7 +110,7 @@ static inline int ti_sci_proc_set_control(struct ti_sci_proc *tsp, + { + int ret; + +- debug("%s: proc_id = %d, ctrl_set = 0x%x, ctrl_clr = 0x%x\n", __func__, ++printf("%s: proc_id = %d, ctrl_set = 0x%x, ctrl_clr = 0x%x\n", __func__, + tsp->proc_id, ctrl_set, ctrl_clr); + + ret = tsp->ops->set_proc_boot_ctrl(tsp->sci, tsp->proc_id, ctrl_set, +@@ -124,7 +124,7 @@ static inline int ti_sci_proc_power_domain_on(struct ti_sci_proc *tsp) + { + int ret; + +- debug("%s: dev_id = %d\n", __func__, tsp->dev_id); ++printf("%s: dev_id = %d\n", __func__, tsp->dev_id); + + ret = tsp->sci->ops.dev_ops.get_device_exclusive(tsp->sci, tsp->dev_id); + if (ret) +@@ -137,7 +137,7 @@ static inline int ti_sci_proc_power_domain_off(struct ti_sci_proc *tsp) + { + int ret; + +- debug("%s: dev_id = %d\n", __func__, tsp->dev_id); ++printf("%s: dev_id = %d\n", __func__, tsp->dev_id); + + ret = tsp->sci->ops.dev_ops.put_device(tsp->sci, tsp->dev_id); + if (ret) +diff --git a/drivers/reset/reset-ast2500.c b/drivers/reset/reset-ast2500.c +index c3d650fc6..10ac5429d 100644 +--- a/drivers/reset/reset-ast2500.c ++++ b/drivers/reset/reset-ast2500.c +@@ -20,7 +20,7 @@ struct ast2500_reset_priv { + + static int ast2500_reset_request(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -28,7 +28,7 @@ static int ast2500_reset_request(struct reset_ctl *reset_ctl) + + static int ast2500_reset_free(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -39,7 +39,7 @@ static int ast2500_reset_assert(struct reset_ctl *reset_ctl) + struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev); + struct ast2500_scu *scu = priv->scu; + +- debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); ++printf("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); + + if (reset_ctl->id < 32) + setbits_le32(&scu->sysreset_ctrl1, BIT(reset_ctl->id)); +@@ -54,7 +54,7 @@ static int ast2500_reset_deassert(struct reset_ctl *reset_ctl) + struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev); + struct ast2500_scu *scu = priv->scu; + +- debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); ++printf("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); + + if (reset_ctl->id < 32) + clrbits_le32(&scu->sysreset_ctrl1, BIT(reset_ctl->id)); +@@ -74,13 +74,13 @@ static int ast2500_reset_probe(struct udevice *dev) + rc = uclass_get_device_by_driver(UCLASS_CLK, + DM_DRIVER_GET(aspeed_ast2500_scu), &scu_dev); + if (rc) { +- debug("%s: clock device not found, rc=%d\n", __func__, rc); ++printf("%s: clock device not found, rc=%d\n", __func__, rc); + return rc; + } + + priv->scu = devfdt_get_addr_ptr(scu_dev); + if (IS_ERR_OR_NULL(priv->scu)) { +- debug("%s: invalid SCU base pointer\n", __func__); ++printf("%s: invalid SCU base pointer\n", __func__); + return PTR_ERR(priv->scu); + } + +diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c +index f64adaf74..edf275eb9 100644 +--- a/drivers/reset/reset-ast2600.c ++++ b/drivers/reset/reset-ast2600.c +@@ -19,7 +19,7 @@ struct ast2600_reset_priv { + + static int ast2600_reset_request(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -27,7 +27,7 @@ static int ast2600_reset_request(struct reset_ctl *reset_ctl) + + static int ast2600_reset_free(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -38,7 +38,7 @@ static int ast2600_reset_assert(struct reset_ctl *reset_ctl) + struct ast2600_reset_priv *priv = dev_get_priv(reset_ctl->dev); + struct ast2600_scu *scu = priv->scu; + +- debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); ++printf("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); + + if (reset_ctl->id < 32) + writel(BIT(reset_ctl->id), scu->modrst_ctrl1); +@@ -53,7 +53,7 @@ static int ast2600_reset_deassert(struct reset_ctl *reset_ctl) + struct ast2600_reset_priv *priv = dev_get_priv(reset_ctl->dev); + struct ast2600_scu *scu = priv->scu; + +- debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); ++printf("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id); + + if (reset_ctl->id < 32) + writel(BIT(reset_ctl->id), scu->modrst_clr1); +@@ -73,13 +73,13 @@ static int ast2600_reset_probe(struct udevice *dev) + rc = uclass_get_device_by_driver(UCLASS_CLK, + DM_DRIVER_GET(aspeed_ast2600_scu), &scu_dev); + if (rc) { +- debug("%s: clock device not found, rc=%d\n", __func__, rc); ++printf("%s: clock device not found, rc=%d\n", __func__, rc); + return rc; + } + + priv->scu = devfdt_get_addr_ptr(scu_dev); + if (IS_ERR_OR_NULL(priv->scu)) { +- debug("%s: invalid SCU base pointer\n", __func__); ++printf("%s: invalid SCU base pointer\n", __func__); + return PTR_ERR(priv->scu); + } + +diff --git a/drivers/reset/reset-hisilicon.c b/drivers/reset/reset-hisilicon.c +index 3f9da8cc8..c7a763dbc 100644 +--- a/drivers/reset/reset-hisilicon.c ++++ b/drivers/reset/reset-hisilicon.c +@@ -60,7 +60,7 @@ static int hisi_reset_of_xlate(struct reset_ctl *rst, + struct ofnode_phandle_args *args) + { + if (args->args_count != 3) { +- debug("Invalid args_count: %d\n", args->args_count); ++printf("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + +diff --git a/drivers/reset/reset-hsdk.c b/drivers/reset/reset-hsdk.c +index 8318d0a20..addcd1b41 100644 +--- a/drivers/reset/reset-hsdk.c ++++ b/drivers/reset/reset-hsdk.c +@@ -69,7 +69,7 @@ static int hsdk_reset_reset(struct reset_ctl *rst_ctl) + if (rst_ctl->id >= HSDK_MAX_RESETS) + return -EINVAL; + +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, rst_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, rst_ctl, + rst_ctl->dev, rst_ctl->id); + + hsdk_reset_config(rst, rst_ctl->id); +diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c +index eeb3d2eea..f673dd681 100644 +--- a/drivers/reset/reset-rockchip.c ++++ b/drivers/reset/reset-rockchip.c +@@ -31,7 +31,7 @@ static int rockchip_reset_request(struct reset_ctl *reset_ctl) + { + struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); + +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_num=%d)\n", __func__, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_num=%d)\n", __func__, + reset_ctl, reset_ctl->dev, reset_ctl->id, priv->reset_reg_num); + + if (reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG >= priv->reset_reg_num) +@@ -42,7 +42,7 @@ static int rockchip_reset_request(struct reset_ctl *reset_ctl) + + static int rockchip_reset_free(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -54,7 +54,7 @@ static int rockchip_reset_assert(struct reset_ctl *reset_ctl) + int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG; + int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG; + +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, + reset_ctl, reset_ctl->dev, reset_ctl->id, + priv->base + (bank * 4)); + +@@ -69,7 +69,7 @@ static int rockchip_reset_deassert(struct reset_ctl *reset_ctl) + int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG; + int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG; + +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, + reset_ctl, reset_ctl->dev, reset_ctl->id, + priv->base + (bank * 4)); + +@@ -101,7 +101,7 @@ static int rockchip_reset_probe(struct udevice *dev) + addr += priv->reset_reg_offset; + priv->base = ioremap(addr, size); + +- debug("%s(base=%p) (reg_offset=%x, reg_num=%d)\n", __func__, ++printf("%s(base=%p) (reg_offset=%x, reg_num=%d)\n", __func__, + priv->base, priv->reset_reg_offset, priv->reset_reg_num); + + return 0; +@@ -116,7 +116,7 @@ int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number) + ret = device_bind_driver_to_node(pdev, "rockchip_reset", "reset", + dev_ofnode(pdev), &rst_dev); + if (ret) { +- debug("Warning: No rockchip reset driver: ret=%d\n", ret); ++printf("Warning: No rockchip reset driver: ret=%d\n", ret); + return ret; + } + priv = malloc(sizeof(struct rockchip_reset_priv)); +diff --git a/drivers/reset/reset-sifive.c b/drivers/reset/reset-sifive.c +index eec840d67..181df7370 100644 +--- a/drivers/reset/reset-sifive.c ++++ b/drivers/reset/reset-sifive.c +@@ -54,7 +54,7 @@ static int sifive_reset_request(struct reset_ctl *rst) + { + struct sifive_reset_priv *priv = dev_get_priv(rst->dev); + +- debug("%s(rst=%p) (dev=%p, id=%lu) (nr_reset=%d)\n", __func__, ++printf("%s(rst=%p) (dev=%p, id=%lu) (nr_reset=%d)\n", __func__, + rst, rst->dev, rst->id, priv->nr_reset); + + if (rst->id > priv->nr_reset) +@@ -67,7 +67,7 @@ static int sifive_reset_free(struct reset_ctl *rst) + { + struct sifive_reset_priv *priv = dev_get_priv(rst->dev); + +- debug("%s(rst=%p) (dev=%p, id=%lu) (nr_reset=%d)\n", __func__, ++printf("%s(rst=%p) (dev=%p, id=%lu) (nr_reset=%d)\n", __func__, + rst, rst->dev, rst->id, priv->nr_reset); + + return 0; +diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c +index 98450db94..b31aa1c0d 100644 +--- a/drivers/reset/reset-socfpga.c ++++ b/drivers/reset/reset-socfpga.c +@@ -91,7 +91,7 @@ static int socfpga_reset_deassert(struct reset_ctl *reset_ctl) + + static int socfpga_reset_request(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, + reset_ctl, reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -99,7 +99,7 @@ static int socfpga_reset_request(struct reset_ctl *reset_ctl) + + static int socfpga_reset_free(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -150,7 +150,7 @@ static int socfpga_reset_bind(struct udevice *dev) + ret = device_bind_driver_to_node(dev, "socfpga_sysreset", "sysreset", + dev_ofnode(dev), &sys_child); + if (ret) +- debug("Warning: No sysreset driver: ret=%d\n", ret); ++printf("Warning: No sysreset driver: ret=%d\n", ret); + + return 0; + } +diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c +index 264337ed8..db48d1591 100644 +--- a/drivers/reset/reset-sunxi.c ++++ b/drivers/reset/reset-sunxi.c +@@ -33,7 +33,7 @@ static int sunxi_reset_request(struct reset_ctl *reset_ctl) + { + struct sunxi_reset_priv *priv = dev_get_priv(reset_ctl->dev); + +- debug("%s: (RST#%ld)\n", __func__, reset_ctl->id); ++printf("%s: (RST#%ld)\n", __func__, reset_ctl->id); + + if (reset_ctl->id >= priv->count) + return -EINVAL; +@@ -43,7 +43,7 @@ static int sunxi_reset_request(struct reset_ctl *reset_ctl) + + static int sunxi_reset_free(struct reset_ctl *reset_ctl) + { +- debug("%s: (RST#%ld)\n", __func__, reset_ctl->id); ++printf("%s: (RST#%ld)\n", __func__, reset_ctl->id); + + return 0; + } +@@ -59,7 +59,7 @@ static int sunxi_set_reset(struct reset_ctl *reset_ctl, bool on) + return 0; + } + +- debug("%s: (RST#%ld) off#0x%x, BIT(%d)\n", __func__, ++printf("%s: (RST#%ld) off#0x%x, BIT(%d)\n", __func__, + reset_ctl->id, reset->off, ilog2(reset->bit)); + + reg = readl(priv->base + reset->off); +@@ -108,7 +108,7 @@ int sunxi_reset_bind(struct udevice *dev, ulong count) + ret = device_bind_driver_to_node(dev, "sunxi_reset", "reset", + dev_ofnode(dev), &rst_dev); + if (ret) { +- debug("failed to bind sunxi_reset driver (ret=%d)\n", ret); ++printf("failed to bind sunxi_reset driver (ret=%d)\n", ret); + return ret; + } + priv = malloc(sizeof(struct sunxi_reset_priv)); +diff --git a/drivers/reset/reset-ti-sci.c b/drivers/reset/reset-ti-sci.c +index d8510a4ab..c4ffb0083 100644 +--- a/drivers/reset/reset-ti-sci.c ++++ b/drivers/reset/reset-ti-sci.c +@@ -30,7 +30,7 @@ static int ti_sci_reset_probe(struct udevice *dev) + { + struct ti_sci_reset_data *data = dev_get_priv(dev); + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + if (!data) + return -ENOMEM; +@@ -46,10 +46,10 @@ static int ti_sci_reset_probe(struct udevice *dev) + static int ti_sci_reset_of_xlate(struct reset_ctl *rst, + struct ofnode_phandle_args *args) + { +- debug("%s(rst=%p, args_count=%d)\n", __func__, rst, args->args_count); ++printf("%s(rst=%p, args_count=%d)\n", __func__, rst, args->args_count); + + if (args->args_count != 2) { +- debug("Invalid args_count: %d\n", args->args_count); ++printf("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -65,13 +65,13 @@ static int ti_sci_reset_of_xlate(struct reset_ctl *rst, + + static int ti_sci_reset_request(struct reset_ctl *rst) + { +- debug("%s(rst=%p)\n", __func__, rst); ++printf("%s(rst=%p)\n", __func__, rst); + return 0; + } + + static int ti_sci_reset_free(struct reset_ctl *rst) + { +- debug("%s(rst=%p)\n", __func__, rst); ++printf("%s(rst=%p)\n", __func__, rst); + return 0; + } + +@@ -133,7 +133,7 @@ static int ti_sci_reset_set(struct reset_ctl *rst, bool assert) + */ + static int ti_sci_reset_assert(struct reset_ctl *rst) + { +- debug("%s(rst=%p)\n", __func__, rst); ++printf("%s(rst=%p)\n", __func__, rst); + return ti_sci_reset_set(rst, true); + } + +@@ -150,7 +150,7 @@ static int ti_sci_reset_assert(struct reset_ctl *rst) + */ + static int ti_sci_reset_deassert(struct reset_ctl *rst) + { +- debug("%s(rst=%p)\n", __func__, rst); ++printf("%s(rst=%p)\n", __func__, rst); + return ti_sci_reset_set(rst, false); + } + +@@ -174,7 +174,7 @@ static int ti_sci_reset_status(struct reset_ctl *rst) + u32 reset_state; + int ret; + +- debug("%s(rst=%p)\n", __func__, rst); ++printf("%s(rst=%p)\n", __func__, rst); + + ret = dops->get_device_resets(sci, rst->id, &reset_state); + if (ret) { +diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c +index ac89eaf09..073300ce5 100644 +--- a/drivers/reset/reset-uclass.c ++++ b/drivers/reset/reset-uclass.c +@@ -21,10 +21,10 @@ static inline struct reset_ops *reset_dev_ops(struct udevice *dev) + static int reset_of_xlate_default(struct reset_ctl *reset_ctl, + struct ofnode_phandle_args *args) + { +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + if (args->args_count != 1) { +- debug("Invaild args_count: %d\n", args->args_count); ++printf("Invaild args_count: %d\n", args->args_count); + return -EINVAL; + } + +@@ -49,9 +49,9 @@ static int reset_get_by_index_tail(int ret, ofnode node, + ret = uclass_get_device_by_ofnode(UCLASS_RESET, args->node, + &dev_reset); + if (ret) { +- debug("%s: uclass_get_device_by_ofnode() failed: %d\n", ++printf("%s: uclass_get_device_by_ofnode() failed: %d\n", + __func__, ret); +- debug("%s %d\n", ofnode_get_name(args->node), args->args[0]); ++printf("%s %d\n", ofnode_get_name(args->node), args->args[0]); + return ret; + } + ops = reset_dev_ops(dev_reset); +@@ -62,13 +62,13 @@ static int reset_get_by_index_tail(int ret, ofnode node, + else + ret = reset_of_xlate_default(reset_ctl, args); + if (ret) { +- debug("of_xlate() failed: %d\n", ret); ++printf("of_xlate() failed: %d\n", ret); + return ret; + } + + ret = ops->request(reset_ctl); + if (ret) { +- debug("ops->request() failed: %d\n", ret); ++printf("ops->request() failed: %d\n", ret); + return ret; + } + +@@ -131,7 +131,7 @@ static int __reset_get_bulk(struct udevice *dev, ofnode node, + bulk_get_err: + err = reset_release_all(bulk->resets, bulk->count); + if (err) +- debug("%s: could release all resets for %p\n", ++printf("%s: could release all resets for %p\n", + __func__, dev); + + return ret; +@@ -147,13 +147,13 @@ int reset_get_by_name(struct udevice *dev, const char *name, + { + int index; + +- debug("%s(dev=%p, name=%s, reset_ctl=%p)\n", __func__, dev, name, ++printf("%s(dev=%p, name=%s, reset_ctl=%p)\n", __func__, dev, name, + reset_ctl); + reset_ctl->dev = NULL; + + index = dev_read_stringlist_search(dev, "reset-names", name); + if (index < 0) { +- debug("fdt_stringlist_search() failed: %d\n", index); ++printf("fdt_stringlist_search() failed: %d\n", index); + return index; + } + +@@ -164,7 +164,7 @@ int reset_request(struct reset_ctl *reset_ctl) + { + struct reset_ops *ops = reset_dev_ops(reset_ctl->dev); + +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + return ops->request(reset_ctl); + } +@@ -173,7 +173,7 @@ int reset_free(struct reset_ctl *reset_ctl) + { + struct reset_ops *ops = reset_dev_ops(reset_ctl->dev); + +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + return ops->rfree(reset_ctl); + } +@@ -182,7 +182,7 @@ int reset_assert(struct reset_ctl *reset_ctl) + { + struct reset_ops *ops = reset_dev_ops(reset_ctl->dev); + +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + return ops->rst_assert(reset_ctl); + } +@@ -204,7 +204,7 @@ int reset_deassert(struct reset_ctl *reset_ctl) + { + struct reset_ops *ops = reset_dev_ops(reset_ctl->dev); + +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + return ops->rst_deassert(reset_ctl); + } +@@ -226,7 +226,7 @@ int reset_status(struct reset_ctl *reset_ctl) + { + struct reset_ops *ops = reset_dev_ops(reset_ctl->dev); + +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + return ops->rst_status(reset_ctl); + } +@@ -236,7 +236,7 @@ int reset_release_all(struct reset_ctl *reset_ctl, int count) + int i, ret; + + for (i = 0; i < count; i++) { +- debug("%s(reset_ctl[%d]=%p)\n", __func__, i, &reset_ctl[i]); ++printf("%s(reset_ctl[%d]=%p)\n", __func__, i, &reset_ctl[i]); + + /* check if reset has been previously requested */ + if (!reset_ctl[i].dev) +diff --git a/drivers/reset/sandbox-reset.c b/drivers/reset/sandbox-reset.c +index 97b1b92e4..3e1dc441d 100644 +--- a/drivers/reset/sandbox-reset.c ++++ b/drivers/reset/sandbox-reset.c +@@ -26,7 +26,7 @@ static int sandbox_reset_request(struct reset_ctl *reset_ctl) + { + struct sandbox_reset *sbr = dev_get_priv(reset_ctl->dev); + +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + if (reset_ctl->id >= SANDBOX_RESET_SIGNALS) + return -EINVAL; +@@ -39,7 +39,7 @@ static int sandbox_reset_free(struct reset_ctl *reset_ctl) + { + struct sandbox_reset *sbr = dev_get_priv(reset_ctl->dev); + +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + sbr->signals[reset_ctl->id].requested = false; + return 0; +@@ -49,7 +49,7 @@ static int sandbox_reset_assert(struct reset_ctl *reset_ctl) + { + struct sandbox_reset *sbr = dev_get_priv(reset_ctl->dev); + +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + sbr->signals[reset_ctl->id].asserted = true; + +@@ -60,7 +60,7 @@ static int sandbox_reset_deassert(struct reset_ctl *reset_ctl) + { + struct sandbox_reset *sbr = dev_get_priv(reset_ctl->dev); + +- debug("%s(reset_ctl=%p)\n", __func__, reset_ctl); ++printf("%s(reset_ctl=%p)\n", __func__, reset_ctl); + + sbr->signals[reset_ctl->id].asserted = false; + +@@ -69,14 +69,14 @@ static int sandbox_reset_deassert(struct reset_ctl *reset_ctl) + + static int sandbox_reset_bind(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } + + static int sandbox_reset_probe(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +@@ -107,7 +107,7 @@ int sandbox_reset_query(struct udevice *dev, unsigned long id) + { + struct sandbox_reset *sbr = dev_get_priv(dev); + +- debug("%s(dev=%p, id=%ld)\n", __func__, dev, id); ++printf("%s(dev=%p, id=%ld)\n", __func__, dev, id); + + if (id >= SANDBOX_RESET_SIGNALS) + return -EINVAL; +@@ -119,7 +119,7 @@ int sandbox_reset_is_requested(struct udevice *dev, unsigned long id) + { + struct sandbox_reset *sbr = dev_get_priv(dev); + +- debug("%s(dev=%p, id=%ld)\n", __func__, dev, id); ++printf("%s(dev=%p, id=%ld)\n", __func__, dev, id); + + if (id >= SANDBOX_RESET_SIGNALS) + return -EINVAL; +diff --git a/drivers/reset/tegra-car-reset.c b/drivers/reset/tegra-car-reset.c +index a33d4533a..072bb99b9 100644 +--- a/drivers/reset/tegra-car-reset.c ++++ b/drivers/reset/tegra-car-reset.c +@@ -13,7 +13,7 @@ + + static int tegra_car_reset_request(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + /* PERIPH_ID_COUNT varies per SoC */ +@@ -25,7 +25,7 @@ static int tegra_car_reset_request(struct reset_ctl *reset_ctl) + + static int tegra_car_reset_free(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -33,7 +33,7 @@ static int tegra_car_reset_free(struct reset_ctl *reset_ctl) + + static int tegra_car_reset_assert(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + reset_set_enable(reset_ctl->id, 1); +@@ -43,7 +43,7 @@ static int tegra_car_reset_assert(struct reset_ctl *reset_ctl) + + static int tegra_car_reset_deassert(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + reset_set_enable(reset_ctl->id, 0); +@@ -60,7 +60,7 @@ struct reset_ops tegra_car_reset_ops = { + + static int tegra_car_reset_probe(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +diff --git a/drivers/reset/tegra186-reset.c b/drivers/reset/tegra186-reset.c +index c60a03f0b..b748740a5 100644 +--- a/drivers/reset/tegra186-reset.c ++++ b/drivers/reset/tegra186-reset.c +@@ -13,7 +13,7 @@ + + static int tegra186_reset_request(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -21,7 +21,7 @@ static int tegra186_reset_request(struct reset_ctl *reset_ctl) + + static int tegra186_reset_free(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +@@ -46,7 +46,7 @@ static int tegra186_reset_common(struct reset_ctl *reset_ctl, + + static int tegra186_reset_assert(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return tegra186_reset_common(reset_ctl, CMD_RESET_ASSERT); +@@ -54,7 +54,7 @@ static int tegra186_reset_assert(struct reset_ctl *reset_ctl) + + static int tegra186_reset_deassert(struct reset_ctl *reset_ctl) + { +- debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, ++printf("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return tegra186_reset_common(reset_ctl, CMD_RESET_DEASSERT); +@@ -69,7 +69,7 @@ struct reset_ops tegra186_reset_ops = { + + static int tegra186_reset_probe(struct udevice *dev) + { +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + return 0; + } +diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c +index c446e7a73..1de2279da 100644 +--- a/drivers/rtc/davinci.c ++++ b/drivers/rtc/davinci.c +@@ -33,7 +33,7 @@ int rtc_get(struct rtc_time *tmp) + mon_cent = readl(&rtc->month); + year = readl(&rtc->year); + +- debug("Get RTC year: %02lx mon/cent: %02lx mday: %02lx wday: %02lx " ++printf("Get RTC year: %02lx mon/cent: %02lx mday: %02lx wday: %02lx " + "hr: %02lx min: %02lx sec: %02lx\n", + year, mon_cent, mday, wday, + hour, min, sec); +@@ -48,7 +48,7 @@ int rtc_get(struct rtc_time *tmp) + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -59,7 +59,7 @@ int rtc_set(struct rtc_time *tmp) + { + struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + writel(bin2bcd(tmp->tm_year % 100), &rtc->year); +diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c +index 2015ce9bb..2df8e4a18 100644 +--- a/drivers/rtc/ds1307.c ++++ b/drivers/rtc/ds1307.c +@@ -214,7 +214,7 @@ static int ds1307_rtc_set(struct udevice *dev, const struct rtc_time *tm) + uchar buf[7]; + enum ds_type type = dev_get_driver_data(dev); + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + +@@ -304,7 +304,7 @@ read_rtc: + tm->tm_yday = 0; + tm->tm_isdst = 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + +diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c +index 4986c96f8..253b47bb1 100644 +--- a/drivers/rtc/ds1337.c ++++ b/drivers/rtc/ds1337.c +@@ -90,7 +90,7 @@ int rtc_get (struct rtc_time *tmp) + mon_cent |= 0x80; + #endif + +- debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " ++printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " + "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", + year, mon_cent, mday, wday, hour, min, sec, control, status); + +@@ -112,7 +112,7 @@ int rtc_get (struct rtc_time *tmp) + tmp->tm_yday = 0; + tmp->tm_isdst= 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -127,7 +127,7 @@ int rtc_set (struct rtc_time *tmp) + { + uchar century; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -223,9 +223,9 @@ static int ds1337_rtc_get(struct udevice *dev, struct rtc_time *tmp) + mon_cent |= 0x80; + #endif + +- debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x\n", ++printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x\n", + year, mon_cent, mday, wday); +- debug("hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", ++printf("hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", + hour, min, sec, control, status); + + if (status & RTC_STAT_BIT_OSF) { +@@ -246,7 +246,7 @@ static int ds1337_rtc_get(struct udevice *dev, struct rtc_time *tmp) + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -257,7 +257,7 @@ static int ds1337_rtc_set(struct udevice *dev, const struct rtc_time *tmp) + { + uchar century; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +diff --git a/drivers/rtc/ds3231.c b/drivers/rtc/ds3231.c +index 5b72e8676..8394159d6 100644 +--- a/drivers/rtc/ds3231.c ++++ b/drivers/rtc/ds3231.c +@@ -78,7 +78,7 @@ int rtc_get (struct rtc_time *tmp) + mon_cent = rtc_read (RTC_MON_REG_ADDR); + year = rtc_read (RTC_YR_REG_ADDR); + +- debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " ++printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " + "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", + year, mon_cent, mday, wday, hour, min, sec, control, status); + +@@ -100,7 +100,7 @@ int rtc_get (struct rtc_time *tmp) + tmp->tm_yday = 0; + tmp->tm_isdst= 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -115,7 +115,7 @@ int rtc_set (struct rtc_time *tmp) + { + uchar century; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -205,7 +205,7 @@ static int ds3231_rtc_get(struct udevice *dev, struct rtc_time *tmp) + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -216,7 +216,7 @@ static int ds3231_rtc_set(struct udevice *dev, const struct rtc_time *tmp) + { + uchar century; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +diff --git a/drivers/rtc/ftrtc010.c b/drivers/rtc/ftrtc010.c +index 67c2b6e32..6feebe0ed 100644 +--- a/drivers/rtc/ftrtc010.c ++++ b/drivers/rtc/ftrtc010.c +@@ -77,7 +77,7 @@ int rtc_get(struct rtc_time *tmp) + { + unsigned long now; + +- debug("%s(): record register: %x\n", ++printf("%s(): record register: %x\n", + __func__, readl(&rtc->record)); + + #ifdef CONFIG_FTRTC010_PCLK +@@ -99,7 +99,7 @@ int rtc_set(struct rtc_time *tmp) + unsigned long new; + unsigned long now; + +- debug("%s(): DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("%s(): DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + __func__, + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); +@@ -108,7 +108,7 @@ int rtc_set(struct rtc_time *tmp) + + now = ftrtc010_time(); + +- debug("%s(): write %lx to record register\n", __func__, new - now); ++printf("%s(): write %lx to record register\n", __func__, new - now); + + writel(new - now, &rtc->record); + +@@ -117,6 +117,6 @@ int rtc_set(struct rtc_time *tmp) + + void rtc_reset(void) + { +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + ftrtc010_enable(); + } +diff --git a/drivers/rtc/i2c_rtc_emul.c b/drivers/rtc/i2c_rtc_emul.c +index ba418c25d..e4696eb16 100644 +--- a/drivers/rtc/i2c_rtc_emul.c ++++ b/drivers/rtc/i2c_rtc_emul.c +@@ -152,7 +152,7 @@ static int sandbox_i2c_rtc_xfer(struct udevice *emul, struct i2c_msg *msg, + uint offset = 0; + int ret; + +- debug("\n%s\n", __func__); ++printf("\n%s\n", __func__); + ret = sandbox_i2c_rtc_prepare_read(emul); + if (ret) + return ret; +@@ -161,11 +161,11 @@ static int sandbox_i2c_rtc_xfer(struct udevice *emul, struct i2c_msg *msg, + u8 *ptr; + + len = msg->len; +- debug(" %s: msg->len=%d", ++printf(" %s: msg->len=%d", + msg->flags & I2C_M_RD ? "read" : "write", + msg->len); + if (msg->flags & I2C_M_RD) { +- debug(", offset %x, len %x: ", offset, len); ++printf(", offset %x, len %x: ", offset, len); + + /* Read the register */ + memcpy(msg->buf, plat->reg + offset, len); +@@ -175,7 +175,7 @@ static int sandbox_i2c_rtc_xfer(struct udevice *emul, struct i2c_msg *msg, + ptr = msg->buf; + offset = *ptr++ & (REG_COUNT - 1); + len--; +- debug(", set offset %x: ", offset); ++printf(", set offset %x: ", offset); + debug_buffer(0, msg->buf, 1, msg->len, 0); + + /* Write the register */ +diff --git a/drivers/rtc/m41t11.c b/drivers/rtc/m41t11.c +index 706b7188c..dd94672a2 100644 +--- a/drivers/rtc/m41t11.c ++++ b/drivers/rtc/m41t11.c +@@ -110,7 +110,7 @@ int rtc_get (struct rtc_time *tmp) + tmp->tm_yday = 0; + tmp->tm_isdst= 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -121,7 +121,7 @@ int rtc_set (struct rtc_time *tmp) + { + uchar data[RTC_REG_CNT]; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +diff --git a/drivers/rtc/m41t60.c b/drivers/rtc/m41t60.c +index 692042b93..db1fa9d72 100644 +--- a/drivers/rtc/m41t60.c ++++ b/drivers/rtc/m41t60.c +@@ -162,7 +162,7 @@ int rtc_get(struct rtc_time *tmp) + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -176,7 +176,7 @@ int rtc_set(struct rtc_time *tmp) + if (!data) + return -1; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c +index 0a4e12d69..5305d650b 100644 +--- a/drivers/rtc/m41t62.c ++++ b/drivers/rtc/m41t62.c +@@ -64,7 +64,7 @@ + + static void m41t62_update_rtc_time(struct rtc_time *tm, u8 *buf) + { +- debug("%s: raw read data - sec=%02x, min=%02x, hr=%02x, " ++printf("%s: raw read data - sec=%02x, min=%02x, hr=%02x, " + "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n", + __FUNCTION__, + buf[0], buf[1], buf[2], buf[3], +@@ -81,7 +81,7 @@ static void m41t62_update_rtc_time(struct rtc_time *tm, u8 *buf) + /* U-Boot needs to add 1900 here */ + tm->tm_year = bcd2bin(buf[M41T62_REG_YEAR]) + 100 + 1900; + +- debug("%s: tm is secs=%d, mins=%d, hours=%d, " ++printf("%s: tm is secs=%d, mins=%d, hours=%d, " + "mday=%d, mon=%d, year=%d, wday=%d\n", + __FUNCTION__, + tm->tm_sec, tm->tm_min, tm->tm_hour, +@@ -90,7 +90,7 @@ static void m41t62_update_rtc_time(struct rtc_time *tm, u8 *buf) + + static void m41t62_set_rtc_buf(const struct rtc_time *tm, u8 *buf) + { +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + +diff --git a/drivers/rtc/pcf2127.c b/drivers/rtc/pcf2127.c +index 57f86401d..78bb2fb1a 100644 +--- a/drivers/rtc/pcf2127.c ++++ b/drivers/rtc/pcf2127.c +@@ -97,7 +97,7 @@ static int pcf2127_rtc_get(struct udevice *dev, struct rtc_time *tm) + tm->tm_yday = 0; + tm->tm_isdst = 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + +diff --git a/drivers/rtc/pcf8563.c b/drivers/rtc/pcf8563.c +index 19faefba7..8fa9bcd2a 100644 +--- a/drivers/rtc/pcf8563.c ++++ b/drivers/rtc/pcf8563.c +@@ -132,11 +132,11 @@ static int pcf8563_rtc_get(struct udevice *dev, struct rtc_time *tmp) + mon_cent = dm_i2c_reg_read(dev, 0x07); + year = dm_i2c_reg_read(dev, 0x08); + +- debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x ", ++printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x ", + year, mon_cent, mday, wday); +- debug("hr: %02x min: %02x sec: %02x\n", ++printf("hr: %02x min: %02x sec: %02x\n", + hour, min, sec); +- debug("Alarms: wday: %02x day: %02x hour: %02x min: %02x\n", ++printf("Alarms: wday: %02x day: %02x hour: %02x min: %02x\n", + dm_i2c_reg_read(dev, 0x0C), + dm_i2c_reg_read(dev, 0x0B), + dm_i2c_reg_read(dev, 0x0A), +@@ -157,7 +157,7 @@ static int pcf8563_rtc_get(struct udevice *dev, struct rtc_time *tmp) + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -168,7 +168,7 @@ static int pcf8563_rtc_set(struct udevice *dev, const struct rtc_time *tmp) + { + uchar century; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +diff --git a/drivers/rtc/pl031.c b/drivers/rtc/pl031.c +index a1d376611..147cdf798 100644 +--- a/drivers/rtc/pl031.c ++++ b/drivers/rtc/pl031.c +@@ -72,7 +72,7 @@ static int pl031_get(struct udevice *dev, struct rtc_time *tm) + + rtc_to_tm(tim, tm); + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + +@@ -89,7 +89,7 @@ static int pl031_set(struct udevice *dev, const struct rtc_time *tm) + if (!tm) + return -EINVAL; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + +diff --git a/drivers/rtc/pt7c4338.c b/drivers/rtc/pt7c4338.c +index c987494b6..5969bcdba 100644 +--- a/drivers/rtc/pt7c4338.c ++++ b/drivers/rtc/pt7c4338.c +@@ -76,7 +76,7 @@ int rtc_get(struct rtc_time *tmp) + mday = rtc_read(RTC_DATE_REG_ADDR); + mon = rtc_read(RTC_MON_REG_ADDR); + year = rtc_read(RTC_YR_REG_ADDR); +- debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " ++printf("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " + "hr: %02x min: %02x sec: %02x control_status: %02x\n", + year, mon, mday, wday, hour, min, sec, ctl_stat); + +@@ -98,7 +98,7 @@ int rtc_get(struct rtc_time *tmp) + tmp->tm_wday = bcd2bin((wday - 1) & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst = 0; +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -108,7 +108,7 @@ int rtc_get(struct rtc_time *tmp) + /* Set the RTC */ + int rtc_set(struct rtc_time *tmp) + { +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -153,9 +153,9 @@ static int pt7c4338_rtc_get(struct udevice *dev, struct rtc_time *tmp) + mday = rtc_read(dev, RTC_DATE_REG_ADDR); + mon = rtc_read(dev, RTC_MON_REG_ADDR); + year = rtc_read(dev, RTC_YR_REG_ADDR); +- debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x\n", ++printf("Get RTC year: %02x mon: %02x mday: %02x wday: %02x\n", + year, mon, mday, wday); +- debug("hr: %02x min: %02x sec: %02x control_status: %02x\n", ++printf("hr: %02x min: %02x sec: %02x control_status: %02x\n", + hour, min, sec, ctl_stat); + + if (ctl_stat & RTC_CTL_STAT_BIT_OSF) { +@@ -177,7 +177,7 @@ static int pt7c4338_rtc_get(struct udevice *dev, struct rtc_time *tmp) + tmp->tm_wday = bcd2bin((wday - 1) & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst = 0; +- debug("Get DATE: %4d-%02d-%02d [wday=%d] TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d [wday=%d] TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +@@ -186,7 +186,7 @@ static int pt7c4338_rtc_get(struct udevice *dev, struct rtc_time *tmp) + + static int pt7c4338_rtc_set(struct udevice *dev, const struct rtc_time *tmp) + { +- debug("Set DATE: %4d-%02d-%02d [wday=%d] TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d [wday=%d] TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + +diff --git a/drivers/rtc/rv3028.c b/drivers/rtc/rv3028.c +index 9f63afc14..ccfada8c4 100644 +--- a/drivers/rtc/rv3028.c ++++ b/drivers/rtc/rv3028.c +@@ -111,7 +111,7 @@ static int rv3028_rtc_get(struct udevice *dev, struct rtc_time *tm) + tm->tm_yday = 0; + tm->tm_isdst = 0; + +- debug("%s: %4d-%02d-%02d (wday=%d) %2d:%02d:%02d\n", ++printf("%s: %4d-%02d-%02d (wday=%d) %2d:%02d:%02d\n", + __func__, tm->tm_year, tm->tm_mon, tm->tm_mday, + tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec); + +@@ -124,7 +124,7 @@ static int rv3028_rtc_set(struct udevice *dev, const struct rtc_time *tm) + u8 status; + int ret; + +- debug("%s: %4d-%02d-%02d (wday=%d( %2d:%02d:%02d\n", ++printf("%s: %4d-%02d-%02d (wday=%d( %2d:%02d:%02d\n", + __func__, tm->tm_year, tm->tm_mon, tm->tm_mday, + tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec); + +diff --git a/drivers/rtc/rv3029.c b/drivers/rtc/rv3029.c +index 3afe5b2fd..13181aa68 100644 +--- a/drivers/rtc/rv3029.c ++++ b/drivers/rtc/rv3029.c +@@ -114,7 +114,7 @@ static int rv3029_rtc_get(struct udevice *dev, struct rtc_time *tm) + tm->tm_yday = 0; + tm->tm_isdst = 0; + +- debug("%s: %4d-%02d-%02d (wday=%d) %2d:%02d:%02d\n", ++printf("%s: %4d-%02d-%02d (wday=%d) %2d:%02d:%02d\n", + __func__, tm->tm_year, tm->tm_mon, tm->tm_mday, + tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec); + +@@ -125,7 +125,7 @@ static int rv3029_rtc_set(struct udevice *dev, const struct rtc_time *tm) + { + u8 regs[RTC_RV3029_PAGE_LEN]; + +- debug("%s: %4d-%02d-%02d (wday=%d( %2d:%02d:%02d\n", ++printf("%s: %4d-%02d-%02d (wday=%d( %2d:%02d:%02d\n", + __func__, tm->tm_year, tm->tm_mon, tm->tm_mday, + tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec); + +diff --git a/drivers/rtc/rv8803.c b/drivers/rtc/rv8803.c +index acd50c656..04a7aa3c0 100644 +--- a/drivers/rtc/rv8803.c ++++ b/drivers/rtc/rv8803.c +@@ -41,7 +41,7 @@ static int rv8803_rtc_set(struct udevice *dev, const struct rtc_time *tm) + int ret; + u8 buf[7]; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + +@@ -72,7 +72,7 @@ static int rv8803_rtc_get(struct udevice *dev, struct rtc_time *tm) + flags = dm_i2c_reg_read(dev, RTC_FLAG_REG_ADDR); + if (flags < 0) + return flags; +- debug("%s: flags=%Xh\n", __func__, flags); ++printf("%s: flags=%Xh\n", __func__, flags); + + if (flags & RTC_FLAG_BIT_V1F) + printf("### Warning: temperature compensation has stopped\n"); +@@ -96,7 +96,7 @@ static int rv8803_rtc_get(struct udevice *dev, struct rtc_time *tm) + tm->tm_yday = 0; + tm->tm_isdst = 0; + +- debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + +@@ -134,7 +134,7 @@ static int rv8803_rtc_reset(struct udevice *dev) + if (ret < 0) + return ret; + +- debug("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n", ++printf("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n", + tmp.tm_year, tmp.tm_mon, tmp.tm_mday, + tmp.tm_hour, tmp.tm_min, tmp.tm_sec); + +diff --git a/drivers/rtc/x1205.c b/drivers/rtc/x1205.c +index ce23427b1..d3921d82c 100644 +--- a/drivers/rtc/x1205.c ++++ b/drivers/rtc/x1205.c +@@ -91,7 +91,7 @@ int rtc_get(struct rtc_time *tm) + + i2c_read(CONFIG_SYS_I2C_RTC_ADDR, X1205_CCR_BASE, 2, buf, 8); + +- debug("%s: raw read data - sec=%02x, min=%02x, hr=%02x, " ++printf("%s: raw read data - sec=%02x, min=%02x, hr=%02x, " + "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n", + __FUNCTION__, + buf[0], buf[1], buf[2], buf[3], +@@ -106,7 +106,7 @@ int rtc_get(struct rtc_time *tm) + + (bcd2bin(buf[CCR_Y2K]) * 100); + tm->tm_wday = buf[CCR_WDAY]; + +- debug("%s: tm is secs=%d, mins=%d, hours=%d, " ++printf("%s: tm is secs=%d, mins=%d, hours=%d, " + "mday=%d, mon=%d, year=%d, wday=%d\n", + __FUNCTION__, + tm->tm_sec, tm->tm_min, tm->tm_hour, +@@ -120,7 +120,7 @@ int rtc_set(struct rtc_time *tm) + int i; + u8 buf[8]; + +- debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", ++printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + +diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c +index ce69750c7..44a7d8c22 100644 +--- a/drivers/scsi/scsi.c ++++ b/drivers/scsi/scsi.c +@@ -80,7 +80,7 @@ void scsi_setup_read16(struct scsi_cmd *pccb, lbaint_t start, + pccb->cmd[15] = 0; + pccb->cmdlen = 16; + pccb->msgout[0] = SCSI_IDENTIFY; /* NOT USED */ +- debug("scsi_setup_read16: cmd: %02X %02X startblk %02X%02X%02X%02X%02X%02X%02X%02X blccnt %02X%02X%02X%02X\n", ++printf("scsi_setup_read16: cmd: %02X %02X startblk %02X%02X%02X%02X%02X%02X%02X%02X blccnt %02X%02X%02X%02X\n", + pccb->cmd[0], pccb->cmd[1], + pccb->cmd[2], pccb->cmd[3], pccb->cmd[4], pccb->cmd[5], + pccb->cmd[6], pccb->cmd[7], pccb->cmd[8], pccb->cmd[9], +@@ -119,7 +119,7 @@ static void scsi_setup_read_ext(struct scsi_cmd *pccb, lbaint_t start, + pccb->cmd[6] = 0; + pccb->cmdlen = 10; + pccb->msgout[0] = SCSI_IDENTIFY; /* NOT USED */ +- debug("scsi_setup_read_ext: cmd: %02X %02X startblk %02X%02X%02X%02X blccnt %02X%02X\n", ++printf("scsi_setup_read_ext: cmd: %02X %02X startblk %02X%02X%02X%02X blccnt %02X%02X\n", + pccb->cmd[0], pccb->cmd[1], + pccb->cmd[2], pccb->cmd[3], pccb->cmd[4], pccb->cmd[5], + pccb->cmd[7], pccb->cmd[8]); +@@ -140,7 +140,7 @@ static void scsi_setup_write_ext(struct scsi_cmd *pccb, lbaint_t start, + pccb->cmd[9] = 0; + pccb->cmdlen = 10; + pccb->msgout[0] = SCSI_IDENTIFY; /* NOT USED */ +- debug("%s: cmd: %02X %02X startblk %02X%02X%02X%02X blccnt %02X%02X\n", ++printf("%s: cmd: %02X %02X startblk %02X%02X%02X%02X blccnt %02X%02X\n", + __func__, + pccb->cmd[0], pccb->cmd[1], + pccb->cmd[2], pccb->cmd[3], pccb->cmd[4], pccb->cmd[5], +@@ -169,7 +169,7 @@ static ulong scsi_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, + else + max_blks = SCSI_MAX_BLK; + +- debug("\nscsi_read: dev %d startblk " LBAF ++printf("\nscsi_read: dev %d startblk " LBAF + ", blccnt " LBAF " buffer %lx\n", + block_dev->devnum, start, blks, (unsigned long)buffer); + do { +@@ -198,7 +198,7 @@ static ulong scsi_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, + start += blks; + blks = 0; + } +- debug("scsi_read_ext: startblk " LBAF ++printf("scsi_read_ext: startblk " LBAF + ", blccnt %x buffer %lX\n", + start, smallblks, buf_addr); + if (scsi_exec(bdev, pccb)) { +@@ -208,7 +208,7 @@ static ulong scsi_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, + } + buf_addr += pccb->datalen; + } while (blks != 0); +- debug("scsi_read_ext: end startblk " LBAF ++printf("scsi_read_ext: end startblk " LBAF + ", blccnt %x buffer %lX\n", start, smallblks, buf_addr); + return blkcnt; + } +@@ -239,7 +239,7 @@ static ulong scsi_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, + else + max_blks = SCSI_MAX_BLK; + +- debug("\n%s: dev %d startblk " LBAF ", blccnt " LBAF " buffer %lx\n", ++printf("\n%s: dev %d startblk " LBAF ", blccnt " LBAF " buffer %lx\n", + __func__, block_dev->devnum, start, blks, (unsigned long)buffer); + do { + pccb->pdata = (unsigned char *)buf_addr; +@@ -257,7 +257,7 @@ static ulong scsi_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, + start += blks; + blks = 0; + } +- debug("%s: startblk " LBAF ", blccnt %x buffer %lx\n", ++printf("%s: startblk " LBAF ", blccnt %x buffer %lx\n", + __func__, start, smallblks, buf_addr); + if (scsi_exec(bdev, pccb)) { + scsi_print_error(pccb); +@@ -266,7 +266,7 @@ static ulong scsi_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, + } + buf_addr += pccb->datalen; + } while (blks != 0); +- debug("%s: end startblk " LBAF ", blccnt %x buffer %lX\n", ++printf("%s: end startblk " LBAF ", blccnt %x buffer %lX\n", + __func__, start, smallblks, buf_addr); + return blkcnt; + } +@@ -503,7 +503,7 @@ static int scsi_detect_dev(struct udevice *dev, int target, int lun, + * selection timeout => assuming no + * device present + */ +- debug("Selection timeout ID %d\n", ++printf("Selection timeout ID %d\n", + pccb->target); + return -ETIMEDOUT; + } +@@ -583,7 +583,7 @@ static int do_scsi_scan_one(struct udevice *dev, int id, int lun, bool verbose) + ret = blk_create_devicef(dev, "scsi_blk", str, IF_TYPE_SCSI, -1, + bd.blksz, bd.lba, &bdev); + if (ret) { +- debug("Can't create device\n"); ++printf("Can't create device\n"); + return ret; + } + +diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c +index cc121eee2..15d0090df 100644 +--- a/drivers/serial/ns16550.c ++++ b/drivers/serial/ns16550.c +@@ -557,7 +557,7 @@ int ns16550_serial_of_to_plat(struct udevice *dev) + if (!IS_ERR_VALUE(err)) + plat->clock = err; + } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { +- debug("ns16550 failed to get clock\n"); ++printf("ns16550 failed to get clock\n"); + return err; + } + +@@ -567,7 +567,7 @@ int ns16550_serial_of_to_plat(struct udevice *dev) + if (!plat->clock) + plat->clock = CONFIG_SYS_NS16550_CLK; + if (!plat->clock) { +- debug("ns16550 clock not defined\n"); ++printf("ns16550 clock not defined\n"); + return -EINVAL; + } + +diff --git a/drivers/serial/serial_efi.c b/drivers/serial/serial_efi.c +index 33ddbd608..3a4013e14 100644 +--- a/drivers/serial/serial_efi.c ++++ b/drivers/serial/serial_efi.c +@@ -65,7 +65,7 @@ static int serial_efi_getc(struct udevice *dev) + */ + if (!ch && priv->key.scan_code == 8) + ch = 8; +- debug(" [%x %x %x] ", ch, priv->key.unicode_char, priv->key.scan_code); ++printf(" [%x %x %x] ", ch, priv->key.unicode_char, priv->key.scan_code); + + return ch; + } +diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c +index 2b473d70f..0292a4e17 100644 +--- a/drivers/serial/serial_lpuart.c ++++ b/drivers/serial/serial_lpuart.c +@@ -502,7 +502,7 @@ static int lpuart_serial_probe(struct udevice *dev) + return ret; + } + } else { +- debug("%s: Failed to get per clk: %d\n", __func__, ret); ++printf("%s: Failed to get per clk: %d\n", __func__, ret); + } + #endif + +diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c +index 4145d9fdb..fa52e5392 100644 +--- a/drivers/serial/serial_mtk.c ++++ b/drivers/serial/serial_mtk.c +@@ -226,7 +226,7 @@ static int mtk_serial_of_to_plat(struct udevice *dev) + if (!IS_ERR_VALUE(err)) + priv->clock = err; + } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { +- debug("mtk_serial: failed to get clock\n"); ++printf("mtk_serial: failed to get clock\n"); + return err; + } + +@@ -234,7 +234,7 @@ static int mtk_serial_of_to_plat(struct udevice *dev) + priv->clock = dev_read_u32_default(dev, "clock-frequency", 0); + + if (!priv->clock) { +- debug("mtk_serial: clock not defined\n"); ++printf("mtk_serial: clock not defined\n"); + return -EINVAL; + } + +diff --git a/drivers/serial/serial_octeon_bootcmd.c b/drivers/serial/serial_octeon_bootcmd.c +index 4bcff77eb..df95931eb 100644 +--- a/drivers/serial/serial_octeon_bootcmd.c ++++ b/drivers/serial/serial_octeon_bootcmd.c +@@ -147,11 +147,11 @@ static int octeon_bootcmd_probe(struct udevice *dev) + else + priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_OCTEON; + +- debug("%s called, buffer ptr: 0x%p, owner: %s\n", __func__, ++printf("%s called, buffer ptr: 0x%p, owner: %s\n", __func__, + priv->buf, + priv->buf->owner == OCTEON_PCI_IO_BUF_OWNER_HOST ? + "host" : "octeon"); +- debug("&priv->copy_offset: 0x%p\n", &priv->copy_offset); ++printf("&priv->copy_offset: 0x%p\n", &priv->copy_offset); + CVMX_SYNC; + + /* +diff --git a/drivers/serial/serial_octeon_pcie_console.c b/drivers/serial/serial_octeon_pcie_console.c +index c76e787d0..2cde4d685 100644 +--- a/drivers/serial/serial_octeon_pcie_console.c ++++ b/drivers/serial/serial_octeon_pcie_console.c +@@ -344,7 +344,7 @@ static int octeon_pcie_console_probe(struct udevice *dev) + priv->console = + cvmx_phys_to_ptr(cons_desc->console_addr_array[console_num]); + +- debug("PCI console init succeeded, %d consoles, %d bytes each\n", ++printf("PCI console init succeeded, %d consoles, %d bytes each\n", + console_count, console_size); + + return 0; +diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c +index 2b23ece44..ca3285685 100644 +--- a/drivers/serial/serial_omap.c ++++ b/drivers/serial/serial_omap.c +@@ -122,7 +122,7 @@ static int omap_serial_of_to_plat(struct udevice *dev) + if (!IS_ERR_VALUE(err)) + plat->clock = err; + } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { +- debug("omap serial failed to get clock\n"); ++printf("omap serial failed to get clock\n"); + return err; + } + +@@ -130,7 +130,7 @@ static int omap_serial_of_to_plat(struct udevice *dev) + plat->clock = dev_read_u32_default(dev, "clock-frequency", + CONFIG_SYS_NS16550_CLK); + if (!plat->clock) { +- debug("omap serial clock not defined\n"); ++printf("omap serial clock not defined\n"); + return -EINVAL; + } + +diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c +index 5283d5ed1..645a6627f 100644 +--- a/drivers/serial/serial_pl01x.c ++++ b/drivers/serial/serial_pl01x.c +@@ -375,7 +375,7 @@ int pl01x_serial_of_to_plat(struct udevice *dev) + dev_err(dev, "failed to get rate\n"); + return plat->clock; + } +- debug("%s: CLK %d\n", __func__, plat->clock); ++printf("%s: CLK %d\n", __func__, plat->clock); + } + plat->type = dev_get_driver_data(dev); + plat->skip_init = dev_read_bool(dev, "skip-init"); +diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c +index 794f9c924..0e1a91d4e 100644 +--- a/drivers/serial/serial_sifive.c ++++ b/drivers/serial/serial_sifive.c +@@ -111,16 +111,16 @@ static int sifive_serial_setbrg(struct udevice *dev, int baudrate) + + ret = clk_get_by_index(dev, 0, &clk); + if (IS_ERR_VALUE(ret)) { +- debug("SiFive UART failed to get clock\n"); ++printf("SiFive UART failed to get clock\n"); + ret = dev_read_u32(dev, "clock-frequency", &clock); + if (IS_ERR_VALUE(ret)) { +- debug("SiFive UART clock not defined\n"); ++printf("SiFive UART clock not defined\n"); + return 0; + } + } else { + clock = clk_get_rate(&clk); + if (IS_ERR_VALUE(clock)) { +- debug("SiFive UART clock get rate failed\n"); ++printf("SiFive UART clock get rate failed\n"); + return 0; + } + } +diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c +index 2cada4efb..3ce937bfd 100644 +--- a/drivers/serial/serial_sti_asc.c ++++ b/drivers/serial/serial_sti_asc.c +@@ -100,7 +100,7 @@ static int _sti_asc_serial_setbrg(struct sti_asc_uart *uart, int baudrate) + t = BAUDRATE_VAL_M1(57600); + break; + default: +- debug("ASC: unsupported baud rate: %d, using 115200 instead.\n", ++printf("ASC: unsupported baud rate: %d, using 115200 instead.\n", + baudrate); + case 115200: + t = BAUDRATE_VAL_M1(115200); +diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c +index 799d52404..15b7e46e3 100644 +--- a/drivers/serial/serial_zynq.c ++++ b/drivers/serial/serial_zynq.c +@@ -124,7 +124,7 @@ static int zynq_serial_setbrg(struct udevice *dev, int baudrate) + dev_err(dev, "failed to get rate\n"); + return clock; + } +- debug("%s: CLK %ld\n", __func__, clock); ++printf("%s: CLK %ld\n", __func__, clock); + + ret = clk_enable(&clk); + if (ret) { +diff --git a/drivers/sound/max98088.c b/drivers/sound/max98088.c +index 4bcb7482b..4d3dcc712 100644 +--- a/drivers/sound/max98088.c ++++ b/drivers/sound/max98088.c +@@ -72,7 +72,7 @@ int max98088_hw_params(struct maxim_priv *priv, unsigned int rate, + M98088_DAI_WS, M98088_DAI_WS); + break; + default: +- debug("%s: Illegal bits per sample %d.\n", ++printf("%s: Illegal bits per sample %d.\n", + __func__, bits_per_sample); + return -EINVAL; + } +@@ -80,7 +80,7 @@ int max98088_hw_params(struct maxim_priv *priv, unsigned int rate, + error |= maxim_bic_or(priv, M98088_REG_PWR_SYS, M98088_SHDNRUN, 0); + + if (rate_value(rate, ®val)) { +- debug("%s: Failed to set sample rate to %d.\n", ++printf("%s: Failed to set sample rate to %d.\n", + __func__, rate); + return -EIO; + } +@@ -101,7 +101,7 @@ int max98088_hw_params(struct maxim_priv *priv, unsigned int rate, + M98088_SHDNRUN); + + if (error < 0) { +- debug("%s: Error setting hardware params.\n", __func__); ++printf("%s: Error setting hardware params.\n", __func__); + return -EIO; + } + priv->rate = rate; +@@ -136,7 +136,7 @@ int max98088_set_sysclk(struct maxim_priv *priv, unsigned int freq) + } else if ((freq >= 20000000) && (freq < 30000000)) { + error = maxim_i2c_write(priv, M98088_REG_SYS_CLK, 0x20); + } else { +- debug("%s: Invalid master clock frequency\n", __func__); ++printf("%s: Invalid master clock frequency\n", __func__); + return -EIO; + } + +@@ -148,7 +148,7 @@ int max98088_set_sysclk(struct maxim_priv *priv, unsigned int freq) + M98088_SHDNRUN, M98088_SHDNRUN); + } + +- debug("%s: Clock at %uHz\n", __func__, freq); ++printf("%s: Clock at %uHz\n", __func__, freq); + if (error < 0) + return -EIO; + +@@ -191,7 +191,7 @@ int max98088_set_fmt(struct maxim_priv *priv, int fmt) + case SND_SOC_DAIFMT_CBS_CFM: + case SND_SOC_DAIFMT_CBM_CFS: + default: +- debug("%s: Clock mode unsupported\n", __func__); ++printf("%s: Clock mode unsupported\n", __func__); + return -EINVAL; + } + +@@ -202,7 +202,7 @@ int max98088_set_fmt(struct maxim_priv *priv, int fmt) + case SND_SOC_DAIFMT_LEFT_J: + break; + default: +- debug("%s: Unrecognized format.\n", __func__); ++printf("%s: Unrecognized format.\n", __func__); + return -EINVAL; + } + +@@ -219,7 +219,7 @@ int max98088_set_fmt(struct maxim_priv *priv, int fmt) + reg14val |= M98088_DAI_BCI | M98088_DAI_WCI; + break; + default: +- debug("%s: Unrecognized inversion settings.\n", __func__); ++printf("%s: Unrecognized inversion settings.\n", __func__); + return -EINVAL; + } + +@@ -230,7 +230,7 @@ int max98088_set_fmt(struct maxim_priv *priv, int fmt) + error |= maxim_i2c_write(priv, M98088_REG_DAI1_CLOCK, reg15val); + + if (error < 0) { +- debug("%s: Error setting i2s format.\n", __func__); ++printf("%s: Error setting i2s format.\n", __func__); + return -EIO; + } + +@@ -265,7 +265,7 @@ static int max98088_reset(struct maxim_priv *priv) + } + ret = maxim_i2c_write(priv, i, val); + if (ret < 0) { +- debug("%s: Failed to reset: %d\n", __func__, ret); ++printf("%s: Failed to reset: %d\n", __func__, ret); + return ret; + } + } +@@ -288,7 +288,7 @@ static int max98088_device_init(struct maxim_priv *priv) + /* reset the codec, the DSP core, and disable all interrupts */ + error = max98088_reset(priv); + if (error != 0) { +- debug("Reset\n"); ++printf("Reset\n"); + return error; + } + +@@ -299,11 +299,11 @@ static int max98088_device_init(struct maxim_priv *priv) + + error = maxim_i2c_read(priv, M98088_REG_REV_ID, &id); + if (error < 0) { +- debug("%s: Failure reading hardware revision: %d\n", ++printf("%s: Failure reading hardware revision: %d\n", + __func__, id); + return -EIO; + } +- debug("%s: Hardware revision: %d\n", __func__, id); ++printf("%s: Hardware revision: %d\n", __func__, id); + + return 0; + } +@@ -361,13 +361,13 @@ static int max98088_do_init(struct maxim_priv *priv, int sampling_rate, + + ret = max98088_setup_interface(priv); + if (ret < 0) { +- debug("%s: max98088 setup interface failed\n", __func__); ++printf("%s: max98088 setup interface failed\n", __func__); + return ret; + } + + ret = max98088_set_sysclk(priv, mclk_freq); + if (ret < 0) { +- debug("%s: max98088 codec set sys clock failed\n", __func__); ++printf("%s: max98088 codec set sys clock failed\n", __func__); + return ret; + } + +@@ -399,7 +399,7 @@ static int max98088_probe(struct udevice *dev) + priv->dev = dev; + ret = max98088_device_init(priv); + if (ret < 0) { +- debug("%s: max98088 codec chip init failed\n", __func__); ++printf("%s: max98088 codec chip init failed\n", __func__); + return ret; + } + +diff --git a/drivers/sound/max98090.c b/drivers/sound/max98090.c +index c77a73227..c52a33600 100644 +--- a/drivers/sound/max98090.c ++++ b/drivers/sound/max98090.c +@@ -41,7 +41,7 @@ int max98090_hw_params(struct maxim_priv *priv, unsigned int rate, + maxim_i2c_read(priv, M98090_REG_INTERFACE_FORMAT, &value); + break; + default: +- debug("%s: Illegal bits per sample %d.\n", ++printf("%s: Illegal bits per sample %d.\n", + __func__, bits_per_sample); + return -1; + } +@@ -63,7 +63,7 @@ int max98090_hw_params(struct maxim_priv *priv, unsigned int rate, + M98090_DHF_MASK, M98090_DHF_MASK); + + if (error < 0) { +- debug("%s: Error setting hardware params.\n", __func__); ++printf("%s: Error setting hardware params.\n", __func__); + return -EIO; + } + priv->rate = rate; +@@ -102,11 +102,11 @@ int max98090_set_sysclk(struct maxim_priv *priv, unsigned int freq) + error = maxim_i2c_write(priv, M98090_REG_SYSTEM_CLOCK, + M98090_PSCLK_DIV4); + } else { +- debug("%s: Invalid master clock frequency\n", __func__); ++printf("%s: Invalid master clock frequency\n", __func__); + return -1; + } + +- debug("%s: Clock at %uHz\n", __func__, freq); ++printf("%s: Clock at %uHz\n", __func__, freq); + + if (error < 0) + return -1; +@@ -146,12 +146,12 @@ int max98090_set_fmt(struct maxim_priv *priv, int fmt) + break; + case SND_SOC_DAIFMT_CBM_CFM: + /* Set to master mode */ +- debug("Master mode not supported\n"); ++printf("Master mode not supported\n"); + break; + case SND_SOC_DAIFMT_CBS_CFM: + case SND_SOC_DAIFMT_CBM_CFS: + default: +- debug("%s: Clock mode unsupported\n", __func__); ++printf("%s: Clock mode unsupported\n", __func__); + return -EINVAL; + } + +@@ -170,7 +170,7 @@ int max98090_set_fmt(struct maxim_priv *priv, int fmt) + case SND_SOC_DAIFMT_DSP_A: + /* Not supported mode */ + default: +- debug("%s: Unrecognized format.\n", __func__); ++printf("%s: Unrecognized format.\n", __func__); + return -EINVAL; + } + +@@ -187,14 +187,14 @@ int max98090_set_fmt(struct maxim_priv *priv, int fmt) + regval |= M98090_BCI_MASK | M98090_WCI_MASK; + break; + default: +- debug("%s: Unrecognized inversion settings.\n", __func__); ++printf("%s: Unrecognized inversion settings.\n", __func__); + return -EINVAL; + } + + error |= maxim_i2c_write(priv, M98090_REG_INTERFACE_FORMAT, regval); + + if (error < 0) { +- debug("%s: Error setting i2s format.\n", __func__); ++printf("%s: Error setting i2s format.\n", __func__); + return -EIO; + } + +@@ -218,7 +218,7 @@ static int max98090_reset(struct maxim_priv *priv) + ret = maxim_i2c_write(priv, M98090_REG_SOFTWARE_RESET, + M98090_SWRESET_MASK); + if (ret != 0) { +- debug("%s: Failed to reset DSP: %d\n", __func__, ret); ++printf("%s: Failed to reset DSP: %d\n", __func__, ret); + return ret; + } + mdelay(20); +@@ -241,7 +241,7 @@ int max98090_device_init(struct maxim_priv *priv) + /* reset the codec, the DSP core, and disable all interrupts */ + error = max98090_reset(priv); + if (error != 0) { +- debug("Reset\n"); ++printf("Reset\n"); + return error; + } + +@@ -252,11 +252,11 @@ int max98090_device_init(struct maxim_priv *priv) + + error = maxim_i2c_read(priv, M98090_REG_REVISION_ID, &id); + if (error < 0) { +- debug("%s: Failure reading hardware revision: %d\n", ++printf("%s: Failure reading hardware revision: %d\n", + __func__, id); + return -EIO; + } +- debug("%s: Hardware revision: %d\n", __func__, id); ++printf("%s: Hardware revision: %d\n", __func__, id); + + return 0; + } +@@ -308,13 +308,13 @@ static int max98090_do_init(struct maxim_priv *priv, int sampling_rate, + + ret = max98090_setup_interface(priv); + if (ret < 0) { +- debug("%s: max98090 setup interface failed\n", __func__); ++printf("%s: max98090 setup interface failed\n", __func__); + return ret; + } + + ret = max98090_set_sysclk(priv, mclk_freq); + if (ret < 0) { +- debug("%s: max98090 codec set sys clock failed\n", __func__); ++printf("%s: max98090 codec set sys clock failed\n", __func__); + return ret; + } + +@@ -346,7 +346,7 @@ static int max98090_probe(struct udevice *dev) + priv->dev = dev; + ret = max98090_device_init(priv); + if (ret < 0) { +- debug("%s: max98090 codec chip init failed\n", __func__); ++printf("%s: max98090 codec chip init failed\n", __func__); + return ret; + } + +diff --git a/drivers/sound/max98095.c b/drivers/sound/max98095.c +index 002dab437..df14aaa7b 100644 +--- a/drivers/sound/max98095.c ++++ b/drivers/sound/max98095.c +@@ -84,13 +84,13 @@ static int max98095_hw_params(struct maxim_priv *priv, + M98095_DAI_WS); + break; + default: +- debug("%s: Illegal bits per sample %d.\n", ++printf("%s: Illegal bits per sample %d.\n", + __func__, bits_per_sample); + return -EINVAL; + } + + if (rate_value(rate, ®val)) { +- debug("%s: Failed to set sample rate to %d.\n", ++printf("%s: Failed to set sample rate to %d.\n", + __func__, rate); + return -EINVAL; + } +@@ -108,7 +108,7 @@ static int max98095_hw_params(struct maxim_priv *priv, + M98095_DAI_DHF, M98095_DAI_DHF); + + if (error < 0) { +- debug("%s: Error setting hardware params.\n", __func__); ++printf("%s: Error setting hardware params.\n", __func__); + return -EIO; + } + +@@ -143,11 +143,11 @@ static int max98095_set_sysclk(struct maxim_priv *priv, unsigned int freq) + } else if ((freq >= 40000000) && (freq < 60000000)) { + error = maxim_i2c_write(priv, M98095_026_SYS_CLK, 0x30); + } else { +- debug("%s: Invalid master clock frequency\n", __func__); ++printf("%s: Invalid master clock frequency\n", __func__); + return -EINVAL; + } + +- debug("%s: Clock at %uHz\n", __func__, freq); ++printf("%s: Clock at %uHz\n", __func__, freq); + + if (error < 0) + return -EIO; +@@ -205,7 +205,7 @@ static int max98095_set_fmt(struct maxim_priv *priv, int fmt, + case SND_SOC_DAIFMT_CBS_CFM: + case SND_SOC_DAIFMT_CBM_CFS: + default: +- debug("%s: Clock mode unsupported\n", __func__); ++printf("%s: Clock mode unsupported\n", __func__); + return -EINVAL; + } + +@@ -216,7 +216,7 @@ static int max98095_set_fmt(struct maxim_priv *priv, int fmt, + case SND_SOC_DAIFMT_LEFT_J: + break; + default: +- debug("%s: Unrecognized format.\n", __func__); ++printf("%s: Unrecognized format.\n", __func__); + return -EINVAL; + } + +@@ -233,7 +233,7 @@ static int max98095_set_fmt(struct maxim_priv *priv, int fmt, + regval |= M98095_DAI_BCI | M98095_DAI_WCI; + break; + default: +- debug("%s: Unrecognized inversion settings.\n", __func__); ++printf("%s: Unrecognized inversion settings.\n", __func__); + return -EINVAL; + } + +@@ -244,7 +244,7 @@ static int max98095_set_fmt(struct maxim_priv *priv, int fmt, + error |= maxim_i2c_write(priv, M98095_DAI_CLOCK, M98095_DAI_BSEL64); + + if (error < 0) { +- debug("%s: Error setting i2s format.\n", __func__); ++printf("%s: Error setting i2s format.\n", __func__); + return -EIO; + } + +@@ -267,13 +267,13 @@ static int max98095_reset(struct maxim_priv *priv) + */ + ret = maxim_i2c_write(priv, M98095_00F_HOST_CFG, 0); + if (ret != 0) { +- debug("%s: Failed to reset DSP: %d\n", __func__, ret); ++printf("%s: Failed to reset DSP: %d\n", __func__, ret); + return ret; + } + + ret = maxim_i2c_write(priv, M98095_097_PWR_SYS, 0); + if (ret != 0) { +- debug("%s: Failed to reset codec: %d\n", __func__, ret); ++printf("%s: Failed to reset codec: %d\n", __func__, ret); + return ret; + } + +@@ -284,7 +284,7 @@ static int max98095_reset(struct maxim_priv *priv) + for (i = M98095_010_HOST_INT_CFG; i < M98095_REG_MAX_CACHED; i++) { + ret = maxim_i2c_write(priv, i, 0); + if (ret < 0) { +- debug("%s: Failed to reset: %d\n", __func__, ret); ++printf("%s: Failed to reset: %d\n", __func__, ret); + return ret; + } + } +@@ -306,7 +306,7 @@ static int max98095_device_init(struct maxim_priv *priv) + /* reset the codec, the DSP core, and disable all interrupts */ + ret = max98095_reset(priv); + if (ret != 0) { +- debug("Reset\n"); ++printf("Reset\n"); + return ret; + } + +@@ -317,11 +317,11 @@ static int max98095_device_init(struct maxim_priv *priv) + + ret = maxim_i2c_read(priv, M98095_0FF_REV_ID, &id); + if (ret < 0) { +- debug("%s: Failure reading hardware revision: %d\n", ++printf("%s: Failure reading hardware revision: %d\n", + __func__, id); + return ret; + } +- debug("%s: Hardware revision: %c\n", __func__, (id - 0x40) + 'A'); ++printf("%s: Hardware revision: %c\n", __func__, (id - 0x40) + 'A'); + + return 0; + } +@@ -399,13 +399,13 @@ static int max98095_do_init(struct maxim_priv *priv, + + ret = max98095_setup_interface(priv, aif_id); + if (ret < 0) { +- debug("%s: max98095 setup interface failed\n", __func__); ++printf("%s: max98095 setup interface failed\n", __func__); + return ret; + } + + ret = max98095_set_sysclk(priv, mclk_freq); + if (ret < 0) { +- debug("%s: max98095 codec set sys clock failed\n", __func__); ++printf("%s: max98095 codec set sys clock failed\n", __func__); + return ret; + } + +@@ -440,7 +440,7 @@ static int max98095_probe(struct udevice *dev) + priv->dev = dev; + ret = max98095_device_init(priv); + if (ret < 0) { +- debug("%s: max98095 codec chip init failed\n", __func__); ++printf("%s: max98095 codec chip init failed\n", __func__); + return ret; + } + +diff --git a/drivers/sound/maxim_codec.c b/drivers/sound/maxim_codec.c +index 31e67ee67..beb37f1c9 100644 +--- a/drivers/sound/maxim_codec.c ++++ b/drivers/sound/maxim_codec.c +@@ -27,7 +27,7 @@ + int maxim_i2c_write(struct maxim_priv *priv, unsigned int reg, + unsigned char data) + { +- debug("%s: Write Addr : 0x%02X, Data : 0x%02X\n", ++printf("%s: Write Addr : 0x%02X, Data : 0x%02X\n", + __func__, reg, data); + return dm_i2c_write(priv->dev, reg, &data, 1); + } +@@ -48,7 +48,7 @@ unsigned int maxim_i2c_read(struct maxim_priv *priv, unsigned int reg, + + return dm_i2c_read(priv->dev, reg, data, 1); + if (ret != 0) { +- debug("%s: Error while reading register %#04x\n", ++printf("%s: Error while reading register %#04x\n", + __func__, reg); + return -1; + } +diff --git a/drivers/sound/rockchip_sound.c b/drivers/sound/rockchip_sound.c +index 94058e603..4a9069ba1 100644 +--- a/drivers/sound/rockchip_sound.c ++++ b/drivers/sound/rockchip_sound.c +@@ -99,12 +99,12 @@ static int rockchip_sound_probe(struct udevice *dev) + } + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); + if (ret) { +- debug("%s: Cannot find pinctrl device\n", __func__); ++printf("%s: Cannot find pinctrl device\n", __func__); + return ret; + } + ret = pinctrl_request(pinctrl, PERIPH_ID_I2S, 0); + if (ret) { +- debug("%s: Cannot select I2C pinctrl\n", __func__); ++printf("%s: Cannot select I2C pinctrl\n", __func__); + return ret; + } + +diff --git a/drivers/sound/samsung-i2s.c b/drivers/sound/samsung-i2s.c +index d3d75c046..4f86a30ef 100644 +--- a/drivers/sound/samsung-i2s.c ++++ b/drivers/sound/samsung-i2s.c +@@ -170,7 +170,7 @@ static int i2s_set_fmt(struct i2s_reg *i2s_reg, unsigned int fmt) + tmp |= MOD_SDF_IIS; + break; + default: +- debug("%s: Invalid format priority [0x%x]\n", __func__, ++printf("%s: Invalid format priority [0x%x]\n", __func__, + (fmt & SND_SOC_DAIFMT_FORMAT_MASK)); + return -ERANGE; + } +@@ -189,7 +189,7 @@ static int i2s_set_fmt(struct i2s_reg *i2s_reg, unsigned int fmt) + tmp |= MOD_LR_RLOW; + break; + default: +- debug("%s: Invalid clock ploarity input [0x%x]\n", __func__, ++printf("%s: Invalid clock ploarity input [0x%x]\n", __func__, + (fmt & SND_SOC_DAIFMT_INV_MASK)); + return -ERANGE; + } +@@ -202,12 +202,12 @@ static int i2s_set_fmt(struct i2s_reg *i2s_reg, unsigned int fmt) + /* Set default source clock in Master mode */ + ret = i2s_set_sysclk_dir(i2s_reg, SND_SOC_CLOCK_OUT); + if (ret != 0) { +- debug("%s:set i2s clock direction failed\n", __func__); ++printf("%s:set i2s clock direction failed\n", __func__); + return ret; + } + break; + default: +- debug("%s: Invalid master selection [0x%x]\n", __func__, ++printf("%s: Invalid master selection [0x%x]\n", __func__, + (fmt & SND_SOC_DAIFMT_MASTER_MASK)); + return -ERANGE; + } +@@ -248,7 +248,7 @@ static int i2s_set_samplesize(struct i2s_reg *i2s_reg, unsigned int blc) + mod |= MOD_BLC_24BIT; + break; + default: +- debug("%s: Invalid sample size input [0x%x]\n", ++printf("%s: Invalid sample size input [0x%x]\n", + __func__, blc); + return -ERANGE; + } +@@ -266,7 +266,7 @@ int i2s_transfer_tx_data(struct i2s_uc_priv *pi2s_tx, void *data, + int start; + + if (data_size < FIFO_LENGTH) { +- debug("%s : Invalid data size\n", __func__); ++printf("%s : Invalid data size\n", __func__); + return -ENODATA; /* invalid pcm data size */ + } + +@@ -285,7 +285,7 @@ int i2s_transfer_tx_data(struct i2s_uc_priv *pi2s_tx, void *data, + } else { + if (get_timer(start) > TIMEOUT_I2S_TX) { + i2s_txctrl(i2s_reg, I2S_TX_OFF); +- debug("%s: I2S Transfer Timeout\n", __func__); ++printf("%s: I2S Transfer Timeout\n", __func__); + return -ETIMEDOUT; + } + } +@@ -313,19 +313,19 @@ static int i2s_tx_init(struct i2s_uc_priv *pi2s_tx) + /* Set EPLL Clock */ + ret = set_epll_clk(pi2s_tx->audio_pll_clk); + } else { +- debug("%s: unsupported i2s-%d bus\n", __func__, pi2s_tx->id); ++printf("%s: unsupported i2s-%d bus\n", __func__, pi2s_tx->id); + return -ERANGE; + } + + if (ret) { +- debug("%s: epll clock set rate failed\n", __func__); ++printf("%s: epll clock set rate failed\n", __func__); + return ret; + } + + /* Select Clk Source for Audio 0 or 1 */ + ret = set_i2s_clk_source(pi2s_tx->id); + if (ret) { +- debug("%s: unsupported clock for i2s-%d\n", __func__, ++printf("%s: unsupported clock for i2s-%d\n", __func__, + pi2s_tx->id); + return ret; + } +@@ -344,7 +344,7 @@ static int i2s_tx_init(struct i2s_uc_priv *pi2s_tx) + pi2s_tx->id); + } + if (ret) { +- debug("%s: unsupported prescalar for i2s-%d\n", __func__, ++printf("%s: unsupported prescalar for i2s-%d\n", __func__, + pi2s_tx->id); + return ret; + } +@@ -356,7 +356,7 @@ static int i2s_tx_init(struct i2s_uc_priv *pi2s_tx) + i2s_set_lr_framesize(i2s_reg, pi2s_tx->rfs); + ret = i2s_set_samplesize(i2s_reg, pi2s_tx->bitspersample); + if (ret != 0) { +- debug("%s:set sample rate failed\n", __func__); ++printf("%s:set sample rate failed\n", __func__); + return ret; + } + +@@ -365,7 +365,7 @@ static int i2s_tx_init(struct i2s_uc_priv *pi2s_tx) + i2s_txctrl(i2s_reg, I2S_TX_OFF); + i2s_fifo(i2s_reg, FIC_TXFLUSH); + } else { +- debug("%s: failed\n", __func__); ++printf("%s: failed\n", __func__); + } + + return ret; +@@ -398,7 +398,7 @@ static int samsung_i2s_of_to_plat(struct udevice *dev) + */ + base = dev_read_addr(dev); + if (base == FDT_ADDR_T_NONE) { +- debug("%s: Missing i2s base\n", __func__); ++printf("%s: Missing i2s base\n", __func__); + return -EINVAL; + } + priv->base_address = base; +@@ -406,33 +406,33 @@ static int samsung_i2s_of_to_plat(struct udevice *dev) + if (dev_read_u32u(dev, "samsung,i2s-epll-clock-frequency", + &priv->audio_pll_clk)) + goto err; +- debug("audio_pll_clk = %d\n", priv->audio_pll_clk); ++printf("audio_pll_clk = %d\n", priv->audio_pll_clk); + if (dev_read_u32u(dev, "samsung,i2s-sampling-rate", + &priv->samplingrate)) + goto err; +- debug("samplingrate = %d\n", priv->samplingrate); ++printf("samplingrate = %d\n", priv->samplingrate); + if (dev_read_u32u(dev, "samsung,i2s-bits-per-sample", + &priv->bitspersample)) + goto err; +- debug("bitspersample = %d\n", priv->bitspersample); ++printf("bitspersample = %d\n", priv->bitspersample); + if (dev_read_u32u(dev, "samsung,i2s-channels", &priv->channels)) + goto err; +- debug("channels = %d\n", priv->channels); ++printf("channels = %d\n", priv->channels); + if (dev_read_u32u(dev, "samsung,i2s-lr-clk-framesize", &priv->rfs)) + goto err; +- debug("rfs = %d\n", priv->rfs); ++printf("rfs = %d\n", priv->rfs); + if (dev_read_u32u(dev, "samsung,i2s-bit-clk-framesize", &priv->bfs)) + goto err; +- debug("bfs = %d\n", priv->bfs); ++printf("bfs = %d\n", priv->bfs); + + if (dev_read_u32u(dev, "samsung,i2s-id", &priv->id)) + goto err; +- debug("id = %d\n", priv->id); ++printf("id = %d\n", priv->id); + + return 0; + + err: +- debug("fail to get sound i2s node properties\n"); ++printf("fail to get sound i2s node properties\n"); + + return -EINVAL; + } +diff --git a/drivers/sound/samsung_sound.c b/drivers/sound/samsung_sound.c +index 473cedf7e..4b6208a88 100644 +--- a/drivers/sound/samsung_sound.c ++++ b/drivers/sound/samsung_sound.c +@@ -59,26 +59,26 @@ static int samsung_sound_probe(struct udevice *dev) + "samsung,audio-codec", + &uc_priv->codec); + if (ret) { +- debug("Failed to probe audio codec\n"); ++printf("Failed to probe audio codec\n"); + return ret; + } + node = ofnode_find_subnode(dev_ofnode(dev), "cpu"); + if (!ofnode_valid(node)) { +- debug("Failed to find /cpu subnode\n"); ++printf("Failed to find /cpu subnode\n"); + return -EINVAL; + } + ret = ofnode_parse_phandle_with_args(node, "sound-dai", + "#sound-dai-cells", 0, 0, &args); + if (ret) { +- debug("Cannot find phandle: %d\n", ret); ++printf("Cannot find phandle: %d\n", ret); + return ret; + } + ret = uclass_get_device_by_ofnode(UCLASS_I2S, args.node, &uc_priv->i2s); + if (ret) { +- debug("Cannot find i2s: %d\n", ret); ++printf("Cannot find i2s: %d\n", ret); + return ret; + } +- debug("Probed sound '%s' with codec '%s' and i2s '%s'\n", dev->name, ++printf("Probed sound '%s' with codec '%s' and i2s '%s'\n", dev->name, + uc_priv->codec->name, uc_priv->i2s->name); + + /* Enable codec clock */ +diff --git a/drivers/sound/sound-uclass.c b/drivers/sound/sound-uclass.c +index 0c71e01f3..4dc71806b 100644 +--- a/drivers/sound/sound-uclass.c ++++ b/drivers/sound/sound-uclass.c +@@ -93,7 +93,7 @@ int sound_beep(struct udevice *dev, int msecs, int frequency_hz) + data_size *= (i2s_uc_priv->bitspersample / SOUND_BITS_IN_BYTE); + data = malloc(data_size); + if (!data) { +- debug("%s: malloc failed\n", __func__); ++printf("%s: malloc failed\n", __func__); + return -ENOMEM; + } + +@@ -130,40 +130,40 @@ int sound_find_codec_i2s(struct udevice *dev) + /* First the codec */ + node = ofnode_find_subnode(dev_ofnode(dev), "codec"); + if (!ofnode_valid(node)) { +- debug("Failed to find /cpu subnode\n"); ++printf("Failed to find /cpu subnode\n"); + return -EINVAL; + } + ret = ofnode_parse_phandle_with_args(node, "sound-dai", + "#sound-dai-cells", 0, 0, &args); + if (ret) { +- debug("Cannot find phandle: %d\n", ret); ++printf("Cannot find phandle: %d\n", ret); + return ret; + } + ret = uclass_get_device_by_ofnode(UCLASS_AUDIO_CODEC, args.node, + &uc_priv->codec); + if (ret) { +- debug("Cannot find codec: %d\n", ret); ++printf("Cannot find codec: %d\n", ret); + return ret; + } + + /* Now the i2s */ + node = ofnode_find_subnode(dev_ofnode(dev), "cpu"); + if (!ofnode_valid(node)) { +- debug("Failed to find /cpu subnode\n"); ++printf("Failed to find /cpu subnode\n"); + return -EINVAL; + } + ret = ofnode_parse_phandle_with_args(node, "sound-dai", + "#sound-dai-cells", 0, 0, &args); + if (ret) { +- debug("Cannot find phandle: %d\n", ret); ++printf("Cannot find phandle: %d\n", ret); + return ret; + } + ret = uclass_get_device_by_ofnode(UCLASS_I2S, args.node, &uc_priv->i2s); + if (ret) { +- debug("Cannot find i2s: %d\n", ret); ++printf("Cannot find i2s: %d\n", ret); + return ret; + } +- debug("Probed sound '%s' with codec '%s' and i2s '%s'\n", dev->name, ++printf("Probed sound '%s' with codec '%s' and i2s '%s'\n", dev->name, + uc_priv->codec->name, uc_priv->i2s->name); + + return 0; +diff --git a/drivers/sound/tegra_i2s.c b/drivers/sound/tegra_i2s.c +index 932f73790..a1c7fa0f3 100644 +--- a/drivers/sound/tegra_i2s.c ++++ b/drivers/sound/tegra_i2s.c +@@ -90,7 +90,7 @@ static int tegra_i2s_probe(struct udevice *dev) + + base = dev_read_addr(dev); + if (base == FDT_ADDR_T_NONE) { +- debug("%s: Missing i2s base\n", __func__); ++printf("%s: Missing i2s base\n", __func__); + return -EINVAL; + } + priv->base_address = base; +diff --git a/drivers/sound/wm8994.c b/drivers/sound/wm8994.c +index cb1e97d7a..c400be084 100644 +--- a/drivers/sound/wm8994.c ++++ b/drivers/sound/wm8994.c +@@ -80,7 +80,7 @@ static int wm8994_i2c_write(struct wm8994_priv *priv, unsigned int reg, + + val[0] = (unsigned char)((data >> 8) & 0xff); + val[1] = (unsigned char)(data & 0xff); +- debug("Write Addr : 0x%04X, Data : 0x%04X\n", reg, data); ++printf("Write Addr : 0x%04X, Data : 0x%04X\n", reg, data); + + return dm_i2c_write(priv->dev, reg, val, 2); + } +@@ -102,7 +102,7 @@ static unsigned int wm8994_i2c_read(struct wm8994_priv *priv, unsigned int reg, + + ret = dm_i2c_read(priv->dev, reg, val, 1); + if (ret != 0) { +- debug("%s: Error while reading register %#04x\n", ++printf("%s: Error while reading register %#04x\n", + __func__, reg); + return -1; + } +@@ -173,7 +173,7 @@ static int wm8994_set_fmt(struct wm8994_priv *priv, int aif_id, uint fmt) + aif_clk = WM8994_AIF2_CLOCKING_1; + break; + default: +- debug("%s: Invalid audio interface selection\n", __func__); ++printf("%s: Invalid audio interface selection\n", __func__); + return -1; + } + +@@ -184,7 +184,7 @@ static int wm8994_set_fmt(struct wm8994_priv *priv, int aif_id, uint fmt) + ms = WM8994_AIF1_MSTR; + break; + default: +- debug("%s: Invalid i2s master selection\n", __func__); ++printf("%s: Invalid i2s master selection\n", __func__); + return -1; + } + +@@ -203,7 +203,7 @@ static int wm8994_set_fmt(struct wm8994_priv *priv, int aif_id, uint fmt) + aif |= 0x8; + break; + default: +- debug("%s: Invalid i2s format selection\n", __func__); ++printf("%s: Invalid i2s format selection\n", __func__); + return -1; + } + +@@ -218,7 +218,7 @@ static int wm8994_set_fmt(struct wm8994_priv *priv, int aif_id, uint fmt) + aif |= WM8994_AIF1_BCLK_INV; + break; + default: +- debug("%s: Invalid i2s frame inverse selection\n", ++printf("%s: Invalid i2s frame inverse selection\n", + __func__); + return -1; + } +@@ -240,13 +240,13 @@ static int wm8994_set_fmt(struct wm8994_priv *priv, int aif_id, uint fmt) + aif |= WM8994_AIF1_LRCLK_INV; + break; + default: +- debug("%s: Invalid i2s clock polarity selection\n", ++printf("%s: Invalid i2s clock polarity selection\n", + __func__); + return -1; + } + break; + default: +- debug("%s: Invalid i2s format selection\n", __func__); ++printf("%s: Invalid i2s format selection\n", __func__); + return -1; + } + +@@ -258,7 +258,7 @@ static int wm8994_set_fmt(struct wm8994_priv *priv, int aif_id, uint fmt) + error |= wm8994_bic_or(priv, aif_clk, WM8994_AIF1CLK_ENA_MASK, + WM8994_AIF1CLK_ENA); + if (error < 0) { +- debug("%s: codec register access error\n", __func__); ++printf("%s: codec register access error\n", __func__); + return -1; + } + +@@ -337,7 +337,7 @@ static int wm8994_hw_params(struct wm8994_priv *priv, int aif_id, + break; + + if (i == ARRAY_SIZE(src_rate)) { +- debug("%s: Could not get the best matching samplingrate\n", ++printf("%s: Could not get the best matching samplingrate\n", + __func__); + return -1; + } +@@ -373,7 +373,7 @@ static int wm8994_hw_params(struct wm8994_priv *priv, int aif_id, + } + + if (i == ARRAY_SIZE(bclk_divs)) { +- debug("%s: Could not get the best matching bclk division\n", ++printf("%s: Could not get the best matching bclk division\n", + __func__); + return -1; + } +@@ -382,7 +382,7 @@ static int wm8994_hw_params(struct wm8994_priv *priv, int aif_id, + bclk |= best << WM8994_AIF1_BCLK_DIV_SHIFT; + + if (wm8994_i2c_read(priv, aif1_reg, ®_data) != 0) { +- debug("%s: AIF1 register read Failed\n", __func__); ++printf("%s: AIF1 register read Failed\n", __func__); + return -1; + } + +@@ -390,7 +390,7 @@ static int wm8994_hw_params(struct wm8994_priv *priv, int aif_id, + aif2 |= WM8994_AIF1_MONO; + + if (priv->aifclk[id] == 0) { +- debug("%s:Audio interface clock not set\n", __func__); ++printf("%s:Audio interface clock not set\n", __func__); + return -1; + } + +@@ -401,10 +401,10 @@ static int wm8994_hw_params(struct wm8994_priv *priv, int aif_id, + ret |= wm8994_bic_or(priv, rate_reg, WM8994_AIF1_SR_MASK | + WM8994_AIF1CLK_RATE_MASK, rate_val); + +- debug("rate vale = %x , bclk val= %x\n", rate_val, bclk); ++printf("rate vale = %x , bclk val= %x\n", rate_val, bclk); + + if (ret < 0) { +- debug("%s: codec register access error\n", __func__); ++printf("%s: codec register access error\n", __func__); + return -1; + } + +@@ -454,7 +454,7 @@ static int configure_aif_clock(struct wm8994_priv *priv, int aif) + break; + + default: +- debug("%s: Invalid input clock selection [%d]\n", ++printf("%s: Invalid input clock selection [%d]\n", + __func__, priv->sysclk[aif - 1]); + return -1; + } +@@ -482,7 +482,7 @@ static int configure_aif_clock(struct wm8994_priv *priv, int aif) + WM8994_AIF2DSPCLK_ENA | WM8994_SYSDSPCLK_ENA); + + if (ret < 0) { +- debug("%s: codec register access error\n", __func__); ++printf("%s: codec register access error\n", __func__); + return -1; + } + +@@ -535,7 +535,7 @@ static int wm8994_set_sysclk(struct wm8994_priv *priv, int aif_id, int clk_id, + if (opclk_divs[i] == freq) + break; + if (i == ARRAY_SIZE(opclk_divs)) { +- debug("%s frequency divisor not found\n", ++printf("%s frequency divisor not found\n", + __func__); + return -1; + } +@@ -550,7 +550,7 @@ static int wm8994_set_sysclk(struct wm8994_priv *priv, int aif_id, int clk_id, + } + + default: +- debug("%s Invalid input clock selection [%d]\n", ++printf("%s Invalid input clock selection [%d]\n", + __func__, clk_id); + return -1; + } +@@ -558,7 +558,7 @@ static int wm8994_set_sysclk(struct wm8994_priv *priv, int aif_id, int clk_id, + ret |= configure_aif_clock(priv, aif_id); + + if (ret < 0) { +- debug("%s: codec register access error\n", __func__); ++printf("%s: codec register access error\n", __func__); + return -1; + } + +@@ -602,7 +602,7 @@ static int wm8994_init_volume_aif2_dac1(struct wm8994_priv *priv) + ret |= wm8994_i2c_write(priv, WM8994_RIGHT_OUTPUT_VOLUME, 0x12D); + + if (ret < 0) { +- debug("%s: codec register access error\n", __func__); ++printf("%s: codec register access error\n", __func__); + return -1; + } + +@@ -635,7 +635,7 @@ static int wm8994_init_volume_aif1_dac1(struct wm8994_priv *priv) + ret |= wm8994_i2c_write(priv, WM8994_RIGHT_OUTPUT_VOLUME, 0x12D); + + if (ret < 0) { +- debug("%s: codec register access error\n", __func__); ++printf("%s: codec register access error\n", __func__); + return -1; + } + +@@ -659,26 +659,26 @@ static int wm8994_device_init(struct wm8994_priv *priv) + + ret = wm8994_i2c_read(priv, WM8994_SOFTWARE_RESET, ®_data); + if (ret < 0) { +- debug("Failed to read ID register\n"); ++printf("Failed to read ID register\n"); + return ret; + } + + if (reg_data == WM8994_ID) { + devname = "WM8994"; +- debug("Device registered as type %d\n", priv->type); ++printf("Device registered as type %d\n", priv->type); + priv->type = WM8994; + } else { +- debug("Device is not a WM8994, ID is %x\n", ret); ++printf("Device is not a WM8994, ID is %x\n", ret); + return -ENXIO; + } + + ret = wm8994_i2c_read(priv, WM8994_CHIP_REVISION, ®_data); + if (ret < 0) { +- debug("Failed to read revision register: %d\n", ret); ++printf("Failed to read revision register: %d\n", ret); + return ret; + } + priv->revision = reg_data; +- debug("%s revision %c\n", devname, 'A' + priv->revision); ++printf("%s revision %c\n", devname, 'A' + priv->revision); + + return 0; + } +@@ -803,10 +803,10 @@ static int wm8994_setup_interface(struct wm8994_priv *priv, + if (ret < 0) + goto err; + +- debug("%s: Codec chip setup ok\n", __func__); ++printf("%s: Codec chip setup ok\n", __func__); + return 0; + err: +- debug("%s: Codec chip setup error\n", __func__); ++printf("%s: Codec chip setup error\n", __func__); + return -1; + } + +@@ -819,13 +819,13 @@ static int _wm8994_init(struct wm8994_priv *priv, + + ret = wm8994_setup_interface(priv, aif_id); + if (ret < 0) { +- debug("%s: wm8994 codec chip init failed\n", __func__); ++printf("%s: wm8994 codec chip init failed\n", __func__); + return ret; + } + + ret = wm8994_set_sysclk(priv, aif_id, WM8994_SYSCLK_MCLK1, mclk_freq); + if (ret < 0) { +- debug("%s: wm8994 codec set sys clock failed\n", __func__); ++printf("%s: wm8994 codec set sys clock failed\n", __func__); + return ret; + } + +diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c +index fadc9f396..95334c427 100644 +--- a/drivers/spi/altera_spi.c ++++ b/drivers/spi/altera_spi.c +@@ -97,7 +97,7 @@ static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen, + unsigned char *rxp = din; + uint32_t reg, data, start; + +- debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, ++printf("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, + dev_seq(bus), slave_plat->cs, bitlen, bytes, flags); + + if (bitlen == 0) +@@ -121,7 +121,7 @@ static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen, + else + data = CONFIG_ALTERA_SPI_IDLE_VAL; + +- debug("%s: tx:%x ", __func__, data); ++printf("%s: tx:%x ", __func__, data); + writel(data, ®s->txdata); + + start = get_timer(0); +@@ -130,7 +130,7 @@ static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen, + if (reg & ALTERA_SPI_STATUS_RRDY_MSK) + break; + if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) { +- debug("%s: Transmission timed out!\n", __func__); ++printf("%s: Transmission timed out!\n", __func__); + return -1; + } + } +@@ -139,7 +139,7 @@ static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen, + if (rxp) + *rxp++ = data & 0xff; + +- debug("rx:%x\n", data); ++printf("rx:%x\n", data); + } + + done: +diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c +index 775b9ffc2..ab117a112 100644 +--- a/drivers/spi/atcspi200_spi.c ++++ b/drivers/spi/atcspi200_spi.c +@@ -232,7 +232,7 @@ static int __atcspi200_spi_xfer(struct nds_spi_slave *ns, + break; + } + if (data_out) +- debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %lu\n", ++printf("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %lu\n", + *(uint *)data_out, data_out, *(uint *)data_in, + data_in, data_len); + num_chunks = DIV_ROUND_UP(data_len, max_tran_len); +@@ -272,7 +272,7 @@ static int __atcspi200_spi_xfer(struct nds_spi_slave *ns, + } + + if (!timeout) { +- debug("spi_xfer: %s() timeout\n", __func__); ++printf("spi_xfer: %s() timeout\n", __func__); + break; + } + } +@@ -296,7 +296,7 @@ static int atcspi200_spi_set_speed(struct udevice *bus, uint max_hz) + { + struct nds_spi_slave *ns = dev_get_priv(bus); + +- debug("%s speed %u\n", __func__, max_hz); ++printf("%s speed %u\n", __func__, max_hz); + + ns->freq = max_hz; + __atcspi200_spi_set_speed(ns); +@@ -308,7 +308,7 @@ static int atcspi200_spi_set_mode(struct udevice *bus, uint mode) + { + struct nds_spi_slave *ns = dev_get_priv(bus); + +- debug("%s mode %u\n", __func__, mode); ++printf("%s mode %u\n", __func__, mode); + ns->mode = mode; + + return 0; +diff --git a/drivers/spi/bcmstb_spi.c b/drivers/spi/bcmstb_spi.c +index 503c47a27..d353b9fe1 100644 +--- a/drivers/spi/bcmstb_spi.c ++++ b/drivers/spi/bcmstb_spi.c +@@ -120,7 +120,7 @@ static int bcmstb_spi_of_to_plat(struct udevice *bus) + __func__, names[i], (void *)defaults[i]); + } else { + plat->base[i] = (void *)resource.start; +- debug("BCMSTB SPI %s address: 0x0x%p\n", ++printf("BCMSTB SPI %s address: 0x0x%p\n", + names[i], (void *)plat->base[i]); + } + } +@@ -175,8 +175,8 @@ static int bcmstb_spi_probe(struct udevice *bus) + priv->saved_cmd_len = 0; + priv->saved_din_addr = NULL; + +- debug("spi_xfer: tx regs: 0x%p\n", &priv->regs->txram[0]); +- debug("spi_xfer: rx regs: 0x%p\n", &priv->regs->rxram[0]); ++printf("spi_xfer: tx regs: 0x%p\n", &priv->regs->txram[0]); ++printf("spi_xfer: rx regs: 0x%p\n", &priv->regs->rxram[0]); + + /* Disable BSPI. */ + writel(1, priv->bspi + BSPI_MAST_N_BOOT_CTRL); +@@ -203,14 +203,14 @@ static int bcmstb_spi_probe(struct udevice *bus) + + static void bcmstb_spi_submit(struct bcmstb_spi_priv *priv, bool done) + { +- debug("WR NEWQP: %d\n", 0); ++printf("WR NEWQP: %d\n", 0); + writel(0, &priv->regs->newqp); + +- debug("WR ENDQP: %d\n", priv->tx_slot - 1); ++printf("WR ENDQP: %d\n", priv->tx_slot - 1); + writel(priv->tx_slot - 1, &priv->regs->endqp); + + if (done) { +- debug("WR CDRAM[%d]: %02x\n", priv->tx_slot - 1, ++printf("WR CDRAM[%d]: %02x\n", priv->tx_slot - 1, + readl(&priv->regs->cdram[priv->tx_slot - 1]) & ~0x80); + writel(readl(&priv->regs->cdram[priv->tx_slot - 1]) & ~0x80, + &priv->regs->cdram[priv->tx_slot - 1]); +@@ -218,7 +218,7 @@ static void bcmstb_spi_submit(struct bcmstb_spi_priv *priv, bool done) + + /* Force chip select first time. */ + if (priv->curr_cs != priv->default_cs) { +- debug("spi_xfer: switching chip select to %d\n", ++printf("spi_xfer: switching chip select to %d\n", + priv->default_cs); + writel((readl(priv->cs_reg) & ~0xff) | (1 << priv->default_cs), + priv->cs_reg); +@@ -227,13 +227,13 @@ static void bcmstb_spi_submit(struct bcmstb_spi_priv *priv, bool done) + priv->curr_cs = priv->default_cs; + } + +- debug("WR WRITE_LOCK: %02x\n", 1); ++printf("WR WRITE_LOCK: %02x\n", 1); + writel((readl(&priv->regs->write_lock) & + ~HIF_MSPI_WRITE_LOCK_WRITE_LOCK_MASK) | 1, + &priv->regs->write_lock); + readl(&priv->regs->write_lock); + +- debug("WR SPCR2: %02x\n", ++printf("WR SPCR2: %02x\n", + HIF_MSPI_SPCR2_SPIFIE_MASK | + HIF_MSPI_SPCR2_SPE_MASK | + HIF_MSPI_SPCR2_CONT_AFTER_CMD_MASK); +@@ -273,15 +273,15 @@ static int bcmstb_spi_xfer(struct udevice *dev, unsigned int bitlen, + struct bcmstb_spi_priv *priv = dev_get_priv(bus); + struct bcmstb_hif_mspi_regs *regs = priv->regs; + +- debug("spi_xfer: %d, t: 0x%p, r: 0x%p, f: %lx\n", ++printf("spi_xfer: %d, t: 0x%p, r: 0x%p, f: %lx\n", + len, dout, din, flags); +- debug("spi_xfer: chip select: %x\n", readl(priv->cs_reg) & 0xff); +- debug("spi_xfer: tx addr: 0x%p\n", ®s->txram[0]); +- debug("spi_xfer: rx addr: 0x%p\n", ®s->rxram[0]); +- debug("spi_xfer: cd addr: 0x%p\n", ®s->cdram[0]); ++printf("spi_xfer: chip select: %x\n", readl(priv->cs_reg) & 0xff); ++printf("spi_xfer: tx addr: 0x%p\n", ®s->txram[0]); ++printf("spi_xfer: rx addr: 0x%p\n", ®s->rxram[0]); ++printf("spi_xfer: cd addr: 0x%p\n", ®s->cdram[0]); + + if (flags & SPI_XFER_END) { +- debug("spi_xfer: clearing saved din address: 0x%p\n", ++printf("spi_xfer: clearing saved din address: 0x%p\n", + priv->saved_din_addr); + priv->saved_din_addr = NULL; + priv->saved_cmd_len = 0; +@@ -317,7 +317,7 @@ static int bcmstb_spi_xfer(struct udevice *dev, unsigned int bitlen, + * code polls for the result. Save it for + * subsequent transmission. + */ +- debug("spi_xfer: saving command: %x, %d\n", ++printf("spi_xfer: saving command: %x, %d\n", + out_bytes[0], len); + priv->saved_cmd_len = len; + memcpy(priv->saved_cmd, out_bytes, priv->saved_cmd_len); +@@ -332,7 +332,7 @@ static int bcmstb_spi_xfer(struct udevice *dev, unsigned int bitlen, + */ + int ret = 0; + +- debug("spi_xfer: Making recursive call\n"); ++printf("spi_xfer: Making recursive call\n"); + ret = bcmstb_spi_xfer(dev, priv->saved_cmd_len * 8, + priv->saved_cmd, NULL, + SPI_XFER_BEGIN); +@@ -341,7 +341,7 @@ static int bcmstb_spi_xfer(struct udevice *dev, unsigned int bitlen, + return ret; + } + } else { +- debug("spi_xfer: saving din address: 0x%p\n", din); ++printf("spi_xfer: saving din address: 0x%p\n", din); + priv->saved_din_addr = din; + } + } +@@ -351,11 +351,11 @@ static int bcmstb_spi_xfer(struct udevice *dev, unsigned int bitlen, + + while (priv->tx_slot < NUM_CDRAM && tx_len > 0) { + bcmstb_spi_hw_set_parms(priv); +- debug("WR TXRAM[%d]: %02x\n", priv->tx_slot, ++printf("WR TXRAM[%d]: %02x\n", priv->tx_slot, + out_bytes ? out_bytes[len - tx_len] : 0xff); + writel(out_bytes ? out_bytes[len - tx_len] : 0xff, + ®s->txram[priv->tx_slot << 1]); +- debug("WR CDRAM[%d]: %02x\n", priv->tx_slot, 0x8e); ++printf("WR CDRAM[%d]: %02x\n", priv->tx_slot, 0x8e); + writel(0x8e, ®s->cdram[priv->tx_slot]); + priv->tx_slot++; + tx_len--; +@@ -363,7 +363,7 @@ static int bcmstb_spi_xfer(struct udevice *dev, unsigned int bitlen, + rx_len--; + } + +- debug("spi_xfer: early return clauses: %d, %d, %d\n", ++printf("spi_xfer: early return clauses: %d, %d, %d\n", + len <= NUM_CDRAM, + !in_bytes, + (flags & (SPI_XFER_BEGIN | +@@ -388,7 +388,7 @@ static int bcmstb_spi_xfer(struct udevice *dev, unsigned int bitlen, + readl(®s->rxram[(priv->rx_slot << 1) + + 1]) + & 0xff; +- debug("RD RXRAM[%d]: %02x\n", ++printf("RD RXRAM[%d]: %02x\n", + priv->rx_slot, in_bytes[len - rx_len]); + priv->rx_slot++; + rx_len--; +@@ -397,7 +397,7 @@ static int bcmstb_spi_xfer(struct udevice *dev, unsigned int bitlen, + } + + if (flags & SPI_XFER_END) { +- debug("WR WRITE_LOCK: %02x\n", 0); ++printf("WR WRITE_LOCK: %02x\n", 0); + writel((readl(&priv->regs->write_lock) & + ~HIF_MSPI_WRITE_LOCK_WRITE_LOCK_MASK) | 0, + &priv->regs->write_lock); +diff --git a/drivers/spi/ca_sflash.c b/drivers/spi/ca_sflash.c +index 38bddd386..ff11de42b 100644 +--- a/drivers/spi/ca_sflash.c ++++ b/drivers/spi/ca_sflash.c +@@ -181,19 +181,19 @@ struct ca_sflash_priv { + */ + static int ca_sflash_claim_bus(struct udevice *dev) + { +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + return 0; + } + + static int ca_sflash_release_bus(struct udevice *dev) + { +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + return 0; + } + + static int ca_sflash_set_speed(struct udevice *dev, uint speed) + { +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + return 0; + } + +@@ -215,7 +215,7 @@ static int ca_sflash_set_mode(struct udevice *dev, uint mode) + else + priv->tx_width = 1; + +- debug("%s: mode=%d, rx_width=%d, tx_width=%d\n", ++printf("%s: mode=%d, rx_width=%d, tx_width=%d\n", + __func__, mode, priv->rx_width, priv->tx_width); + + return 0; +@@ -272,7 +272,7 @@ static int _ca_sflash_read(struct ca_sflash_priv *priv, + *buf++ = (reg_data >> 16) & 0xFF; + *buf++ = (reg_data >> 24) & 0xFF; + len -= 4; +- debug("%s: reg_data=%#08x\n", ++printf("%s: reg_data=%#08x\n", + __func__, reg_data); + } + +@@ -280,7 +280,7 @@ static int _ca_sflash_read(struct ca_sflash_priv *priv, + if (_ca_sflash_wait_cmd(priv, RD_ACCESS)) + return -1; + reg_data = readl(&priv->regs->dr); +- debug("%s: reg_data=%#08x\n", ++printf("%s: reg_data=%#08x\n", + __func__, reg_data); + } + +@@ -344,7 +344,7 @@ static int _ca_sflash_write(struct ca_sflash_priv *priv, + | (buf[2] << 16) + | (buf[3] << 24); + +- debug("%s: reg_data=%#08x\n", ++printf("%s: reg_data=%#08x\n", + __func__, reg_data); + /* Fill data */ + clrsetbits_le32(&priv->regs->dr, GENMASK(31, 0), reg_data); +@@ -438,7 +438,7 @@ static int _ca_sflash_issue_cmd(struct ca_sflash_priv *priv, + if (_ca_sflash_mio_set(priv, mio_width)) + return -1; + } +- debug("%s: FLASH ACCESS reg=%#08x\n", ++printf("%s: FLASH ACCESS reg=%#08x\n", + __func__, readl(&priv->regs->ar)); + + /* Use command in extend_access register */ +@@ -448,7 +448,7 @@ static int _ca_sflash_issue_cmd(struct ca_sflash_priv *priv, + | CA_SF_EAR_ADDR_CNT(addr_cnt - 1) + | CA_SF_EAR_DATA_CNT(4 - 1) + | CA_SF_EAR_DRD_CMD_EN); +- debug("%s: FLASH EXT ACCESS reg=%#08x\n", ++printf("%s: FLASH EXT ACCESS reg=%#08x\n", + __func__, readl(&priv->regs->ear)); + + if (_ca_sflash_access_data(priv, op)) +@@ -456,7 +456,7 @@ static int _ca_sflash_issue_cmd(struct ca_sflash_priv *priv, + } else { /* reset_op, wr_enable, wr_disable */ + setbits_le32(&priv->regs->ar, + CA_SF_AR_OP(op->cmd.opcode)); +- debug("%s: FLASH ACCESS reg=%#08x\n", ++printf("%s: FLASH ACCESS reg=%#08x\n", + __func__, readl(&priv->regs->ar)); + + if (opcode == CA_SF_AC_OP_4_ADDR) { /* erase_op */ +@@ -490,7 +490,7 @@ static int ca_sflash_exec_op(struct spi_slave *slave, + struct ca_sflash_priv *priv = dev_get_priv(slave->dev->parent); + u8 opcode; + +- debug("%s: cmd:%#02x addr.val:%#llx addr.len:%#x data.len:%#x data.dir:%#x\n", ++printf("%s: cmd:%#02x addr.val:%#llx addr.len:%#x data.len:%#x data.dir:%#x\n", + __func__, op->cmd.opcode, op->addr.val, + op->addr.nbytes, op->data.nbytes, op->data.dir); + +@@ -514,7 +514,7 @@ static void ca_sflash_init(struct ca_sflash_priv *priv) + /* Set FLASH_TYPE as serial flash, value: 0x0400*/ + clrsetbits_le32(&priv->regs->tr, + GENMASK(31, 0), CA_FLASH_TR_SIZE(2)); +- debug("%s: FLASH_TYPE reg=%#x\n", ++printf("%s: FLASH_TYPE reg=%#x\n", + __func__, readl(&priv->regs->tr)); + + /* Minimize flash timing, value: 0x07010101 */ +@@ -524,7 +524,7 @@ static void ca_sflash_init(struct ca_sflash_priv *priv) + | CA_SF_TMR_SETUP(0x01) + | CA_SF_TMR_HOLD(0x01) + | CA_SF_TMR_IDLE(0x01)); +- debug("%s: FLASH_TIMING reg=%#x\n", ++printf("%s: FLASH_TIMING reg=%#x\n", + __func__, readl(&priv->regs->tmr)); + } + +diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c +index 67980431b..334f41d98 100644 +--- a/drivers/spi/cadence_qspi.c ++++ b/drivers/spi/cadence_qspi.c +@@ -118,7 +118,7 @@ static int spi_calibration(struct udevice *bus, uint hz) + + /* configure the final value for read data capture delay register */ + cadence_qspi_apb_readdata_capture(base, 1, (range_hi + range_lo) / 2); +- debug("SF: Read data capture delay calibrated to %i (%i - %i)\n", ++printf("SF: Read data capture delay calibrated to %i (%i - %i)\n", + (range_hi + range_lo) / 2, range_lo, range_hi); + + /* just to ensure we do once only when speed or chip select change */ +@@ -158,7 +158,7 @@ static int cadence_spi_set_speed(struct udevice *bus, uint hz) + /* Enable QSPI */ + cadence_qspi_apb_controller_enable(priv->regbase); + +- debug("%s: speed=%d\n", __func__, hz); ++printf("%s: speed=%d\n", __func__, hz); + + return 0; + } +@@ -321,7 +321,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus) + plat->tchsh_ns = ofnode_read_u32_default(subnode, "cdns,tchsh-ns", 20); + plat->tslch_ns = ofnode_read_u32_default(subnode, "cdns,tslch-ns", 20); + +- debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n", ++printf("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n", + __func__, plat->regbase, plat->ahbbase, plat->max_hz, + plat->page_size); + +diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c +index b051f462e..b131d16bd 100644 +--- a/drivers/spi/cadence_qspi_apb.c ++++ b/drivers/spi/cadence_qspi_apb.c +@@ -275,7 +275,7 @@ void cadence_qspi_apb_config_baudrate_div(void *reg_base, + if (div > CQSPI_REG_CONFIG_BAUD_MASK) + div = CQSPI_REG_CONFIG_BAUD_MASK; + +- debug("%s: ref_clk %dHz sclk %dHz Div 0x%x, actual %dHz\n", __func__, ++printf("%s: ref_clk %dHz sclk %dHz Div 0x%x, actual %dHz\n", __func__, + ref_clk_hz, sclk_hz, div, ref_clk_hz / (2 * (div + 1))); + + reg |= (div << CQSPI_REG_CONFIG_BAUD_LSB); +@@ -309,7 +309,7 @@ void cadence_qspi_apb_chipselect(void *reg_base, + + cadence_qspi_apb_controller_disable(reg_base); + +- debug("%s : chipselect %d decode %d\n", __func__, chip_select, ++printf("%s : chipselect %d decode %d\n", __func__, chip_select, + decoder_enable); + + reg = readl(reg_base + CQSPI_REG_CONFIG); +diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c +index 6511c0e0e..9c6a61bb1 100644 +--- a/drivers/spi/cf_spi.c ++++ b/drivers/spi/cf_spi.c +@@ -426,7 +426,7 @@ static int coldfire_dspi_of_to_plat(struct udevice *bus) + } + } + +- debug("DSPI: regs=%pa, max-frequency=%d, num-cs=%d, mode=%d\n", ++printf("DSPI: regs=%pa, max-frequency=%d, num-cs=%d, mode=%d\n", + (void *)plat->regs_addr, + plat->speed_hz, plat->num_cs, plat->mode); + +diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c +index 15557a623..0ff0596c8 100644 +--- a/drivers/spi/davinci_spi.c ++++ b/drivers/spi/davinci_spi.c +@@ -313,7 +313,7 @@ static int davinci_spi_set_speed(struct udevice *bus, uint max_hz) + { + struct davinci_spi_slave *ds = dev_get_priv(bus); + +- debug("%s speed %u\n", __func__, max_hz); ++printf("%s speed %u\n", __func__, max_hz); + if (max_hz > CONFIG_SYS_SPI_CLK / 2) + return -EINVAL; + +@@ -326,7 +326,7 @@ static int davinci_spi_set_mode(struct udevice *bus, uint mode) + { + struct davinci_spi_slave *ds = dev_get_priv(bus); + +- debug("%s mode %u\n", __func__, mode); ++printf("%s mode %u\n", __func__, mode); + ds->mode = mode; + + return 0; +diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c +index 1bcc3ad31..df485a45c 100644 +--- a/drivers/spi/exynos_spi.c ++++ b/drivers/spi/exynos_spi.c +@@ -72,7 +72,7 @@ static void spi_get_fifo_levels(struct exynos_spi *regs, + */ + static void spi_request_bytes(struct exynos_spi *regs, int count, int step) + { +- debug("%s: regs=%p, count=%d, step=%d\n", __func__, regs, count, step); ++printf("%s: regs=%p, count=%d, step=%d\n", __func__, regs, count, step); + + /* For word address we need to swap bytes */ + if (step == 4) { +@@ -193,7 +193,7 @@ static int spi_rx_tx(struct exynos_spi_priv *priv, int todo, + spi_request_bytes(regs, toread, step); + } + if (priv->skip_preamble && get_timer(start) > 100) { +- debug("SPI timeout: in_bytes=%d, out_bytes=%d, ", ++printf("SPI timeout: in_bytes=%d, out_bytes=%d, ", + in_bytes, out_bytes); + return -ETIMEDOUT; + } +@@ -227,7 +227,7 @@ static void spi_cs_activate(struct udevice *dev) + } + + clrbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT); +- debug("Activate CS, bus '%s'\n", bus->name); ++printf("Activate CS, bus '%s'\n", bus->name); + priv->skip_preamble = priv->mode & SPI_PREAMBLE; + } + +@@ -249,7 +249,7 @@ static void spi_cs_deactivate(struct udevice *dev) + if (pdata->deactivate_delay_us) + priv->last_transaction_us = timer_get_us(); + +- debug("Deactivate CS, bus '%s'\n", bus->name); ++printf("Deactivate CS, bus '%s'\n", bus->name); + } + + static int exynos_spi_of_to_plat(struct udevice *bus) +@@ -262,7 +262,7 @@ static int exynos_spi_of_to_plat(struct udevice *bus) + plat->periph_id = pinmux_decode_periph_id(blob, node); + + if (plat->periph_id == PERIPH_ID_NONE) { +- debug("%s: Invalid peripheral ID %d\n", __func__, ++printf("%s: Invalid peripheral ID %d\n", __func__, + plat->periph_id); + return -FDT_ERR_NOTFOUND; + } +@@ -272,7 +272,7 @@ static int exynos_spi_of_to_plat(struct udevice *bus) + 500000); + plat->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); +- debug("%s: regs=%p, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", ++printf("%s: regs=%p, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->regs, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); + +@@ -333,7 +333,7 @@ static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen, + + /* spi core configured to do 8 bit transfers */ + if (bitlen % 8) { +- debug("Non byte aligned SPI transfer.\n"); ++printf("Non byte aligned SPI transfer.\n"); + return -1; + } + +@@ -359,7 +359,7 @@ static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen, + spi_cs_deactivate(dev); + if (priv->skip_preamble) { + assert(!priv->skip_preamble); +- debug("Failed to complete premable transaction\n"); ++printf("Failed to complete premable transaction\n"); + ret = -1; + } + } +@@ -379,7 +379,7 @@ static int exynos_spi_set_speed(struct udevice *bus, uint speed) + if (ret) + return ret; + priv->freq = speed; +- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); ++printf("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; + } +@@ -400,7 +400,7 @@ static int exynos_spi_set_mode(struct udevice *bus, uint mode) + + writel(reg, &priv->regs->ch_cfg); + priv->mode = mode; +- debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); ++printf("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; + } +diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c +index 8fe3508c6..0056bdb43 100644 +--- a/drivers/spi/fsl_dspi.c ++++ b/drivers/spi/fsl_dspi.c +@@ -227,7 +227,7 @@ static void dspi_tx(struct fsl_dspi_priv *priv, u32 ctrl, u16 data) + if (timeout >= 0) + dspi_write32(priv->flags, &priv->regs->tfr, (ctrl | data)); + else +- debug("dspi_tx: waiting timeout!\n"); ++printf("dspi_tx: waiting timeout!\n"); + } + + static u16 dspi_rx(struct fsl_dspi_priv *priv) +@@ -243,7 +243,7 @@ static u16 dspi_rx(struct fsl_dspi_priv *priv) + return (u16)DSPI_RFR_RXDATA( + dspi_read32(priv->flags, &priv->regs->rfr)); + else { +- debug("dspi_rx: waiting timeout!\n"); ++printf("dspi_rx: waiting timeout!\n"); + return (u16)(~0); + } + } +@@ -376,8 +376,8 @@ static int fsl_dspi_hz_to_spi_baud(int *pbr, int *br, + } + } + +- debug("Can not find valid baud rate,speed_hz is %d, ", speed_hz); +- debug("clkrate is %d, we use the max prescaler value.\n", clkrate); ++printf("Can not find valid baud rate,speed_hz is %d, ", speed_hz); ++printf("clkrate is %d, we use the max prescaler value.\n", clkrate); + + *pbr = ARRAY_SIZE(pbr_tbl) - 1; + *br = ARRAY_SIZE(brs) - 1; +@@ -426,7 +426,7 @@ static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed) + + bus_clk = priv->bus_clk; + +- debug("DSPI set_speed: expected SCK speed %u, bus_clk %u.\n", ++printf("DSPI set_speed: expected SCK speed %u, bus_clk %u.\n", + speed, bus_clk); + + bus_setup = dspi_read32(priv->flags, &priv->regs->ctar[0]); +@@ -435,7 +435,7 @@ static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed) + ret = fsl_dspi_hz_to_spi_baud(&best_i, &best_j, speed, bus_clk); + if (ret) { + speed = priv->speed_hz; +- debug("DSPI set_speed use default SCK rate %u.\n", speed); ++printf("DSPI set_speed use default SCK rate %u.\n", speed); + fsl_dspi_hz_to_spi_baud(&best_i, &best_j, speed, bus_clk); + } + +@@ -456,7 +456,7 @@ static int fsl_dspi_child_pre_probe(struct udevice *dev) + unsigned char pasc = 0, asc = 0; + + if (slave_plat->cs >= priv->num_chipselect) { +- debug("DSPI invalid chipselect number %d(max %d)!\n", ++printf("DSPI invalid chipselect number %d(max %d)!\n", + slave_plat->cs, priv->num_chipselect - 1); + return -EINVAL; + } +@@ -476,7 +476,7 @@ static int fsl_dspi_child_pre_probe(struct udevice *dev) + DSPI_CTAR_PCSSCK(pcssck) | + DSPI_CTAR_PASC(pasc); + +- debug("DSPI pre_probe slave device on CS %u, max_hz %u, mode 0x%x.\n", ++printf("DSPI pre_probe slave device on CS %u, max_hz %u, mode 0x%x.\n", + slave_plat->cs, slave_plat->max_hz, slave_plat->mode); + + return 0; +@@ -514,7 +514,7 @@ static int fsl_dspi_probe(struct udevice *bus) + DSPI_MCR_CRXF | DSPI_MCR_CTXF; + fsl_dspi_init_mcr(priv, mcr_cfg_val); + +- debug("%s probe done, bus-num %d.\n", bus->name, dev_seq(bus)); ++printf("%s probe done, bus-num %d.\n", bus->name, dev_seq(bus)); + + return 0; + } +@@ -544,7 +544,7 @@ static int fsl_dspi_claim_bus(struct udevice *dev) + /* check module TX and RX status */ + sr_val = dspi_read32(priv->flags, &priv->regs->sr); + if ((sr_val & DSPI_SR_TXRXS) != DSPI_SR_TXRXS) { +- debug("DSPI RX/TX not ready!\n"); ++printf("DSPI RX/TX not ready!\n"); + return -EIO; + } + +@@ -572,7 +572,7 @@ static int fsl_dspi_release_bus(struct udevice *dev) + */ + static int fsl_dspi_bind(struct udevice *bus) + { +- debug("%s assigned seq %d.\n", bus->name, dev_seq(bus)); ++printf("%s assigned seq %d.\n", bus->name, dev_seq(bus)); + return 0; + } + +@@ -591,7 +591,7 @@ static int fsl_dspi_of_to_plat(struct udevice *bus) + + addr = dev_read_addr(bus); + if (addr == FDT_ADDR_T_NONE) { +- debug("DSPI: Can't get base address or size\n"); ++printf("DSPI: Can't get base address or size\n"); + return -ENOMEM; + } + plat->regs_addr = addr; +@@ -599,7 +599,7 @@ static int fsl_dspi_of_to_plat(struct udevice *bus) + plat->speed_hz = fdtdec_get_int(blob, + node, "spi-max-frequency", FSL_DSPI_DEFAULT_SCK_FREQ); + +- debug("DSPI: regs=%pa, max-frequency=%d, endianess=%s, num-cs=%d\n", ++printf("DSPI: regs=%pa, max-frequency=%d, endianess=%s, num-cs=%d\n", + &plat->regs_addr, plat->speed_hz, + plat->flags & DSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le", + plat->num_chipselect); +@@ -631,7 +631,7 @@ static int fsl_dspi_set_mode(struct udevice *bus, uint mode) + { + struct fsl_dspi_priv *priv = dev_get_priv(bus); + +- debug("DSPI set_mode: mode 0x%x.\n", mode); ++printf("DSPI set_mode: mode 0x%x.\n", mode); + + /* + * We store some chipselect special configure value in priv->ctar_val, +diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c +index 387b54715..534af3c16 100644 +--- a/drivers/spi/fsl_espi.c ++++ b/drivers/spi/fsl_espi.c +@@ -113,7 +113,7 @@ static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout) + + out_be32(&espi->tx, tmpdout); + out_be32(&espi->event, ESPI_EV_TNF); +- debug("***spi_xfer:...%08x written\n", tmpdout); ++printf("***spi_xfer:...%08x written\n", tmpdout); + + tmp_tx_timeout = fsl->tx_timeout; + /* Wait for eSPI transmit to go out */ +@@ -127,7 +127,7 @@ static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout) + } + + if (tmp_tx_timeout < 0) +- debug("***spi_xfer:...Tx timeout! event = %08x\n", event); ++printf("***spi_xfer:...Tx timeout! event = %08x\n", event); + } + + static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, +@@ -143,13 +143,13 @@ static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, + rx_times = DIV_ROUND_UP(bytes, 4); + buf = (unsigned char *)malloc(4 * rx_times); + if (!buf) { +- debug("SF: Failed to malloc memory.\n"); ++printf("SF: Failed to malloc memory.\n"); + return -1; + } + p_cursor = buf; + while (rx_times--) { + tmpdin = in_be32(&espi->rx); +- debug("***spi_xfer:...%08x readed\n", tmpdin); ++printf("***spi_xfer:...%08x readed\n", tmpdin); + *(u32 *)p_cursor = tmpdin; + p_cursor += 4; + } +@@ -207,7 +207,7 @@ int espi_xfer(struct fsl_spi_slave *fsl, uint cs, unsigned int bitlen, + rx_offset = cmd_len; + buffer = (unsigned char *)malloc(buf_len); + if (!buffer) { +- debug("SF: Failed to malloc memory.\n"); ++printf("SF: Failed to malloc memory.\n"); + return 1; + } + memcpy(buffer, cmd_buf, cmd_len); +@@ -218,7 +218,7 @@ int espi_xfer(struct fsl_spi_slave *fsl, uint cs, unsigned int bitlen, + len = data_len; + buffer = (unsigned char *)malloc(len * 2); + if (!buffer) { +- debug("SF: Failed to malloc memory.\n"); ++printf("SF: Failed to malloc memory.\n"); + return 1; + } + memcpy(buffer, data_out, len); +@@ -227,7 +227,7 @@ int espi_xfer(struct fsl_spi_slave *fsl, uint cs, unsigned int bitlen, + break; + } + +- debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) len %u\n", ++printf("spi_xfer: data_out %08X(%p) data_in %08X(%p) len %u\n", + *(uint *)data_out, data_out, *(uint *)data_in, data_in, len); + + num_chunks = DIV_ROUND_UP(data_len, max_tran_len); +@@ -352,7 +352,7 @@ void espi_setup_slave(struct fsl_spi_slave *fsl) + pm = spibrg / (max_hz * 16 * 2); + if (pm > 16) { + pm = 16; +- debug("max_hz is too low: %d Hz, %ld Hz is used.\n", ++printf("max_hz is too low: %d Hz, %ld Hz is used.\n", + max_hz, spibrg / (32 * 16)); + } + } else { +@@ -487,7 +487,7 @@ static int fsl_espi_set_speed(struct udevice *bus, uint speed) + { + struct fsl_spi_slave *fsl = dev_get_priv(bus); + +- debug("%s speed %u\n", __func__, speed); ++printf("%s speed %u\n", __func__, speed); + fsl->speed_hz = speed; + + __espi_set_speed(fsl); +@@ -499,7 +499,7 @@ static int fsl_espi_set_mode(struct udevice *bus, uint mode) + { + struct fsl_spi_slave *fsl = dev_get_priv(bus); + +- debug("%s mode %u\n", __func__, mode); ++printf("%s mode %u\n", __func__, mode); + fsl->mode = mode; + + __espi_set_mode(fsl); +@@ -513,7 +513,7 @@ static int fsl_espi_child_pre_probe(struct udevice *dev) + struct udevice *bus = dev->parent; + struct fsl_spi_slave *fsl = dev_get_priv(bus); + +- debug("%s cs %u\n", __func__, slave_plat->cs); ++printf("%s cs %u\n", __func__, slave_plat->cs); + fsl->cs = slave_plat->cs; + + return 0; +@@ -528,7 +528,7 @@ static int fsl_espi_probe(struct udevice *bus) + fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; + fsl->speed_hz = plat->speed_hz; + +- debug("%s probe done, bus-num %d.\n", bus->name, dev_seq(bus)); ++printf("%s probe done, bus-num %d.\n", bus->name, dev_seq(bus)); + + return 0; + } +@@ -557,7 +557,7 @@ static int fsl_espi_of_to_plat(struct udevice *bus) + plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency", + FSL_ESPI_DEFAULT_SCK_FREQ); + +- debug("ESPI: regs=%p, max-frequency=%d\n", ++printf("ESPI: regs=%p, max-frequency=%d\n", + &plat->regs_addr, plat->speed_hz); + + return 0; +diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c +index 1cd410493..8118c4aca 100644 +--- a/drivers/spi/ich.c ++++ b/drivers/spi/ich.c +@@ -188,7 +188,7 @@ static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans, + } + + if (opcode_index == ctlr->menubytes) { +- debug("ICH SPI: Opcode %x not found\n", trans->opcode); ++printf("ICH SPI: Opcode %x not found\n", trans->opcode); + return -EINVAL; + } + +@@ -196,7 +196,7 @@ static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans, + optype = (optypes >> (opcode_index * 2)) & 0x3; + + if (optype != trans->type) { +- debug("ICH SPI: Transaction doesn't fit type %d\n", ++printf("ICH SPI: Transaction doesn't fit type %d\n", + optype); + return -ENOSPC; + } +@@ -228,7 +228,7 @@ static int ich_status_poll(struct ich_spi_priv *ctlr, u16 bitmask, + } + udelay(10); + } +- debug("ICH SPI: SCIP timeout, read %x, expected %x, wts %x %x\n", ++printf("ICH SPI: SCIP timeout, read %x, expected %x, wts %x %x\n", + status, bitmask, wait_til_set, status & bitmask); + + return -ETIMEDOUT; +@@ -366,7 +366,7 @@ static int ich_spi_exec_op_swseq(struct spi_slave *slave, + return status; + + if (status & SPIS_FCERR) { +- debug("ICH SPI: Command transaction error\n"); ++printf("ICH SPI: Command transaction error\n"); + return -EIO; + } + +@@ -404,7 +404,7 @@ static int ich_spi_exec_op_swseq(struct spi_slave *slave, + return status; + + if (status & SPIS_FCERR) { +- debug("ICH SPI: Data transaction error %x\n", status); ++printf("ICH SPI: Data transaction error %x\n", status); + return -EIO; + } + +@@ -478,7 +478,7 @@ static int wait_for_hwseq_xfer(struct fast_spi_regs *regs, uint offset) + do { + hsfsts = readl(®s->hsfsts_ctl); + if (hsfsts & HSFSTS_FCERR) { +- debug("SPI transaction error at offset %x HSFSTS = %08x\n", ++printf("SPI transaction error at offset %x HSFSTS = %08x\n", + offset, hsfsts); + return -EIO; + } +@@ -489,7 +489,7 @@ static int wait_for_hwseq_xfer(struct fast_spi_regs *regs, uint offset) + return 0; + } while (get_timer(start) < SPIBAR_HWSEQ_XFER_TIMEOUT_MS); + +- debug("SPI transaction timeout at offset %x HSFSTS = %08x, timer %d\n", ++printf("SPI transaction timeout at offset %x HSFSTS = %08x, timer %d\n", + offset, hsfsts, (uint)get_timer(start)); + + return -ETIMEDOUT; +@@ -559,7 +559,7 @@ static int ich_spi_exec_op_hwseq(struct spi_slave *slave, + ret = exec_sync_hwseq_xfer(regs, cycle, offset, 0); + return ret; + default: +- debug("Unknown cycle %x\n", op->cmd.opcode); ++printf("Unknown cycle %x\n", op->cmd.opcode); + return -EINVAL; + }; + +@@ -762,7 +762,7 @@ static int ich_protect_lockdown(struct udevice *dev) + bios_cntl |= 1; /* Write Protect Disable (WPD) */ + ich_writeb(priv, bios_cntl, priv->bcr); + } else if (ret) { +- debug("%s: Failed to disable write-protect: err=%d\n", ++printf("%s: Failed to disable write-protect: err=%d\n", + __func__, ret); + return ret; + } +@@ -821,7 +821,7 @@ static int ich_init_controller(struct udevice *dev, + ctlr->pr = &ich9_spi->pr[0]; + } else if (plat->ich_version == ICHV_APL) { + } else { +- debug("ICH SPI: Unrecognised ICH version %d\n", ++printf("ICH SPI: Unrecognised ICH version %d\n", + plat->ich_version); + return -EINVAL; + } +@@ -830,7 +830,7 @@ static int ich_init_controller(struct udevice *dev, + ctlr->max_speed = 20000000; + if (plat->ich_version == ICHV_9 && ich9_can_do_33mhz(dev)) + ctlr->max_speed = 33000000; +- debug("ICH SPI: Version ID %d detected at %lx, speed %ld\n", ++printf("ICH SPI: Version ID %d detected at %lx, speed %ld\n", + plat->ich_version, plat->mmio_base, ctlr->max_speed); + + ich_set_bbar(ctlr, 0); +@@ -905,7 +905,7 @@ static int ich_spi_set_speed(struct udevice *bus, uint speed) + + static int ich_spi_set_mode(struct udevice *bus, uint mode) + { +- debug("%s: mode=%d\n", __func__, mode); ++printf("%s: mode=%d\n", __func__, mode); + + return 0; + } +@@ -958,7 +958,7 @@ static int ich_spi_of_to_plat(struct udevice *dev) + plat->bdf = pci_ofplat_get_devfn(plat->dtplat.reg[0]); + plat->hwseq = plat->dtplat.intel_hardware_seq; + #endif +- debug("%s: mmio_base=%lx\n", __func__, plat->mmio_base); ++printf("%s: mmio_base=%lx\n", __func__, plat->mmio_base); + + return 0; + } +diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c +index bc5da0a1e..2a5de32b1 100644 +--- a/drivers/spi/kirkwood_spi.c ++++ b/drivers/spi/kirkwood_spi.c +@@ -48,7 +48,7 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, + unsigned int tmpdout, tmpdin; + int tm, isread = 0; + +- debug("spi_xfer: dout %p din %p bitlen %u\n", dout, din, bitlen); ++printf("spi_xfer: dout %p din %p bitlen %u\n", dout, din, bitlen); + + if (flags & SPI_XFER_BEGIN) + _spi_cs_activate(reg); +@@ -60,7 +60,7 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, + clrsetbits_le32(®->cfg, KWSPI_XFERLEN_MASK, KWSPI_XFERLEN_1BYTE); + + while (bitlen > 4) { +- debug("loopstart bitlen %d\n", bitlen); ++printf("loopstart bitlen %d\n", bitlen); + tmpdout = 0; + + /* Shift data so it's msb-justified */ +@@ -69,7 +69,7 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, + + clrbits_le32(®->irq_cause, KWSPI_SMEMRDIRQ); + writel(tmpdout, ®->dout); /* Write the data out */ +- debug("*** spi_xfer: ... %08x written, bitlen %d\n", ++printf("*** spi_xfer: ... %08x written, bitlen %d\n", + tmpdout, bitlen); + + /* +@@ -81,7 +81,7 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, + if (readl(®->irq_cause) & KWSPI_SMEMRDIRQ) { + isread = 1; + tmpdin = readl(®->din); +- debug("spi_xfer: din %p..%08x read\n", ++printf("spi_xfer: din %p..%08x read\n", + din, tmpdin); + + if (din) { +@@ -98,7 +98,7 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, + if (tm >= KWSPI_TIMEOUT) + printf("*** spi_xfer: Time out during SPI transfer\n"); + +- debug("loopend bitlen %d\n", bitlen); ++printf("loopend bitlen %d\n", bitlen); + } + + if (flags & SPI_XFER_END) +@@ -116,7 +116,7 @@ static int mvebu_spi_set_speed(struct udevice *bus, uint hz) + unsigned int spr, sppr; + + if (spi->max_hz && (hz > spi->max_hz)) { +- debug("%s: limit speed to the max_hz of the bus %d\n", ++printf("%s: limit speed to the max_hz of the bus %d\n", + __func__, spi->max_hz); + hz = spi->max_hz; + } +@@ -177,7 +177,7 @@ static int mvebu_spi_set_speed(struct udevice *bus, uint hz) + + /* program spi clock prescaler using max_hz */ + writel(KWSPI_ADRLEN_3BYTE | data, ®->cfg); +- debug("data = 0x%08x\n", data); ++printf("data = 0x%08x\n", data); + + return 0; + } +diff --git a/drivers/spi/meson_spifc.c b/drivers/spi/meson_spifc.c +index d99a15140..7e071ed8d 100644 +--- a/drivers/spi/meson_spifc.c ++++ b/drivers/spi/meson_spifc.c +@@ -197,7 +197,7 @@ static int meson_spifc_xfer(struct udevice *slave, unsigned int bitlen, + if (bitlen % 8) + return -EINVAL; + +- debug("xfer len %d (%d) dout %p din %p\n", bitlen, blen, dout, din); ++printf("xfer len %d (%d) dout %p din %p\n", bitlen, blen, dout, din); + + regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, 0); + +@@ -229,7 +229,7 @@ static int meson_spifc_set_speed(struct udevice *dev, uint speed) + parent = clk_get_rate(&spifc->clk); + n = max_t(int, parent / speed - 1, 1); + +- debug("parent %lu, speed %u, n %d\n", parent, speed, n); ++printf("parent %lu, speed %u, n %d\n", parent, speed, n); + + value = (n << CLOCK_DIV_SHIFT) & CLOCK_DIV_MASK; + value |= (n << CLOCK_CNT_LOW_SHIFT) & CLOCK_CNT_LOW_MASK; +diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c +index 6869d60d9..0f282fbdf 100644 +--- a/drivers/spi/mpc8xxx_spi.c ++++ b/drivers/spi/mpc8xxx_spi.c +@@ -131,7 +131,7 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen, + const u8 *cout = dout; + u8 *cin = din; + +- debug("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__, ++printf("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__, + bus->name, plat->cs, (uint)dout, (uint)din, bitlen); + if (plat->cs >= priv->cs_count) { + dev_err(dev, "chip select index %d too large (cs_count=%d)\n", +@@ -160,7 +160,7 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen, + /* Write the data out */ + out_be32(&spi->tx, tmpdout); + +- debug("*** %s: ... %08x written\n", __func__, tmpdout); ++printf("*** %s: ... %08x written\n", __func__, tmpdout); + + /* + * Wait for SPI transmit to get out +@@ -195,12 +195,12 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen, + } while (get_timer(start) < SPI_TIMEOUT); + + if (get_timer(start) >= SPI_TIMEOUT) { +- debug("*** %s: Time out during SPI transfer\n", ++printf("*** %s: Time out during SPI transfer\n", + __func__); + return -ETIMEDOUT; + } + +- debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin); ++printf("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin); + } + + if (flags & SPI_XFER_END) +@@ -244,7 +244,7 @@ static int mpc8xxx_spi_set_speed(struct udevice *dev, uint speed) + out_be32(&spi->mode, mode); + } + +- debug("requested speed %u, set speed to %lu/(%s4*%u) == %lu\n", ++printf("requested speed %u, set speed to %lu/(%s4*%u) == %lu\n", + speed, priv->clk_rate, div16 ? "16*" : "", pm + 1, + clk/(4*(pm + 1))); + +diff --git a/drivers/spi/mscc_bb_spi.c b/drivers/spi/mscc_bb_spi.c +index 2a01ea061..caed3fe5b 100644 +--- a/drivers/spi/mscc_bb_spi.c ++++ b/drivers/spi/mscc_bb_spi.c +@@ -67,7 +67,7 @@ static int mscc_bb_spi_cs_activate(struct mscc_bb_priv *priv, int mode, int cs) + writel(priv->svalue | priv->clk2, priv->regs); + + priv->cs_active = true; +- debug("Activated CS%d\n", priv->cs_num); ++printf("Activated CS%d\n", priv->cs_num); + } + + return 0; +@@ -97,7 +97,7 @@ static int mscc_bb_spi_cs_deactivate(struct mscc_bb_priv *priv, int deact_delay) + writel(0, priv->regs); + + priv->cs_active = false; +- debug("Deactivated CS%d\n", priv->cs_num); ++printf("Deactivated CS%d\n", priv->cs_num); + } + + return 0; +@@ -123,7 +123,7 @@ int mscc_bb_spi_xfer(struct udevice *dev, unsigned int bitlen, + const u8 *txd = dout; + u8 *rxd = din; + +- debug("spi_xfer: slave %s:%s cs%d mode %d, dout %p din %p bitlen %u\n", ++printf("spi_xfer: slave %s:%s cs%d mode %d, dout %p din %p bitlen %u\n", + dev->parent->name, dev->name, plat->cs, plat->mode, dout, + din, bitlen); + +@@ -173,13 +173,13 @@ int mscc_bb_spi_xfer(struct udevice *dev, unsigned int bitlen, + mask >>= 1; + } + if (rxd) { +- debug("Read 0x%02x\n", rx); ++printf("Read 0x%02x\n", rx); + rxd[i] = (u8)rx; + } +- debug("spi_xfer: byte %d/%d\n", i + 1, count); ++printf("spi_xfer: byte %d/%d\n", i + 1, count); + } + +- debug("spi_xfer: done\n"); ++printf("spi_xfer: done\n"); + + if (flags & SPI_XFER_END) + mscc_bb_spi_cs_deactivate(priv, priv->deactivate_delay_us); +@@ -215,7 +215,7 @@ static int mscc_bb_spi_probe(struct udevice *bus) + { + struct mscc_bb_priv *priv = dev_get_priv(bus); + +- debug("%s: loaded, priv %p\n", __func__, priv); ++printf("%s: loaded, priv %p\n", __func__, priv); + + priv->regs = (void __iomem *)dev_read_addr(bus); + +diff --git a/drivers/spi/mt7621_spi.c b/drivers/spi/mt7621_spi.c +index eb0931747..d6846d95e 100644 +--- a/drivers/spi/mt7621_spi.c ++++ b/drivers/spi/mt7621_spi.c +@@ -58,7 +58,7 @@ struct mt7621_spi { + + static void mt7621_spi_set_cs(struct mt7621_spi *rs, int cs, int enable) + { +- debug("%s: cs#%d -> %s\n", __func__, cs, enable ? "enable" : "disable"); ++printf("%s: cs#%d -> %s\n", __func__, cs, enable ? "enable" : "disable"); + + if (enable) { + setbits_le32(rs->base + MT7621_SPI_MASTER, +@@ -79,7 +79,7 @@ static int mt7621_spi_set_mode(struct udevice *bus, uint mode) + struct mt7621_spi *rs = dev_get_priv(bus); + u32 reg; + +- debug("%s: mode=0x%08x\n", __func__, mode); ++printf("%s: mode=0x%08x\n", __func__, mode); + reg = ioread32(rs->base + MT7621_SPI_MASTER); + + reg &= ~MT7621_LSB_FIRST; +@@ -111,9 +111,9 @@ static int mt7621_spi_set_speed(struct udevice *bus, uint speed) + u32 rate; + u32 reg; + +- debug("%s: speed=%d\n", __func__, speed); ++printf("%s: speed=%d\n", __func__, speed); + rate = DIV_ROUND_UP(rs->sys_freq, speed); +- debug("rate:%u\n", rate); ++printf("rate:%u\n", rate); + + if (rate > 4097) + return -EINVAL; +@@ -225,7 +225,7 @@ static int mt7621_spi_xfer(struct udevice *dev, unsigned int bitlen, + int total_size = bitlen >> 3; + int ret = 0; + +- debug("%s: dout=%p, din=%p, len=%x, flags=%lx\n", __func__, dout, din, ++printf("%s: dout=%p, din=%p, len=%x, flags=%lx\n", __func__, dout, din, + total_size, flags); + + /* +diff --git a/drivers/spi/mvebu_a3700_spi.c b/drivers/spi/mvebu_a3700_spi.c +index b1dce048a..40f0cfd04 100644 +--- a/drivers/spi/mvebu_a3700_spi.c ++++ b/drivers/spi/mvebu_a3700_spi.c +@@ -155,11 +155,11 @@ static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen, + bytelen = bitlen / 8; + + if (dout && din) +- debug("This is a duplex transfer.\n"); ++printf("This is a duplex transfer.\n"); + + /* Activate CS */ + if (flags & SPI_XFER_BEGIN) { +- debug("SPI: activate cs.\n"); ++printf("SPI: activate cs.\n"); + spi_cs_activate(plat, spi_chip_select(dev)); + } + +@@ -178,7 +178,7 @@ static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen, + if (ret) + return ret; + +- debug("SPI: deactivate cs.\n"); ++printf("SPI: deactivate cs.\n"); + spi_cs_deactivate(plat, spi_chip_select(dev)); + } + +diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c +index f3dddbdbd..3a18a1e8e 100644 +--- a/drivers/spi/mxc_spi.c ++++ b/drivers/spi/mxc_spi.c +@@ -204,7 +204,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) + div = DIV_ROUND_UP(clk_src, max_hz); + div = get_cspi_div(div); + +- debug("clk %d Hz, div %d, real clk %d Hz\n", ++printf("clk %d Hz, div %d, real clk %d Hz\n", + max_hz, div, clk_src / (4 << div)); + + ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) | +@@ -266,7 +266,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) + } + } + +- debug("pre_div = %d, post_div=%d\n", pre_div, post_div); ++printf("pre_div = %d, post_div=%d\n", pre_div, post_div); + reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_SELCHAN(3)) | + MXC_CSPICTRL_SELCHAN(cs); + reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_PREDIV(0x0F)) | +@@ -300,9 +300,9 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs) + reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_PHA))) | + (sclkpha << (cs + MXC_CSPICON_PHA)); + +- debug("reg_ctrl = 0x%x\n", reg_ctrl); ++printf("reg_ctrl = 0x%x\n", reg_ctrl); + reg_write(®s->ctrl, reg_ctrl); +- debug("reg_config = 0x%x\n", reg_config); ++printf("reg_config = 0x%x\n", reg_config); + reg_write(®s->cfg, reg_config); + + /* save config register and control register */ +@@ -326,7 +326,7 @@ int spi_xchg_single(struct mxc_spi_slave *mxcs, unsigned int bitlen, + u32 ts; + int status; + +- debug("%s: bitlen %d dout 0x%lx din 0x%lx\n", ++printf("%s: bitlen %d dout 0x%lx din 0x%lx\n", + __func__, bitlen, (ulong)dout, (ulong)din); + + mxcs->ctrl_reg = (mxcs->ctrl_reg & +@@ -354,7 +354,7 @@ int spi_xchg_single(struct mxc_spi_slave *mxcs, unsigned int bitlen, + data = (data << 8) | (*dout++ & 0xFF); + } + } +- debug("Sending SPI 0x%x\n", data); ++printf("Sending SPI 0x%x\n", data); + + reg_write(®s->txdata, data); + nbytes -= cnt; +@@ -376,7 +376,7 @@ int spi_xchg_single(struct mxc_spi_slave *mxcs, unsigned int bitlen, + dout += 4; + } + } +- debug("Sending SPI 0x%x\n", data); ++printf("Sending SPI 0x%x\n", data); + reg_write(®s->txdata, data); + nbytes -= 4; + } +@@ -407,7 +407,7 @@ int spi_xchg_single(struct mxc_spi_slave *mxcs, unsigned int bitlen, + data = reg_read(®s->rxdata); + cnt = (bitlen % 32) / 8; + data = cpu_to_be32(data) >> ((sizeof(data) - cnt) * 8); +- debug("SPI Rx unaligned: 0x%x\n", data); ++printf("SPI Rx unaligned: 0x%x\n", data); + if (din) { + memcpy(din, &data, cnt); + din += cnt; +@@ -419,7 +419,7 @@ int spi_xchg_single(struct mxc_spi_slave *mxcs, unsigned int bitlen, + u32 tmp; + tmp = reg_read(®s->rxdata); + data = cpu_to_be32(tmp); +- debug("SPI Rx: 0x%x 0x%x\n", tmp, data); ++printf("SPI Rx: 0x%x 0x%x\n", tmp, data); + cnt = min_t(u32, nbytes, sizeof(data)); + if (din) { + memcpy(din, &data, cnt); +diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c +index d41352a0b..d6af74f06 100644 +--- a/drivers/spi/mxs_spi.c ++++ b/drivers/spi/mxs_spi.c +@@ -315,7 +315,7 @@ static int mxs_spi_probe(struct udevice *bus) + struct mxs_spi_priv *priv = dev_get_priv(bus); + int ret; + +- debug("%s: probe\n", __func__); ++printf("%s: probe\n", __func__); + + #if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_fsl_imx23_spi *dtplat = &plat->dtplat; +@@ -327,7 +327,7 @@ static int mxs_spi_probe(struct udevice *bus) + priv->max_freq = dtplat->spi_max_frequency; + plat->num_cs = dtplat->num_cs; + +- debug("OF_PLATDATA: regs: 0x%x max freq: %d clkid: %d\n", ++printf("OF_PLATDATA: regs: 0x%x max freq: %d clkid: %d\n", + (unsigned int)priv->regs, priv->max_freq, priv->clk_id); + #else + priv->regs = (struct mxs_ssp_regs *)plat->base; +@@ -402,7 +402,7 @@ static int mxs_spi_set_speed(struct udevice *bus, uint speed) + if (speed > priv->max_freq) + speed = priv->max_freq; + +- debug("%s speed: %u [Hz] clkid: %d\n", __func__, speed, clkid); ++printf("%s speed: %u [Hz] clkid: %d\n", __func__, speed, clkid); + mxs_set_ssp_busclock(clkid, speed / 1000); + + return 0; +@@ -415,7 +415,7 @@ static int mxs_spi_set_mode(struct udevice *bus, uint mode) + u32 reg; + + priv->mode = mode; +- debug("%s: mode 0x%x\n", __func__, mode); ++printf("%s: mode 0x%x\n", __func__, mode); + + reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS; + reg |= (priv->mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0; +@@ -466,7 +466,7 @@ static int mxs_of_to_plat(struct udevice *bus) + } + plat->clk_id = prop[1]; + +- debug("%s: base=0x%x, max-frequency=%d num-cs=%d dma_id=%d clk_id=%d\n", ++printf("%s: base=0x%x, max-frequency=%d num-cs=%d dma_id=%d clk_id=%d\n", + __func__, (uint)plat->base, plat->frequency, plat->num_cs, + plat->dma_id, plat->clk_id); + +diff --git a/drivers/spi/octeon_spi.c b/drivers/spi/octeon_spi.c +index 6ac66d2f9..eda5ec290 100644 +--- a/drivers/spi/octeon_spi.c ++++ b/drivers/spi/octeon_spi.c +@@ -93,7 +93,7 @@ static u64 octeon_spi_set_mpicfg(struct udevice *dev) + if (max_speed > OCTEON_SPI_MAX_CLOCK_HZ) + max_speed = OCTEON_SPI_MAX_CLOCK_HZ; + +- debug("\n slave params %d %d %d\n", slave->cs, ++printf("\n slave params %d %d %d\n", slave->cs, + slave->max_hz, slave->mode); + cpha = !!(slave->mode & SPI_CPHA); + cpol = !!(slave->mode & SPI_CPOL); +@@ -108,7 +108,7 @@ static u64 octeon_spi_set_mpicfg(struct udevice *dev) + MPI_CFG_CSENA2 | MPI_CFG_CSENA1 | + MPI_CFG_ENABLE; + +- debug("\n mpi_cfg %llx\n", mpi_cfg); ++printf("\n mpi_cfg %llx\n", mpi_cfg); + return mpi_cfg; + } + +@@ -129,7 +129,7 @@ static void octeon_spi_wait_ready(struct udevice *dev) + WATCHDOG_RESET(); + } while (mpi_sts & MPI_STS_BUSY); + +- debug("%s(%s)\n", __func__, dev->name); ++printf("%s(%s)\n", __func__, dev->name); + } + + /** +@@ -146,7 +146,7 @@ static int octeon_spi_claim_bus(struct udevice *dev) + void *base = priv->base; + u64 mpi_cfg; + +- debug("\n\n%s(%s)\n", __func__, dev->name); ++printf("\n\n%s(%s)\n", __func__, dev->name); + if (!OCTEON_SPI_CS_VALID(spi_chip_select(dev))) + return -EINVAL; + +@@ -177,7 +177,7 @@ static int octeon_spi_release_bus(struct udevice *dev) + void *base = priv->base; + u64 mpi_cfg; + +- debug("%s(%s)\n\n", __func__, dev->name); ++printf("%s(%s)\n\n", __func__, dev->name); + if (!OCTEON_SPI_CS_VALID(spi_chip_select(dev))) + return -EINVAL; + +@@ -211,7 +211,7 @@ static int octeon_spi_xfer(struct udevice *dev, unsigned int bitlen, + if (!OCTEON_SPI_CS_VALID(cs)) + return -EINVAL; + +- debug("\n %s(%s, %u, %p, %p, 0x%lx), cs: %d\n", ++printf("\n %s(%s, %u, %p, %p, 0x%lx), cs: %d\n", + __func__, dev->name, bitlen, dout, din, flags, cs); + + mpi_cfg = octeon_spi_set_mpicfg(dev); +@@ -221,7 +221,7 @@ static int octeon_spi_xfer(struct udevice *dev, unsigned int bitlen, + udelay(10); + } + +- debug("\n mpi_cfg upd %llx\n", mpi_cfg); ++printf("\n mpi_cfg upd %llx\n", mpi_cfg); + + /* + * Start by writing and reading 8 bytes at a time. While we can support +@@ -230,7 +230,7 @@ static int octeon_spi_xfer(struct udevice *dev, unsigned int bitlen, + while (len > 8) { + if (tx_data) { + wide_dat = get_unaligned((u64 *)tx_data); +- debug(" tx: %016llx \t", (unsigned long long)wide_dat); ++printf(" tx: %016llx \t", (unsigned long long)wide_dat); + tx_data += 8; + writeq(wide_dat, base + MPI_WIDE_DAT); + } +@@ -243,23 +243,23 @@ static int octeon_spi_xfer(struct udevice *dev, unsigned int bitlen, + + octeon_spi_wait_ready(dev); + +- debug("\n "); ++printf("\n "); + + if (rx_data) { + wide_dat = readq(base + MPI_WIDE_DAT); +- debug(" rx: %016llx\t", (unsigned long long)wide_dat); ++printf(" rx: %016llx\t", (unsigned long long)wide_dat); + *(u64 *)rx_data = wide_dat; + rx_data += 8; + } + len -= 8; + } + +- debug("\n "); ++printf("\n "); + + /* Write and read the rest of the data */ + if (tx_data) { + for (i = 0; i < len; i++) { +- debug(" tx: %02x\n", *tx_data); ++printf(" tx: %02x\n", *tx_data); + writeq(*tx_data++, base + MPI_DAT(i)); + } + } +@@ -272,12 +272,12 @@ static int octeon_spi_xfer(struct udevice *dev, unsigned int bitlen, + + octeon_spi_wait_ready(dev); + +- debug("\n "); ++printf("\n "); + + if (rx_data) { + for (i = 0; i < len; i++) { + *rx_data = readq(base + MPI_DAT(i)) & 0xff; +- debug(" rx: %02x\n", *rx_data); ++printf(" rx: %02x\n", *rx_data); + rx_data++; + } + } +@@ -304,7 +304,7 @@ static int octeontx2_spi_xfer(struct udevice *dev, unsigned int bitlen, + if (!OCTEON_SPI_CS_VALID(cs)) + return -EINVAL; + +- debug("\n %s(%s, %u, %p, %p, 0x%lx), cs: %d\n", ++printf("\n %s(%s, %u, %p, %p, 0x%lx), cs: %d\n", + __func__, dev->name, bitlen, dout, din, flags, cs); + + mpi_cfg = octeon_spi_set_mpicfg(dev); +@@ -324,7 +324,7 @@ static int octeontx2_spi_xfer(struct udevice *dev, unsigned int bitlen, + udelay(10); + } + +- debug("\n mpi_cfg upd %llx\n\n", mpi_cfg); ++printf("\n mpi_cfg upd %llx\n\n", mpi_cfg); + + /* Start by writing or reading 1024 bytes at a time. */ + while (len > 1024) { +@@ -332,10 +332,10 @@ static int octeontx2_spi_xfer(struct udevice *dev, unsigned int bitlen, + /* 8 bytes per iteration */ + for (i = 0; i < 128; i++) { + wide_dat = get_unaligned((u64 *)tx_data); +- debug(" tx: %016llx \t", ++printf(" tx: %016llx \t", + (unsigned long long)wide_dat); + if ((i % 4) == 3) +- debug("\n"); ++printf("\n"); + tx_data += 8; + writeq(wide_dat, base + MPI_WIDE_BUF(i)); + } +@@ -348,16 +348,16 @@ static int octeontx2_spi_xfer(struct udevice *dev, unsigned int bitlen, + + octeon_spi_wait_ready(dev); + +- debug("\n "); ++printf("\n "); + + if (rx_data) { + /* 8 bytes per iteration */ + for (i = 0; i < 128; i++) { + wide_dat = readq(base + MPI_WIDE_BUF(i)); +- debug(" rx: %016llx\t", ++printf(" rx: %016llx\t", + (unsigned long long)wide_dat); + if ((i % 4) == 3) +- debug("\n"); ++printf("\n"); + *(u64 *)rx_data = wide_dat; + rx_data += 8; + } +@@ -370,16 +370,16 @@ static int octeontx2_spi_xfer(struct udevice *dev, unsigned int bitlen, + /* 8 bytes per iteration */ + for (i = 0; i < len / 8; i++) { + wide_dat = get_unaligned((u64 *)tx_data); +- debug(" tx: %016llx \t", ++printf(" tx: %016llx \t", + (unsigned long long)wide_dat); + if ((i % 4) == 3) +- debug("\n"); ++printf("\n"); + tx_data += 8; + writeq(wide_dat, base + MPI_WIDE_BUF(i)); + } + if (rem) { + memcpy(&wide_dat, tx_data, rem); +- debug(" rtx: %016llx\t", wide_dat); ++printf(" rtx: %016llx\t", wide_dat); + writeq(wide_dat, base + MPI_WIDE_BUF(i)); + } + } +@@ -392,23 +392,23 @@ static int octeontx2_spi_xfer(struct udevice *dev, unsigned int bitlen, + + octeon_spi_wait_ready(dev); + +- debug("\n "); ++printf("\n "); + + if (rx_data) { + rem = len % 8; + /* 8 bytes per iteration */ + for (i = 0; i < len / 8; i++) { + wide_dat = readq(base + MPI_WIDE_BUF(i)); +- debug(" rx: %016llx\t", ++printf(" rx: %016llx\t", + (unsigned long long)wide_dat); + if ((i % 4) == 3) +- debug("\n"); ++printf("\n"); + *(u64 *)rx_data = wide_dat; + rx_data += 8; + } + if (rem) { + wide_dat = readq(base + MPI_WIDE_BUF(i)); +- debug(" rrx: %016llx\t", ++printf(" rrx: %016llx\t", + (unsigned long long)wide_dat); + memcpy(rx_data, &wide_dat, rem); + rx_data += rem; +@@ -526,7 +526,7 @@ static int octeon_spi_set_speed(struct udevice *bus, uint max_hz) + if (IS_ERR_VALUE(clk_rate)) + return -EINVAL; + +- debug("%s(%s, %u, %lu)\n", __func__, bus->name, max_hz, clk_rate); ++printf("%s(%s, %u, %lu)\n", __func__, bus->name, max_hz, clk_rate); + + priv->clkdiv = clk_rate / (2 * max_hz); + while (1) { +@@ -539,7 +539,7 @@ static int octeon_spi_set_speed(struct udevice *bus, uint max_hz) + if (priv->clkdiv > 8191) + return -EINVAL; + +- debug("%s: clkdiv=%d\n", __func__, priv->clkdiv); ++printf("%s: clkdiv=%d\n", __func__, priv->clkdiv); + + return 0; + } +@@ -567,7 +567,7 @@ static int octeon_spi_probe(struct udevice *dev) + if (device_is_compatible(dev, "cavium,thunder-8190-spi")) { + pci_dev_t bdf = dm_pci_get_bdf(dev); + +- debug("SPI PCI device: %x\n", bdf); ++printf("SPI PCI device: %x\n", bdf); + priv->base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, + PCI_REGION_MEM); + /* Add base offset */ +@@ -593,7 +593,7 @@ static int octeon_spi_probe(struct udevice *dev) + if (ret) + return ret; + +- debug("SPI bus %s %d at %p\n", dev->name, dev_seq(dev), priv->base); ++printf("SPI bus %s %d at %p\n", dev->name, dev_seq(dev), priv->base); + + return 0; + } +diff --git a/drivers/spi/pic32_spi.c b/drivers/spi/pic32_spi.c +index 45f07f083..88a4415da 100644 +--- a/drivers/spi/pic32_spi.c ++++ b/drivers/spi/pic32_spi.c +@@ -247,9 +247,9 @@ static int pic32_spi_xfer(struct udevice *slave, unsigned int bitlen, + priv = dev_get_priv(bus); + slave_plat = dev_get_parent_plat(slave); + +- debug("spi_xfer: bus:%i cs:%i flags:%lx\n", ++printf("spi_xfer: bus:%i cs:%i flags:%lx\n", + dev_seq(bus), slave_plat->cs, flags); +- debug("msg tx %p, rx %p submitted of %d byte(s)\n", ++printf("msg tx %p, rx %p submitted of %d byte(s)\n", + tx_buf, rx_buf, len); + + /* assert cs */ +@@ -295,7 +295,7 @@ static int pic32_spi_set_speed(struct udevice *bus, uint speed) + struct pic32_spi_priv *priv = dev_get_priv(bus); + u32 div; + +- debug("%s: %s, speed %u\n", __func__, bus->name, speed); ++printf("%s: %s, speed %u\n", __func__, bus->name, speed); + + /* div = [clk_in / (2 * spi_clk)] - 1 */ + div = (priv->clk_rate / 2 / speed) - 1; +@@ -312,7 +312,7 @@ static int pic32_spi_set_mode(struct udevice *bus, uint mode) + struct pic32_spi_priv *priv = dev_get_priv(bus); + u32 val; + +- debug("%s: %s, mode %d\n", __func__, bus->name, mode); ++printf("%s: %s, mode %d\n", __func__, bus->name, mode); + + /* set spi-clk mode */ + val = readl(&priv->regs->ctrl.raw); +@@ -385,7 +385,7 @@ static int pic32_spi_probe(struct udevice *bus) + fdt_size_t size; + int ret; + +- debug("%s: %d, bus: %i\n", __func__, __LINE__, dev_seq(bus)); ++printf("%s: %d, bus: %i\n", __func__, __LINE__, dev_seq(bus)); + addr = fdtdec_get_addr_size(gd->fdt_blob, node, "reg", &size); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; +diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c +index 40bd8851b..8164f3b85 100644 +--- a/drivers/spi/rk_spi.c ++++ b/drivers/spi/rk_spi.c +@@ -65,21 +65,21 @@ struct rockchip_spi_priv { + + static void rkspi_dump_regs(struct rockchip_spi *regs) + { +- debug("ctrl0: \t\t0x%08x\n", readl(®s->ctrlr0)); +- debug("ctrl1: \t\t0x%08x\n", readl(®s->ctrlr1)); +- debug("ssienr: \t\t0x%08x\n", readl(®s->enr)); +- debug("ser: \t\t0x%08x\n", readl(®s->ser)); +- debug("baudr: \t\t0x%08x\n", readl(®s->baudr)); +- debug("txftlr: \t\t0x%08x\n", readl(®s->txftlr)); +- debug("rxftlr: \t\t0x%08x\n", readl(®s->rxftlr)); +- debug("txflr: \t\t0x%08x\n", readl(®s->txflr)); +- debug("rxflr: \t\t0x%08x\n", readl(®s->rxflr)); +- debug("sr: \t\t0x%08x\n", readl(®s->sr)); +- debug("imr: \t\t0x%08x\n", readl(®s->imr)); +- debug("isr: \t\t0x%08x\n", readl(®s->isr)); +- debug("dmacr: \t\t0x%08x\n", readl(®s->dmacr)); +- debug("dmatdlr: \t0x%08x\n", readl(®s->dmatdlr)); +- debug("dmardlr: \t0x%08x\n", readl(®s->dmardlr)); ++printf("ctrl0: \t\t0x%08x\n", readl(®s->ctrlr0)); ++printf("ctrl1: \t\t0x%08x\n", readl(®s->ctrlr1)); ++printf("ssienr: \t\t0x%08x\n", readl(®s->enr)); ++printf("ser: \t\t0x%08x\n", readl(®s->ser)); ++printf("baudr: \t\t0x%08x\n", readl(®s->baudr)); ++printf("txftlr: \t\t0x%08x\n", readl(®s->txftlr)); ++printf("rxftlr: \t\t0x%08x\n", readl(®s->rxftlr)); ++printf("txflr: \t\t0x%08x\n", readl(®s->txflr)); ++printf("rxflr: \t\t0x%08x\n", readl(®s->rxflr)); ++printf("sr: \t\t0x%08x\n", readl(®s->sr)); ++printf("imr: \t\t0x%08x\n", readl(®s->imr)); ++printf("isr: \t\t0x%08x\n", readl(®s->isr)); ++printf("dmacr: \t\t0x%08x\n", readl(®s->dmacr)); ++printf("dmatdlr: \t0x%08x\n", readl(®s->dmatdlr)); ++printf("dmardlr: \t0x%08x\n", readl(®s->dmardlr)); + } + + static void rkspi_enable_chip(struct rockchip_spi *regs, bool enable) +@@ -104,14 +104,14 @@ static void rkspi_set_clk(struct rockchip_spi_priv *priv, uint speed) + */ + if (clk_div > 0xfffe) { + clk_div = 0xfffe; +- debug("%s: can't divide down to %d Hz (actual will be %d Hz)\n", ++printf("%s: can't divide down to %d Hz (actual will be %d Hz)\n", + __func__, speed, priv->input_rate / clk_div); + } + + /* Round up to the next even 16bit number */ + clk_div = (clk_div + 1) & 0xfffe; + +- debug("spi speed %u, div %u\n", speed, clk_div); ++printf("spi speed %u, div %u\n", speed, clk_div); + + clrsetbits_le32(&priv->regs->baudr, 0xffff, clk_div); + priv->last_speed_hz = speed; +@@ -124,7 +124,7 @@ static int rkspi_wait_till_not_busy(struct rockchip_spi *regs) + start = get_timer(0); + while (readl(®s->sr) & SR_BUSY) { + if (get_timer(start) > ROCKCHIP_SPI_TIMEOUT_MS) { +- debug("RK SPI: Status keeps busy for 1000us after a read/write!\n"); ++printf("RK SPI: Status keeps busy for 1000us after a read/write!\n"); + return -ETIMEDOUT; + } + } +@@ -146,13 +146,13 @@ static void spi_cs_activate(struct udevice *dev, uint cs) + if (delay_us < plat->deactivate_delay_us) { + ulong additional_delay_us = + plat->deactivate_delay_us - delay_us; +- debug("%s: delaying by %ld us\n", ++printf("%s: delaying by %ld us\n", + __func__, additional_delay_us); + udelay(additional_delay_us); + } + } + +- debug("activate cs%u\n", cs); ++printf("activate cs%u\n", cs); + writel(1 << cs, ®s->ser); + if (plat->activate_delay_us) + udelay(plat->activate_delay_us); +@@ -165,7 +165,7 @@ static void spi_cs_deactivate(struct udevice *dev, uint cs) + struct rockchip_spi_priv *priv = dev_get_priv(bus); + struct rockchip_spi *regs = priv->regs; + +- debug("deactivate cs%u\n", cs); ++printf("deactivate cs%u\n", cs); + writel(0, ®s->ser); + + /* Remember time of this transaction so we can honour the bus delay */ +@@ -202,7 +202,7 @@ static int rockchip_spi_of_to_plat(struct udevice *bus) + + ret = clk_get_by_index(bus, 0, &priv->clk); + if (ret < 0) { +- debug("%s: Could not get clock for %s: %d\n", __func__, ++printf("%s: Could not get clock for %s: %d\n", __func__, + bus->name, ret); + return ret; + } +@@ -214,7 +214,7 @@ static int rockchip_spi_of_to_plat(struct udevice *bus) + plat->activate_delay_us = + dev_read_u32_default(bus, "spi-activate-delay", 0); + +- debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n", ++printf("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n", + __func__, (uint)plat->base, plat->frequency, + plat->deactivate_delay_us); + #endif +@@ -256,7 +256,7 @@ static int rockchip_spi_probe(struct udevice *bus) + struct rockchip_spi_priv *priv = dev_get_priv(bus); + int ret; + +- debug("%s: probe\n", __func__); ++printf("%s: probe\n", __func__); + #if CONFIG_IS_ENABLED(OF_PLATDATA) + ret = conv_of_plat(bus); + if (ret) +@@ -275,11 +275,11 @@ static int rockchip_spi_probe(struct udevice *bus) + ret = clk_set_rate(&priv->clk, + rockchip_spi_calc_modclk(priv->max_freq)); + if (ret < 0) { +- debug("%s: Failed to set clock: %d\n", __func__, ret); ++printf("%s: Failed to set clock: %d\n", __func__, ret); + return ret; + } + priv->input_rate = ret; +- debug("%s: rate = %u\n", __func__, priv->input_rate); ++printf("%s: rate = %u\n", __func__, priv->input_rate); + + return 0; + } +@@ -415,10 +415,10 @@ static inline int rockchip_spi_16bit_reader(struct udevice *dev, + } + + #if defined(DEBUG) +- debug("%s: observed rx_level during processing:\n", __func__); ++printf("%s: observed rx_level during processing:\n", __func__); + for (int i = 0; i <= 32; ++i) + if (statistics_rxlevels[i]) +- debug("\t%2d: %d\n", i, statistics_rxlevels[i]); ++printf("\t%2d: %d\n", i, statistics_rxlevels[i]); + #endif + /* Restore the original transfer setup and return error-free. */ + writel(saved_ctrlr0, ®s->ctrlr0); +@@ -438,7 +438,7 @@ static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen, + int toread, towrite; + int ret = 0; + +- debug("%s: dout=%p, din=%p, len=%x, flags=%lx\n", __func__, dout, din, ++printf("%s: dout=%p, din=%p, len=%x, flags=%lx\n", __func__, dout, din, + len, flags); + if (DEBUG_RK_SPI) + rkspi_dump_regs(regs); +diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c +index f3602a25b..755f3547c 100644 +--- a/drivers/spi/soft_spi.c ++++ b/drivers/spi/soft_spi.c +@@ -127,7 +127,7 @@ static int soft_spi_xfer(struct udevice *dev, unsigned int bitlen, + int cidle = !!(priv->mode & SPI_CPOL); + unsigned int j; + +- debug("spi_xfer: slave %s:%s dout %08X din %08X bitlen %u\n", ++printf("spi_xfer: slave %s:%s dout %08X din %08X bitlen %u\n", + dev->parent->name, dev->name, *(uint *)txd, *(uint *)rxd, + bitlen); + +diff --git a/drivers/spi/spi-mem-nodm.c b/drivers/spi/spi-mem-nodm.c +index 765f05fe5..b0f48fff8 100644 +--- a/drivers/spi/spi-mem-nodm.c ++++ b/drivers/spi/spi-mem-nodm.c +@@ -68,13 +68,13 @@ int spi_mem_exec_op(struct spi_slave *slave, + spi_release_bus(slave); + + for (i = 0; i < pos; i++) +- debug("%02x ", op_buf[i]); +- debug("| [%dB %s] ", ++printf("%02x ", op_buf[i]); ++printf("| [%dB %s] ", + tx_buf || rx_buf ? op->data.nbytes : 0, + tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-"); + for (i = 0; i < op->data.nbytes; i++) +- debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]); +- debug("[ret %d]\n", ret); ++printf("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]); ++printf("[ret %d]\n", ret); + + free(op_buf); + +diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c +index c095ae950..82319e84f 100644 +--- a/drivers/spi/spi-mem.c ++++ b/drivers/spi/spi-mem.c +@@ -397,13 +397,13 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) + spi_release_bus(slave); + + for (i = 0; i < pos; i++) +- debug("%02x ", op_buf[i]); +- debug("| [%dB %s] ", ++printf("%02x ", op_buf[i]); ++printf("| [%dB %s] ", + tx_buf || rx_buf ? op->data.nbytes : 0, + tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-"); + for (i = 0; i < op->data.nbytes; i++) +- debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]); +- debug("[ret %d]\n", ret); ++printf("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]); ++printf("[ret %d]\n", ret); + + if (ret < 0) + return ret; +diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c +index cdea5405f..119e265e6 100644 +--- a/drivers/spi/spi-qup.c ++++ b/drivers/spi/spi-qup.c +@@ -186,7 +186,7 @@ static int qup_spi_set_cs(struct udevice *dev, unsigned int cs, bool enable) + { + struct qup_spi_priv *priv = dev_get_priv(dev); + +- debug("%s: cs=%d enable=%d\n", __func__, cs, enable); ++printf("%s: cs=%d enable=%d\n", __func__, cs, enable); + + if (cs >= SPI_NUM_CHIPSELECTS) + return -ENODEV; +diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c +index 4ca5d3a93..10aa0f780 100644 +--- a/drivers/spi/spi-sunxi.c ++++ b/drivers/spi/spi-sunxi.c +@@ -351,7 +351,7 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen, + priv->rx_buf = din; + + if (bitlen % 8) { +- debug("%s: non byte-aligned SPI transfer.\n", __func__); ++printf("%s: non byte-aligned SPI transfer.\n", __func__); + return -ENAVAIL; + } + +diff --git a/drivers/spi/sun4i_spi.c b/drivers/spi/sun4i_spi.c +index b86b5a00a..e53e2bd02 100644 +--- a/drivers/spi/sun4i_spi.c ++++ b/drivers/spi/sun4i_spi.c +@@ -315,7 +315,7 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen, + priv->rx_buf = din; + + if (bitlen % 8) { +- debug("%s: non byte-aligned SPI transfer.\n", __func__); ++printf("%s: non byte-aligned SPI transfer.\n", __func__); + return -ENAVAIL; + } + +diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c +index f0256d8e6..0f4a87e9b 100644 +--- a/drivers/spi/tegra114_spi.c ++++ b/drivers/spi/tegra114_spi.c +@@ -105,7 +105,7 @@ static int tegra114_spi_of_to_plat(struct udevice *bus) + plat->periph_id = clock_decode_periph_id(bus); + + if (plat->periph_id == PERIPH_ID_NONE) { +- debug("%s: could not decode periph id %d\n", __func__, ++printf("%s: could not decode periph id %d\n", __func__, + plat->periph_id); + return -FDT_ERR_NOTFOUND; + } +@@ -115,7 +115,7 @@ static int tegra114_spi_of_to_plat(struct udevice *bus) + 500000); + plat->deactivate_delay_us = dev_read_u32_default(bus, + "spi-deactivate-delay", 0); +- debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", ++printf("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->base, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); + +@@ -163,11 +163,11 @@ static int tegra114_spi_probe(struct udevice *bus) + SPI_FIFO_STS_TX_FIFO_EMPTY | + SPI_FIFO_STS_RX_FIFO_FULL | + SPI_FIFO_STS_RX_FIFO_EMPTY); +- debug("%s: FIFO STATUS = %08x\n", __func__, readl(®s->fifo_status)); ++printf("%s: FIFO STATUS = %08x\n", __func__, readl(®s->fifo_status)); + + setbits_le32(&priv->regs->command1, SPI_CMD1_M_S | SPI_CMD1_CS_SW_HW | + (priv->mode << SPI_CMD1_MODE_SHIFT) | SPI_CMD1_CS_SW_VAL); +- debug("%s: COMMAND1 = %08x\n", __func__, readl(®s->command1)); ++printf("%s: COMMAND1 = %08x\n", __func__, readl(®s->command1)); + + return 0; + } +@@ -214,7 +214,7 @@ static void spi_cs_deactivate(struct udevice *dev) + if (pdata->deactivate_delay_us) + priv->last_transaction_us = timer_get_us(); + +- debug("Deactivate CS, bus '%s'\n", bus->name); ++printf("Deactivate CS, bus '%s'\n", bus->name); + } + + static int tegra114_spi_xfer(struct udevice *dev, unsigned int bitlen, +@@ -230,7 +230,7 @@ static int tegra114_spi_xfer(struct udevice *dev, unsigned int bitlen, + int num_bytes; + int ret; + +- debug("%s: slave %u:%u dout %p din %p bitlen %u\n", ++printf("%s: slave %u:%u dout %p din %p bitlen %u\n", + __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen); + if (bitlen % 8) + return -1; +@@ -290,24 +290,24 @@ static int tegra114_spi_xfer(struct udevice *dev, unsigned int bitlen, + + fifo_status = readl(®s->fifo_status); + if (fifo_status & SPI_FIFO_STS_ERR) { +- debug("%s: got a fifo error: ", __func__); ++printf("%s: got a fifo error: ", __func__); + if (fifo_status & SPI_FIFO_STS_TX_FIFO_OVF) +- debug("tx FIFO overflow "); ++printf("tx FIFO overflow "); + if (fifo_status & SPI_FIFO_STS_TX_FIFO_UNR) +- debug("tx FIFO underrun "); ++printf("tx FIFO underrun "); + if (fifo_status & SPI_FIFO_STS_RX_FIFO_OVF) +- debug("rx FIFO overflow "); ++printf("rx FIFO overflow "); + if (fifo_status & SPI_FIFO_STS_RX_FIFO_UNR) +- debug("rx FIFO underrun "); ++printf("rx FIFO underrun "); + if (fifo_status & SPI_FIFO_STS_TX_FIFO_FULL) +- debug("tx FIFO full "); ++printf("tx FIFO full "); + if (fifo_status & SPI_FIFO_STS_TX_FIFO_EMPTY) +- debug("tx FIFO empty "); ++printf("tx FIFO empty "); + if (fifo_status & SPI_FIFO_STS_RX_FIFO_FULL) +- debug("rx FIFO full "); ++printf("rx FIFO full "); + if (fifo_status & SPI_FIFO_STS_RX_FIFO_EMPTY) +- debug("rx FIFO empty "); +- debug("\n"); ++printf("rx FIFO empty "); ++printf("\n"); + break; + } + +@@ -338,7 +338,7 @@ static int tegra114_spi_xfer(struct udevice *dev, unsigned int bitlen, + if (flags & SPI_XFER_END) + spi_cs_deactivate(dev); + +- debug("%s: transfer ended. Value=%08x, fifo_status = %08x\n", ++printf("%s: transfer ended. Value=%08x, fifo_status = %08x\n", + __func__, tmpdin, readl(®s->fifo_status)); + + if (ret) { +@@ -358,7 +358,7 @@ static int tegra114_spi_set_speed(struct udevice *bus, uint speed) + if (speed > plat->frequency) + speed = plat->frequency; + priv->freq = speed; +- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); ++printf("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; + } +@@ -368,7 +368,7 @@ static int tegra114_spi_set_mode(struct udevice *bus, uint mode) + struct tegra114_spi_priv *priv = dev_get_priv(bus); + + priv->mode = mode; +- debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); ++printf("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; + } +diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c +index 10e38cf83..7b20a843c 100644 +--- a/drivers/spi/tegra20_sflash.c ++++ b/drivers/spi/tegra20_sflash.c +@@ -98,7 +98,7 @@ static int tegra20_sflash_of_to_plat(struct udevice *bus) + plat->periph_id = clock_decode_periph_id(bus); + + if (plat->periph_id == PERIPH_ID_NONE) { +- debug("%s: could not decode periph id %d\n", __func__, ++printf("%s: could not decode periph id %d\n", __func__, + plat->periph_id); + return -FDT_ERR_NOTFOUND; + } +@@ -108,7 +108,7 @@ static int tegra20_sflash_of_to_plat(struct udevice *bus) + 500000); + plat->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); +- debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", ++printf("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->base, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); + +@@ -148,7 +148,7 @@ static int tegra20_sflash_claim_bus(struct udevice *dev) + reg = SPI_STAT_RDY | SPI_STAT_RXF_FLUSH | SPI_STAT_TXF_FLUSH | \ + SPI_STAT_RXF_UNR | SPI_STAT_TXF_OVF; + writel(reg, ®s->status); +- debug("%s: STATUS = %08x\n", __func__, readl(®s->status)); ++printf("%s: STATUS = %08x\n", __func__, readl(®s->status)); + + /* + * Use sw-controlled CS, so we can clock in data after ReadID, etc. +@@ -158,7 +158,7 @@ static int tegra20_sflash_claim_bus(struct udevice *dev) + reg |= 1 << SPI_CMD_ACTIVE_SCLK_SHIFT; + clrsetbits_le32(®s->command, SPI_CMD_ACTIVE_SCLK_MASK | + SPI_CMD_ACTIVE_SDA_MASK, SPI_CMD_CS_SOFT | reg); +- debug("%s: COMMAND = %08x\n", __func__, readl(®s->command)); ++printf("%s: COMMAND = %08x\n", __func__, readl(®s->command)); + + /* + * SPI pins on Tegra20 are muxed - change pinmux later due to UART +@@ -217,7 +217,7 @@ static int tegra20_sflash_xfer(struct udevice *dev, unsigned int bitlen, + int num_bytes; + int ret; + +- debug("%s: slave %u:%u dout %p din %p bitlen %u\n", ++printf("%s: slave %u:%u dout %p din %p bitlen %u\n", + __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen); + if (bitlen % 8) + return -1; +@@ -227,12 +227,12 @@ static int tegra20_sflash_xfer(struct udevice *dev, unsigned int bitlen, + + reg = readl(®s->status); + writel(reg, ®s->status); /* Clear all SPI events via R/W */ +- debug("spi_xfer entry: STATUS = %08x\n", reg); ++printf("spi_xfer entry: STATUS = %08x\n", reg); + + reg = readl(®s->command); + reg |= SPI_CMD_TXEN | SPI_CMD_RXEN; + writel(reg, ®s->command); +- debug("spi_xfer: COMMAND = %08x\n", readl(®s->command)); ++printf("spi_xfer: COMMAND = %08x\n", readl(®s->command)); + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(dev); +@@ -302,7 +302,7 @@ static int tegra20_sflash_xfer(struct udevice *dev, unsigned int bitlen, + if (flags & SPI_XFER_END) + spi_cs_deactivate(dev); + +- debug("spi_xfer: transfer ended. Value=%08x, status = %08x\n", ++printf("spi_xfer: transfer ended. Value=%08x, status = %08x\n", + tmpdin, readl(®s->status)); + + if (ret) { +@@ -321,7 +321,7 @@ static int tegra20_sflash_set_speed(struct udevice *bus, uint speed) + if (speed > plat->frequency) + speed = plat->frequency; + priv->freq = speed; +- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); ++printf("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; + } +@@ -331,7 +331,7 @@ static int tegra20_sflash_set_mode(struct udevice *bus, uint mode) + struct tegra20_sflash_priv *priv = dev_get_priv(bus); + + priv->mode = mode; +- debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); ++printf("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; + } +diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c +index 209ba8b0c..29bdb733a 100644 +--- a/drivers/spi/tegra20_slink.c ++++ b/drivers/spi/tegra20_slink.c +@@ -104,7 +104,7 @@ static int tegra30_spi_of_to_plat(struct udevice *bus) + plat->periph_id = clock_decode_periph_id(bus); + + if (plat->periph_id == PERIPH_ID_NONE) { +- debug("%s: could not decode periph id %d\n", __func__, ++printf("%s: could not decode periph id %d\n", __func__, + plat->periph_id); + return -FDT_ERR_NOTFOUND; + } +@@ -114,7 +114,7 @@ static int tegra30_spi_of_to_plat(struct udevice *bus) + 500000); + plat->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); +- debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", ++printf("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->base, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); + +@@ -154,13 +154,13 @@ static int tegra30_spi_claim_bus(struct udevice *dev) + reg = SLINK_STAT_RDY | SLINK_STAT_RXF_FLUSH | SLINK_STAT_TXF_FLUSH | \ + SLINK_STAT_RXF_UNR | SLINK_STAT_TXF_OVF; + writel(reg, ®s->status); +- debug("%s: STATUS = %08x\n", __func__, readl(®s->status)); ++printf("%s: STATUS = %08x\n", __func__, readl(®s->status)); + + /* Set master mode and sw controlled CS */ + reg = readl(®s->command); + reg |= SLINK_CMD_M_S | SLINK_CMD_CS_SOFT; + writel(reg, ®s->command); +- debug("%s: COMMAND = %08x\n", __func__, readl(®s->command)); ++printf("%s: COMMAND = %08x\n", __func__, readl(®s->command)); + + return 0; + } +@@ -211,7 +211,7 @@ static int tegra30_spi_xfer(struct udevice *dev, unsigned int bitlen, + int num_bytes; + int ret; + +- debug("%s: slave %u:%u dout %p din %p bitlen %u\n", ++printf("%s: slave %u:%u dout %p din %p bitlen %u\n", + __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen); + if (bitlen % 8) + return -1; +@@ -221,18 +221,18 @@ static int tegra30_spi_xfer(struct udevice *dev, unsigned int bitlen, + + reg = readl(®s->status); + writel(reg, ®s->status); /* Clear all SPI events via R/W */ +- debug("%s entry: STATUS = %08x\n", __func__, reg); ++printf("%s entry: STATUS = %08x\n", __func__, reg); + + reg = readl(®s->status2); + writel(reg, ®s->status2); /* Clear all STATUS2 events via R/W */ +- debug("%s entry: STATUS2 = %08x\n", __func__, reg); ++printf("%s entry: STATUS2 = %08x\n", __func__, reg); + +- debug("%s entry: COMMAND = %08x\n", __func__, readl(®s->command)); ++printf("%s entry: COMMAND = %08x\n", __func__, readl(®s->command)); + + clrsetbits_le32(®s->command2, SLINK_CMD2_SS_EN_MASK, + SLINK_CMD2_TXEN | SLINK_CMD2_RXEN | + (spi_chip_select(dev) << SLINK_CMD2_SS_EN_SHIFT)); +- debug("%s entry: COMMAND2 = %08x\n", __func__, readl(®s->command2)); ++printf("%s entry: COMMAND2 = %08x\n", __func__, readl(®s->command2)); + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(dev); +@@ -301,7 +301,7 @@ static int tegra30_spi_xfer(struct udevice *dev, unsigned int bitlen, + if (flags & SPI_XFER_END) + spi_cs_deactivate(dev); + +- debug("%s: transfer ended. Value=%08x, status = %08x\n", ++printf("%s: transfer ended. Value=%08x, status = %08x\n", + __func__, tmpdin, readl(®s->status)); + + if (ret) { +@@ -321,7 +321,7 @@ static int tegra30_spi_set_speed(struct udevice *bus, uint speed) + if (speed > plat->frequency) + speed = plat->frequency; + priv->freq = speed; +- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); ++printf("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; + } +@@ -347,7 +347,7 @@ static int tegra30_spi_set_mode(struct udevice *bus, uint mode) + writel(reg, ®s->command); + + priv->mode = mode; +- debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); ++printf("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; + } +diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c +index 5c8c1859c..10bdc4cff 100644 +--- a/drivers/spi/tegra210_qspi.c ++++ b/drivers/spi/tegra210_qspi.c +@@ -106,7 +106,7 @@ static int tegra210_qspi_of_to_plat(struct udevice *bus) + plat->periph_id = clock_decode_periph_id(bus); + + if (plat->periph_id == PERIPH_ID_NONE) { +- debug("%s: could not decode periph id %d\n", __func__, ++printf("%s: could not decode periph id %d\n", __func__, + plat->periph_id); + return -FDT_ERR_NOTFOUND; + } +@@ -117,7 +117,7 @@ static int tegra210_qspi_of_to_plat(struct udevice *bus) + plat->deactivate_delay_us = dev_read_u32_default(bus, + "spi-deactivate-delay", + 0); +- debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", ++printf("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->base, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); + +@@ -136,7 +136,7 @@ static int tegra210_qspi_probe(struct udevice *bus) + priv->freq = plat->frequency; + priv->periph_id = plat->periph_id; + +- debug("%s: Freq = %u, id = %d\n", __func__, priv->freq, ++printf("%s: Freq = %u, id = %d\n", __func__, priv->freq, + priv->periph_id); + /* Change SPI clock to correct frequency, PLLP_OUT0 source */ + clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq); +@@ -145,7 +145,7 @@ static int tegra210_qspi_probe(struct udevice *bus) + u32 reg = (0x09 << QSPI_CMD2_TX_CLK_TAP_DELAY_SHIFT) | + (0x0C << QSPI_CMD2_RX_CLK_TAP_DELAY_SHIFT); + writel(reg, ®s->command2); +- debug("%s: COMMAND2 = %08x\n", __func__, readl(®s->command2)); ++printf("%s: COMMAND2 = %08x\n", __func__, readl(®s->command2)); + + return 0; + } +@@ -156,12 +156,12 @@ static int tegra210_qspi_claim_bus(struct udevice *dev) + struct tegra210_qspi_priv *priv = dev_get_priv(bus); + struct qspi_regs *regs = priv->regs; + +- debug("%s: FIFO STATUS = %08x\n", __func__, readl(®s->fifo_status)); ++printf("%s: FIFO STATUS = %08x\n", __func__, readl(®s->fifo_status)); + + /* Set master mode and sw controlled CS */ + setbits_le32(®s->command1, QSPI_CMD1_M_S | QSPI_CMD1_CS_SW_HW | + (priv->mode << QSPI_CMD1_MODE_SHIFT)); +- debug("%s: COMMAND1 = %08x\n", __func__, readl(®s->command1)); ++printf("%s: COMMAND1 = %08x\n", __func__, readl(®s->command1)); + + return 0; + } +@@ -208,7 +208,7 @@ static void spi_cs_deactivate(struct udevice *dev) + if (pdata->deactivate_delay_us) + priv->last_transaction_us = timer_get_us(); + +- debug("Deactivate CS, bus '%s'\n", bus->name); ++printf("Deactivate CS, bus '%s'\n", bus->name); + } + + static int tegra210_qspi_xfer(struct udevice *dev, unsigned int bitlen, +@@ -223,7 +223,7 @@ static int tegra210_qspi_xfer(struct udevice *dev, unsigned int bitlen, + u8 *din = data_in; + int num_bytes, tm, ret; + +- debug("%s: slave %u:%u dout %p din %p bitlen %u\n", ++printf("%s: slave %u:%u dout %p din %p bitlen %u\n", + __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen); + if (bitlen % 8) + return -1; +@@ -325,24 +325,24 @@ static int tegra210_qspi_xfer(struct udevice *dev, unsigned int bitlen, + + fifo_status = readl(®s->fifo_status); + if (fifo_status & QSPI_FIFO_STS_ERR) { +- debug("%s: got a fifo error: ", __func__); ++printf("%s: got a fifo error: ", __func__); + if (fifo_status & QSPI_FIFO_STS_TX_FIFO_OVF) +- debug("tx FIFO overflow "); ++printf("tx FIFO overflow "); + if (fifo_status & QSPI_FIFO_STS_TX_FIFO_UNR) +- debug("tx FIFO underrun "); ++printf("tx FIFO underrun "); + if (fifo_status & QSPI_FIFO_STS_RX_FIFO_OVF) +- debug("rx FIFO overflow "); ++printf("rx FIFO overflow "); + if (fifo_status & QSPI_FIFO_STS_RX_FIFO_UNR) +- debug("rx FIFO underrun "); ++printf("rx FIFO underrun "); + if (fifo_status & QSPI_FIFO_STS_TX_FIFO_FULL) +- debug("tx FIFO full "); ++printf("tx FIFO full "); + if (fifo_status & QSPI_FIFO_STS_TX_FIFO_EMPTY) +- debug("tx FIFO empty "); ++printf("tx FIFO empty "); + if (fifo_status & QSPI_FIFO_STS_RX_FIFO_FULL) +- debug("rx FIFO full "); ++printf("rx FIFO full "); + if (fifo_status & QSPI_FIFO_STS_RX_FIFO_EMPTY) +- debug("rx FIFO empty "); +- debug("\n"); ++printf("rx FIFO empty "); ++printf("\n"); + break; + } + +@@ -367,7 +367,7 @@ static int tegra210_qspi_xfer(struct udevice *dev, unsigned int bitlen, + if (flags & SPI_XFER_END) + spi_cs_deactivate(dev); + +- debug("%s: transfer ended. Value=%08x, fifo_status = %08x\n", ++printf("%s: transfer ended. Value=%08x, fifo_status = %08x\n", + __func__, tmpdin, readl(®s->fifo_status)); + + if (ret) { +@@ -387,7 +387,7 @@ static int tegra210_qspi_set_speed(struct udevice *bus, uint speed) + if (speed > plat->frequency) + speed = plat->frequency; + priv->freq = speed; +- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); ++printf("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; + } +@@ -397,7 +397,7 @@ static int tegra210_qspi_set_mode(struct udevice *bus, uint mode) + struct tegra210_qspi_priv *priv = dev_get_priv(bus); + + priv->mode = mode; +- debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); ++printf("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; + } +diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c +index c542f40c7..80e883fe7 100644 +--- a/drivers/spi/ti_qspi.c ++++ b/drivers/spi/ti_qspi.c +@@ -122,7 +122,7 @@ static int ti_qspi_set_speed(struct udevice *bus, uint hz) + if (clk_div > QSPI_CLK_DIV_MAX) + clk_div = QSPI_CLK_DIV_MAX; + +- debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div); ++printf("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div); + + /* disable SCLK */ + writel(readl(&priv->base->clk_ctrl) & ~QSPI_CLK_EN, +@@ -169,7 +169,7 @@ static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, + priv = dev_get_priv(bus); + + if (cs > priv->num_cs) { +- debug("invalid qspi chip select\n"); ++printf("invalid qspi chip select\n"); + return -EINVAL; + } + +@@ -177,7 +177,7 @@ static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, + return -1; + + if (bitlen % 8) { +- debug("spi_xfer: Non byte aligned SPI transfer\n"); ++printf("spi_xfer: Non byte aligned SPI transfer\n"); + return -1; + } + +@@ -214,7 +214,7 @@ static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, + writeb(*txp, &priv->base->data); + xfer_len = 1; + } +- debug("tx cmd %08x dc %08x\n", ++printf("tx cmd %08x dc %08x\n", + cmd | QSPI_WR_SNGL, priv->dc); + writel(cmd | QSPI_WR_SNGL, &priv->base->cmd); + status = readl(&priv->base->status); +@@ -227,10 +227,10 @@ static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, + status = readl(&priv->base->status); + } + txp += xfer_len; +- debug("tx done, status %08x\n", status); ++printf("tx done, status %08x\n", status); + } + if (rxp) { +- debug("rx cmd %08x dc %08x\n", ++printf("rx cmd %08x dc %08x\n", + ((u32)(priv->cmd | QSPI_RD_SNGL)), priv->dc); + writel(priv->cmd | QSPI_RD_SNGL, &priv->base->cmd); + status = readl(&priv->base->status); +@@ -244,7 +244,7 @@ static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, + } + *rxp++ = readl(&priv->base->data); + xfer_len = 1; +- debug("rx done, status %08x, read %02x\n", ++printf("rx done, status %08x, read %02x\n", + status, *(rxp-1)); + } + words -= xfer_len; +@@ -364,7 +364,7 @@ static int ti_qspi_claim_bus(struct udevice *dev) + priv = dev_get_priv(bus); + + if (slave_plat->cs > priv->num_cs) { +- debug("invalid qspi chip select\n"); ++printf("invalid qspi chip select\n"); + return -EINVAL; + } + +@@ -425,14 +425,14 @@ static void *map_syscon_chipselects(struct udevice *bus) + err = uclass_get_device_by_phandle(UCLASS_SYSCON, bus, + "syscon-chipselects", &syscon); + if (err) { +- debug("%s: unable to find syscon device (%d)\n", __func__, ++printf("%s: unable to find syscon device (%d)\n", __func__, + err); + return NULL; + } + + regmap = syscon_get_regmap(syscon); + if (IS_ERR(regmap)) { +- debug("%s: unable to find regmap (%ld)\n", __func__, ++printf("%s: unable to find regmap (%ld)\n", __func__, + PTR_ERR(regmap)); + return NULL; + } +@@ -440,7 +440,7 @@ static void *map_syscon_chipselects(struct udevice *bus) + cell = fdt_getprop(gd->fdt_blob, dev_of_offset(bus), + "syscon-chipselects", &len); + if (len < 2*sizeof(fdt32_t)) { +- debug("%s: offset not available\n", __func__); ++printf("%s: offset not available\n", __func__); + return NULL; + } + +@@ -470,12 +470,12 @@ static int ti_qspi_of_to_plat(struct udevice *bus) + + priv->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); + if (!priv->max_hz) { +- debug("Error: Max frequency missing\n"); ++printf("Error: Max frequency missing\n"); + return -ENODEV; + } + priv->num_cs = fdtdec_get_int(blob, node, "num-cs", 4); + +- debug("%s: regs=<0x%x>, max-frequency=%d\n", __func__, ++printf("%s: regs=<0x%x>, max-frequency=%d\n", __func__, + (int)priv->base, priv->max_hz); + + return 0; +diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c +index b892cdae9..d886f4187 100644 +--- a/drivers/spi/xilinx_spi.c ++++ b/drivers/spi/xilinx_spi.c +@@ -175,7 +175,7 @@ static u32 xilinx_spi_fill_txfifo(struct udevice *bus, const u8 *txp, + while (txbytes && !(readl(®s->spisr) & SPISR_TX_FULL) && + i < priv->fifo_depth) { + d = txp ? *txp++ : XILINX_SPI_IDLE_VAL; +- debug("spi_xfer: tx:%x ", d); ++printf("spi_xfer: tx:%x ", d); + /* write out and wait for processing (receive data) */ + writel(d & SPIDTR_8BIT_MASK, ®s->spidtr); + txbytes--; +@@ -196,11 +196,11 @@ static u32 xilinx_spi_read_rxfifo(struct udevice *bus, u8 *rxp, u32 rxbytes) + d = readl(®s->spidrr) & SPIDRR_8BIT_MASK; + if (rxp) + *rxp++ = d; +- debug("spi_xfer: rx:%x\n", d); ++printf("spi_xfer: rx:%x\n", d); + rxbytes--; + i++; + } +- debug("Rx_done\n"); ++printf("Rx_done\n"); + + return i; + } +@@ -254,7 +254,7 @@ static int xilinx_spi_xfer(struct udevice *dev, unsigned int bitlen, + u32 reg, count; + int ret; + +- debug("spi_xfer: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", ++printf("spi_xfer: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", + dev_seq(bus), slave_plat->cs, bitlen, bytes, flags); + + if (bitlen == 0) +@@ -293,12 +293,12 @@ static int xilinx_spi_xfer(struct udevice *dev, unsigned int bitlen, + return ret; + } + +- debug("txbytes:0x%x,txp:0x%p\n", txbytes, txp); ++printf("txbytes:0x%x,txp:0x%p\n", txbytes, txp); + count = xilinx_spi_read_rxfifo(bus, rxp, rxbytes); + rxbytes -= count; + if (rxp) + rxp += count; +- debug("rxbytes:0x%x rxp:0x%p\n", rxbytes, rxp); ++printf("rxbytes:0x%x rxp:0x%p\n", rxbytes, rxp); + } + + done: +@@ -314,7 +314,7 @@ static int xilinx_spi_set_speed(struct udevice *bus, uint speed) + + priv->freq = speed; + +- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); ++printf("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; + } +@@ -338,7 +338,7 @@ static int xilinx_spi_set_mode(struct udevice *bus, uint mode) + writel(spicr, ®s->spicr); + priv->mode = mode; + +- debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); ++printf("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; + } +diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c +index cf6da5340..e7c644cdf 100644 +--- a/drivers/spi/zynq_qspi.c ++++ b/drivers/spi/zynq_qspi.c +@@ -205,7 +205,7 @@ static int zynq_qspi_probe(struct udevice *bus) + plat->frequency = clock; + plat->speed_hz = plat->frequency / 2; + +- debug("%s: max-frequency=%d\n", __func__, plat->speed_hz); ++printf("%s: max-frequency=%d\n", __func__, plat->speed_hz); + + return 0; + } +@@ -220,7 +220,7 @@ static void zynq_qspi_read_data(struct zynq_qspi_priv *priv, u32 data, u8 size) + { + u8 byte3; + +- debug("%s: data 0x%04x rx_buf addr: 0x%08x size %d\n", __func__ , ++printf("%s: data 0x%04x rx_buf addr: 0x%08x size %d\n", __func__ , + data, (unsigned)(priv->rx_buf), size); + + if (priv->rx_buf) { +@@ -296,7 +296,7 @@ static void zynq_qspi_write_data(struct zynq_qspi_priv *priv, + *data = 0; + } + +- debug("%s: data 0x%08x tx_buf addr: 0x%08x size %d\n", __func__, ++printf("%s: data 0x%08x tx_buf addr: 0x%08x size %d\n", __func__, + *data, (u32)priv->tx_buf, size); + + priv->bytes_to_transfer -= size; +@@ -471,7 +471,7 @@ static int zynq_qspi_start_transfer(struct zynq_qspi_priv *priv) + u32 data = 0; + struct zynq_qspi_regs *regs = priv->regs; + +- debug("%s: qspi: 0x%08x transfer: 0x%08x len: %d\n", __func__, ++printf("%s: qspi: 0x%08x transfer: 0x%08x len: %d\n", __func__, + (u32)priv, (u32)priv, priv->len); + + priv->bytes_to_transfer = priv->len; +@@ -518,7 +518,7 @@ static int zynq_qspi_transfer(struct zynq_qspi_priv *priv) + if (status != priv->len) { + if (status > 0) + status = -EMSGSIZE; +- debug("zynq_qspi_transfer:%d len:%d\n", ++printf("zynq_qspi_transfer:%d len:%d\n", + status, priv->len); + break; + } +@@ -568,7 +568,7 @@ static int zynq_qspi_xfer(struct udevice *dev, unsigned int bitlen, + priv->rx_buf = din; + priv->len = bitlen / 8; + +- debug("zynq_qspi_xfer: bus:%i cs:%i bitlen:%i len:%i flags:%lx\n", ++printf("zynq_qspi_xfer: bus:%i cs:%i bitlen:%i len:%i flags:%lx\n", + dev_seq(bus), slave_plat->cs, bitlen, priv->len, flags); + + /* +@@ -621,7 +621,7 @@ static int zynq_qspi_set_speed(struct udevice *bus, uint speed) + writel(confr, ®s->cr); + priv->freq = speed; + +- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); ++printf("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; + } +@@ -644,7 +644,7 @@ static int zynq_qspi_set_mode(struct udevice *bus, uint mode) + writel(confr, ®s->cr); + priv->mode = mode; + +- debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); ++printf("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; + } +diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c +index b3e0858eb..3f91ba51d 100644 +--- a/drivers/spi/zynq_spi.c ++++ b/drivers/spi/zynq_spi.c +@@ -155,7 +155,7 @@ static int zynq_spi_probe(struct udevice *bus) + plat->frequency = clock; + plat->speed_hz = plat->frequency / 2; + +- debug("%s: max-frequency=%d\n", __func__, plat->speed_hz); ++printf("%s: max-frequency=%d\n", __func__, plat->speed_hz); + + return 0; + } +@@ -242,11 +242,11 @@ static int zynq_spi_xfer(struct udevice *dev, unsigned int bitlen, + u8 *rx_buf = din, buf; + u32 ts, status; + +- debug("spi_xfer: bus:%i cs:%i bitlen:%i len:%i flags:%lx\n", ++printf("spi_xfer: bus:%i cs:%i bitlen:%i len:%i flags:%lx\n", + dev_seq(bus), slave_plat->cs, bitlen, len, flags); + + if (bitlen % 8) { +- debug("spi_xfer: Non byte aligned SPI transfer\n"); ++printf("spi_xfer: Non byte aligned SPI transfer\n"); + return -1; + } + +@@ -324,7 +324,7 @@ static int zynq_spi_set_speed(struct udevice *bus, uint speed) + writel(confr, ®s->cr); + priv->freq = speed; + +- debug("zynq_spi_set_speed: regs=%p, speed=%d\n", ++printf("zynq_spi_set_speed: regs=%p, speed=%d\n", + priv->regs, priv->freq); + + return 0; +@@ -348,7 +348,7 @@ static int zynq_spi_set_mode(struct udevice *bus, uint mode) + writel(confr, ®s->cr); + priv->mode = mode; + +- debug("zynq_spi_set_mode: regs=%p, mode=%d\n", priv->regs, priv->mode); ++printf("zynq_spi_set_mode: regs=%p, mode=%d\n", priv->regs, priv->mode); + + return 0; + } +diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c +index fc81b0734..4b52dfe42 100644 +--- a/drivers/spi/zynqmp_gqspi.c ++++ b/drivers/spi/zynqmp_gqspi.c +@@ -178,7 +178,7 @@ static int zynqmp_qspi_of_to_plat(struct udevice *bus) + { + struct zynqmp_qspi_plat *plat = dev_get_plat(bus); + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + plat->regs = (struct zynqmp_qspi_regs *)(dev_read_addr(bus) + + GQSPI_REG_OFFSET); +@@ -230,7 +230,7 @@ static u32 zynqmp_qspi_genfifo_mode(u8 buswidth) + case 4: + return GQSPI_SPI_MODE_QSPI; + default: +- debug("Unsupported bus width %u\n", buswidth); ++printf("Unsupported bus width %u\n", buswidth); + return GQSPI_SPI_MODE_SPI; + } + } +@@ -274,7 +274,7 @@ static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv *priv, int is_on) + gqspi_fifo_reg |= GQSPI_IMD_DATA_CS_DEASSERT; + } + +- debug("GFIFO_CMD_CS: 0x%x\n", gqspi_fifo_reg); ++printf("GFIFO_CMD_CS: 0x%x\n", gqspi_fifo_reg); + + /* Dummy generic FIFO entry */ + zynqmp_qspi_fill_gen_fifo(priv, 0); +@@ -293,7 +293,7 @@ void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval) + clk_rate = plat->frequency; + reqhz = (clk_rate / (GQSPI_BAUD_DIV_SHIFT << baudrateval)); + +- debug("%s, req_hz:%d, clk_rate:%d, baudrateval:%d\n", ++printf("%s, req_hz:%d, clk_rate:%d, baudrateval:%d\n", + __func__, reqhz, clk_rate, baudrateval); + + if (reqhz < GQSPI_FREQ_40MHZ) { +@@ -330,7 +330,7 @@ static int zynqmp_qspi_set_speed(struct udevice *bus, uint speed) + u32 confr; + u8 baud_rate_val = 0; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + if (speed > plat->frequency) + speed = plat->frequency; + +@@ -353,7 +353,7 @@ static int zynqmp_qspi_set_speed(struct udevice *bus, uint speed) + writel(confr, ®s->confr); + zynqmp_qspi_set_tapdelay(bus, baud_rate_val); + +- debug("regs=%p, speed=%d\n", priv->regs, plat->speed_hz); ++printf("regs=%p, speed=%d\n", priv->regs, plat->speed_hz); + } + + return 0; +@@ -367,7 +367,7 @@ static int zynqmp_qspi_probe(struct udevice *bus) + unsigned long clock; + int ret; + +- debug("%s: bus:%p, priv:%p\n", __func__, bus, priv); ++printf("%s: bus:%p, priv:%p\n", __func__, bus, priv); + + priv->regs = plat->regs; + priv->dma_regs = plat->dma_regs; +@@ -383,7 +383,7 @@ static int zynqmp_qspi_probe(struct udevice *bus) + dev_err(bus, "failed to get rate\n"); + return clock; + } +- debug("%s: CLK %ld\n", __func__, clock); ++printf("%s: CLK %ld\n", __func__, clock); + + ret = clk_enable(&clk); + if (ret) { +@@ -405,7 +405,7 @@ static int zynqmp_qspi_set_mode(struct udevice *bus, uint mode) + struct zynqmp_qspi_regs *regs = priv->regs; + u32 confr; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + /* Set the SPI Clock phase and polarities */ + confr = readl(®s->confr); + confr &= ~(GQSPI_CONFIG_CPHA_MASK | +@@ -429,7 +429,7 @@ static int zynqmp_qspi_fill_tx_fifo(struct zynqmp_qspi_priv *priv, u32 size) + u32 *buf = (u32 *)priv->tx_buf; + u32 len = size; + +- debug("TxFIFO: 0x%x, size: 0x%x\n", readl(®s->isr), ++printf("TxFIFO: 0x%x, size: 0x%x\n", readl(®s->isr), + size); + + while (size) { +@@ -493,7 +493,7 @@ static void zynqmp_qspi_genfifo_cmd(struct zynqmp_qspi_priv *priv) + gen_fifo_cmd |= GQSPI_GFIFO_TX; + gen_fifo_cmd |= addr; + +- debug("GFIFO_CMD_Cmd = 0x%x\n", gen_fifo_cmd); ++printf("GFIFO_CMD_Cmd = 0x%x\n", gen_fifo_cmd); + + zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); + } +@@ -553,7 +553,7 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv) + len = zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); + zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); + +- debug("GFIFO_CMD_TX:0x%x\n", gen_fifo_cmd); ++printf("GFIFO_CMD_TX:0x%x\n", gen_fifo_cmd); + + if (gen_fifo_cmd & GQSPI_GFIFO_EXP_MASK) + ret = zynqmp_qspi_fill_tx_fifo(priv, +@@ -593,7 +593,7 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, + } + zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd); + +- debug("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); ++printf("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); + } + + ret = wait_for_bit_le32(&dma_regs->dmaisr, GQSPI_DMA_DST_I_STS_DONE, +@@ -605,7 +605,7 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, + + writel(GQSPI_DMA_DST_I_STS_DONE, &dma_regs->dmaisr); + +- debug("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", ++printf("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", + (unsigned long)buf, (unsigned long)priv->rx_buf, *buf, + actuallen); + +diff --git a/drivers/sysinfo/gazerbeam.c b/drivers/sysinfo/gazerbeam.c +index c1fae6ccf..ef0d2ef94 100644 +--- a/drivers/sysinfo/gazerbeam.c ++++ b/drivers/sysinfo/gazerbeam.c +@@ -68,13 +68,13 @@ static int _read_sysinfo_variant_data(struct udevice *dev) + + res = uclass_get_device_by_seq(UCLASS_I2C, I2C_BUS_SEQ_NO, &i2c_bus); + if (res) { +- debug("%s: Could not get I2C bus %d (err = %d)\n", ++printf("%s: Could not get I2C bus %d (err = %d)\n", + dev->name, I2C_BUS_SEQ_NO, res); + return res; + } + + if (!i2c_bus) { +- debug("%s: Could not get I2C bus %d\n", ++printf("%s: Could not get I2C bus %d\n", + dev->name, I2C_BUS_SEQ_NO); + return -EIO; + } +@@ -83,7 +83,7 @@ static int _read_sysinfo_variant_data(struct udevice *dev) + mc4 = !dm_i2c_probe(i2c_bus, MC4_EXPANDER_ADDR, 0, &dummy); + + if (mc2_sc && mc4) { +- debug("%s: Board hardware configuration inconsistent.\n", ++printf("%s: Board hardware configuration inconsistent.\n", + dev->name); + return -EINVAL; + } +@@ -94,14 +94,14 @@ static int _read_sysinfo_variant_data(struct udevice *dev) + ARRAY_SIZE(priv->var_gpios), + GPIOD_IS_IN); + if (gpio_num < 0) { +- debug("%s: Requesting gpio list %s failed (err = %d).\n", ++printf("%s: Requesting gpio list %s failed (err = %d).\n", + dev->name, listname, gpio_num); + return gpio_num; + } + + sc = dm_gpio_get_value(&priv->var_gpios[SC_GPIO_NO]); + if (sc < 0) { +- debug("%s: Error while reading 'sc' GPIO (err = %d)", ++printf("%s: Error while reading 'sc' GPIO (err = %d)", + dev->name, sc); + return sc; + } +@@ -109,14 +109,14 @@ static int _read_sysinfo_variant_data(struct udevice *dev) + mc2 = mc2_sc ? (sc ? 0 : 1) : 0; + + if ((sc && mc2) || (sc && mc4) || (!sc && !mc2 && !mc4)) { +- debug("%s: Board hardware configuration inconsistent.\n", ++printf("%s: Board hardware configuration inconsistent.\n", + dev->name); + return -EINVAL; + } + + con = dm_gpio_get_value(&priv->var_gpios[CON_GPIO_NO]); + if (con < 0) { +- debug("%s: Error while reading 'con' GPIO (err = %d)", ++printf("%s: Error while reading 'con' GPIO (err = %d)", + dev->name, con); + return con; + } +@@ -147,7 +147,7 @@ static int _read_hwversion(struct udevice *dev) + ARRAY_SIZE(priv->ver_gpios), + GPIOD_IS_IN); + if (res < 0) { +- debug("%s: Error getting GPIO list 'ver-gpios' (err = %d)\n", ++printf("%s: Error getting GPIO list 'ver-gpios' (err = %d)\n", + dev->name, res); + return -ENODEV; + } +@@ -155,7 +155,7 @@ static int _read_hwversion(struct udevice *dev) + res = dm_gpio_get_values_as_int(priv->ver_gpios, + ARRAY_SIZE(priv->ver_gpios)); + if (res < 0) { +- debug("%s: Error reading HW version from expander (err = %d)\n", ++printf("%s: Error reading HW version from expander (err = %d)\n", + dev->name, res); + return res; + } +@@ -164,7 +164,7 @@ static int _read_hwversion(struct udevice *dev) + + res = gpio_free_list(dev, priv->ver_gpios, ARRAY_SIZE(priv->ver_gpios)); + if (res < 0) { +- debug("%s: Error freeing HW version GPIO list (err = %d)\n", ++printf("%s: Error freeing HW version GPIO list (err = %d)\n", + dev->name, res); + return res; + } +@@ -178,14 +178,14 @@ static int sysinfo_gazerbeam_detect(struct udevice *dev) + + res = _read_sysinfo_variant_data(dev); + if (res) { +- debug("%s: Error reading multichannel variant (err = %d)\n", ++printf("%s: Error reading multichannel variant (err = %d)\n", + dev->name, res); + return res; + } + + res = _read_hwversion(dev); + if (res) { +- debug("%s: Error reading hardware version (err = %d)\n", ++printf("%s: Error reading hardware version (err = %d)\n", + dev->name, res); + return res; + } +@@ -208,7 +208,7 @@ static int sysinfo_gazerbeam_get_int(struct udevice *dev, int id, int *val) + *val = priv->hwversion; + break; + default: +- debug("%s: Integer value %d unknown\n", dev->name, id); ++printf("%s: Integer value %d unknown\n", dev->name, id); + return -EINVAL; + } + +@@ -236,7 +236,7 @@ static int sysinfo_gazerbeam_probe(struct udevice *dev) + GPIOD_IS_OUT); + + if (gpio_num < 0) { +- debug("%s: Error getting GPIO list 'reset-gpios' (err = %d)\n", ++printf("%s: Error getting GPIO list 'reset-gpios' (err = %d)\n", + dev->name, gpio_num); + return gpio_num; + } +@@ -246,7 +246,7 @@ static int sysinfo_gazerbeam_probe(struct udevice *dev) + int res = dm_gpio_set_value(&priv->reset_gpios[i], 0); + + if (res) { +- debug("%s: Error while setting GPIO %d (err = %d)\n", ++printf("%s: Error while setting GPIO %d (err = %d)\n", + dev->name, i, res); + return res; + } +diff --git a/drivers/sysreset/poweroff_gpio.c b/drivers/sysreset/poweroff_gpio.c +index a5c24fd85..7dedacdd6 100644 +--- a/drivers/sysreset/poweroff_gpio.c ++++ b/drivers/sysreset/poweroff_gpio.c +@@ -35,7 +35,7 @@ static int poweroff_gpio_request(struct udevice *dev, enum sysreset_t type) + if (type != SYSRESET_POWER_OFF) + return -ENOSYS; + +- debug("GPIO poweroff\n"); ++printf("GPIO poweroff\n"); + + /* drive it active, also inactive->active edge */ + r = dm_gpio_set_value(&priv->gpio, 1); +diff --git a/drivers/sysreset/sysreset-ti-sci.c b/drivers/sysreset/sysreset-ti-sci.c +index 81bfd67ad..954267b65 100644 +--- a/drivers/sysreset/sysreset-ti-sci.c ++++ b/drivers/sysreset/sysreset-ti-sci.c +@@ -27,7 +27,7 @@ static int ti_sci_sysreset_probe(struct udevice *dev) + { + struct ti_sci_sysreset_data *data = dev_get_priv(dev); + +- debug("%s(dev=%p)\n", __func__, dev); ++printf("%s(dev=%p)\n", __func__, dev); + + if (!data) + return -ENOMEM; +@@ -47,7 +47,7 @@ static int ti_sci_sysreset_request(struct udevice *dev, enum sysreset_t type) + const struct ti_sci_core_ops *cops = &sci->ops.core_ops; + int ret; + +- debug("%s(dev=%p, type=%d)\n", __func__, dev, type); ++printf("%s(dev=%p, type=%d)\n", __func__, dev, type); + + ret = cops->reboot_device(sci); + if (ret) +diff --git a/drivers/sysreset/sysreset_ast.c b/drivers/sysreset/sysreset_ast.c +index d747ed00a..c484067f6 100644 +--- a/drivers/sysreset/sysreset_ast.c ++++ b/drivers/sysreset/sysreset_ast.c +@@ -37,7 +37,7 @@ static int ast_sysreset_request(struct udevice *dev, enum sysreset_t type) + #if !defined(CONFIG_SPL_BUILD) + ret = wdt_expire_now(wdt, reset_mode); + if (ret) { +- debug("Sysreset failed: %d", ret); ++printf("Sysreset failed: %d", ret); + return ret; + } + #else +diff --git a/drivers/sysreset/sysreset_gpio.c b/drivers/sysreset/sysreset_gpio.c +index 680b759eb..9feff0be5 100644 +--- a/drivers/sysreset/sysreset_gpio.c ++++ b/drivers/sysreset/sysreset_gpio.c +@@ -23,7 +23,7 @@ static int gpio_reboot_request(struct udevice *dev, enum sysreset_t type) + * in output fifo. Or you can append udelay(); to get enough time + * to HW to emit output fifo. + */ +- debug("GPIO reset\n"); ++printf("GPIO reset\n"); + + /* Writing 1 respects polarity (active high/low) based on gpio->flags */ + return dm_gpio_set_value(&priv->gpio, 1); +diff --git a/drivers/sysreset/sysreset_mpc83xx.c b/drivers/sysreset/sysreset_mpc83xx.c +index 81fccf957..3f899c387 100644 +--- a/drivers/sysreset/sysreset_mpc83xx.c ++++ b/drivers/sysreset/sysreset_mpc83xx.c +@@ -48,7 +48,7 @@ static int __do_reset(void) + res = wait_for_bit_be32(&immap->reset.rcer, RCER_CRE, true, + RESET_WAIT_TIMEOUT, false); + if (res) { +- debug("%s: Timed out waiting for reset control to be set\n", ++printf("%s: Timed out waiting for reset control to be set\n", + __func__); + return res; + } +@@ -156,7 +156,7 @@ static int mpc83xx_sysreset_get_status(struct udevice *dev, char *buf, int size) + + res = snprintf(buf, size, "Reset Status:"); + if (res < 0) { +- debug("%s: Could not write reset status message (err = %d)\n", ++printf("%s: Could not write reset status message (err = %d)\n", + dev->name, res); + return -EIO; + } +@@ -171,7 +171,7 @@ static int mpc83xx_sysreset_get_status(struct udevice *dev, char *buf, int size) + res = snprintf(buf, size, "%s%s%s", sep, bits[i].desc, + (i == ARRAY_SIZE(bits) - 1) ? "\n" : ""); + if (res < 0) { +- debug("%s: Could not write reset status message (err = %d)\n", ++printf("%s: Could not write reset status message (err = %d)\n", + dev->name, res); + return -EIO; + } +@@ -192,7 +192,7 @@ static int mpc83xx_sysreset_get_status(struct udevice *dev, char *buf, int size) + */ + res = print_83xx_arb_event(rsr & RSR_BMRS, buf, size); + if (res < 0) { +- debug("%s: Could not write arbiter event message (err = %d)\n", ++printf("%s: Could not write arbiter event message (err = %d)\n", + dev->name, res); + return -EIO; + } +diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c +index 73dbb22ba..83dcc99b2 100644 +--- a/drivers/tee/optee/core.c ++++ b/drivers/tee/optee/core.c +@@ -591,10 +591,10 @@ static optee_invoke_fn *get_invoke_func(struct udevice *dev) + { + const char *method; + +- debug("optee: looking for conduit method in DT.\n"); ++printf("optee: looking for conduit method in DT.\n"); + method = ofnode_get_property(dev_ofnode(dev), "method", NULL); + if (!method) { +- debug("optee: missing \"method\" property\n"); ++printf("optee: missing \"method\" property\n"); + return ERR_PTR(-ENXIO); + } + +@@ -603,7 +603,7 @@ static optee_invoke_fn *get_invoke_func(struct udevice *dev) + else if (!strcmp("smc", method)) + return optee_smccc_smc; + +- debug("optee: invalid \"method\" property: %s\n", method); ++printf("optee: invalid \"method\" property: %s\n", method); + return ERR_PTR(-EINVAL); + } + +diff --git a/drivers/tee/optee/optee_private.h b/drivers/tee/optee/optee_private.h +index 1f07a27ee..a96d1eec7 100644 +--- a/drivers/tee/optee/optee_private.h ++++ b/drivers/tee/optee/optee_private.h +@@ -51,7 +51,7 @@ void optee_suppl_rpmb_release(struct udevice *dev); + static inline void optee_suppl_cmd_rpmb(struct udevice *dev, + struct optee_msg_arg *arg) + { +- debug("OPTEE_MSG_RPC_CMD_RPMB not implemented\n"); ++printf("OPTEE_MSG_RPC_CMD_RPMB not implemented\n"); + arg->ret = TEE_ERROR_NOT_IMPLEMENTED; + } + +@@ -72,7 +72,7 @@ void optee_suppl_cmd_i2c_transfer(struct optee_msg_arg *arg); + #else + static inline void optee_suppl_cmd_i2c_transfer(struct optee_msg_arg *arg) + { +- debug("OPTEE_MSG_RPC_CMD_I2C_TRANSFER not implemented\n"); ++printf("OPTEE_MSG_RPC_CMD_I2C_TRANSFER not implemented\n"); + arg->ret = TEE_ERROR_NOT_IMPLEMENTED; + } + #endif +diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c +index 0804fc963..ff061a9b5 100644 +--- a/drivers/tee/optee/rpmb.c ++++ b/drivers/tee/optee/rpmb.c +@@ -51,7 +51,7 @@ static void release_mmc(struct optee_private *priv) + rc = blk_select_hwpart_devnum(IF_TYPE_MMC, priv->rpmb_dev_id, + priv->rpmb_original_part); + if (rc) +- debug("%s: blk_select_hwpart_devnum() failed: %d\n", ++printf("%s: blk_select_hwpart_devnum() failed: %d\n", + __func__, rc); + + priv->rpmb_mmc = NULL; +@@ -69,15 +69,15 @@ static struct mmc *get_mmc(struct optee_private *priv, int dev_id) + + mmc = find_mmc_device(dev_id); + if (!mmc) { +- debug("Cannot find RPMB device\n"); ++printf("Cannot find RPMB device\n"); + return NULL; + } + if (!(mmc->version & MMC_VERSION_MMC)) { +- debug("Device id %d is not an eMMC device\n", dev_id); ++printf("Device id %d is not an eMMC device\n", dev_id); + return NULL; + } + if (mmc->version < MMC_VERSION_4_41) { +- debug("Device id %d: RPMB not supported before version 4.41\n", ++printf("Device id %d: RPMB not supported before version 4.41\n", + dev_id); + return NULL; + } +@@ -86,7 +86,7 @@ static struct mmc *get_mmc(struct optee_private *priv, int dev_id) + + rc = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_id, MMC_PART_RPMB); + if (rc) { +- debug("Device id %d: cannot select RPMB partition: %d\n", ++printf("Device id %d: cannot select RPMB partition: %d\n", + dev_id, rc); + return NULL; + } +@@ -140,13 +140,13 @@ static u32 rpmb_process_request(struct optee_private *priv, void *req, + case RPMB_CMD_GET_DEV_INFO: + if (req_size != sizeof(struct rpmb_req) || + rsp_size != sizeof(struct rpmb_dev_info)) { +- debug("Invalid req/rsp size\n"); ++printf("Invalid req/rsp size\n"); + return TEE_ERROR_BAD_PARAMETERS; + } + return rpmb_get_dev_info(sreq->dev_id, rsp); + + default: +- debug("Unsupported RPMB command: %d\n", sreq->cmd); ++printf("Unsupported RPMB command: %d\n", sreq->cmd); + return TEE_ERROR_BAD_PARAMETERS; + } + } +diff --git a/drivers/tee/optee/supplicant.c b/drivers/tee/optee/supplicant.c +index f9dd874b5..ce828a307 100644 +--- a/drivers/tee/optee/supplicant.c ++++ b/drivers/tee/optee/supplicant.c +@@ -83,7 +83,7 @@ void optee_suppl_cmd(struct udevice *dev, struct tee_shm *shm_arg, + cmd_shm_free(arg); + break; + case OPTEE_MSG_RPC_CMD_FS: +- debug("REE FS storage isn't available\n"); ++printf("REE FS storage isn't available\n"); + arg->ret = TEE_ERROR_STORAGE_NOT_AVAILABLE; + break; + case OPTEE_MSG_RPC_CMD_RPMB: +diff --git a/drivers/tee/tee-uclass.c b/drivers/tee/tee-uclass.c +index 2cc6b6c40..79d8b5186 100644 +--- a/drivers/tee/tee-uclass.c ++++ b/drivers/tee/tee-uclass.c +@@ -194,7 +194,7 @@ static int tee_pre_remove(struct udevice *dev) + */ + while (!list_empty(&priv->list_shm)) { + shm = list_first_entry(&priv->list_shm, struct tee_shm, link); +- debug("%s: freeing leftover shm %p (size %lu, flags %#x)\n", ++printf("%s: freeing leftover shm %p (size %lu, flags %#x)\n", + __func__, (void *)shm, shm->size, shm->flags); + tee_shm_free(shm); + } +diff --git a/drivers/thermal/imx_scu_thermal.c b/drivers/thermal/imx_scu_thermal.c +index e704bcbea..28ee783d6 100644 +--- a/drivers/thermal/imx_scu_thermal.c ++++ b/drivers/thermal/imx_scu_thermal.c +@@ -84,7 +84,7 @@ static const struct dm_thermal_ops imx_sc_thermal_ops = { + + static int imx_sc_thermal_probe(struct udevice *dev) + { +- debug("%s dev name %s\n", __func__, dev->name); ++printf("%s dev name %s\n", __func__, dev->name); + return 0; + } + +@@ -96,7 +96,7 @@ static int imx_sc_thermal_bind(struct udevice *dev) + const char *name; + const void *prop; + +- debug("%s dev name %s\n", __func__, dev->name); ++printf("%s dev name %s\n", __func__, dev->name); + + prop = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "compatible", + NULL); +@@ -135,7 +135,7 @@ static int imx_sc_thermal_of_to_plat(struct udevice *dev) + int ret; + int trips_np; + +- debug("%s dev name %s\n", __func__, dev->name); ++printf("%s dev name %s\n", __func__, dev->name); + + if (pdata->zone_node) + return 0; +@@ -155,7 +155,7 @@ static int imx_sc_thermal_of_to_plat(struct udevice *dev) + else + pdata->id = 0; + +- debug("args.args_count %d, id %d\n", args.args_count, pdata->id); ++printf("args.args_count %d, id %d\n", args.args_count, pdata->id); + + pdata->polling_delay = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), + "polling-delay", 1000); +@@ -179,7 +179,7 @@ static int imx_sc_thermal_of_to_plat(struct udevice *dev) + } + } + +- debug("id %d polling_delay %d, critical %d, alert %d\n", pdata->id, ++printf("id %d polling_delay %d, critical %d, alert %d\n", pdata->id, + pdata->polling_delay, pdata->critical, pdata->alert); + + return 0; +diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c +index 2f6343e7a..287fd6226 100644 +--- a/drivers/thermal/imx_thermal.c ++++ b/drivers/thermal/imx_thermal.c +@@ -246,7 +246,7 @@ static int imx_thermal_probe(struct udevice *dev) + if (is_soc_type(MXC_SOC_MX6)) { + /* Check for valid fuse */ + if (fuse == 0 || fuse == ~0) { +- debug("CPU: Thermal invalid data, fuse: 0x%x\n", ++printf("CPU: Thermal invalid data, fuse: 0x%x\n", + fuse); + return -EPERM; + } +diff --git a/drivers/thermal/imx_tmu.c b/drivers/thermal/imx_tmu.c +index 07766baf4..462dea284 100644 +--- a/drivers/thermal/imx_tmu.c ++++ b/drivers/thermal/imx_tmu.c +@@ -210,7 +210,7 @@ static int imx_tmu_calibration(struct udevice *dev) + struct imx_tmu_plat *pdata = dev_get_plat(dev); + ulong drv_data = dev_get_driver_data(dev); + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (drv_data & (FLAGS_VER2 | FLAGS_VER3)) + return 0; +@@ -252,7 +252,7 @@ static void imx_tmu_init(struct udevice *dev) + struct imx_tmu_plat *pdata = dev_get_plat(dev); + ulong drv_data = dev_get_driver_data(dev); + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (drv_data & FLAGS_VER3) { + /* Disable monitoring */ +@@ -287,7 +287,7 @@ static int imx_tmu_enable_msite(struct udevice *dev) + ulong drv_data = dev_get_driver_data(dev); + u32 reg; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (!pdata->regs) + return -EIO; +@@ -346,7 +346,7 @@ static int imx_tmu_bind(struct udevice *dev) + const void *prop; + int minc, maxc; + +- debug("%s dev name %s\n", __func__, dev->name); ++printf("%s dev name %s\n", __func__, dev->name); + + prop = dev_read_prop(dev, "compatible", NULL); + if (!prop) +@@ -381,7 +381,7 @@ static int imx_tmu_parse_fdt(struct udevice *dev) + ofnode trips_np; + int ret; + +- debug("%s dev name %s\n", __func__, dev->name); ++printf("%s dev name %s\n", __func__, dev->name); + + if (pdata->zone_node) { + pdata->regs = (union tmu_regs *)dev_read_addr_ptr(dev); +@@ -409,7 +409,7 @@ static int imx_tmu_parse_fdt(struct udevice *dev) + else + pdata->id = 0; + +- debug("args.args_count %d, id %d\n", args.args_count, pdata->id); ++printf("args.args_count %d, id %d\n", args.args_count, pdata->id); + + pdata->polling_delay = dev_read_u32_default(dev, "polling-delay", 1000); + +@@ -428,7 +428,7 @@ static int imx_tmu_parse_fdt(struct udevice *dev) + continue; + } + +- debug("id %d polling_delay %d, critical %d, alert %d\n", ++printf("id %d polling_delay %d, critical %d, alert %d\n", + pdata->id, pdata->polling_delay, pdata->critical, pdata->alert); + + return 0; +diff --git a/drivers/timer/mpc83xx_timer.c b/drivers/timer/mpc83xx_timer.c +index 952293195..f24d38e96 100644 +--- a/drivers/timer/mpc83xx_timer.c ++++ b/drivers/timer/mpc83xx_timer.c +@@ -110,7 +110,7 @@ int interrupt_init(void) + + ret = uclass_first_device_err(UCLASS_TIMER, &timer); + if (ret) { +- debug("%s: Could not find timer device (error: %d)", ++printf("%s: Could not find timer device (error: %d)", + __func__, ret); + return ret; + } +@@ -118,21 +118,21 @@ int interrupt_init(void) + timer_priv = dev_get_priv(timer); + + if (sysinfo_get(&sysinfo)) { +- debug("%s: sysinfo device could not be fetched.\n", __func__); ++printf("%s: sysinfo device could not be fetched.\n", __func__); + return -ENOENT; + } + + ret = uclass_get_device_by_phandle(UCLASS_SIMPLE_BUS, sysinfo, + "csb", &csb); + if (ret) { +- debug("%s: Could not retrieve CSB device (error: %d)", ++printf("%s: Could not retrieve CSB device (error: %d)", + __func__, ret); + return ret; + } + + ret = clk_get_by_index(csb, 0, &clock); + if (ret) { +- debug("%s: Could not retrieve clock (error: %d)", ++printf("%s: Could not retrieve clock (error: %d)", + __func__, ret); + return ret; + } +@@ -217,14 +217,14 @@ static int mpc83xx_timer_probe(struct udevice *dev) + + ret = interrupt_init(); + if (ret) { +- debug("%s: interrupt_init failed (err = %d)\n", ++printf("%s: interrupt_init failed (err = %d)\n", + dev->name, ret); + return ret; + } + + ret = clk_get_by_index(dev, 0, &clock); + if (ret) { +- debug("%s: Could not retrieve clock (err = %d)\n", ++printf("%s: Could not retrieve clock (err = %d)\n", + dev->name, ret); + return ret; + } +diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c +index 18c61450a..942c5302a 100644 +--- a/drivers/timer/rockchip_timer.c ++++ b/drivers/timer/rockchip_timer.c +@@ -67,7 +67,7 @@ ulong timer_get_boot_us(void) + */ + node = ofnode_get_chosen_node("tick-timer"); + if (!ofnode_valid(node)) { +- debug("%s: no /chosen/tick-timer\n", __func__); ++printf("%s: no /chosen/tick-timer\n", __func__); + return 0; + } + +@@ -76,7 +76,7 @@ ulong timer_get_boot_us(void) + /* This timer is down-counting */ + ticks = ~0uLL - rockchip_timer_get_curr_value(timer); + if (ofnode_read_u32(node, "clock-frequency", &rate)) { +- debug("%s: could not read clock-frequency\n", __func__); ++printf("%s: could not read clock-frequency\n", __func__); + return 0; + } + #endif +diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c +index 7d19a9962..470d7b9dc 100644 +--- a/drivers/timer/tsc_timer.c ++++ b/drivers/timer/tsc_timer.c +@@ -168,24 +168,24 @@ static unsigned long __maybe_unused cpu_mhz_from_msr(void) + rdmsr(MSR_IA32_PERF_STATUS, lo, hi); + ratio = (hi >> 8) & 0x1f; + } +- debug("Maximum core-clock to bus-clock ratio: 0x%x\n", ratio); ++printf("Maximum core-clock to bus-clock ratio: 0x%x\n", ratio); + + if (freq_desc_tables[cpu_index].msr_plat == 2) { + /* TODO: Figure out how best to deal with this */ + freq = 100000; +- debug("Using frequency: %u KHz\n", freq); ++printf("Using frequency: %u KHz\n", freq); + } else { + /* Get FSB FREQ ID */ + rdmsr(MSR_FSB_FREQ, lo, hi); + freq_id = lo & 0x7; + freq = id_to_freq(cpu_index, freq_id); +- debug("Resolved frequency ID: %u, frequency: %u KHz\n", ++printf("Resolved frequency ID: %u, frequency: %u KHz\n", + freq_id, freq); + } + + /* TSC frequency = maximum resolved freq * maximum resolved bus ratio */ + res = freq * ratio / 1000; +- debug("TSC runs at %lu MHz\n", res); ++printf("TSC runs at %lu MHz\n", res); + + return res; + } +@@ -319,7 +319,7 @@ static unsigned long __maybe_unused quick_pit_calibrate(void) + goto success; + } + } +- debug("Fast TSC calibration failed\n"); ++printf("Fast TSC calibration failed\n"); + return 0; + + success: +@@ -338,7 +338,7 @@ success: + */ + delta *= PIT_TICK_RATE; + delta /= (i*256*1000); +- debug("Fast TSC calibration using PIT\n"); ++printf("Fast TSC calibration using PIT\n"); + return delta / 1000; + } + +diff --git a/drivers/tpm/tpm2_ftpm_tee.c b/drivers/tpm/tpm2_ftpm_tee.c +index 53e59f42b..068d81fe1 100644 +--- a/drivers/tpm/tpm2_ftpm_tee.c ++++ b/drivers/tpm/tpm2_ftpm_tee.c +@@ -47,7 +47,7 @@ static int ftpm_tee_transceive(struct udevice *dev, const u8 *sendbuf, + struct tee_shm *shm; + + if (send_size > MAX_COMMAND_SIZE) { +- debug("%s:send_size=%zd exceeds MAX_COMMAND_SIZE\n", ++printf("%s:send_size=%zd exceeds MAX_COMMAND_SIZE\n", + __func__, send_size); + return -EIO; + } +@@ -89,7 +89,7 @@ static int ftpm_tee_transceive(struct udevice *dev, const u8 *sendbuf, + rc = tee_invoke_func(context->tee_dev, &transceive_args, 4, + command_params); + if ((rc < 0) || (transceive_args.ret != 0)) { +- debug("%s:SUBMIT_COMMAND invoke error: 0x%x\n", ++printf("%s:SUBMIT_COMMAND invoke error: 0x%x\n", + __func__, transceive_args.ret); + return (rc < 0) ? rc : transceive_args.ret; + } +@@ -101,16 +101,16 @@ static int ftpm_tee_transceive(struct udevice *dev, const u8 *sendbuf, + + /* sanity check resp_len*/ + if (resp_len < TPM_HEADER_SIZE) { +- debug("%s:tpm response header too small\n", __func__); ++printf("%s:tpm response header too small\n", __func__); + return -EIO; + } + if (resp_len > MAX_RESPONSE_SIZE) { +- debug("%s:resp_len=%zd exceeds MAX_RESPONSE_SIZE\n", ++printf("%s:resp_len=%zd exceeds MAX_RESPONSE_SIZE\n", + __func__, resp_len); + return -EIO; + } + if (resp_len > *recv_len) { +- debug("%s:response length is bigger than receive buffer\n", ++printf("%s:response length is bigger than receive buffer\n", + __func__); + return -EIO; + } +@@ -154,7 +154,7 @@ static int ftpm_tee_desc(struct udevice *dev, char *buf, int size) + + static int ftpm_tee_match(struct tee_version_data *vers, const void *data) + { +- debug("%s:vers->gen_caps =0x%x\n", __func__, vers->gen_caps); ++printf("%s:vers->gen_caps =0x%x\n", __func__, vers->gen_caps); + + /* + * Currently this driver only support GP Complaint OPTEE based fTPM TA +@@ -180,7 +180,7 @@ static int ftpm_tee_probe(struct udevice *dev) + /* Find TEE device */ + context->tee_dev = tee_find_device(NULL, ftpm_tee_match, NULL, NULL); + if (!context->tee_dev) { +- debug("%s:tee_find_device failed\n", __func__); ++printf("%s:tee_find_device failed\n", __func__); + return -ENODEV; + } + +@@ -190,7 +190,7 @@ static int ftpm_tee_probe(struct udevice *dev) + + rc = tee_open_session(context->tee_dev, &sess_arg, 0, NULL); + if ((rc < 0) || (sess_arg.ret != 0)) { +- debug("%s:tee_open_session failed, err=%x\n", ++printf("%s:tee_open_session failed, err=%x\n", + __func__, sess_arg.ret); + return -EIO; + } +@@ -201,7 +201,7 @@ static int ftpm_tee_probe(struct udevice *dev) + MAX_COMMAND_SIZE + MAX_RESPONSE_SIZE, + 0, &context->shm); + if (rc) { +- debug("%s:tee_shm_alloc failed with rc = %d\n", __func__, rc); ++printf("%s:tee_shm_alloc failed with rc = %d\n", __func__, rc); + goto out_shm_alloc; + } + +@@ -222,7 +222,7 @@ static int ftpm_tee_remove(struct udevice *dev) + + /* close the existing session with fTPM TA*/ + rc = tee_close_session(context->tee_dev, context->session); +- debug("%s: tee_close_session - rc =%d\n", __func__, rc); ++printf("%s: tee_close_session - rc =%d\n", __func__, rc); + + return 0; + } +diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c +index f414e5657..c61078f55 100644 +--- a/drivers/tpm/tpm_tis_infineon.c ++++ b/drivers/tpm/tpm_tis_infineon.c +@@ -233,16 +233,16 @@ static int tpm_tis_i2c_request_locality(struct udevice *dev, int loc) + + rc = tpm_tis_i2c_check_locality(dev, loc); + if (rc >= 0) { +- debug("%s: Already have locality\n", __func__); ++printf("%s: Already have locality\n", __func__); + return loc; /* We already have the locality */ + } else if (rc != -ENOENT) { +- debug("%s: Failed to get locality: %d\n", __func__, rc); ++printf("%s: Failed to get locality: %d\n", __func__, rc); + return rc; + } + + rc = tpm_tis_i2c_write(dev, TPM_ACCESS(loc), &buf, 1); + if (rc) { +- debug("%s: Failed to write to TPM: %d\n", __func__, rc); ++printf("%s: Failed to write to TPM: %d\n", __func__, rc); + return rc; + } + +@@ -252,15 +252,15 @@ static int tpm_tis_i2c_request_locality(struct udevice *dev, int loc) + do { + rc = tpm_tis_i2c_check_locality(dev, loc); + if (rc >= 0) { +- debug("%s: Have locality\n", __func__); ++printf("%s: Have locality\n", __func__); + return loc; + } else if (rc != -ENOENT) { +- debug("%s: Failed to get locality: %d\n", __func__, rc); ++printf("%s: Failed to get locality: %d\n", __func__, rc); + return rc; + } + mdelay(TPM_TIMEOUT_MS); + } while (get_timer(start) < stop); +- debug("%s: Timeout getting locality: %d\n", __func__, rc); ++printf("%s: Timeout getting locality: %d\n", __func__, rc); + + return rc; + } +@@ -285,10 +285,10 @@ static int tpm_tis_i2c_ready(struct udevice *dev) + /* This causes the current command to be aborted */ + u8 buf = TPM_STS_COMMAND_READY; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + rc = tpm_tis_i2c_write_long(dev, TPM_STS(chip->locality), &buf, 1); + if (rc) +- debug("%s: rc=%d\n", __func__, rc); ++printf("%s: rc=%d\n", __func__, rc); + + return rc; + } +@@ -384,18 +384,18 @@ static int tpm_tis_i2c_recv(struct udevice *dev, u8 *buf, size_t count) + (TPM_STS_DATA_AVAIL | TPM_STS_VALID)) + return -EAGAIN; + +- debug("...got it;\n"); ++printf("...got it;\n"); + + /* Read first 10 bytes, including tag, paramsize, and result */ + size = tpm_tis_i2c_recv_data(dev, buf, TPM_HEADER_SIZE); + if (size < TPM_HEADER_SIZE) { +- debug("Unable to read header\n"); ++printf("Unable to read header\n"); + return size < 0 ? size : -EIO; + } + + expected = get_unaligned_be32(buf + TPM_RSP_SIZE_BYTE); + if ((size_t)expected > count || (size_t)expected < TPM_HEADER_SIZE) { +- debug("Error size=%x, expected=%x, count=%x\n", size, expected, ++printf("Error size=%x, expected=%x, count=%x\n", size, expected, + count); + return -ENOSPC; + } +@@ -403,7 +403,7 @@ static int tpm_tis_i2c_recv(struct udevice *dev, u8 *buf, size_t count) + size += tpm_tis_i2c_recv_data(dev, &buf[TPM_HEADER_SIZE], + expected - TPM_HEADER_SIZE); + if (size < expected) { +- debug("Unable to read remainder of result\n"); ++printf("Unable to read remainder of result\n"); + return -ETIMEDOUT; + } + +@@ -412,7 +412,7 @@ static int tpm_tis_i2c_recv(struct udevice *dev, u8 *buf, size_t count) + if (rc) + return rc; + if (status & TPM_STS_DATA_AVAIL) { /* Retry? */ +- debug("Error left over data\n"); ++printf("Error left over data\n"); + return -EIO; + } + +@@ -428,7 +428,7 @@ static int tpm_tis_i2c_send(struct udevice *dev, const u8 *buf, size_t len) + int retry = 0; + u8 sts = TPM_STS_GO; + +- debug("%s: len=%d\n", __func__, len); ++printf("%s: len=%d\n", __func__, len); + if (len > TPM_DEV_BUFSIZE) + return -E2BIG; /* Command is too long for our tpm, sorry */ + +@@ -467,7 +467,7 @@ static int tpm_tis_i2c_send(struct udevice *dev, const u8 *buf, size_t len) + if (rc == 0) + count += burstcnt; + else { +- debug("%s: error\n", __func__); ++printf("%s: error\n", __func__); + if (retry++ > 10) + return -EIO; + rc = tpm_tis_i2c_wait_for_stat(dev, TPM_STS_VALID, +@@ -485,7 +485,7 @@ static int tpm_tis_i2c_send(struct udevice *dev, const u8 *buf, size_t len) + rc = tpm_tis_i2c_write(dev, TPM_STS(chip->locality), &sts, 1); + if (rc < 0) + return rc; +- debug("%s: done, rc=%d\n", __func__, rc); ++printf("%s: done, rc=%d\n", __func__, rc); + + return len; + } +@@ -544,7 +544,7 @@ static int tpm_tis_i2c_init(struct udevice *dev) + } + + chip->vend_dev = vendor; +- debug("1.2 TPM (chip type %s device-id 0x%X)\n", ++printf("1.2 TPM (chip type %s device-id 0x%X)\n", + chip_name[chip->chip_type], vendor >> 16); + + /* +@@ -560,7 +560,7 @@ static int tpm_tis_i2c_open(struct udevice *dev) + struct tpm_chip *chip = dev_get_priv(dev); + int rc; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + if (chip->is_open) + return -EBUSY; + rc = tpm_tis_i2c_init(dev); +diff --git a/drivers/tpm/tpm_tis_lpc.c b/drivers/tpm/tpm_tis_lpc.c +index 003c0d881..004afd909 100644 +--- a/drivers/tpm/tpm_tis_lpc.c ++++ b/drivers/tpm/tpm_tis_lpc.c +@@ -97,7 +97,7 @@ static u16 burst_count(u32 status) + static u8 tpm_read_byte(struct tpm_tis_lpc_priv *priv, const u8 *ptr) + { + u8 ret = readb(ptr); +- debug(PREFIX "Read reg 0x%4.4x returns 0x%2.2x\n", ++printf(PREFIX "Read reg 0x%4.4x returns 0x%2.2x\n", + (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret); + return ret; + } +@@ -105,14 +105,14 @@ static u8 tpm_read_byte(struct tpm_tis_lpc_priv *priv, const u8 *ptr) + static u32 tpm_read_word(struct tpm_tis_lpc_priv *priv, const u32 *ptr) + { + u32 ret = readl(ptr); +- debug(PREFIX "Read reg 0x%4.4x returns 0x%8.8x\n", ++printf(PREFIX "Read reg 0x%4.4x returns 0x%8.8x\n", + (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret); + return ret; + } + + static void tpm_write_byte(struct tpm_tis_lpc_priv *priv, u8 value, u8 *ptr) + { +- debug(PREFIX "Write reg 0x%4.4x with 0x%2.2x\n", ++printf(PREFIX "Write reg 0x%4.4x with 0x%2.2x\n", + (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value); + writeb(value, ptr); + } +@@ -120,7 +120,7 @@ static void tpm_write_byte(struct tpm_tis_lpc_priv *priv, u8 value, u8 *ptr) + static void tpm_write_word(struct tpm_tis_lpc_priv *priv, u32 value, + u32 *ptr) + { +- debug(PREFIX "Write reg 0x%4.4x with 0x%8.8x\n", ++printf(PREFIX "Write reg 0x%4.4x with 0x%8.8x\n", + (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value); + writel(value, ptr); + } +@@ -176,11 +176,11 @@ static int tpm_tis_lpc_probe(struct udevice *dev) + u32 vid, did; + vid = didvid & 0xffff; + did = (didvid >> 16) & 0xffff; +- debug("Invalid vendor/device ID %04x/%04x\n", vid, did); ++printf("Invalid vendor/device ID %04x/%04x\n", vid, did); + return -ENODEV; + } + +- debug("Found TPM: %s\n", chip_name[chip_type]); ++printf("Found TPM: %s\n", chip_name[chip_type]); + + return 0; + } +diff --git a/drivers/tpm/tpm_tis_st33zp24_i2c.c b/drivers/tpm/tpm_tis_st33zp24_i2c.c +index e0eeabb93..ed4a2edb9 100644 +--- a/drivers/tpm/tpm_tis_st33zp24_i2c.c ++++ b/drivers/tpm/tpm_tis_st33zp24_i2c.c +@@ -317,7 +317,7 @@ static int st33zp24_i2c_recv(struct udevice *dev, u8 *buf, size_t count) + + size = st33zp24_i2c_recv_data(dev, buf, TPM_HEADER_SIZE); + if (size < TPM_HEADER_SIZE) { +- debug("TPM error, unable to read header\n"); ++printf("TPM error, unable to read header\n"); + goto out; + } + +@@ -330,7 +330,7 @@ static int st33zp24_i2c_recv(struct udevice *dev, u8 *buf, size_t count) + size += st33zp24_i2c_recv_data(dev, &buf[TPM_HEADER_SIZE], + expected - TPM_HEADER_SIZE); + if (size < expected) { +- debug("TPM error, unable to read remaining bytes of result\n"); ++printf("TPM error, unable to read remaining bytes of result\n"); + size = -EIO; + goto out; + } +@@ -458,7 +458,7 @@ static int st33zp24_i2c_open(struct udevice *dev) + struct tpm_chip *chip = dev_get_priv(dev); + int rc; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + if (chip->is_open) + return -EBUSY; + +@@ -518,7 +518,7 @@ static int st33zp24_i2c_probe(struct udevice *dev) + + i2c_set_chip_offset_len(dev, 0); + +- debug("ST33ZP24 I2C TPM from STMicroelectronics found\n"); ++printf("ST33ZP24 I2C TPM from STMicroelectronics found\n"); + + return 0; + } +diff --git a/drivers/tpm/tpm_tis_st33zp24_spi.c b/drivers/tpm/tpm_tis_st33zp24_spi.c +index f0de8a65b..2fc18ba14 100644 +--- a/drivers/tpm/tpm_tis_st33zp24_spi.c ++++ b/drivers/tpm/tpm_tis_st33zp24_spi.c +@@ -445,7 +445,7 @@ static int st33zp24_spi_recv(struct udevice *dev, u8 *buf, size_t count) + + size = st33zp24_spi_recv_data(dev, buf, TPM_HEADER_SIZE); + if (size < TPM_HEADER_SIZE) { +- debug("TPM error, unable to read header\n"); ++printf("TPM error, unable to read header\n"); + goto out; + } + +@@ -458,7 +458,7 @@ static int st33zp24_spi_recv(struct udevice *dev, u8 *buf, size_t count) + size += st33zp24_spi_recv_data(dev, &buf[TPM_HEADER_SIZE], + expected - TPM_HEADER_SIZE); + if (size < expected) { +- debug("TPM error, unable to read remaining bytes of result\n"); ++printf("TPM error, unable to read remaining bytes of result\n"); + size = -EIO; + goto out; + } +@@ -591,7 +591,7 @@ static int st33zp24_spi_open(struct udevice *dev) + struct tpm_chip *chip = dev_get_priv(dev); + int rc; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + if (chip->is_open) + return -EBUSY; + +@@ -646,7 +646,7 @@ static int st33zp24_spi_probe(struct udevice *dev) + uc_priv->duration_ms[TPM_LONG] = TIS_LONG_TIMEOUT_MS; + uc_priv->retry_time_ms = TPM_TIMEOUT_MS; + +- debug("ST33ZP24 SPI TPM from STMicroelectronics found\n"); ++printf("ST33ZP24 SPI TPM from STMicroelectronics found\n"); + + return 0; + } +diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c +index 13e730b88..d0b1be5b8 100644 +--- a/drivers/ufs/ufs.c ++++ b/drivers/ufs/ufs.c +@@ -180,7 +180,7 @@ static int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) + return -EIO; + } + +- debug("sending uic command:%d\n", uic_cmd->command); ++printf("sending uic command:%d\n", uic_cmd->command); + + /* Write Args */ + ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1); +@@ -215,7 +215,7 @@ static int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd) + uic_cmd->argument2 = ufshcd_get_uic_cmd_result(hba); + uic_cmd->argument3 = ufshcd_get_dme_attr_val(hba); + +- debug("Sent successfully\n"); ++printf("Sent successfully\n"); + + return 0; + } +diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c +index 798a21793..7079256e9 100644 +--- a/drivers/usb/cdns3/core.c ++++ b/drivers/usb/cdns3/core.c +@@ -406,13 +406,13 @@ int cdns3_bind(struct udevice *parent) + #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \ + (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)) + case USB_DR_MODE_HOST: +- debug("%s: dr_mode: HOST\n", __func__); ++printf("%s: dr_mode: HOST\n", __func__); + driver = "cdns-usb3-host"; + break; + #endif + #if CONFIG_IS_ENABLED(DM_USB_GADGET) + case USB_DR_MODE_PERIPHERAL: +- debug("%s: dr_mode: PERIPHERAL\n", __func__); ++printf("%s: dr_mode: PERIPHERAL\n", __func__); + driver = "cdns-usb3-peripheral"; + break; + #endif +diff --git a/drivers/usb/common/fsl-dt-fixup.c b/drivers/usb/common/fsl-dt-fixup.c +index 4d7a2acd8..d6f9bba91 100644 +--- a/drivers/usb/common/fsl-dt-fixup.c ++++ b/drivers/usb/common/fsl-dt-fixup.c +@@ -128,7 +128,7 @@ static int fsl_fdt_fixup_erratum(int *usb_erratum_off, void *blob, + *usb_erratum_off); + if (*usb_erratum_off < 0) + return -ENOSPC; +- debug("Adding USB erratum %s\n", str); ++printf("Adding USB erratum %s\n", str); + return 0; + } + +diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c +index c8bf4ae85..edf78a536 100644 +--- a/drivers/usb/dwc3/dwc3-generic.c ++++ b/drivers/usb/dwc3/dwc3-generic.c +@@ -248,7 +248,7 @@ enum dwc3_omap_utmi_mode { + utmi_mode = dev_read_u32_default(dev, "utmi-mode", + DWC3_OMAP_UTMI_MODE_UNKNOWN); + if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) { +- debug("%s: OTG is not supported. defaulting to PERIPHERAL\n", ++printf("%s: OTG is not supported. defaulting to PERIPHERAL\n", + dev->name); + mode = USB_DR_MODE_PERIPHERAL; + } +@@ -308,7 +308,7 @@ static int dwc3_glue_bind(struct udevice *parent) + struct udevice *dev; + const char *driver = NULL; + +- debug("%s: subnode name: %s\n", __func__, name); ++printf("%s: subnode name: %s\n", __func__, name); + + dr_mode = usb_get_dr_mode(node); + +@@ -316,18 +316,18 @@ static int dwc3_glue_bind(struct udevice *parent) + case USB_DR_MODE_PERIPHERAL: + case USB_DR_MODE_OTG: + #if CONFIG_IS_ENABLED(DM_USB_GADGET) +- debug("%s: dr_mode: OTG or Peripheral\n", __func__); ++printf("%s: dr_mode: OTG or Peripheral\n", __func__); + driver = "dwc3-generic-peripheral"; + #endif + break; + #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD) + case USB_DR_MODE_HOST: +- debug("%s: dr_mode: HOST\n", __func__); ++printf("%s: dr_mode: HOST\n", __func__); + driver = "dwc3-generic-host"; + break; + #endif + default: +- debug("%s: unsupported dr_mode\n", __func__); ++printf("%s: unsupported dr_mode\n", __func__); + return -ENODEV; + }; + +@@ -337,7 +337,7 @@ static int dwc3_glue_bind(struct udevice *parent) + ret = device_bind_driver_to_node(parent, driver, name, + node, &dev); + if (ret) { +- debug("%s: not able to bind usb device mode\n", ++printf("%s: not able to bind usb device mode\n", + __func__); + return ret; + } +diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c +index 90418ddc1..e316b3651 100644 +--- a/drivers/usb/dwc3/dwc3-meson-g12a.c ++++ b/drivers/usb/dwc3/dwc3-meson-g12a.c +@@ -270,9 +270,9 @@ int dwc3_meson_g12a_force_mode(struct udevice *dev, enum usb_dr_mode mode) + return -EINVAL; + + if (mode == USB_DR_MODE_HOST) +- debug("%s: switching to Host Mode\n", __func__); ++printf("%s: switching to Host Mode\n", __func__); + else +- debug("%s: switching to Device Mode\n", __func__); ++printf("%s: switching to Device Mode\n", __func__); + + #if CONFIG_IS_ENABLED(DM_REGULATOR) + if (priv->vbus_supply) { +@@ -310,8 +310,8 @@ static int dwc3_meson_g12a_get_phys(struct dwc3_meson_g12a *priv) + priv->usb2_ports++; + } + +- debug("%s: usb2 ports: %d\n", __func__, priv->usb2_ports); +- debug("%s: usb3 ports: %d\n", __func__, priv->usb3_ports); ++printf("%s: usb2 ports: %d\n", __func__, priv->usb2_ports); ++printf("%s: usb3 ports: %d\n", __func__, priv->usb3_ports); + + return 0; + } +diff --git a/drivers/usb/dwc3/dwc3-meson-gxl.c b/drivers/usb/dwc3/dwc3-meson-gxl.c +index 08467d621..25f61cc1a 100644 +--- a/drivers/usb/dwc3/dwc3-meson-gxl.c ++++ b/drivers/usb/dwc3/dwc3-meson-gxl.c +@@ -211,9 +211,9 @@ int dwc3_meson_gxl_force_mode(struct udevice *dev, enum usb_dr_mode mode) + return 0; + + if (mode == USB_DR_MODE_HOST) +- debug("%s: switching to Host Mode\n", __func__); ++printf("%s: switching to Host Mode\n", __func__); + else +- debug("%s: switching to Device Mode\n", __func__); ++printf("%s: switching to Device Mode\n", __func__); + + #if CONFIG_IS_ENABLED(DM_REGULATOR) + if (priv->vbus_supply) { +@@ -250,7 +250,7 @@ static int dwc3_meson_gxl_get_phys(struct dwc3_meson_gxl *priv) + priv->usb2_ports++; + } + +- debug("%s: usb2 ports: %d\n", __func__, priv->usb2_ports); ++printf("%s: usb2 ports: %d\n", __func__, priv->usb2_ports); + + return 0; + } +diff --git a/drivers/usb/emul/sandbox_flash.c b/drivers/usb/emul/sandbox_flash.c +index edabc1b3a..6c336baed 100644 +--- a/drivers/usb/emul/sandbox_flash.c ++++ b/drivers/usb/emul/sandbox_flash.c +@@ -183,11 +183,11 @@ static int sandbox_flash_control(struct udevice *dev, struct usb_device *udev, + *(char *)buff = '\0'; + return 1; + default: +- debug("request=%x\n", setup->request); ++printf("request=%x\n", setup->request); + break; + } + } +- debug("pipe=%lx\n", pipe); ++printf("pipe=%lx\n", pipe); + + return -EIO; + } +@@ -227,7 +227,7 @@ static void setup_response(struct sandbox_flash_priv *priv, void *resp, + static void handle_read(struct sandbox_flash_priv *priv, ulong lba, + ulong transfer_len) + { +- debug("%s: lba=%lx, transfer_len=%lx\n", __func__, lba, transfer_len); ++printf("%s: lba=%lx, transfer_len=%lx\n", __func__, lba, transfer_len); + if (priv->fd != -1) { + os_lseek(priv->fd, lba * SANDBOX_FLASH_BLOCK_LEN, OS_SEEK_SET); + priv->read_len = transfer_len; +@@ -286,7 +286,7 @@ static int handle_ufi_command(struct sandbox_flash_plat *plat, + break; + } + default: +- debug("Command not supported: %x\n", req->cmd[0]); ++printf("Command not supported: %x\n", req->cmd[0]); + return -EPROTONOSUPPORT; + } + +@@ -302,7 +302,7 @@ static int sandbox_flash_bulk(struct udevice *dev, struct usb_device *udev, + int ep = usb_pipeendpoint(pipe); + struct umass_bbb_cbw *cbw = buff; + +- debug("%s: dev=%s, pipe=%lx, ep=%x, len=%x, phase=%d\n", __func__, ++printf("%s: dev=%s, pipe=%lx, ep=%x, len=%x, phase=%d\n", __func__, + dev->name, pipe, ep, len, priv->phase); + switch (ep) { + case SANDBOX_FLASH_EP_OUT: +@@ -323,7 +323,7 @@ static int sandbox_flash_bulk(struct udevice *dev, struct usb_device *udev, + return handle_ufi_command(plat, priv, cbw->CBWCDB, + cbw->bCDBLength); + case PHASE_DATA: +- debug("data out\n"); ++printf("data out\n"); + break; + default: + break; +@@ -331,7 +331,7 @@ static int sandbox_flash_bulk(struct udevice *dev, struct usb_device *udev, + case SANDBOX_FLASH_EP_IN: + switch (priv->phase) { + case PHASE_DATA: +- debug("data in, len=%x, alloc_len=%x, priv->read_len=%x\n", ++printf("data in, len=%x, alloc_len=%x, priv->read_len=%x\n", + len, priv->alloc_len, priv->read_len); + if (priv->read_len) { + ulong bytes_read; +@@ -350,7 +350,7 @@ static int sandbox_flash_bulk(struct udevice *dev, struct usb_device *udev, + } + return len; + case PHASE_STATUS: +- debug("status in, len=%x\n", len); ++printf("status in, len=%x\n", len); + if (len > sizeof(priv->status)) + len = sizeof(priv->status); + memcpy(buff, &priv->status, len); +@@ -362,7 +362,7 @@ static int sandbox_flash_bulk(struct udevice *dev, struct usb_device *udev, + } + err: + priv->error = true; +- debug("%s: Detected transfer error\n", __func__); ++printf("%s: Detected transfer error\n", __func__); + return 0; + } + +diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c +index 041ec3772..1d7c9f290 100644 +--- a/drivers/usb/emul/sandbox_hub.c ++++ b/drivers/usb/emul/sandbox_hub.c +@@ -172,7 +172,7 @@ static int clrset_post_state(struct udevice *hub, int port, int clear, int set) + if (dev) { + if (set & USB_PORT_STAT_POWER) { + ret = device_probe(dev); +- debug("%s: %s: power on, probed, ret=%d\n", ++printf("%s: %s: power on, probed, ret=%d\n", + __func__, dev->name, ret); + if (!ret) { + set |= USB_PORT_STAT_CONNECTION | +@@ -184,7 +184,7 @@ static int clrset_post_state(struct udevice *hub, int port, int clear, int set) + } + + } else if (clear & USB_PORT_STAT_POWER) { +- debug("%s: %s: power off, removed, ret=%d\n", ++printf("%s: %s: power off, removed, ret=%d\n", + __func__, dev->name, ret); + ret = device_remove(dev, DM_REMOVE_NORMAL); + clear |= USB_PORT_STAT_CONNECTION; +@@ -222,7 +222,7 @@ static int sandbox_hub_submit_control_msg(struct udevice *bus, + return 0; + } + default: +- debug("%s: rx ctl requesttype=%x, request=%x\n", ++printf("%s: rx ctl requesttype=%x, request=%x\n", + __func__, setup->requesttype, + setup->request); + break; +@@ -242,7 +242,7 @@ static int sandbox_hub_submit_control_msg(struct udevice *bus, + } + } + default: +- debug("%s: rx ctl requesttype=%x, request=%x\n", ++printf("%s: rx ctl requesttype=%x, request=%x\n", + __func__, setup->requesttype, setup->request); + break; + } +@@ -254,13 +254,13 @@ static int sandbox_hub_submit_control_msg(struct udevice *bus, + int port; + + port = (setup->index & USB_HUB_PORT_MASK) - 1; +- debug("set feature port=%x, feature=%x\n", ++printf("set feature port=%x, feature=%x\n", + port, setup->value); + if (setup->value < USB_PORT_FEAT_C_CONNECTION) { + ret = clrset_post_state(bus, port, 0, + 1 << setup->value); + } else { +- debug(" ** Invalid feature\n"); ++printf(" ** Invalid feature\n"); + } + return ret; + } +@@ -268,7 +268,7 @@ static int sandbox_hub_submit_control_msg(struct udevice *bus, + int port; + + port = (setup->index & USB_HUB_PORT_MASK) - 1; +- debug("clear feature port=%x, feature=%x\n", ++printf("clear feature port=%x, feature=%x\n", + port, setup->value); + if (setup->value < USB_PORT_FEAT_C_CONNECTION) { + ret = clrset_post_state(bus, port, +@@ -281,18 +281,18 @@ static int sandbox_hub_submit_control_msg(struct udevice *bus, + return 0; + } + default: +- debug("%s: tx ctl requesttype=%x, request=%x\n", ++printf("%s: tx ctl requesttype=%x, request=%x\n", + __func__, setup->requesttype, + setup->request); + break; + } + default: +- debug("%s: tx ctl requesttype=%x, request=%x\n", ++printf("%s: tx ctl requesttype=%x, request=%x\n", + __func__, setup->requesttype, setup->request); + break; + } + } +- debug("pipe=%lx\n", pipe); ++printf("pipe=%lx\n", pipe); + + return -EIO; + } +diff --git a/drivers/usb/emul/sandbox_keyb.c b/drivers/usb/emul/sandbox_keyb.c +index 5ec1e98e4..d1f95586a 100644 +--- a/drivers/usb/emul/sandbox_keyb.c ++++ b/drivers/usb/emul/sandbox_keyb.c +@@ -179,7 +179,7 @@ static int sandbox_keyb_control(struct udevice *dev, struct usb_device *udev, + unsigned long pipe, void *buff, int len, + struct devrequest *setup) + { +- debug("pipe=%lx\n", pipe); ++printf("pipe=%lx\n", pipe); + + return -EIO; + } +diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c +index f5d98b917..fd3b25b5f 100644 +--- a/drivers/usb/emul/usb-emul-uclass.c ++++ b/drivers/usb/emul/usb-emul-uclass.c +@@ -53,7 +53,7 @@ static int usb_emul_get_string(struct usb_string *strings, int index, + struct usb_generic_descriptor **usb_emul_find_descriptor( + struct usb_generic_descriptor **ptr, int type, int index) + { +- debug("%s: type=%x, index=%d\n", __func__, type, index); ++printf("%s: type=%x, index=%d\n", __func__, type, index); + for (; *ptr; ptr++) { + if ((*ptr)->bDescriptorType != type) + continue; +@@ -70,7 +70,7 @@ struct usb_generic_descriptor **usb_emul_find_descriptor( + return ptr; + } + } +- debug("%s: config ptr=%p\n", __func__, *ptr); ++printf("%s: config ptr=%p\n", __func__, *ptr); + + return ptr; + } +@@ -83,7 +83,7 @@ static int usb_emul_get_descriptor(struct usb_dev_plat *plat, int value, + int index = value & 0xff; + int upto, todo; + +- debug("%s: type=%d, index=%d, plat=%p\n", __func__, type, index, plat); ++printf("%s: type=%d, index=%d, plat=%p\n", __func__, type, index, plat); + if (type == USB_DT_STRING) { + return usb_emul_get_string(plat->strings, index, buffer, + length); +@@ -91,7 +91,7 @@ static int usb_emul_get_descriptor(struct usb_dev_plat *plat, int value, + + ptr = usb_emul_find_descriptor(plat->desc_list, type, index); + if (!ptr) { +- debug("%s: Could not find descriptor type %d, index %d\n", ++printf("%s: Could not find descriptor type %d, index %d\n", + __func__, type, index); + return -ENOENT; + } +@@ -134,7 +134,7 @@ static int usb_emul_find_devnum(int devnum, int port1, struct udevice **emulp) + * in the system. + */ + if (device_get_uclass_id(dev->parent) == UCLASS_USB) { +- debug("%s: Found emulator '%s'\n", ++printf("%s: Found emulator '%s'\n", + __func__, dev->name); + *emulp = dev; + return 0; +@@ -142,20 +142,20 @@ static int usb_emul_find_devnum(int devnum, int port1, struct udevice **emulp) + + plat = dev_get_uclass_plat(dev); + if (plat->port1 == port1) { +- debug("%s: Found emulator '%s', port %d\n", ++printf("%s: Found emulator '%s', port %d\n", + __func__, dev->name, port1); + *emulp = dev; + return 0; + } + } else if (udev->devnum == devnum) { +- debug("%s: Found emulator '%s', addr %d\n", __func__, ++printf("%s: Found emulator '%s', addr %d\n", __func__, + dev->name, udev->devnum); + *emulp = dev; + return 0; + } + } + +- debug("%s: No emulator found, addr %d\n", __func__, devnum); ++printf("%s: No emulator found, addr %d\n", __func__, devnum); + return -ENOENT; + } + +@@ -186,7 +186,7 @@ int usb_emul_control(struct udevice *emul, struct usb_device *udev, + plat = dev_get_parent_plat(emul); + if (!ops->control) + return -ENOSYS; +- debug("%s: dev=%s\n", __func__, emul->name); ++printf("%s: dev=%s\n", __func__, emul->name); + if (pipe == usb_rcvctrlpipe(udev, 0)) { + switch (setup->request) { + case USB_REQ_GET_DESCRIPTOR: { +@@ -203,12 +203,12 @@ int usb_emul_control(struct udevice *emul, struct usb_device *udev, + } else if (pipe == usb_snddefctrl(udev)) { + switch (setup->request) { + case USB_REQ_SET_ADDRESS: +- debug(" ** set address %s %d\n", emul->name, ++printf(" ** set address %s %d\n", emul->name, + setup->value); + plat->devnum = setup->value; + return 0; + default: +- debug("requestsend =%x\n", setup->request); ++printf("requestsend =%x\n", setup->request); + break; + } + } else if (pipe == usb_sndctrlpipe(udev, 0)) { +@@ -224,7 +224,7 @@ int usb_emul_control(struct udevice *emul, struct usb_device *udev, + setup); + } + } +- debug("pipe=%lx\n", pipe); ++printf("pipe=%lx\n", pipe); + + return -EIO; + } +@@ -238,7 +238,7 @@ int usb_emul_bulk(struct udevice *emul, struct usb_device *udev, + /* We permit getting the descriptor before we are probed */ + if (!ops->bulk) + return -ENOSYS; +- debug("%s: dev=%s\n", __func__, emul->name); ++printf("%s: dev=%s\n", __func__, emul->name); + ret = device_probe(emul); + if (ret) + return ret; +@@ -253,7 +253,7 @@ int usb_emul_int(struct udevice *emul, struct usb_device *udev, + + if (!ops->interrupt) + return -ENOSYS; +- debug("%s: dev=%s\n", __func__, emul->name); ++printf("%s: dev=%s\n", __func__, emul->name); + + return ops->interrupt(emul, udev, pipe, buffer, length, interval, + nonblock); +@@ -273,11 +273,11 @@ int usb_emul_setup_device(struct udevice *dev, struct usb_string *strings, + /* Fill in wTotalLength for each configuration descriptor */ + ptr = plat->desc_list; + for (cdesc = NULL, upto = 0; *ptr; upto += (*ptr)->bLength, ptr++) { +- debug(" - upto=%d, type=%d\n", upto, (*ptr)->bDescriptorType); ++printf(" - upto=%d, type=%d\n", upto, (*ptr)->bDescriptorType); + if ((*ptr)->bDescriptorType == USB_DT_CONFIG) { + if (cdesc) { + cdesc->wTotalLength = upto; +- debug("%s: config %d length %d\n", __func__, ++printf("%s: config %d length %d\n", __func__, + cdesc->bConfigurationValue, + cdesc->bLength); + } +@@ -287,7 +287,7 @@ int usb_emul_setup_device(struct udevice *dev, struct usb_string *strings, + } + if (cdesc) { + cdesc->wTotalLength = upto; +- debug("%s: config %d length %d\n", __func__, ++printf("%s: config %d length %d\n", __func__, + cdesc->bConfigurationValue, cdesc->wTotalLength); + } + +diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c +index 674f78e21..cee24fd87 100644 +--- a/drivers/usb/eth/asix.c ++++ b/drivers/usb/eth/asix.c +@@ -119,7 +119,7 @@ static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index, + { + int len; + +- debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x " ++printf("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x " + "size=%d\n", cmd, value, index, size); + + len = usb_control_msg( +@@ -141,7 +141,7 @@ static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index, + { + int len; + +- debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", ++printf("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", + cmd, value, index, size); + + len = usb_control_msg( +@@ -163,7 +163,7 @@ static inline int asix_set_sw_mii(struct ueth_data *dev) + + ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); + if (ret < 0) +- debug("Failed to enable software MII access\n"); ++printf("Failed to enable software MII access\n"); + return ret; + } + +@@ -173,7 +173,7 @@ static inline int asix_set_hw_mii(struct ueth_data *dev) + + ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); + if (ret < 0) +- debug("Failed to enable hardware MII access\n"); ++printf("Failed to enable hardware MII access\n"); + return ret; + } + +@@ -185,7 +185,7 @@ static int asix_mdio_read(struct ueth_data *dev, int phy_id, int loc) + asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, res); + asix_set_hw_mii(dev); + +- debug("asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", ++printf("asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", + phy_id, loc, le16_to_cpu(*res)); + + return le16_to_cpu(*res); +@@ -197,7 +197,7 @@ asix_mdio_write(struct ueth_data *dev, int phy_id, int loc, int val) + ALLOC_CACHE_ALIGN_BUFFER(__le16, res, 1); + *res = cpu_to_le16(val); + +- debug("asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", ++printf("asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", + phy_id, loc, val); + asix_set_sw_mii(dev); + asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, res); +@@ -213,7 +213,7 @@ static int asix_sw_reset(struct ueth_data *dev, u8 flags) + + ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL); + if (ret < 0) +- debug("Failed to send software reset: %02x\n", ret); ++printf("Failed to send software reset: %02x\n", ret); + else + udelay(150 * 1000); + +@@ -226,13 +226,13 @@ static inline int asix_get_phy_addr(struct ueth_data *dev) + + int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf); + +- debug("asix_get_phy_addr()\n"); ++printf("asix_get_phy_addr()\n"); + + if (ret < 0) { +- debug("Error reading PHYID register: %02x\n", ret); ++printf("Error reading PHYID register: %02x\n", ret); + goto out; + } +- debug("asix_get_phy_addr() returning 0x%02x%02x\n", buf[0], buf[1]); ++printf("asix_get_phy_addr() returning 0x%02x%02x\n", buf[0], buf[1]); + ret = buf[1]; + + out: +@@ -243,11 +243,11 @@ static int asix_write_medium_mode(struct ueth_data *dev, u16 mode) + { + int ret; + +- debug("asix_write_medium_mode() - mode = 0x%04x\n", mode); ++printf("asix_write_medium_mode() - mode = 0x%04x\n", mode); + ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, + 0, 0, NULL); + if (ret < 0) { +- debug("Failed to write Medium Mode mode to 0x%04x: %02x\n", ++printf("Failed to write Medium Mode mode to 0x%04x: %02x\n", + mode, ret); + } + return ret; +@@ -260,7 +260,7 @@ static u16 asix_read_rx_ctl(struct ueth_data *dev) + int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, v); + + if (ret < 0) +- debug("Error reading RX_CTL register: %02x\n", ret); ++printf("Error reading RX_CTL register: %02x\n", ret); + else + ret = le16_to_cpu(*v); + return ret; +@@ -270,10 +270,10 @@ static int asix_write_rx_ctl(struct ueth_data *dev, u16 mode) + { + int ret; + +- debug("asix_write_rx_ctl() - mode = 0x%04x\n", mode); ++printf("asix_write_rx_ctl() - mode = 0x%04x\n", mode); + ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); + if (ret < 0) { +- debug("Failed to write RX_CTL mode to 0x%04x: %02x\n", ++printf("Failed to write RX_CTL mode to 0x%04x: %02x\n", + mode, ret); + } + return ret; +@@ -283,10 +283,10 @@ static int asix_write_gpio(struct ueth_data *dev, u16 value, int sleep) + { + int ret; + +- debug("asix_write_gpio() - value = 0x%04x\n", value); ++printf("asix_write_gpio() - value = 0x%04x\n", value); + ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL); + if (ret < 0) { +- debug("Failed to write GPIO value 0x%04x: %02x\n", ++printf("Failed to write GPIO value 0x%04x: %02x\n", + value, ret); + } + if (sleep) +@@ -304,7 +304,7 @@ static int asix_write_hwaddr_common(struct ueth_data *dev, uint8_t *enetaddr) + + ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, buf); + if (ret < 0) +- debug("Failed to set MAC address: %02x\n", ret); ++printf("Failed to set MAC address: %02x\n", ret); + + return ret; + } +@@ -345,7 +345,7 @@ static int asix_read_mac_common(struct ueth_data *dev, + for (i = 0; i < (ETH_ALEN >> 1); i++) { + if (asix_read_cmd(dev, AX_CMD_READ_EEPROM, + 0x04 + i, 0, 2, buf) < 0) { +- debug("Failed to read SROM address 04h.\n"); ++printf("Failed to read SROM address 04h.\n"); + return -1; + } + memcpy(enetaddr + i * 2, buf, 2); +@@ -353,7 +353,7 @@ static int asix_read_mac_common(struct ueth_data *dev, + } else { + if (asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf) + < 0) { +- debug("Failed to read MAC address.\n"); ++printf("Failed to read MAC address.\n"); + return -1; + } + memcpy(enetaddr, buf, ETH_ALEN); +@@ -375,7 +375,7 @@ static int asix_basic_reset(struct ueth_data *dev) + embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0); + if (asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, + embd_phy, 0, 0, NULL) < 0) { +- debug("Select PHY #1 failed\n"); ++printf("Select PHY #1 failed\n"); + return -1; + } + +@@ -394,16 +394,16 @@ static int asix_basic_reset(struct ueth_data *dev) + } + + rx_ctl = asix_read_rx_ctl(dev); +- debug("RX_CTL is 0x%04x after software reset\n", rx_ctl); ++printf("RX_CTL is 0x%04x after software reset\n", rx_ctl); + if (asix_write_rx_ctl(dev, 0x0000) < 0) + return -1; + + rx_ctl = asix_read_rx_ctl(dev); +- debug("RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl); ++printf("RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl); + + dev->phy_id = asix_get_phy_addr(dev); + if (dev->phy_id < 0) +- debug("Failed to read phy id\n"); ++printf("Failed to read phy id\n"); + + asix_mdio_write(dev, dev->phy_id, MII_BMCR, BMCR_RESET); + asix_mdio_write(dev, dev->phy_id, MII_ADVERTISE, +@@ -416,7 +416,7 @@ static int asix_basic_reset(struct ueth_data *dev) + if (asix_write_cmd(dev, AX_CMD_WRITE_IPG0, + AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, + AX88772_IPG2_DEFAULT, 0, NULL) < 0) { +- debug("Write IPG,IPG1,IPG2 failed\n"); ++printf("Write IPG,IPG1,IPG2 failed\n"); + return -1; + } + +@@ -429,7 +429,7 @@ static int asix_init_common(struct ueth_data *dev, uint8_t *enetaddr) + #define TIMEOUT_RESOLUTION 50 /* ms */ + int link_detected; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + + if (asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL) < 0) + goto out_err; +@@ -474,7 +474,7 @@ static int asix_send_common(struct ueth_data *dev, void *packet, int length) + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, + PKTSIZE + sizeof(packet_len)); + +- debug("** %s(), len %d\n", __func__, length); ++printf("** %s(), len %d\n", __func__, length); + + packet_len = (((length) ^ 0x0000ffff) << 16) + (length); + cpu_to_le32s(&packet_len); +@@ -488,7 +488,7 @@ static int asix_send_common(struct ueth_data *dev, void *packet, int length) + length + sizeof(packet_len), + &actual_len, + USB_BULK_SEND_TIMEOUT); +- debug("Tx: len = %zu, actual = %u, err = %d\n", ++printf("Tx: len = %zu, actual = %u, err = %d\n", + length + sizeof(packet_len), actual_len, err); + + return err; +@@ -521,7 +521,7 @@ static int asix_recv(struct eth_device *eth) + int actual_len; + u32 packet_len; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + + err = usb_bulk_msg(dev->pusb_dev, + usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), +@@ -529,14 +529,14 @@ static int asix_recv(struct eth_device *eth) + AX_RX_URB_SIZE, + &actual_len, + USB_BULK_RECV_TIMEOUT); +- debug("Rx: len = %u, actual = %u, err = %d\n", AX_RX_URB_SIZE, ++printf("Rx: len = %u, actual = %u, err = %d\n", AX_RX_URB_SIZE, + actual_len, err); + if (err != 0) { +- debug("Rx: failed to receive\n"); ++printf("Rx: failed to receive\n"); + return -1; + } + if (actual_len > AX_RX_URB_SIZE) { +- debug("Rx: received too many bytes %d\n", actual_len); ++printf("Rx: received too many bytes %d\n", actual_len); + return -1; + } + +@@ -547,20 +547,20 @@ static int asix_recv(struct eth_device *eth) + * complementary 16-bit words. Extract the length of the data. + */ + if (actual_len < sizeof(packet_len)) { +- debug("Rx: incomplete packet length\n"); ++printf("Rx: incomplete packet length\n"); + return -1; + } + memcpy(&packet_len, buf_ptr, sizeof(packet_len)); + le32_to_cpus(&packet_len); + if (((~packet_len >> 16) & 0x7ff) != (packet_len & 0x7ff)) { +- debug("Rx: malformed packet length: %#x (%#x:%#x)\n", ++printf("Rx: malformed packet length: %#x (%#x:%#x)\n", + packet_len, (~packet_len >> 16) & 0x7ff, + packet_len & 0x7ff); + return -1; + } + packet_len = packet_len & 0x7ff; + if (packet_len > actual_len - sizeof(packet_len)) { +- debug("Rx: too large packet: %d\n", packet_len); ++printf("Rx: too large packet: %d\n", packet_len); + return -1; + } + +@@ -580,7 +580,7 @@ static int asix_recv(struct eth_device *eth) + + static void asix_halt(struct eth_device *eth) + { +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + } + + static int asix_write_hwaddr(struct eth_device *eth) +@@ -649,7 +649,7 @@ int asix_eth_probe(struct usb_device *dev, unsigned int ifnum, + memset(ss, 0, sizeof(struct ueth_data)); + + /* At this point, we know we've got a live one */ +- debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n", ++printf("\n\nUSB Ethernet device detected: %#04x:%#04x\n", + dev->descriptor.idVendor, dev->descriptor.idProduct); + + /* Initialize the ueth_data structure with some useful info */ +@@ -697,13 +697,13 @@ int asix_eth_probe(struct usb_device *dev, unsigned int ifnum, + ss->irqinterval = iface->ep_desc[i].bInterval; + } + } +- debug("Endpoints In %d Out %d Int %d\n", ++printf("Endpoints In %d Out %d Int %d\n", + ss->ep_in, ss->ep_out, ss->ep_int); + + /* Do some basic sanity checks, and bail if we find a problem */ + if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || + !ss->ep_in || !ss->ep_out || !ss->ep_int) { +- debug("Problems with device\n"); ++printf("Problems with device\n"); + return 0; + } + dev->privptr = (void *)ss; +@@ -716,7 +716,7 @@ int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct asix_private *priv = (struct asix_private *)ss->dev_priv; + + if (!eth) { +- debug("%s: missing parameter.\n", __func__); ++printf("%s: missing parameter.\n", __func__); + return 0; + } + sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++); +@@ -734,7 +734,7 @@ int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + /* Get the MAC address */ + if (asix_read_mac_common(ss, priv, eth->enetaddr)) + return 0; +- debug("MAC %pM\n", eth->enetaddr); ++printf("MAC %pM\n", eth->enetaddr); + + return 1; + } +@@ -751,7 +751,7 @@ static int asix_eth_start(struct udevice *dev) + + void asix_eth_stop(struct udevice *dev) + { +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + } + + int asix_eth_send(struct udevice *dev, void *packet, int length) +@@ -770,7 +770,7 @@ int asix_eth_recv(struct udevice *dev, int flags, uchar **packetp) + u32 packet_len; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: first try, len=%d\n", __func__, len); ++printf("%s: first try, len=%d\n", __func__, len); + if (!len) { + if (!(flags & ETH_RECV_CHECK_DEVICE)) + return -EAGAIN; +@@ -779,7 +779,7 @@ int asix_eth_recv(struct udevice *dev, int flags, uchar **packetp) + return ret; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: second try, len=%d\n", __func__, len); ++printf("%s: second try, len=%d\n", __func__, len); + } + + /* +@@ -787,20 +787,20 @@ int asix_eth_recv(struct udevice *dev, int flags, uchar **packetp) + * complementary 16-bit words. Extract the length of the data. + */ + if (len < sizeof(packet_len)) { +- debug("Rx: incomplete packet length\n"); ++printf("Rx: incomplete packet length\n"); + goto err; + } + memcpy(&packet_len, ptr, sizeof(packet_len)); + le32_to_cpus(&packet_len); + if (((~packet_len >> 16) & 0x7ff) != (packet_len & 0x7ff)) { +- debug("Rx: malformed packet length: %#x (%#x:%#x)\n", ++printf("Rx: malformed packet length: %#x (%#x:%#x)\n", + packet_len, (~packet_len >> 16) & 0x7ff, + packet_len & 0x7ff); + goto err; + } + packet_len = packet_len & 0x7ff; + if (packet_len > len - sizeof(packet_len)) { +- debug("Rx: too large packet: %d\n", packet_len); ++printf("Rx: too large packet: %d\n", packet_len); + goto err; + } + +@@ -854,7 +854,7 @@ static int asix_eth_probe(struct udevice *dev) + ret = asix_read_mac_common(ss, priv, pdata->enetaddr); + if (ret) + goto err; +- debug("MAC %pM\n", pdata->enetaddr); ++printf("MAC %pM\n", pdata->enetaddr); + + return 0; + +diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c +index 4742a95af..de27c5969 100644 +--- a/drivers/usb/eth/asix88179.c ++++ b/drivers/usb/eth/asix88179.c +@@ -225,7 +225,7 @@ static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index, + int len; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size); + +- debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", ++printf("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", + cmd, value, index, size); + + memcpy(buf, data, size); +@@ -250,7 +250,7 @@ static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index, + int len; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size); + +- debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", ++printf("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", + cmd, value, index, size); + + len = usb_control_msg( +@@ -275,7 +275,7 @@ static int asix_read_mac(struct ueth_data *dev, uint8_t *enetaddr) + + ret = asix_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, 6, 6, enetaddr); + if (ret < 0) +- debug("Failed to read MAC address: %02x\n", ret); ++printf("Failed to read MAC address: %02x\n", ret); + + return ret; + } +@@ -287,7 +287,7 @@ static int asix_write_mac(struct ueth_data *dev, uint8_t *enetaddr) + ret = asix_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, + ETH_ALEN, enetaddr); + if (ret < 0) +- debug("Failed to set MAC address: %02x\n", ret); ++printf("Failed to set MAC address: %02x\n", ret); + + return ret; + } +@@ -402,7 +402,7 @@ static int asix_init_common(struct ueth_data *dev, + + tmp16 = (u16 *)buf; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + + /* Configure RX control register => start operation */ + *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START | +@@ -475,7 +475,7 @@ static int asix_send_common(struct ueth_data *dev, + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, + PKTSIZE + (2 * sizeof(packet_len))); + +- debug("** %s(), len %d\n", __func__, length); ++printf("** %s(), len %d\n", __func__, length); + + packet_len = length; + cpu_to_le32s(&packet_len); +@@ -499,7 +499,7 @@ static int asix_send_common(struct ueth_data *dev, + length + sizeof(packet_len) + sizeof(tx_hdr2), + &actual_len, + USB_BULK_SEND_TIMEOUT); +- debug("Tx: len = %zu, actual = %u, err = %d\n", ++printf("Tx: len = %zu, actual = %u, err = %d\n", + length + sizeof(packet_len), actual_len, err); + + return err; +@@ -549,7 +549,7 @@ static int asix_recv(struct eth_device *eth) + + actual_len = -1; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + + err = usb_bulk_msg(dev->pusb_dev, + usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), +@@ -557,15 +557,15 @@ static int asix_recv(struct eth_device *eth) + dev_priv->rx_urb_size, + &actual_len, + USB_BULK_RECV_TIMEOUT); +- debug("Rx: len = %u, actual = %u, err = %d\n", dev_priv->rx_urb_size, ++printf("Rx: len = %u, actual = %u, err = %d\n", dev_priv->rx_urb_size, + actual_len, err); + + if (err != 0) { +- debug("Rx: failed to receive\n"); ++printf("Rx: failed to receive\n"); + return -ECOMM; + } + if (actual_len > dev_priv->rx_urb_size) { +- debug("Rx: received too many bytes %d\n", actual_len); ++printf("Rx: received too many bytes %d\n", actual_len); + return -EMSGSIZE; + } + +@@ -601,7 +601,7 @@ static int asix_recv(struct eth_device *eth) + + static void asix_halt(struct eth_device *eth) + { +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + } + + /* +@@ -656,7 +656,7 @@ int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum, + memset(ss, 0, sizeof(struct ueth_data)); + + /* At this point, we know we've got a live one */ +- debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n", ++printf("\n\nUSB Ethernet device detected: %#04x:%#04x\n", + dev->descriptor.idVendor, dev->descriptor.idProduct); + + /* Initialize the ueth_data structure with some useful info */ +@@ -705,13 +705,13 @@ int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum, + ep_out_found = 1; + } + } +- debug("Endpoints In %d Out %d Int %d\n", ++printf("Endpoints In %d Out %d Int %d\n", + ss->ep_in, ss->ep_out, ss->ep_int); + + /* Do some basic sanity checks, and bail if we find a problem */ + if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || + !ss->ep_in || !ss->ep_out || !ss->ep_int) { +- debug("Problems with device\n"); ++printf("Problems with device\n"); + return 0; + } + dev->privptr = (void *)ss; +@@ -724,7 +724,7 @@ int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct asix_private *dev_priv = (struct asix_private *)ss->dev_priv; + + if (!eth) { +- debug("%s: missing parameter.\n", __func__); ++printf("%s: missing parameter.\n", __func__); + return 0; + } + sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++); +@@ -741,7 +741,7 @@ int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + /* Get the MAC address */ + if (asix_read_mac(ss, eth->enetaddr)) + return 0; +- debug("MAC %pM\n", eth->enetaddr); ++printf("MAC %pM\n", eth->enetaddr); + + return 1; + } +@@ -760,7 +760,7 @@ void ax88179_eth_stop(struct udevice *dev) + struct asix_private *priv = dev_get_priv(dev); + struct ueth_data *ueth = &priv->ueth; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + + usb_ether_advance_rxbuf(ueth, -1); + priv->pkt_cnt = 0; +@@ -790,7 +790,7 @@ int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp) + u32 rx_hdr; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: first try, len=%d\n", __func__, len); ++printf("%s: first try, len=%d\n", __func__, len); + if (!len) { + if (!(flags & ETH_RECV_CHECK_DEVICE)) + return -EAGAIN; +@@ -800,7 +800,7 @@ int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp) + return ret; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: second try, len=%d\n", __func__, len); ++printf("%s: second try, len=%d\n", __func__, len); + } + + if (len < 4) { +@@ -826,7 +826,7 @@ int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp) + priv->pkt_cnt = pkt_cnt; + priv->pkt_data = ptr; + priv->pkt_hdr = (u32 *)(ptr + hdr_off); +- debug("%s: %d packets received, pkt header at %d\n", ++printf("%s: %d packets received, pkt header at %d\n", + __func__, (int)priv->pkt_cnt, (int)hdr_off); + } + +@@ -839,7 +839,7 @@ int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp) + priv->pkt_cnt--; + priv->pkt_hdr++; + +- debug("%s: return packet of %d bytes (%d packets left)\n", ++printf("%s: return packet of %d bytes (%d packets left)\n", + __func__, (int)pkt_len, priv->pkt_cnt); + return pkt_len; + } +@@ -883,7 +883,7 @@ static int ax88179_eth_probe(struct udevice *dev) + ret = asix_read_mac(&priv->ueth, pdata->enetaddr); + if (ret) + return ret; +- debug("MAC %pM\n", pdata->enetaddr); ++printf("MAC %pM\n", pdata->enetaddr); + + return 0; + } +diff --git a/drivers/usb/eth/lan75xx.c b/drivers/usb/eth/lan75xx.c +index 4effbc5c8..e7a6cf22e 100644 +--- a/drivers/usb/eth/lan75xx.c ++++ b/drivers/usb/eth/lan75xx.c +@@ -118,7 +118,7 @@ static int lan75xx_basic_reset(struct usb_device *udev, + ret = lan7x_read_reg(udev, ID_REV, &val); + if (ret) + return ret; +- debug("LAN75xx ID_REV = 0x%08x\n", val); ++printf("LAN75xx ID_REV = 0x%08x\n", val); + + priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16; + +@@ -157,7 +157,7 @@ int lan75xx_write_hwaddr(struct udevice *dev) + if (ret) + return ret; + +- debug("MAC addr %pM written\n", enetaddr); ++printf("MAC addr %pM written\n", enetaddr); + + return 0; + } +diff --git a/drivers/usb/eth/lan78xx.c b/drivers/usb/eth/lan78xx.c +index 37912a1d0..bb6d08520 100644 +--- a/drivers/usb/eth/lan78xx.c ++++ b/drivers/usb/eth/lan78xx.c +@@ -156,7 +156,7 @@ static int lan78xx_read_otp(struct usb_device *udev, u32 offset, + if (ret) + return ret; + } +- debug("LAN78x: MAC address from OTP = %pM\n", data); ++printf("LAN78x: MAC address from OTP = %pM\n", data); + + return ret; + } +@@ -174,10 +174,10 @@ static int lan78xx_read_otp_mac(unsigned char *enetaddr, + enetaddr); + if (!ret && is_valid_ethaddr(enetaddr)) { + /* eeprom values are valid so use them */ +- debug("MAC address read from OTP %pM\n", enetaddr); ++printf("MAC address read from OTP %pM\n", enetaddr); + return 0; + } +- debug("MAC address read from OTP invalid %pM\n", enetaddr); ++printf("MAC address read from OTP invalid %pM\n", enetaddr); + + memset(enetaddr, 0, 6); + return -EINVAL; +@@ -291,7 +291,7 @@ static int lan78xx_basic_reset(struct usb_device *udev, + ret = lan7x_read_reg(udev, ID_REV, &val); + if (ret) + return ret; +- debug("LAN78xx ID_REV = 0x%08x\n", val); ++printf("LAN78xx ID_REV = 0x%08x\n", val); + + priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16; + +@@ -330,7 +330,7 @@ int lan78xx_write_hwaddr(struct udevice *dev) + if (ret) + return ret; + +- debug("MAC addr %pM written\n", enetaddr); ++printf("MAC addr %pM written\n", enetaddr); + + return 0; + } +diff --git a/drivers/usb/eth/lan7x.c b/drivers/usb/eth/lan7x.c +index 0a283619a..f3ea817cf 100644 +--- a/drivers/usb/eth/lan7x.c ++++ b/drivers/usb/eth/lan7x.c +@@ -32,7 +32,7 @@ int lan7x_write_reg(struct usb_device *udev, u32 index, u32 data) + 0, index, tmpbuf, sizeof(data), + USB_CTRL_SET_TIMEOUT_MS); + if (len != sizeof(data)) { +- debug("%s failed: index=%d, data=%d, len=%d", ++printf("%s failed: index=%d, data=%d, len=%d", + __func__, index, data, len); + return -EIO; + } +@@ -51,7 +51,7 @@ int lan7x_read_reg(struct usb_device *udev, u32 index, u32 *data) + USB_CTRL_GET_TIMEOUT_MS); + *data = tmpbuf[0]; + if (len != sizeof(*data)) { +- debug("%s failed: index=%d, len=%d", __func__, index, len); ++printf("%s failed: index=%d, len=%d", __func__, index, len); + return -EIO; + } + +@@ -72,7 +72,7 @@ int lan7x_mdio_read(struct usb_device *udev, int phy_id, int idx) + + /* confirm MII not busy */ + if (lan7x_phy_wait_not_busy(udev)) { +- debug("MII is busy in %s\n", __func__); ++printf("MII is busy in %s\n", __func__); + return -ETIMEDOUT; + } + +@@ -82,7 +82,7 @@ int lan7x_mdio_read(struct usb_device *udev, int phy_id, int idx) + lan7x_write_reg(udev, MII_ACC, addr); + + if (lan7x_phy_wait_not_busy(udev)) { +- debug("Timed out reading MII reg %02X\n", idx); ++printf("Timed out reading MII reg %02X\n", idx); + return -ETIMEDOUT; + } + +@@ -97,7 +97,7 @@ void lan7x_mdio_write(struct usb_device *udev, int phy_id, int idx, int regval) + + /* confirm MII not busy */ + if (lan7x_phy_wait_not_busy(udev)) { +- debug("MII is busy in %s\n", __func__); ++printf("MII is busy in %s\n", __func__); + return; + } + +@@ -109,7 +109,7 @@ void lan7x_mdio_write(struct usb_device *udev, int phy_id, int idx, int regval) + lan7x_write_reg(udev, MII_ACC, addr); + + if (lan7x_phy_wait_not_busy(udev)) +- debug("Timed out writing MII reg %02X\n", idx); ++printf("Timed out writing MII reg %02X\n", idx); + } + + /* +@@ -254,7 +254,7 @@ int lan7x_eth_phylib_config_start(struct udevice *udev) + return ret; + } + +- debug("** %s() speed %i duplex %i adv %X supp %X\n", __func__, ++printf("** %s() speed %i duplex %i adv %X supp %X\n", __func__, + priv->phydev->speed, priv->phydev->duplex, + priv->phydev->advertising, priv->phydev->supported); + +@@ -269,8 +269,8 @@ int lan7x_update_flowcontrol(struct usb_device *udev, + u8 cap = 0; + struct lan7x_private *priv = dev_get_priv(udev->dev); + +- debug("** %s()\n", __func__); +- debug("** %s() priv->phydev->speed %i duplex %i\n", __func__, ++printf("** %s()\n", __func__); ++printf("** %s() priv->phydev->speed %i duplex %i\n", __func__, + priv->phydev->speed, priv->phydev->duplex); + + if (priv->phydev->duplex == DUPLEX_FULL) { +@@ -278,7 +278,7 @@ int lan7x_update_flowcontrol(struct usb_device *udev, + rmtadv = lan7x_mdio_read(udev, dev->phy_id, MII_LPA); + cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); + +- debug("TX Flow "); ++printf("TX Flow "); + if (cap & FLOW_CTRL_TX) { + *flow = (FLOW_CR_TX_FCEN | 0xFFFF); + /* set fct_flow thresholds to 20% and 80% */ +@@ -287,19 +287,19 @@ int lan7x_update_flowcontrol(struct usb_device *udev, + *fct_flow <<= 8UL; + *fct_flow |= ((MAX_RX_FIFO_SIZE * 8) / (10 * 512)) + & 0x7FUL; +- debug("EN "); ++printf("EN "); + } else { +- debug("DIS "); ++printf("DIS "); + } +- debug("RX Flow "); ++printf("RX Flow "); + if (cap & FLOW_CTRL_RX) { + *flow |= FLOW_CR_RX_FCEN; +- debug("EN"); ++printf("EN"); + } else { +- debug("DIS"); ++printf("DIS"); + } + } +- debug("\n"); ++printf("\n"); + return 0; + } + +@@ -317,12 +317,12 @@ int lan7x_read_eeprom_mac(unsigned char *enetaddr, struct usb_device *udev) + enetaddr); + if ((ret == 0) && is_valid_ethaddr(enetaddr)) { + /* eeprom values are valid so use them */ +- debug("MAC address read from EEPROM %pM\n", ++printf("MAC address read from EEPROM %pM\n", + enetaddr); + return 0; + } + } +- debug("MAC address read from EEPROM invalid %pM\n", enetaddr); ++printf("MAC address read from EEPROM invalid %pM\n", enetaddr); + + memset(enetaddr, 0, 6); + return -EINVAL; +@@ -370,14 +370,14 @@ int lan7x_basic_reset(struct usb_device *udev, + if (ret) + return ret; + +- debug("USB devnum %d portnr %d\n", udev->devnum, udev->portnr); ++printf("USB devnum %d portnr %d\n", udev->devnum, udev->portnr); + + return lan7x_pmt_phy_reset(udev, dev); + } + + void lan7x_eth_stop(struct udevice *dev) + { +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + } + + int lan7x_eth_send(struct udevice *dev, void *packet, int length) +@@ -391,7 +391,7 @@ int lan7x_eth_send(struct udevice *dev, void *packet, int length) + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, + PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)); + +- debug("** %s(), len %d, buf %#x\n", __func__, length, ++printf("** %s(), len %d, buf %#x\n", __func__, length, + (unsigned int)(ulong) msg); + if (length > PKTSIZE) + return -ENOSPC; +@@ -413,7 +413,7 @@ int lan7x_eth_send(struct udevice *dev, void *packet, int length) + length + sizeof(tx_cmd_a) + + sizeof(tx_cmd_b), + &actual_len, USB_BULK_SEND_TIMEOUT_MS); +- debug("Tx: len = %u, actual = %u, err = %d\n", ++printf("Tx: len = %u, actual = %u, err = %d\n", + (unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)), + (unsigned int)actual_len, err); + +@@ -430,7 +430,7 @@ int lan7x_eth_recv(struct udevice *dev, int flags, uchar **packetp) + u32 rx_cmd_a = 0; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: first try, len=%d\n", __func__, len); ++printf("%s: first try, len=%d\n", __func__, len); + if (!len) { + if (!(flags & ETH_RECV_CHECK_DEVICE)) + return -EAGAIN; +@@ -439,7 +439,7 @@ int lan7x_eth_recv(struct udevice *dev, int flags, uchar **packetp) + return ret; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: second try, len=%d\n", __func__, len); ++printf("%s: second try, len=%d\n", __func__, len); + } + + /* +@@ -447,19 +447,19 @@ int lan7x_eth_recv(struct udevice *dev, int flags, uchar **packetp) + * Extract data length. + */ + if (len < sizeof(packet_len)) { +- debug("Rx: incomplete packet length\n"); ++printf("Rx: incomplete packet length\n"); + goto err; + } + memcpy(&rx_cmd_a, ptr, sizeof(rx_cmd_a)); + le32_to_cpus(&rx_cmd_a); + if (rx_cmd_a & RX_CMD_A_RXE) { +- debug("Rx: Error header=%#x", rx_cmd_a); ++printf("Rx: Error header=%#x", rx_cmd_a); + goto err; + } + packet_len = (u16) (rx_cmd_a & RX_CMD_A_LEN_MASK); + + if (packet_len > len - sizeof(packet_len)) { +- debug("Rx: too large packet: %d\n", packet_len); ++printf("Rx: too large packet: %d\n", packet_len); + goto err; + } + +@@ -491,7 +491,7 @@ int lan7x_eth_remove(struct udevice *dev) + { + struct lan7x_private *priv = dev_get_priv(dev); + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + free(priv->phydev); + mdio_unregister(priv->mdiobus); + mdio_free(priv->mdiobus); +diff --git a/drivers/usb/eth/lan7x.h b/drivers/usb/eth/lan7x.h +index f71e8c726..05736b422 100644 +--- a/drivers/usb/eth/lan7x.h ++++ b/drivers/usb/eth/lan7x.h +@@ -160,7 +160,7 @@ static inline int lan7x_wait_for_bit(struct usb_device *udev, + WATCHDOG_RESET(); + } + +- debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg, ++printf("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg, + mask, set); + + return -ETIMEDOUT; +@@ -202,7 +202,7 @@ static inline int lan7x_mdio_wait_for_bit(struct usb_device *udev, + WATCHDOG_RESET(); + } + +- debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg, ++printf("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg, + mask, set); + + return -ETIMEDOUT; +diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c +index 783ab62f6..149e812f3 100644 +--- a/drivers/usb/eth/mcs7830.c ++++ b/drivers/usb/eth/mcs7830.c +@@ -108,7 +108,7 @@ static int mcs7830_read_reg(struct usb_device *udev, uint8_t idx, + int len; + ALLOC_CACHE_ALIGN_BUFFER(uint8_t, buf, size); + +- debug("%s() idx=0x%04X sz=%d\n", __func__, idx, size); ++printf("%s() idx=0x%04X sz=%d\n", __func__, idx, size); + + len = usb_control_msg(udev, + usb_rcvctrlpipe(udev, 0), +@@ -117,7 +117,7 @@ static int mcs7830_read_reg(struct usb_device *udev, uint8_t idx, + 0, idx, buf, size, + USBCALL_TIMEOUT); + if (len != size) { +- debug("%s() len=%d != sz=%d\n", __func__, len, size); ++printf("%s() len=%d != sz=%d\n", __func__, len, size); + return -EIO; + } + memcpy(data, buf, size); +@@ -138,7 +138,7 @@ static int mcs7830_write_reg(struct usb_device *udev, uint8_t idx, + int len; + ALLOC_CACHE_ALIGN_BUFFER(uint8_t, buf, size); + +- debug("%s() idx=0x%04X sz=%d\n", __func__, idx, size); ++printf("%s() idx=0x%04X sz=%d\n", __func__, idx, size); + + memcpy(buf, data, size); + len = usb_control_msg(udev, +@@ -148,7 +148,7 @@ static int mcs7830_write_reg(struct usb_device *udev, uint8_t idx, + 0, idx, buf, size, + USBCALL_TIMEOUT); + if (len != size) { +- debug("%s() len=%d != sz=%d\n", __func__, len, size); ++printf("%s() len=%d != sz=%d\n", __func__, len, size); + return -EIO; + } + return 0; +@@ -211,7 +211,7 @@ static int mcs7830_read_phy(struct usb_device *udev, uint8_t index) + if (rc < 0) + return rc; + rc = le16_to_cpu(val); +- debug("%s(%d) => 0x%04X\n", __func__, index, rc); ++printf("%s(%d) => 0x%04X\n", __func__, index, rc); + return rc; + } + +@@ -227,7 +227,7 @@ static int mcs7830_write_phy(struct usb_device *udev, uint8_t index, + { + int rc; + +- debug("%s(%d, 0x%04X)\n", __func__, index, val); ++printf("%s(%d, 0x%04X)\n", __func__, index, val); + + /* setup the PHY data which is to get written */ + val = cpu_to_le16(val); +@@ -257,12 +257,12 @@ static int mcs7830_write_config(struct usb_device *udev, + { + int rc; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + rc = mcs7830_write_reg(udev, REG_CONFIG, + sizeof(priv->config), &priv->config); + if (rc < 0) { +- debug("writing config to adapter failed\n"); ++printf("writing config to adapter failed\n"); + return rc; + } + +@@ -283,12 +283,12 @@ static int mcs7830_write_mchash(struct usb_device *udev, + { + int rc; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + rc = mcs7830_write_reg(udev, REG_MULTICAST_HASH, + sizeof(priv->mchash), &priv->mchash); + if (rc < 0) { +- debug("writing multicast hash to adapter failed\n"); ++printf("writing multicast hash to adapter failed\n"); + return rc; + } + +@@ -307,7 +307,7 @@ static int mcs7830_set_autoneg(struct usb_device *udev) + int adv, flg; + int rc; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + /* + * algorithm taken from the Linux driver, which took it from +@@ -355,7 +355,7 @@ static int mcs7830_get_rev(struct usb_device *udev) + rev = 1; + else + rev = 2; +- debug("%s() rc=%d, rev=%d\n", __func__, rc, rev); ++printf("%s() rc=%d, rev=%d\n", __func__, rc, rev); + return rev; + } + +@@ -374,7 +374,7 @@ static int mcs7830_apply_fixup(struct usb_device *udev) + uint8_t thr; + + rev = mcs7830_get_rev(udev); +- debug("%s() rev=%d\n", __func__, rev); ++printf("%s() rev=%d\n", __func__, rev); + + /* + * rev C requires setting the pause threshold (the Linux driver +@@ -382,7 +382,7 @@ static int mcs7830_apply_fixup(struct usb_device *udev) + * exactly", the introductory comment says "rev C and above") + */ + if (rev == 2) { +- debug("%s: applying rev C fixup\n", __func__); ++printf("%s: applying rev C fixup\n", __func__); + thr = PAUSE_THRESHOLD_DEFAULT; + for (i = 0; i < 2; i++) { + (void)mcs7830_write_reg(udev, REG_PAUSE_THRESHOLD, +@@ -408,7 +408,7 @@ static int mcs7830_basic_reset(struct usb_device *udev, + { + int rc; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + /* + * comment from the respective Linux driver, which +@@ -459,11 +459,11 @@ static int mcs7830_read_mac(struct usb_device *udev, unsigned char enetaddr[]) + int rc; + uint8_t buf[ETH_ALEN]; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + rc = mcs7830_read_reg(udev, REG_ETHER_ADDR, ETH_ALEN, buf); + if (rc < 0) { +- debug("reading MAC from adapter failed\n"); ++printf("reading MAC from adapter failed\n"); + return rc; + } + +@@ -476,11 +476,11 @@ static int mcs7830_write_mac_common(struct usb_device *udev, + { + int rc; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + rc = mcs7830_write_reg(udev, REG_ETHER_ADDR, ETH_ALEN, enetaddr); + if (rc < 0) { +- debug("writing MAC to adapter failed\n"); ++printf("writing MAC to adapter failed\n"); + return rc; + } + return 0; +@@ -491,7 +491,7 @@ static int mcs7830_init_common(struct usb_device *udev) + int timeout; + int have_link; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + timeout = 0; + do { +@@ -502,7 +502,7 @@ static int mcs7830_init_common(struct usb_device *udev) + timeout += LINKSTATUS_TIMEOUT_RES; + } while (timeout < LINKSTATUS_TIMEOUT); + if (!have_link) { +- debug("ethernet link is down\n"); ++printf("ethernet link is down\n"); + return -ETIMEDOUT; + } + return 0; +@@ -522,7 +522,7 @@ static int mcs7830_send_common(struct ueth_data *ueth, void *packet, + usb_sndbulkpipe(udev, ueth->ep_out), + &buf[0], length, &gotlen, + USBCALL_TIMEOUT); +- debug("%s() TX want len %d, got len %d, rc %d\n", ++printf("%s() TX want len %d, got len %d, rc %d\n", + __func__, length, gotlen, rc); + return rc; + } +@@ -532,7 +532,7 @@ static int mcs7830_recv_common(struct ueth_data *ueth, uint8_t *buf) + int rc, wantlen, gotlen; + uint8_t sts; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + /* fetch input data from the adapter */ + wantlen = MCS7830_RX_URB_SIZE; +@@ -540,7 +540,7 @@ static int mcs7830_recv_common(struct ueth_data *ueth, uint8_t *buf) + usb_rcvbulkpipe(ueth->pusb_dev, ueth->ep_in), + &buf[0], wantlen, &gotlen, + USBCALL_TIMEOUT); +- debug("%s() RX want len %d, got len %d, rc %d\n", ++printf("%s() RX want len %d, got len %d, rc %d\n", + __func__, wantlen, gotlen, rc); + if (rc != 0) { + pr_err("RX: failed to receive\n"); +@@ -561,11 +561,11 @@ static int mcs7830_recv_common(struct ueth_data *ueth, uint8_t *buf) + sts = buf[gotlen]; + + if (sts == STAT_RX_FRAME_CORRECT) { +- debug("%s() got a frame, len=%d\n", __func__, gotlen); ++printf("%s() got a frame, len=%d\n", __func__, gotlen); + return gotlen; + } + +- debug("RX: frame error (sts 0x%02X, %s %s %s %s %s)\n", ++printf("RX: frame error (sts 0x%02X, %s %s %s %s %s)\n", + sts, + (sts & STAT_RX_LARGE_FRAME) ? "large" : "-", + (sts & STAT_RX_LENGTH_ERROR) ? "length" : "-", +@@ -642,7 +642,7 @@ static int mcs7830_recv(struct eth_device *eth) + */ + static void mcs7830_halt(struct eth_device *eth) + { +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + } + + /* +@@ -727,7 +727,7 @@ int mcs7830_eth_probe(struct usb_device *dev, unsigned int ifnum, + struct mcs7830_private *priv; + int ep_in_found, ep_out_found, ep_intr_found; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + /* iterate the list of supported dongles */ + iface = &dev->config.if_desc[ifnum]; +@@ -739,7 +739,7 @@ int mcs7830_eth_probe(struct usb_device *dev, unsigned int ifnum, + } + if (i == ARRAY_SIZE(mcs7830_dongles)) + return 0; +- debug("detected USB ethernet device: %04X:%04X\n", ++printf("detected USB ethernet device: %04X:%04X\n", + dev->descriptor.idVendor, dev->descriptor.idProduct); + + /* fill in driver private data */ +@@ -790,13 +790,13 @@ int mcs7830_eth_probe(struct usb_device *dev, unsigned int ifnum, + } + } + } +- debug("endpoints: in %d, out %d, intr %d\n", ++printf("endpoints: in %d, out %d, intr %d\n", + ss->ep_in, ss->ep_out, ss->ep_int); + + /* apply basic sanity checks */ + if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || + !ss->ep_in || !ss->ep_out || !ss->ep_int) { +- debug("device probe incomplete\n"); ++printf("device probe incomplete\n"); + return 0; + } + +@@ -820,9 +820,9 @@ int mcs7830_eth_probe(struct usb_device *dev, unsigned int ifnum, + int mcs7830_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *eth) + { +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + if (!eth) { +- debug("%s: missing parameter.\n", __func__); ++printf("%s: missing parameter.\n", __func__); + return 0; + } + +@@ -840,7 +840,7 @@ int mcs7830_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + + if (mcs7830_read_mac(ss->pusb_dev, eth->enetaddr)) + return 0; +- debug("MAC %pM\n", eth->enetaddr); ++printf("MAC %pM\n", eth->enetaddr); + + return 1; + } +@@ -857,7 +857,7 @@ static int mcs7830_eth_start(struct udevice *dev) + + void mcs7830_eth_stop(struct udevice *dev) + { +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + } + + int mcs7830_eth_send(struct udevice *dev, void *packet, int length) +diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c +index 4677da9f2..35b993d64 100644 +--- a/drivers/usb/eth/r8152.c ++++ b/drivers/usb/eth/r8152.c +@@ -359,7 +359,7 @@ int r8152_wait_for_bit(struct r8152 *tp, bool ocp_reg, u16 type, u16 index, + mdelay(1); + } + +- debug("%s: Timeout (index=%04x mask=%08x timeout=%d)\n", ++printf("%s: Timeout (index=%04x mask=%08x timeout=%d)\n", + __func__, index, mask, timeout); + + return -ETIMEDOUT; +@@ -383,12 +383,12 @@ static void rtl8152_wait_fifo_empty(struct r8152 *tp) + ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_PHY_PWR, + PLA_PHY_PWR_TXEMP, 1, R8152_WAIT_TIMEOUT); + if (ret) +- debug("Timeout waiting for FIFO empty\n"); ++printf("Timeout waiting for FIFO empty\n"); + + ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_TCR0, + TCR0_TX_EMPTY, 1, R8152_WAIT_TIMEOUT); + if (ret) +- debug("Timeout waiting for TX empty\n"); ++printf("Timeout waiting for TX empty\n"); + } + + static void rtl8152_nic_reset(struct r8152 *tp) +@@ -403,7 +403,7 @@ static void rtl8152_nic_reset(struct r8152 *tp) + ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, BIST_CTRL, + BIST_CTRL_SW_RESET, 0, R8152_WAIT_TIMEOUT); + if (ret) +- debug("Timeout waiting for NIC reset\n"); ++printf("Timeout waiting for NIC reset\n"); + } + + static u8 rtl8152_get_speed(struct r8152 *tp) +@@ -511,7 +511,7 @@ static void r8153_set_rx_early_timeout(struct r8152 *tp) + break; + + default: +- debug("** %s Invalid Device\n", __func__); ++printf("** %s Invalid Device\n", __func__); + break; + } + } +@@ -537,7 +537,7 @@ static void r8153_set_rx_early_size(struct r8152 *tp) + break; + + default: +- debug("** %s Invalid Device\n", __func__); ++printf("** %s Invalid Device\n", __func__); + break; + } + } +@@ -710,7 +710,7 @@ static void rtl8152_reinit_ll(struct r8152 *tp) + ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_PHY_PWR, + PLA_PHY_PWR_LLR, 1, R8152_WAIT_TIMEOUT); + if (ret) +- debug("Timeout waiting for link list ready\n"); ++printf("Timeout waiting for link list ready\n"); + + ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7); + ocp_data |= RE_INIT_LL; +@@ -719,7 +719,7 @@ static void rtl8152_reinit_ll(struct r8152 *tp) + ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_PHY_PWR, + PLA_PHY_PWR_LLR, 1, R8152_WAIT_TIMEOUT); + if (ret) +- debug("Timeout waiting for link list ready\n"); ++printf("Timeout waiting for link list ready\n"); + } + + static void r8152b_exit_oob(struct r8152 *tp) +@@ -1163,7 +1163,7 @@ static void r8152b_get_version(struct r8152 *tp) + } + + if (tp->version == RTL_VER_UNKNOWN) +- debug("r8152 Unknown tcr version 0x%04x\n", tcr); ++printf("r8152 Unknown tcr version 0x%04x\n", tcr); + } + + static void r8152b_enable_fc(struct r8152 *tp) +@@ -1425,7 +1425,7 @@ static int r8152_init_common(struct r8152 *tp) + int timeout = 0; + int link_detected; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + + do { + speed = rtl8152_get_speed(tp); +@@ -1460,7 +1460,7 @@ static int r8152_send_common(struct ueth_data *ueth, void *packet, int length) + PKTSIZE + sizeof(struct tx_desc)); + struct tx_desc *tx_desc = (struct tx_desc *)msg; + +- debug("** %s(), len %d\n", __func__, length); ++printf("** %s(), len %d\n", __func__, length); + + opts1 = length | TX_FS | TX_LS; + +@@ -1472,7 +1472,7 @@ static int r8152_send_common(struct ueth_data *ueth, void *packet, int length) + err = usb_bulk_msg(udev, usb_sndbulkpipe(udev, ueth->ep_out), + (void *)msg, length + sizeof(struct tx_desc), + &actual_len, USB_BULK_SEND_TIMEOUT); +- debug("Tx: len = %zu, actual = %u, err = %d\n", ++printf("Tx: len = %zu, actual = %u, err = %d\n", + length + sizeof(struct tx_desc), actual_len, err); + + return err; +@@ -1507,7 +1507,7 @@ static int r8152_recv(struct eth_device *eth) + u32 bytes_process = 0; + struct rx_desc *rx_desc; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + + err = usb_bulk_msg(dev->pusb_dev, + usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), +@@ -1515,14 +1515,14 @@ static int r8152_recv(struct eth_device *eth) + RTL8152_AGG_BUF_SZ, + &actual_len, + USB_BULK_RECV_TIMEOUT); +- debug("Rx: len = %u, actual = %u, err = %d\n", RTL8152_AGG_BUF_SZ, ++printf("Rx: len = %u, actual = %u, err = %d\n", RTL8152_AGG_BUF_SZ, + actual_len, err); + if (err != 0) { +- debug("Rx: failed to receive\n"); ++printf("Rx: failed to receive\n"); + return -1; + } + if (actual_len > RTL8152_AGG_BUF_SZ) { +- debug("Rx: received too many bytes %d\n", actual_len); ++printf("Rx: received too many bytes %d\n", actual_len); + return -1; + } + +@@ -1550,7 +1550,7 @@ static void r8152_halt(struct eth_device *eth) + struct ueth_data *dev = (struct ueth_data *)eth->priv; + struct r8152 *tp = (struct r8152 *)dev->dev_priv; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + + tp->rtl_ops.disable(tp); + } +@@ -1568,7 +1568,7 @@ static int r8152_write_hwaddr(struct eth_device *eth) + pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, enetaddr); + ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML); + +- debug("MAC %pM\n", eth->enetaddr); ++printf("MAC %pM\n", eth->enetaddr); + return 0; + } + +@@ -1604,7 +1604,7 @@ int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum, + memset(ss, 0, sizeof(struct ueth_data)); + + /* At this point, we know we've got a live one */ +- debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n", ++printf("\n\nUSB Ethernet device detected: %#04x:%#04x\n", + dev->descriptor.idVendor, dev->descriptor.idProduct); + + /* Initialize the ueth_data structure with some useful info */ +@@ -1653,13 +1653,13 @@ int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum, + } + } + +- debug("Endpoints In %d Out %d Int %d\n", ++printf("Endpoints In %d Out %d Int %d\n", + ss->ep_in, ss->ep_out, ss->ep_int); + + /* Do some basic sanity checks, and bail if we find a problem */ + if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || + !ss->ep_in || !ss->ep_out || !ss->ep_int) { +- debug("Problems with device\n"); ++printf("Problems with device\n"); + goto error; + } + +@@ -1693,7 +1693,7 @@ int r8152_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *eth) + { + if (!eth) { +- debug("%s: missing parameter.\n", __func__); ++printf("%s: missing parameter.\n", __func__); + return 0; + } + +@@ -1709,7 +1709,7 @@ int r8152_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + if (r8152_read_mac(ss->dev_priv, eth->enetaddr) < 0) + return 0; + +- debug("MAC %pM\n", eth->enetaddr); ++printf("MAC %pM\n", eth->enetaddr); + return 1; + } + #endif /* !CONFIG_DM_ETH */ +@@ -1719,7 +1719,7 @@ static int r8152_eth_start(struct udevice *dev) + { + struct r8152 *tp = dev_get_priv(dev); + +- debug("** %s (%d)\n", __func__, __LINE__); ++printf("** %s (%d)\n", __func__, __LINE__); + + return r8152_init_common(tp); + } +@@ -1728,7 +1728,7 @@ void r8152_eth_stop(struct udevice *dev) + { + struct r8152 *tp = dev_get_priv(dev); + +- debug("** %s (%d)\n", __func__, __LINE__); ++printf("** %s (%d)\n", __func__, __LINE__); + + tp->rtl_ops.disable(tp); + } +@@ -1750,7 +1750,7 @@ int r8152_eth_recv(struct udevice *dev, int flags, uchar **packetp) + u16 packet_len; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: first try, len=%d\n", __func__, len); ++printf("%s: first try, len=%d\n", __func__, len); + if (!len) { + if (!(flags & ETH_RECV_CHECK_DEVICE)) + return -EAGAIN; +@@ -1759,7 +1759,7 @@ int r8152_eth_recv(struct udevice *dev, int flags, uchar **packetp) + return ret; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: second try, len=%d\n", __func__, len); ++printf("%s: second try, len=%d\n", __func__, len); + } + + rx_desc = (struct rx_desc *)ptr; +@@ -1767,7 +1767,7 @@ int r8152_eth_recv(struct udevice *dev, int flags, uchar **packetp) + packet_len -= CRC_SIZE; + + if (packet_len > len - (sizeof(struct rx_desc) + CRC_SIZE)) { +- debug("Rx: too large packet: %d\n", packet_len); ++printf("Rx: too large packet: %d\n", packet_len); + goto err; + } + +@@ -1797,14 +1797,14 @@ static int r8152_write_hwaddr(struct udevice *dev) + + unsigned char enetaddr[8] = { 0 }; + +- debug("** %s (%d)\n", __func__, __LINE__); ++printf("** %s (%d)\n", __func__, __LINE__); + memcpy(enetaddr, pdata->enetaddr, ETH_ALEN); + + ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG); + pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, enetaddr); + ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML); + +- debug("MAC %pM\n", pdata->enetaddr); ++printf("MAC %pM\n", pdata->enetaddr); + return 0; + } + +@@ -1813,7 +1813,7 @@ int r8152_read_rom_hwaddr(struct udevice *dev) + struct eth_pdata *pdata = dev_get_plat(dev); + struct r8152 *tp = dev_get_priv(dev); + +- debug("** %s (%d)\n", __func__, __LINE__); ++printf("** %s (%d)\n", __func__, __LINE__); + r8152_read_mac(tp, pdata->enetaddr); + return 0; + } +diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c +index 283c52c16..3263e7954 100644 +--- a/drivers/usb/eth/smsc95xx.c ++++ b/drivers/usb/eth/smsc95xx.c +@@ -175,7 +175,7 @@ static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data) + 0, index, tmpbuf, sizeof(data), + USB_CTRL_SET_TIMEOUT); + if (len != sizeof(data)) { +- debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d", ++printf("smsc95xx_write_reg failed: index=%d, data=%d, len=%d", + index, data, len); + return -EIO; + } +@@ -194,7 +194,7 @@ static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data) + USB_CTRL_GET_TIMEOUT); + *data = tmpbuf[0]; + if (len != sizeof(*data)) { +- debug("smsc95xx_read_reg failed: index=%d, len=%d", ++printf("smsc95xx_read_reg failed: index=%d, len=%d", + index, len); + return -EIO; + } +@@ -224,7 +224,7 @@ static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx) + + /* confirm MII not busy */ + if (smsc95xx_phy_wait_not_busy(udev)) { +- debug("MII is busy in smsc95xx_mdio_read\n"); ++printf("MII is busy in smsc95xx_mdio_read\n"); + return -ETIMEDOUT; + } + +@@ -233,7 +233,7 @@ static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx) + smsc95xx_write_reg(udev, MII_ADDR, addr); + + if (smsc95xx_phy_wait_not_busy(udev)) { +- debug("Timed out reading MII reg %02X\n", idx); ++printf("Timed out reading MII reg %02X\n", idx); + return -ETIMEDOUT; + } + +@@ -249,7 +249,7 @@ static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx, + + /* confirm MII not busy */ + if (smsc95xx_phy_wait_not_busy(udev)) { +- debug("MII is busy in smsc95xx_mdio_write\n"); ++printf("MII is busy in smsc95xx_mdio_write\n"); + return; + } + +@@ -261,7 +261,7 @@ static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx, + smsc95xx_write_reg(udev, MII_ADDR, addr); + + if (smsc95xx_phy_wait_not_busy(udev)) +- debug("Timed out writing MII reg %02X\n", idx); ++printf("Timed out writing MII reg %02X\n", idx); + } + + static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev) +@@ -276,7 +276,7 @@ static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev) + udelay(40); + } while (get_timer(start_time) < 1 * 1000 * 1000); + +- debug("EEPROM is busy\n"); ++printf("EEPROM is busy\n"); + return -ETIMEDOUT; + } + +@@ -293,7 +293,7 @@ static int smsc95xx_wait_eeprom(struct usb_device *udev) + } while (get_timer(start_time) < 1 * 1000 * 1000); + + if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { +- debug("EEPROM read operation timeout\n"); ++printf("EEPROM read operation timeout\n"); + return -ETIMEDOUT; + } + return 0; +@@ -360,7 +360,7 @@ static int smsc95xx_phy_initialize(struct usb_device *udev, + PHY_INT_MASK_DEFAULT_); + mii_nway_restart(udev, dev); + +- debug("phy initialised succesfully\n"); ++printf("phy initialised succesfully\n"); + return 0; + } + +@@ -376,7 +376,7 @@ static int smsc95xx_init_mac_address(unsigned char *enetaddr, + + if (is_valid_ethaddr(enetaddr)) { + /* eeprom values are valid so use them */ +- debug("MAC address read from EEPROM\n"); ++printf("MAC address read from EEPROM\n"); + return 0; + } + +@@ -384,7 +384,7 @@ static int smsc95xx_init_mac_address(unsigned char *enetaddr, + * No eeprom, or eeprom values are invalid. Generating a random MAC + * address is not safe. Just return an error. + */ +- debug("Invalid MAC address read from EEPROM\n"); ++printf("Invalid MAC address read from EEPROM\n"); + + return -ENXIO; + } +@@ -398,7 +398,7 @@ static int smsc95xx_write_hwaddr_common(struct usb_device *udev, + int ret; + + /* set hardware address */ +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + ret = smsc95xx_write_reg(udev, ADDRL, addr_lo); + if (ret < 0) + return ret; +@@ -407,7 +407,7 @@ static int smsc95xx_write_hwaddr_common(struct usb_device *udev, + if (ret < 0) + return ret; + +- debug("MAC %pM\n", enetaddr); ++printf("MAC %pM\n", enetaddr); + priv->have_hwaddr = 1; + + return 0; +@@ -436,7 +436,7 @@ static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum, + if (ret < 0) + return ret; + +- debug("COE_CR = 0x%08x\n", read_buf); ++printf("COE_CR = 0x%08x\n", read_buf); + return 0; + } + +@@ -482,7 +482,7 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + #define TIMEOUT_RESOLUTION 50 /* ms */ + int link_detected; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */ + + write_buf = HW_CFG_LRST_; +@@ -500,7 +500,7 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); + + if (timeout >= 100) { +- debug("timeout waiting for completion of Lite Reset\n"); ++printf("timeout waiting for completion of Lite Reset\n"); + return -ETIMEDOUT; + } + +@@ -518,7 +518,7 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + timeout++; + } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); + if (timeout >= 100) { +- debug("timeout waiting for PHY Reset\n"); ++printf("timeout waiting for PHY Reset\n"); + return -ETIMEDOUT; + } + #ifndef CONFIG_DM_ETH +@@ -546,7 +546,7 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + burst_cap = 0; + priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE; + #endif +- debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size); ++printf("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size); + + ret = smsc95xx_write_reg(udev, BURST_CAP, burst_cap); + if (ret < 0) +@@ -555,7 +555,7 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + ret = smsc95xx_read_reg(udev, BURST_CAP, &read_buf); + if (ret < 0) + return ret; +- debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf); ++printf("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf); + + read_buf = DEFAULT_BULK_IN_DELAY; + ret = smsc95xx_write_reg(udev, BULK_IN_DLY, read_buf); +@@ -565,13 +565,13 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + ret = smsc95xx_read_reg(udev, BULK_IN_DLY, &read_buf); + if (ret < 0) + return ret; +- debug("Read Value from BULK_IN_DLY after writing: " ++printf("Read Value from BULK_IN_DLY after writing: " + "0x%08x\n", read_buf); + + ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf); + if (ret < 0) + return ret; +- debug("Read Value from HW_CFG: 0x%08x\n", read_buf); ++printf("Read Value from HW_CFG: 0x%08x\n", read_buf); + + #ifdef TURBO_MODE + read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); +@@ -588,7 +588,7 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf); + if (ret < 0) + return ret; +- debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf); ++printf("Read Value from HW_CFG after writing: 0x%08x\n", read_buf); + + write_buf = 0xFFFFFFFF; + ret = smsc95xx_write_reg(udev, INT_STS, write_buf); +@@ -598,7 +598,7 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + ret = smsc95xx_read_reg(udev, ID_REV, &read_buf); + if (ret < 0) + return ret; +- debug("ID_REV = 0x%08x\n", read_buf); ++printf("ID_REV = 0x%08x\n", read_buf); + + /* Configure GPIO pins as LED outputs */ + write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | +@@ -606,7 +606,7 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + ret = smsc95xx_write_reg(udev, LED_GPIO_CFG, write_buf); + if (ret < 0) + return ret; +- debug("LED_GPIO_CFG set\n"); ++printf("LED_GPIO_CFG set\n"); + + /* Init Tx */ + write_buf = 0; +@@ -632,7 +632,7 @@ static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, + /* Disable checksum offload engines */ + ret = smsc95xx_set_csums(udev, 0, 0); + if (ret < 0) { +- debug("Failed to set csum offload: %d\n", ret); ++printf("Failed to set csum offload: %d\n", ret); + return ret; + } + smsc95xx_set_multicast(priv); +@@ -684,7 +684,7 @@ static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length) + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, + PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)); + +- debug("** %s(), len %d, buf %#x\n", __func__, length, ++printf("** %s(), len %d, buf %#x\n", __func__, length, + (unsigned int)(ulong)msg); + if (length > PKTSIZE) + return -ENOSPC; +@@ -705,7 +705,7 @@ static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length) + length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), + &actual_len, + USB_BULK_SEND_TIMEOUT); +- debug("Tx: len = %u, actual = %u, err = %d\n", ++printf("Tx: len = %u, actual = %u, err = %d\n", + (unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)), + (unsigned int)actual_len, err); + +@@ -743,19 +743,19 @@ static int smsc95xx_recv(struct eth_device *eth) + u32 packet_len; + int cur_buf_align; + +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + err = usb_bulk_msg(dev->pusb_dev, + usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), + (void *)recv_buf, RX_URB_SIZE, &actual_len, + USB_BULK_RECV_TIMEOUT); +- debug("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE, ++printf("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE, + actual_len, err); + if (err != 0) { +- debug("Rx: failed to receive\n"); ++printf("Rx: failed to receive\n"); + return -err; + } + if (actual_len > RX_URB_SIZE) { +- debug("Rx: received too many bytes %d\n", actual_len); ++printf("Rx: received too many bytes %d\n", actual_len); + return -ENOSPC; + } + +@@ -766,19 +766,19 @@ static int smsc95xx_recv(struct eth_device *eth) + * info. Extract data length. + */ + if (actual_len < sizeof(packet_len)) { +- debug("Rx: incomplete packet length\n"); ++printf("Rx: incomplete packet length\n"); + return -EIO; + } + memcpy(&packet_len, buf_ptr, sizeof(packet_len)); + le32_to_cpus(&packet_len); + if (packet_len & RX_STS_ES_) { +- debug("Rx: Error header=%#x", packet_len); ++printf("Rx: Error header=%#x", packet_len); + return -EIO; + } + packet_len = ((packet_len & RX_STS_FL_) >> 16); + + if (packet_len > actual_len - sizeof(packet_len)) { +- debug("Rx: too large packet: %d\n", packet_len); ++printf("Rx: too large packet: %d\n", packet_len); + return -EIO; + } + +@@ -803,7 +803,7 @@ static int smsc95xx_recv(struct eth_device *eth) + + static void smsc95xx_halt(struct eth_device *eth) + { +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + } + + static int smsc95xx_write_hwaddr(struct eth_device *eth) +@@ -859,7 +859,7 @@ int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, + return 0; + + /* At this point, we know we've got a live one */ +- debug("\n\nUSB Ethernet device detected\n"); ++printf("\n\nUSB Ethernet device detected\n"); + memset(ss, '\0', sizeof(struct ueth_data)); + + /* Initialize the ueth_data structure with some useful info */ +@@ -894,13 +894,13 @@ int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, + ss->irqinterval = iface->ep_desc[i].bInterval; + } + } +- debug("Endpoints In %d Out %d Int %d\n", ++printf("Endpoints In %d Out %d Int %d\n", + ss->ep_in, ss->ep_out, ss->ep_int); + + /* Do some basic sanity checks, and bail if we find a problem */ + if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || + !ss->ep_in || !ss->ep_out || !ss->ep_int) { +- debug("Problems with device\n"); ++printf("Problems with device\n"); + return 0; + } + dev->privptr = (void *)ss; +@@ -916,9 +916,9 @@ int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, + int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *eth) + { +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + if (!eth) { +- debug("%s: missing parameter.\n", __func__); ++printf("%s: missing parameter.\n", __func__); + return 0; + } + sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++); +@@ -947,7 +947,7 @@ static int smsc95xx_eth_start(struct udevice *dev) + + void smsc95xx_eth_stop(struct udevice *dev) + { +- debug("** %s()\n", __func__); ++printf("** %s()\n", __func__); + } + + int smsc95xx_eth_send(struct udevice *dev, void *packet, int length) +@@ -966,7 +966,7 @@ int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp) + u32 packet_len; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: first try, len=%d\n", __func__, len); ++printf("%s: first try, len=%d\n", __func__, len); + if (!len) { + if (!(flags & ETH_RECV_CHECK_DEVICE)) + return -EAGAIN; +@@ -975,7 +975,7 @@ int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp) + return ret; + + len = usb_ether_get_rx_bytes(ueth, &ptr); +- debug("%s: second try, len=%d\n", __func__, len); ++printf("%s: second try, len=%d\n", __func__, len); + } + + /* +@@ -983,19 +983,19 @@ int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp) + * Extract data length. + */ + if (len < sizeof(packet_len)) { +- debug("Rx: incomplete packet length\n"); ++printf("Rx: incomplete packet length\n"); + goto err; + } + memcpy(&packet_len, ptr, sizeof(packet_len)); + le32_to_cpus(&packet_len); + if (packet_len & RX_STS_ES_) { +- debug("Rx: Error header=%#x", packet_len); ++printf("Rx: Error header=%#x", packet_len); + goto err; + } + packet_len = ((packet_len & RX_STS_FL_) >> 16); + + if (packet_len > len - sizeof(packet_len)) { +- debug("Rx: too large packet: %d\n", packet_len); ++printf("Rx: too large packet: %d\n", packet_len); + goto err; + } + +diff --git a/drivers/usb/eth/usb_ether.c b/drivers/usb/eth/usb_ether.c +index e368ecda0..a7392f287 100644 +--- a/drivers/usb/eth/usb_ether.c ++++ b/drivers/usb/eth/usb_ether.c +@@ -65,12 +65,12 @@ int usb_ether_register(struct udevice *dev, struct ueth_data *ueth, int rxsize) + ueth->irqinterval = iface->ep_desc[i].bInterval; + } + } +- debug("Endpoints In %d Out %d Int %d\n", ueth->ep_in, ueth->ep_out, ++printf("Endpoints In %d Out %d Int %d\n", ueth->ep_in, ueth->ep_out, + ueth->ep_int); + + /* Do some basic sanity checks, and bail if we find a problem */ + if (!ueth->ep_in || !ueth->ep_out || !ueth->ep_int) { +- debug("%s: %s: Cannot find endpoints\n", __func__, dev->name); ++printf("%s: %s: Cannot find endpoints\n", __func__, dev->name); + return -ENXIO; + } + +@@ -81,7 +81,7 @@ int usb_ether_register(struct udevice *dev, struct ueth_data *ueth, int rxsize) + + ret = usb_set_interface(udev, iface_desc->bInterfaceNumber, ifnum); + if (ret) { +- debug("%s: %s: Cannot set interface: %d\n", __func__, dev->name, ++printf("%s: %s: Cannot set interface: %d\n", __func__, dev->name, + ret); + return ret; + } +@@ -106,13 +106,13 @@ int usb_ether_receive(struct ueth_data *ueth, int rxsize) + usb_rcvbulkpipe(ueth->pusb_dev, ueth->ep_in), + ueth->rxbuf, rxsize, &actual_len, + USB_BULK_RECV_TIMEOUT); +- debug("Rx: len = %u, actual = %u, err = %d\n", rxsize, actual_len, ret); ++printf("Rx: len = %u, actual = %u, err = %d\n", rxsize, actual_len, ret); + if (ret) { + printf("Rx: failed to receive: %d\n", ret); + return ret; + } + if (actual_len > rxsize) { +- debug("Rx: received too many bytes %d\n", actual_len); ++printf("Rx: received too many bytes %d\n", actual_len); + return -ENOSPC; + } + ueth->rxlen = actual_len; +@@ -291,7 +291,7 @@ int usb_host_eth_scan(int mode) + struct usb_device *dev; + + dev = usb_get_dev_index(bus, i); /* get device */ +- debug("i=%d, %s\n", i, dev ? dev->dev->name : "(done)"); ++printf("i=%d, %s\n", i, dev ? dev->dev->name : "(done)"); + if (!dev) + break; /* no more devices available */ + +@@ -311,7 +311,7 @@ int usb_host_eth_scan(int mode) + struct usb_device *dev; + + dev = usb_get_dev_index(i); /* get device */ +- debug("i=%d\n", i); ++printf("i=%d\n", i); + if (!dev) + break; /* no more devices available */ + +diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h +index f6cb48c1c..9e331d610 100644 +--- a/drivers/usb/gadget/atmel_usba_udc.h ++++ b/drivers/usb/gadget/atmel_usba_udc.h +@@ -228,7 +228,7 @@ + #define DBG(level, fmt, ...) \ + do { \ + if ((level) & DEBUG_LEVEL) \ +- debug("udc: " fmt, ## __VA_ARGS__); \ ++printf("udc: " fmt, ## __VA_ARGS__); \ + } while (0) + + enum usba_ctrl_state { +diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c +index 2a309e624..418a3ac30 100644 +--- a/drivers/usb/gadget/composite.c ++++ b/drivers/usb/gadget/composite.c +@@ -65,7 +65,7 @@ int usb_add_function(struct usb_configuration *config, + { + int value = -EINVAL; + +- debug("adding '%s'/%p to config '%s'/%p\n", ++printf("adding '%s'/%p to config '%s'/%p\n", + function->name, function, + config->label, config); + +@@ -93,7 +93,7 @@ int usb_add_function(struct usb_configuration *config, + + done: + if (value) +- debug("adding '%s'/%p --> %d\n", ++printf("adding '%s'/%p --> %d\n", + function->name, function, value); + return value; + } +@@ -353,7 +353,7 @@ static void reset_config(struct usb_composite_dev *cdev) + { + struct usb_function *f; + +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + + list_for_each_entry(f, &cdev->config->functions, list) { + if (f->disable) +@@ -392,7 +392,7 @@ static int set_config(struct usb_composite_dev *cdev, + } else + result = 0; + +- debug("%s: %s speed config #%d: %s\n", __func__, ++printf("%s: %s speed config #%d: %s\n", __func__, + ({ char *speed; + switch (gadget->speed) { + case USB_SPEED_LOW: +@@ -450,7 +450,7 @@ static int set_config(struct usb_composite_dev *cdev, + + result = f->set_alt(f, tmp, 0); + if (result < 0) { +- debug("interface %d (%s/%p) alt 0 --> %d\n", ++printf("interface %d (%s/%p) alt 0 --> %d\n", + tmp, f->name, f, result); + + reset_config(cdev); +@@ -487,7 +487,7 @@ int usb_add_config(struct usb_composite_dev *cdev, + struct usb_function *f; + unsigned int i; + +- debug("%s: adding config #%u '%s'/%p\n", __func__, ++printf("%s: adding config #%u '%s'/%p\n", __func__, + config->bConfigurationValue, + config->label, config); + +@@ -513,7 +513,7 @@ int usb_add_config(struct usb_composite_dev *cdev, + list_del(&config->list); + config->cdev = NULL; + } else { +- debug("cfg %d/%p speeds:%s%s%s\n", ++printf("cfg %d/%p speeds:%s%s%s\n", + config->bConfigurationValue, config, + config->superspeed ? " super" : "", + config->highspeed ? " high" : "", +@@ -527,7 +527,7 @@ int usb_add_config(struct usb_composite_dev *cdev, + f = config->interface[i]; + if (!f) + continue; +- debug("%s: interface %d = %s/%p\n", ++printf("%s: interface %d = %s/%p\n", + __func__, i, f->name, f); + } + } +@@ -552,7 +552,7 @@ int usb_add_config(struct usb_composite_dev *cdev, + + done: + if (status) +- debug("added config '%s'/%u --> %d\n", config->label, ++printf("added config '%s'/%u --> %d\n", config->label, + config->bConfigurationValue, status); + return status; + } +@@ -779,7 +779,7 @@ int usb_string_ids_n(struct usb_composite_dev *c, unsigned n) + static void composite_setup_complete(struct usb_ep *ep, struct usb_request *req) + { + if (req->status || req->actual != req->length) +- debug("%s: setup complete --> %d, %d/%d\n", __func__, ++printf("%s: setup complete --> %d, %d/%d\n", __func__, + req->status, req->actual, req->length); + } + +@@ -1103,11 +1103,11 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) + goto unknown; + if (gadget_is_otg(gadget)) { + if (gadget->a_hnp_support) +- debug("HNP available\n"); ++printf("HNP available\n"); + else if (gadget->a_alt_hnp_support) +- debug("HNP on another port\n"); ++printf("HNP on another port\n"); + else +- debug("HNP inactive\n"); ++printf("HNP inactive\n"); + } + + value = set_config(cdev, ctrl, w_value); +@@ -1232,7 +1232,7 @@ unknown: + req->zero = value < w_length; + value = usb_ep_queue(gadget->ep0, req, GFP_KERNEL); + if (value < 0) { +- debug("ep_queue --> %d\n", value); ++printf("ep_queue --> %d\n", value); + req->status = 0; + composite_setup_complete(gadget->ep0, req); + } +@@ -1240,7 +1240,7 @@ unknown: + return value; + } + +- debug("non-core control req%02x.%02x v%04x i%04x l%d\n", ++printf("non-core control req%02x.%02x v%04x i%04x l%d\n", + ctrl->bRequestType, ctrl->bRequest, + w_value, w_index, w_length); + +@@ -1280,7 +1280,7 @@ unknown: + * special non-standard request. + */ + case USB_RECIP_DEVICE: +- debug("cdev->config->next_interface_id: %d intf: %d\n", ++printf("cdev->config->next_interface_id: %d intf: %d\n", + cdev->config->next_interface_id, intf); + if (cdev->config->next_interface_id == 1) + f = cdev->config->interface[intf]; +@@ -1304,7 +1304,7 @@ unknown: + req->zero = value < w_length; + value = usb_ep_queue(gadget->ep0, req, GFP_KERNEL); + if (value < 0) { +- debug("ep_queue --> %d\n", value); ++printf("ep_queue --> %d\n", value); + req->status = 0; + composite_setup_complete(gadget->ep0, req); + } +@@ -1351,14 +1351,14 @@ static void composite_unbind(struct usb_gadget *gadget) + struct usb_function, list); + list_del(&f->list); + if (f->unbind) { +- debug("unbind function '%s'/%p\n", ++printf("unbind function '%s'/%p\n", + f->name, f); + f->unbind(c, f); + } + } + list_del(&c->list); + if (c->unbind) { +- debug("unbind config '%s'/%p\n", c->label, c); ++printf("unbind config '%s'/%p\n", c->label, c); + c->unbind(c); + } + free(c); +@@ -1422,7 +1422,7 @@ static int composite_bind(struct usb_gadget *gadget) + OS_STRING_QW_SIGN_LEN / 2); + } + +- debug("%s: ready\n", composite->name); ++printf("%s: ready\n", composite->name); + return 0; + + fail: +@@ -1436,7 +1436,7 @@ composite_suspend(struct usb_gadget *gadget) + struct usb_composite_dev *cdev = get_gadget_data(gadget); + struct usb_function *f; + +- debug("%s: suspend\n", __func__); ++printf("%s: suspend\n", __func__); + if (cdev->config) { + list_for_each_entry(f, &cdev->config->functions, list) { + if (f->suspend) +@@ -1455,7 +1455,7 @@ composite_resume(struct usb_gadget *gadget) + struct usb_composite_dev *cdev = get_gadget_data(gadget); + struct usb_function *f; + +- debug("%s: resume\n", __func__); ++printf("%s: resume\n", __func__); + if (composite->resume) + composite->resume(cdev); + if (cdev->config) { +diff --git a/drivers/usb/gadget/core.c b/drivers/usb/gadget/core.c +index 888f0cfea..0def4d11c 100644 +--- a/drivers/usb/gadget/core.c ++++ b/drivers/usb/gadget/core.c +@@ -621,7 +621,7 @@ void usbd_device_event_irq (struct usb_device_instance *device, usb_device_event + usbdbg("event %d - not handled",event); + break; + } +- debug("%s event: %d oldstate: %d newstate: %d status: %d address: %d", ++printf("%s event: %d oldstate: %d newstate: %d status: %d address: %d", + device->name, event, state, + device->device_state, device->status, device->address); + +diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c +index 2f3181444..5d627ce77 100644 +--- a/drivers/usb/gadget/dwc2_udc_otg.c ++++ b/drivers/usb/gadget/dwc2_udc_otg.c +@@ -363,7 +363,7 @@ static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status) + { + unsigned int stopped = ep->stopped; + +- debug("%s: %s %p, req = %p, stopped = %d\n", ++printf("%s: %s %p, req = %p, stopped = %d\n", + __func__, ep->ep.name, ep, &req->req, stopped); + + list_del_init(&req->queue); +@@ -374,7 +374,7 @@ static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status) + status = req->req.status; + + if (status && status != -ESHUTDOWN) { +- debug("complete %s req %p stat %d len %u/%u\n", ++printf("complete %s req %p stat %d len %u/%u\n", + ep->ep.name, &req->req, status, + req->req.actual, req->req.length); + } +@@ -402,7 +402,7 @@ static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status) + req->req.complete(&ep->ep, &req->req); + spin_lock(&ep->dev->lock); + +- debug("callback completed\n"); ++printf("callback completed\n"); + + ep->stopped = stopped; + } +@@ -414,7 +414,7 @@ static void nuke(struct dwc2_ep *ep, int status) + { + struct dwc2_request *req; + +- debug("%s: %s %p\n", __func__, ep->ep.name, ep); ++printf("%s: %s %p\n", __func__, ep->ep.name, ep); + + /* called with irqs blocked */ + while (!list_empty(&ep->queue)) { +@@ -461,7 +461,7 @@ static void reconfig_usbd(struct dwc2_udc *dev) + u32 max_hw_ep; + int pdata_hw_ep; + +- debug("Reseting OTG controller\n"); ++printf("Reseting OTG controller\n"); + + dflt_gusbcfg = + 0<<15 /* PHY Low Power Clock sel*/ +@@ -562,13 +562,13 @@ static void reconfig_usbd(struct dwc2_udc *dev) + /* Flush the RX FIFO */ + writel(RX_FIFO_FLUSH, ®->grstctl); + while (readl(®->grstctl) & RX_FIFO_FLUSH) +- debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); ++printf("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); + + /* Flush all the Tx FIFO's */ + writel(TX_FIFO_FLUSH_ALL, ®->grstctl); + writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl); + while (readl(®->grstctl) & TX_FIFO_FLUSH) +- debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); ++printf("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); + + /* 13. Clear NAK bit of EP0, EP1, EP2*/ + /* For Slave mode*/ +@@ -617,7 +617,7 @@ static int dwc2_ep_enable(struct usb_ep *_ep, + struct dwc2_udc *dev; + unsigned long flags = 0; + +- debug("%s: %p\n", __func__, _ep); ++printf("%s: %p\n", __func__, _ep); + + ep = container_of(_ep, struct dwc2_ep, ep); + if (!_ep || !desc || ep->desc || _ep->name == ep0name +@@ -626,7 +626,7 @@ static int dwc2_ep_enable(struct usb_ep *_ep, + || ep_maxpacket(ep) < + le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) { + +- debug("%s: bad ep or descriptor\n", __func__); ++printf("%s: bad ep or descriptor\n", __func__); + return -EINVAL; + } + +@@ -635,7 +635,7 @@ static int dwc2_ep_enable(struct usb_ep *_ep, + && ep->bmAttributes != USB_ENDPOINT_XFER_BULK + && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { + +- debug("%s: %s type mismatch\n", __func__, _ep->name); ++printf("%s: %s type mismatch\n", __func__, _ep->name); + return -EINVAL; + } + +@@ -644,14 +644,14 @@ static int dwc2_ep_enable(struct usb_ep *_ep, + le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) > + ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) { + +- debug("%s: bad %s maxpacket\n", __func__, _ep->name); ++printf("%s: bad %s maxpacket\n", __func__, _ep->name); + return -ERANGE; + } + + dev = ep->dev; + if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { + +- debug("%s: bogus device state\n", __func__); ++printf("%s: bogus device state\n", __func__); + return -ESHUTDOWN; + } + +@@ -668,7 +668,7 @@ static int dwc2_ep_enable(struct usb_ep *_ep, + dwc2_udc_ep_activate(ep); + spin_unlock_irqrestore(&ep->dev->lock, flags); + +- debug("%s: enabled %s, stopped = %d, maxpacket = %d\n", ++printf("%s: enabled %s, stopped = %d, maxpacket = %d\n", + __func__, _ep->name, ep->stopped, ep->ep.maxpacket); + return 0; + } +@@ -681,11 +681,11 @@ static int dwc2_ep_disable(struct usb_ep *_ep) + struct dwc2_ep *ep; + unsigned long flags = 0; + +- debug("%s: %p\n", __func__, _ep); ++printf("%s: %p\n", __func__, _ep); + + ep = container_of(_ep, struct dwc2_ep, ep); + if (!_ep || !ep->desc) { +- debug("%s: %s not enabled\n", __func__, ++printf("%s: %s not enabled\n", __func__, + _ep ? ep->ep.name : NULL); + return -EINVAL; + } +@@ -700,7 +700,7 @@ static int dwc2_ep_disable(struct usb_ep *_ep) + + spin_unlock_irqrestore(&ep->dev->lock, flags); + +- debug("%s: disabled %s\n", __func__, _ep->name); ++printf("%s: disabled %s\n", __func__, _ep->name); + return 0; + } + +@@ -709,7 +709,7 @@ static struct usb_request *dwc2_alloc_request(struct usb_ep *ep, + { + struct dwc2_request *req; + +- debug("%s: %s %p\n", __func__, ep->name, ep); ++printf("%s: %s %p\n", __func__, ep->name, ep); + + req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req)); + if (!req) +@@ -725,7 +725,7 @@ static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req) + { + struct dwc2_request *req; + +- debug("%s: %p\n", __func__, ep); ++printf("%s: %p\n", __func__, ep); + + req = container_of(_req, struct dwc2_request, req); + WARN_ON(!list_empty(&req->queue)); +@@ -739,7 +739,7 @@ static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req) + struct dwc2_request *req; + unsigned long flags = 0; + +- debug("%s: %p\n", __func__, _ep); ++printf("%s: %p\n", __func__, _ep); + + ep = container_of(_ep, struct dwc2_ep, ep); + if (!_ep || ep->ep.name == ep0name) +@@ -773,11 +773,11 @@ static int dwc2_fifo_status(struct usb_ep *_ep) + + ep = container_of(_ep, struct dwc2_ep, ep); + if (!_ep) { +- debug("%s: bad ep\n", __func__); ++printf("%s: bad ep\n", __func__); + return -ENODEV; + } + +- debug("%s: %d\n", __func__, ep_index(ep)); ++printf("%s: %d\n", __func__, ep_index(ep)); + + /* LPD can't report unclaimed bytes from IN fifos */ + if (ep_is_in(ep)) +@@ -795,11 +795,11 @@ static void dwc2_fifo_flush(struct usb_ep *_ep) + + ep = container_of(_ep, struct dwc2_ep, ep); + if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { +- debug("%s: bad ep\n", __func__); ++printf("%s: bad ep\n", __func__); + return; + } + +- debug("%s: %d\n", __func__, ep_index(ep)); ++printf("%s: %d\n", __func__, ep_index(ep)); + } + + static const struct usb_gadget_ops dwc2_udc_ops = { +@@ -889,7 +889,7 @@ int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata) + struct dwc2_udc *dev = &memory; + int retval = 0; + +- debug("%s: %p\n", __func__, pdata); ++printf("%s: %p\n", __func__, pdata); + + dev->pdata = pdata; + +diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c +index f17009a29..6e733df7c 100644 +--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c ++++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c +@@ -620,7 +620,7 @@ static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req, + if (unlikely(!_req || !_req->complete || !_req->buf + || !list_empty(&req->queue))) { + +- debug("%s: bad params\n", __func__); ++printf("%s: bad params\n", __func__); + return -EINVAL; + } + +@@ -628,7 +628,7 @@ static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req, + + if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { + +- debug("%s: bad ep: %s, %d, %p\n", __func__, ++printf("%s: bad ep: %s, %d, %p\n", __func__, + ep->ep.name, !ep->desc, _ep); + return -EINVAL; + } +@@ -637,7 +637,7 @@ static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req, + dev = ep->dev; + if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) { + +- debug("%s: bogus device state %p\n", __func__, dev->driver); ++printf("%s: bogus device state %p\n", __func__, dev->driver); + return -ESHUTDOWN; + } + +@@ -647,7 +647,7 @@ static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req, + _req->actual = 0; + + /* kickstart this i/o queue? */ +- debug("\n*** %s: %s-%s req = %p, len = %d, buf = %p" ++printf("\n*** %s: %s-%s req = %p, len = %d, buf = %p" + "Q empty = %d, stopped = %d\n", + __func__, _ep->name, ep_is_in(ep) ? "in" : "out", + _req, _req->length, _req->buf, +@@ -816,7 +816,7 @@ static void dwc2_ep0_read(struct dwc2_udc *dev) + req = list_entry(ep->queue.next, struct dwc2_request, queue); + + } else { +- debug("%s: ---> BUG\n", __func__); ++printf("%s: ---> BUG\n", __func__); + BUG(); + return; + } +@@ -954,19 +954,19 @@ static void dwc2_udc_set_nak(struct dwc2_ep *ep) + u32 ep_ctrl = 0; + + ep_num = ep_index(ep); +- debug("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); ++printf("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); + + if (ep_is_in(ep)) { + ep_ctrl = readl(®->in_endp[ep_num].diepctl); + ep_ctrl |= DEPCTL_SNAK; + writel(ep_ctrl, ®->in_endp[ep_num].diepctl); +- debug("%s: set NAK, DIEPCTL%d = 0x%x\n", ++printf("%s: set NAK, DIEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->in_endp[ep_num].diepctl)); + } else { + ep_ctrl = readl(®->out_endp[ep_num].doepctl); + ep_ctrl |= DEPCTL_SNAK; + writel(ep_ctrl, ®->out_endp[ep_num].doepctl); +- debug("%s: set NAK, DOEPCTL%d = 0x%x\n", ++printf("%s: set NAK, DOEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->out_endp[ep_num].doepctl)); + } + +@@ -980,7 +980,7 @@ static void dwc2_udc_ep_set_stall(struct dwc2_ep *ep) + u32 ep_ctrl = 0; + + ep_num = ep_index(ep); +- debug("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); ++printf("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); + + if (ep_is_in(ep)) { + ep_ctrl = readl(®->in_endp[ep_num].diepctl); +@@ -992,7 +992,7 @@ static void dwc2_udc_ep_set_stall(struct dwc2_ep *ep) + ep_ctrl |= DEPCTL_STALL; + + writel(ep_ctrl, ®->in_endp[ep_num].diepctl); +- debug("%s: set stall, DIEPCTL%d = 0x%x\n", ++printf("%s: set stall, DIEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->in_endp[ep_num].diepctl)); + + } else { +@@ -1002,7 +1002,7 @@ static void dwc2_udc_ep_set_stall(struct dwc2_ep *ep) + ep_ctrl |= DEPCTL_STALL; + + writel(ep_ctrl, ®->out_endp[ep_num].doepctl); +- debug("%s: set stall, DOEPCTL%d = 0x%x\n", ++printf("%s: set stall, DOEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->out_endp[ep_num].doepctl)); + } + +@@ -1015,7 +1015,7 @@ static void dwc2_udc_ep_clear_stall(struct dwc2_ep *ep) + u32 ep_ctrl = 0; + + ep_num = ep_index(ep); +- debug("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); ++printf("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type); + + if (ep_is_in(ep)) { + ep_ctrl = readl(®->in_endp[ep_num].diepctl); +@@ -1035,7 +1035,7 @@ static void dwc2_udc_ep_clear_stall(struct dwc2_ep *ep) + } + + writel(ep_ctrl, ®->in_endp[ep_num].diepctl); +- debug("%s: cleared stall, DIEPCTL%d = 0x%x\n", ++printf("%s: cleared stall, DIEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->in_endp[ep_num].diepctl)); + + } else { +@@ -1050,7 +1050,7 @@ static void dwc2_udc_ep_clear_stall(struct dwc2_ep *ep) + } + + writel(ep_ctrl, ®->out_endp[ep_num].doepctl); +- debug("%s: cleared stall, DOEPCTL%d = 0x%x\n", ++printf("%s: cleared stall, DOEPCTL%d = 0x%x\n", + __func__, ep_num, readl(®->out_endp[ep_num].doepctl)); + } + +@@ -1069,14 +1069,14 @@ static int dwc2_udc_set_halt(struct usb_ep *_ep, int value) + + if (unlikely(!_ep || !ep->desc || ep_num == EP0_CON || + ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC)) { +- debug("%s: %s bad ep or descriptor\n", __func__, ep->ep.name); ++printf("%s: %s bad ep or descriptor\n", __func__, ep->ep.name); + return -EINVAL; + } + + /* Attempt to halt IN ep will fail if any transfer requests + * are still queue */ + if (value && ep_is_in(ep) && !list_empty(&ep->queue)) { +- debug("%s: %s queue not empty, req = %p\n", ++printf("%s: %s queue not empty, req = %p\n", + __func__, ep->ep.name, + list_entry(ep->queue.next, struct dwc2_request, queue)); + +@@ -1084,7 +1084,7 @@ static int dwc2_udc_set_halt(struct usb_ep *_ep, int value) + } + + dev = ep->dev; +- debug("%s: ep_num = %d, value = %d\n", __func__, ep_num, value); ++printf("%s: ep_num = %d, value = %d\n", __func__, ep_num, value); + + spin_lock_irqsave(&dev->lock, flags); + +@@ -1120,7 +1120,7 @@ static void dwc2_udc_ep_activate(struct dwc2_ep *ep) + daintmsk = (1 << ep_num) << DAINT_OUT_BIT; + } + +- debug("%s: EPCTRL%d = 0x%x, ep_is_in = %d\n", ++printf("%s: EPCTRL%d = 0x%x, ep_is_in = %d\n", + __func__, ep_num, ep_ctrl, ep_is_in(ep)); + + /* If the EP is already active don't change the EP Control +@@ -1134,12 +1134,12 @@ static void dwc2_udc_ep_activate(struct dwc2_ep *ep) + + if (ep_is_in(ep)) { + writel(ep_ctrl, ®->in_endp[ep_num].diepctl); +- debug("%s: USB Ative EP%d, DIEPCTRL%d = 0x%x\n", ++printf("%s: USB Ative EP%d, DIEPCTRL%d = 0x%x\n", + __func__, ep_num, ep_num, + readl(®->in_endp[ep_num].diepctl)); + } else { + writel(ep_ctrl, ®->out_endp[ep_num].doepctl); +- debug("%s: USB Ative EP%d, DOEPCTRL%d = 0x%x\n", ++printf("%s: USB Ative EP%d, DOEPCTRL%d = 0x%x\n", + __func__, ep_num, ep_num, + readl(®->out_endp[ep_num].doepctl)); + } +@@ -1147,7 +1147,7 @@ static void dwc2_udc_ep_activate(struct dwc2_ep *ep) + + /* Unmask EP Interrtupt */ + writel(readl(®->daintmsk)|daintmsk, ®->daintmsk); +- debug("%s: DAINTMSK = 0x%x\n", __func__, readl(®->daintmsk)); ++printf("%s: DAINTMSK = 0x%x\n", __func__, readl(®->daintmsk)); + + } + +diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c +index 16922ff15..3d6d99c74 100644 +--- a/drivers/usb/gadget/ether.c ++++ b/drivers/usb/gadget/ether.c +@@ -939,7 +939,7 @@ set_ether_config(struct eth_dev *dev, gfp_t gfp_flags) + + result = usb_ep_enable(dev->status_ep, dev->status); + if (result != 0) { +- debug("enable %s --> %d\n", ++printf("enable %s --> %d\n", + dev->status_ep->name, result); + goto done; + } +@@ -964,14 +964,14 @@ set_ether_config(struct eth_dev *dev, gfp_t gfp_flags) + if (!cdc_active(dev)) { + result = usb_ep_enable(dev->in_ep, dev->in); + if (result != 0) { +- debug("enable %s --> %d\n", ++printf("enable %s --> %d\n", + dev->in_ep->name, result); + goto done; + } + + result = usb_ep_enable(dev->out_ep, dev->out); + if (result != 0) { +- debug("enable %s --> %d\n", ++printf("enable %s --> %d\n", + dev->out_ep->name, result); + goto done; + } +@@ -1007,7 +1007,7 @@ static void eth_reset_config(struct eth_dev *dev) + if (dev->config == 0) + return; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + rndis_uninit(dev->rndis_config); + +@@ -1142,11 +1142,11 @@ static void eth_status_complete(struct usb_ep *ep, struct usb_request *req) + + req->length = STATUS_BYTECOUNT; + value = usb_ep_queue(ep, req, GFP_ATOMIC); +- debug("send SPEED_CHANGE --> %d\n", value); ++printf("send SPEED_CHANGE --> %d\n", value); + if (value == 0) + return; + } else if (value != -ECONNRESET) { +- debug("event %02x --> %d\n", ++printf("event %02x --> %d\n", + event->bNotificationType, value); + if (event->bNotificationType == + USB_CDC_NOTIFY_SPEED_CHANGE) { +@@ -1193,7 +1193,7 @@ static void issue_start_status(struct eth_dev *dev) + + value = usb_ep_queue(dev->status_ep, req, GFP_ATOMIC); + if (value < 0) +- debug("status buf queue --> %d\n", value); ++printf("status buf queue --> %d\n", value); + } + + #endif +@@ -1203,7 +1203,7 @@ static void issue_start_status(struct eth_dev *dev) + static void eth_setup_complete(struct usb_ep *ep, struct usb_request *req) + { + if (req->status || req->actual != req->length) +- debug("setup complete --> %d, %d/%d\n", ++printf("setup complete --> %d, %d/%d\n", + req->status, req->actual, req->length); + } + +@@ -1212,7 +1212,7 @@ static void eth_setup_complete(struct usb_ep *ep, struct usb_request *req) + static void rndis_response_complete(struct usb_ep *ep, struct usb_request *req) + { + if (req->status || req->actual != req->length) +- debug("rndis response complete --> %d, %d/%d\n", ++printf("rndis response complete --> %d, %d/%d\n", + req->status, req->actual, req->length); + + /* done sending after USB_CDC_GET_ENCAPSULATED_RESPONSE */ +@@ -1255,7 +1255,7 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) + * while config change events may enable network traffic. + */ + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + req->complete = eth_setup_complete; + switch (ctrl->bRequest) { +@@ -1305,9 +1305,9 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) + if (ctrl->bRequestType != 0) + break; + if (gadget->a_hnp_support) +- debug("HNP available\n"); ++printf("HNP available\n"); + else if (gadget->a_alt_hnp_support) +- debug("HNP needs a different root port\n"); ++printf("HNP needs a different root port\n"); + value = eth_set_config(dev, wValue, GFP_ATOMIC); + break; + case USB_REQ_GET_CONFIGURATION: +@@ -1339,7 +1339,7 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) + * here. + */ + dev->network_started = 1; +- debug("USB network up!\n"); ++printf("USB network up!\n"); + goto done_set_intf; + } + +@@ -1384,7 +1384,7 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) + * FIXME this is wrong, as is the assumption that + * all non-PXA hardware talks real CDC ... + */ +- debug("set_interface ignored!\n"); ++printf("set_interface ignored!\n"); + #endif /* CONFIG_USB_ETH_CDC */ + + done_set_intf: +@@ -1419,7 +1419,7 @@ done_set_intf: + || wLength != 0 + || wIndex > 1) + break; +- debug("packet filter %02x\n", wValue); ++printf("packet filter %02x\n", wValue); + dev->cdc_filter = wValue; + value = 0; + break; +@@ -1478,20 +1478,20 @@ done_set_intf: + #endif /* RNDIS */ + + default: +- debug("unknown control req%02x.%02x v%04x i%04x l%d\n", ++printf("unknown control req%02x.%02x v%04x i%04x l%d\n", + ctrl->bRequestType, ctrl->bRequest, + wValue, wIndex, wLength); + } + + /* respond with data transfer before status phase? */ + if (value >= 0) { +- debug("respond with data transfer before status phase\n"); ++printf("respond with data transfer before status phase\n"); + req->length = value; + req->zero = value < wLength + && (value % gadget->ep0->maxpacket) == 0; + value = usb_ep_queue(gadget->ep0, req, GFP_ATOMIC); + if (value < 0) { +- debug("ep_queue --> %d\n", value); ++printf("ep_queue --> %d\n", value); + req->status = 0; + eth_setup_complete(gadget->ep0, req); + } +@@ -1524,7 +1524,7 @@ static int rx_submit(struct eth_dev *dev, struct usb_request *req, + * but means receivers can't recover synch on their own. + */ + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + if (!req) + return -EINVAL; + +@@ -1556,7 +1556,7 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req) + { + struct eth_dev *dev = ep->driver_data; + +- debug("%s: status %d\n", __func__, req->status); ++printf("%s: status %d\n", __func__, req->status); + switch (req->status) { + /* normal completion */ + case 0: +@@ -1572,7 +1572,7 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req) + length_err: + dev->stats.rx_errors++; + dev->stats.rx_length_errors++; +- debug("rx length %d\n", req->length); ++printf("rx length %d\n", req->length); + break; + } + +@@ -1625,11 +1625,11 @@ static void tx_complete(struct usb_ep *ep, struct usb_request *req) + { + struct eth_dev *dev = ep->driver_data; + +- debug("%s: status %s\n", __func__, (req->status) ? "failed" : "ok"); ++printf("%s: status %s\n", __func__, (req->status) ? "failed" : "ok"); + switch (req->status) { + default: + dev->stats.tx_errors++; +- debug("tx err %d\n", req->status); ++printf("tx err %d\n", req->status); + /* FALLTHROUGH */ + case -ECONNRESET: /* unlink */ + case -ESHUTDOWN: /* disconnect etc */ +@@ -1767,7 +1767,7 @@ static void eth_unbind(struct usb_gadget *gadget) + { + struct eth_dev *dev = get_gadget_data(gadget); + +- debug("%s...\n", __func__); ++printf("%s...\n", __func__); + rndis_deregister(dev->rndis_config); + rndis_exit(); + +@@ -1833,9 +1833,9 @@ static void rndis_control_ack_complete(struct usb_ep *ep, + { + struct eth_dev *dev = ep->driver_data; + +- debug("%s...\n", __func__); ++printf("%s...\n", __func__); + if (req->status || req->actual != req->length) +- debug("rndis control ack complete --> %d, %d/%d\n", ++printf("rndis control ack complete --> %d, %d/%d\n", + req->status, req->actual, req->length); + + if (!dev->network_started) { +@@ -1875,7 +1875,7 @@ static int rndis_control_ack(struct udevice *net) + + /* in case RNDIS calls this after disconnect */ + if (!dev->status) { +- debug("status ENODEV\n"); ++printf("status ENODEV\n"); + return -ENODEV; + } + +@@ -2315,7 +2315,7 @@ autoconf_fail: + if (dev->rndis_config < 0) { + fail0: + eth_unbind(gadget); +- debug("RNDIS setup failed\n"); ++printf("RNDIS setup failed\n"); + status = -ENODEV; + goto fail; + } +@@ -2430,7 +2430,7 @@ static int _usb_eth_send(struct ether_priv *priv, void *packet, int length) + unsigned long ts; + unsigned long timeout = USB_CONNECT_TIMEOUT; + +- debug("%s:...\n", __func__); ++printf("%s:...\n", __func__); + + /* new buffer is needed to include RNDIS header */ + if (rndis_active(dev)) { +@@ -2473,7 +2473,7 @@ static int _usb_eth_send(struct ether_priv *priv, void *packet, int length) + retval = usb_ep_queue(dev->in_ep, req, GFP_ATOMIC); + + if (!retval) +- debug("%s: packet queued\n", __func__); ++printf("%s: packet queued\n", __func__); + while (!packet_sent) { + if (get_timer(ts) > timeout) { + printf("timeout sending packets to usb ethernet\n"); +diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c +index 4bedc7d3a..d83bcaf0f 100644 +--- a/drivers/usb/gadget/f_dfu.c ++++ b/drivers/usb/gadget/f_dfu.c +@@ -593,8 +593,8 @@ dfu_handle(struct usb_function *f, const struct usb_ctrlrequest *ctrl) + int value = 0; + u8 req_type = ctrl->bRequestType & USB_TYPE_MASK; + +- debug("w_value: 0x%x len: 0x%x\n", w_value, len); +- debug("req_type: 0x%x ctrl->bRequest: 0x%x f_dfu->dfu_state: 0x%x\n", ++printf("w_value: 0x%x len: 0x%x\n", w_value, len); ++printf("req_type: 0x%x ctrl->bRequest: 0x%x f_dfu->dfu_state: 0x%x\n", + req_type, ctrl->bRequest, f_dfu->dfu_state); + + #ifdef CONFIG_DFU_TIMEOUT +@@ -616,7 +616,7 @@ dfu_handle(struct usb_function *f, const struct usb_ctrlrequest *ctrl) + req->zero = value < len; + value = usb_ep_queue(gadget->ep0, req, 0); + if (value < 0) { +- debug("ep_queue --> %d\n", value); ++printf("ep_queue --> %d\n", value); + req->status = 0; + } + } +@@ -770,7 +770,7 @@ static int dfu_set_alt(struct usb_function *f, unsigned intf, unsigned alt) + { + struct f_dfu *f_dfu = func_to_dfu(f); + +- debug("%s: intf:%d alt:%d\n", __func__, intf, alt); ++printf("%s: intf:%d alt:%d\n", __func__, intf, alt); + + f_dfu->altsetting = alt; + f_dfu->dfu_state = DFU_STATE_dfuIDLE; +@@ -793,7 +793,7 @@ static void dfu_disable(struct usb_function *f) + if (f_dfu->config == 0) + return; + +- debug("%s: reset config\n", __func__); ++printf("%s: reset config\n", __func__); + + f_dfu->config = 0; + } +@@ -835,7 +835,7 @@ int dfu_add(struct usb_configuration *c) + strings_dfu_generic[0].id = id; + dfu_intf_runtime.iInterface = id; + +- debug("%s: cdev: 0x%p gadget:0x%p gadget->ep0: 0x%p\n", __func__, ++printf("%s: cdev: 0x%p gadget:0x%p gadget->ep0: 0x%p\n", __func__, + c->cdev, c->cdev->gadget, c->cdev->gadget->ep0); + + return dfu_bind_config(c); +diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c +index 8ba55aab9..93ee76035 100644 +--- a/drivers/usb/gadget/f_fastboot.c ++++ b/drivers/usb/gadget/f_fastboot.c +@@ -321,7 +321,7 @@ static int fastboot_set_alt(struct usb_function *f, + struct f_fastboot *f_fb = func_to_fastboot(f); + const struct usb_endpoint_descriptor *d; + +- debug("%s: func: %s intf: %d alt: %d\n", ++printf("%s: func: %s intf: %d alt: %d\n", + __func__, f->name, interface, alt); + + d = fb_ep_desc(gadget, &fs_ep_out, &hs_ep_out, &ss_ep_out); +@@ -369,7 +369,7 @@ static int fastboot_add(struct usb_configuration *c) + struct f_fastboot *f_fb = fastboot_func; + int status; + +- debug("%s: cdev: 0x%p\n", __func__, c->cdev); ++printf("%s: cdev: 0x%p\n", __func__, c->cdev); + + if (!f_fb) { + f_fb = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*f_fb)); +diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c +index bd846ce9a..3db5b808a 100644 +--- a/drivers/usb/gadget/f_rockusb.c ++++ b/drivers/usb/gadget/f_rockusb.c +@@ -144,7 +144,7 @@ static void rockusb_complete(struct usb_ep *ep, struct usb_request *req) + + if (!status) + return; +- debug("status: %d ep '%s' trans: %d\n", status, ep->name, req->actual); ++printf("status: %d ep '%s' trans: %d\n", status, ep->name, req->actual); + } + + /* config the rockusb device*/ +@@ -250,7 +250,7 @@ static int rockusb_set_alt(struct usb_function *f, unsigned int interface, + struct f_rockusb *f_rkusb = func_to_rockusb(f); + const struct usb_endpoint_descriptor *d; + +- debug("%s: func: %s intf: %d alt: %d\n", ++printf("%s: func: %s intf: %d alt: %d\n", + __func__, f->name, interface, alt); + + d = rkusb_ep_desc(gadget, &fs_ep_out, &hs_ep_out); +@@ -298,7 +298,7 @@ static int rockusb_add(struct usb_configuration *c) + struct f_rockusb *f_rkusb = get_rkusb(); + int status; + +- debug("%s: cdev: 0x%p\n", __func__, c->cdev); ++printf("%s: cdev: 0x%p\n", __func__, c->cdev); + + f_rkusb->usb_function.name = "f_rockusb"; + f_rkusb->usb_function.bind = rockusb_bind; +@@ -333,7 +333,7 @@ static int rockusb_tx_write(const char *buffer, unsigned int buffer_size) + + memcpy(in_req->buf, buffer, buffer_size); + in_req->length = buffer_size; +- debug("Transferring 0x%x bytes\n", buffer_size); ++printf("Transferring 0x%x bytes\n", buffer_size); + usb_ep_dequeue(rockusb_func->in_ep, in_req); + ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0); + if (ret) +@@ -354,18 +354,18 @@ static void printcbw(char *buf) + + memcpy((char *)cbw, buf, USB_BULK_CB_WRAP_LEN); + +- debug("cbw: signature:%x\n", cbw->signature); +- debug("cbw: tag=%x\n", cbw->tag); +- debug("cbw: data_transfer_length=%d\n", cbw->data_transfer_length); +- debug("cbw: flags=%x\n", cbw->flags); +- debug("cbw: lun=%d\n", cbw->lun); +- debug("cbw: length=%d\n", cbw->length); +- debug("cbw: ucOperCode=%x\n", cbw->CDB[0]); +- debug("cbw: ucReserved=%x\n", cbw->CDB[1]); +- debug("cbw: dwAddress:%x %x %x %x\n", cbw->CDB[5], cbw->CDB[4], ++printf("cbw: signature:%x\n", cbw->signature); ++printf("cbw: tag=%x\n", cbw->tag); ++printf("cbw: data_transfer_length=%d\n", cbw->data_transfer_length); ++printf("cbw: flags=%x\n", cbw->flags); ++printf("cbw: lun=%d\n", cbw->lun); ++printf("cbw: length=%d\n", cbw->length); ++printf("cbw: ucOperCode=%x\n", cbw->CDB[0]); ++printf("cbw: ucReserved=%x\n", cbw->CDB[1]); ++printf("cbw: dwAddress:%x %x %x %x\n", cbw->CDB[5], cbw->CDB[4], + cbw->CDB[3], cbw->CDB[2]); +- debug("cbw: ucReserved2=%x\n", cbw->CDB[6]); +- debug("cbw: uslength:%x %x\n", cbw->CDB[8], cbw->CDB[7]); ++printf("cbw: ucReserved2=%x\n", cbw->CDB[6]); ++printf("cbw: uslength:%x %x\n", cbw->CDB[8], cbw->CDB[7]); + } + + static void printcsw(char *buf) +@@ -373,10 +373,10 @@ static void printcsw(char *buf) + ALLOC_CACHE_ALIGN_BUFFER(struct bulk_cs_wrap, csw, + sizeof(struct bulk_cs_wrap)); + memcpy((char *)csw, buf, USB_BULK_CS_WRAP_LEN); +- debug("csw: signature:%x\n", csw->signature); +- debug("csw: tag:%x\n", csw->tag); +- debug("csw: residue:%x\n", csw->residue); +- debug("csw: status:%x\n", csw->status); ++printf("csw: signature:%x\n", csw->signature); ++printf("csw: tag:%x\n", csw->tag); ++printf("csw: residue:%x\n", csw->residue); ++printf("csw: status:%x\n", csw->status); + } + #endif + +@@ -400,7 +400,7 @@ static void tx_handler_send_csw(struct usb_ep *ep, struct usb_request *req) + int status = req->status; + + if (status) +- debug("status: %d ep '%s' trans: %d\n", ++printf("status: %d ep '%s' trans: %d\n", + status, ep->name, req->actual); + + /* Return back to default in_req complete function after sending CSW */ +@@ -437,7 +437,7 @@ static void tx_handler_ul_image(struct usb_ep *ep, struct usb_request *req) + + /* Print error status of previous transfer */ + if (req->status) +- debug("status: %d ep '%s' trans: %d len %d\n", req->status, ++printf("status: %d ep '%s' trans: %d len %d\n", req->status, + ep->name, req->actual, req->length); + + /* On transfer complete reset in_req and feedback host with CSW_GOOD */ +@@ -459,7 +459,7 @@ static void tx_handler_ul_image(struct usb_ep *ep, struct usb_request *req) + unsigned int blkcount = (transfer_size + f_rkusb->desc->blksz - 1) / + f_rkusb->desc->blksz; + +- debug("ul %x bytes, %x blks, read lba %x, ul_size:%x, ul_bytes:%x, ", ++printf("ul %x bytes, %x blks, read lba %x, ul_size:%x, ul_bytes:%x, ", + transfer_size, blkcount, f_rkusb->lba, + f_rkusb->ul_size, f_rkusb->ul_bytes); + +@@ -479,7 +479,7 @@ static void tx_handler_ul_image(struct usb_ep *ep, struct usb_request *req) + memcpy(in_req->buf, rbuffer, transfer_size); + in_req->length = transfer_size; + in_req->complete = tx_handler_ul_image; +- debug("Uploading 0x%x bytes\n", transfer_size); ++printf("Uploading 0x%x bytes\n", transfer_size); + usb_ep_dequeue(rockusb_func->in_ep, in_req); + ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0); + if (ret) +@@ -510,7 +510,7 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) + f_rkusb->dl_bytes += transfer_size; + int blks = 0, blkcnt = transfer_size / f_rkusb->desc->blksz; + +- debug("dl %x bytes, %x blks, write lba %x, dl_size:%x, dl_bytes:%x, ", ++printf("dl %x bytes, %x blks, write lba %x, dl_size:%x, dl_bytes:%x, ", + transfer_size, blkcnt, f_rkusb->lba, f_rkusb->dl_size, + f_rkusb->dl_bytes); + blks = blk_dwrite(f_rkusb->desc, f_rkusb->lba, blkcnt, f_rkusb->buf); +@@ -528,7 +528,7 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) + req->complete = rx_handler_command; + req->length = EP_BUFFER_SIZE; + f_rkusb->buf = f_rkusb->buf_head; +- debug("transfer 0x%x bytes done\n", f_rkusb->dl_size); ++printf("transfer 0x%x bytes done\n", f_rkusb->dl_size); + f_rkusb->dl_size = 0; + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD, + USB_BULK_CS_WRAP_LEN); +@@ -539,7 +539,7 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) + else + f_rkusb->buf = f_rkusb->buf_head; + +- debug("remain %x bytes, %lx sectors\n", req->length, ++printf("remain %x bytes, %lx sectors\n", req->length, + req->length / f_rkusb->desc->blksz); + } + +@@ -646,7 +646,7 @@ static void cb_read_lba(struct usb_ep *ep, struct usb_request *req) + f_rkusb->ul_size = sector_count * f_rkusb->desc->blksz; + f_rkusb->ul_bytes = 0; + +- debug("require read %x bytes, %x sectors from lba %x\n", ++printf("require read %x bytes, %x sectors from lba %x\n", + f_rkusb->ul_size, sector_count, f_rkusb->lba); + + if (f_rkusb->ul_size == 0) { +@@ -688,7 +688,7 @@ static void cb_write_lba(struct usb_ep *ep, struct usb_request *req) + f_rkusb->dl_size = sector_count * f_rkusb->desc->blksz; + f_rkusb->dl_bytes = 0; + +- debug("require write %x bytes, %x sectors to lba %x\n", ++printf("require write %x bytes, %x sectors to lba %x\n", + f_rkusb->dl_size, sector_count, f_rkusb->lba); + + if (f_rkusb->dl_size == 0) { +@@ -727,7 +727,7 @@ static void cb_erase_lba(struct usb_ep *ep, struct usb_request *req) + + lba = get_unaligned_be32(&cbw->CDB[2]); + +- debug("require erase %x sectors from lba %x\n", ++printf("require erase %x sectors from lba %x\n", + sector_count, lba); + + blks = blk_derase(f_rkusb->desc, lba, sector_count); +diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c +index e48aa2f90..f53e727fc 100644 +--- a/drivers/usb/gadget/f_sdp.c ++++ b/drivers/usb/gadget/f_sdp.c +@@ -305,7 +305,7 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req) + + struct sdp_command *cmd = req->buf + 1; + +- debug("%s: command: %04x, addr: %08x, cnt: %u\n", ++printf("%s: command: %04x, addr: %08x, cnt: %u\n", + __func__, be16_to_cpu(cmd->cmd), + be32_to_cpu(cmd->addr), be32_to_cpu(cmd->cnt)); + +@@ -460,7 +460,7 @@ static void sdp_tx_complete(struct usb_ep *ep, struct usb_request *req) + sdp->state = SDP_STATE_IDLE; + break; + } +- debug("%s complete --> %d, %d/%d\n", ep->name, ++printf("%s complete --> %d, %d/%d\n", ep->name, + status, req->actual, req->length); + } + +@@ -474,8 +474,8 @@ static int sdp_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) + int value = 0; + u8 req_type = ctrl->bRequestType & USB_TYPE_MASK; + +- debug("w_value: 0x%04x len: 0x%04x\n", w_value, len); +- debug("req_type: 0x%02x ctrl->bRequest: 0x%02x sdp->state: %d\n", ++printf("w_value: 0x%04x len: 0x%04x\n", w_value, len); ++printf("req_type: 0x%02x ctrl->bRequest: 0x%02x sdp->state: %d\n", + req_type, ctrl->bRequest, sdp->state); + + if (req_type == USB_TYPE_STANDARD) { +@@ -513,7 +513,7 @@ static int sdp_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) + req->zero = value < len; + value = usb_ep_queue(gadget->ep0, req, 0); + if (value < 0) { +- debug("ep_queue --> %d\n", value); ++printf("ep_queue --> %d\n", value); + req->status = 0; + } + } +@@ -601,7 +601,7 @@ static struct usb_request *sdp_start_ep(struct usb_ep *ep, bool in) + * maxpacket size 1024, else we break on certain controllers like + * DWC3 that expect bulk OUT requests to be divisible by maxpacket size. + */ +- debug("%s: ep:%p req:%p\n", __func__, ep, req); ++printf("%s: ep:%p req:%p\n", __func__, ep, req); + + if (!req) + return NULL; +@@ -621,7 +621,7 @@ static int sdp_set_alt(struct usb_function *f, unsigned intf, unsigned alt) + struct usb_gadget *gadget = cdev->gadget; + int result; + +- debug("%s: intf: %d alt: %d\n", __func__, intf, alt); ++printf("%s: intf: %d alt: %d\n", __func__, intf, alt); + + if (gadget_is_dualspeed(gadget) && gadget->speed == USB_SPEED_HIGH) { + result = usb_ep_enable(sdp->in_ep, &in_hs_desc); +@@ -740,7 +740,7 @@ static u32 sdp_jump_imxheader(void *address) + static ulong sdp_load_read(struct spl_load_info *load, ulong sector, + ulong count, void *buf) + { +- debug("%s: sector %lx, count %lx, buf %lx\n", ++printf("%s: sector %lx, count %lx, buf %lx\n", + __func__, sector, count, (ulong)buf); + memcpy(buf, (void *)(load->dev + sector), count); + return count; +@@ -781,7 +781,7 @@ static int sdp_handle_in_ep(struct spl_image_info *spl_image) + + switch (sdp_func->state) { + case SDP_STATE_TX_SEC_CONF: +- debug("Report 3: HAB security\n"); ++printf("Report 3: HAB security\n"); + data[0] = 3; + + status = SDP_SECURITY_OPEN; +@@ -792,7 +792,7 @@ static int sdp_handle_in_ep(struct spl_image_info *spl_image) + break; + + case SDP_STATE_TX_STATUS: +- debug("Report 4: Status\n"); ++printf("Report 4: Status\n"); + data[0] = 4; + + memcpy(&data[1], &sdp_func->error_status, 4); +@@ -801,7 +801,7 @@ static int sdp_handle_in_ep(struct spl_image_info *spl_image) + sdp_func->state = SDP_STATE_TX_STATUS_BUSY; + break; + case SDP_STATE_TX_REGISTER: +- debug("Report 4: Register Values\n"); ++printf("Report 4: Register Values\n"); + data[0] = 4; + + datalen = sdp_func->dnl_bytes_remaining; +@@ -840,7 +840,7 @@ static int sdp_handle_in_ep(struct spl_image_info *spl_image) + if (image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + +- debug("Found FIT\n"); ++printf("Found FIT\n"); + load.dev = header; + load.bl_len = 1; + load.read = sdp_load_read; +@@ -947,7 +947,7 @@ int sdp_add(struct usb_configuration *c) + strings_sdp_generic[0].id = id; + sdp_intf_runtime.iInterface = id; + +- debug("%s: cdev: %p gadget: %p gadget->ep0: %p\n", __func__, ++printf("%s: cdev: %p gadget: %p gadget->ep0: %p\n", __func__, + c->cdev, c->cdev->gadget, c->cdev->gadget->ep0); + + return sdp_bind_config(c); +diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c +index 47ef55b2f..7694cf18b 100644 +--- a/drivers/usb/gadget/f_thor.c ++++ b/drivers/usb/gadget/f_thor.c +@@ -61,7 +61,7 @@ static void send_rsp(const struct rsp_box *rsp) + memcpy(thor_tx_data_buf, rsp, sizeof(struct rsp_box)); + thor_tx_data(thor_tx_data_buf, sizeof(struct rsp_box)); + +- debug("-RSP: %d, %d\n", rsp->rsp, rsp->rsp_data); ++printf("-RSP: %d, %d\n", rsp->rsp, rsp->rsp_data); + } + + static void send_data_rsp(s32 ack, s32 count) +@@ -75,7 +75,7 @@ static void send_data_rsp(s32 ack, s32 count) + memcpy(thor_tx_data_buf, rsp, sizeof(struct data_rsp_box)); + thor_tx_data(thor_tx_data_buf, sizeof(struct data_rsp_box)); + +- debug("-DATA RSP: %d, %d\n", ack, count); ++printf("-DATA RSP: %d, %d\n", ack, count); + } + + static int process_rqt_info(const struct rqt_box *rqt) +@@ -125,7 +125,7 @@ static int process_rqt_cmd(const struct rqt_box *rqt) + + switch (rqt->rqt_data) { + case RQT_CMD_REBOOT: +- debug("TARGET RESET\n"); ++printf("TARGET RESET\n"); + send_rsp(rsp); + g_dnl_unregister(); + dfu_free_entities(); +@@ -170,7 +170,7 @@ static long long int download_head(unsigned long long total, + if (ret_rcv < 0) + return ret_rcv; + rcv_cnt += ret_rcv; +- debug("%d: RCV data count: %llu cnt: %d\n", usb_pkt_cnt, ++printf("%d: RCV data count: %llu cnt: %d\n", usb_pkt_cnt, + rcv_cnt, *cnt); + + if ((rcv_cnt % THOR_STORE_UNIT_SIZE) == 0) { +@@ -195,7 +195,7 @@ static long long int download_head(unsigned long long total, + * on the medium (they are smaller than THOR_STORE_UNIT_SIZE) + */ + *left = left_to_rcv + buf - transfer_buffer; +- debug("%s: left: %llu left_to_rcv: %llu buf: 0x%p\n", __func__, ++printf("%s: left: %llu left_to_rcv: %llu buf: 0x%p\n", __func__, + *left, left_to_rcv, buf); + + if (left_to_rcv) { +@@ -207,7 +207,7 @@ static long long int download_head(unsigned long long total, + send_data_rsp(0, ++usb_pkt_cnt); + } + +- debug("%s: %llu total: %llu cnt: %d\n", __func__, rcv_cnt, total, *cnt); ++printf("%s: %llu total: %llu cnt: %d\n", __func__, rcv_cnt, total, *cnt); + + return rcv_cnt; + } +@@ -218,7 +218,7 @@ static int download_tail(long long int left, int cnt) + void *transfer_buffer; + int ret; + +- debug("%s: left: %llu cnt: %d\n", __func__, left, cnt); ++printf("%s: left: %llu cnt: %d\n", __func__, left, cnt); + + dfu_entity = dfu_get_entity(alt_setting_num); + if (!dfu_entity) { +@@ -270,7 +270,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt) + thor_file_size = (uint64_t)(uint32_t)rqt->int_data[0] + + (((uint64_t)(uint32_t)rqt->int_data[1]) + << 32); +- debug("INIT: total %llu bytes\n", thor_file_size); ++printf("INIT: total %llu bytes\n", thor_file_size); + break; + case RQT_DL_FILE_INFO: + file_type = rqt->int_data[0]; +@@ -287,7 +287,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt) + memcpy(f_name, rqt->str_data[0], F_NAME_BUF_SIZE); + f_name[F_NAME_BUF_SIZE] = '\0'; + +- debug("INFO: name(%s, %d), size(%llu), type(%d)\n", ++printf("INFO: name(%s, %d), size(%llu), type(%d)\n", + f_name, 0, thor_file_size, file_type); + + rsp->int_data[0] = THOR_PACKET_SIZE; +@@ -310,14 +310,14 @@ static long long int process_rqt_download(const struct rqt_box *rqt) + } + return ret_head; + case RQT_DL_FILE_END: +- debug("DL FILE_END\n"); ++printf("DL FILE_END\n"); + rsp->ack = download_tail(left, cnt); + ret = rsp->ack; + left = 0; + cnt = 0; + break; + case RQT_DL_EXIT: +- debug("DL EXIT\n"); ++printf("DL EXIT\n"); + break; + default: + pr_err("Operation not supported: %d\n", rqt->rqt_data); +@@ -335,7 +335,7 @@ static int process_data(void) + + memcpy(rqt, thor_rx_data_buf, sizeof(struct rqt_box)); + +- debug("+RQT: %d, %d\n", rqt->rqt, rqt->rqt_data); ++printf("+RQT: %d, %d\n", rqt->rqt, rqt->rqt_data); + + switch (rqt->rqt) { + case RQT_INFO: +@@ -545,7 +545,7 @@ static int thor_rx_data(void) + tmp = data_to_rx; + do { + dev->out_req->length = data_to_rx; +- debug("dev->out_req->length:%d dev->rxdata:%d\n", ++printf("dev->out_req->length:%d dev->rxdata:%d\n", + dev->out_req->length, dev->rxdata); + + status = usb_ep_queue(dev->out_ep, dev->out_req, 0); +@@ -579,7 +579,7 @@ static void thor_tx_data(unsigned char *data, int len) + + dev->in_req->length = len; + +- debug("%s: dev->in_req->length:%d to_cpy:%zd\n", __func__, ++printf("%s: dev->in_req->length:%d to_cpy:%zd\n", __func__, + dev->in_req->length, sizeof(data)); + + status = usb_ep_queue(dev->in_ep, dev->in_req, 0); +@@ -601,7 +601,7 @@ static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req) + struct thor_dev *dev = thor_func->dev; + int status = req->status; + +- debug("%s: ep_ptr:%p, req_ptr:%p\n", __func__, ep, req); ++printf("%s: ep_ptr:%p, req_ptr:%p\n", __func__, ep, req); + switch (status) { + case 0: + if (ep == dev->out_ep) +@@ -621,14 +621,14 @@ static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req) + break; + } + +- debug("%s complete --> %d, %d/%d\n", ep->name, ++printf("%s complete --> %d, %d/%d\n", ep->name, + status, req->actual, req->length); + } + + static void thor_setup_complete(struct usb_ep *ep, struct usb_request *req) + { + if (req->status || req->actual != req->length) +- debug("setup complete --> %d, %d/%d\n", ++printf("setup complete --> %d, %d/%d\n", + req->status, req->actual, req->length); + } + +@@ -642,7 +642,7 @@ thor_func_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) + + u16 len = le16_to_cpu(ctrl->wLength); + +- debug("Req_Type: 0x%x Req: 0x%x wValue: 0x%x wIndex: 0x%x wLen: 0x%x\n", ++printf("Req_Type: 0x%x Req: 0x%x wValue: 0x%x wIndex: 0x%x wLen: 0x%x\n", + ctrl->bRequestType, ctrl->bRequest, ctrl->wValue, ctrl->wIndex, + ctrl->wLength); + +@@ -665,7 +665,7 @@ thor_func_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) + req->zero = value < len; + value = usb_ep_queue(gadget->ep0, req, 0); + if (value < 0) { +- debug("%s: ep_queue: %d\n", __func__, value); ++printf("%s: ep_queue: %d\n", __func__, value); + req->status = 0; + } + } +@@ -678,8 +678,8 @@ static void thor_set_dma(void *addr, int len) + { + struct thor_dev *dev = thor_func->dev; + +- debug("in_req:%p, out_req:%p\n", dev->in_req, dev->out_req); +- debug("addr:%p, len:%d\n", addr, len); ++printf("in_req:%p, out_req:%p\n", dev->in_req, dev->out_req); ++printf("addr:%p, len:%d\n", addr, len); + + dev->out_req->buf = addr; + dev->out_req->length = len; +@@ -690,7 +690,7 @@ int thor_init(void) + struct thor_dev *dev = thor_func->dev; + + /* Wait for a device enumeration and configuration settings */ +- debug("THOR enumeration/configuration setting....\n"); ++printf("THOR enumeration/configuration setting....\n"); + while (!dev->configuration_done) + usb_gadget_handle_interrupts(0); + +@@ -767,9 +767,9 @@ static int thor_func_bind(struct usb_configuration *c, struct usb_function *f) + dev->gadget = gadget; + f_thor->dev = dev; + +- debug("%s: usb_configuration: 0x%p usb_function: 0x%p\n", ++printf("%s: usb_configuration: 0x%p usb_function: 0x%p\n", + __func__, c, f); +- debug("f_thor: 0x%p thor: 0x%p\n", f_thor, dev); ++printf("f_thor: 0x%p thor: 0x%p\n", f_thor, dev); + + /* EP0 */ + /* preallocate control response and buffer */ +@@ -852,7 +852,7 @@ static int thor_func_bind(struct usb_configuration *c, struct usb_function *f) + goto fail; + } + +- debug("%s: out_ep:%p out_req:%p\n", __func__, ++printf("%s: out_ep:%p out_req:%p\n", __func__, + dev->out_ep, dev->out_req); + + return 0; +@@ -880,7 +880,7 @@ static void thor_func_disable(struct usb_function *f) + struct f_thor *f_thor = func_to_thor(f); + struct thor_dev *dev = f_thor->dev; + +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + + /* Avoid freeing memory when ep is still claimed */ + if (dev->in_ep->driver_data) { +@@ -913,7 +913,7 @@ static int thor_eps_setup(struct usb_function *f) + + ep = dev->in_ep; + d = ep_desc(gadget, &hs_in_desc, &fs_in_desc); +- debug("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress); ++printf("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress); + + result = usb_ep_enable(ep, d); + if (result) +@@ -931,7 +931,7 @@ static int thor_eps_setup(struct usb_function *f) + dev->in_req = req; + ep = dev->out_ep; + d = ep_desc(gadget, &hs_out_desc, &fs_out_desc); +- debug("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress); ++printf("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress); + + result = usb_ep_enable(ep, d); + if (result) +@@ -949,7 +949,7 @@ static int thor_eps_setup(struct usb_function *f) + /* ACM control EP */ + ep = dev->int_ep; + d = ep_desc(gadget, &hs_int_desc, &fs_int_desc); +- debug("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress); ++printf("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress); + + result = usb_ep_enable(ep, d); + if (result) +@@ -979,15 +979,15 @@ static int thor_func_set_alt(struct usb_function *f, + struct thor_dev *dev = thor_func->dev; + int result; + +- debug("%s: func: %s intf: %d alt: %d\n", ++printf("%s: func: %s intf: %d alt: %d\n", + __func__, f->name, intf, alt); + + switch (intf) { + case 0: +- debug("ACM INTR interface\n"); ++printf("ACM INTR interface\n"); + break; + case 1: +- debug("Communication Data interface\n"); ++printf("Communication Data interface\n"); + result = thor_eps_setup(f); + if (result) + pr_err("%s: EPs setup failed!\n", __func__); +@@ -1003,7 +1003,7 @@ static int thor_func_init(struct usb_configuration *c) + struct f_thor *f_thor; + int status; + +- debug("%s: cdev: 0x%p\n", __func__, c->cdev); ++printf("%s: cdev: 0x%p\n", __func__, c->cdev); + + f_thor = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*f_thor)); + if (!f_thor) +@@ -1027,7 +1027,7 @@ static int thor_func_init(struct usb_configuration *c) + + int thor_add(struct usb_configuration *c) + { +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + return thor_func_init(c); + } + +diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c +index af43433d8..92a6389c7 100644 +--- a/drivers/usb/gadget/fotg210.c ++++ b/drivers/usb/gadget/fotg210.c +@@ -367,7 +367,7 @@ static void fotg210_setup(struct fotg210_chip *chip) + if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { + switch (req->bRequest) { + case USB_REQ_SET_CONFIGURATION: +- debug("fotg210: set_cfg(%d)\n", req->wValue & 0x00FF); ++printf("fotg210: set_cfg(%d)\n", req->wValue & 0x00FF); + if (!(req->wValue & 0x00FF)) { + chip->state = USB_STATE_ADDRESS; + writel(chip->addr, ®s->dev_addr); +@@ -380,7 +380,7 @@ static void fotg210_setup(struct fotg210_chip *chip) + break; + + case USB_REQ_SET_ADDRESS: +- debug("fotg210: set_addr(0x%04X)\n", req->wValue); ++printf("fotg210: set_addr(0x%04X)\n", req->wValue); + chip->state = USB_STATE_ADDRESS; + chip->addr = req->wValue & DEVADDR_ADDR_MASK; + ret = CX_FINISH; +@@ -388,7 +388,7 @@ static void fotg210_setup(struct fotg210_chip *chip) + break; + + case USB_REQ_CLEAR_FEATURE: +- debug("fotg210: clr_feature(%d, %d)\n", ++printf("fotg210: clr_feature(%d, %d)\n", + req->bRequestType & 0x03, req->wValue); + switch (req->wValue) { + case 0: /* [Endpoint] halt */ +@@ -404,7 +404,7 @@ static void fotg210_setup(struct fotg210_chip *chip) + break; + + case USB_REQ_SET_FEATURE: +- debug("fotg210: set_feature(%d, %d)\n", ++printf("fotg210: set_feature(%d, %d)\n", + req->wValue, req->wIndex & 0xf); + switch (req->wValue) { + case 0: /* Endpoint Halt */ +@@ -422,17 +422,17 @@ static void fotg210_setup(struct fotg210_chip *chip) + break; + + case USB_REQ_GET_STATUS: +- debug("fotg210: get_status\n"); ++printf("fotg210: get_status\n"); + ret = CX_STALL; + break; + + case USB_REQ_SET_DESCRIPTOR: +- debug("fotg210: set_descriptor\n"); ++printf("fotg210: set_descriptor\n"); + ret = CX_STALL; + break; + + case USB_REQ_SYNCH_FRAME: +- debug("fotg210: sync frame\n"); ++printf("fotg210: sync frame\n"); + ret = CX_STALL; + break; + } +@@ -456,7 +456,7 @@ static void fotg210_setup(struct fotg210_chip *chip) + break; + + case CX_IDLE: +- debug("fotg210: cx_idle?\n"); ++printf("fotg210: cx_idle?\n"); + default: + break; + } +@@ -675,7 +675,7 @@ static int fotg210_ep_halt(struct usb_ep *_ep, int halt) + struct fotg210_regs *regs = chip->regs; + int ret = -1; + +- debug("fotg210: ep%d halt=%d\n", ep->id, halt); ++printf("fotg210: ep%d halt=%d\n", ep->id, halt); + + /* Endpoint STALL */ + if (ep->id > 0 && ep->id <= CFG_NUM_ENDPOINTS) { +@@ -739,7 +739,7 @@ static int fotg210_pullup(struct usb_gadget *_gadget, int is_on) + + chip = container_of(_gadget, struct fotg210_chip, gadget); + +- debug("fotg210: pullup=%d\n", is_on); ++printf("fotg210: pullup=%d\n", is_on); + + pullup(chip, is_on); + +@@ -943,7 +943,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver) + + ret = driver->bind(&chip->gadget); + if (ret) { +- debug("fotg210: driver->bind() returned %d\n", ret); ++printf("fotg210: driver->bind() returned %d\n", ret); + return ret; + } + chip->driver = driver; +diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c +index afb7b74f3..0c25467b6 100644 +--- a/drivers/usb/gadget/g_dnl.c ++++ b/drivers/usb/gadget/g_dnl.c +@@ -102,7 +102,7 @@ static int g_dnl_unbind(struct usb_composite_dev *cdev) + { + struct usb_gadget *gadget = cdev->gadget; + +- debug("%s: calling usb_gadget_disconnect for " ++printf("%s: calling usb_gadget_disconnect for " + "controller '%s'\n", __func__, gadget->name); + usb_gadget_disconnect(gadget); + +@@ -126,7 +126,7 @@ static int g_dnl_do_config(struct usb_configuration *c) + const char *s = c->cdev->driver->name; + struct g_dnl_bind_callback *callback = g_dnl_bind_callback_first(); + +- debug("%s: configuration: 0x%p composite dev: 0x%p\n", ++printf("%s: configuration: 0x%p composite dev: 0x%p\n", + __func__, c, c->cdev); + + for (; callback != g_dnl_bind_callback_end(); callback++) +@@ -231,7 +231,7 @@ static int g_dnl_bind(struct usb_composite_dev *cdev) + int id, ret; + int gcnum; + +- debug("%s: gadget: 0x%p cdev: 0x%p\n", __func__, gadget, cdev); ++printf("%s: gadget: 0x%p cdev: 0x%p\n", __func__, gadget, cdev); + + id = usb_string_id(cdev); + +@@ -266,12 +266,12 @@ static int g_dnl_bind(struct usb_composite_dev *cdev) + if (gcnum >= 0) + device_desc.bcdDevice = cpu_to_le16(gcnum); + else { +- debug("%s: controller '%s' not recognized\n", ++printf("%s: controller '%s' not recognized\n", + __func__, gadget->name); + device_desc.bcdDevice = __constant_cpu_to_le16(0x9999); + } + +- debug("%s: calling usb_gadget_connect for " ++printf("%s: calling usb_gadget_connect for " + "controller '%s'\n", __func__, gadget->name); + usb_gadget_connect(gadget); + +@@ -301,7 +301,7 @@ int g_dnl_register(const char *name) + { + int ret; + +- debug("%s: g_dnl_driver.name = %s\n", __func__, name); ++printf("%s: g_dnl_driver.name = %s\n", __func__, name); + g_dnl_driver.name = name; + + ret = usb_composite_register(&g_dnl_driver); +diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c +index d19ac1d03..76df72aea 100644 +--- a/drivers/usb/gadget/pxa25x_udc.c ++++ b/drivers/usb/gadget/pxa25x_udc.c +@@ -71,7 +71,7 @@ static const char ep0name[] = "ep0"; + /* Watchdog */ + static inline void start_watchdog(struct pxa25x_udc *udc) + { +- debug("Started watchdog\n"); ++printf("Started watchdog\n"); + udc->watchdog.base = get_timer(0); + udc->watchdog.running = 1; + } +@@ -79,7 +79,7 @@ static inline void start_watchdog(struct pxa25x_udc *udc) + static inline void stop_watchdog(struct pxa25x_udc *udc) + { + udc->watchdog.running = 0; +- debug("Stopped watchdog\n"); ++printf("Stopped watchdog\n"); + } + + static inline void test_watchdog(struct pxa25x_udc *udc) +@@ -87,7 +87,7 @@ static inline void test_watchdog(struct pxa25x_udc *udc) + if (!udc->watchdog.running) + return; + +- debug("watchdog %ld %ld\n", get_timer(udc->watchdog.base), ++printf("watchdog %ld %ld\n", get_timer(udc->watchdog.base), + udc->watchdog.period); + + if (get_timer(udc->watchdog.base) >= udc->watchdog.period) { +@@ -100,14 +100,14 @@ static void udc_watchdog(struct pxa25x_udc *dev) + { + uint32_t udccs0 = readl(&dev->regs->udccs[0]); + +- debug("Fired up udc_watchdog\n"); ++printf("Fired up udc_watchdog\n"); + + local_irq_disable(); + if (dev->ep0state == EP0_STALL + && (udccs0 & UDCCS0_FST) == 0 + && (udccs0 & UDCCS0_SST) == 0) { + writel(UDCCS0_FST|UDCCS0_FTF, &dev->regs->udccs[0]); +- debug("ep0 re-stall\n"); ++printf("ep0 re-stall\n"); + start_watchdog(dev); + } + local_irq_enable(); +@@ -125,7 +125,7 @@ static void + dump_udccr(const char *label) + { + u32 udccr = readl(&UDC_REGS->udccr); +- debug("%s %02X =%s%s%s%s%s%s%s%s\n", ++printf("%s %02X =%s%s%s%s%s%s%s%s\n", + label, udccr, + (udccr & UDCCR_REM) ? " rem" : "", + (udccr & UDCCR_RSTIR) ? " rstir" : "", +@@ -142,7 +142,7 @@ dump_udccs0(const char *label) + { + u32 udccs0 = readl(&UDC_REGS->udccs[0]); + +- debug("%s %s %02X =%s%s%s%s%s%s%s%s\n", ++printf("%s %s %02X =%s%s%s%s%s%s%s%s\n", + label, state_name[the_controller->ep0state], udccs0, + (udccs0 & UDCCS0_SA) ? " sa" : "", + (udccs0 & UDCCS0_RNE) ? " rne" : "", +@@ -160,7 +160,7 @@ dump_state(struct pxa25x_udc *dev) + u32 tmp; + unsigned i; + +- debug("%s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n", ++printf("%s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n", + state_name[dev->ep0state], + readl(&UDC_REGS->uicr1), readl(&UDC_REGS->uicr0), + readl(&UDC_REGS->usir1), readl(&UDC_REGS->usir0), +@@ -168,26 +168,26 @@ dump_state(struct pxa25x_udc *dev) + dump_udccr("udccr"); + if (dev->has_cfr) { + tmp = readl(&UDC_REGS->udccfr); +- debug("udccfr %02X =%s%s\n", tmp, ++printf("udccfr %02X =%s%s\n", tmp, + (tmp & UDCCFR_AREN) ? " aren" : "", + (tmp & UDCCFR_ACM) ? " acm" : ""); + } + + if (!dev->driver) { +- debug("no gadget driver bound\n"); ++printf("no gadget driver bound\n"); + return; + } else +- debug("ep0 driver '%s'\n", "ether"); ++printf("ep0 driver '%s'\n", "ether"); + + dump_udccs0("udccs0"); +- debug("ep0 IN %lu/%lu, OUT %lu/%lu\n", ++printf("ep0 IN %lu/%lu, OUT %lu/%lu\n", + dev->stats.write.bytes, dev->stats.write.ops, + dev->stats.read.bytes, dev->stats.read.ops); + + for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) { + if (dev->ep[i].desc == NULL) + continue; +- debug("udccs%d = %02x\n", i, *dev->ep->reg_udccs); ++printf("udccs%d = %02x\n", i, *dev->ep->reg_udccs); + } + } + +@@ -343,7 +343,7 @@ static int pxa25x_ep_enable(struct usb_ep *_ep, + + /* ... reset halt state too, if we could ... */ + +- debug("enabled %s\n", _ep->name); ++printf("enabled %s\n", _ep->name); + return 0; + } + +@@ -369,7 +369,7 @@ static int pxa25x_ep_disable(struct usb_ep *_ep) + ep->stopped = 1; + + local_irq_restore(flags); +- debug("%s disabled\n", _ep->name); ++printf("%s disabled\n", _ep->name); + return 0; + } + +@@ -428,7 +428,7 @@ static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status) + status = req->req.status; + + if (status && status != -ESHUTDOWN) +- debug("complete %s req %p stat %d len %u/%u\n", ++printf("complete %s req %p stat %d len %u/%u\n", + ep->ep.name, &req->req, status, + req->req.actual, req->req.length); + +@@ -450,7 +450,7 @@ write_packet(u32 *uddr, struct pxa25x_request *req, unsigned max) + u8 *buf; + unsigned length, count; + +- debug("%s(): uddr %p\n", __func__, uddr); ++printf("%s(): uddr %p\n", __func__, uddr); + + buf = req->req.buf + req->req.actual; + prefetch(buf); +@@ -784,7 +784,7 @@ pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) + dev->stats.read.ops++; + /* messy ... */ + if (dev->req_config) { +- debug("ep0 config ack%s\n", ++printf("ep0 config ack%s\n", + dev->has_cfr ? "" : " raced"); + if (dev->has_cfr) + writel(UDCCFR_AREN|UDCCFR_ACM +@@ -939,7 +939,7 @@ static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value) + } + local_irq_restore(flags); + +- debug("%s halt\n", _ep->name); ++printf("%s halt\n", _ep->name); + return 0; + } + +@@ -1159,7 +1159,7 @@ static void udc_reinit(struct pxa25x_udc *dev) + */ + static void udc_enable(struct pxa25x_udc *dev) + { +- debug("udc: enabling udc\n"); ++printf("udc: enabling udc\n"); + + udc_clear_mask_UDCCR(UDCCR_UDE); + +@@ -1262,7 +1262,7 @@ static void handle_ep0(struct pxa25x_udc *dev) + if (unlikely(!(readl(&dev->regs->udccs[0]) & + UDCCS0_RNE))) { + bad_setup: +- debug("SETUP %d!\n", i); ++printf("SETUP %d!\n", i); + goto stall; + } + u.raw[i] = (u8)readb(&dev->regs->uddr0); +@@ -1272,7 +1272,7 @@ bad_setup: + goto bad_setup; + + got_setup: +- debug("SETUP %02x.%02x v%04x i%04x l%04x\n", ++printf("SETUP %02x.%02x v%04x i%04x l%04x\n", + u.r.bRequestType, u.r.bRequest, + le16_to_cpu(u.r.wValue), + le16_to_cpu(u.r.wIndex), +@@ -1286,7 +1286,7 @@ got_setup: + switch (u.r.bRequest) { + /* hardware restricts gadget drivers here! */ + case USB_REQ_SET_CONFIGURATION: +- debug("GOT SET_CONFIGURATION\n"); ++printf("GOT SET_CONFIGURATION\n"); + if (u.r.bRequestType == USB_RECIP_DEVICE) { + /* + * reflect hardware's automagic +@@ -1319,7 +1319,7 @@ config_change: + break; + /* hardware was supposed to hide this */ + case USB_REQ_SET_ADDRESS: +- debug("GOT SET ADDRESS\n"); ++printf("GOT SET ADDRESS\n"); + if (u.r.bRequestType == USB_RECIP_DEVICE) { + ep0start(dev, 0, "address"); + return; +@@ -1355,7 +1355,7 @@ stall: + /* uninitialized when goto stall */ + i = 0; + } +- debug("protocol STALL, " ++printf("protocol STALL, " + "%02x err %d\n", + readl(&dev->regs->udccs[0]), i); + +@@ -1388,7 +1388,7 @@ stall: + * pxa210/250 erratum 131 for B0/B1 says RNE lies. + * still observed on a pxa255 a0. + */ +- debug("e131\n"); ++printf("e131\n"); + nuke(ep, -EPROTO); + + /* read SETUP data, but don't trust it too much */ +@@ -1407,7 +1407,7 @@ stall: + * - IPR cleared + * - OPR got set, without SA (likely status stage) + */ +- debug("random IRQ %X %X\n", udccs0, ++printf("random IRQ %X %X\n", udccs0, + readl(&dev->regs->udccs[0])); + writel(udccs0 & (UDCCS0_SA|UDCCS0_OPR), + &dev->regs->udccs[0]); +@@ -1415,13 +1415,13 @@ stall: + break; + case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ + if (udccs0 & UDCCS0_OPR) { +- debug("ep0in premature status\n"); ++printf("ep0in premature status\n"); + if (req) + done(ep, req, 0); + ep0_idle(dev); + } else /* irq was IPR clearing */ { + if (req) { +- debug("next ep0 in packet\n"); ++printf("next ep0 in packet\n"); + /* this IN packet might finish the request */ + (void) write_ep0_fifo(ep, req); + } /* else IN token before response was written */ +@@ -1436,7 +1436,7 @@ stall: + /* else more OUT packets expected */ + } /* else OUT token before read was issued */ + } else /* irq was IPR clearing */ { +- debug("ep0out premature status\n"); ++printf("ep0out premature status\n"); + if (req) + done(ep, req, 0); + ep0_idle(dev); +@@ -1534,7 +1534,7 @@ pxa25x_udc_irq(void) + if (unlikely(udccr & UDCCR_SUSIR)) { + udc_ack_int_UDCCR(UDCCR_SUSIR); + handled = 1; +- debug("USB suspend\n"); ++printf("USB suspend\n"); + + if (dev->gadget.speed != USB_SPEED_UNKNOWN + && dev->driver +@@ -1547,7 +1547,7 @@ pxa25x_udc_irq(void) + if (unlikely(udccr & UDCCR_RESIR)) { + udc_ack_int_UDCCR(UDCCR_RESIR); + handled = 1; +- debug("USB resume\n"); ++printf("USB resume\n"); + + if (dev->gadget.speed != USB_SPEED_UNKNOWN + && dev->driver +@@ -1561,7 +1561,7 @@ pxa25x_udc_irq(void) + handled = 1; + + if ((readl(&dev->regs->udccr) & UDCCR_UDA) == 0) { +- debug("USB reset start\n"); ++printf("USB reset start\n"); + + /* + * reset driver and endpoints, +@@ -1570,7 +1570,7 @@ pxa25x_udc_irq(void) + stop_activity(dev, dev->driver); + + } else { +- debug("USB reset end\n"); ++printf("USB reset end\n"); + dev->gadget.speed = USB_SPEED_FULL; + memset(&dev->stats, 0, sizeof dev->stats); + /* driver and endpoints are still reset */ +@@ -1872,7 +1872,7 @@ static void udc_command(int cmd) + writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), + GPCR(CONFIG_USB_DEV_PULLUP_GPIO)); + +- debug("Connected to USB\n"); ++printf("Connected to USB\n"); + break; + + case PXA2XX_UDC_CMD_DISCONNECT: +@@ -1884,7 +1884,7 @@ static void udc_command(int cmd) + clrbits_le32(GPDR(CONFIG_USB_DEV_PULLUP_GPIO), + GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO)); + +- debug("Disconnected from USB\n"); ++printf("Disconnected from USB\n"); + break; + } + } +diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c +index 13c327ea3..06818732e 100644 +--- a/drivers/usb/gadget/rndis.c ++++ b/drivers/usb/gadget/rndis.c +@@ -160,9 +160,9 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + #if defined(DEBUG) && defined(DEBUG_VERBOSE) + if (buf_len) { +- debug("query OID %08x value, len %d:\n", OID, buf_len); ++printf("query OID %08x value, len %d:\n", OID, buf_len); + for (i = 0; i < buf_len; i += 16) { +- debug("%03d: %08x %08x %08x %08x\n", i, ++printf("%03d: %08x %08x %08x %08x\n", i, + get_unaligned_le32(&buf[i]), + get_unaligned_le32(&buf[i + 4]), + get_unaligned_le32(&buf[i + 8]), +@@ -182,7 +182,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_GEN_SUPPORTED_LIST: +- debug("%s: OID_GEN_SUPPORTED_LIST\n", __func__); ++printf("%s: OID_GEN_SUPPORTED_LIST\n", __func__); + length = sizeof(oid_supported_list); + count = length / sizeof(u32); + for (i = 0; i < count; i++) +@@ -192,7 +192,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_GEN_HARDWARE_STATUS: +- debug("%s: OID_GEN_HARDWARE_STATUS\n", __func__); ++printf("%s: OID_GEN_HARDWARE_STATUS\n", __func__); + /* + * Bogus question! + * Hardware must be ready to receive high level protocols. +@@ -206,14 +206,14 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_GEN_MEDIA_SUPPORTED: +- debug("%s: OID_GEN_MEDIA_SUPPORTED\n", __func__); ++printf("%s: OID_GEN_MEDIA_SUPPORTED\n", __func__); + *outbuf = cpu_to_le32(params->medium); + retval = 0; + break; + + /* mandatory */ + case OID_GEN_MEDIA_IN_USE: +- debug("%s: OID_GEN_MEDIA_IN_USE\n", __func__); ++printf("%s: OID_GEN_MEDIA_IN_USE\n", __func__); + /* one medium, one transport... (maybe you do it better) */ + *outbuf = cpu_to_le32(params->medium); + retval = 0; +@@ -221,7 +221,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_GEN_MAXIMUM_FRAME_SIZE: +- debug("%s: OID_GEN_MAXIMUM_FRAME_SIZE\n", __func__); ++printf("%s: OID_GEN_MAXIMUM_FRAME_SIZE\n", __func__); + if (params->dev) { + *outbuf = cpu_to_le32(params->mtu); + retval = 0; +@@ -231,7 +231,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + /* mandatory */ + case OID_GEN_LINK_SPEED: + #if defined(DEBUG) && defined(DEBUG_VERBOSE) +- debug("%s: OID_GEN_LINK_SPEED\n", __func__); ++printf("%s: OID_GEN_LINK_SPEED\n", __func__); + #endif + if (params->media_state == NDIS_MEDIA_STATE_DISCONNECTED) + *outbuf = __constant_cpu_to_le32(0); +@@ -242,7 +242,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_GEN_TRANSMIT_BLOCK_SIZE: +- debug("%s: OID_GEN_TRANSMIT_BLOCK_SIZE\n", __func__); ++printf("%s: OID_GEN_TRANSMIT_BLOCK_SIZE\n", __func__); + if (params->dev) { + *outbuf = cpu_to_le32(params->mtu); + retval = 0; +@@ -251,7 +251,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_GEN_RECEIVE_BLOCK_SIZE: +- debug("%s: OID_GEN_RECEIVE_BLOCK_SIZE\n", __func__); ++printf("%s: OID_GEN_RECEIVE_BLOCK_SIZE\n", __func__); + if (params->dev) { + *outbuf = cpu_to_le32(params->mtu); + retval = 0; +@@ -260,21 +260,21 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_GEN_VENDOR_ID: +- debug("%s: OID_GEN_VENDOR_ID\n", __func__); ++printf("%s: OID_GEN_VENDOR_ID\n", __func__); + *outbuf = cpu_to_le32(params->vendorID); + retval = 0; + break; + + /* mandatory */ + case OID_GEN_VENDOR_DESCRIPTION: +- debug("%s: OID_GEN_VENDOR_DESCRIPTION\n", __func__); ++printf("%s: OID_GEN_VENDOR_DESCRIPTION\n", __func__); + length = strlen(params->vendorDescr); + memcpy(outbuf, params->vendorDescr, length); + retval = 0; + break; + + case OID_GEN_VENDOR_DRIVER_VERSION: +- debug("%s: OID_GEN_VENDOR_DRIVER_VERSION\n", __func__); ++printf("%s: OID_GEN_VENDOR_DRIVER_VERSION\n", __func__); + /* Created as LE */ + *outbuf = rndis_driver_version; + retval = 0; +@@ -282,14 +282,14 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_GEN_CURRENT_PACKET_FILTER: +- debug("%s: OID_GEN_CURRENT_PACKET_FILTER\n", __func__); ++printf("%s: OID_GEN_CURRENT_PACKET_FILTER\n", __func__); + *outbuf = cpu_to_le32(*params->filter); + retval = 0; + break; + + /* mandatory */ + case OID_GEN_MAXIMUM_TOTAL_SIZE: +- debug("%s: OID_GEN_MAXIMUM_TOTAL_SIZE\n", __func__); ++printf("%s: OID_GEN_MAXIMUM_TOTAL_SIZE\n", __func__); + *outbuf = __constant_cpu_to_le32(RNDIS_MAX_TOTAL_SIZE); + retval = 0; + break; +@@ -297,14 +297,14 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + /* mandatory */ + case OID_GEN_MEDIA_CONNECT_STATUS: + #if defined(DEBUG) && defined(DEBUG_VERBOSE) +- debug("%s: OID_GEN_MEDIA_CONNECT_STATUS\n", __func__); ++printf("%s: OID_GEN_MEDIA_CONNECT_STATUS\n", __func__); + #endif + *outbuf = cpu_to_le32(params->media_state); + retval = 0; + break; + + case OID_GEN_PHYSICAL_MEDIUM: +- debug("%s: OID_GEN_PHYSICAL_MEDIUM\n", __func__); ++printf("%s: OID_GEN_PHYSICAL_MEDIUM\n", __func__); + *outbuf = __constant_cpu_to_le32(0); + retval = 0; + break; +@@ -315,7 +315,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + * versions emit undefined RNDIS messages. DOCUMENT ALL THESE! + */ + case OID_GEN_MAC_OPTIONS: /* from WinME */ +- debug("%s: OID_GEN_MAC_OPTIONS\n", __func__); ++printf("%s: OID_GEN_MAC_OPTIONS\n", __func__); + *outbuf = __constant_cpu_to_le32( + NDIS_MAC_OPTION_RECEIVE_SERIALIZED + | NDIS_MAC_OPTION_FULL_DUPLEX); +@@ -327,7 +327,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + /* mandatory */ + case OID_GEN_XMIT_OK: + #if defined(DEBUG) && defined(DEBUG_VERBOSE) +- debug("%s: OID_GEN_XMIT_OK\n", __func__); ++printf("%s: OID_GEN_XMIT_OK\n", __func__); + #endif + if (params->stats) { + *outbuf = cpu_to_le32( +@@ -341,7 +341,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + /* mandatory */ + case OID_GEN_RCV_OK: + #if defined(DEBUG) && defined(DEBUG_VERBOSE) +- debug("%s: OID_GEN_RCV_OK\n", __func__); ++printf("%s: OID_GEN_RCV_OK\n", __func__); + #endif + if (params->stats) { + *outbuf = cpu_to_le32( +@@ -355,7 +355,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + /* mandatory */ + case OID_GEN_XMIT_ERROR: + #if defined(DEBUG) && defined(DEBUG_VERBOSE) +- debug("%s: OID_GEN_XMIT_ERROR\n", __func__); ++printf("%s: OID_GEN_XMIT_ERROR\n", __func__); + #endif + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->tx_errors); +@@ -366,7 +366,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + /* mandatory */ + case OID_GEN_RCV_ERROR: + #if defined(DEBUG) && defined(DEBUG_VERBOSE) +- debug("%s: OID_GEN_RCV_ERROR\n", __func__); ++printf("%s: OID_GEN_RCV_ERROR\n", __func__); + #endif + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->rx_errors); +@@ -376,7 +376,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_GEN_RCV_NO_BUFFER: +- debug("%s: OID_GEN_RCV_NO_BUFFER\n", __func__); ++printf("%s: OID_GEN_RCV_NO_BUFFER\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->rx_dropped); + retval = 0; +@@ -385,7 +385,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + #ifdef RNDIS_OPTIONAL_STATS + case OID_GEN_DIRECTED_BYTES_XMIT: +- debug("%s: OID_GEN_DIRECTED_BYTES_XMIT\n", __func__); ++printf("%s: OID_GEN_DIRECTED_BYTES_XMIT\n", __func__); + /* + * Aunt Tilly's size of shoes + * minus antarctica count of penguins +@@ -402,7 +402,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_DIRECTED_FRAMES_XMIT: +- debug("%s: OID_GEN_DIRECTED_FRAMES_XMIT\n", __func__); ++printf("%s: OID_GEN_DIRECTED_FRAMES_XMIT\n", __func__); + /* dito */ + if (params->stats) { + *outbuf = cpu_to_le32( +@@ -415,7 +415,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_MULTICAST_BYTES_XMIT: +- debug("%s: OID_GEN_MULTICAST_BYTES_XMIT\n", __func__); ++printf("%s: OID_GEN_MULTICAST_BYTES_XMIT\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->multicast * 1234); + retval = 0; +@@ -423,7 +423,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_MULTICAST_FRAMES_XMIT: +- debug("%s: OID_GEN_MULTICAST_FRAMES_XMIT\n", __func__); ++printf("%s: OID_GEN_MULTICAST_FRAMES_XMIT\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->multicast); + retval = 0; +@@ -431,7 +431,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_BROADCAST_BYTES_XMIT: +- debug("%s: OID_GEN_BROADCAST_BYTES_XMIT\n", __func__); ++printf("%s: OID_GEN_BROADCAST_BYTES_XMIT\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->tx_packets/42*255); + retval = 0; +@@ -439,7 +439,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_BROADCAST_FRAMES_XMIT: +- debug("%s: OID_GEN_BROADCAST_FRAMES_XMIT\n", __func__); ++printf("%s: OID_GEN_BROADCAST_FRAMES_XMIT\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->tx_packets / 42); + retval = 0; +@@ -447,19 +447,19 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_DIRECTED_BYTES_RCV: +- debug("%s: OID_GEN_DIRECTED_BYTES_RCV\n", __func__); ++printf("%s: OID_GEN_DIRECTED_BYTES_RCV\n", __func__); + *outbuf = __constant_cpu_to_le32(0); + retval = 0; + break; + + case OID_GEN_DIRECTED_FRAMES_RCV: +- debug("%s: OID_GEN_DIRECTED_FRAMES_RCV\n", __func__); ++printf("%s: OID_GEN_DIRECTED_FRAMES_RCV\n", __func__); + *outbuf = __constant_cpu_to_le32(0); + retval = 0; + break; + + case OID_GEN_MULTICAST_BYTES_RCV: +- debug("%s: OID_GEN_MULTICAST_BYTES_RCV\n", __func__); ++printf("%s: OID_GEN_MULTICAST_BYTES_RCV\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->multicast * 1111); + retval = 0; +@@ -467,7 +467,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_MULTICAST_FRAMES_RCV: +- debug("%s: OID_GEN_MULTICAST_FRAMES_RCV\n", __func__); ++printf("%s: OID_GEN_MULTICAST_FRAMES_RCV\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->multicast); + retval = 0; +@@ -475,7 +475,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_BROADCAST_BYTES_RCV: +- debug("%s: OID_GEN_BROADCAST_BYTES_RCV\n", __func__); ++printf("%s: OID_GEN_BROADCAST_BYTES_RCV\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->rx_packets/42*255); + retval = 0; +@@ -483,7 +483,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_BROADCAST_FRAMES_RCV: +- debug("%s: OID_GEN_BROADCAST_FRAMES_RCV\n", __func__); ++printf("%s: OID_GEN_BROADCAST_FRAMES_RCV\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->rx_packets / 42); + retval = 0; +@@ -491,7 +491,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_RCV_CRC_ERROR: +- debug("%s: OID_GEN_RCV_CRC_ERROR\n", __func__); ++printf("%s: OID_GEN_RCV_CRC_ERROR\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->rx_crc_errors); + retval = 0; +@@ -499,7 +499,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + break; + + case OID_GEN_TRANSMIT_QUEUE_LENGTH: +- debug("%s: OID_GEN_TRANSMIT_QUEUE_LENGTH\n", __func__); ++printf("%s: OID_GEN_TRANSMIT_QUEUE_LENGTH\n", __func__); + *outbuf = __constant_cpu_to_le32(0); + retval = 0; + break; +@@ -509,7 +509,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_802_3_PERMANENT_ADDRESS: +- debug("%s: OID_802_3_PERMANENT_ADDRESS\n", __func__); ++printf("%s: OID_802_3_PERMANENT_ADDRESS\n", __func__); + if (params->dev) { + length = ETH_ALEN; + memcpy(outbuf, params->host_mac, length); +@@ -519,7 +519,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_802_3_CURRENT_ADDRESS: +- debug("%s: OID_802_3_CURRENT_ADDRESS\n", __func__); ++printf("%s: OID_802_3_CURRENT_ADDRESS\n", __func__); + if (params->dev) { + length = ETH_ALEN; + memcpy(outbuf, params->host_mac, length); +@@ -529,7 +529,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_802_3_MULTICAST_LIST: +- debug("%s: OID_802_3_MULTICAST_LIST\n", __func__); ++printf("%s: OID_802_3_MULTICAST_LIST\n", __func__); + /* Multicast base address only */ + *outbuf = __constant_cpu_to_le32(0xE0000000); + retval = 0; +@@ -537,21 +537,21 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_802_3_MAXIMUM_LIST_SIZE: +- debug("%s: OID_802_3_MAXIMUM_LIST_SIZE\n", __func__); ++printf("%s: OID_802_3_MAXIMUM_LIST_SIZE\n", __func__); + /* Multicast base address only */ + *outbuf = __constant_cpu_to_le32(1); + retval = 0; + break; + + case OID_802_3_MAC_OPTIONS: +- debug("%s: OID_802_3_MAC_OPTIONS\n", __func__); ++printf("%s: OID_802_3_MAC_OPTIONS\n", __func__); + break; + + /* ieee802.3 statistics OIDs (table 4-4) */ + + /* mandatory */ + case OID_802_3_RCV_ERROR_ALIGNMENT: +- debug("%s: OID_802_3_RCV_ERROR_ALIGNMENT\n", __func__); ++printf("%s: OID_802_3_RCV_ERROR_ALIGNMENT\n", __func__); + if (params->stats) { + *outbuf = cpu_to_le32(params->stats->rx_frame_errors); + retval = 0; +@@ -560,51 +560,51 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + + /* mandatory */ + case OID_802_3_XMIT_ONE_COLLISION: +- debug("%s: OID_802_3_XMIT_ONE_COLLISION\n", __func__); ++printf("%s: OID_802_3_XMIT_ONE_COLLISION\n", __func__); + *outbuf = __constant_cpu_to_le32(0); + retval = 0; + break; + + /* mandatory */ + case OID_802_3_XMIT_MORE_COLLISIONS: +- debug("%s: OID_802_3_XMIT_MORE_COLLISIONS\n", __func__); ++printf("%s: OID_802_3_XMIT_MORE_COLLISIONS\n", __func__); + *outbuf = __constant_cpu_to_le32(0); + retval = 0; + break; + + #ifdef RNDIS_OPTIONAL_STATS + case OID_802_3_XMIT_DEFERRED: +- debug("%s: OID_802_3_XMIT_DEFERRED\n", __func__); ++printf("%s: OID_802_3_XMIT_DEFERRED\n", __func__); + /* TODO */ + break; + + case OID_802_3_XMIT_MAX_COLLISIONS: +- debug("%s: OID_802_3_XMIT_MAX_COLLISIONS\n", __func__); ++printf("%s: OID_802_3_XMIT_MAX_COLLISIONS\n", __func__); + /* TODO */ + break; + + case OID_802_3_RCV_OVERRUN: +- debug("%s: OID_802_3_RCV_OVERRUN\n", __func__); ++printf("%s: OID_802_3_RCV_OVERRUN\n", __func__); + /* TODO */ + break; + + case OID_802_3_XMIT_UNDERRUN: +- debug("%s: OID_802_3_XMIT_UNDERRUN\n", __func__); ++printf("%s: OID_802_3_XMIT_UNDERRUN\n", __func__); + /* TODO */ + break; + + case OID_802_3_XMIT_HEARTBEAT_FAILURE: +- debug("%s: OID_802_3_XMIT_HEARTBEAT_FAILURE\n", __func__); ++printf("%s: OID_802_3_XMIT_HEARTBEAT_FAILURE\n", __func__); + /* TODO */ + break; + + case OID_802_3_XMIT_TIMES_CRS_LOST: +- debug("%s: OID_802_3_XMIT_TIMES_CRS_LOST\n", __func__); ++printf("%s: OID_802_3_XMIT_TIMES_CRS_LOST\n", __func__); + /* TODO */ + break; + + case OID_802_3_XMIT_LATE_COLLISIONS: +- debug("%s: OID_802_3_XMIT_LATE_COLLISIONS\n", __func__); ++printf("%s: OID_802_3_XMIT_LATE_COLLISIONS\n", __func__); + /* TODO */ + break; + #endif /* RNDIS_OPTIONAL_STATS */ +@@ -612,7 +612,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + #ifdef RNDIS_PM + /* power management OIDs (table 4-5) */ + case OID_PNP_CAPABILITIES: +- debug("%s: OID_PNP_CAPABILITIES\n", __func__); ++printf("%s: OID_PNP_CAPABILITIES\n", __func__); + + /* for now, no wakeup capabilities */ + length = sizeof(struct NDIS_PNP_CAPABILITIES); +@@ -620,7 +620,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + retval = 0; + break; + case OID_PNP_QUERY_POWER: +- debug("%s: OID_PNP_QUERY_POWER D%d\n", __func__, ++printf("%s: OID_PNP_QUERY_POWER D%d\n", __func__, + get_unaligned_le32(buf) - 1); + /* + * only suspend is a real power state, and +@@ -632,7 +632,7 @@ static int gen_ndis_query_resp(int configNr, u32 OID, u8 *buf, + #endif + + default: +- debug("%s: query unknown OID 0x%08X\n", __func__, OID); ++printf("%s: query unknown OID 0x%08X\n", __func__, OID); + } + if (retval < 0) + length = 0; +@@ -661,9 +661,9 @@ static int gen_ndis_set_resp(u8 configNr, u32 OID, u8 *buf, u32 buf_len, + + #if defined(DEBUG) && defined(DEBUG_VERBOSE) + if (buf_len) { +- debug("set OID %08x value, len %d:\n", OID, buf_len); ++printf("set OID %08x value, len %d:\n", OID, buf_len); + for (i = 0; i < buf_len; i += 16) { +- debug("%03d: %08x %08x %08x %08x\n", i, ++printf("%03d: %08x %08x %08x %08x\n", i, + get_unaligned_le32(&buf[i]), + get_unaligned_le32(&buf[i + 4]), + get_unaligned_le32(&buf[i + 8]), +@@ -684,7 +684,7 @@ static int gen_ndis_set_resp(u8 configNr, u32 OID, u8 *buf, u32 buf_len, + * MULTICAST, ALL_MULTICAST, BROADCAST + */ + *params->filter = (u16) get_unaligned_le32(buf); +- debug("%s: OID_GEN_CURRENT_PACKET_FILTER %08x\n", ++printf("%s: OID_GEN_CURRENT_PACKET_FILTER %08x\n", + __func__, *params->filter); + + /* +@@ -704,7 +704,7 @@ update_linkstate: + + case OID_802_3_MULTICAST_LIST: + /* I think we can ignore this */ +- debug("%s: OID_802_3_MULTICAST_LIST\n", __func__); ++printf("%s: OID_802_3_MULTICAST_LIST\n", __func__); + retval = 0; + break; + #if 0 +@@ -712,7 +712,7 @@ update_linkstate: + { + struct rndis_config_parameter *param; + param = (struct rndis_config_parameter *) buf; +- debug("%s: OID_GEN_RNDIS_CONFIG_PARAMETER '%*s'\n", ++printf("%s: OID_GEN_RNDIS_CONFIG_PARAMETER '%*s'\n", + __func__, + min(cpu_to_le32(param->ParameterNameLength), 80), + buf + param->ParameterNameOffset); +@@ -730,7 +730,7 @@ update_linkstate: + * FIXME ... then things go batty; Windows wedges itself. + */ + i = get_unaligned_le32(buf); +- debug("%s: OID_PNP_SET_POWER D%d\n", __func__, i - 1); ++printf("%s: OID_PNP_SET_POWER D%d\n", __func__, i - 1); + switch (i) { + case NdisDeviceStateD0: + *params->filter = params->saved_filter; +@@ -755,7 +755,7 @@ update_linkstate: + #endif /* RNDIS_PM */ + + default: +- debug("%s: set unknown OID 0x%08X, size %d\n", ++printf("%s: set unknown OID 0x%08X, size %d\n", + __func__, OID, buf_len); + } + +@@ -810,7 +810,7 @@ static int rndis_query_response(int configNr, rndis_query_msg_type *buf) + rndis_query_cmplt_type *resp; + rndis_resp_t *r; + +- debug("%s: OID = %08X\n", __func__, get_unaligned_le32(&buf->OID)); ++printf("%s: OID = %08X\n", __func__, get_unaligned_le32(&buf->OID)); + if (!rndis_per_dev_params[configNr].dev) + return -ENOTSUPP; + +@@ -864,14 +864,14 @@ static int rndis_set_response(int configNr, rndis_set_msg_type *buf) + BufOffset = get_unaligned_le32(&buf->InformationBufferOffset); + + #ifdef VERBOSE +- debug("%s: Length: %d\n", __func__, BufLength); +- debug("%s: Offset: %d\n", __func__, BufOffset); +- debug("%s: InfoBuffer: ", __func__); ++printf("%s: Length: %d\n", __func__, BufLength); ++printf("%s: Offset: %d\n", __func__, BufOffset); ++printf("%s: InfoBuffer: ", __func__); + + for (i = 0; i < BufLength; i++) +- debug("%02x ", *(((u8 *) buf) + i + 8 + BufOffset)); ++printf("%02x ", *(((u8 *) buf) + i + 8 + BufOffset)); + +- debug("\n"); ++printf("\n"); + #endif + + resp->MessageType = __constant_cpu_to_le32(REMOTE_NDIS_SET_CMPLT); +@@ -1028,7 +1028,7 @@ int rndis_msg_parser(u8 configNr, u8 *buf) + __le32 *tmp; + struct rndis_params *params; + +- debug("%s: configNr = %d, %p\n", __func__, configNr, buf); ++printf("%s: configNr = %d, %p\n", __func__, configNr, buf); + + if (!buf) + return -ENOMEM; +@@ -1050,13 +1050,13 @@ int rndis_msg_parser(u8 configNr, u8 *buf) + /* For USB: responses may take up to 10 seconds */ + switch (MsgType) { + case REMOTE_NDIS_INITIALIZE_MSG: +- debug("%s: REMOTE_NDIS_INITIALIZE_MSG\n", __func__); ++printf("%s: REMOTE_NDIS_INITIALIZE_MSG\n", __func__); + params->state = RNDIS_INITIALIZED; + return rndis_init_response(configNr, + (rndis_init_msg_type *) buf); + + case REMOTE_NDIS_HALT_MSG: +- debug("%s: REMOTE_NDIS_HALT_MSG\n", __func__); ++printf("%s: REMOTE_NDIS_HALT_MSG\n", __func__); + params->state = RNDIS_UNINITIALIZED; + return 0; + +@@ -1069,14 +1069,14 @@ int rndis_msg_parser(u8 configNr, u8 *buf) + (rndis_set_msg_type *) buf); + + case REMOTE_NDIS_RESET_MSG: +- debug("%s: REMOTE_NDIS_RESET_MSG\n", __func__); ++printf("%s: REMOTE_NDIS_RESET_MSG\n", __func__); + return rndis_reset_response(configNr, + (rndis_reset_msg_type *) buf); + + case REMOTE_NDIS_KEEPALIVE_MSG: + /* For USB: host does this every 5 seconds */ + #if defined(DEBUG) && defined(DEBUG_VERBOSE) +- debug("%s: REMOTE_NDIS_KEEPALIVE_MSG\n", __func__); ++printf("%s: REMOTE_NDIS_KEEPALIVE_MSG\n", __func__); + #endif + return rndis_keepalive_response(configNr, + (rndis_keepalive_msg_type *) buf); +@@ -1087,12 +1087,12 @@ int rndis_msg_parser(u8 configNr, u8 *buf) + * In one case those messages seemed to relate to the host + * suspending itself. + */ +- debug("%s: unknown RNDIS message 0x%08X len %d\n", ++printf("%s: unknown RNDIS message 0x%08X len %d\n", + __func__ , MsgType, MsgLength); + { + unsigned i; + for (i = 0; i < MsgLength; i += 16) { +- debug("%03d: " ++printf("%03d: " + " %02x %02x %02x %02x" + " %02x %02x %02x %02x" + " %02x %02x %02x %02x" +@@ -1127,18 +1127,18 @@ int rndis_register(int (*rndis_control_ack)(struct udevice *)) + if (!rndis_per_dev_params[i].used) { + rndis_per_dev_params[i].used = 1; + rndis_per_dev_params[i].ack = rndis_control_ack; +- debug("%s: configNr = %d\n", __func__, i); ++printf("%s: configNr = %d\n", __func__, i); + return i; + } + } +- debug("%s failed\n", __func__); ++printf("%s failed\n", __func__); + + return -1; + } + + void rndis_deregister(int configNr) + { +- debug("%s: configNr = %d\n", __func__, configNr); ++printf("%s: configNr = %d\n", __func__, configNr); + + if (configNr >= RNDIS_MAX_CONFIGS) + return; +@@ -1155,7 +1155,7 @@ int rndis_set_param_dev(u8 configNr, struct udevice *dev, int mtu, + struct net_device_stats *stats, u16 *cdc_filter) + #endif + { +- debug("%s: configNr = %d\n", __func__, configNr); ++printf("%s: configNr = %d\n", __func__, configNr); + if (!dev || !stats) + return -1; + if (configNr >= RNDIS_MAX_CONFIGS) +@@ -1171,7 +1171,7 @@ int rndis_set_param_dev(u8 configNr, struct udevice *dev, int mtu, + + int rndis_set_param_vendor(u8 configNr, u32 vendorID, const char *vendorDescr) + { +- debug("%s: configNr = %d\n", __func__, configNr); ++printf("%s: configNr = %d\n", __func__, configNr); + if (!vendorDescr) + return -1; + if (configNr >= RNDIS_MAX_CONFIGS) +@@ -1185,7 +1185,7 @@ int rndis_set_param_vendor(u8 configNr, u32 vendorID, const char *vendorDescr) + + int rndis_set_param_medium(u8 configNr, u32 medium, u32 speed) + { +- debug("%s: configNr = %d, %u %u\n", __func__, configNr, medium, speed); ++printf("%s: configNr = %d, %u %u\n", __func__, configNr, medium, speed); + if (configNr >= RNDIS_MAX_CONFIGS) + return -1; + +@@ -1278,13 +1278,13 @@ int rndis_rm_hdr(void *buf, int length) + /* DataOffset, DataLength */ + offs = get_unaligned_le32(tmp++) + 8 /* offset of DataOffset */; + if (offs != sizeof(struct rndis_packet_msg_type)) +- debug("%s: unexpected DataOffset: %d\n", __func__, offs); ++printf("%s: unexpected DataOffset: %d\n", __func__, offs); + if (offs >= length) + return -EOVERFLOW; + + len = get_unaligned_le32(tmp++); + if (len + sizeof(struct rndis_packet_msg_type) != length) +- debug("%s: unexpected DataLength: %d, packet length=%d\n", ++printf("%s: unexpected DataLength: %d, packet length=%d\n", + __func__, len, length); + + memmove(buf, buf + offs, len); +diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c +index 5674e8fe4..64fb42d6b 100644 +--- a/drivers/usb/gadget/storage_common.c ++++ b/drivers/usb/gadget/storage_common.c +@@ -576,7 +576,7 @@ static int fsg_lun_open(struct fsg_lun *curlun, unsigned int num_sectors, + curlun->ro = ro; + curlun->file_length = num_sectors << 9; + curlun->num_sectors = num_sectors; +- debug("open backing file: %s\n", filename); ++printf("open backing file: %s\n", filename); + + return 0; + } +diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c +index 43cc2e043..15318c67b 100644 +--- a/drivers/usb/host/dwc2.c ++++ b/drivers/usb/host/dwc2.c +@@ -190,7 +190,7 @@ static int dwc_vbus_supply_init(struct udevice *dev) + ret = device_get_supply_regulator(dev, "vbus-supply", + &priv->vbus_supply); + if (ret) { +- debug("%s: No vbus supply\n", dev->name); ++printf("%s: No vbus supply\n", dev->name); + return 0; + } + +@@ -835,7 +835,7 @@ int wait_for_chhltd(struct dwc2_hc_regs *hc_regs, uint32_t *sub, u8 *toggle) + DWC2_HCTSIZ_XFERSIZE_OFFSET; + *toggle = (hctsiz & DWC2_HCTSIZ_PID_MASK) >> DWC2_HCTSIZ_PID_OFFSET; + +- debug("%s: HCINT=%08x sub=%u toggle=%d\n", __func__, hcint, *sub, ++printf("%s: HCINT=%08x sub=%u toggle=%d\n", __func__, hcint, *sub, + *toggle); + + if (hcint & DWC2_HCINT_XFERCOMP) +@@ -844,7 +844,7 @@ int wait_for_chhltd(struct dwc2_hc_regs *hc_regs, uint32_t *sub, u8 *toggle) + if (hcint & (DWC2_HCINT_NAK | DWC2_HCINT_FRMOVRUN)) + return -EAGAIN; + +- debug("%s: Error (HCINT=%08x)\n", __func__, hcint); ++printf("%s: Error (HCINT=%08x)\n", __func__, hcint); + return -EINVAL; + } + +@@ -862,7 +862,7 @@ static int transfer_chunk(struct dwc2_hc_regs *hc_regs, void *aligned_buffer, + int ret = 0; + uint32_t sub; + +- debug("%s: chunk: pid %d xfer_len %u pkts %u\n", __func__, ++printf("%s: chunk: pid %d xfer_len %u pkts %u\n", __func__, + *pid, xfer_len, num_packets); + + writel((xfer_len << DWC2_HCTSIZ_XFERSIZE_OFFSET) | +@@ -936,7 +936,7 @@ int chunk_msg(struct dwc2_priv *priv, struct usb_device *dev, + uint32_t max_xfer_len; + int ssplit_frame_num = 0; + +- debug("%s: msg: pipe %lx pid %d in %d len %d\n", __func__, pipe, *pid, ++printf("%s: msg: pipe %lx pid %d in %d len %d\n", __func__, pipe, *pid, + in, len); + + max_xfer_len = CONFIG_DWC2_MAX_PACKET_COUNT * max; +@@ -1305,7 +1305,7 @@ static int dwc2_submit_control_msg(struct udevice *dev, struct usb_device *udev, + { + struct dwc2_priv *priv = dev_get_priv(dev); + +- debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__, ++printf("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__, + dev->name, udev, udev->dev->name, udev->portnr); + + return _submit_control_msg(priv, udev, pipe, buffer, length, setup); +@@ -1316,7 +1316,7 @@ static int dwc2_submit_bulk_msg(struct udevice *dev, struct usb_device *udev, + { + struct dwc2_priv *priv = dev_get_priv(dev); + +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + + return _submit_bulk_msg(priv, udev, pipe, buffer, length); + } +@@ -1327,7 +1327,7 @@ static int dwc2_submit_int_msg(struct udevice *dev, struct usb_device *udev, + { + struct dwc2_priv *priv = dev_get_priv(dev); + +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + + return _submit_int_msg(priv, udev, pipe, buffer, length, interval, + nonblock); +diff --git a/drivers/usb/host/ehci-armada100.c b/drivers/usb/host/ehci-armada100.c +index 2ce9f27b8..22c224c40 100644 +--- a/drivers/usb/host/ehci-armada100.c ++++ b/drivers/usb/host/ehci-armada100.c +@@ -32,7 +32,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, + *hcor = (struct ehci_hcor *)((uint32_t) *hccr + + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); + +- debug("armada100-ehci: init hccr %x and hcor %x hc_length %d\n", ++printf("armada100-ehci: init hccr %x and hcor %x hc_length %d\n", + (uint32_t)*hccr, (uint32_t)*hcor, + (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); + +diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c +index fba3595e1..bb5431364 100644 +--- a/drivers/usb/host/ehci-atmel.c ++++ b/drivers/usb/host/ehci-atmel.c +@@ -88,7 +88,7 @@ static int ehci_atmel_probe(struct udevice *dev) + + ret = ehci_atmel_enable_clk(dev); + if (ret) { +- debug("Failed to enable USB Host clock\n"); ++printf("Failed to enable USB Host clock\n"); + return ret; + } + +@@ -97,7 +97,7 @@ static int ehci_atmel_probe(struct udevice *dev) + */ + hcd_base = dev_read_addr(dev); + if (hcd_base == FDT_ADDR_T_NONE) { +- debug("Can't get the EHCI register base address\n"); ++printf("Can't get the EHCI register base address\n"); + return -ENXIO; + } + +@@ -105,7 +105,7 @@ static int ehci_atmel_probe(struct udevice *dev) + hcor = (struct ehci_hcor *) + ((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + +- debug("echi-atmel: init hccr %x and hcor %x hc_length %d\n", ++printf("echi-atmel: init hccr %x and hcor %x hc_length %d\n", + (u32)hccr, (u32)hcor, + (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + +diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c +index c1cdd4b08..770e8e0f9 100644 +--- a/drivers/usb/host/ehci-exynos.c ++++ b/drivers/usb/host/ehci-exynos.c +@@ -56,7 +56,7 @@ static int ehci_usb_of_to_plat(struct udevice *dev) + */ + plat->hcd_base = dev_read_addr(dev); + if (plat->hcd_base == FDT_ADDR_T_NONE) { +- debug("Can't get the XHCI register base address\n"); ++printf("Can't get the XHCI register base address\n"); + return -ENXIO; + } + +@@ -64,7 +64,7 @@ static int ehci_usb_of_to_plat(struct udevice *dev) + node = fdtdec_next_compatible_subnode(blob, dev_of_offset(dev), + COMPAT_SAMSUNG_EXYNOS_USB_PHY, &depth); + if (node <= 0) { +- debug("XHCI: Can't get device node for usb3-phy controller\n"); ++printf("XHCI: Can't get device node for usb3-phy controller\n"); + return -ENODEV; + } + +@@ -73,7 +73,7 @@ static int ehci_usb_of_to_plat(struct udevice *dev) + */ + plat->phy_base = fdtdec_get_addr(blob, node, "reg"); + if (plat->phy_base == FDT_ADDR_T_NONE) { +- debug("Can't get the usbphy register address\n"); ++printf("Can't get the usbphy register address\n"); + return -ENXIO; + } + +diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c +index b61b5382d..ae99d47df 100644 +--- a/drivers/usb/host/ehci-faraday.c ++++ b/drivers/usb/host/ehci-faraday.c +@@ -69,7 +69,7 @@ uint32_t *faraday_ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port) + /* Faraday EHCI has one and only one portsc register */ + if (port) { + /* Printing the message would cause a scan failure! */ +- debug("The request port(%d) is not configured\n", port); ++printf("The request port(%d) is not configured\n", port); + return NULL; + } + +diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c +index cf1f88244..854ceb7e9 100644 +--- a/drivers/usb/host/ehci-fsl.c ++++ b/drivers/usb/host/ehci-fsl.c +@@ -68,7 +68,7 @@ static int ehci_fsl_of_to_plat(struct udevice *dev) + NULL); + if (prop) { + priv->phy_type = (char *)prop; +- debug("phy_type %s\n", priv->phy_type); ++printf("phy_type %s\n", priv->phy_type); + } + + return 0; +@@ -108,7 +108,7 @@ static int ehci_fsl_probe(struct udevice *dev) + */ + priv->hcd_base = dev_read_addr(dev); + if (priv->hcd_base == FDT_ADDR_T_NONE) { +- debug("Can't get the EHCI register base address\n"); ++printf("Can't get the EHCI register base address\n"); + return -ENXIO; + } + #ifdef CONFIG_PPC +@@ -125,7 +125,7 @@ static int ehci_fsl_probe(struct udevice *dev) + if (ehci_fsl_init(priv, ehci, hccr, hcor) < 0) + return -ENXIO; + +- debug("ehci-fsl: init hccr %p and hcor %p hc_length %d\n", ++printf("ehci-fsl: init hccr %p and hcor %p hc_length %d\n", + (void *)hccr, (void *)hcor, + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + +diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c +index ba75c27d0..4190d3835 100644 +--- a/drivers/usb/host/ehci-hcd.c ++++ b/drivers/usb/host/ehci-hcd.c +@@ -156,7 +156,7 @@ static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port) + + if (port < 0 || port >= max_ports) { + /* Printing the message would cause a scan failure! */ +- debug("The request port(%u) exceeds maximum port number\n", ++printf("The request port(%u) exceeds maximum port number\n", + port); + return NULL; + } +@@ -249,7 +249,7 @@ static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) + int idx; + + if (addr != ALIGN(addr, ARCH_DMA_MINALIGN)) +- debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf); ++printf("EHCI-HCD: Misaligned buffer address (%p)\n", buf); + + flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN)); + +@@ -385,10 +385,10 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, + int ret = 0; + struct ehci_ctrl *ctrl = ehci_get_ctrl(dev); + +- debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe, ++printf("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe, + buffer, length, req); + if (req != NULL) +- debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", ++printf("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", + req->request, req->request, + req->requesttype, req->requesttype, + le16_to_cpu(req->value), le16_to_cpu(req->value), +@@ -680,7 +680,7 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, + goto fail; + + if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) { +- debug("TOKEN=%#x\n", qhtoken); ++printf("TOKEN=%#x\n", qhtoken); + switch (QT_TOKEN_GET_STATUS(qhtoken) & + ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) { + case 0: +@@ -710,7 +710,7 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, + } else { + dev->act_len = 0; + #ifndef CONFIG_USB_EHCI_FARADAY +- debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", ++printf("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", + dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts), + ehci_readl(&ctrl->hcor->or_portsc[0]), + ehci_readl(&ctrl->hcor->or_portsc[1])); +@@ -739,7 +739,7 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe, + + srclen = 0; + +- debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n", ++printf("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n", + req->request, req->request, + req->requesttype, req->requesttype, + le16_to_cpu(req->value), le16_to_cpu(req->index)); +@@ -763,19 +763,19 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe, + case DeviceRequest | USB_REQ_GET_DESCRIPTOR: + switch (le16_to_cpu(req->value) >> 8) { + case USB_DT_DEVICE: +- debug("USB_DT_DEVICE request\n"); ++printf("USB_DT_DEVICE request\n"); + srcptr = &descriptor.device; + srclen = descriptor.device.bLength; + break; + case USB_DT_CONFIG: +- debug("USB_DT_CONFIG config\n"); ++printf("USB_DT_CONFIG config\n"); + srcptr = &descriptor.config; + srclen = descriptor.config.bLength + + descriptor.interface.bLength + + descriptor.endpoint.bLength; + break; + case USB_DT_STRING: +- debug("USB_DT_STRING config\n"); ++printf("USB_DT_STRING config\n"); + switch (le16_to_cpu(req->value) & 0xff) { + case 0: /* Language */ + srcptr = "\4\3\1\0"; +@@ -792,34 +792,34 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe, + srclen = 42; + break; + default: +- debug("unknown value DT_STRING %x\n", ++printf("unknown value DT_STRING %x\n", + le16_to_cpu(req->value)); + goto unknown; + } + break; + default: +- debug("unknown value %x\n", le16_to_cpu(req->value)); ++printf("unknown value %x\n", le16_to_cpu(req->value)); + goto unknown; + } + break; + case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): + switch (le16_to_cpu(req->value) >> 8) { + case USB_DT_HUB: +- debug("USB_DT_HUB config\n"); ++printf("USB_DT_HUB config\n"); + srcptr = &descriptor.hub; + srclen = descriptor.hub.bLength; + break; + default: +- debug("unknown value %x\n", le16_to_cpu(req->value)); ++printf("unknown value %x\n", le16_to_cpu(req->value)); + goto unknown; + } + break; + case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): +- debug("USB_REQ_SET_ADDRESS\n"); ++printf("USB_REQ_SET_ADDRESS\n"); + ctrl->rootdev = le16_to_cpu(req->value); + break; + case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: +- debug("USB_REQ_SET_CONFIGURATION\n"); ++printf("USB_REQ_SET_CONFIGURATION\n"); + /* Nothing to do */ + break; + case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): +@@ -891,7 +891,7 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe, + !ehci_is_TDI() && + EHCI_PS_IS_LOWSPEED(reg)) { + /* Low speed device, give up ownership. */ +- debug("port %d low speed --> companion\n", ++printf("port %d low speed --> companion\n", + port - 1); + reg |= EHCI_PS_PO; + ehci_writel(status_reg, reg); +@@ -925,7 +925,7 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe, + reg = ehci_readl(status_reg); + if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) + == EHCI_PS_CS && !ehci_is_TDI()) { +- debug("port %d full speed --> companion\n", port - 1); ++printf("port %d full speed --> companion\n", port - 1); + reg &= ~EHCI_PS_CLEAR; + reg |= EHCI_PS_PO; + ehci_writel(status_reg, reg); +@@ -946,7 +946,7 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe, + ehci_writel(status_reg, reg); + break; + default: +- debug("unknown feature %x\n", le16_to_cpu(req->value)); ++printf("unknown feature %x\n", le16_to_cpu(req->value)); + goto unknown; + } + /* unblock posted writes */ +@@ -976,7 +976,7 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe, + ctrl->portreset &= ~(1 << port); + break; + default: +- debug("unknown feature %x\n", le16_to_cpu(req->value)); ++printf("unknown feature %x\n", le16_to_cpu(req->value)); + goto unknown; + } + ehci_writel(status_reg, reg); +@@ -984,7 +984,7 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe, + (void) ehci_readl(&ctrl->hcor->or_usbcmd); + break; + default: +- debug("Unknown request\n"); ++printf("Unknown request\n"); + goto unknown; + } + +@@ -993,14 +993,14 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe, + if (srcptr != NULL && len > 0) + memcpy(buffer, srcptr, len); + else +- debug("Len is 0\n"); ++printf("Len is 0\n"); + + dev->act_len = len; + dev->status = 0; + return 0; + + unknown: +- debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n", ++printf("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n", + req->requesttype, req->request, le16_to_cpu(req->value), + le16_to_cpu(req->index), le16_to_cpu(req->length)); + +@@ -1122,7 +1122,7 @@ static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks) + + reg = ehci_readl(&ctrl->hccr->cr_hcsparams); + descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); +- debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts); ++printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts); + /* Port Indicators */ + if (HCS_INDICATOR(reg)) + put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics) +@@ -1213,7 +1213,7 @@ static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe, + { + + if (usb_pipetype(pipe) != PIPE_BULK) { +- debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); ++printf("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); + return -1; + } + return ehci_submit_async(dev, pipe, buffer, length, NULL); +@@ -1226,7 +1226,7 @@ static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe, + struct ehci_ctrl *ctrl = ehci_get_ctrl(dev); + + if (usb_pipetype(pipe) != PIPE_CONTROL) { +- debug("non-control pipe (type=%lu)", usb_pipetype(pipe)); ++printf("non-control pipe (type=%lu)", usb_pipetype(pipe)); + return -1; + } + +@@ -1315,9 +1315,9 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, + return NULL; + } + +- debug("Enter create_int_queue\n"); ++printf("Enter create_int_queue\n"); + if (usb_pipetype(pipe) != PIPE_INTERRUPT) { +- debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe)); ++printf("non-interrupt pipe (type=%lu)", usb_pipetype(pipe)); + return NULL; + } + +@@ -1326,13 +1326,13 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, + * no matter the alignment + */ + if (elementsize >= 16384) { +- debug("too large elements for interrupt transfers\n"); ++printf("too large elements for interrupt transfers\n"); + return NULL; + } + + result = malloc(sizeof(*result)); + if (!result) { +- debug("ehci intr queue: out of memory\n"); ++printf("ehci intr queue: out of memory\n"); + goto fail1; + } + result->elementsize = elementsize; +@@ -1340,7 +1340,7 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, + result->first = memalign(USB_DMA_MINALIGN, + sizeof(struct QH) * queuesize); + if (!result->first) { +- debug("ehci intr queue: out of memory\n"); ++printf("ehci intr queue: out of memory\n"); + goto fail2; + } + result->current = result->first; +@@ -1348,7 +1348,7 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, + result->tds = memalign(USB_DMA_MINALIGN, + sizeof(struct qTD) * queuesize); + if (!result->tds) { +- debug("ehci intr queue: out of memory\n"); ++printf("ehci intr queue: out of memory\n"); + goto fail3; + } + memset(result->first, 0, sizeof(struct QH) * queuesize); +@@ -1385,7 +1385,7 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, + + td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); + td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); +- debug("communication direction is '%s'\n", ++printf("communication direction is '%s'\n", + usb_pipein(pipe) ? "in" : "out"); + td->qt_token = cpu_to_hc32( + QT_TOKEN_DT(toggle) | +@@ -1419,7 +1419,7 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, + + if (ctrl->periodic_schedules > 0) { + if (disable_periodic(ctrl) < 0) { +- debug("FATAL: periodic should never fail, but did"); ++printf("FATAL: periodic should never fail, but did"); + goto fail3; + } + } +@@ -1435,12 +1435,12 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, + ALIGN_END_ADDR(struct QH, list, 1)); + + if (enable_periodic(ctrl) < 0) { +- debug("FATAL: periodic should never fail, but did"); ++printf("FATAL: periodic should never fail, but did"); + goto fail3; + } + ctrl->periodic_schedules++; + +- debug("Exit create_int_queue\n"); ++printf("Exit create_int_queue\n"); + return result; + fail3: + free(result->tds); +@@ -1461,7 +1461,7 @@ static void *_ehci_poll_int_queue(struct usb_device *dev, + + /* depleted queue */ + if (cur == NULL) { +- debug("Exit poll_int_queue with completed queue\n"); ++printf("Exit poll_int_queue with completed queue\n"); + return NULL; + } + /* still active */ +@@ -1470,7 +1470,7 @@ static void *_ehci_poll_int_queue(struct usb_device *dev, + ALIGN_END_ADDR(struct qTD, cur_td, 1)); + token = hc32_to_cpu(cur_td->qt_token); + if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) { +- debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token); ++printf("Exit poll_int_queue with no completed intr transfer. token is %x\n", token); + return NULL; + } + +@@ -1486,7 +1486,7 @@ static void *_ehci_poll_int_queue(struct usb_device *dev, + ALIGN_END_ADDR(char, cur->buffer, + queue->elementsize)); + +- debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n", ++printf("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n", + token, cur, queue->first); + return cur->buffer; + } +@@ -1500,7 +1500,7 @@ static int _ehci_destroy_int_queue(struct usb_device *dev, + unsigned long timeout; + + if (disable_periodic(ctrl) < 0) { +- debug("FATAL: periodic should never fail, but did"); ++printf("FATAL: periodic should never fail, but did"); + goto out; + } + ctrl->periodic_schedules--; +@@ -1508,9 +1508,9 @@ static int _ehci_destroy_int_queue(struct usb_device *dev, + struct QH *cur = &ctrl->periodic_queue; + timeout = get_timer(0) + 500; /* abort after 500ms */ + while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) { +- debug("considering %p, with qh_link %x\n", cur, cur->qh_link); ++printf("considering %p, with qh_link %x\n", cur, cur->qh_link); + if (NEXT_QH(cur) == queue->first) { +- debug("found candidate. removing from chain\n"); ++printf("found candidate. removing from chain\n"); + cur->qh_link = queue->last->qh_link; + flush_dcache_range((unsigned long)cur, + ALIGN_END_ADDR(struct QH, cur, 1)); +@@ -1528,7 +1528,7 @@ static int _ehci_destroy_int_queue(struct usb_device *dev, + if (ctrl->periodic_schedules > 0) { + result = enable_periodic(ctrl); + if (result < 0) +- debug("FATAL: periodic should never fail, but did"); ++printf("FATAL: periodic should never fail, but did"); + } + + out: +@@ -1548,7 +1548,7 @@ static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe, + unsigned long timeout; + int result = 0, ret; + +- debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", ++printf("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", + dev, pipe, buffer, length, interval); + + queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval); +@@ -1564,7 +1564,7 @@ static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe, + } + + if (backbuffer != buffer) { +- debug("got wrong buffer back (%p instead of %p)\n", ++printf("got wrong buffer back (%p instead of %p)\n", + backbuffer, buffer); + return -EINVAL; + } +@@ -1638,7 +1638,7 @@ static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev, + unsigned long pipe, void *buffer, int length, + struct devrequest *setup) + { +- debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__, ++printf("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__, + dev->name, udev, udev->dev->name, udev->portnr); + + return _ehci_submit_control_msg(udev, pipe, buffer, length, setup); +@@ -1647,7 +1647,7 @@ static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev, + static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev, + unsigned long pipe, void *buffer, int length) + { +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + return _ehci_submit_bulk_msg(udev, pipe, buffer, length); + } + +@@ -1655,7 +1655,7 @@ static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev, + unsigned long pipe, void *buffer, int length, + int interval, bool nonblock) + { +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + return _ehci_submit_int_msg(udev, pipe, buffer, length, interval, + nonblock); + } +@@ -1664,7 +1664,7 @@ static struct int_queue *ehci_create_int_queue(struct udevice *dev, + struct usb_device *udev, unsigned long pipe, int queuesize, + int elementsize, void *buffer, int interval) + { +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + return _ehci_create_int_queue(udev, pipe, queuesize, elementsize, + buffer, interval); + } +@@ -1672,14 +1672,14 @@ static struct int_queue *ehci_create_int_queue(struct udevice *dev, + static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev, + struct int_queue *queue) + { +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + return _ehci_poll_int_queue(udev, queue); + } + + static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev, + struct int_queue *queue) + { +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + return _ehci_destroy_int_queue(udev, queue); + } + +@@ -1709,7 +1709,7 @@ int ehci_register(struct udevice *dev, struct ehci_hccr *hccr, + struct ehci_ctrl *ctrl = dev_get_priv(dev); + int ret = -1; + +- debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__, ++printf("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__, + dev->name, ctrl, hccr, hcor, init); + + if (!ctrl || !hccr || !hcor) +@@ -1743,7 +1743,7 @@ done: + return 0; + err: + free(ctrl); +- debug("%s: failed, ret=%d\n", __func__, ret); ++printf("%s: failed, ret=%d\n", __func__, ret); + return ret; + } + +diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c +index 5420bb977..e4467633a 100644 +--- a/drivers/usb/host/ehci-marvell.c ++++ b/drivers/usb/host/ehci-marvell.c +@@ -112,7 +112,7 @@ static int ehci_mvebu_probe(struct udevice *dev) + */ + priv->hcd_base = dev_read_addr(dev); + if (priv->hcd_base == FDT_ADDR_T_NONE) { +- debug("Can't get the EHCI register base address\n"); ++printf("Can't get the EHCI register base address\n"); + return -ENXIO; + } + +@@ -132,7 +132,7 @@ static int ehci_mvebu_probe(struct udevice *dev) + hcor = (struct ehci_hcor *) + ((uintptr_t)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + +- debug("ehci-marvell: init hccr %lx and hcor %lx hc_length %ld\n", ++printf("ehci-marvell: init hccr %lx and hcor %lx hc_length %ld\n", + (uintptr_t)hccr, (uintptr_t)hcor, + (uintptr_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + +@@ -215,7 +215,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, + *hcor = (struct ehci_hcor *)((uint32_t) *hccr + + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); + +- debug("ehci-marvell: init hccr %x and hcor %x hc_length %d\n", ++printf("ehci-marvell: init hccr %x and hcor %x hc_length %d\n", + (uint32_t)*hccr, (uint32_t)*hcor, + (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); + +diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c +index ab863f41b..b6efe385d 100644 +--- a/drivers/usb/host/ehci-mx5.c ++++ b/drivers/usb/host/ehci-mx5.c +@@ -328,7 +328,7 @@ static int ehci_usb_probe(struct udevice *dev) + ret = device_get_supply_regulator(dev, "vbus-supply", + &priv->vbus_supply); + if (ret) +- debug("%s: No vbus supply\n", dev->name); ++printf("%s: No vbus supply\n", dev->name); + + if (!ret && priv->vbus_supply) { + ret = regulator_set_enable(priv->vbus_supply, +diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c +index c3e417051..958b262e4 100644 +--- a/drivers/usb/host/ehci-mx6.c ++++ b/drivers/usb/host/ehci-mx6.c +@@ -660,7 +660,7 @@ static int ehci_usb_probe(struct udevice *dev) + ret = device_get_supply_regulator(dev, "vbus-supply", + &priv->vbus_supply); + if (ret) +- debug("%s: No vbus supply\n", dev->name); ++printf("%s: No vbus supply\n", dev->name); + #endif + + #if !defined(CONFIG_PHY) +diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c +index 12c422d81..e92f5d173 100644 +--- a/drivers/usb/host/ehci-omap.c ++++ b/drivers/usb/host/ehci-omap.c +@@ -88,7 +88,7 @@ static int omap_ehci_tll_reset(void) + /* Wait for TLL reset to complete */ + while (!(readl(&usbtll->syss) & OMAP_USBTLL_SYSSTATUS_RESETDONE)) + if (get_timer(init) > CONFIG_SYS_HZ) { +- debug("OMAP EHCI error: timeout resetting TLL\n"); ++printf("OMAP EHCI error: timeout resetting TLL\n"); + return -EL3RST; + } + +@@ -166,7 +166,7 @@ static inline void omap_ehci_phy_reset(int on, int delay) + /* Reset is needed otherwise the kernel-driver will throw an error. */ + int omap_ehci_hcd_stop(void) + { +- debug("Resetting OMAP EHCI\n"); ++printf("Resetting OMAP EHCI\n"); + omap_ehci_phy_reset(1, 0); + + if (omap_uhh_reset() < 0) +@@ -197,7 +197,7 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata) + int ret; + unsigned int i, reg = 0, rev = 0; + +- debug("Initializing OMAP EHCI\n"); ++printf("Initializing OMAP EHCI\n"); + + ret = board_usb_init(index, USB_INIT_HOST); + if (ret < 0) +@@ -276,7 +276,7 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata) + setbits_le32(®, OMAP_P3_MODE_HSIC); + } + +- debug("OMAP UHH_REVISION 0x%x\n", rev); ++printf("OMAP UHH_REVISION 0x%x\n", rev); + writel(reg, &uhh->hostconfig); + + for (i = 0; i < OMAP_HS_USB_PORTS; i++) +@@ -300,7 +300,7 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata) + if (is_ehci_phy_mode(usbhs_pdata->port_mode[i])) + omap_ehci_soft_phy_reset(i); + +- debug("OMAP EHCI init done\n"); ++printf("OMAP EHCI init done\n"); + return 0; + } + +diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c +index 4f711de7d..524736486 100644 +--- a/drivers/usb/host/ehci-pci.c ++++ b/drivers/usb/host/ehci-pci.c +@@ -40,7 +40,7 @@ static int ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr, + hcor = (struct ehci_hcor *)((uintptr_t) hccr + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + +- debug("EHCI-PCI init hccr %#lx and hcor %#lx hc_length %d\n", ++printf("EHCI-PCI init hccr %#lx and hcor %#lx hc_length %d\n", + (ulong)hccr, (ulong)hcor, + (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + +@@ -79,7 +79,7 @@ static void ehci_pci_legacy_init(pci_dev_t pdev, struct ehci_hccr **ret_hccr, + hcor = (struct ehci_hcor *)((uintptr_t) hccr + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + +- debug("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", ++printf("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", + (u32)hccr, (u32)hcor, + (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + +diff --git a/drivers/usb/host/ehci-spear.c b/drivers/usb/host/ehci-spear.c +index 3e87e0c7f..30b24425c 100644 +--- a/drivers/usb/host/ehci-spear.c ++++ b/drivers/usb/host/ehci-spear.c +@@ -56,7 +56,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, + *hcor = (struct ehci_hcor *)((uint32_t) *hccr + + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); + +- debug("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n", ++printf("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n", + (uint32_t)*hccr, (uint32_t)*hcor, + (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); + +diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c +index b02ee89c3..d5a34446a 100644 +--- a/drivers/usb/host/ehci-tegra.c ++++ b/drivers/usb/host/ehci-tegra.c +@@ -273,7 +273,7 @@ static void set_up_vbus(struct fdt_usb *config, enum usb_init_type init) + vbus_value = (init == USB_INIT_HOST); + dm_gpio_set_value(&config->vbus_gpio, vbus_value); + +- debug("set_up_vbus: GPIO %d %d\n", ++printf("set_up_vbus: GPIO %d %d\n", + gpio_get_number(&config->vbus_gpio), vbus_value); + } + } +@@ -380,7 +380,7 @@ static int init_utmi_usb_controller(struct fdt_usb *config, + VBUS_SENSE_CTL_A_SESS_VLD << VBUS_SENSE_CTL_SHIFT); + + controller = &fdt_usb_controllers[config->type]; +- debug("controller=%p, type=%d\n", controller, config->type); ++printf("controller=%p, type=%d\n", controller, config->type); + + /* + * PLL Delay CONFIGURATION settings. The following parameters control +@@ -682,7 +682,7 @@ static int init_ulpi_usb_controller(struct fdt_usb *config, + + static void config_clock(const u32 timing[]) + { +- debug("%s: DIVM = %d, DIVN = %d, DIVP = %d, cpcon/lfcon = %d/%d\n", ++printf("%s: DIVM = %d, DIVN = %d, DIVP = %d, cpcon/lfcon = %d/%d\n", + __func__, timing[PARAM_DIVM], timing[PARAM_DIVN], + timing[PARAM_DIVP], timing[PARAM_CPCON], timing[PARAM_LFCON]); + +@@ -696,7 +696,7 @@ static int fdt_decode_usb(struct udevice *dev, struct fdt_usb *config) + const char *phy, *mode; + + config->reg = (struct usb_ctlr *)dev_read_addr(dev); +- debug("reg=%p\n", config->reg); ++printf("reg=%p\n", config->reg); + mode = dev_read_string(dev, "dr_mode"); + if (mode) { + if (0 == strcmp(mode, "host")) +@@ -706,7 +706,7 @@ static int fdt_decode_usb(struct udevice *dev, struct fdt_usb *config) + else if (0 == strcmp(mode, "otg")) + config->dr_mode = DR_MODE_OTG; + else { +- debug("%s: Cannot decode dr_mode '%s'\n", __func__, ++printf("%s: Cannot decode dr_mode '%s'\n", __func__, + mode); + return -EINVAL; + } +@@ -720,14 +720,14 @@ static int fdt_decode_usb(struct udevice *dev, struct fdt_usb *config) + config->has_legacy_mode = dev_read_bool(dev, "nvidia,has-legacy-mode"); + config->periph_id = clock_decode_periph_id(dev); + if (config->periph_id == PERIPH_ID_NONE) { +- debug("%s: Missing/invalid peripheral ID\n", __func__); ++printf("%s: Missing/invalid peripheral ID\n", __func__); + return -EINVAL; + } + gpio_request_by_name(dev, "nvidia,vbus-gpio", 0, &config->vbus_gpio, + GPIOD_IS_OUT); + gpio_request_by_name(dev, "nvidia,phy-reset-gpio", 0, + &config->phy_reset_gpio, GPIOD_IS_OUT); +- debug("legacy_mode=%d, utmi=%d, ulpi=%d, periph_id=%d, vbus=%d, phy_reset=%d, dr_mode=%d, reg=%p\n", ++printf("legacy_mode=%d, utmi=%d, ulpi=%d, periph_id=%d, vbus=%d, phy_reset=%d, dr_mode=%d, reg=%p\n", + config->has_legacy_mode, config->utmi, config->ulpi, + config->periph_id, gpio_get_number(&config->vbus_gpio), + gpio_get_number(&config->phy_reset_gpio), config->dr_mode, +@@ -776,7 +776,7 @@ int usb_common_init(struct fdt_usb *config, enum usb_init_type init) + return -1; + } + +- debug("%d, %d\n", config->utmi, config->ulpi); ++printf("%d, %d\n", config->utmi, config->ulpi); + if (config->utmi) + ret = init_utmi_usb_controller(config, init); + else if (config->ulpi) +diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c +index 648e13644..bdb894131 100644 +--- a/drivers/usb/host/ehci-vf.c ++++ b/drivers/usb/host/ehci-vf.c +@@ -244,7 +244,7 @@ static int vf_usb_of_to_plat(struct udevice *dev) + */ + priv->init_type = USB_INIT_DEVICE; + } else { +- debug("%s: Cannot decode dr_mode '%s'\n", ++printf("%s: Cannot decode dr_mode '%s'\n", + __func__, mode); + return -EINVAL; + } +diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c +index 3be0b311a..22266c0ff 100644 +--- a/drivers/usb/host/ohci-lpc32xx.c ++++ b/drivers/usb/host/ohci-lpc32xx.c +@@ -163,7 +163,7 @@ int usb_cpu_init(void) + #if CONFIG_IS_ENABLED(DM_I2C) + ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev); + if (ret) { +- debug("%s: No bus %d\n", __func__, I2C_2); ++printf("%s: No bus %d\n", __func__, I2C_2); + return ret; + } + #endif +@@ -219,7 +219,7 @@ int usb_cpu_stop(void) + #if CONFIG_IS_ENABLED(DM_I2C) + ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev); + if (ret) { +- debug("%s: No bus %d\n", __func__, I2C_2); ++printf("%s: No bus %d\n", __func__, I2C_2); + return ret; + } + #endif +diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c +index f1fc93f3d..a3cd2979e 100644 +--- a/drivers/usb/host/r8a66597-hcd.c ++++ b/drivers/usb/host/r8a66597-hcd.c +@@ -739,7 +739,7 @@ static int r8a66597_submit_control_msg(struct udevice *udev, + u16 r8a66597_address = setup->request == USB_REQ_SET_ADDRESS ? + 0 : dev->devnum; + +- debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__, ++printf("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__, + udev->name, dev, dev->dev->name, dev->portnr); + + R8A66597_DPRINT("%s\n", __func__); +@@ -776,7 +776,7 @@ static int r8a66597_submit_bulk_msg(struct udevice *udev, + struct r8a66597 *r8a66597 = dev_get_priv(udev); + int ret = 0; + +- debug("%s: dev='%s', udev=%p\n", __func__, udev->name, dev); ++printf("%s: dev='%s', udev=%p\n", __func__, udev->name, dev); + + R8A66597_DPRINT("%s\n", __func__); + R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n", +diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c +index d7cc92aa5..49690a882 100644 +--- a/drivers/usb/host/usb-sandbox.c ++++ b/drivers/usb/host/usb-sandbox.c +@@ -21,19 +21,19 @@ static void usbmon_trace(struct udevice *bus, ulong pipe, + int type; + + type = (pipe & USB_PIPE_TYPE_MASK) >> USB_PIPE_TYPE_SHIFT; +- debug("0 0 S %c%c:%d:%03ld:%ld", types[type], ++printf("0 0 S %c%c:%d:%03ld:%ld", types[type], + pipe & USB_DIR_IN ? 'i' : 'o', + dev_seq(bus), + (pipe & USB_PIPE_DEV_MASK) >> USB_PIPE_DEV_SHIFT, + (pipe & USB_PIPE_EP_MASK) >> USB_PIPE_EP_SHIFT); + if (setup) { +- debug(" s %02x %02x %04x %04x %04x", setup->requesttype, ++printf(" s %02x %02x %04x %04x %04x", setup->requesttype, + setup->request, setup->value, setup->index, + setup->length); + } +- debug(" %s", emul ? emul->name : "(no emul found)"); ++printf(" %s", emul ? emul->name : "(no emul found)"); + +- debug("\n"); ++printf("\n"); + } + + static int sandbox_submit_control(struct udevice *bus, +@@ -47,7 +47,7 @@ static int sandbox_submit_control(struct udevice *bus, + int ret; + + /* Just use child of dev as emulator? */ +- debug("%s: bus=%s\n", __func__, bus->name); ++printf("%s: bus=%s\n", __func__, bus->name); + ret = usb_emul_find(bus, pipe, udev->portnr, &emul); + usbmon_trace(bus, pipe, setup, emul); + if (ret) +@@ -55,14 +55,14 @@ static int sandbox_submit_control(struct udevice *bus, + + if (usb_pipedevice(pipe) == ctrl->rootdev) { + if (setup->request == USB_REQ_SET_ADDRESS) { +- debug("%s: Set root hub's USB address\n", __func__); ++printf("%s: Set root hub's USB address\n", __func__); + ctrl->rootdev = le16_to_cpu(setup->value); + } + } + + ret = usb_emul_control(emul, udev, pipe, buffer, length, setup); + if (ret < 0) { +- debug("ret=%d\n", ret); ++printf("ret=%d\n", ret); + udev->status = ret; + udev->act_len = 0; + } else { +@@ -80,14 +80,14 @@ static int sandbox_submit_bulk(struct udevice *bus, struct usb_device *udev, + int ret; + + /* Just use child of dev as emulator? */ +- debug("%s: bus=%s\n", __func__, bus->name); ++printf("%s: bus=%s\n", __func__, bus->name); + ret = usb_emul_find(bus, pipe, udev->portnr, &emul); + usbmon_trace(bus, pipe, NULL, emul); + if (ret) + return ret; + ret = usb_emul_bulk(emul, udev, pipe, buffer, length); + if (ret < 0) { +- debug("ret=%d\n", ret); ++printf("ret=%d\n", ret); + udev->status = ret; + udev->act_len = 0; + } else { +@@ -106,7 +106,7 @@ static int sandbox_submit_int(struct udevice *bus, struct usb_device *udev, + int ret; + + /* Just use child of dev as emulator? */ +- debug("%s: bus=%s\n", __func__, bus->name); ++printf("%s: bus=%s\n", __func__, bus->name); + ret = usb_emul_find(bus, pipe, udev->portnr, &emul); + usbmon_trace(bus, pipe, NULL, emul); + if (ret) +diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c +index e3b616c32..9bc7dd5b2 100644 +--- a/drivers/usb/host/usb-uclass.c ++++ b/drivers/usb/host/usb-uclass.c +@@ -224,7 +224,7 @@ static void usb_scan_bus(struct udevice *bus, bool recurse) + assert(recurse); /* TODO: Support non-recusive */ + + printf("scanning bus %s for devices... ", bus->name); +- debug("\n"); ++printf("\n"); + ret = usb_scan_device(bus, 0, USB_SPEED_FULL, &dev); + if (ret) + printf("failed, error %d\n", ret); +@@ -327,7 +327,7 @@ int usb_init(void) + } + } + +- debug("scan end\n"); ++printf("scan end\n"); + + /* Remove any devices that were not found on this scan */ + remove_inactive_children(uc, bus); +@@ -559,7 +559,7 @@ static int usb_find_and_bind_driver(struct udevice *parent, + ofnode node = usb_get_ofnode(parent, port); + + *devp = NULL; +- debug("%s: Searching for driver\n", __func__); ++printf("%s: Searching for driver\n", __func__); + start = ll_entry_start(struct usb_driver_entry, usb_driver_entry); + n_ents = ll_entry_count(struct usb_driver_entry, usb_driver_entry); + for (entry = start; entry != start + n_ents; entry++) { +@@ -585,7 +585,7 @@ static int usb_find_and_bind_driver(struct udevice *parent, + &dev); + if (ret) + goto error; +- debug("%s: Match found: %s\n", __func__, drv->name); ++printf("%s: Match found: %s\n", __func__, drv->name); + dev->driver_data = id->driver_info; + plat = dev_get_parent_plat(dev); + plat->id = *id; +@@ -602,7 +602,7 @@ static int usb_find_and_bind_driver(struct udevice *parent, + ret = device_bind_driver(parent, "usb_dev_generic_drv", str, devp); + + error: +- debug("%s: No match found: %d\n", __func__, ret); ++printf("%s: No match found: %d\n", __func__, ret); + return ret; + } + +@@ -627,7 +627,7 @@ static int usb_find_child(struct udevice *parent, + /* If this device is already in use, skip it */ + if (device_active(dev)) + continue; +- debug(" %s: name='%s', plat=%d, desc=%d\n", __func__, ++printf(" %s: name='%s', plat=%d, desc=%d\n", __func__, + dev->name, plat->id.bDeviceClass, desc->bDeviceClass); + if (usb_match_one_id(desc, iface, &plat->id)) { + *devp = dev; +@@ -687,15 +687,15 @@ int usb_scan_device(struct udevice *parent, int port, + udev->speed = speed; + udev->devnum = priv->next_addr + 1; + udev->portnr = port; +- debug("Calling usb_setup_device(), portnr=%d\n", udev->portnr); ++printf("Calling usb_setup_device(), portnr=%d\n", udev->portnr); + parent_udev = device_get_uclass_id(parent) == UCLASS_USB_HUB ? + dev_get_parent_priv(parent) : NULL; + ret = usb_setup_device(udev, priv->desc_before_addr, parent_udev); +- debug("read_descriptor for '%s': ret=%d\n", parent->name, ret); ++printf("read_descriptor for '%s': ret=%d\n", parent->name, ret); + if (ret) + return ret; + ret = usb_find_child(parent, &udev->descriptor, iface, &dev); +- debug("** usb_find_child returns %d\n", ret); ++printf("** usb_find_child returns %d\n", ret); + if (ret) { + if (ret != -ENOENT) + return ret; +@@ -708,13 +708,13 @@ int usb_scan_device(struct udevice *parent, int port, + created = true; + } + plat = dev_get_parent_plat(dev); +- debug("%s: Probing '%s', plat=%p\n", __func__, dev->name, plat); ++printf("%s: Probing '%s', plat=%p\n", __func__, dev->name, plat); + plat->devnum = udev->devnum; + plat->udev = udev; + priv->next_addr++; + ret = device_probe(dev); + if (ret) { +- debug("%s: Device '%s' probe failed\n", __func__, dev->name); ++printf("%s: Device '%s' probe failed\n", __func__, dev->name); + priv->next_addr--; + if (created) + device_unbind(dev); +@@ -800,7 +800,7 @@ struct udevice *usb_get_bus(struct udevice *dev) + if (!bus) { + /* By design this cannot happen */ + assert(bus); +- debug("USB HUB '%s' does not have a controller\n", dev->name); ++printf("USB HUB '%s' does not have a controller\n", dev->name); + } + + return bus; +diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c +index 3e0ae80ce..412f1ede6 100644 +--- a/drivers/usb/host/xhci-dwc3.c ++++ b/drivers/usb/host/xhci-dwc3.c +@@ -87,7 +87,7 @@ int dwc3_core_init(struct dwc3 *dwc3_reg) + reg &= ~DWC3_GCTL_DSBLCLKGTNG; + break; + default: +- debug("No power optimization available\n"); ++printf("No power optimization available\n"); + } + + /* +diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c +index 270be934e..7cd14bf95 100644 +--- a/drivers/usb/host/xhci-exynos5.c ++++ b/drivers/usb/host/xhci-exynos5.c +@@ -65,7 +65,7 @@ static int xhci_usb_of_to_plat(struct udevice *dev) + */ + plat->hcd_base = dev_read_addr(dev); + if (plat->hcd_base == FDT_ADDR_T_NONE) { +- debug("Can't get the XHCI register base address\n"); ++printf("Can't get the XHCI register base address\n"); + return -ENXIO; + } + +@@ -73,7 +73,7 @@ static int xhci_usb_of_to_plat(struct udevice *dev) + node = fdtdec_next_compatible_subnode(blob, dev_of_offset(dev), + COMPAT_SAMSUNG_EXYNOS5_USB3_PHY, &depth); + if (node <= 0) { +- debug("XHCI: Can't get device node for usb3-phy controller\n"); ++printf("XHCI: Can't get device node for usb3-phy controller\n"); + return -ENODEV; + } + +@@ -82,7 +82,7 @@ static int xhci_usb_of_to_plat(struct udevice *dev) + */ + plat->phy_base = fdtdec_get_addr(blob, node, "reg"); + if (plat->phy_base == FDT_ADDR_T_NONE) { +- debug("Can't get the usbphy register address\n"); ++printf("Can't get the usbphy register address\n"); + return -ENXIO; + } + +@@ -189,7 +189,7 @@ static int exynos_xhci_core_init(struct exynos_xhci *exynos) + + ret = dwc3_core_init(exynos->dwc3_reg); + if (ret) { +- debug("failed to initialize core\n"); ++printf("failed to initialize core\n"); + return -EINVAL; + } + +diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c +index f062f12ad..326435863 100644 +--- a/drivers/usb/host/xhci-fsl.c ++++ b/drivers/usb/host/xhci-fsl.c +@@ -70,7 +70,7 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) + + ret = dwc3_core_init(fsl_xhci->dwc3_reg); + if (ret) { +- debug("%s:failed to initialize core\n", __func__); ++printf("%s:failed to initialize core\n", __func__); + return ret; + } + +@@ -122,7 +122,7 @@ static int xhci_fsl_probe(struct udevice *dev) + */ + priv->hcd_base = dev_read_addr(dev); + if (priv->hcd_base == FDT_ADDR_T_NONE) { +- debug("Can't get the XHCI register base address\n"); ++printf("Can't get the XHCI register base address\n"); + return -ENXIO; + } + priv->ctx.hcd = (struct xhci_hccr *)priv->hcd_base; +@@ -141,7 +141,7 @@ static int xhci_fsl_probe(struct udevice *dev) + hcor = (struct xhci_hcor *)((uintptr_t) hccr + + HC_LENGTH(xhci_readl(&hccr->cr_capbase))); + +- debug("xhci-fsl: init hccr %lx and hcor %lx hc_length %lx\n", ++printf("xhci-fsl: init hccr %lx and hcor %lx hc_length %lx\n", + (uintptr_t)hccr, (uintptr_t)hcor, + (uintptr_t)HC_LENGTH(xhci_readl(&hccr->cr_capbase))); + +@@ -200,7 +200,7 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) + *hcor = (struct xhci_hcor *)((uintptr_t) *hccr + + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + +- debug("fsl-xhci: init hccr %lx and hcor %lx hc_length %lx\n", ++printf("fsl-xhci: init hccr %lx and hcor %lx hc_length %lx\n", + (uintptr_t)*hccr, (uintptr_t)*hcor, + (uintptr_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + +diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c +index 1c11c2e7e..018ae76ee 100644 +--- a/drivers/usb/host/xhci-mem.c ++++ b/drivers/usb/host/xhci-mem.c +@@ -770,7 +770,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, + dev = dev_get_parent_priv(dev->dev->parent); + } + +- debug("route string %x\n", route); ++printf("route string %x\n", route); + #endif + slot_ctx->dev_info |= cpu_to_le32(route); + +@@ -817,7 +817,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, + #endif + + port_num = hop_portnr; +- debug("port_num = %d\n", port_num); ++printf("port_num = %d\n", port_num); + + slot_ctx->dev_info2 |= + cpu_to_le32(((port_num & ROOT_HUB_PORT_MASK) << +@@ -826,22 +826,22 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, + /* Step 4 - ring already allocated */ + /* Step 5 */ + ep0_ctx->ep_info2 = cpu_to_le32(EP_TYPE(CTRL_EP)); +- debug("SPEED = %d\n", speed); ++printf("SPEED = %d\n", speed); + + switch (speed) { + case USB_SPEED_SUPER: + ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(512)); +- debug("Setting Packet size = 512bytes\n"); ++printf("Setting Packet size = 512bytes\n"); + break; + case USB_SPEED_HIGH: + /* USB core guesses at a 64-byte max packet first for FS devices */ + case USB_SPEED_FULL: + ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(64)); +- debug("Setting Packet size = 64bytes\n"); ++printf("Setting Packet size = 64bytes\n"); + break; + case USB_SPEED_LOW: + ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(8)); +- debug("Setting Packet size = 8bytes\n"); ++printf("Setting Packet size = 8bytes\n"); + break; + default: + /* New speed? */ +diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c +index 18b4f55d8..badefea38 100644 +--- a/drivers/usb/host/xhci-mtk.c ++++ b/drivers/usb/host/xhci-mtk.c +@@ -180,12 +180,12 @@ static int xhci_mtk_ofdata_get(struct mtk_xhci *mtk) + ret = device_get_supply_regulator(dev, "vusb33-supply", + &mtk->vusb33_supply); + if (ret) +- debug("can't get vusb33 regulator %d!\n", ret); ++printf("can't get vusb33 regulator %d!\n", ret); + + ret = device_get_supply_regulator(dev, "vbus-supply", + &mtk->vbus_supply); + if (ret) +- debug("can't get vbus regulator %d!\n", ret); ++printf("can't get vbus regulator %d!\n", ret); + + /* optional properties to disable ports, ignore the error */ + dev_read_u32(dev, "mediatek,u3p-dis-msk", &mtk->u3p_dis_msk); +diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c +index 46b89de85..16027bde4 100644 +--- a/drivers/usb/host/xhci-mvebu.c ++++ b/drivers/usb/host/xhci-mvebu.c +@@ -74,7 +74,7 @@ static int xhci_usb_of_to_plat(struct udevice *dev) + */ + plat->hcd_base = dev_read_addr(dev); + if (plat->hcd_base == FDT_ADDR_T_NONE) { +- debug("Can't get the XHCI register base address\n"); ++printf("Can't get the XHCI register base address\n"); + return -ENXIO; + } + +diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c +index 501129d76..4b9fa285c 100644 +--- a/drivers/usb/host/xhci-omap.c ++++ b/drivers/usb/host/xhci-omap.c +@@ -34,7 +34,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap) + + ret = dwc3_core_init(omap->dwc3_reg); + if (ret) { +- debug("%s:failed to initialize core\n", __func__); ++printf("%s:failed to initialize core\n", __func__); + return ret; + } + +@@ -75,7 +75,7 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) + *hcor = (struct xhci_hcor *)((uint32_t) *hccr + + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + +- debug("omap-xhci: init hccr %x and hcor %x hc_length %d\n", ++printf("omap-xhci: init hccr %x and hcor %x hc_length %d\n", + (uint32_t)*hccr, (uint32_t)*hcor, + (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + +diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c +index aaa243f29..1c78dc984 100644 +--- a/drivers/usb/host/xhci-pci.c ++++ b/drivers/usb/host/xhci-pci.c +@@ -30,7 +30,7 @@ static int xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, + hcor = (struct xhci_hcor *)((uintptr_t) hccr + + HC_LENGTH(xhci_readl(&hccr->cr_capbase))); + +- debug("XHCI-PCI init hccr %p and hcor %p hc_length %d\n", ++printf("XHCI-PCI init hccr %p and hcor %p hc_length %d\n", + hccr, hcor, (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase))); + + *ret_hccr = hccr; +diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c +index 5fc7afb7d..abe51a2e1 100644 +--- a/drivers/usb/host/xhci-rcar.c ++++ b/drivers/usb/host/xhci-rcar.c +@@ -138,7 +138,7 @@ static int xhci_rcar_of_to_plat(struct udevice *dev) + + plat->hcd_base = dev_read_addr(dev); + if (plat->hcd_base == FDT_ADDR_T_NONE) { +- debug("Can't get the XHCI register base address\n"); ++printf("Can't get the XHCI register base address\n"); + return -ENXIO; + } + +diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c +index 35bd5cd29..530125674 100644 +--- a/drivers/usb/host/xhci-ring.c ++++ b/drivers/usb/host/xhci-ring.c +@@ -230,7 +230,7 @@ static int prepare_ring(struct xhci_ctrl *ctrl, struct xhci_ring *ep_ring, + puts("WARN halted endpoint, queueing URB anyway.\n"); + case EP_STATE_STOPPED: + case EP_STATE_RUNNING: +- debug("EP STATE RUNNING.\n"); ++printf("EP STATE RUNNING.\n"); + break; + default: + puts("ERROR unknown endpoint state for ep\n"); +@@ -586,7 +586,7 @@ int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe, + void *last_transfer_trb_addr; + int available_length; + +- debug("dev=%p, pipe=%lx, buffer=%p, length=%d\n", ++printf("dev=%p, pipe=%lx, buffer=%p, length=%d\n", + udev, pipe, buffer, length); + + available_length = length; +@@ -719,7 +719,7 @@ int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe, + again: + event = xhci_wait_for_event(ctrl, TRB_TRANSFER); + if (!event) { +- debug("XHCI bulk transfer timed out, aborting...\n"); ++printf("XHCI bulk transfer timed out, aborting...\n"); + abort_td(udev, ep_index); + udev->status = USB_ST_NAK_REC; /* closest thing to a timeout */ + udev->act_len = 0; +@@ -775,7 +775,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, + union xhci_trb *event; + u32 remainder; + +- debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", ++printf("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", + req->request, req->request, + req->requesttype, req->requesttype, + le16_to_cpu(req->value), le16_to_cpu(req->value), +@@ -830,7 +830,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, + start_trb = &ep_ring->enqueue->generic; + start_cycle = ep_ring->cycle_state; + +- debug("start_trb %p, start_cycle %d\n", start_trb, start_cycle); ++printf("start_trb %p, start_cycle %d\n", start_trb, start_cycle); + + /* Queue setup TRB - see section 6.4.1.2.1 */ + /* FIXME better way to translate setup_packet into two u32 fields? */ +@@ -849,7 +849,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, + } + } + +- debug("req->requesttype = %d, req->request = %d, req->value = %d, req->index = %d, req->length = %d\n", ++printf("req->requesttype = %d, req->request = %d, req->value = %d, req->index = %d, req->length = %d\n", + req->requesttype, req->request, le16_to_cpu(req->value), + le16_to_cpu(req->index), le16_to_cpu(req->length)); + +@@ -876,7 +876,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, + usb_maxpacket(udev, pipe), true); + length_field = TRB_LEN(length) | TRB_TD_SIZE(remainder) | + TRB_INTR_TARGET(0); +- debug("length_field = %d, length = %d," ++printf("length_field = %d, length = %d," + "xhci_td_remainder(length) = %d , TRB_INTR_TARGET(0) = %d\n", + length_field, TRB_LEN(length), + TRB_TD_SIZE(remainder), 0); +@@ -947,7 +947,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, + return (udev->status != USB_ST_NOT_PROC) ? 0 : -1; + + abort: +- debug("XHCI control transfer timed out, aborting...\n"); ++printf("XHCI control transfer timed out, aborting...\n"); + abort_td(udev, ep_index); + udev->status = USB_ST_NAK_REC; + udev->act_len = 0; +diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c +index d27ac01c8..0fab3f795 100644 +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -182,7 +182,7 @@ static int xhci_start(struct xhci_hcor *hcor) + */ + ret = handshake(&hcor->or_usbsts, STS_HALT, 0, XHCI_MAX_HALT_USEC); + if (ret) +- debug("Host took too long to start, " ++printf("Host took too long to start, " + "waited %u microseconds.\n", + XHCI_MAX_HALT_USEC); + return ret; +@@ -232,7 +232,7 @@ static int xhci_reset(struct xhci_hcor *hcor) + int ret; + + /* Halting the Host first */ +- debug("// Halt the HC: %p\n", hcor); ++printf("// Halt the HC: %p\n", hcor); + state = xhci_readl(&hcor->or_usbsts) & STS_HALT; + if (!state) { + cmd = xhci_readl(&hcor->or_usbcmd); +@@ -248,7 +248,7 @@ static int xhci_reset(struct xhci_hcor *hcor) + return -EBUSY; + } + +- debug("// Reset the HC\n"); ++printf("// Reset the HC\n"); + cmd = xhci_readl(&hcor->or_usbcmd); + cmd |= CMD_RESET; + xhci_writel(&hcor->or_usbcmd, cmd); +@@ -303,7 +303,7 @@ static unsigned int xhci_microframes_to_exponent(unsigned int desc_interval, + interval = fls(desc_interval) - 1; + interval = clamp_val(interval, min_exponent, max_exponent); + if ((1 << interval) != desc_interval) +- debug("rounding interval to %d microframes, "\ ++printf("rounding interval to %d microframes, "\ + "ep desc says %d microframes\n", + 1 << interval, desc_interval); + +@@ -336,7 +336,7 @@ static unsigned int xhci_parse_exponent_interval(struct usb_device *udev, + + interval = clamp_val(endpt_desc->bInterval, 1, 16) - 1; + if (interval != endpt_desc->bInterval - 1) +- debug("ep %#x - rounding interval to %d %sframes\n", ++printf("ep %#x - rounding interval to %d %sframes\n", + endpt_desc->bEndpointAddress, 1 << interval, + udev->speed == USB_SPEED_FULL ? "" : "micro"); + +@@ -499,7 +499,7 @@ static int xhci_configure_endpoints(struct usb_device *udev, bool ctx_change) + + switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) { + case COMP_SUCCESS: +- debug("Successful %s command\n", ++printf("Successful %s command\n", + ctx_change ? "Evaluate Context" : "Configure Endpoint"); + break; + default: +@@ -679,7 +679,7 @@ static int xhci_address_device(struct usb_device *udev, int root_portnr) + * This is the first Set Address since device plug-in + * so setting up the slot context. + */ +- debug("Setting up addressable devices %p\n", ctrl->dcbaa); ++printf("Setting up addressable devices %p\n", ctrl->dcbaa); + xhci_setup_addressable_virt_dev(ctrl, udev, root_portnr); + + ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); +@@ -707,7 +707,7 @@ static int xhci_address_device(struct usb_device *udev, int root_portnr) + ret = -ENODEV; + break; + case COMP_SUCCESS: +- debug("Successful Address Device command\n"); ++printf("Successful Address Device command\n"); + udev->status = 0; + break; + default: +@@ -730,7 +730,7 @@ static int xhci_address_device(struct usb_device *udev, int root_portnr) + virt_dev->out_ctx->size); + slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->out_ctx); + +- debug("xHC internal address is: %d\n", ++printf("xHC internal address is: %d\n", + le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); + + return 0; +@@ -819,10 +819,10 @@ int xhci_check_maxpacket(struct usb_device *udev) + hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); + max_packet_size = udev->epmaxpacketin[0]; + if (hw_max_packet_size != max_packet_size) { +- debug("Max Packet Size for ep 0 changed.\n"); +- debug("Max packet size in usb_device = %d\n", max_packet_size); +- debug("Max packet size in xHCI HW = %d\n", hw_max_packet_size); +- debug("Issuing evaluate context command.\n"); ++printf("Max Packet Size for ep 0 changed.\n"); ++printf("Max packet size in usb_device = %d\n", max_packet_size); ++printf("Max packet size in xHCI HW = %d\n", hw_max_packet_size); ++printf("Issuing evaluate context command.\n"); + + /* Set up the modified control endpoint 0 */ + xhci_endpoint_copy(ctrl, ctrl->devs[slot_id]->in_ctx, +@@ -891,7 +891,7 @@ static void xhci_clear_port_change_bit(u16 wValue, + xhci_writel(addr, port_status | status); + + port_status = xhci_readl(addr); +- debug("clear port %s change, actual port %d status = 0x%x\n", ++printf("clear port %s change, actual port %d status = 0x%x\n", + port_change_bit, wIndex, port_status); + } + +@@ -950,17 +950,17 @@ static int xhci_submit_root(struct usb_device *udev, unsigned long pipe, + case DeviceRequest | USB_REQ_GET_DESCRIPTOR: + switch (le16_to_cpu(req->value) >> 8) { + case USB_DT_DEVICE: +- debug("USB_DT_DEVICE request\n"); ++printf("USB_DT_DEVICE request\n"); + srcptr = &descriptor.device; + srclen = 0x12; + break; + case USB_DT_CONFIG: +- debug("USB_DT_CONFIG config\n"); ++printf("USB_DT_CONFIG config\n"); + srcptr = &descriptor.config; + srclen = 0x19; + break; + case USB_DT_STRING: +- debug("USB_DT_STRING config\n"); ++printf("USB_DT_STRING config\n"); + switch (le16_to_cpu(req->value) & 0xff) { + case 0: /* Language */ + srcptr = "\4\3\11\4"; +@@ -991,7 +991,7 @@ static int xhci_submit_root(struct usb_device *udev, unsigned long pipe, + switch (le16_to_cpu(req->value) >> 8) { + case USB_DT_HUB: + case USB_DT_SS_HUB: +- debug("USB_DT_HUB config\n"); ++printf("USB_DT_HUB config\n"); + srcptr = &descriptor.hub; + srclen = 0x8; + break; +@@ -1001,7 +1001,7 @@ static int xhci_submit_root(struct usb_device *udev, unsigned long pipe, + } + break; + case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): +- debug("USB_REQ_SET_ADDRESS\n"); ++printf("USB_REQ_SET_ADDRESS\n"); + ctrl->rootdev = le16_to_cpu(req->value); + break; + case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: +@@ -1020,18 +1020,18 @@ static int xhci_submit_root(struct usb_device *udev, unsigned long pipe, + tmpbuf[0] |= USB_PORT_STAT_CONNECTION; + switch (reg & DEV_SPEED_MASK) { + case XDEV_FS: +- debug("SPEED = FULLSPEED\n"); ++printf("SPEED = FULLSPEED\n"); + break; + case XDEV_LS: +- debug("SPEED = LOWSPEED\n"); ++printf("SPEED = LOWSPEED\n"); + tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8; + break; + case XDEV_HS: +- debug("SPEED = HIGHSPEED\n"); ++printf("SPEED = HIGHSPEED\n"); + tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; + break; + case XDEV_SS: +- debug("SPEED = SUPERSPEED\n"); ++printf("SPEED = SUPERSPEED\n"); + tmpbuf[1] |= USB_PORT_STAT_SUPER_SPEED >> 8; + break; + } +@@ -1117,7 +1117,7 @@ static int xhci_submit_root(struct usb_device *udev, unsigned long pipe, + goto unknown; + } + +- debug("scrlen = %d\n req->length = %d\n", ++printf("scrlen = %d\n req->length = %d\n", + srclen, le16_to_cpu(req->length)); + + len = min(srclen, (int)le16_to_cpu(req->length)); +@@ -1125,7 +1125,7 @@ static int xhci_submit_root(struct usb_device *udev, unsigned long pipe, + if (srcptr != NULL && len > 0) + memcpy(buffer, srcptr, len); + else +- debug("Len is 0\n"); ++printf("Len is 0\n"); + + udev->act_len = len; + udev->status = 0; +@@ -1289,7 +1289,7 @@ static int xhci_lowlevel_stop(struct xhci_ctrl *ctrl) + + xhci_reset(ctrl->hcor); + +- debug("// Disabling event ring interrupts\n"); ++printf("// Disabling event ring interrupts\n"); + temp = xhci_readl(&ctrl->hcor->or_usbsts); + xhci_writel(&ctrl->hcor->or_usbsts, temp & ~STS_EINT); + temp = xhci_readl(&ctrl->ir_set->irq_pending); +@@ -1395,7 +1395,7 @@ static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev, + struct udevice *hub; + int root_portnr = 0; + +- debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__, ++printf("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__, + dev->name, udev, udev->dev->name, udev->portnr); + hub = udev->dev; + if (device_get_uclass_id(hub) == UCLASS_USB_HUB) { +@@ -1423,7 +1423,7 @@ static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev, + static int xhci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev, + unsigned long pipe, void *buffer, int length) + { +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + return _xhci_submit_bulk_msg(udev, pipe, buffer, length); + } + +@@ -1431,14 +1431,14 @@ static int xhci_submit_int_msg(struct udevice *dev, struct usb_device *udev, + unsigned long pipe, void *buffer, int length, + int interval, bool nonblock) + { +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + return _xhci_submit_int_msg(udev, pipe, buffer, length, interval, + nonblock); + } + + static int xhci_alloc_device(struct udevice *dev, struct usb_device *udev) + { +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + return _xhci_alloc_device(udev); + } + +@@ -1454,7 +1454,7 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev) + int slot_id = udev->slot_id; + unsigned think_time; + +- debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); ++printf("%s: dev='%s', udev=%p\n", __func__, dev->name, udev); + + /* Ignore root hubs */ + if (usb_hub_is_root_hub(udev->dev)) +@@ -1529,7 +1529,7 @@ int xhci_register(struct udevice *dev, struct xhci_hccr *hccr, + struct usb_bus_priv *priv = dev_get_uclass_priv(dev); + int ret; + +- debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p\n", __func__, dev->name, ++printf("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p\n", __func__, dev->name, + ctrl, hccr, hcor); + + ctrl->dev = dev; +@@ -1559,7 +1559,7 @@ int xhci_register(struct udevice *dev, struct xhci_hccr *hccr, + return 0; + err: + free(ctrl); +- debug("%s: failed, ret=%d\n", __func__, ret); ++printf("%s: failed, ret=%d\n", __func__, ret); + return ret; + } + +diff --git a/drivers/usb/musb-new/da8xx.c b/drivers/usb/musb-new/da8xx.c +index 68fc0c361..a20dac371 100644 +--- a/drivers/usb/musb-new/da8xx.c ++++ b/drivers/usb/musb-new/da8xx.c +@@ -174,7 +174,7 @@ static int da8xx_musb_init(struct musb *musb) + musb->mregs += DA8XX_MENTOR_CORE_OFFSET; + + /* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */ +- debug("DA8xx OTG revision %08x, control %02x\n", revision, ++printf("DA8xx OTG revision %08x, control %02x\n", revision, + musb_readb(reg_base, DA8XX_USB_CTRL_REG)); + + musb->isr = da8xx_musb_interrupt; +diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c +index 91042935b..77a45cbd5 100644 +--- a/drivers/usb/musb-new/ti-musb.c ++++ b/drivers/usb/musb-new/ti-musb.c +@@ -65,7 +65,7 @@ static int ti_musb_get_usb_index(int node) + snprintf(alias, sizeof(alias), "usb%d", i); + alias_path = fdt_get_alias(fdt, alias); + if (alias_path == NULL) { +- debug("USB index not found\n"); ++printf("USB index not found\n"); + return -ENOENT; + } + +diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c +index afbc64888..b7bf368a4 100644 +--- a/drivers/usb/musb/musb_hcd.c ++++ b/drivers/usb/musb/musb_hcd.c +@@ -466,7 +466,7 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + u16 int_usb; + + if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) { +- debug("Root-Hub submit IRQ: NOT implemented\n"); ++printf("Root-Hub submit IRQ: NOT implemented\n"); + return 0; + } + +@@ -475,42 +475,42 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + wIndex = swap_16(cmd->index); + wLength = swap_16(cmd->length); + +- debug("--- HUB ----------------------------------------\n"); +- debug("submit rh urb, req=%x val=%#x index=%#x len=%d\n", ++printf("--- HUB ----------------------------------------\n"); ++printf("submit rh urb, req=%x val=%#x index=%#x len=%d\n", + bmRType_bReq, wValue, wIndex, wLength); +- debug("------------------------------------------------\n"); ++printf("------------------------------------------------\n"); + + switch (bmRType_bReq) { + case RH_GET_STATUS: +- debug("RH_GET_STATUS\n"); ++printf("RH_GET_STATUS\n"); + + *(__u16 *) data_buf = swap_16(1); + len = 2; + break; + + case RH_GET_STATUS | RH_INTERFACE: +- debug("RH_GET_STATUS | RH_INTERFACE\n"); ++printf("RH_GET_STATUS | RH_INTERFACE\n"); + + *(__u16 *) data_buf = swap_16(0); + len = 2; + break; + + case RH_GET_STATUS | RH_ENDPOINT: +- debug("RH_GET_STATUS | RH_ENDPOINT\n"); ++printf("RH_GET_STATUS | RH_ENDPOINT\n"); + + *(__u16 *) data_buf = swap_16(0); + len = 2; + break; + + case RH_GET_STATUS | RH_CLASS: +- debug("RH_GET_STATUS | RH_CLASS\n"); ++printf("RH_GET_STATUS | RH_CLASS\n"); + + *(__u32 *) data_buf = swap_32(0); + len = 4; + break; + + case RH_GET_STATUS | RH_OTHER | RH_CLASS: +- debug("RH_GET_STATUS | RH_OTHER | RH_CLASS\n"); ++printf("RH_GET_STATUS | RH_OTHER | RH_CLASS\n"); + + int_usb = readw(&musbr->intrusb); + if (int_usb & MUSB_INTR_CONNECT) { +@@ -528,11 +528,11 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + break; + + case RH_CLEAR_FEATURE | RH_ENDPOINT: +- debug("RH_CLEAR_FEATURE | RH_ENDPOINT\n"); ++printf("RH_CLEAR_FEATURE | RH_ENDPOINT\n"); + + switch (wValue) { + case RH_ENDPOINT_STALL: +- debug("C_HUB_ENDPOINT_STALL\n"); ++printf("C_HUB_ENDPOINT_STALL\n"); + len = 0; + break; + } +@@ -540,16 +540,16 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + break; + + case RH_CLEAR_FEATURE | RH_CLASS: +- debug("RH_CLEAR_FEATURE | RH_CLASS\n"); ++printf("RH_CLEAR_FEATURE | RH_CLASS\n"); + + switch (wValue) { + case RH_C_HUB_LOCAL_POWER: +- debug("C_HUB_LOCAL_POWER\n"); ++printf("C_HUB_LOCAL_POWER\n"); + len = 0; + break; + + case RH_C_HUB_OVER_CURRENT: +- debug("C_HUB_OVER_CURRENT\n"); ++printf("C_HUB_OVER_CURRENT\n"); + len = 0; + break; + } +@@ -557,7 +557,7 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + break; + + case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS: +- debug("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS\n"); ++printf("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS\n"); + + switch (wValue) { + case RH_PORT_ENABLE: +@@ -593,7 +593,7 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + break; + + default: +- debug("invalid wValue\n"); ++printf("invalid wValue\n"); + stat = USB_ST_STALLED; + } + +@@ -601,7 +601,7 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + break; + + case RH_SET_FEATURE | RH_OTHER | RH_CLASS: +- debug("RH_SET_FEATURE | RH_OTHER | RH_CLASS\n"); ++printf("RH_SET_FEATURE | RH_OTHER | RH_CLASS\n"); + + switch (wValue) { + case RH_PORT_SUSPEND: +@@ -622,7 +622,7 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + break; + + default: +- debug("invalid wValue\n"); ++printf("invalid wValue\n"); + stat = USB_ST_STALLED; + } + +@@ -630,14 +630,14 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + break; + + case RH_SET_ADDRESS: +- debug("RH_SET_ADDRESS\n"); ++printf("RH_SET_ADDRESS\n"); + + rh_devnum = wValue; + len = 0; + break; + + case RH_GET_DESCRIPTOR: +- debug("RH_GET_DESCRIPTOR: %x, %d\n", wValue, wLength); ++printf("RH_GET_DESCRIPTOR: %x, %d\n", wValue, wLength); + + switch (wValue) { + case (USB_DT_DEVICE << 8): /* device descriptor */ +@@ -673,7 +673,7 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + break; + + default: +- debug("invalid wValue\n"); ++printf("invalid wValue\n"); + stat = USB_ST_STALLED; + } + +@@ -681,7 +681,7 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + + case RH_GET_DESCRIPTOR | RH_CLASS: { + u8 *_data_buf = (u8 *) datab; +- debug("RH_GET_DESCRIPTOR | RH_CLASS\n"); ++printf("RH_GET_DESCRIPTOR | RH_CLASS\n"); + + _data_buf[0] = 0x09; /* min length; */ + _data_buf[1] = 0x29; +@@ -702,20 +702,20 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + } + + case RH_GET_CONFIGURATION: +- debug("RH_GET_CONFIGURATION\n"); ++printf("RH_GET_CONFIGURATION\n"); + + *(__u8 *) data_buf = 0x01; + len = 1; + break; + + case RH_SET_CONFIGURATION: +- debug("RH_SET_CONFIGURATION\n"); ++printf("RH_SET_CONFIGURATION\n"); + + len = 0; + break; + + default: +- debug("*** *** *** unsupported root hub command *** *** ***\n"); ++printf("*** *** *** unsupported root hub command *** *** ***\n"); + stat = USB_ST_STALLED; + } + +@@ -725,7 +725,7 @@ static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe, + + dev->act_len = len; + dev->status = stat; +- debug("dev act_len %d, status %lu\n", dev->act_len, dev->status); ++printf("dev act_len %d, status %lu\n", dev->act_len, dev->status); + + return stat; + } +diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c +index 93caa821a..4179146c5 100644 +--- a/drivers/usb/phy/rockchip_usb2_phy.c ++++ b/drivers/usb/phy/rockchip_usb2_phy.c +@@ -82,7 +82,7 @@ void otg_phy_init(struct dwc2_udc *dev) + } + } + if (!phy_cfg) { +- debug("Can't find device platform data\n"); ++printf("Can't find device platform data\n"); + + hang(); + return; +diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c b/drivers/usb/ulpi/omap-ulpi-viewport.c +index 8b930e3fa..98e960b4d 100644 +--- a/drivers/usb/ulpi/omap-ulpi-viewport.c ++++ b/drivers/usb/ulpi/omap-ulpi-viewport.c +@@ -45,7 +45,7 @@ static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32 value) + + err = ulpi_wait(ulpi_vp, OMAP_ULPI_START); + if (err) +- debug("ULPI request timed out\n"); ++printf("ULPI request timed out\n"); + + return err; + } +diff --git a/drivers/usb/ulpi/ulpi.c b/drivers/usb/ulpi/ulpi.c +index dd0da0e84..dc3c83989 100644 +--- a/drivers/usb/ulpi/ulpi.c ++++ b/drivers/usb/ulpi/ulpi.c +@@ -67,7 +67,7 @@ int ulpi_init(struct ulpi_viewport *ulpi_vp) + } + + /* Split ID into vendor and product ID. */ +- debug("ULPI transceiver ID 0x%04x:0x%04x\n", id >> 16, id & 0xffff); ++printf("ULPI transceiver ID 0x%04x:0x%04x\n", id >> 16, id & 0xffff); + + return ulpi_integrity_check(ulpi_vp); + } +diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c +index c7b59b71e..47b2f356a 100644 +--- a/drivers/video/atmel_hlcdfb.c ++++ b/drivers/video/atmel_hlcdfb.c +@@ -510,13 +510,13 @@ static int atmel_hlcdc_of_to_plat(struct udevice *dev) + + priv->regs = dev_read_addr_ptr(dev); + if (!priv->regs) { +- debug("%s: No display controller address\n", __func__); ++printf("%s: No display controller address\n", __func__); + return -EINVAL; + } + + if (fdtdec_decode_display_timing(blob, dev_of_offset(dev), + 0, &priv->timing)) { +- debug("%s: Failed to decode display timing\n", __func__); ++printf("%s: Failed to decode display timing\n", __func__); + return -EINVAL; + } + +@@ -528,7 +528,7 @@ static int atmel_hlcdc_of_to_plat(struct udevice *dev) + + priv->vl_bpix = fdtdec_get_int(blob, node, "atmel,vl-bpix", 0); + if (!priv->vl_bpix) { +- debug("%s: Failed to get bits per pixel\n", __func__); ++printf("%s: Failed to get bits per pixel\n", __func__); + return -EINVAL; + } + +@@ -545,7 +545,7 @@ static int atmel_hlcdc_bind(struct udevice *dev) + uc_plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT * + (1 << LCD_MAX_LOG2_BPP) / 8; + +- debug("%s: Frame buffer size %x\n", __func__, uc_plat->size); ++printf("%s: Frame buffer size %x\n", __func__, uc_plat->size); + + return 0; + } +diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c +index c38cac174..d95e5b9f3 100644 +--- a/drivers/video/atmel_lcdfb.c ++++ b/drivers/video/atmel_lcdfb.c +@@ -262,7 +262,7 @@ static int atmel_fb_lcd_probe(struct udevice *dev) + uc_priv->ysize = timing->vactive.typ; + uc_priv->bpix = VIDEO_BPP16; + video_set_flush_dcache(dev, true); +- debug("LCD frame buffer at %lx, size %x, %dx%d pixels\n", uc_plat->base, ++printf("LCD frame buffer at %lx, size %x, %dx%d pixels\n", uc_plat->base, + uc_plat->size, uc_priv->xsize, uc_priv->ysize); + + return 0; +@@ -277,7 +277,7 @@ static int atmel_fb_of_to_plat(struct udevice *dev) + + if (fdtdec_decode_display_timing(blob, dev_of_offset(dev), + plat->timing_index, timing)) { +- debug("%s: Failed to decode display timing\n", __func__); ++printf("%s: Failed to decode display timing\n", __func__); + return -EINVAL; + } + +@@ -290,7 +290,7 @@ static int atmel_fb_lcd_bind(struct udevice *dev) + + uc_plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT * + (1 << VIDEO_BPP16) / 8; +- debug("%s: Frame buffer size %x\n", __func__, uc_plat->size); ++printf("%s: Frame buffer size %x\n", __func__, uc_plat->size); + + return 0; + } +diff --git a/drivers/video/backlight_gpio.c b/drivers/video/backlight_gpio.c +index eea824ab5..0d6d222e7 100644 +--- a/drivers/video/backlight_gpio.c ++++ b/drivers/video/backlight_gpio.c +@@ -32,7 +32,7 @@ static int gpio_backlight_of_to_plat(struct udevice *dev) + ret = gpio_request_by_name(dev, "gpios", 0, &priv->gpio, + GPIOD_IS_OUT); + if (ret) { +- debug("%s: Warning: cannot get GPIO: ret=%d\n", ++printf("%s: Warning: cannot get GPIO: ret=%d\n", + __func__, ret); + return ret; + } +diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c +index c2962932c..67cd2abcf 100644 +--- a/drivers/video/bcm2835.c ++++ b/drivers/video/bcm2835.c +@@ -19,19 +19,19 @@ static int bcm2835_video_probe(struct udevice *dev) + int w, h, pitch; + ulong fb_base, fb_size, fb_start, fb_end; + +- debug("bcm2835: Query resolution...\n"); ++printf("bcm2835: Query resolution...\n"); + ret = bcm2835_get_video_size(&w, &h); + if (ret || w == 0 || h == 0) + return -EIO; + +- debug("bcm2835: Setting up display for %d x %d\n", w, h); ++printf("bcm2835: Setting up display for %d x %d\n", w, h); + ret = bcm2835_set_video_params(&w, &h, 32, BCM2835_MBOX_PIXEL_ORDER_RGB, + BCM2835_MBOX_ALPHA_MODE_IGNORED, + &fb_base, &fb_size, &pitch); + if (ret) + return -EIO; + +- debug("bcm2835: Final resolution is %d x %d\n", w, h); ++printf("bcm2835: Final resolution is %d x %d\n", w, h); + + /* Enable dcache for the frame buffer */ + fb_start = fb_base & ~(MMU_SECTION_SIZE - 1); +diff --git a/drivers/video/bridge/anx6345.c b/drivers/video/bridge/anx6345.c +index 0fa56c75a..310e7fd4d 100644 +--- a/drivers/video/bridge/anx6345.c ++++ b/drivers/video/bridge/anx6345.c +@@ -38,7 +38,7 @@ static int anx6345_write(struct udevice *dev, unsigned int addr_off, + msg.len = 2; + ret = dm_i2c_xfer(dev, &msg, 1); + if (ret) { +- debug("%s: write failed, reg=%#x, value=%#x, ret=%d\n", ++printf("%s: write failed, reg=%#x, value=%#x, ret=%d\n", + __func__, reg_addr, value, ret); + return ret; + } +@@ -64,7 +64,7 @@ static int anx6345_read(struct udevice *dev, unsigned int addr_off, + msg[1].len = 1; + ret = dm_i2c_xfer(dev, msg, 2); + if (ret) { +- debug("%s: read failed, reg=%.2x, value=%p, ret=%d\n", ++printf("%s: read failed, reg=%.2x, value=%p, ret=%d\n", + __func__, (int)reg_addr, value, ret); + return ret; + } +@@ -126,7 +126,7 @@ static int anx6345_aux_wait(struct udevice *dev) + } while (retries--); + + if (ret) { +- debug("%s: timed out waiting for AUX_EN to clear\n", __func__); ++printf("%s: timed out waiting for AUX_EN to clear\n", __func__); + return ret; + } + +@@ -142,7 +142,7 @@ static int anx6345_aux_wait(struct udevice *dev) + } while (retries--); + + if (ret) { +- debug("%s: timed out waiting to receive reply\n", __func__); ++printf("%s: timed out waiting to receive reply\n", __func__); + return ret; + } + +@@ -151,7 +151,7 @@ static int anx6345_aux_wait(struct udevice *dev) + + anx6345_read_r0(dev, ANX9804_AUX_CH_STA, &v); + if ((v & ANX9804_AUX_STATUS_MASK) != 0) { +- debug("AUX status: %d\n", v & ANX9804_AUX_STATUS_MASK); ++printf("AUX status: %d\n", v & ANX9804_AUX_STATUS_MASK); + ret = -EIO; + } + +@@ -195,7 +195,7 @@ static int anx6345_aux_transfer(struct udevice *dev, u8 req, + anx6345_write_r0(dev, ANX9804_DP_AUX_CH_CTL_2, ctrl2); + ret = anx6345_aux_wait(dev); + if (ret) { +- debug("AUX transaction timed out\n"); ++printf("AUX transaction timed out\n"); + return ret; + } + +@@ -220,14 +220,14 @@ static int anx6345_read_aux_i2c(struct udevice *dev, u8 chip_addr, + ret = anx6345_aux_transfer(dev, ANX9804_AUX_TX_COMM_MOT, + chip_addr, &cur_offset, 1); + if (ret) { +- debug("%s: failed to set i2c offset: %d\n", ++printf("%s: failed to set i2c offset: %d\n", + __func__, ret); + return ret; + } + ret = anx6345_aux_transfer(dev, ANX9804_AUX_TX_COMM_READ, + chip_addr, buf + i, cur_cnt); + if (ret) { +- debug("%s: failed to read from i2c device: %d\n", ++printf("%s: failed to read from i2c device: %d\n", + __func__, ret); + return ret; + } +@@ -245,7 +245,7 @@ static int anx6345_read_dpcd(struct udevice *dev, u32 reg, u8 *val) + ANX9804_AUX_TX_COMM_DP_TRANSACTION, + reg, val, 1); + if (ret) { +- debug("Failed to read DPCD\n"); ++printf("Failed to read DPCD\n"); + return ret; + } + +@@ -320,7 +320,7 @@ static int anx6345_read_edid(struct udevice *dev, u8 *buf, int size) + size = EDID_SIZE; + + if (anx6345_read_aux_i2c(dev, 0x50, 0x0, size, buf) != 0) { +- debug("%s: EDID read failed, using static EDID\n", __func__); ++printf("%s: EDID read failed, using static EDID\n", __func__); + memcpy(buf, pinebook14_edid, size); + } + +@@ -355,14 +355,14 @@ static int anx6345_enable(struct udevice *dev) + + ret = anx6345_read_r1(dev, ANX9804_DEV_IDH_REG, &chipid); + if (ret) +- debug("%s: read id failed: %d\n", __func__, ret); ++printf("%s: read id failed: %d\n", __func__, ret); + + switch (chipid) { + case 0x63: +- debug("ANX63xx detected.\n"); ++printf("ANX63xx detected.\n"); + break; + default: +- debug("Error anx6345 chipid mismatch: %.2x\n", (int)chipid); ++printf("Error anx6345 chipid mismatch: %.2x\n", (int)chipid); + return -ENODEV; + } + +@@ -376,7 +376,7 @@ static int anx6345_enable(struct udevice *dev) + mdelay(5); + } + if (i == 100) +- debug("Error anx6345 clock is not stable\n"); ++printf("Error anx6345 clock is not stable\n"); + + /* Set a bunch of analog related register values */ + anx6345_write_r0(dev, ANX9804_PLL_CTRL_REG, 0x00); +@@ -410,16 +410,16 @@ static int anx6345_enable(struct udevice *dev) + anx6345_write_r1(dev, ANX9804_VID_CTRL2_REG, colordepth); + + if (anx6345_read_dpcd(dev, DP_MAX_LINK_RATE, &data_rate)) { +- debug("%s: Failed to DP_MAX_LINK_RATE\n", __func__); ++printf("%s: Failed to DP_MAX_LINK_RATE\n", __func__); + data_rate = 10; + } +- debug("%s: data_rate: %d\n", __func__, (int)data_rate); ++printf("%s: data_rate: %d\n", __func__, (int)data_rate); + if (anx6345_read_dpcd(dev, DP_MAX_LANE_COUNT, &lanes)) { +- debug("%s: Failed to read DP_MAX_LANE_COUNT\n", __func__); ++printf("%s: Failed to read DP_MAX_LANE_COUNT\n", __func__); + lanes = 1; + } + lanes &= DP_MAX_LANE_COUNT_MASK; +- debug("%s: lanes: %d\n", __func__, (int)lanes); ++printf("%s: lanes: %d\n", __func__, (int)lanes); + + /* Set data-rate / lanes */ + anx6345_write_r0(dev, ANX9804_LINK_BW_SET_REG, data_rate); +@@ -437,7 +437,7 @@ static int anx6345_enable(struct udevice *dev) + mdelay(5); + } + if (i == 100) { +- debug("Error anx6345 link training timeout\n"); ++printf("Error anx6345 link training timeout\n"); + return -ENODEV; + } + +diff --git a/drivers/video/bridge/ps862x.c b/drivers/video/bridge/ps862x.c +index c8e105857..0da85b492 100644 +--- a/drivers/video/bridge/ps862x.c ++++ b/drivers/video/bridge/ps862x.c +@@ -51,7 +51,7 @@ static int ps8622_write(struct udevice *dev, unsigned addr_off, + msg.len = 2; + ret = dm_i2c_xfer(dev, &msg, 1); + if (ret) { +- debug("%s: write failed, reg=%#x, value=%#x, ret=%d\n", ++printf("%s: write failed, reg=%#x, value=%#x, ret=%d\n", + __func__, reg_addr, value, ret); + return ret; + } +@@ -63,7 +63,7 @@ static int ps8622_set_backlight(struct udevice *dev, int percent) + { + int level = percent * 255 / 100; + +- debug("%s: level=%d\n", __func__, level); ++printf("%s: level=%d\n", __func__, level); + return ps8622_write(dev, 0x01, 0xa7, level); + } + +@@ -73,14 +73,14 @@ static int ps8622_attach(struct udevice *dev) + struct udevice *reg; + int ret, i, len; + +- debug("%s: %s\n", __func__, dev->name); ++printf("%s: %s\n", __func__, dev->name); + /* set the LDO providing the 1.2V rail to the Parade bridge */ + ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, + "power-supply", ®); + if (!ret) { + ret = regulator_autoset(reg); + } else if (ret != -ENOENT) { +- debug("%s: Failed to enable power: ret=%d\n", __func__, ret); ++printf("%s: Failed to enable power: ret=%d\n", __func__, ret); + return ret; + } + +@@ -91,7 +91,7 @@ static int ps8622_attach(struct udevice *dev) + params = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "parade,regs", + &len); + if (!params || len % 3) { +- debug("%s: missing/invalid params=%p, len=%x\n", __func__, ++printf("%s: missing/invalid params=%p, len=%x\n", __func__, + params, len); + return -EINVAL; + } +@@ -110,7 +110,7 @@ static int ps8622_attach(struct udevice *dev) + + static int ps8622_probe(struct udevice *dev) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + if (device_get_uclass_id(dev->parent) != UCLASS_I2C) + return -EPROTONOSUPPORT; + +diff --git a/drivers/video/bridge/ptn3460.c b/drivers/video/bridge/ptn3460.c +index 4760f0410..d2e8a1980 100644 +--- a/drivers/video/bridge/ptn3460.c ++++ b/drivers/video/bridge/ptn3460.c +@@ -11,7 +11,7 @@ + + static int ptn3460_attach(struct udevice *dev) + { +- debug("%s: %s\n", __func__, dev->name); ++printf("%s: %s\n", __func__, dev->name); + + return video_bridge_set_active(dev, true); + } +diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c +index 08d38b244..e2043799c 100644 +--- a/drivers/video/bridge/video-bridge-uclass.c ++++ b/drivers/video/bridge/video-bridge-uclass.c +@@ -61,11 +61,11 @@ static int video_bridge_pre_probe(struct udevice *dev) + struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev); + int ret; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + ret = gpio_request_by_name(dev, "sleep-gpios", 0, + &uc_priv->sleep, GPIOD_IS_OUT); + if (ret) { +- debug("%s: Could not decode sleep-gpios (%d)\n", __func__, ret); ++printf("%s: Could not decode sleep-gpios (%d)\n", __func__, ret); + if (ret != -ENOENT) + return ret; + } +@@ -81,7 +81,7 @@ static int video_bridge_pre_probe(struct udevice *dev) + ret = gpio_request_by_name(dev, "reset-gpios", 0, &uc_priv->reset, + GPIOD_IS_OUT); + if (ret) { +- debug("%s: Could not decode reset-gpios (%d)\n", __func__, ret); ++printf("%s: Could not decode reset-gpios (%d)\n", __func__, ret); + if (ret != -ENOENT) + return ret; + } +@@ -97,7 +97,7 @@ static int video_bridge_pre_probe(struct udevice *dev) + ret = gpio_request_by_name(dev, "hotplug-gpios", 0, &uc_priv->hotplug, + GPIOD_IS_IN); + if (ret) { +- debug("%s: Could not decode hotplug (%d)\n", __func__, ret); ++printf("%s: Could not decode hotplug (%d)\n", __func__, ret); + if (ret != -ENOENT) + return ret; + } +@@ -110,7 +110,7 @@ int video_bridge_set_active(struct udevice *dev, bool active) + struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev); + int ret = 0; + +- debug("%s: %d\n", __func__, active); ++printf("%s: %d\n", __func__, active); + if (uc_priv->sleep.dev) { + ret = dm_gpio_set_value(&uc_priv->sleep, !active); + if (ret) +diff --git a/drivers/video/broadwell_igd.c b/drivers/video/broadwell_igd.c +index 2551f162e..339aa0478 100644 +--- a/drivers/video/broadwell_igd.c ++++ b/drivers/video/broadwell_igd.c +@@ -59,10 +59,10 @@ static int poll32(u8 *addr, uint mask, uint value) + ulong start; + + start = get_timer(0); +- debug("%s: addr %p = %x\n", __func__, addr, readl(addr)); ++printf("%s: addr %p = %x\n", __func__, addr, readl(addr)); + while ((readl(addr) & mask) != value) { + if (get_timer(start) > GT_RETRY) { +- debug("poll32: timeout: %x\n", readl(addr)); ++printf("poll32: timeout: %x\n", readl(addr)); + return -ETIMEDOUT; + } + } +@@ -159,7 +159,7 @@ static int haswell_early_init(struct udevice *dev) + + return 0; + err: +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + return ret; + }; + +@@ -190,7 +190,7 @@ static int haswell_late_init(struct udevice *dev) + + return 0; + err: +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + return ret; + }; + +@@ -286,7 +286,7 @@ static int broadwell_early_init(struct udevice *dev) + + return 0; + err: +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + return ret; + } + +@@ -315,7 +315,7 @@ static int broadwell_late_init(struct udevice *dev) + + return 0; + err: +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + return ret; + }; + +@@ -351,7 +351,7 @@ static int gtt_poll(struct broadwell_igd_priv *priv, u32 reg, u32 mask, + udelay(10); + } + +- debug("GT init timeout\n"); ++printf("GT init timeout\n"); + return -ETIMEDOUT; + } + +@@ -467,7 +467,7 @@ static int igd_cdclk_init_haswell(struct udevice *dev) + + return 0; + err: +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + return ret; + } + +@@ -533,7 +533,7 @@ static int igd_cdclk_init_broadwell(struct udevice *dev) + ret = -EDOM; + goto err; + } +- debug("%s: frequency = %d\n", __func__, cdclk); ++printf("%s: frequency = %d\n", __func__, cdclk); + + /* Set LPCLL_CTL CD Clock Frequency Select */ + gtt_clrsetbits(priv, 0x130040, ~0xf3ffffff, lpcll); +@@ -552,7 +552,7 @@ static int igd_cdclk_init_broadwell(struct udevice *dev) + + return 0; + err: +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + return ret; + } + +@@ -603,7 +603,7 @@ static int igd_pre_init(struct udevice *dev, bool is_broadwell) + + return 0; + err: +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + return ret; + } + +@@ -633,7 +633,7 @@ static int broadwell_igd_int15_handler(void) + { + int res = 0; + +- debug("%s: INT15 function %04x!\n", __func__, M.x86.R_AX); ++printf("%s: INT15 function %04x!\n", __func__, M.x86.R_AX); + + switch (M.x86.R_AX) { + case 0x5f35: +@@ -653,7 +653,7 @@ static int broadwell_igd_int15_handler(void) + res = 1; + break; + default: +- debug("Unknown INT15 function %04x!\n", M.x86.R_AX); ++printf("Unknown INT15 function %04x!\n", M.x86.R_AX); + break; + } + +@@ -678,12 +678,12 @@ static int broadwell_igd_probe(struct udevice *dev) + } + is_broadwell = cpu_get_family_model() == BROADWELL_FAMILY_ULT; + bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display"); +- debug("%s: is_broadwell=%d\n", __func__, is_broadwell); ++printf("%s: is_broadwell=%d\n", __func__, is_broadwell); + ret = igd_pre_init(dev, is_broadwell); + if (!ret) { + ret = vbe_setup_video(dev, broadwell_igd_int15_handler); + if (ret) +- debug("failed to run video BIOS: %d\n", ret); ++printf("failed to run video BIOS: %d\n", ret); + } + if (!ret) + ret = igd_post_init(dev, is_broadwell); +@@ -701,7 +701,7 @@ static int broadwell_igd_probe(struct udevice *dev) + ret); + } + +- debug("fb=%lx, size %x, display size=%d %d %d\n", plat->base, ++printf("fb=%lx, size %x, display size=%d %d %d\n", plat->base, + plat->size, uc_priv->xsize, uc_priv->ysize, uc_priv->bpix); + + return 0; +@@ -736,21 +736,21 @@ static int broadwell_igd_of_to_plat(struct udevice *dev) + plat->pre_graphics_delay = fdtdec_get_int(blob, node, + "intel,pre-graphics-delay", 0); + priv->regs = (u8 *)dm_pci_read_bar32(dev, 0); +- debug("%s: regs at %p\n", __func__, priv->regs); +- debug("dp_hotplug %d %d %d\n", plat->dp_hotplug[0], plat->dp_hotplug[1], ++printf("%s: regs at %p\n", __func__, priv->regs); ++printf("dp_hotplug %d %d %d\n", plat->dp_hotplug[0], plat->dp_hotplug[1], + plat->dp_hotplug[2]); +- debug("port_select = %d\n", plat->port_select); +- debug("power_up_delay = %d\n", plat->power_up_delay); +- debug("power_backlight_on_delay = %d\n", ++printf("port_select = %d\n", plat->port_select); ++printf("power_up_delay = %d\n", plat->power_up_delay); ++printf("power_backlight_on_delay = %d\n", + plat->power_backlight_on_delay); +- debug("power_down_delay = %d\n", plat->power_down_delay); +- debug("power_backlight_off_delay = %d\n", ++printf("power_down_delay = %d\n", plat->power_down_delay); ++printf("power_backlight_off_delay = %d\n", + plat->power_backlight_off_delay); +- debug("power_cycle_delay = %d\n", plat->power_cycle_delay); +- debug("cpu_backlight = %x\n", plat->cpu_backlight); +- debug("pch_backlight = %x\n", plat->pch_backlight); +- debug("cdclk = %d\n", plat->cdclk); +- debug("pre_graphics_delay = %d\n", plat->pre_graphics_delay); ++printf("power_cycle_delay = %d\n", plat->power_cycle_delay); ++printf("cpu_backlight = %x\n", plat->cpu_backlight); ++printf("pch_backlight = %x\n", plat->pch_backlight); ++printf("cdclk = %d\n", plat->cdclk); ++printf("pre_graphics_delay = %d\n", plat->pre_graphics_delay); + + return 0; + } +diff --git a/drivers/video/bus_vcxk.c b/drivers/video/bus_vcxk.c +index 2a72d23eb..a3b544cc0 100644 +--- a/drivers/video/bus_vcxk.c ++++ b/drivers/video/bus_vcxk.c +@@ -122,7 +122,7 @@ int vcxk_init(unsigned long width, unsigned long height) + #ifdef CONFIG_SYS_VCXK_DOUBLEBUFFERED + double_bws_word = (u_short *)double_bws; + double_bws_long = (u_long *)double_bws; +- debug("%px %px %px\n", double_bws, double_bws_word, double_bws_long); ++printf("%px %px %px\n", double_bws, double_bws_word, double_bws_long); + #endif + display_width = width; + display_height = height; +@@ -133,7 +133,7 @@ int vcxk_init(unsigned long width, unsigned long height) + #else + #error CONFIG_SYS_VCXK_DEFAULT_LINEALIGN is invalid + #endif +- debug("linesize ((%ld + 15) / 8 & ~0x1) = %ld\n", ++printf("linesize ((%ld + 15) / 8 & ~0x1) = %ld\n", + display_width, display_bwidth); + + #ifdef CONFIG_SYS_VCXK_AUTODETECT +@@ -145,7 +145,7 @@ int vcxk_init(unsigned long width, unsigned long height) + VC4K16 = 1; + #else + VC4K16 = 1; +- debug("No autodetect: use vc4k\n"); ++printf("No autodetect: use vc4k\n"); + #endif + + VCXK_INIT_PIN(CONFIG_SYS_VCXK_INVERT_PORT, +diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c +index 1f491a48d..7461a8cd9 100644 +--- a/drivers/video/cfb_console.c ++++ b/drivers/video/cfb_console.c +@@ -1376,7 +1376,7 @@ int video_display_bitmap(ulong bmp_image, int x, int y) + colors = le32_to_cpu(bmp->header.colors_used); + compression = le32_to_cpu(bmp->header.compression); + +- debug("Display-bmp: %ld x %ld with %d colors\n", ++printf("Display-bmp: %ld x %ld with %d colors\n", + width, height, colors); + + if (compression != BMP_BI_RGB +@@ -2092,7 +2092,7 @@ static int cfg_video_init(void) + + #ifdef CONFIG_VIDEO_LOGO + /* Plot the logo and get start point of console */ +- debug("Video: Drawing the logo ...\n"); ++printf("Video: Drawing the logo ...\n"); + video_console_address = video_logo(); + #else + video_console_address = video_fb_address; +@@ -2144,7 +2144,7 @@ int drv_video_init(void) + have_keyboard = true; + #endif + if (have_keyboard) { +- debug("KBD: Keyboard init ...\n"); ++printf("KBD: Keyboard init ...\n"); + #if !defined(CONFIG_VGA_AS_SINGLE_DEVICE) + keyboard_ok = !(VIDEO_KBD_INIT_FCT == -1); + #endif +diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c +index fa11b3bbe..4948b7e66 100644 +--- a/drivers/video/console_truetype.c ++++ b/drivers/video/console_truetype.c +@@ -524,7 +524,7 @@ static u8 *console_truetype_find_font(void) + + for (tab = font_table; tab->begin; tab++) { + if (abs(tab->begin - tab->end) > 4) { +- debug("%s: Font '%s', at %p, size %lx\n", __func__, ++printf("%s: Font '%s', at %p, size %lx\n", __func__, + tab->name, tab->begin, + (ulong)(tab->end - tab->begin)); + return tab->begin; +@@ -543,14 +543,14 @@ static int console_truetype_probe(struct udevice *dev) + stbtt_fontinfo *font = &priv->font; + int ascent; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + if (vid_priv->font_size) + priv->font_size = vid_priv->font_size; + else + priv->font_size = CONFIG_CONSOLE_TRUETYPE_SIZE; + priv->font_data = console_truetype_find_font(); + if (!priv->font_data) { +- debug("%s: Could not find any fonts\n", __func__); ++printf("%s: Could not find any fonts\n", __func__); + return -EBFONT; + } + +@@ -562,7 +562,7 @@ static int console_truetype_probe(struct udevice *dev) + vc_priv->tab_width_frac = VID_TO_POS(priv->font_size) * 8 / 2; + + if (!stbtt_InitFont(font, priv->font_data, 0)) { +- debug("%s: Font init failed\n", __func__); ++printf("%s: Font init failed\n", __func__); + return -EPERM; + } + +@@ -570,7 +570,7 @@ static int console_truetype_probe(struct udevice *dev) + priv->scale = stbtt_ScaleForPixelHeight(font, priv->font_size); + stbtt_GetFontVMetrics(font, &ascent, 0, 0); + priv->baseline = (int)(ascent * priv->scale); +- debug("%s: ready\n", __func__); ++printf("%s: ready\n", __func__); + + return 0; + } +diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c +index 462c31812..b3db5c132 100644 +--- a/drivers/video/da8xx-fb.c ++++ b/drivers/video/da8xx-fb.c +@@ -653,7 +653,7 @@ static void lcd_calc_clk_divider(struct da8xx_fb_par *par) + lcd_clk = clk_get(2); + + div = lcd_clk / par->pxl_clk; +- debug("LCD Clock: %d Divider: %d PixClk: %d\n", ++printf("LCD Clock: %d Divider: %d PixClk: %d\n", + lcd_clk, div, par->pxl_clk); + + /* Configure the LCD clock divisor. */ +@@ -747,13 +747,13 @@ static u32 lcdc_irq_handler_rev01(void) + u32 reg_ras; + + if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) { +- debug("LCD_SYNC_LOST\n"); ++printf("LCD_SYNC_LOST\n"); + lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE); + lcdc_write(stat, &da8xx_fb_reg_base->stat); + lcd_enable_raster(); + return LCD_SYNC_LOST; + } else if (stat & LCD_PL_LOAD_DONE) { +- debug("LCD_PL_LOAD_DONE\n"); ++printf("LCD_PL_LOAD_DONE\n"); + /* + * Must disable raster before changing state of any control bit. + * And also must be disabled before clearing the PL loading +@@ -776,7 +776,7 @@ static u32 lcdc_irq_handler_rev01(void) + lcdc_write(stat, &da8xx_fb_reg_base->stat); + + if (stat & LCD_END_OF_FRAME0) +- debug("LCD_END_OF_FRAME0\n"); ++printf("LCD_END_OF_FRAME0\n"); + + lcdc_write(par->dma_start, + &da8xx_fb_reg_base->dma_frm_buf_base_addr_0); +@@ -795,14 +795,14 @@ static u32 lcdc_irq_handler_rev02(void) + u32 reg_int; + + if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) { +- debug("LCD_SYNC_LOST\n"); ++printf("LCD_SYNC_LOST\n"); + lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE); + lcdc_write(stat, &da8xx_fb_reg_base->masked_stat); + lcd_enable_raster(); + lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind); + return LCD_SYNC_LOST; + } else if (stat & LCD_PL_LOAD_DONE) { +- debug("LCD_PL_LOAD_DONE\n"); ++printf("LCD_PL_LOAD_DONE\n"); + /* + * Must disable raster before changing state of any control bit. + * And also must be disabled before clearing the PL loading +@@ -826,7 +826,7 @@ static u32 lcdc_irq_handler_rev02(void) + lcdc_write(stat, &da8xx_fb_reg_base->masked_stat); + + if (stat & LCD_END_OF_FRAME0) +- debug("LCD_END_OF_FRAME0\n"); ++printf("LCD_END_OF_FRAME0\n"); + + lcdc_write(par->dma_start, + &da8xx_fb_reg_base->dma_frm_buf_base_addr_0); +@@ -922,14 +922,14 @@ void *video_hw_init(void) + break; + } + +- debug("rev: 0x%x Resolution: %dx%d %d\n", rev, ++printf("rev: 0x%x Resolution: %dx%d %d\n", rev, + gpanel.winSizeX, + gpanel.winSizeY, + da8xx_lcd_cfg->bpp); + + size = sizeof(struct fb_info) + sizeof(struct da8xx_fb_par); + da8xx_fb_info = malloc_cache_aligned(size); +- debug("da8xx_fb_info at %x\n", (unsigned int)da8xx_fb_info); ++printf("da8xx_fb_info at %x\n", (unsigned int)da8xx_fb_info); + + if (!da8xx_fb_info) { + printf("Memory allocation failed for fb_info\n"); +@@ -938,7 +938,7 @@ void *video_hw_init(void) + memset(da8xx_fb_info, 0, size); + p = (char *)da8xx_fb_info; + da8xx_fb_info->par = p + sizeof(struct fb_info); +- debug("da8xx_par at %x\n", (unsigned int)da8xx_fb_info->par); ++printf("da8xx_par at %x\n", (unsigned int)da8xx_fb_info->par); + + par = da8xx_fb_info->par; + par->pxl_clk = lcd_panel->pxl_clk; +@@ -956,7 +956,7 @@ void *video_hw_init(void) + par->vram_virt = malloc_cache_aligned(par->vram_size); + + par->vram_phys = (dma_addr_t) par->vram_virt; +- debug("Requesting 0x%x bytes for framebuffer at 0x%x\n", ++printf("Requesting 0x%x bytes for framebuffer at 0x%x\n", + (unsigned int)par->vram_size, + (unsigned int)par->vram_virt); + if (!par->vram_virt) { +@@ -1015,7 +1015,7 @@ void *video_hw_init(void) + lcdc_write(0xFFFF, &da8xx_fb_reg_base->stat); + else + lcdc_write(0xFFFF, &da8xx_fb_reg_base->masked_stat); +- debug("Palette at 0x%x size %d\n", par->p_palette_base, ++printf("Palette at 0x%x size %d\n", par->p_palette_base, + par->palette_sz); + lcdc_dma_start(); + +diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c +index c4fbb1829..0c32172ec 100644 +--- a/drivers/video/dw_hdmi.c ++++ b/drivers/video/dw_hdmi.c +@@ -84,7 +84,7 @@ static void dw_hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset) + writel(val, hdmi->ioaddr + (offset << 2)); + break; + default: +- debug("reg_io_width has unsupported width!\n"); ++printf("reg_io_width has unsupported width!\n"); + break; + } + } +@@ -97,7 +97,7 @@ static u8 dw_hdmi_read(struct dw_hdmi *hdmi, int offset) + case 4: + return readl(hdmi->ioaddr + (offset << 2)); + default: +- debug("reg_io_width has unsupported width!\n"); ++printf("reg_io_width has unsupported width!\n"); + break; + } + +@@ -166,7 +166,7 @@ static void hdmi_audio_set_samplerate(struct dw_hdmi *hdmi, u32 pixel_clk) + + index = hdmi_lookup_n_cts(pixel_clk); + if (index == -1) { +- debug("audio not supported for pixel clk %d\n", pixel_clk); ++printf("audio not supported for pixel clk %d\n", pixel_clk); + return; + } + +@@ -914,7 +914,7 @@ int dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint mpixelclock) + + ret = hdmi_phy_configure(hdmi, mpixelclock); + if (ret) { +- debug("hdmi phy config failure %d\n", ret); ++printf("hdmi phy config failure %d\n", ret); + return ret; + } + } +@@ -965,7 +965,7 @@ int dw_hdmi_read_edid(struct dw_hdmi *hdmi, u8 *buf, int buf_size) + } else { + ret = hdmi_read_edid(hdmi, 0, buf); + if (ret) { +- debug("failed to read edid.\n"); ++printf("failed to read edid.\n"); + return -1; + } + +@@ -982,7 +982,7 @@ int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid) + { + int ret; + +- debug("%s, mode info : clock %d hdis %d vdis %d\n", ++printf("%s, mode info : clock %d hdis %d vdis %d\n", + edid->hdmi_monitor ? "hdmi" : "dvi", + edid->pixelclock.typ, edid->hactive.typ, edid->vactive.typ); + +diff --git a/drivers/video/efi.c b/drivers/video/efi.c +index c248bd352..4884ddffb 100644 +--- a/drivers/video/efi.c ++++ b/drivers/video/efi.c +@@ -59,7 +59,7 @@ static int save_vesa_mode(struct vesa_mode_info *vesa) + + ret = efi_info_get(EFIET_GOP_MODE, (void **)&mode, &size); + if (ret == -ENOENT) { +- debug("efi graphics output protocol mode not found\n"); ++printf("efi graphics output protocol mode not found\n"); + return -ENXIO; + } + +@@ -100,7 +100,7 @@ static int save_vesa_mode(struct vesa_mode_info *vesa) + vesa->bytes_per_scanline = (mode->info->pixels_per_scanline * + vesa->bits_per_pixel) / 8; + } else { +- debug("efi set unknown framebuffer format: %d\n", ++printf("efi set unknown framebuffer format: %d\n", + mode->info->pixel_format); + return -EINVAL; + } +diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c +index a532d5ae1..b46d63c9c 100644 +--- a/drivers/video/exynos/exynos_dp.c ++++ b/drivers/video/exynos/exynos_dp.c +@@ -132,7 +132,7 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *regs) + DPCD_TEST_EDID_CHECKSUM_WRITE); + } + } else { +- debug("DP EDID data does not include any extensions.\n"); ++printf("DP EDID data does not include any extensions.\n"); + + /* Read EDID data */ + retval = exynos_dp_read_bytes_from_i2c(regs, +@@ -162,7 +162,7 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *regs) + } + } + +- debug("DP EDID Read success!\n"); ++printf("DP EDID Read success!\n"); + + return 0; + } +@@ -262,7 +262,7 @@ static unsigned int exynos_dp_link_start(struct exynos_dp *regs, + unsigned char buf[5]; + unsigned int ret = 0; + +- debug("DP: %s was called\n", __func__); ++printf("DP: %s was called\n", __func__); + + priv->lt_info.lt_status = DP_LT_CR; + priv->lt_info.ep_loop = 0; +@@ -494,7 +494,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *regs, + unsigned char adj_req_em; + unsigned char buf[5]; + +- debug("DP: %s was called\n", __func__); ++printf("DP: %s was called\n", __func__); + mdelay(1); + + ret = exynos_dp_read_dpcd_lane_stat(regs, priv, &lane_stat); +@@ -505,7 +505,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *regs, + } + + if (lane_stat & DP_LANE_STAT_CR_DONE) { +- debug("DP clock Recovery training succeed\n"); ++printf("DP clock Recovery training succeed\n"); + exynos_dp_set_training_pattern(regs, TRAINING_PTN2); + + for (i = 0; i < priv->lane_cnt; i++) { +@@ -613,7 +613,7 @@ static unsigned int exynos_dp_process_equalizer_training( + return ret; + } + +- debug("DP lane stat : %x\n", lane_stat); ++printf("DP lane stat : %x\n", lane_stat); + + if (lane_stat & DP_LANE_STAT_CR_DONE) { + ret = exynos_dp_read_byte_from_dpcd(regs, +@@ -650,13 +650,13 @@ static unsigned int exynos_dp_process_equalizer_training( + if (((lane_stat&DP_LANE_STAT_CE_DONE) && + (lane_stat&DP_LANE_STAT_SYM_LOCK)) + && (interlane_aligned == DPCD_INTERLANE_ALIGN_DONE)) { +- debug("DP Equalizer training succeed\n"); ++printf("DP Equalizer training succeed\n"); + + f_bw = exynos_dp_get_link_bandwidth(regs); + f_lane_cnt = exynos_dp_get_lane_count(regs); + +- debug("DP final BandWidth : %x\n", f_bw); +- debug("DP final Lane Count : %x\n", f_lane_cnt); ++printf("DP final BandWidth : %x\n", f_bw); ++printf("DP final Lane Count : %x\n", f_lane_cnt); + + priv->lt_info.lt_status = DP_LT_FINISHED; + +@@ -887,7 +887,7 @@ static int exynos_dp_of_to_plat(struct udevice *dev) + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) { +- debug("Can't get the DP base address\n"); ++printf("Can't get the DP base address\n"); + return -EINVAL; + } + priv->regs = (struct exynos_dp *)addr; +@@ -942,10 +942,10 @@ static int exynos_dp_bridge_init(struct udevice *dev) + int num_tries; + int ret; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + ret = video_bridge_attach(dev); + if (ret) { +- debug("video bridge init failed: %d\n", ret); ++printf("video bridge init failed: %d\n", ret); + return ret; + } + +@@ -964,7 +964,7 @@ static int exynos_dp_bridge_init(struct udevice *dev) + if (!ret || ret == -ENOENT) + return 0; + +- debug("%s: eDP bridge failed to come up; try %d of %d\n", ++printf("%s: eDP bridge failed to come up; try %d of %d\n", + __func__, num_tries, max_tries); + } + +@@ -982,7 +982,7 @@ static int exynos_dp_bridge_setup(const void *blob) + /* Configure I2C registers for Parade bridge */ + ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &dev); + if (ret) { +- debug("video bridge init failed: %d\n", ret); ++printf("video bridge init failed: %d\n", ret); + return ret; + } + +@@ -1020,7 +1020,7 @@ int exynos_dp_enable(struct udevice *dev, int panel_bpp, + struct exynos_dp *regs = priv->regs; + unsigned int ret; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + exynos_dp_disp_info(&priv->disp_info); + + ret = exynos_dp_bridge_setup(gd->fdt_blob); +@@ -1061,7 +1061,7 @@ int exynos_dp_enable(struct udevice *dev, int panel_bpp, + return ret; + } + +- debug("Exynos DP init done\n"); ++printf("Exynos DP init done\n"); + + return ret; + } +diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c +index ae500a702..62eb295b2 100644 +--- a/drivers/video/exynos/exynos_dp_lowlevel.c ++++ b/drivers/video/exynos/exynos_dp_lowlevel.c +@@ -305,7 +305,7 @@ int exynos_dp_init_analog_func(struct exynos_dp *dp_regs) + } + } + +- debug("dp's pll lock success(%d)\n", retry_cnt); ++printf("dp's pll lock success(%d)\n", retry_cnt); + + /* Enable Serdes FIFO function and Link symbol clock domain module */ + reg = readl(&dp_regs->func_en2); +@@ -464,7 +464,7 @@ unsigned int exynos_dp_start_aux_transaction(struct exynos_dp *dp_regs) + /* Check AUX CH error access status */ + reg = readl(&dp_regs->aux_ch_sta); + if ((reg & AUX_STATUS_MASK) != 0) { +- debug("DP AUX CH error happens: %x\n", reg & AUX_STATUS_MASK); ++printf("DP AUX CH error happens: %x\n", reg & AUX_STATUS_MASK); + ret = -EAGAIN; + return ret; + } +@@ -542,7 +542,7 @@ unsigned int exynos_dp_read_byte_from_dpcd(struct exynos_dp *dp_regs, + /* Start AUX transaction */ + retval = exynos_dp_start_aux_transaction(dp_regs); + if (!retval) +- debug("DP Aux Transaction fail!\n"); ++printf("DP Aux Transaction fail!\n"); + + /* Read data buffer */ + reg = readl(&dp_regs->buf_data0); +@@ -1159,7 +1159,7 @@ unsigned int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp *dp_regs) + reg = readl(&dp_regs->sys_ctl1); + + if (!(reg & DET_STA)) { +- debug("DP Input stream clock not detected.\n"); ++printf("DP Input stream clock not detected.\n"); + return -EIO; + } + +diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c +index 69992b3c2..9ad8e26e1 100644 +--- a/drivers/video/exynos/exynos_fb.c ++++ b/drivers/video/exynos/exynos_fb.c +@@ -361,13 +361,13 @@ void exynos_fimd_disable_sysmmu(void) + for (i = 0; i < count; i++) { + node = node_list[i]; + if (node <= 0) { +- debug("Can't get device node for fimd sysmmu\n"); ++printf("Can't get device node for fimd sysmmu\n"); + return; + } + + sysmmufimd = (u32 *)fdtdec_get_addr(gd->fdt_blob, node, "reg"); + if (!sysmmufimd) { +- debug("Can't get base address for sysmmu fimdm0"); ++printf("Can't get base address for sysmmu fimdm0"); + return; + } + +@@ -489,20 +489,20 @@ int exynos_fb_of_to_plat(struct udevice *dev) + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) { +- debug("Can't get the FIMD base address\n"); ++printf("Can't get the FIMD base address\n"); + return -EINVAL; + } + priv->reg = (struct exynos_fb *)addr; + + priv->vl_col = fdtdec_get_int(blob, node, "samsung,vl-col", 0); + if (priv->vl_col == 0) { +- debug("Can't get XRES\n"); ++printf("Can't get XRES\n"); + return -ENXIO; + } + + priv->vl_row = fdtdec_get_int(blob, node, "samsung,vl-row", 0); + if (priv->vl_row == 0) { +- debug("Can't get YRES\n"); ++printf("Can't get YRES\n"); + return -ENXIO; + } + +@@ -514,7 +514,7 @@ int exynos_fb_of_to_plat(struct udevice *dev) + + priv->vl_freq = fdtdec_get_int(blob, node, "samsung,vl-freq", 0); + if (priv->vl_freq == 0) { +- debug("Can't get refresh rate\n"); ++printf("Can't get refresh rate\n"); + return -ENXIO; + } + +@@ -535,46 +535,46 @@ int exynos_fb_of_to_plat(struct udevice *dev) + + priv->vl_bpix = fdtdec_get_int(blob, node, "samsung,vl-bpix", 0); + if (priv->vl_bpix == 0) { +- debug("Can't get bits per pixel\n"); ++printf("Can't get bits per pixel\n"); + return -ENXIO; + } + + priv->vl_hspw = fdtdec_get_int(blob, node, "samsung,vl-hspw", 0); + if (priv->vl_hspw == 0) { +- debug("Can't get hsync width\n"); ++printf("Can't get hsync width\n"); + return -ENXIO; + } + + priv->vl_hfpd = fdtdec_get_int(blob, node, "samsung,vl-hfpd", 0); + if (priv->vl_hfpd == 0) { +- debug("Can't get right margin\n"); ++printf("Can't get right margin\n"); + return -ENXIO; + } + + priv->vl_hbpd = (u_char)fdtdec_get_int(blob, node, + "samsung,vl-hbpd", 0); + if (priv->vl_hbpd == 0) { +- debug("Can't get left margin\n"); ++printf("Can't get left margin\n"); + return -ENXIO; + } + + priv->vl_vspw = (u_char)fdtdec_get_int(blob, node, + "samsung,vl-vspw", 0); + if (priv->vl_vspw == 0) { +- debug("Can't get vsync width\n"); ++printf("Can't get vsync width\n"); + return -ENXIO; + } + + priv->vl_vfpd = fdtdec_get_int(blob, node, + "samsung,vl-vfpd", 0); + if (priv->vl_vfpd == 0) { +- debug("Can't get lower margin\n"); ++printf("Can't get lower margin\n"); + return -ENXIO; + } + + priv->vl_vbpd = fdtdec_get_int(blob, node, "samsung,vl-vbpd", 0); + if (priv->vl_vbpd == 0) { +- debug("Can't get upper margin\n"); ++printf("Can't get upper margin\n"); + return -ENXIO; + } + +@@ -631,7 +631,7 @@ static int exynos_fb_probe(struct udevice *dev) + struct udevice *dp; + int ret; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + set_system_display_ctrl(); + set_lcd_clk(); + +@@ -652,23 +652,23 @@ static int exynos_fb_probe(struct udevice *dev) + + ret = uclass_first_device(UCLASS_DISPLAY, &dp); + if (ret) { +- debug("%s: Display device error %d\n", __func__, ret); ++printf("%s: Display device error %d\n", __func__, ret); + return ret; + } + if (!dev) { +- debug("%s: Display device missing\n", __func__); ++printf("%s: Display device missing\n", __func__); + return -ENODEV; + } + ret = display_enable(dp, 18, NULL); + if (ret) { +- debug("%s: Display enable error %d\n", __func__, ret); ++printf("%s: Display enable error %d\n", __func__, ret); + return ret; + } + + /* backlight / pwm */ + ret = panel_enable_backlight(panel); + if (ret) { +- debug("%s: backlight error: %d\n", __func__, ret); ++printf("%s: backlight error: %d\n", __func__, ret); + return ret; + } + +@@ -676,7 +676,7 @@ static int exynos_fb_probe(struct udevice *dev) + if (!ret) + ret = video_bridge_set_backlight(bridge, 80); + if (ret) { +- debug("%s: No video bridge, or no backlight on bridge\n", ++printf("%s: No video bridge, or no backlight on bridge\n", + __func__); + exynos_pinmux_config(PERIPH_ID_PWM0, 0); + } +diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c +index c56eadc82..8c3622238 100644 +--- a/drivers/video/exynos/exynos_mipi_dsi.c ++++ b/drivers/video/exynos/exynos_mipi_dsi.c +@@ -44,18 +44,18 @@ int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device *lcd_dev) + struct mipi_dsim_ddi *dsim_ddi; + + if (!lcd_dev) { +- debug("mipi_dsim_lcd_device is NULL.\n"); ++printf("mipi_dsim_lcd_device is NULL.\n"); + return -EFAULT; + } + + if (!lcd_dev->name) { +- debug("dsim_lcd_device name is NULL.\n"); ++printf("dsim_lcd_device name is NULL.\n"); + return -EFAULT; + } + + dsim_ddi = kzalloc(sizeof(struct mipi_dsim_ddi), GFP_KERNEL); + if (!dsim_ddi) { +- debug("failed to allocate dsim_ddi object.\n"); ++printf("failed to allocate dsim_ddi object.\n"); + return -EFAULT; + } + +@@ -112,24 +112,24 @@ int exynos_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver *lcd_drv) + struct mipi_dsim_ddi *dsim_ddi; + + if (!lcd_drv) { +- debug("mipi_dsim_lcd_driver is NULL.\n"); ++printf("mipi_dsim_lcd_driver is NULL.\n"); + return -EFAULT; + } + + if (!lcd_drv->name) { +- debug("dsim_lcd_driver name is NULL.\n"); ++printf("dsim_lcd_driver name is NULL.\n"); + return -EFAULT; + } + + dsim_ddi = exynos_mipi_dsi_find_lcd_device(lcd_drv); + if (!dsim_ddi) { +- debug("mipi_dsim_ddi object not found.\n"); ++printf("mipi_dsim_ddi object not found.\n"); + return -EFAULT; + } + + dsim_ddi->dsim_lcd_drv = lcd_drv; + +- debug("registered panel driver(%s) to mipi-dsi driver.\n", ++printf("registered panel driver(%s) to mipi-dsi driver.\n", + lcd_drv->name); + + return 0; +@@ -150,7 +150,7 @@ struct mipi_dsim_ddi + if (!lcd_drv || !lcd_dev) + continue; + +- debug("lcd_drv->id = %d, lcd_dev->id = %d\n", ++printf("lcd_drv->id = %d, lcd_dev->id = %d\n", + lcd_drv->id, lcd_dev->id); + + if ((strcmp(lcd_drv->name, name) == 0)) { +@@ -181,14 +181,14 @@ int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd) + + dsim = kzalloc(sizeof(struct mipi_dsim_device), GFP_KERNEL); + if (!dsim) { +- debug("failed to allocate dsim object.\n"); ++printf("failed to allocate dsim object.\n"); + return -EFAULT; + } + + /* get mipi_dsim_config. */ + dsim_config = dsim_pd->dsim_config; + if (dsim_config == NULL) { +- debug("failed to get dsim config data.\n"); ++printf("failed to get dsim config data.\n"); + return -EFAULT; + } + +@@ -199,7 +199,7 @@ int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd) + /* bind lcd ddi matched with panel name. */ + dsim_ddi = exynos_mipi_dsi_bind_lcd_ddi(dsim, dsim_pd->lcd_panel_name); + if (!dsim_ddi) { +- debug("mipi_dsim_ddi object not found.\n"); ++printf("mipi_dsim_ddi object not found.\n"); + return -ENOSYS; + } + if (dsim_pd->lcd_power) +@@ -227,7 +227,7 @@ int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd) + dsim_ddi->dsim_lcd_drv->mipi_display_on(dsim); + } + +- debug("mipi-dsi driver(%s mode) has been probed.\n", ++printf("mipi-dsi driver(%s mode) has been probed.\n", + (dsim_config->e_interface == DSIM_COMMAND) ? + "CPU" : "RGB"); + +@@ -311,7 +311,7 @@ void exynos_init_dsim_platform_data(vidinfo_t *vid) + + if (exynos_dsim_config_parse_dt(gd->fdt_blob, &dsim_config_dt, + &mipi_lcd_device_dt)) +- debug("Can't get proper dsim config.\n"); ++printf("Can't get proper dsim config.\n"); + + strcpy(dsim_platform_data_dt.lcd_panel_name, mipi_lcd_device_dt.name); + dsim_platform_data_dt.dsim_config = &dsim_config_dt; +diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c b/drivers/video/exynos/exynos_mipi_dsi_common.c +index ab7d61afc..658e76b1e 100644 +--- a/drivers/video/exynos/exynos_mipi_dsi_common.c ++++ b/drivers/video/exynos/exynos_mipi_dsi_common.c +@@ -66,14 +66,14 @@ static void exynos_mipi_dsi_long_data_wr(struct mipi_dsim_device *dsim, + payload = data0[data_cnt] | + data0[data_cnt + 1] << 8 | + data0[data_cnt + 2] << 16; +- debug("count = 3 payload = %x, %x %x %x\n", ++printf("count = 3 payload = %x, %x %x %x\n", + payload, data0[data_cnt], + data0[data_cnt + 1], + data0[data_cnt + 2]); + } else if ((data1 - data_cnt) == 2) { + payload = data0[data_cnt] | + data0[data_cnt + 1] << 8; +- debug("count = 2 payload = %x, %x %x\n", payload, ++printf("count = 2 payload = %x, %x %x\n", payload, + data0[data_cnt], data0[data_cnt + 1]); + } else if ((data1 - data_cnt) == 1) { + payload = data0[data_cnt]; +@@ -85,7 +85,7 @@ static void exynos_mipi_dsi_long_data_wr(struct mipi_dsim_device *dsim, + data0[data_cnt + 2] << 16 | + data0[data_cnt + 3] << 24; + +- debug("count = 4 payload = %x, %x %x %x %x\n", ++printf("count = 4 payload = %x, %x %x %x %x\n", + payload, *(u8 *)(data0 + data_cnt), + data0[data_cnt + 1], + data0[data_cnt + 2], +@@ -103,7 +103,7 @@ int exynos_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned int data_id, + unsigned int check_rx_ack = 0; + + if (dsim->state == DSIM_STATE_ULPS) { +- debug("state is ULPS.\n"); ++printf("state is ULPS.\n"); + + return -EINVAL; + } +@@ -120,7 +120,7 @@ int exynos_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned int data_id, + if ((timeout--) > 0) + mdelay(1); + else { +- debug("SRF header fifo is not empty.\n"); ++printf("SRF header fifo is not empty.\n"); + return -EINVAL; + } + } +@@ -134,7 +134,7 @@ int exynos_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned int data_id, + case MIPI_DSI_DCS_SHORT_WRITE: + case MIPI_DSI_DCS_SHORT_WRITE_PARAM: + case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE: +- debug("data0 = %x data1 = %x\n", ++printf("data0 = %x data1 = %x\n", + data0[0], data0[1]); + exynos_mipi_dsi_wr_tx_header(dsim, data_id, data0[0], data0[1]); + if (check_rx_ack) { +@@ -192,7 +192,7 @@ int exynos_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned int data_id, + + exynos_mipi_dsi_wr_tx_data(dsim, payload); + +- debug("count = %d payload = %x,%x %x %x\n", ++printf("count = %d payload = %x,%x %x %x\n", + data1, payload, data0[0], + data0[1], data0[2]); + } else { +@@ -223,7 +223,7 @@ int exynos_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned int data_id, + return -EINVAL; + } + default: +- debug("data id %x is not supported current DSI spec.\n", ++printf("data id %x is not supported current DSI spec.\n", + data_id); + + return -EINVAL; +@@ -284,7 +284,7 @@ unsigned long exynos_mipi_dsi_change_pll(struct mipi_dsim_device *dsim, + * 950 ~ 1000 MHz 1111 + ******************************************************/ + if (dfin_pll < DFIN_PLL_MIN_HZ || dfin_pll > DFIN_PLL_MAX_HZ) { +- debug("fin_pll range should be 6MHz ~ 12MHz\n"); ++printf("fin_pll range should be 6MHz ~ 12MHz\n"); + exynos_mipi_dsi_enable_afc(dsim, 0, 0); + } else { + if (dfin_pll < 7 * MHZ) +@@ -302,13 +302,13 @@ unsigned long exynos_mipi_dsi_change_pll(struct mipi_dsim_device *dsim, + } + + dfvco = dfin_pll * main_divider; +- debug("dfvco = %lu, dfin_pll = %lu, main_divider = %d\n", ++printf("dfvco = %lu, dfin_pll = %lu, main_divider = %d\n", + dfvco, dfin_pll, main_divider); + if (dfvco < DFVCO_MIN_HZ || dfvco > DFVCO_MAX_HZ) +- debug("fvco range should be 500MHz ~ 1000MHz\n"); ++printf("fvco range should be 500MHz ~ 1000MHz\n"); + + dpll_out = dfvco / (1 << scaler); +- debug("dpll_out = %lu, dfvco = %lu, scaler = %d\n", ++printf("dpll_out = %lu, dfvco = %lu, scaler = %d\n", + dpll_out, dfvco, scaler); + + for (i = 0; i < ARRAY_SIZE(dpll_table); i++) { +@@ -318,7 +318,7 @@ unsigned long exynos_mipi_dsi_change_pll(struct mipi_dsim_device *dsim, + } + } + +- debug("freq_band = %d\n", freq_band); ++printf("freq_band = %d\n", freq_band); + + exynos_mipi_dsi_pll_freq(dsim, pre_divider, main_divider, scaler); + +@@ -333,7 +333,7 @@ unsigned long exynos_mipi_dsi_change_pll(struct mipi_dsim_device *dsim, + dsim->dsim_config->pll_stable_time); + + /* Enable PLL */ +- debug("FOUT of mipi dphy pll is %luMHz\n", ++printf("FOUT of mipi dphy pll is %luMHz\n", + (dpll_out / MHZ)); + + return dpll_out; +@@ -358,7 +358,7 @@ int exynos_mipi_dsi_set_clock(struct mipi_dsim_device *dsim, + dsim->dsim_config->p, dsim->dsim_config->m, + dsim->dsim_config->s); + if (hs_clk == 0) { +- debug("failed to get hs clock.\n"); ++printf("failed to get hs clock.\n"); + return -EINVAL; + } + +@@ -367,20 +367,20 @@ int exynos_mipi_dsi_set_clock(struct mipi_dsim_device *dsim, + exynos_mipi_dsi_pll_on(dsim, 1); + /* DPHY : D-PHY clock out, DSIM link : external clock out */ + } else if (byte_clk_sel == DSIM_EXT_CLK_DIV8) +- debug("not support EXT CLK source for MIPI DSIM\n"); ++printf("not support EXT CLK source for MIPI DSIM\n"); + else if (byte_clk_sel == DSIM_EXT_CLK_BYPASS) +- debug("not support EXT CLK source for MIPI DSIM\n"); ++printf("not support EXT CLK source for MIPI DSIM\n"); + + /* escape clock divider */ + esc_div = byte_clk / (dsim->dsim_config->esc_clk); +- debug("esc_div = %d, byte_clk = %lu, esc_clk = %lu\n", ++printf("esc_div = %d, byte_clk = %lu, esc_clk = %lu\n", + esc_div, byte_clk, dsim->dsim_config->esc_clk); + if ((byte_clk / esc_div) >= (20 * MHZ) || + (byte_clk / esc_div) > dsim->dsim_config->esc_clk) + esc_div += 1; + + escape_clk = byte_clk / esc_div; +- debug("escape_clk = %lu, byte_clk = %lu, esc_div = %d\n", ++printf("escape_clk = %lu, byte_clk = %lu, esc_div = %d\n", + escape_clk, byte_clk, esc_div); + + /* enable escape clock. */ +@@ -392,23 +392,23 @@ int exynos_mipi_dsi_set_clock(struct mipi_dsim_device *dsim, + exynos_mipi_dsi_enable_esc_clk_on_lane(dsim, + (DSIM_LANE_CLOCK | dsim->data_lane), 1); + +- debug("byte clock is %luMHz\n", ++printf("byte clock is %luMHz\n", + (byte_clk / MHZ)); +- debug("escape clock that user's need is %lu\n", ++printf("escape clock that user's need is %lu\n", + (dsim->dsim_config->esc_clk / MHZ)); +- debug("escape clock divider is %x\n", esc_div); +- debug("escape clock is %luMHz\n", ++printf("escape clock divider is %x\n", esc_div); ++printf("escape clock is %luMHz\n", + ((byte_clk / esc_div) / MHZ)); + + if ((byte_clk / esc_div) > escape_clk) { + esc_clk_error_rate = escape_clk / + (byte_clk / esc_div); +- debug("error rate is %lu over.\n", ++printf("error rate is %lu over.\n", + (esc_clk_error_rate / 100)); + } else if ((byte_clk / esc_div) < (escape_clk)) { + esc_clk_error_rate = (byte_clk / esc_div) / + escape_clk; +- debug("error rate is %lu under.\n", ++printf("error rate is %lu under.\n", + (esc_clk_error_rate / 100)); + } + } else { +@@ -446,7 +446,7 @@ int exynos_mipi_dsi_init_dsim(struct mipi_dsim_device *dsim) + DSIM_LANE_DATA2 | DSIM_LANE_DATA3; + break; + default: +- debug("data lane is invalid.\n"); ++printf("data lane is invalid.\n"); + return -EINVAL; + }; + +@@ -511,7 +511,7 @@ int exynos_mipi_dsi_set_display_mode(struct mipi_dsim_device *dsim, + + exynos_mipi_dsi_display_config(dsim, dsim->dsim_config); + +- debug("lcd panel ==> width = %d, height = %d\n", ++printf("lcd panel ==> width = %d, height = %d\n", + lcd_video.xres, lcd_video.yres); + + return 0; +@@ -538,8 +538,8 @@ int exynos_mipi_dsi_init_link(struct mipi_dsim_device *dsim) + while (!(exynos_mipi_dsi_is_lane_state(dsim))) { + time_out--; + if (time_out == 0) { +- debug("DSI Master is not stop state.\n"); +- debug("Check initialization process\n"); ++printf("DSI Master is not stop state.\n"); ++printf("Check initialization process\n"); + + return -EINVAL; + } +@@ -557,7 +557,7 @@ int exynos_mipi_dsi_init_link(struct mipi_dsim_device *dsim) + + return 0; + default: +- debug("DSI Master is already init.\n"); ++printf("DSI Master is already init.\n"); + return 0; + } + +@@ -578,9 +578,9 @@ int exynos_mipi_dsi_set_hs_enable(struct mipi_dsim_device *dsim) + + return 0; + } else +- debug("clock source is external bypass.\n"); ++printf("clock source is external bypass.\n"); + } else +- debug("DSIM is not stop state.\n"); ++printf("DSIM is not stop state.\n"); + + return 0; + } +@@ -590,7 +590,7 @@ int exynos_mipi_dsi_set_data_transfer_mode(struct mipi_dsim_device *dsim, + { + if (mode) { + if (dsim->state != DSIM_STATE_HSCLKEN) { +- debug("HS Clock lane is not enabled.\n"); ++printf("HS Clock lane is not enabled.\n"); + return -EINVAL; + } + +@@ -598,7 +598,7 @@ int exynos_mipi_dsi_set_data_transfer_mode(struct mipi_dsim_device *dsim, + } else { + if (dsim->state == DSIM_STATE_INIT || dsim->state == + DSIM_STATE_ULPS) { +- debug("DSI Master is not STOP or HSDT state.\n"); ++printf("DSI Master is not STOP or HSDT state.\n"); + return -EINVAL; + } + +diff --git a/drivers/video/formike.c b/drivers/video/formike.c +index 5cbe50d4c..2dcace567 100644 +--- a/drivers/video/formike.c ++++ b/drivers/video/formike.c +@@ -38,7 +38,7 @@ static int spi_write_tag_val(struct spi_slave *spi, unsigned char tag, + tag, val, ret); + #endif /* KWH043ST20_F01_SPI_DEBUG */ + if (ret) +- debug("%s: Failed to send: %d\n", __func__, ret); ++printf("%s: Failed to send: %d\n", __func__, ret); + + return ret; + } +@@ -64,13 +64,13 @@ int kwh043st20_f01_spi_startup(unsigned int bus, unsigned int cs, + + spi = spi_setup_slave(bus, cs, max_hz, spi_mode); + if (!spi) { +- debug("%s: Failed to set up slave\n", __func__); ++printf("%s: Failed to set up slave\n", __func__); + return -1; + } + + ret = spi_claim_bus(spi); + if (ret) { +- debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); ++printf("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto err_claim_bus; + } + +diff --git a/drivers/video/hx8238d.c b/drivers/video/hx8238d.c +index f7e7753a5..965d33dc8 100644 +--- a/drivers/video/hx8238d.c ++++ b/drivers/video/hx8238d.c +@@ -153,7 +153,7 @@ static int hx8238d_probe(struct udevice *dev) + + ret = spi_claim_bus(priv->spi); + if (ret) { +- debug("Failed to claim bus: %d\n", ret); ++printf("Failed to claim bus: %d\n", ret); + return ret; + } + +@@ -165,14 +165,14 @@ static int hx8238d_probe(struct udevice *dev) + ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, sr_buf, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { +- debug("Failed to select register %d\n", ret); ++printf("Failed to select register %d\n", ret); + goto free; + } + + ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, wr_buf, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { +- debug("Failed to write value %d\n", ret); ++printf("Failed to write value %d\n", ret); + goto free; + } + } +diff --git a/drivers/video/ihs_video_out.c b/drivers/video/ihs_video_out.c +index 73b8f4bd1..b53a02405 100644 +--- a/drivers/video/ihs_video_out.c ++++ b/drivers/video/ihs_video_out.c +@@ -147,7 +147,7 @@ int ihs_video_out_set_mem(struct udevice *dev, uint col, uint row, u8 *buf, + uint max_size = priv->base_width * priv->base_height; + + if (offset + k >= max_size) { +- debug("%s: Write would be out of OSD bounds\n", ++printf("%s: Write would be out of OSD bounds\n", + dev->name); + return -E2BIG; + } +@@ -161,7 +161,7 @@ int ihs_video_out_set_mem(struct udevice *dev, uint col, uint row, u8 *buf, + CONTROL_MODE_OSD | + CONTROL_ENABLE_ON); + if (res) { +- debug("%s: Could not set control register\n", dev->name); ++printf("%s: Could not set control register\n", dev->name); + return res; + } + +@@ -185,7 +185,7 @@ int ihs_video_out_set_size(struct udevice *dev, uint col, uint row) + + if (!col || col > MAX_VIDEOMEM_WIDTH || col > MAX_X_CHARS || + !row || row > MAX_VIDEOMEM_HEIGHT || row > MAX_Y_CHARS) { +- debug("%s: Desired OSD size invalid\n", dev->name); ++printf("%s: Desired OSD size invalid\n", dev->name); + return -EINVAL; + } + +@@ -215,7 +215,7 @@ int ihs_video_out_print(struct udevice *dev, uint col, uint row, ulong color, + + res = ihs_video_out_set_mem(dev, col, row, buffer, 2 * len, 1); + if (res < 0) { +- debug("%s: Could not write to video memory\n", dev->name); ++printf("%s: Could not write to video memory\n", dev->name); + return res; + } + +@@ -240,7 +240,7 @@ int ihs_video_out_probe(struct udevice *dev) + + res = regmap_init_mem(dev_ofnode(dev), &priv->map); + if (res) { +- debug("%s: Could not initialize regmap (err = %d)\n", dev->name, ++printf("%s: Could not initialize regmap (err = %d)\n", dev->name, + res); + return res; + } +@@ -250,7 +250,7 @@ int ihs_video_out_probe(struct udevice *dev) + + mode = dev_read_string(dev, "mode"); + if (!mode) { +- debug("%s: Could not read mode property\n", dev->name); ++printf("%s: Could not read mode property\n", dev->name); + return -EINVAL; + } + +@@ -280,7 +280,7 @@ int ihs_video_out_probe(struct udevice *dev) + CONTROL_MODE_OSD | + CONTROL_ENABLE_OFF); + if (res) { +- debug("%s: Could not set control register (err = %d)\n", ++printf("%s: Could not set control register (err = %d)\n", + dev->name, res); + return res; + } +@@ -293,7 +293,7 @@ int ihs_video_out_probe(struct udevice *dev) + res = dev_read_phandle_with_args(dev, "clk_gen", NULL, 0, 0, + &phandle_args); + if (res) { +- debug("%s: Could not get clk_gen node (err = %d)\n", ++printf("%s: Could not get clk_gen node (err = %d)\n", + dev->name, res); + return -EINVAL; + } +@@ -301,7 +301,7 @@ int ihs_video_out_probe(struct udevice *dev) + res = uclass_get_device_by_ofnode(UCLASS_CLK, phandle_args.node, + &priv->clk_gen); + if (res) { +- debug("%s: Could not get clk_gen dev (err = %d)\n", ++printf("%s: Could not get clk_gen dev (err = %d)\n", + dev->name, res); + return -EINVAL; + } +@@ -309,7 +309,7 @@ int ihs_video_out_probe(struct udevice *dev) + res = dev_read_phandle_with_args(dev, "video_tx", NULL, 0, 0, + &phandle_args); + if (res) { +- debug("%s: Could not get video_tx (err = %d)\n", ++printf("%s: Could not get video_tx (err = %d)\n", + dev->name, res); + return -EINVAL; + } +@@ -317,14 +317,14 @@ int ihs_video_out_probe(struct udevice *dev) + res = uclass_get_device_by_ofnode(UCLASS_DISPLAY, phandle_args.node, + &priv->video_tx); + if (res) { +- debug("%s: Could not get video_tx dev (err = %d)\n", ++printf("%s: Could not get video_tx dev (err = %d)\n", + dev->name, res); + return -EINVAL; + } + + res = display_enable(priv->video_tx, 8, &timing); + if (res && res != -EIO) { /* Ignore missing DP sink error */ +- debug("%s: Could not enable the display (err = %d)\n", ++printf("%s: Could not enable the display (err = %d)\n", + dev->name, res); + return res; + } +diff --git a/drivers/video/imx/ipu_common.c b/drivers/video/imx/ipu_common.c +index 5908b23ac..7cb911328 100644 +--- a/drivers/video/imx/ipu_common.c ++++ b/drivers/video/imx/ipu_common.c +@@ -290,7 +290,7 @@ static void ipu_pixel_clk_recalc(struct clk *clk) + u64 final_rate = (unsigned long long)clk->parent->rate * 16; + + div = __raw_readl(DI_BS_CLKGEN0(clk->id)); +- debug("read BS_CLKGEN0 div:%d, final_rate:%lld, prate:%ld\n", ++printf("read BS_CLKGEN0 div:%d, final_rate:%lld, prate:%ld\n", + div, final_rate, clk->parent->rate); + + clk->rate = 0; +@@ -352,7 +352,7 @@ static int ipu_pixel_clk_set_rate(struct clk *clk, unsigned long rate) + div &= ~0xF; + } + if (div > 0x1000) +- debug("Overflow, DI_BS_CLKGEN0 div:0x%x\n", (u32)div); ++printf("Overflow, DI_BS_CLKGEN0 div:0x%x\n", (u32)div); + + __raw_writel(div, DI_BS_CLKGEN0(clk->id)); + +@@ -493,9 +493,9 @@ int ipu_probe(void) + #else + g_ipu_clk->rate = is_mx6sdl() ? IPUV3_CLK_MX6DL : IPUV3_CLK_MX6Q; + #endif +- debug("ipu_clk = %u\n", clk_get_rate(g_ipu_clk)); ++printf("ipu_clk = %u\n", clk_get_rate(g_ipu_clk)); + g_ldb_clk = &ldb_clk; +- debug("ldb_clk = %u\n", clk_get_rate(g_ldb_clk)); ++printf("ldb_clk = %u\n", clk_get_rate(g_ldb_clk)); + ipu_reset(); + + clk_set_parent(g_pixel_clk[0], g_ipu_clk); +@@ -532,37 +532,37 @@ int ipu_probe(void) + + void ipu_dump_registers(void) + { +- debug("IPU_CONF = \t0x%08X\n", __raw_readl(IPU_CONF)); +- debug("IDMAC_CONF = \t0x%08X\n", __raw_readl(IDMAC_CONF)); +- debug("IDMAC_CHA_EN1 = \t0x%08X\n", ++printf("IPU_CONF = \t0x%08X\n", __raw_readl(IPU_CONF)); ++printf("IDMAC_CONF = \t0x%08X\n", __raw_readl(IDMAC_CONF)); ++printf("IDMAC_CHA_EN1 = \t0x%08X\n", + __raw_readl(IDMAC_CHA_EN(0))); +- debug("IDMAC_CHA_EN2 = \t0x%08X\n", ++printf("IDMAC_CHA_EN2 = \t0x%08X\n", + __raw_readl(IDMAC_CHA_EN(32))); +- debug("IDMAC_CHA_PRI1 = \t0x%08X\n", ++printf("IDMAC_CHA_PRI1 = \t0x%08X\n", + __raw_readl(IDMAC_CHA_PRI(0))); +- debug("IDMAC_CHA_PRI2 = \t0x%08X\n", ++printf("IDMAC_CHA_PRI2 = \t0x%08X\n", + __raw_readl(IDMAC_CHA_PRI(32))); +- debug("IPU_CHA_DB_MODE_SEL0 = \t0x%08X\n", ++printf("IPU_CHA_DB_MODE_SEL0 = \t0x%08X\n", + __raw_readl(IPU_CHA_DB_MODE_SEL(0))); +- debug("IPU_CHA_DB_MODE_SEL1 = \t0x%08X\n", ++printf("IPU_CHA_DB_MODE_SEL1 = \t0x%08X\n", + __raw_readl(IPU_CHA_DB_MODE_SEL(32))); +- debug("DMFC_WR_CHAN = \t0x%08X\n", ++printf("DMFC_WR_CHAN = \t0x%08X\n", + __raw_readl(DMFC_WR_CHAN)); +- debug("DMFC_WR_CHAN_DEF = \t0x%08X\n", ++printf("DMFC_WR_CHAN_DEF = \t0x%08X\n", + __raw_readl(DMFC_WR_CHAN_DEF)); +- debug("DMFC_DP_CHAN = \t0x%08X\n", ++printf("DMFC_DP_CHAN = \t0x%08X\n", + __raw_readl(DMFC_DP_CHAN)); +- debug("DMFC_DP_CHAN_DEF = \t0x%08X\n", ++printf("DMFC_DP_CHAN_DEF = \t0x%08X\n", + __raw_readl(DMFC_DP_CHAN_DEF)); +- debug("DMFC_IC_CTRL = \t0x%08X\n", ++printf("DMFC_IC_CTRL = \t0x%08X\n", + __raw_readl(DMFC_IC_CTRL)); +- debug("IPU_FS_PROC_FLOW1 = \t0x%08X\n", ++printf("IPU_FS_PROC_FLOW1 = \t0x%08X\n", + __raw_readl(IPU_FS_PROC_FLOW1)); +- debug("IPU_FS_PROC_FLOW2 = \t0x%08X\n", ++printf("IPU_FS_PROC_FLOW2 = \t0x%08X\n", + __raw_readl(IPU_FS_PROC_FLOW2)); +- debug("IPU_FS_PROC_FLOW3 = \t0x%08X\n", ++printf("IPU_FS_PROC_FLOW3 = \t0x%08X\n", + __raw_readl(IPU_FS_PROC_FLOW3)); +- debug("IPU_FS_DISP_FLOW1 = \t0x%08X\n", ++printf("IPU_FS_DISP_FLOW1 = \t0x%08X\n", + __raw_readl(IPU_FS_DISP_FLOW1)); + } + +@@ -581,7 +581,7 @@ int32_t ipu_init_channel(ipu_channel_t channel, ipu_channel_params_t *params) + int ret = 0; + uint32_t ipu_conf; + +- debug("init channel = %d\n", IPU_CHAN_ID(channel)); ++printf("init channel = %d\n", IPU_CHAN_ID(channel)); + + if (g_ipu_clk_enabled == 0) { + g_ipu_clk_enabled = 1; +@@ -672,7 +672,7 @@ void ipu_uninit_channel(ipu_channel_t channel) + uint32_t ipu_conf; + + if ((g_channel_init_mask & (1L << IPU_CHAN_ID(channel))) == 0) { +- debug("Channel already uninitialized %d\n", ++printf("Channel already uninitialized %d\n", + IPU_CHAN_ID(channel)); + return; + } +@@ -753,41 +753,41 @@ static inline void ipu_ch_param_dump(int ch) + { + #ifdef DEBUG + struct ipu_ch_param *p = ipu_ch_param_addr(ch); +- debug("ch %d word 0 - %08X %08X %08X %08X %08X\n", ch, ++printf("ch %d word 0 - %08X %08X %08X %08X %08X\n", ch, + p->word[0].data[0], p->word[0].data[1], p->word[0].data[2], + p->word[0].data[3], p->word[0].data[4]); +- debug("ch %d word 1 - %08X %08X %08X %08X %08X\n", ch, ++printf("ch %d word 1 - %08X %08X %08X %08X %08X\n", ch, + p->word[1].data[0], p->word[1].data[1], p->word[1].data[2], + p->word[1].data[3], p->word[1].data[4]); +- debug("PFS 0x%x, ", ++printf("PFS 0x%x, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 85, 4)); +- debug("BPP 0x%x, ", ++printf("BPP 0x%x, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 0, 107, 3)); +- debug("NPB 0x%x\n", ++printf("NPB 0x%x\n", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 78, 7)); + +- debug("FW %d, ", ++printf("FW %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 0, 125, 13)); +- debug("FH %d, ", ++printf("FH %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 0, 138, 12)); +- debug("Stride %d\n", ++printf("Stride %d\n", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 102, 14)); + +- debug("Width0 %d+1, ", ++printf("Width0 %d+1, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 116, 3)); +- debug("Width1 %d+1, ", ++printf("Width1 %d+1, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 119, 3)); +- debug("Width2 %d+1, ", ++printf("Width2 %d+1, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 122, 3)); +- debug("Width3 %d+1, ", ++printf("Width3 %d+1, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 125, 3)); +- debug("Offset0 %d, ", ++printf("Offset0 %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 128, 5)); +- debug("Offset1 %d, ", ++printf("Offset1 %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 133, 5)); +- debug("Offset2 %d, ", ++printf("Offset2 %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 138, 5)); +- debug("Offset3 %d\n", ++printf("Offset3 %d\n", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 143, 5)); + #endif + } +@@ -973,7 +973,7 @@ static void ipu_ch_param_init(int ch, + ipu_ch_param_set_field(¶ms, 0, 46, 22, u_offset / 8); + ipu_ch_param_set_field(¶ms, 0, 68, 22, v_offset / 8); + +- debug("initializing idma ch %d @ %p\n", ch, ipu_ch_param_addr(ch)); ++printf("initializing idma ch %d @ %p\n", ch, ipu_ch_param_addr(ch)); + memcpy(ipu_ch_param_addr(ch), ¶ms, sizeof(params)); + }; + +@@ -1149,7 +1149,7 @@ int32_t ipu_disable_channel(ipu_channel_t channel) + uint32_t out_dma; + + if ((g_channel_enable_mask & (1L << IPU_CHAN_ID(channel))) == 0) { +- debug("Channel already disabled %d\n", ++printf("Channel already disabled %d\n", + IPU_CHAN_ID(channel)); + return 0; + } +diff --git a/drivers/video/imx/ipu_disp.c b/drivers/video/imx/ipu_disp.c +index 45069897f..19e46b1fb 100644 +--- a/drivers/video/imx/ipu_disp.c ++++ b/drivers/video/imx/ipu_disp.c +@@ -80,7 +80,7 @@ void ipu_dmfc_init(int dmfc_type, int first) + * 5F - segement 6, 7; + * 1C, 2C and 6B, 6F unused; + */ +- debug("IPU DMFC DC HIGH RES: 1(0~3), 5B(4,5), 5F(6,7)\n"); ++printf("IPU DMFC DC HIGH RES: 1(0~3), 5B(4,5), 5F(6,7)\n"); + dmfc_wr_chan = 0x00000088; + dmfc_dp_chan = 0x00009694; + dmfc_size_28 = 256 * 4; +@@ -94,7 +94,7 @@ void ipu_dmfc_init(int dmfc_type, int first) + * 5F - segement 6,7; + * 1C, 2C and 6B, 6F unused; + */ +- debug("IPU DMFC DP HIGH RES: 1(0,1), 5B(2~5), 5F(6,7)\n"); ++printf("IPU DMFC DP HIGH RES: 1(0,1), 5B(2~5), 5F(6,7)\n"); + dmfc_wr_chan = 0x00000090; + dmfc_dp_chan = 0x0000968a; + dmfc_size_28 = 128 * 4; +@@ -107,7 +107,7 @@ void ipu_dmfc_init(int dmfc_type, int first) + * 5F - segement 4~7; + * 1, 1C, 2C and 6B, 6F unused; + */ +- debug("IPU DMFC ONLY-DP HIGH RES: 5B(0~3), 5F(4~7)\n"); ++printf("IPU DMFC ONLY-DP HIGH RES: 5B(0~3), 5F(4~7)\n"); + dmfc_wr_chan = 0x00000000; + dmfc_dp_chan = 0x00008c88; + dmfc_size_28 = 0; +@@ -121,7 +121,7 @@ void ipu_dmfc_init(int dmfc_type, int first) + * 5F - segement 6, 7; + * 1C, 2C and 6B, 6F unused; + */ +- debug("IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)\n"); ++printf("IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)\n"); + dmfc_wr_chan = 0x00000090; + dmfc_dp_chan = 0x00009694; + dmfc_size_28 = 128 * 4; +@@ -478,7 +478,7 @@ int ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt, + uint32_t color_key = __raw_readl(DP_GRAPH_WIND_CTRL()) & + 0xFFFFFFL; + +- debug("_ipu_dp_init color key 0x%x need change to yuv fmt!\n", ++printf("_ipu_dp_init color key 0x%x need change to yuv fmt!\n", + color_key); + + red = (color_key >> 16) & 0xFF; +@@ -494,7 +494,7 @@ int ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt, + __raw_writel(reg | color_key, DP_GRAPH_WIND_CTRL()); + color_key_4rgb = 0; + +- debug("_ipu_dp_init color key change to yuv fmt 0x%x!\n", ++printf("_ipu_dp_init color key change to yuv fmt 0x%x!\n", + color_key); + } + +@@ -841,7 +841,7 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, + int map; + struct clk *di_parent; + +- debug("panel size = %d x %d\n", width, height); ++printf("panel size = %d x %d\n", width, height); + + if ((v_sync_width == 0) || (h_sync_width == 0)) + return -EINVAL; +@@ -856,7 +856,7 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, + v_total = height + v_sync_width + v_start_width + v_end_width; + + /* Init clocking */ +- debug("pixel clk = %dHz\n", pixel_clk); ++printf("pixel clk = %dHz\n", pixel_clk); + + if (sig.ext_clk) { + if (!(g_di1_tvout && (disp == 1))) { /*not round div for tvout*/ +@@ -901,7 +901,7 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, + + map = ipu_pixfmt_to_map(pixel_fmt); + if (map < 0) { +- debug("IPU_DISP: No MAP\n"); ++printf("IPU_DISP: No MAP\n"); + return -EINVAL; + } + +@@ -1247,7 +1247,7 @@ int32_t ipu_disp_set_color_key(ipu_channel_t channel, unsigned char enable, + ((fg_csc_type == YUV2YUV) && (bg_csc_type == YUV2YUV)) || + ((fg_csc_type == YUV2RGB) && (bg_csc_type == YUV2RGB))) { + +- debug("color key 0x%x need change to yuv fmt\n", color_key); ++printf("color key 0x%x need change to yuv fmt\n", color_key); + + red = (color_key >> 16) & 0xFF; + green = (color_key >> 8) & 0xFF; +@@ -1260,7 +1260,7 @@ int32_t ipu_disp_set_color_key(ipu_channel_t channel, unsigned char enable, + + color_key_4rgb = 0; + +- debug("color key change to yuv fmt 0x%x\n", color_key); ++printf("color key change to yuv fmt 0x%x\n", color_key); + } + + if (enable) { +diff --git a/drivers/video/imx/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c +index 6cdbbafaf..aa655fd82 100644 +--- a/drivers/video/imx/mxc_ipuv3_fb.c ++++ b/drivers/video/imx/mxc_ipuv3_fb.c +@@ -100,7 +100,7 @@ static uint32_t bpp_to_pixfmt(struct fb_info *fbi) + { + uint32_t pixfmt = 0; + +- debug("bpp_to_pixfmt: %d\n", fbi->var.bits_per_pixel); ++printf("bpp_to_pixfmt: %d\n", fbi->var.bits_per_pixel); + + if (fbi->var.nonstd) + return fbi->var.nonstd; +@@ -127,7 +127,7 @@ static int setup_disp_channel1(struct fb_info *fbi) + memset(¶ms, 0, sizeof(params)); + params.mem_dp_bg_sync.di = mxc_fbi->ipu_di; + +- debug("%s called\n", __func__); ++printf("%s called\n", __func__); + /* + * Assuming interlaced means yuv output, below setting also + * valid for mem_dc_sync. FG should have the same vmode as BG. +@@ -165,7 +165,7 @@ static int setup_disp_channel2(struct fb_info *fbi) + + fbi->var.xoffset = fbi->var.yoffset = 0; + +- debug("%s: %x %d %d %d %lx %lx\n", ++printf("%s: %x %d %d %d %lx %lx\n", + __func__, + mxc_fbi->ipu_ch, + fbi->var.xres, +@@ -243,7 +243,7 @@ static int mxcfb_set_par(struct fb_info *fbi) + if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN) + sig_cfg.clkidle_en = 1; + +- debug("pixclock = %lu Hz\n", PICOS2KHZ(fbi->var.pixclock) * 1000UL); ++printf("pixclock = %lu Hz\n", PICOS2KHZ(fbi->var.pixclock) * 1000UL); + + if (ipu_init_sync_panel(mxc_fbi->ipu_di, + (PICOS2KHZ(fbi->var.pixclock)) * 1000UL, +@@ -401,7 +401,7 @@ static int mxcfb_map_video_memory(struct fb_info *fbi) + return -EBUSY; + } + +- debug("allocated fb @ paddr=0x%08X, size=%d.\n", ++printf("allocated fb @ paddr=0x%08X, size=%d.\n", + (uint32_t) fbi->fix.smem_start, fbi->fix.smem_len); + + fbi->screen_size = fbi->fix.smem_len; +@@ -440,7 +440,7 @@ static struct fb_info *mxcfb_init_fbinfo(void) + int size = sizeof(struct mxcfb_info) + PADDING + + sizeof(struct fb_info); + +- debug("%s: %d %d %d %d\n", ++printf("%s: %d %d %d %d\n", + __func__, + PADDING, + size, +@@ -460,7 +460,7 @@ static struct fb_info *mxcfb_init_fbinfo(void) + fbi->par = p + sizeof(struct fb_info) + PADDING; + + mxcfbi = (struct mxcfb_info *)fbi->par; +- debug("Framebuffer structures at: fbi=0x%x mxcfbi=0x%x\n", ++printf("Framebuffer structures at: fbi=0x%x mxcfbi=0x%x\n", + (unsigned int)fbi, (unsigned int)mxcfbi); + + fbi->var.activate = FB_ACTIVATE_NOW; +@@ -594,7 +594,7 @@ static int ipuv3_video_probe(struct udevice *dev) + u32 fb_start, fb_end; + int ret; + +- debug("%s() plat: base 0x%lx, size 0x%x\n", ++printf("%s() plat: base 0x%lx, size 0x%x\n", + __func__, plat->base, plat->size); + + ret = ipu_probe(); +diff --git a/drivers/video/ivybridge_igd.c b/drivers/video/ivybridge_igd.c +index 1aa5317dd..a83e9b995 100644 +--- a/drivers/video/ivybridge_igd.c ++++ b/drivers/video/ivybridge_igd.c +@@ -280,7 +280,7 @@ static int gma_pm_init_pre_vbios(void *gtt_bar, int rev) + { + u32 reg32; + +- debug("GT Power Management Init, silicon = %#x\n", rev); ++printf("GT Power Management Init, silicon = %#x\n", rev); + + if (rev < IVB_STEP_C0) { + /* 1: Enable force wake */ +@@ -310,10 +310,10 @@ static int gma_pm_init_pre_vbios(void *gtt_bar, int rev) + reg32 = gtt_read(gtt_bar, 0x911c); + if ((rev & BASE_REV_MASK) == BASE_REV_SNB) { + if (reg32 & (1 << 13)) { +- debug("SNB GT1 Power Meter Weights\n"); ++printf("SNB GT1 Power Meter Weights\n"); + gtt_write_powermeter(gtt_bar, snb_pm_gt1); + } else { +- debug("SNB GT2 Power Meter Weights\n"); ++printf("SNB GT2 Power Meter Weights\n"); + gtt_write_powermeter(gtt_bar, snb_pm_gt2); + } + } else { +@@ -321,7 +321,7 @@ static int gma_pm_init_pre_vbios(void *gtt_bar, int rev) + + if (reg32 & (1 << 13)) { + /* GT1 SKU */ +- debug("IVB GT1 Power Meter Weights\n"); ++printf("IVB GT1 Power Meter Weights\n"); + gtt_write_powermeter(gtt_bar, ivb_pm_gt1); + } else { + /* GT2 SKU */ +@@ -330,15 +330,15 @@ static int gma_pm_init_pre_vbios(void *gtt_bar, int rev) + + if (tdp <= 17) { + /* <=17W ULV */ +- debug("IVB GT2 17W Power Meter Weights\n"); ++printf("IVB GT2 17W Power Meter Weights\n"); + gtt_write_powermeter(gtt_bar, ivb_pm_gt2_17w); + } else if ((tdp >= 25) && (tdp <= 35)) { + /* 25W-35W */ +- debug("IVB GT2 25W-35W Power Meter Weights\n"); ++printf("IVB GT2 25W-35W Power Meter Weights\n"); + gtt_write_powermeter(gtt_bar, ivb_pm_gt2_35w); + } else { + /* All others */ +- debug("IVB GT2 35W Power Meter Weights\n"); ++printf("IVB GT2 35W Power Meter Weights\n"); + gtt_write_powermeter(gtt_bar, ivb_pm_gt2_35w); + } + } +@@ -467,7 +467,7 @@ static int gma_pm_init_post_vbios(struct udevice *dev, int rev, void *gtt_bar) + int node = dev_of_offset(dev); + u32 reg32, cycle_delay; + +- debug("GT Power Management Init (post VBIOS)\n"); ++printf("GT Power Management Init (post VBIOS)\n"); + + /* 15: Deassert Force Wake */ + if (rev < IVB_STEP_C0) { +@@ -573,7 +573,7 @@ static int int15_handler(void) + { + int res = 0; + +- debug("%s: INT15 function %04x!\n", __func__, M.x86.R_AX); ++printf("%s: INT15 function %04x!\n", __func__, M.x86.R_AX); + + switch (M.x86.R_AX) { + case 0x5f34: +@@ -638,7 +638,7 @@ static int int15_handler(void) + break; + default: + /* Interrupt was not handled */ +- debug("Unknown INT15 5f70 function: 0x%02x\n", ++printf("Unknown INT15 5f70 function: 0x%02x\n", + M.x86.R_CH); + break; + } +@@ -647,7 +647,7 @@ static int int15_handler(void) + res = 1; + break; + default: +- debug("Unknown INT15 function %04x!\n", M.x86.R_AX); ++printf("Unknown INT15 function %04x!\n", M.x86.R_AX); + break; + } + return res; +@@ -673,11 +673,11 @@ static void sandybridge_setup_graphics(struct udevice *dev, + case 0x0166: /* IvyBridge */ + break; + default: +- debug("Graphics not supported by this CPU/chipset\n"); ++printf("Graphics not supported by this CPU/chipset\n"); + return; + } + +- debug("Initialising Graphics\n"); ++printf("Initialising Graphics\n"); + + /* Setup IGD memory by setting GGC[7:3] = 1 for 32MB */ + dm_pci_read_config16(dev, GGC, ®16); +@@ -744,7 +744,7 @@ static int gma_func0_init(struct udevice *dev) + dm_pci_write_config32(dev, PCI_COMMAND, reg32); + + gtt_bar = (void *)(ulong)dm_pci_read_bar32(dev, 0); +- debug("GT bar %p\n", gtt_bar); ++printf("GT bar %p\n", gtt_bar); + ret = gma_pm_init_pre_vbios(gtt_bar, rev); + if (ret) + return ret; +diff --git a/drivers/video/lg4573.c b/drivers/video/lg4573.c +index dd87fc461..d4aff2054 100644 +--- a/drivers/video/lg4573.c ++++ b/drivers/video/lg4573.c +@@ -27,7 +27,7 @@ static int lb043wv_spi_write_u16(struct spi_slave *slave, u16 val) + ret = spi_xfer(slave, 16, &buf16, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) +- debug("%s: Failed to send: %d\n", __func__, ret); ++printf("%s: Failed to send: %d\n", __func__, ret); + + return ret; + } +@@ -78,7 +78,7 @@ static void lb043wv_display_mode_settings(struct spi_slave *slave) + 0x7200, + }; + +- debug("transfer display mode settings\n"); ++printf("transfer display mode settings\n"); + lb043wv_spi_write_u16_array(slave, display_mode_settings, + ARRAY_SIZE(display_mode_settings)); + } +@@ -109,7 +109,7 @@ static void lb043wv_power_settings(struct spi_slave *slave) + 0x7263, + }; + +- debug("transfer power settings\n"); ++printf("transfer power settings\n"); + lb043wv_spi_write_u16_array(slave, power_settings, + ARRAY_SIZE(power_settings)); + } +@@ -179,7 +179,7 @@ static void lb043wv_gamma_settings(struct spi_slave *slave) + 0x7203, + }; + +- debug("transfer gamma settings\n"); ++printf("transfer gamma settings\n"); + lb043wv_spi_write_u16_array(slave, gamma_settings, + ARRAY_SIZE(gamma_settings)); + } +@@ -302,13 +302,13 @@ static int lg4573_of_to_plat(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev, + "backlight", &priv->backlight); + if (ret) { +- debug("%s: Cannot get backlight: ret=%d\n", __func__, ret); ++printf("%s: Cannot get backlight: ret=%d\n", __func__, ret); + return log_ret(ret); + } + ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable, + GPIOD_IS_OUT); + if (ret) { +- debug("%s: Warning: cannot get enable GPIO: ret=%d\n", ++printf("%s: Warning: cannot get enable GPIO: ret=%d\n", + __func__, ret); + if (ret != -ENOENT) + return log_ret(ret); +diff --git a/drivers/video/meson/meson_dw_hdmi.c b/drivers/video/meson/meson_dw_hdmi.c +index e5f281320..a7f7dc88e 100644 +--- a/drivers/video/meson/meson_dw_hdmi.c ++++ b/drivers/video/meson/meson_dw_hdmi.c +@@ -193,29 +193,29 @@ static int meson_dw_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size) + + edid_print_info((struct edid1_info *)buf); + edid_get_timing(buf, ret, &timing, &panel_bits_per_colour); +- debug("Display timing:\n"); +- debug(" hactive %04d, hfrontp %04d, hbackp %04d hsync %04d\n" ++printf("Display timing:\n"); ++printf(" hactive %04d, hfrontp %04d, hbackp %04d hsync %04d\n" + " vactive %04d, vfrontp %04d, vbackp %04d vsync %04d\n", + timing.hactive.typ, timing.hfront_porch.typ, + timing.hback_porch.typ, timing.hsync_len.typ, + timing.vactive.typ, timing.vfront_porch.typ, + timing.vback_porch.typ, timing.vsync_len.typ); +- debug(" flags: "); ++printf(" flags: "); + if (timing.flags & DISPLAY_FLAGS_INTERLACED) +- debug("interlaced "); ++printf("interlaced "); + if (timing.flags & DISPLAY_FLAGS_DOUBLESCAN) +- debug("doublescan "); ++printf("doublescan "); + if (timing.flags & DISPLAY_FLAGS_DOUBLECLK) +- debug("doubleclk "); ++printf("doubleclk "); + if (timing.flags & DISPLAY_FLAGS_HSYNC_LOW) +- debug("hsync_low "); ++printf("hsync_low "); + if (timing.flags & DISPLAY_FLAGS_HSYNC_HIGH) +- debug("hsync_high "); ++printf("hsync_high "); + if (timing.flags & DISPLAY_FLAGS_VSYNC_LOW) +- debug("vsync_low "); ++printf("vsync_low "); + if (timing.flags & DISPLAY_FLAGS_VSYNC_HIGH) +- debug("vsync_high "); +- debug("\n"); ++printf("vsync_high "); ++printf("\n"); + #endif + + return ret; +@@ -473,7 +473,7 @@ static int meson_dw_hdmi_probe(struct udevice *dev) + /* wait for connector */ + ret = meson_dw_hdmi_wait_hpd(&priv->hdmi); + if (ret) +- debug("hdmi can not get hpd signal\n"); ++printf("hdmi can not get hpd signal\n"); + + return ret; + } +diff --git a/drivers/video/meson/meson_vclk.c b/drivers/video/meson/meson_vclk.c +index cd1e69040..694a0c8b9 100644 +--- a/drivers/video/meson/meson_vclk.c ++++ b/drivers/video/meson/meson_vclk.c +@@ -637,7 +637,7 @@ static bool meson_hdmi_pll_find_params(struct meson_vpu_priv *priv, + continue; + *frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od); + +- debug("PLL params for %dkHz: m=%x frac=%x od=%d\n", ++printf("PLL params for %dkHz: m=%x frac=%x od=%d\n", + freq, *m, *frac, *od); + + if (meson_hdmi_pll_validate_params(priv, *m, *frac)) +@@ -678,7 +678,7 @@ static void meson_hdmi_pll_generic_set(struct meson_vpu_priv *priv, + od1 = od / od2; + } + +- debug("PLL params for %dkHz: m=%x frac=%x od=%d/%d/%d\n", ++printf("PLL params for %dkHz: m=%x frac=%x od=%d/%d/%d\n", + pll_freq, m, frac, od1, od2, od3); + + meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); +diff --git a/drivers/video/meson/meson_venc.c b/drivers/video/meson/meson_venc.c +index e7366dd2f..10ed5a954 100644 +--- a/drivers/video/meson/meson_venc.c ++++ b/drivers/video/meson/meson_venc.c +@@ -794,7 +794,7 @@ static void meson_venc_hdmi_mode_set(struct meson_vpu_priv *priv, + vmode = &vmode_dmt; + use_enci = false; + +- debug(" max_pxcnt %04d, max_lncnt %04d\n" ++printf(" max_pxcnt %04d, max_lncnt %04d\n" + " havon_begin %04d, havon_end %04d\n" + " vavon_bline %04d, vavon_eline %04d\n" + " hso_begin %04d, hso_end %04d\n" +@@ -851,7 +851,7 @@ static void meson_venc_hdmi_mode_set(struct meson_vpu_priv *priv, + writel(0, priv->io_base + _REG(ENCI_VIDEO_EN)); + writel(0, priv->io_base + _REG(ENCP_VIDEO_EN)); + +- debug("use_enci: %d, hdmi_repeat: %d\n", use_enci, hdmi_repeat); ++printf("use_enci: %d, hdmi_repeat: %d\n", use_enci, hdmi_repeat); + + if (use_enci) { + unsigned int lines_f0; +diff --git a/drivers/video/meson/meson_vpu.c b/drivers/video/meson/meson_vpu.c +index 67d4ce7b3..46f9ea823 100644 +--- a/drivers/video/meson/meson_vpu.c ++++ b/drivers/video/meson/meson_vpu.c +@@ -53,7 +53,7 @@ static int meson_vpu_setup_mode(struct udevice *dev, struct udevice *disp) + if (disp) { + ret = display_read_timing(disp, &timing); + if (ret) { +- debug("%s: Failed to read timings\n", __func__); ++printf("%s: Failed to read timings\n", __func__); + goto cvbs; + } + +diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c +index 9b42ca8d0..e8de2c397 100644 +--- a/drivers/video/mx3fb.c ++++ b/drivers/video/mx3fb.c +@@ -366,7 +366,7 @@ static int sdc_init_panel(u16 width, u16 height, + uint32_t old_conf; + int clock; + +- debug("%s(width=%d, height=%d)\n", __func__, width, height); ++printf("%s(width=%d, height=%d)\n", __func__, width, height); + + /* Init clocking, the IPU receives its clock from the hsp divder */ + clock = mxc_get_clock(MXC_IPU_CLK); +@@ -422,7 +422,7 @@ static int sdc_init_panel(u16 width, u16 height, + * 16*1024*128*476837 = 0.9999996682e12 + */ + div = ((clock/1024) * (mode->pixclock/128)) / 476837; +- debug("hsp_clk is %d, div=%d\n", clock, div); ++printf("hsp_clk is %d, div=%d\n", clock, div); + /* coerce to not less than 4.0, not more than 255.9375 */ + if (div < 0x40) + div = 0x40; +@@ -448,11 +448,11 @@ static int sdc_init_panel(u16 width, u16 height, + writel(readl(DI_DISP_ACC_CC) | + ((fmt_cfg[di_setup].acc - 1) << 12), DI_DISP_ACC_CC); + +- debug("DI_DISP_IF_CONF = 0x%08X\n", readl(DI_DISP_IF_CONF)); +- debug("DI_DISP_SIG_POL = 0x%08X\n", readl(DI_DISP_SIG_POL)); +- debug("DI_DISP3_TIME_CONF = 0x%08X\n", readl(DI_DISP3_TIME_CONF)); +- debug("SDC_HOR_CONF = 0x%08X\n", readl(SDC_HOR_CONF)); +- debug("SDC_VER_CONF = 0x%08X\n", readl(SDC_VER_CONF)); ++printf("DI_DISP_IF_CONF = 0x%08X\n", readl(DI_DISP_IF_CONF)); ++printf("DI_DISP_SIG_POL = 0x%08X\n", readl(DI_DISP_SIG_POL)); ++printf("DI_DISP3_TIME_CONF = 0x%08X\n", readl(DI_DISP3_TIME_CONF)); ++printf("SDC_HOR_CONF = 0x%08X\n", readl(SDC_HOR_CONF)); ++printf("SDC_VER_CONF = 0x%08X\n", readl(SDC_VER_CONF)); + + return 0; + } +@@ -461,7 +461,7 @@ static void ipu_ch_param_set_size(union chan_param_mem *params, + uint pixelfmt, uint16_t width, + uint16_t height, uint16_t stride) + { +- debug("%s(pixelfmt=%d, width=%d, height=%d, stride=%d)\n", ++printf("%s(pixelfmt=%d, width=%d, height=%d, stride=%d)\n", + __func__, pixelfmt, width, height, stride); + + params->pp.fw = width - 1; +@@ -540,7 +540,7 @@ static void ipu_init_channel_buffer(enum ipu_channel channel, void *fbmem) + + stride_bytes = (panel.plnSizeX * panel.gdfBytesPP + 3) & ~3; + +- debug("%s(channel=%d, fbmem=%p)\n", __func__, channel, fbmem); ++printf("%s(channel=%d, fbmem=%p)\n", __func__, channel, fbmem); + + /* Build parameter memory data for DMA channel */ + ipu_ch_param_set_size(¶ms, panel.gdfIndex, +@@ -685,7 +685,7 @@ static void ll_disp3_enable(void *base) + { + u32 reg; + +- debug("%s(base=0x%x)\n", __func__, (u32) base); ++printf("%s(base=0x%x)\n", __func__, (u32) base); + /* pcm037.c::mxc_board_init() */ + + /* Display Interface #3 */ +@@ -775,7 +775,7 @@ static void ll_disp3_enable(void *base) + * Linux driver calls sdc_set_brightness() here again, + * once is enough for us + */ +- debug("%s() done\n", __func__); ++printf("%s() done\n", __func__); + } + + /* ------------------------ public part ------------------- */ +@@ -886,7 +886,7 @@ void *video_hw_init(void) + /* set up Hardware */ + memsize = calc_fbsize(); + +- debug("%s() allocating %d bytes\n", __func__, memsize); ++printf("%s() allocating %d bytes\n", __func__, memsize); + + /* fill in missing Graphic device struct */ + panel.frameAdrs = (u32) malloc(memsize); +@@ -899,7 +899,7 @@ void *video_hw_init(void) + ll_disp3_enable((void *) panel.frameAdrs); + memset((void *) panel.frameAdrs, 0, memsize); + +- debug("%s() done, framebuffer at 0x%x, size=%d cleared\n", ++printf("%s() done, framebuffer at 0x%x, size=%d cleared\n", + __func__, panel.frameAdrs, memsize); + + return (void *) &panel; +diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c +index 523d8a8d9..3c869c257 100644 +--- a/drivers/video/mxsfb.c ++++ b/drivers/video/mxsfb.c +@@ -90,7 +90,7 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, + + ret = clk_get_by_name(dev, "axi", &clk); + if (!ret) { +- debug("%s: Failed to get mxs axi clk: %d\n", __func__, ret); ++printf("%s: Failed to get mxs axi clk: %d\n", __func__, ret); + } else { + ret = clk_enable(&clk); + if (ret < 0) { +@@ -101,7 +101,7 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, + + ret = clk_get_by_name(dev, "disp_axi", &clk); + if (!ret) { +- debug("%s: Failed to get mxs disp_axi clk: %d\n", __func__, ret); ++printf("%s: Failed to get mxs disp_axi clk: %d\n", __func__, ret); + } else { + ret = clk_enable(&clk); + if (ret < 0) { +@@ -387,7 +387,7 @@ static int mxs_video_probe(struct udevice *dev) + u32 fb_start, fb_end; + int ret; + +- debug("%s() plat: base 0x%lx, size 0x%x\n", ++printf("%s() plat: base 0x%lx, size 0x%x\n", + __func__, plat->base, plat->size); + + ret = mxs_of_get_timings(dev, &timings, &bpp); +diff --git a/drivers/video/nexell/s5pxx18_dp.c b/drivers/video/nexell/s5pxx18_dp.c +index 2248f4790..f9aafef8a 100644 +--- a/drivers/video/nexell/s5pxx18_dp.c ++++ b/drivers/video/nexell/s5pxx18_dp.c +@@ -66,7 +66,7 @@ int dp_control_setup(int module, + int rgb_mode = 0; + + if (NULL == sync || NULL == ctrl) { +- debug("error, dp.%d not set sync or pad clock info !!!\n", ++printf("error, dp.%d not set sync or pad clock info !!!\n", + module); + return -EINVAL; + } +@@ -164,19 +164,19 @@ int dp_control_setup(int module, + padclk_clk); + } + +- debug("%s: dp.%d x:%4d, hf:%3d, hb:%3d, hs:%3d, hi=%d\n", ++printf("%s: dp.%d x:%4d, hf:%3d, hb:%3d, hs:%3d, hi=%d\n", + __func__, module, sync->h_active_len, sync->h_front_porch, + sync->h_back_porch, sync->h_sync_width, sync->h_sync_invert); +- debug("%s: dp.%d y:%4d, vf:%3d, vb:%3d, vs:%3d, vi=%d\n", ++printf("%s: dp.%d y:%4d, vf:%3d, vb:%3d, vs:%3d, vi=%d\n", + __func__, module, sync->v_active_len, sync->v_front_porch, + sync->v_back_porch, sync->v_sync_width, sync->h_sync_invert); +- debug("%s: dp.%d ck.0:%d:%d:%d, ck.1:%d:%d:%d\n", ++printf("%s: dp.%d ck.0:%d:%d:%d, ck.1:%d:%d:%d\n", + __func__, module, + ctrl->clk_src_lv0, ctrl->clk_div_lv0, ctrl->clk_inv_lv0, + ctrl->clk_src_lv1, ctrl->clk_div_lv1, ctrl->clk_inv_lv1); +- debug("%s: dp.%d vs:%d, ve:%d, es:%d, ee:%d\n", ++printf("%s: dp.%d vs:%d, ve:%d, es:%d, ee:%d\n", + __func__, module, v_vso, v_veo, e_vso, e_veo); +- debug("%s: dp.%d delay RGB:%d, hs:%d, vs:%d, de:%d, fmt:0x%x\n", ++printf("%s: dp.%d delay RGB:%d, hs:%d, vs:%d, de:%d, fmt:0x%x\n", + __func__, module, rgb_pvd, hsync_cp1, vsync_fram, de_cp2, + out_format); + +@@ -185,7 +185,7 @@ int dp_control_setup(int module, + + void dp_control_enable(int module, int on) + { +- debug("%s: dp.%d top %s\n", __func__, module, on ? "ON" : "OFF"); ++printf("%s: dp.%d top %s\n", __func__, module, on ? "ON" : "OFF"); + + nx_dpc_set_dpc_enable(module, on); + nx_dpc_set_clock_divisor_enable(module, on); +@@ -221,7 +221,7 @@ int dp_plane_screen_setup(int module, struct dp_plane_top *top) + nx_mlc_set_top_power_mode(module, 1); + nx_mlc_set_top_sleep_mode(module, 0); + +- debug("%s: dp.%d screen %dx%d, %s, priority:%d, bg:0x%x\n", ++printf("%s: dp.%d screen %dx%d, %s, priority:%d, bg:0x%x\n", + __func__, module, width, height, + interlace ? "Interlace" : "Progressive", + video_prior, bg_color); +@@ -234,7 +234,7 @@ void dp_plane_screen_enable(int module, int on) + /* enable top screen */ + nx_mlc_set_mlc_enable(module, on); + nx_mlc_set_top_dirty_flag(module); +- debug("%s: dp.%d top %s\n", __func__, module, on ? "ON" : "OFF"); ++printf("%s: dp.%d top %s\n", __func__, module, on ? "ON" : "OFF"); + } + + int dp_plane_layer_setup(int module, struct dp_plane_info *plane) +@@ -264,10 +264,10 @@ int dp_plane_layer_setup(int module, struct dp_plane_info *plane) + plane->width * pixel_byte); + nx_mlc_set_rgblayer_address(module, layer, plane->fb_base); + +- debug("%s: dp.%d.%d %d * %d, %dbpp, fmt:0x%x\n", ++printf("%s: dp.%d.%d %d * %d, %dbpp, fmt:0x%x\n", + __func__, module, layer, plane->width, plane->height, + pixel_byte * 8, format); +- debug("%s: b:0x%x, l:%d, t:%d, r:%d, b:%d, hs:%d, vs:%d\n", ++printf("%s: b:0x%x, l:%d, t:%d, r:%d, b:%d, hs:%d, vs:%d\n", + __func__, plane->fb_base, sx, sy, ex, ey, + plane->width * pixel_byte, pixel_byte); + +@@ -279,7 +279,7 @@ int dp_plane_set_enable(int module, int layer, int on) + int hl, hc; + int vl, vc; + +- debug("%s: dp.%d.%d %s:%s\n", ++printf("%s: dp.%d.%d %s:%s\n", + __func__, module, layer, + layer == MLC_LAYER_VIDEO ? "Video" : "RGB", + on ? "ON" : "OFF"); +diff --git a/drivers/video/nexell/s5pxx18_dp_hdmi.c b/drivers/video/nexell/s5pxx18_dp_hdmi.c +index 3f1fb8a57..119c82ee7 100644 +--- a/drivers/video/nexell/s5pxx18_dp_hdmi.c ++++ b/drivers/video/nexell/s5pxx18_dp_hdmi.c +@@ -95,7 +95,7 @@ static int hdmi_phy_enable(int preset, int enable) + nx_hdmi_set_reg(0, HDMI_PHY_REG7C, 0x80); + nx_hdmi_set_reg(0, HDMI_PHY_REG7C, (1 << 7)); + nx_hdmi_set_reg(0, HDMI_PHY_REG7C, (1 << 7)); +- debug("%s: preset = %d\n", __func__, preset); ++printf("%s: preset = %d\n", __func__, preset); + + return 0; + } +@@ -174,7 +174,7 @@ static inline int hdmi_get_vsync(int preset, + ctrl->ev_start_offset = (sync->h_front_porch + sync->h_sync_width + + sync->h_back_porch + sync->h_active_len - 1); + ctrl->ev_end_offset = 0; +- debug("%s: preset: %d\n", __func__, preset); ++printf("%s: preset: %d\n", __func__, preset); + + return 0; + } +@@ -500,7 +500,7 @@ void nx_hdmi_display(int module, + int preset = dev->preset; + int i = 0; + +- debug("HDMI: display.%d\n", module); ++printf("HDMI: display.%d\n", module); + + switch (preset) { + case 0: +diff --git a/drivers/video/nexell/s5pxx18_dp_mipi.c b/drivers/video/nexell/s5pxx18_dp_mipi.c +index 670272b26..837a05db2 100644 +--- a/drivers/video/nexell/s5pxx18_dp_mipi.c ++++ b/drivers/video/nexell/s5pxx18_dp_mipi.c +@@ -220,7 +220,7 @@ static int mipi_prepare(int module, int input, + if (ret < 0) + return ret; + +- debug("%s: mipi lp:%dmhz:0x%x:0x%x, hs:%dmhz:0x%x:0x%x, %s trans\n", ++printf("%s: mipi lp:%dmhz:0x%x:0x%x, hs:%dmhz:0x%x:0x%x, %s trans\n", + __func__, mipi->lp_bitrate, mipi->lp_pllpms, mipi->lp_bandctl, + mipi->hs_bitrate, mipi->hs_pllpms, mipi->hs_bandctl, + lpm ? "low" : "high"); +@@ -292,7 +292,7 @@ static int mipi_enable(int module, int input, + en_prescaler = 0; + #endif + +- debug("%s: mode:%s, lanes.%d\n", __func__, ++printf("%s: mode:%s, lanes.%d\n", __func__, + command_mode ? "command" : "video", data_len + 1); + + if (lpm) +diff --git a/drivers/video/nexell_display.c b/drivers/video/nexell_display.c +index c7621ef49..4dea80bad 100644 +--- a/drivers/video/nexell_display.c ++++ b/drivers/video/nexell_display.c +@@ -56,11 +56,11 @@ static void nx_display_parse_dp_sync(ofnode node, struct dp_sync_info *sync) + sync->v_sync_invert = ofnode_read_s32_default(node, "v_sync_invert", 0); + sync->pixel_clock_hz = ofnode_read_s32_default(node, "pixel_clock_hz", 0); + +- debug("DP: sync ->\n"); +- debug("ha:%d, hs:%d, hb:%d, hf:%d, hi:%d\n", ++printf("DP: sync ->\n"); ++printf("ha:%d, hs:%d, hb:%d, hf:%d, hi:%d\n", + sync->h_active_len, sync->h_sync_width, + sync->h_back_porch, sync->h_front_porch, sync->h_sync_invert); +- debug("va:%d, vs:%d, vb:%d, vf:%d, vi:%d\n", ++printf("va:%d, vs:%d, vb:%d, vf:%d, vi:%d\n", + sync->v_active_len, sync->v_sync_width, + sync->v_back_porch, sync->v_front_porch, sync->v_sync_invert); + } +@@ -105,21 +105,21 @@ static void nx_display_parse_dp_ctrl(ofnode node, struct dp_ctrl_info *ctrl) + ctrl->clk_delay_lv1 = ofnode_read_s32_default(node, "clk_delay_lv1", 0); + ctrl->clk_sel_div1 = ofnode_read_s32_default(node, "clk_sel_div1", 0); + +- debug("DP: ctrl [%s] ->\n", ++printf("DP: ctrl [%s] ->\n", + ctrl->interlace ? "Interlace" : " Progressive"); +- debug("cs0:%d, cd0:%d, cs1:%d, cd1:%d\n", ++printf("cs0:%d, cd0:%d, cs1:%d, cd1:%d\n", + ctrl->clk_src_lv0, ctrl->clk_div_lv0, + ctrl->clk_src_lv1, ctrl->clk_div_lv1); +- debug("fmt:0x%x, inv:%d, swap:%d, yb:0x%x\n", ++printf("fmt:0x%x, inv:%d, swap:%d, yb:0x%x\n", + ctrl->out_format, ctrl->invert_field, + ctrl->swap_RB, ctrl->yc_order); +- debug("dm:0x%x, drp:%d, dhs:%d, dvs:%d, dde:0x%x\n", ++printf("dm:0x%x, drp:%d, dhs:%d, dvs:%d, dde:0x%x\n", + ctrl->delay_mask, ctrl->d_rgb_pvd, + ctrl->d_hsync_cp1, ctrl->d_vsync_fram, ctrl->d_de_cp2); +- debug("vss:%d, vse:%d, evs:%d, eve:%d\n", ++printf("vss:%d, vse:%d, evs:%d, eve:%d\n", + ctrl->vs_start_offset, ctrl->vs_end_offset, + ctrl->ev_start_offset, ctrl->ev_end_offset); +- debug("sel:%d, i0:%d, d0:%d, i1:%d, d1:%d, s1:%d\n", ++printf("sel:%d, i0:%d, d0:%d, i1:%d, d1:%d, s1:%d\n", + ctrl->vck_select, ctrl->clk_inv_lv0, ctrl->clk_delay_lv0, + ctrl->clk_inv_lv1, ctrl->clk_delay_lv1, ctrl->clk_sel_div1); + } +@@ -133,9 +133,9 @@ static void nx_display_parse_dp_top_layer(ofnode node, struct dp_plane_top *top) + top->back_color = ofnode_read_s32_default(node, "back_color", 0); + top->plane_num = DP_PLANS_NUM; + +- debug("DP: top [%s] ->\n", ++printf("DP: top [%s] ->\n", + top->interlace ? "Interlace" : " Progressive"); +- debug("w:%d, h:%d, prior:%d, bg:0x%x\n", ++printf("w:%d, h:%d, prior:%d, bg:0x%x\n", + top->screen_width, top->screen_height, + top->video_prior, top->back_color); + } +@@ -165,8 +165,8 @@ static void nx_display_parse_dp_layer(ofnode node, struct dp_plane_info *plane) + return; + } + +- debug("DP: plane.%d [0x%x] ->\n", plane->layer, plane->fb_base); +- debug("f:0x%x, l:%d, t:%d, %d * %d, bpp:%d, a:%d(%d), t:%d(0x%x)\n", ++printf("DP: plane.%d [0x%x] ->\n", plane->layer, plane->fb_base); ++printf("f:0x%x, l:%d, t:%d, %d * %d, bpp:%d, a:%d(%d), t:%d(0x%x)\n", + plane->format, plane->left, plane->top, plane->width, + plane->height, plane->pixel_byte, plane->alpha_on, + plane->alpha_depth, plane->tp_on, plane->tp_color); +@@ -192,7 +192,7 @@ static void nx_display_parse_dp_planes(ofnode node, + if (strcmp(name, "layer_0") == 0) { + dp->planes[0].fb_base = + (uint)map_sysmem(plat->base, plat->size); +- debug("%s(): dp->planes[0].fb_base == 0x%x\n", __func__, ++printf("%s(): dp->planes[0].fb_base == 0x%x\n", __func__, + (uint)dp->planes[0].fb_base); + nx_display_parse_dp_layer(subnode, &dp->planes[0]); + } +@@ -200,7 +200,7 @@ static void nx_display_parse_dp_planes(ofnode node, + if (strcmp(name, "layer_1") == 0) { + dp->planes[1].fb_base = + (uint)map_sysmem(plat->base, plat->size); +- debug("%s(): dp->planes[1].fb_base == 0x%x\n", __func__, ++printf("%s(): dp->planes[1].fb_base == 0x%x\n", __func__, + (uint)dp->planes[1].fb_base); + nx_display_parse_dp_layer(subnode, &dp->planes[1]); + } +@@ -208,7 +208,7 @@ static void nx_display_parse_dp_planes(ofnode node, + if (strcmp(name, "layer_2") == 0) { + dp->planes[2].fb_base = + (uint)map_sysmem(plat->base, plat->size); +- debug("%s(): dp->planes[2].fb_base == 0x%x\n", __func__, ++printf("%s(): dp->planes[2].fb_base == 0x%x\n", __func__, + (uint)dp->planes[2].fb_base); + nx_display_parse_dp_layer(subnode, &dp->planes[2]); + } +@@ -236,11 +236,11 @@ static int nx_display_parse_dp_lvds(ofnode node, struct nx_display_dev *dp) + if (!dev->voltage_level) + dev->voltage_level = DEF_VOLTAGE_LEVEL; + +- debug("DP: LVDS -> %s, voltage LV:0x%x\n", ++printf("DP: LVDS -> %s, voltage LV:0x%x\n", + dev->lvds_format == DP_LVDS_FORMAT_VESA ? "VESA" : + dev->lvds_format == DP_LVDS_FORMAT_JEIDA ? "JEIDA" : "LOC", + dev->voltage_level); +- debug("pol inv hs:%d, vs:%d, de:%d, ck:%d\n", ++printf("pol inv hs:%d, vs:%d, de:%d, ck:%d\n", + dev->pol_inv_hs, dev->pol_inv_vs, + dev->pol_inv_de, dev->pol_inv_ck); + +@@ -259,7 +259,7 @@ static int nx_display_parse_dp_rgb(ofnode node, struct nx_display_dev *dp) + + dev->lcd_mpu_type = ofnode_read_s32_default(node, "lcd_mpu_type", 0); + +- debug("DP: RGB -> MPU[%s]\n", dev->lcd_mpu_type ? "O" : "X"); ++printf("DP: RGB -> MPU[%s]\n", dev->lcd_mpu_type ? "O" : "X"); + return 0; + } + +@@ -278,8 +278,8 @@ static int nx_display_parse_dp_mipi(ofnode node, struct nx_display_dev *dp) + dev->lpm_trans = 1; + dev->command_mode = 0; + +- debug("DP: MIPI ->\n"); +- debug("lp:%dmhz, hs:%dmhz\n", dev->lp_bitrate, dev->hs_bitrate); ++printf("DP: MIPI ->\n"); ++printf("lp:%dmhz, hs:%dmhz\n", dev->lp_bitrate, dev->hs_bitrate); + + return 0; + } +@@ -296,7 +296,7 @@ static int nx_display_parse_dp_hdmi(ofnode node, struct nx_display_dev *dp) + + dev->preset = ofnode_read_s32_default(node, "preset", 0); + +- debug("DP: HDMI -> %d\n", dev->preset); ++printf("DP: HDMI -> %d\n", dev->preset); + + return 0; + } +@@ -396,23 +396,23 @@ static struct nx_display_dev *nx_display_setup(void) + struct udevice *dev; + + /* call driver probe */ +- debug("DT: uclass device call...\n"); ++printf("DT: uclass device call...\n"); + + ret = uclass_get_device(UCLASS_VIDEO, 0, &dev); + if (ret) { +- debug("%s(): uclass_get_device(UCLASS_VIDEO, 0, &dev) != 0 --> return NULL\n", ++printf("%s(): uclass_get_device(UCLASS_VIDEO, 0, &dev) != 0 --> return NULL\n", + __func__); + return NULL; + } + plat = dev_get_uclass_plat(dev); + if (!dev) { +- debug("%s(): dev_get_uclass_plat(dev) == NULL --> return NULL\n", ++printf("%s(): dev_get_uclass_plat(dev) == NULL --> return NULL\n", + __func__); + return NULL; + } + dp = dev_get_priv(dev); + if (!dp) { +- debug("%s(): dev_get_priv(dev) == NULL --> return NULL\n", ++printf("%s(): dev_get_priv(dev) == NULL --> return NULL\n", + __func__); + return NULL; + } +@@ -540,25 +540,25 @@ static int nx_display_probe(struct udevice *dev) + static GraphicDevice *graphic_device; + char addr[64]; + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + if (!dev) + return -EINVAL; + + if (!uc_plat) { +- debug("%s(): video_uc_plat *plat == NULL --> return -EINVAL\n", ++printf("%s(): video_uc_plat *plat == NULL --> return -EINVAL\n", + __func__); + return -EINVAL; + } + + if (!uc_priv) { +- debug("%s(): video_priv *uc_priv == NULL --> return -EINVAL\n", ++printf("%s(): video_priv *uc_priv == NULL --> return -EINVAL\n", + __func__); + return -EINVAL; + } + + if (!plat) { +- debug("%s(): nx_display_plat *plat == NULL --> return -EINVAL\n", ++printf("%s(): nx_display_plat *plat == NULL --> return -EINVAL\n", + __func__); + return -EINVAL; + } +@@ -568,7 +568,7 @@ static int nx_display_probe(struct udevice *dev) + + dp = nx_display_setup(); + if (!dp) { +- debug("%s(): nx_display_setup() == 0 --> return -EINVAL\n", ++printf("%s(): nx_display_setup() == 0 --> return -EINVAL\n", + __func__); + return -EINVAL; + } +@@ -611,7 +611,7 @@ static int nx_display_probe(struct udevice *dev) + * called when CONFIG_VIDEO is set (and not if CONFIG_DM_VIDEO is set). + */ + sprintf(addr, "0x%x", dp->fb_addr); +- debug("%s(): env_set(\"fb_addr\", %s) ...\n", __func__, addr); ++printf("%s(): env_set(\"fb_addr\", %s) ...\n", __func__, addr); + env_set("fb_addr", addr); + + return 0; +@@ -621,7 +621,7 @@ static int nx_display_bind(struct udevice *dev) + { + struct video_uc_plat *plat = dev_get_uclass_plat(dev); + +- debug("%s()\n", __func__); ++printf("%s()\n", __func__); + + /* Datasheet S5p4418: + * Resolution up to 2048 x 1280, up to 12 Bit per color (HDMI) +diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c +index 67f526616..6aa20cb0c 100644 +--- a/drivers/video/pxa_lcd.c ++++ b/drivers/video/pxa_lcd.c +@@ -418,7 +418,7 @@ static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid) + fbi->palette_size = NBITS(vid->vl_bpix) == 8 ? 256 : 16; + palette_mem_size = fbi->palette_size * sizeof(u16); + +- debug("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size); ++printf("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size); + /* locate palette and descs at end of page following fb */ + fbi->palette = (u_long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size; + +@@ -440,7 +440,7 @@ static void pxafb_setup_gpio (vidinfo_t *vid) + /* 4 bit interface */ + if ((lccr0 & LCCR0_CMS) && (lccr0 & LCCR0_SDS) && !(lccr0 & LCCR0_DPD)) + { +- debug("Setting GPIO for 4 bit data\n"); ++printf("Setting GPIO for 4 bit data\n"); + /* bits 58-61 */ + writel(readl(GPDR1) | (0xf << 26), GPDR1); + writel((readl(GAFR1_U) & ~(0xff << 20)) | (0xaa << 20), +@@ -456,7 +456,7 @@ static void pxafb_setup_gpio (vidinfo_t *vid) + else if (((lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_DPD))) || + (!(lccr0 & LCCR0_CMS) && !(lccr0 & LCCR0_PAS) && !(lccr0 & LCCR0_SDS))) + { +- debug("Setting GPIO for 8 bit data\n"); ++printf("Setting GPIO for 8 bit data\n"); + /* bits 58-65 */ + writel(readl(GPDR1) | (0x3f << 26), GPDR1); + writel(readl(GPDR2) | (0x3), GPDR2); +@@ -474,7 +474,7 @@ static void pxafb_setup_gpio (vidinfo_t *vid) + /* 16 bit interface */ + else if (!(lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_PAS))) + { +- debug("Setting GPIO for 16 bit data\n"); ++printf("Setting GPIO for 16 bit data\n"); + /* bits 58-77 */ + writel(readl(GPDR1) | (0x3f << 26), GPDR1); + writel(readl(GPDR2) | 0x00003fff, GPDR2); +@@ -492,7 +492,7 @@ static void pxafb_setup_gpio (vidinfo_t *vid) + + static void pxafb_enable_controller (vidinfo_t *vid) + { +- debug("Enabling LCD controller\n"); ++printf("Enabling LCD controller\n"); + + /* Sequence from 11.7.10 */ + writel(vid->pxa.reg_lccr3, LCCR3); +@@ -509,27 +509,27 @@ static void pxafb_enable_controller (vidinfo_t *vid) + writel(readl(CKEN) | CKEN16_LCD, CKEN); + #endif + +- debug("FDADR0 = 0x%08x\n", readl(FDADR0)); +- debug("FDADR1 = 0x%08x\n", readl(FDADR1)); +- debug("LCCR0 = 0x%08x\n", readl(LCCR0)); +- debug("LCCR1 = 0x%08x\n", readl(LCCR1)); +- debug("LCCR2 = 0x%08x\n", readl(LCCR2)); +- debug("LCCR3 = 0x%08x\n", readl(LCCR3)); ++printf("FDADR0 = 0x%08x\n", readl(FDADR0)); ++printf("FDADR1 = 0x%08x\n", readl(FDADR1)); ++printf("LCCR0 = 0x%08x\n", readl(LCCR0)); ++printf("LCCR1 = 0x%08x\n", readl(LCCR1)); ++printf("LCCR2 = 0x%08x\n", readl(LCCR2)); ++printf("LCCR3 = 0x%08x\n", readl(LCCR3)); + } + + static int pxafb_init (vidinfo_t *vid) + { + struct pxafb_info *fbi = &vid->pxa; + +- debug("Configuring PXA LCD\n"); ++printf("Configuring PXA LCD\n"); + + fbi->reg_lccr0 = REG_LCCR0; + fbi->reg_lccr3 = REG_LCCR3; + +- debug("vid: vl_col=%d hslen=%d lm=%d rm=%d\n", ++printf("vid: vl_col=%d hslen=%d lm=%d rm=%d\n", + vid->vl_col, vid->vl_hpw, + vid->vl_blw, vid->vl_elw); +- debug("vid: vl_row=%d vslen=%d um=%d bm=%d\n", ++printf("vid: vl_row=%d vslen=%d um=%d bm=%d\n", + vid->vl_row, vid->vl_vpw, + vid->vl_bfw, vid->vl_efw); + +@@ -590,21 +590,21 @@ static int pxafb_init (vidinfo_t *vid) + fbi->fdadr0 = (u_long)fbi->dmadesc_fbhigh; /* no pal just fbhigh */ + } + +- debug("fbi->dmadesc_fblow = 0x%lx\n", (u_long)fbi->dmadesc_fblow); +- debug("fbi->dmadesc_fbhigh = 0x%lx\n", (u_long)fbi->dmadesc_fbhigh); +- debug("fbi->dmadesc_palette = 0x%lx\n", (u_long)fbi->dmadesc_palette); ++printf("fbi->dmadesc_fblow = 0x%lx\n", (u_long)fbi->dmadesc_fblow); ++printf("fbi->dmadesc_fbhigh = 0x%lx\n", (u_long)fbi->dmadesc_fbhigh); ++printf("fbi->dmadesc_palette = 0x%lx\n", (u_long)fbi->dmadesc_palette); + +- debug("fbi->dmadesc_fblow->fdadr = 0x%lx\n", fbi->dmadesc_fblow->fdadr); +- debug("fbi->dmadesc_fbhigh->fdadr = 0x%lx\n", fbi->dmadesc_fbhigh->fdadr); +- debug("fbi->dmadesc_palette->fdadr = 0x%lx\n", fbi->dmadesc_palette->fdadr); ++printf("fbi->dmadesc_fblow->fdadr = 0x%lx\n", fbi->dmadesc_fblow->fdadr); ++printf("fbi->dmadesc_fbhigh->fdadr = 0x%lx\n", fbi->dmadesc_fbhigh->fdadr); ++printf("fbi->dmadesc_palette->fdadr = 0x%lx\n", fbi->dmadesc_palette->fdadr); + +- debug("fbi->dmadesc_fblow->fsadr = 0x%lx\n", fbi->dmadesc_fblow->fsadr); +- debug("fbi->dmadesc_fbhigh->fsadr = 0x%lx\n", fbi->dmadesc_fbhigh->fsadr); +- debug("fbi->dmadesc_palette->fsadr = 0x%lx\n", fbi->dmadesc_palette->fsadr); ++printf("fbi->dmadesc_fblow->fsadr = 0x%lx\n", fbi->dmadesc_fblow->fsadr); ++printf("fbi->dmadesc_fbhigh->fsadr = 0x%lx\n", fbi->dmadesc_fbhigh->fsadr); ++printf("fbi->dmadesc_palette->fsadr = 0x%lx\n", fbi->dmadesc_palette->fsadr); + +- debug("fbi->dmadesc_fblow->ldcmd = 0x%lx\n", fbi->dmadesc_fblow->ldcmd); +- debug("fbi->dmadesc_fbhigh->ldcmd = 0x%lx\n", fbi->dmadesc_fbhigh->ldcmd); +- debug("fbi->dmadesc_palette->ldcmd = 0x%lx\n", fbi->dmadesc_palette->ldcmd); ++printf("fbi->dmadesc_fblow->ldcmd = 0x%lx\n", fbi->dmadesc_fblow->ldcmd); ++printf("fbi->dmadesc_fbhigh->ldcmd = 0x%lx\n", fbi->dmadesc_fbhigh->ldcmd); ++printf("fbi->dmadesc_palette->ldcmd = 0x%lx\n", fbi->dmadesc_palette->ldcmd); + + return 0; + } +diff --git a/drivers/video/rockchip/rk3288_hdmi.c b/drivers/video/rockchip/rk3288_hdmi.c +index 327ae7871..5b26be09b 100644 +--- a/drivers/video/rockchip/rk3288_hdmi.c ++++ b/drivers/video/rockchip/rk3288_hdmi.c +@@ -72,7 +72,7 @@ static int rk3288_clk_config(struct udevice *dev) + clk_free(&clk); + } + if (ret < 0) { +- debug("%s: Failed to set clock in source device '%s': ret=%d\n", ++printf("%s: Failed to set clock in source device '%s': ret=%d\n", + __func__, uc_plat->src_dev->name, ret); + return ret; + } +diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c +index 7e48dd834..0ecf2b953 100644 +--- a/drivers/video/rockchip/rk3288_mipi.c ++++ b/drivers/video/rockchip/rk3288_mipi.c +@@ -46,7 +46,7 @@ static int rk_mipi_dsi_source_select(struct udevice *dev) + << RK3288_DSI0_LCDC_SEL_SHIFT); + break; + default: +- debug("%s: Invalid VOP id\n", __func__); ++printf("%s: Invalid VOP id\n", __func__); + return -EINVAL; + } + +@@ -105,7 +105,7 @@ static int rk_mipi_enable(struct udevice *dev, int panel_bpp, + /* Config and enable mipi dsi according to timing */ + ret = rk_mipi_dsi_enable(dev, timing); + if (ret) { +- debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n", ++printf("%s: rk_mipi_dsi_enable() failed (err=%d)\n", + __func__, ret); + return ret; + } +@@ -113,7 +113,7 @@ static int rk_mipi_enable(struct udevice *dev, int panel_bpp, + /* Config and enable mipi phy */ + ret = rk_mipi_phy_enable(dev); + if (ret) { +- debug("%s: rk_mipi_phy_enable() failed (err=%d)\n", ++printf("%s: rk_mipi_phy_enable() failed (err=%d)\n", + __func__, ret); + return ret; + } +@@ -121,7 +121,7 @@ static int rk_mipi_enable(struct udevice *dev, int panel_bpp, + /* Enable backlight */ + ret = panel_enable_backlight(priv->panel); + if (ret) { +- debug("%s: panel_enable_backlight() failed (err=%d)\n", ++printf("%s: panel_enable_backlight() failed (err=%d)\n", + __func__, ret); + return ret; + } +@@ -135,13 +135,13 @@ static int rk_mipi_of_to_plat(struct udevice *dev) + + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (IS_ERR_OR_NULL(priv->grf)) { +- debug("%s: Get syscon grf failed (ret=%p)\n", ++printf("%s: Get syscon grf failed (ret=%p)\n", + __func__, priv->grf); + return -ENXIO; + } + priv->regs = dev_read_addr(dev); + if (priv->regs == FDT_ADDR_T_NONE) { +- debug("%s: Get MIPI dsi address failed (ret=%lu)\n", __func__, ++printf("%s: Get MIPI dsi address failed (ret=%lu)\n", __func__, + priv->regs); + return -ENXIO; + } +@@ -161,7 +161,7 @@ static int rk_mipi_probe(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel", + &priv->panel); + if (ret) { +- debug("%s: Can not find panel (err=%d)\n", __func__, ret); ++printf("%s: Can not find panel (err=%d)\n", __func__, ret); + return ret; + } + +diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c +index 917335048..c8b4d800f 100644 +--- a/drivers/video/rockchip/rk3399_mipi.c ++++ b/drivers/video/rockchip/rk3399_mipi.c +@@ -42,7 +42,7 @@ static int rk_mipi_dsi_source_select(struct udevice *dev) + GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT); + break; + default: +- debug("%s: Invalid VOP id\n", __func__); ++printf("%s: Invalid VOP id\n", __func__); + return -EINVAL; + } + +@@ -97,7 +97,7 @@ static int rk_display_enable(struct udevice *dev, int panel_bpp, + /* Config and enable mipi dsi according to timing */ + ret = rk_mipi_dsi_enable(dev, timing); + if (ret) { +- debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n", ++printf("%s: rk_mipi_dsi_enable() failed (err=%d)\n", + __func__, ret); + return ret; + } +@@ -105,7 +105,7 @@ static int rk_display_enable(struct udevice *dev, int panel_bpp, + /* Config and enable mipi phy */ + ret = rk_mipi_phy_enable(dev); + if (ret) { +- debug("%s: rk_mipi_phy_enable() failed (err=%d)\n", ++printf("%s: rk_mipi_phy_enable() failed (err=%d)\n", + __func__, ret); + return ret; + } +@@ -113,7 +113,7 @@ static int rk_display_enable(struct udevice *dev, int panel_bpp, + /* Enable backlight */ + ret = panel_enable_backlight(priv->panel); + if (ret) { +- debug("%s: panel_enable_backlight() failed (err=%d)\n", ++printf("%s: panel_enable_backlight() failed (err=%d)\n", + __func__, ret); + return ret; + } +@@ -127,13 +127,13 @@ static int rk_mipi_of_to_plat(struct udevice *dev) + + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (IS_ERR_OR_NULL(priv->grf)) { +- debug("%s: Get syscon grf failed (ret=%p)\n", ++printf("%s: Get syscon grf failed (ret=%p)\n", + __func__, priv->grf); + return -ENXIO; + } + priv->regs = dev_read_addr(dev); + if (priv->regs == FDT_ADDR_T_NONE) { +- debug("%s: Get MIPI dsi address failed\n", __func__); ++printf("%s: Get MIPI dsi address failed\n", __func__); + return -ENXIO; + } + +@@ -152,7 +152,7 @@ static int rk_mipi_probe(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel", + &priv->panel); + if (ret) { +- debug("%s: Can not find panel (err=%d)\n", __func__, ret); ++printf("%s: Can not find panel (err=%d)\n", __func__, ret); + return ret; + } + +diff --git a/drivers/video/rockchip/rk3399_vop.c b/drivers/video/rockchip/rk3399_vop.c +index a34b49105..bfcb573cd 100644 +--- a/drivers/video/rockchip/rk3399_vop.c ++++ b/drivers/video/rockchip/rk3399_vop.c +@@ -48,7 +48,7 @@ static void rk3399_set_pin_polarity(struct udevice *dev, + break; + + default: +- debug("%s: unsupported output mode %x\n", __func__, mode); ++printf("%s: unsupported output mode %x\n", __func__, mode); + } + } + +diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c +index 0ddf5e02d..c1cbcc080 100644 +--- a/drivers/video/rockchip/rk_edp.c ++++ b/drivers/video/rockchip/rk_edp.c +@@ -212,13 +212,13 @@ static int rk_edp_start_aux_transaction(struct rk3288_edp *regs) + /* Enable AUX CH operation */ + ret = rk_edp_aux_enable(regs); + if (ret) { +- debug("AUX CH enable timeout!\n"); ++printf("AUX CH enable timeout!\n"); + return ret; + } + + /* Is AUX CH command reply received? */ + if (rk_edp_is_aux_reply(regs)) { +- debug("AUX CH command reply failed!\n"); ++printf("AUX CH command reply failed!\n"); + return ret; + } + +@@ -232,7 +232,7 @@ static int rk_edp_start_aux_transaction(struct rk3288_edp *regs) + /* Check AUX CH error access status */ + val = readl(®s->dp_int_sta); + if (val & AUX_STATUS_MASK) { +- debug("AUX CH error happens: %d\n\n", val & AUX_STATUS_MASK); ++printf("AUX CH error happens: %d\n\n", val & AUX_STATUS_MASK); + return -EIO; + } + +@@ -458,7 +458,7 @@ static void edp_get_adjust_train(const u8 *link_status, int lane_count, + this_p = rk_edp_get_adjust_request_pre_emphasis(link_status, + lane); + +- debug("requested signal parameters: lane %d voltage %s pre_emph %s\n", ++printf("requested signal parameters: lane %d voltage %s pre_emph %s\n", + lane, + voltage_names[this_v >> DP_TRAIN_VOLTAGE_SWING_SHIFT], + pre_emph_names[this_p >> DP_TRAIN_PRE_EMPHASIS_SHIFT]); +@@ -475,7 +475,7 @@ static void edp_get_adjust_train(const u8 *link_status, int lane_count, + if (p >= DP_PRE_EMPHASIS_MAX) + p |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; + +- debug("using signal parameters: voltage %s pre_emph %s\n", ++printf("using signal parameters: voltage %s pre_emph %s\n", + voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) + >> DP_TRAIN_VOLTAGE_SWING_SHIFT], + pre_emph_names[(p & DP_TRAIN_PRE_EMPHASIS_MASK) +@@ -557,7 +557,7 @@ static int rk_edp_link_train_cr(struct rk_edp_priv *edp) + printf("clock recovery failed: %d\n", clock_recovery); + return clock_recovery; + } else { +- debug("clock recovery at voltage %d pre-emphasis %d\n", ++printf("clock recovery at voltage %d pre-emphasis %d\n", + edp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, + (edp->train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) >> + DP_TRAIN_PRE_EMPHASIS_SHIFT); +@@ -610,7 +610,7 @@ static int rk_edp_link_train_ce(struct rk_edp_priv *edp) + return channel_eq; + } + +- debug("channel eq at voltage %d pre-emphasis %d\n", ++printf("channel eq at voltage %d pre-emphasis %d\n", + edp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, + (edp->train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) + >> DP_TRAIN_PRE_EMPHASIS_SHIFT); +@@ -632,20 +632,20 @@ static int rk_edp_init_training(struct rk_edp_priv *edp) + edp->link_train.link_rate = values[1]; + edp->link_train.lane_count = values[2] & DP_MAX_LANE_COUNT_MASK; + +- debug("max link rate:%d.%dGps max number of lanes:%d\n", ++printf("max link rate:%d.%dGps max number of lanes:%d\n", + edp->link_train.link_rate * 27 / 100, + edp->link_train.link_rate * 27 % 100, + edp->link_train.lane_count); + + if ((edp->link_train.link_rate != LINK_RATE_1_62GBPS) && + (edp->link_train.link_rate != LINK_RATE_2_70GBPS)) { +- debug("Rx Max Link Rate is abnormal :%x\n", ++printf("Rx Max Link Rate is abnormal :%x\n", + edp->link_train.link_rate); + return -EPERM; + } + + if (edp->link_train.lane_count == 0) { +- debug("Rx Max Lane count is abnormal :%x\n", ++printf("Rx Max Lane count is abnormal :%x\n", + edp->link_train.lane_count); + return -EPERM; + } +@@ -716,7 +716,7 @@ static int rk_edp_select_i2c_device(struct rk3288_edp *regs, + /* Start AUX transaction */ + ret = rk_edp_start_aux_transaction(regs); + if (ret != 0) { +- debug("select_i2c_device Aux Transaction fail!\n"); ++printf("select_i2c_device Aux Transaction fail!\n"); + return ret; + } + +@@ -765,7 +765,7 @@ static int rk_edp_i2c_read(struct rk3288_edp *regs, unsigned int device_addr, + if (ret == 0) { + break; + } else { +- debug("Aux Transaction fail!\n"); ++printf("Aux Transaction fail!\n"); + continue; + } + +@@ -773,7 +773,7 @@ static int rk_edp_i2c_read(struct rk3288_edp *regs, unsigned int device_addr, + val = readl(®s->aux_rx_comm); + if (val == AUX_RX_COMM_AUX_DEFER || + val == AUX_RX_COMM_I2C_DEFER) { +- debug("Defer: %d\n\n", val); ++printf("Defer: %d\n\n", val); + defer = 1; + } + } +@@ -898,7 +898,7 @@ static int rk_edp_config_video(struct rk_edp_priv *edp) + rk_edp_config_video_slave_mode(edp->regs); + + if (!rk_edp_get_pll_locked(edp->regs)) { +- debug("PLL is not locked yet.\n"); ++printf("PLL is not locked yet.\n"); + return -ETIMEDOUT; + } + +@@ -956,7 +956,7 @@ static void rockchip_edp_wait_hpd(struct rk_edp_priv *edp) + udelay(100); + } while (get_timer(start) < 200); + +- debug("do not get hpd single, force hpd\n"); ++printf("do not get hpd single, force hpd\n"); + rockchip_edp_force_hpd(edp); + } + +@@ -980,7 +980,7 @@ static int rk_edp_enable(struct udevice *dev, int panel_bpp, + } + ret = panel_enable_backlight(priv->panel); + if (ret) { +- debug("%s: backlight error: %d\n", __func__, ret); ++printf("%s: backlight error: %d\n", __func__, ret); + return ret; + } + +@@ -998,7 +998,7 @@ static int rk_edp_read_edid(struct udevice *dev, u8 *buf, int buf_size) + ret = rk_edp_i2c_read(priv->regs, EDID_ADDR, EDID_HEADER, + EDID_LENGTH, &buf[EDID_HEADER]); + if (ret) { +- debug("EDID read failed\n"); ++printf("EDID read failed\n"); + continue; + } + +@@ -1012,7 +1012,7 @@ static int rk_edp_read_edid(struct udevice *dev, u8 *buf, int buf_size) + EDID_LENGTH, EDID_LENGTH, + &buf[EDID_LENGTH]); + if (ret) { +- debug("EDID Read failed!\n"); ++printf("EDID Read failed!\n"); + continue; + } + } +@@ -1063,7 +1063,7 @@ static int rk_edp_probe(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel", + &priv->panel); + if (ret) { +- debug("%s: Cannot find panel for '%s' (ret=%d)\n", __func__, ++printf("%s: Cannot find panel for '%s' (ret=%d)\n", __func__, + dev->name, ret); + return ret; + } +@@ -1088,7 +1088,7 @@ static int rk_edp_probe(struct udevice *dev) + } + + int vop_id = uc_plat->source_id; +- debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); ++printf("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); + + if (edp_data->chip_type == RK3288_DP) { + ret = clk_get_by_index(dev, 1, &clk); +@@ -1097,7 +1097,7 @@ static int rk_edp_probe(struct udevice *dev) + clk_free(&clk); + } + if (ret) { +- debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); ++printf("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); + return ret; + } + } +@@ -1107,7 +1107,7 @@ static int rk_edp_probe(struct udevice *dev) + clk_free(&clk); + } + if (ret < 0) { +- debug("%s: Failed to set clock in source device '%s': ret=%d\n", ++printf("%s: Failed to set clock in source device '%s': ret=%d\n", + __func__, uc_plat->src_dev->name, ret); + return ret; + } +diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c +index 8dcd4d596..0f372f27a 100644 +--- a/drivers/video/rockchip/rk_hdmi.c ++++ b/drivers/video/rockchip/rk_hdmi.c +@@ -114,7 +114,7 @@ int rk_hdmi_probe(struct udevice *dev) + + ret = dw_hdmi_phy_wait_for_hpd(hdmi); + if (ret < 0) { +- debug("hdmi can not get hpd signal\n"); ++printf("hdmi can not get hpd signal\n"); + return -1; + } + +diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c +index 9cf3e3ca7..5a129ca6f 100644 +--- a/drivers/video/rockchip/rk_lvds.c ++++ b/drivers/video/rockchip/rk_lvds.c +@@ -60,7 +60,7 @@ int rk_lvds_enable(struct udevice *dev, int panel_bpp, + + ret = panel_enable_backlight(priv->panel); + if (ret) { +- debug("%s: backlight error: %d\n", __func__, ret); ++printf("%s: backlight error: %d\n", __func__, ret); + return ret; + } + +@@ -164,7 +164,7 @@ int rk_lvds_enable(struct udevice *dev, int panel_bpp, + int rk_lvds_read_timing(struct udevice *dev, struct display_timing *timing) + { + if (ofnode_decode_display_timing(dev_ofnode(dev), 0, timing)) { +- debug("%s: Failed to decode display timing\n", __func__); ++printf("%s: Failed to decode display timing\n", __func__); + return -EINVAL; + } + +@@ -181,7 +181,7 @@ static int rk_lvds_of_to_plat(struct udevice *dev) + ret = dev_read_s32_default(dev, "rockchip,output", -1); + if (ret != -1) { + priv->output = ret; +- debug("LVDS output : %d\n", ret); ++printf("LVDS output : %d\n", ret); + } else { + /* default set it as output rgb */ + priv->output = LVDS_OUTPUT_RGB; +@@ -190,7 +190,7 @@ static int rk_lvds_of_to_plat(struct udevice *dev) + ret = dev_read_s32_default(dev, "rockchip,data-mapping", -1); + if (ret != -1) { + priv->format = ret; +- debug("LVDS data-mapping : %d\n", ret); ++printf("LVDS data-mapping : %d\n", ret); + } else { + /* default set it as format jeida */ + priv->format = LVDS_FORMAT_JEIDA; +@@ -198,13 +198,13 @@ static int rk_lvds_of_to_plat(struct udevice *dev) + + ret = dev_read_s32_default(dev, "rockchip,data-width", -1); + if (ret != -1) { +- debug("LVDS data-width : %d\n", ret); ++printf("LVDS data-width : %d\n", ret); + if (ret == 24) { + priv->format |= LVDS_24BIT; + } else if (ret == 18) { + priv->format |= LVDS_18BIT; + } else { +- debug("rockchip-lvds unsupport data-width[%d]\n", ret); ++printf("rockchip-lvds unsupport data-width[%d]\n", ret); + ret = -EINVAL; + return ret; + } +@@ -223,7 +223,7 @@ int rk_lvds_probe(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel", + &priv->panel); + if (ret) { +- debug("%s: Cannot find panel for '%s' (ret=%d)\n", __func__, ++printf("%s: Cannot find panel for '%s' (ret=%d)\n", __func__, + dev->name, ret); + return ret; + } +diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c +index 881322067..fcf5e3af0 100644 +--- a/drivers/video/rockchip/rk_mipi.c ++++ b/drivers/video/rockchip/rk_mipi.c +@@ -32,7 +32,7 @@ int rk_mipi_read_timing(struct udevice *dev, + + ret = ofnode_decode_display_timing(dev_ofnode(dev), 0, timing); + if (ret) { +- debug("%s: Failed to decode display timing (ret=%d)\n", ++printf("%s: Failed to decode display timing (ret=%d)\n", + __func__, ret); + return -EINVAL; + } +@@ -244,7 +244,7 @@ int rk_mipi_phy_enable(struct udevice *dev) + break; + } + if (i == ARRAY_SIZE(freq_rang)) { +- debug("%s: Dphy freq out of range!\n", __func__); ++printf("%s: Dphy freq out of range!\n", __func__); + return -EINVAL; + } + test_data[0] = freq_rang[i][1] << 1; +@@ -260,11 +260,11 @@ int rk_mipi_phy_enable(struct udevice *dev) + max_prediv = (refclk / (5 * MHz)); + min_prediv = ((refclk / (40 * MHz)) ? (refclk / (40 * MHz) + 1) : 1); + +- debug("%s: DEBUG: max_prediv=%u, min_prediv=%u\n", __func__, max_prediv, ++printf("%s: DEBUG: max_prediv=%u, min_prediv=%u\n", __func__, max_prediv, + min_prediv); + + if (max_prediv < min_prediv) { +- debug("%s: Invalid refclk value\n", __func__); ++printf("%s: Invalid refclk value\n", __func__); + return -EINVAL; + } + +@@ -280,7 +280,7 @@ int rk_mipi_phy_enable(struct udevice *dev) + ddr_clk = refclk * fbdiv / prediv; + priv->phy_clk = ddr_clk; + +- debug("%s: DEBUG: refclk=%u, refclk=%llu, fbdiv=%llu, phyclk=%llu\n", ++printf("%s: DEBUG: refclk=%u, refclk=%llu, fbdiv=%llu, phyclk=%llu\n", + __func__, refclk, prediv, fbdiv, ddr_clk); + + /* config prediv and feedback reg */ +diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c +index fe0574870..7d4696500 100644 +--- a/drivers/video/rockchip/rk_vop.c ++++ b/drivers/video/rockchip/rk_vop.c +@@ -152,7 +152,7 @@ static void rkvop_enable_output(struct udevice *dev, enum vop_modes mode) + break; + + default: +- debug("%s: unsupported output mode %x\n", __func__, mode); ++printf("%s: unsupported output mode %x\n", __func__, mode); + } + } + +@@ -257,7 +257,7 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + const char *compat; + struct reset_ctl dclk_rst; + +- debug("%s(%s, 0x%lx, %s)\n", __func__, ++printf("%s(%s, 0x%lx, %s)\n", __func__, + dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); + + ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); +@@ -268,7 +268,7 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + if (!ofnode_valid(remote)) + return -EINVAL; + remote_vop_id = ofnode_read_u32_default(remote, "reg", -1); +- debug("remote vop_id=%d\n", remote_vop_id); ++printf("remote vop_id=%d\n", remote_vop_id); + + /* + * The remote-endpoint references into a subnode of the encoder +@@ -292,7 +292,7 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + while (ofnode_valid(remote)) { + remote = ofnode_get_parent(remote); + if (!ofnode_valid(remote)) { +- debug("%s(%s): no UCLASS_DISPLAY for remote-endpoint\n", ++printf("%s(%s): no UCLASS_DISPLAY for remote-endpoint\n", + __func__, dev_read_name(dev)); + return -EINVAL; + } +@@ -303,7 +303,7 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + }; + compat = ofnode_get_property(remote, "compatible", NULL); + if (!compat) { +- debug("%s(%s): Failed to find compatible property\n", ++printf("%s(%s): Failed to find compatible property\n", + __func__, dev_read_name(dev)); + return -EINVAL; + } +@@ -318,16 +318,16 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + } else if (strstr(compat, "lvds")) { + vop_id = VOP_MODE_LVDS; + } else { +- debug("%s(%s): Failed to find vop mode for %s\n", ++printf("%s(%s): Failed to find vop mode for %s\n", + __func__, dev_read_name(dev), compat); + return -EINVAL; + } +- debug("vop_id=%d\n", vop_id); ++printf("vop_id=%d\n", vop_id); + + disp_uc_plat = dev_get_uclass_plat(disp); +- debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); ++printf("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); + if (display_in_use(disp)) { +- debug(" - device in use\n"); ++printf(" - device in use\n"); + return -EBUSY; + } + +@@ -336,14 +336,14 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + + ret = device_probe(disp); + if (ret) { +- debug("%s: device '%s' display won't probe (ret=%d)\n", ++printf("%s: device '%s' display won't probe (ret=%d)\n", + __func__, dev->name, ret); + return ret; + } + + ret = display_read_timing(disp, &timing); + if (ret) { +- debug("%s: Failed to read timings\n", __func__); ++printf("%s: Failed to read timings\n", __func__); + return ret; + } + +@@ -351,7 +351,7 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + if (!ret) + ret = clk_set_rate(&clk, timing.pixelclock.typ); + if (IS_ERR_VALUE(ret)) { +- debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret); ++printf("%s: Failed to set pixel clock: ret=%d\n", __func__, ret); + return ret; + } + +@@ -388,7 +388,7 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) + uc_priv->xsize = timing.hactive.typ; + uc_priv->ysize = timing.vactive.typ; + uc_priv->bpix = l2bpp; +- debug("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize); ++printf("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize); + + return 0; + } +@@ -402,7 +402,7 @@ void rk_vop_probe_regulators(struct udevice *dev, + + for (i = 0; i < cnt; ++i) { + name = names[i]; +- debug("%s: probing regulator '%s'\n", dev->name, name); ++printf("%s: probing regulator '%s'\n", dev->name, name); + + ret = regulator_autoset_by_name(name, ®); + if (!ret) +@@ -442,7 +442,7 @@ int rk_vop_probe(struct udevice *dev) + } + + #if defined(CONFIG_EFI_LOADER) +- debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); ++printf("Adding to EFI map %d @ %lx\n", plat->size, plat->base); + efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); + #endif + +@@ -458,7 +458,7 @@ int rk_vop_probe(struct udevice *dev) + */ + port = dev_read_subnode(dev, "port"); + if (!ofnode_valid(port)) { +- debug("%s(%s): 'port' subnode not found\n", ++printf("%s(%s): 'port' subnode not found\n", + __func__, dev_read_name(dev)); + return -EINVAL; + } +@@ -468,7 +468,7 @@ int rk_vop_probe(struct udevice *dev) + node = dev_read_next_subnode(node)) { + ret = rk_display_init(dev, plat->base, node); + if (ret) +- debug("Device failed: ret=%d\n", ret); ++printf("Device failed: ret=%d\n", ret); + if (!ret) + break; + } +diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c +index c8f7022ea..90e46101e 100644 +--- a/drivers/video/simple_panel.c ++++ b/drivers/video/simple_panel.c +@@ -23,10 +23,10 @@ static int simple_panel_enable_backlight(struct udevice *dev) + struct simple_panel_priv *priv = dev_get_priv(dev); + int ret; + +- debug("%s: start, backlight = '%s'\n", __func__, priv->backlight->name); ++printf("%s: start, backlight = '%s'\n", __func__, priv->backlight->name); + dm_gpio_set_value(&priv->enable, 1); + ret = backlight_enable(priv->backlight); +- debug("%s: done, ret = %d\n", __func__, ret); ++printf("%s: done, ret = %d\n", __func__, ret); + if (ret) + return ret; + +@@ -38,10 +38,10 @@ static int simple_panel_set_backlight(struct udevice *dev, int percent) + struct simple_panel_priv *priv = dev_get_priv(dev); + int ret; + +- debug("%s: start, backlight = '%s'\n", __func__, priv->backlight->name); ++printf("%s: start, backlight = '%s'\n", __func__, priv->backlight->name); + dm_gpio_set_value(&priv->enable, 1); + ret = backlight_set_brightness(priv->backlight, percent); +- debug("%s: done, ret = %d\n", __func__, ret); ++printf("%s: done, ret = %d\n", __func__, ret); + if (ret) + return ret; + +@@ -57,7 +57,7 @@ static int simple_panel_of_to_plat(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, + "power-supply", &priv->reg); + if (ret) { +- debug("%s: Warning: cannot get power supply: ret=%d\n", ++printf("%s: Warning: cannot get power supply: ret=%d\n", + __func__, ret); + if (ret != -ENOENT) + return ret; +@@ -66,13 +66,13 @@ static int simple_panel_of_to_plat(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev, + "backlight", &priv->backlight); + if (ret) { +- debug("%s: Cannot get backlight: ret=%d\n", __func__, ret); ++printf("%s: Cannot get backlight: ret=%d\n", __func__, ret); + return log_ret(ret); + } + ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable, + GPIOD_IS_OUT); + if (ret) { +- debug("%s: Warning: cannot get enable GPIO: ret=%d\n", ++printf("%s: Warning: cannot get enable GPIO: ret=%d\n", + __func__, ret); + if (ret != -ENOENT) + return log_ret(ret); +@@ -87,7 +87,7 @@ static int simple_panel_probe(struct udevice *dev) + int ret; + + if (IS_ENABLED(CONFIG_DM_REGULATOR) && priv->reg) { +- debug("%s: Enable regulator '%s'\n", __func__, priv->reg->name); ++printf("%s: Enable regulator '%s'\n", __func__, priv->reg->name); + ret = regulator_set_enable(priv->reg, true); + if (ret) + return ret; +diff --git a/drivers/video/simplefb.c b/drivers/video/simplefb.c +index fd58426cf..16d9c9e67 100644 +--- a/drivers/video/simplefb.c ++++ b/drivers/video/simplefb.c +@@ -24,11 +24,11 @@ static int simple_video_probe(struct udevice *dev) + base = fdtdec_get_addr_size_auto_parent(blob, dev_of_offset(dev->parent), + node, "reg", 0, &size, false); + if (base == FDT_ADDR_T_NONE) { +- debug("%s: Failed to decode memory region\n", __func__); ++printf("%s: Failed to decode memory region\n", __func__); + return -EINVAL; + } + +- debug("%s: base=%llx, size=%llu\n", __func__, base, size); ++printf("%s: base=%llx, size=%llu\n", __func__, base, size); + + /* + * TODO is there some way to reserve the framebuffer +@@ -39,14 +39,14 @@ static int simple_video_probe(struct udevice *dev) + + video_set_flush_dcache(dev, true); + +- debug("%s: Query resolution...\n", __func__); ++printf("%s: Query resolution...\n", __func__); + + uc_priv->xsize = fdtdec_get_uint(blob, node, "width", 0); + uc_priv->ysize = fdtdec_get_uint(blob, node, "height", 0); + uc_priv->rot = 0; + + format = fdt_getprop(blob, node, "format", NULL); +- debug("%s: %dx%d@%s\n", __func__, uc_priv->xsize, uc_priv->ysize, format); ++printf("%s: %dx%d@%s\n", __func__, uc_priv->xsize, uc_priv->ysize, format); + + if (strcmp(format, "r5g6b5") == 0) { + uc_priv->bpix = VIDEO_BPP16; +diff --git a/drivers/video/sunxi/lcdc.c b/drivers/video/sunxi/lcdc.c +index 73033c3b8..49d0c3642 100644 +--- a/drivers/video/sunxi/lcdc.c ++++ b/drivers/video/sunxi/lcdc.c +@@ -290,13 +290,13 @@ void lcdc_pll_set(struct sunxi_ccm_reg *ccm, int tcon, int dotclock, + if (use_mipi_pll) { + clock_set_pll3(297000000); /* Fix the video pll at 297 MHz */ + clock_set_mipi_pll(best_m * dotclock * 1000); +- debug("dotclock: %dkHz = %dkHz via mipi pll\n", ++printf("dotclock: %dkHz = %dkHz via mipi pll\n", + dotclock, clock_get_mipi_pll() / best_m / 1000); + } else + #endif + { + clock_set_pll3(best_n * step * 1000); +- debug("dotclock: %dkHz = %dkHz: (%d * %dkHz * %d) / %d\n", ++printf("dotclock: %dkHz = %dkHz: (%d * %dkHz * %d) / %d\n", + dotclock, + (best_double + 1) * clock_get_pll3() / best_m / 1000, + best_double + 1, step, best_n, best_m); +diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c +index e02d359cd..6e967ec08 100644 +--- a/drivers/video/sunxi/sunxi_de2.c ++++ b/drivers/video/sunxi/sunxi_de2.c +@@ -188,9 +188,9 @@ static int sunxi_de2_init(struct udevice *dev, ulong fbbase, + int ret; + + disp_uc_plat = dev_get_uclass_plat(disp); +- debug("Using device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); ++printf("Using device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); + if (display_in_use(disp)) { +- debug(" - device in use\n"); ++printf(" - device in use\n"); + return -EBUSY; + } + +@@ -198,7 +198,7 @@ static int sunxi_de2_init(struct udevice *dev, ulong fbbase, + + ret = display_read_timing(disp, &timing); + if (ret) { +- debug("%s: Failed to read timings\n", __func__); ++printf("%s: Failed to read timings\n", __func__); + return ret; + } + +@@ -207,14 +207,14 @@ static int sunxi_de2_init(struct udevice *dev, ulong fbbase, + + ret = display_enable(disp, 1 << l2bpp, &timing); + if (ret) { +- debug("%s: Failed to enable display\n", __func__); ++printf("%s: Failed to enable display\n", __func__); + return ret; + } + + uc_priv->xsize = timing.hactive.typ; + uc_priv->ysize = timing.vactive.typ; + uc_priv->bpix = l2bpp; +- debug("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize); ++printf("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize); + + #ifdef CONFIG_EFI_LOADER + efi_add_memory_map(fbbase, +@@ -251,7 +251,7 @@ static int sunxi_de2_probe(struct udevice *dev) + } + } + +- debug("%s: lcd display not found (ret=%d)\n", __func__, ret); ++printf("%s: lcd display not found (ret=%d)\n", __func__, ret); + + ret = uclass_get_device_by_driver(UCLASS_DISPLAY, + DM_DRIVER_GET(sunxi_dw_hdmi), &disp); +@@ -270,7 +270,7 @@ static int sunxi_de2_probe(struct udevice *dev) + } + } + +- debug("%s: hdmi display not found (ret=%d)\n", __func__, ret); ++printf("%s: hdmi display not found (ret=%d)\n", __func__, ret); + + return -ENODEV; + } +@@ -315,7 +315,7 @@ int sunxi_simplefb_setup(void *blob) + u64 start, size; + const char *pipeline = NULL; + +- debug("Setting up simplefb\n"); ++printf("Setting up simplefb\n"); + + if (IS_ENABLED(CONFIG_MACH_SUNXI_H3_H5)) + mux = 0; +@@ -326,37 +326,37 @@ int sunxi_simplefb_setup(void *blob) + ret = uclass_get_device_by_driver(UCLASS_VIDEO, + DM_DRIVER_GET(sunxi_de2), &de2); + if (ret) { +- debug("DE2 not present\n"); ++printf("DE2 not present\n"); + return 0; + } else if (!device_active(de2)) { +- debug("DE2 present but not probed\n"); ++printf("DE2 present but not probed\n"); + return 0; + } + + ret = uclass_get_device_by_driver(UCLASS_DISPLAY, + DM_DRIVER_GET(sunxi_dw_hdmi), &hdmi); + if (ret) { +- debug("HDMI not present\n"); ++printf("HDMI not present\n"); + } else if (device_active(hdmi)) { + if (mux == 0) + pipeline = "mixer0-lcd0-hdmi"; + else + pipeline = "mixer1-lcd1-hdmi"; + } else { +- debug("HDMI present but not probed\n"); ++printf("HDMI present but not probed\n"); + } + + ret = uclass_get_device_by_driver(UCLASS_DISPLAY, + DM_DRIVER_GET(sunxi_lcd), &lcd); + if (ret) +- debug("LCD not present\n"); ++printf("LCD not present\n"); + else if (device_active(lcd)) + pipeline = "mixer0-lcd0"; + else +- debug("LCD present but not probed\n"); ++printf("LCD present but not probed\n"); + + if (!pipeline) { +- debug("No active display present\n"); ++printf("No active display present\n"); + return 0; + } + +diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c +index 19ed80b48..35c07056a 100644 +--- a/drivers/video/sunxi/sunxi_dw_hdmi.c ++++ b/drivers/video/sunxi/sunxi_dw_hdmi.c +@@ -225,7 +225,7 @@ static void sunxi_dw_hdmi_pll_set(uint clk_khz, int *phy_div) + *phy_div = best_div; + + clock_set_pll3_factors(best_m, best_n); +- debug("dotclock: %dkHz = %dkHz: (24MHz * %d) / %d / %d\n", ++printf("dotclock: %dkHz = %dkHz: (24MHz * %d) / %d / %d\n", + clk_khz, (clock_get_pll3() / 1000) / best_div, + best_n, best_m, best_div); + } +@@ -355,7 +355,7 @@ static int sunxi_dw_hdmi_probe(struct udevice *dev) + + ret = dw_hdmi_phy_wait_for_hpd(&priv->hdmi); + if (ret < 0) { +- debug("hdmi can not get hpd signal\n"); ++printf("hdmi can not get hpd signal\n"); + return -1; + } + +diff --git a/drivers/video/sunxi/sunxi_lcd.c b/drivers/video/sunxi/sunxi_lcd.c +index 7a9eba1ed..c249890ee 100644 +--- a/drivers/video/sunxi/sunxi_lcd.c ++++ b/drivers/video/sunxi/sunxi_lcd.c +@@ -93,7 +93,7 @@ static int sunxi_lcd_probe(struct udevice *dev) + + ret = video_bridge_attach(cdev); + if (ret) { +- debug("video bridge attach failed: %d\n", ret); ++printf("video bridge attach failed: %d\n", ret); + return ret; + } + ret = video_bridge_read_edid(cdev, edid, EDID_SIZE); +@@ -112,13 +112,13 @@ static int sunxi_lcd_probe(struct udevice *dev) + */ + ret = uclass_get_device(UCLASS_PANEL, 0, &cdev); + if (ret) { +- debug("video panel not found: %d\n", ret); ++printf("video panel not found: %d\n", ret); + return ret; + } + + if (fdtdec_decode_display_timing(gd->fdt_blob, dev_of_offset(cdev), + 0, &priv->timing)) { +- debug("%s: Failed to decode display timing\n", __func__); ++printf("%s: Failed to decode display timing\n", __func__); + return -EINVAL; + } + timing_node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(cdev), +diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c +index d60132eb7..e5a1dabcb 100644 +--- a/drivers/video/tegra.c ++++ b/drivers/video/tegra.c +@@ -136,7 +136,7 @@ static int update_display_mode(struct dc_disp_reg *disp, + */ + rate = clock_get_periph_rate(PERIPH_ID_DISP1, CLOCK_ID_CGENERAL); + div = ((rate * 2 + priv->pixel_clock / 2) / priv->pixel_clock) - 2; +- debug("Display clock %lu, divider %lu\n", rate, div); ++printf("Display clock %lu, divider %lu\n", rate, div); + + writel(0x00010001, &disp->shift_clk_opt); + +@@ -233,7 +233,7 @@ static int setup_window(struct disp_ctl_win *win, + win->out_h = priv->height; + win->phys_addr = priv->frame_buffer; + win->stride = priv->width * (1 << priv->log2_bpp) / 8; +- debug("%s: depth = %d\n", __func__, priv->log2_bpp); ++printf("%s: depth = %d\n", __func__, priv->log2_bpp); + switch (priv->log2_bpp) { + case VIDEO_BPP32: + win->fmt = COLOR_DEPTH_R8G8B8A8; +@@ -245,7 +245,7 @@ static int setup_window(struct disp_ctl_win *win, + break; + + default: +- debug("Unsupported LCD bit depth"); ++printf("Unsupported LCD bit depth"); + return -1; + } + +@@ -318,7 +318,7 @@ static int tegra_lcd_probe(struct udevice *dev) + + ret = panel_enable_backlight(priv->panel); + if (ret) { +- debug("%s: Cannot enable backlight, ret=%d\n", __func__, ret); ++printf("%s: Cannot enable backlight, ret=%d\n", __func__, ret); + return ret; + } + +@@ -331,7 +331,7 @@ static int tegra_lcd_probe(struct udevice *dev) + uc_priv->xsize = priv->width; + uc_priv->ysize = priv->height; + uc_priv->bpix = priv->log2_bpp; +- debug("LCD frame buffer at %pa, size %x\n", &priv->frame_buffer, ++printf("LCD frame buffer at %pa, size %x\n", &priv->frame_buffer, + plat->size); + + return 0; +@@ -349,20 +349,20 @@ static int tegra_lcd_of_to_plat(struct udevice *dev) + + priv->disp = dev_read_addr_ptr(dev); + if (!priv->disp) { +- debug("%s: No display controller address\n", __func__); ++printf("%s: No display controller address\n", __func__); + return -EINVAL; + } + + rgb = fdt_subnode_offset(blob, node, "rgb"); + if (rgb < 0) { +- debug("%s: Cannot find rgb subnode for '%s' (ret=%d)\n", ++printf("%s: Cannot find rgb subnode for '%s' (ret=%d)\n", + __func__, dev->name, rgb); + return -EINVAL; + } + + ret = fdtdec_decode_display_timing(blob, rgb, 0, &priv->timing); + if (ret) { +- debug("%s: Cannot read display timing for '%s' (ret=%d)\n", ++printf("%s: Cannot read display timing for '%s' (ret=%d)\n", + __func__, dev->name, ret); + return -EINVAL; + } +@@ -378,13 +378,13 @@ static int tegra_lcd_of_to_plat(struct udevice *dev) + */ + panel_node = fdtdec_lookup_phandle(blob, rgb, "nvidia,panel"); + if (panel_node < 0) { +- debug("%s: Cannot find panel information\n", __func__); ++printf("%s: Cannot find panel information\n", __func__); + return -EINVAL; + } + ret = uclass_get_device_by_of_offset(UCLASS_PANEL, panel_node, + &priv->panel); + if (ret) { +- debug("%s: Cannot find panel for '%s' (ret=%d)\n", __func__, ++printf("%s: Cannot find panel for '%s' (ret=%d)\n", __func__, + dev->name, ret); + return ret; + } +diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c +index f642b3b10..a5ca40648 100644 +--- a/drivers/video/tegra124/display.c ++++ b/drivers/video/tegra124/display.c +@@ -48,7 +48,7 @@ static void print_mode(const struct display_timing *timing) + { + int refresh = tegra_dc_calc_refresh(timing); + +- debug("MODE:%dx%d@%d.%03uHz pclk=%d\n", ++printf("MODE:%dx%d@%d.%03uHz pclk=%d\n", + timing->hactive.typ, timing->vactive.typ, refresh / 1000, + refresh % 1000, timing->pixelclock.typ); + } +@@ -92,7 +92,7 @@ static int update_display_mode(struct dc_ctlr *disp_ctrl, + writel((PIXEL_CLK_DIVIDER_PCD1 << PIXEL_CLK_DIVIDER_SHIFT) | + ((shift_clock_div - 1) * 2) << SHIFT_CLK_DIVIDER_SHIFT, + &disp_ctrl->disp.disp_clk_ctrl); +- debug("%s: PixelClock=%u, ShiftClockDiv=%u\n", __func__, ++printf("%s: PixelClock=%u, ShiftClockDiv=%u\n", __func__, + timing->pixelclock.typ, shift_clock_div); + return 0; + } +@@ -125,7 +125,7 @@ int tegra_dc_sor_general_act(struct dc_ctlr *disp_ctrl) + if (tegra_dc_poll_register(&disp_ctrl->cmd.state_ctrl, + GENERAL_ACT_REQ, 0, 100, + DC_POLL_TIMEOUT_MS * 1000)) { +- debug("dc timeout waiting for DC to stop\n"); ++printf("dc timeout waiting for DC to stop\n"); + return -ETIMEDOUT; + } + +@@ -219,7 +219,7 @@ static int tegra_depth_for_bpp(int bpp) + case 16: + return COLOR_DEPTH_B5G6R5; + default: +- debug("Unsupported LCD bit depth"); ++printf("Unsupported LCD bit depth"); + return -1; + } + } +@@ -346,31 +346,31 @@ static int display_init(struct udevice *dev, void *lcdbase, + */ + ret = uclass_find_first_device(UCLASS_DISPLAY, &dp_dev); + if (ret) { +- debug("%s: device '%s' display not found (ret=%d)\n", __func__, ++printf("%s: device '%s' display not found (ret=%d)\n", __func__, + dev->name, ret); + return ret; + } + + disp_uc_plat = dev_get_uclass_plat(dp_dev); +- debug("Found device '%s', disp_uc_priv=%p\n", dp_dev->name, ++printf("Found device '%s', disp_uc_priv=%p\n", dp_dev->name, + disp_uc_plat); + disp_uc_plat->src_dev = dev; + + ret = uclass_get_device(UCLASS_DISPLAY, 0, &dp_dev); + if (ret) { +- debug("%s: Failed to probe eDP, ret=%d\n", __func__, ret); ++printf("%s: Failed to probe eDP, ret=%d\n", __func__, ret); + return ret; + } + + dc_ctlr = (struct dc_ctlr *)dev_read_addr(dev); + if (ofnode_decode_display_timing(dev_ofnode(dev), 0, timing)) { +- debug("%s: Failed to decode display timing\n", __func__); ++printf("%s: Failed to decode display timing\n", __func__); + return -EINVAL; + } + + ret = display_update_config_from_edid(dp_dev, &panel_bpp, timing); + if (ret) { +- debug("%s: Failed to decode EDID, using defaults\n", __func__); ++printf("%s: Failed to decode EDID, using defaults\n", __func__); + dump_config(panel_bpp, timing); + } + +@@ -384,37 +384,37 @@ static int display_init(struct udevice *dev, void *lcdbase, + printf("dc: clock init failed\n"); + return -EIO; + } else if (plld_rate != timing->pixelclock.typ * 2) { +- debug("dc: plld rounded to %u\n", plld_rate); ++printf("dc: plld rounded to %u\n", plld_rate); + timing->pixelclock.typ = plld_rate / 2; + } + + /* Init dc */ + ret = tegra_dc_init(dc_ctlr); + if (ret) { +- debug("dc: init failed\n"); ++printf("dc: init failed\n"); + return ret; + } + + /* Configure dc mode */ + ret = update_display_mode(dc_ctlr, timing, href_to_sync, vref_to_sync); + if (ret) { +- debug("dc: failed to configure display mode\n"); ++printf("dc: failed to configure display mode\n"); + return ret; + } + + /* Enable dp */ + ret = display_enable(dp_dev, panel_bpp, timing); + if (ret) { +- debug("dc: failed to enable display: ret=%d\n", ret); ++printf("dc: failed to enable display: ret=%d\n", ret); + return ret; + } + + ret = update_window(dc_ctlr, (ulong)lcdbase, fb_bits_per_pixel, timing); + if (ret) { +- debug("dc: failed to update window\n"); ++printf("dc: failed to update window\n"); + return ret; + } +- debug("%s: ready\n", __func__); ++printf("%s: ready\n", __func__); + + return 0; + } +@@ -458,7 +458,7 @@ static int tegra124_lcd_init(struct udevice *dev, void *lcdbase, + uc_priv->bpix = l2bpp; + + video_set_flush_dcache(dev, 1); +- debug("%s: done\n", __func__); ++printf("%s: done\n", __func__); + + return 0; + } +@@ -473,7 +473,7 @@ static int tegra124_lcd_probe(struct udevice *dev) + bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "lcd"); + ret = tegra124_lcd_init(dev, (void *)plat->base, VIDEO_BPP16); + bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD); +- debug("LCD init took %lu ms\n", get_timer(start)); ++printf("LCD init took %lu ms\n", get_timer(start)); + if (ret) + printf("%s: Error %d\n", __func__, ret); + +@@ -486,7 +486,7 @@ static int tegra124_lcd_bind(struct udevice *dev) + + uc_plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT * + (1 << VIDEO_BPP16) / 8; +- debug("%s: Frame buffer size %x\n", __func__, uc_plat->size); ++printf("%s: Frame buffer size %x\n", __func__, uc_plat->size); + + return 0; + } +diff --git a/drivers/video/tegra124/dp.c b/drivers/video/tegra124/dp.c +index 8f5116fe7..b90c07c31 100644 +--- a/drivers/video/tegra124/dp.c ++++ b/drivers/video/tegra124/dp.c +@@ -70,7 +70,7 @@ static inline u32 tegra_dc_dpaux_poll_register(struct tegra_dp_priv *dp, + + if ((reg_val & mask) == exp_val) + return 0; /* success */ +- debug("dpaux_poll_register 0x%x: timeout: (reg_val)0x%08x & (mask)0x%08x != (exp_val)0x%08x\n", ++printf("dpaux_poll_register 0x%x: timeout: (reg_val)0x%08x & (mask)0x%08x != (exp_val)0x%08x\n", + reg, reg_val, mask, exp_val); + return temp; + } +@@ -83,7 +83,7 @@ static inline int tegra_dpaux_wait_transaction(struct tegra_dp_priv *dp) + DPAUX_DP_AUXCTL_TRANSACTREQ_MASK, + DPAUX_DP_AUXCTL_TRANSACTREQ_DONE, + 100, DP_AUX_TIMEOUT_MS * 1000) != 0) { +- debug("dp: DPAUX transaction timeout\n"); ++printf("dp: DPAUX transaction timeout\n"); + return -1; + } + return 0; +@@ -109,7 +109,7 @@ static int tegra_dc_dpaux_write_chunk(struct tegra_dp_priv *dp, u32 cmd, + case DPAUX_DP_AUXCTL_CMD_AUXWR: + break; + default: +- debug("dp: aux write cmd 0x%x is invalid\n", cmd); ++printf("dp: aux write cmd 0x%x is invalid\n", cmd); + return -EINVAL; + } + +@@ -135,7 +135,7 @@ static int tegra_dc_dpaux_write_chunk(struct tegra_dp_priv *dp, u32 cmd, + tegra_dpaux_writel(dp, DPAUX_DP_AUXCTL, reg_val); + + if (tegra_dpaux_wait_transaction(dp)) +- debug("dp: aux write transaction timeout\n"); ++printf("dp: aux write transaction timeout\n"); + + *aux_stat = tegra_dpaux_readl(dp, DPAUX_DP_AUXSTAT); + +@@ -144,14 +144,14 @@ static int tegra_dc_dpaux_write_chunk(struct tegra_dp_priv *dp, u32 cmd, + (*aux_stat & DPAUX_DP_AUXSTAT_SINKSTAT_ERROR_PENDING) || + (*aux_stat & DPAUX_DP_AUXSTAT_NO_STOP_ERROR_PENDING)) { + if (timeout_retries-- > 0) { +- debug("dp: aux write retry (0x%x) -- %d\n", ++printf("dp: aux write retry (0x%x) -- %d\n", + *aux_stat, timeout_retries); + /* clear the error bits */ + tegra_dpaux_writel(dp, DPAUX_DP_AUXSTAT, + *aux_stat); + continue; + } else { +- debug("dp: aux write got error (0x%x)\n", ++printf("dp: aux write got error (0x%x)\n", + *aux_stat); + return -ETIMEDOUT; + } +@@ -160,14 +160,14 @@ static int tegra_dc_dpaux_write_chunk(struct tegra_dp_priv *dp, u32 cmd, + if ((*aux_stat & DPAUX_DP_AUXSTAT_REPLYTYPE_I2CDEFER) || + (*aux_stat & DPAUX_DP_AUXSTAT_REPLYTYPE_DEFER)) { + if (defer_retries-- > 0) { +- debug("dp: aux write defer (0x%x) -- %d\n", ++printf("dp: aux write defer (0x%x) -- %d\n", + *aux_stat, defer_retries); + /* clear the error bits */ + tegra_dpaux_writel(dp, DPAUX_DP_AUXSTAT, + *aux_stat); + continue; + } else { +- debug("dp: aux write defer exceeds max retries (0x%x)\n", ++printf("dp: aux write defer exceeds max retries (0x%x)\n", + *aux_stat); + return -ETIMEDOUT; + } +@@ -178,7 +178,7 @@ static int tegra_dc_dpaux_write_chunk(struct tegra_dp_priv *dp, u32 cmd, + *size = ((*aux_stat) & DPAUX_DP_AUXSTAT_REPLY_M_MASK); + return 0; + } else { +- debug("dp: aux write failed (0x%x)\n", *aux_stat); ++printf("dp: aux write failed (0x%x)\n", *aux_stat); + return -EIO; + } + } +@@ -195,7 +195,7 @@ static int tegra_dc_dpaux_read_chunk(struct tegra_dp_priv *dp, u32 cmd, + u32 defer_retries = DP_AUX_DEFER_MAX_TRIES; + + if (*size > DP_AUX_MAX_BYTES) { +- debug("only read one chunk\n"); ++printf("only read one chunk\n"); + return -EIO; /* only read one chunk */ + } + +@@ -207,13 +207,13 @@ static int tegra_dc_dpaux_read_chunk(struct tegra_dp_priv *dp, u32 cmd, + case DPAUX_DP_AUXCTL_CMD_AUXRD: + break; + default: +- debug("dp: aux read cmd 0x%x is invalid\n", cmd); ++printf("dp: aux read cmd 0x%x is invalid\n", cmd); + return -EIO; + } + + *aux_stat = tegra_dpaux_readl(dp, DPAUX_DP_AUXSTAT); + if (!(*aux_stat & DPAUX_DP_AUXSTAT_HPD_STATUS_PLUGGED)) { +- debug("dp: HPD is not detected\n"); ++printf("dp: HPD is not detected\n"); + return -EIO; + } + +@@ -233,7 +233,7 @@ static int tegra_dc_dpaux_read_chunk(struct tegra_dp_priv *dp, u32 cmd, + tegra_dpaux_writel(dp, DPAUX_DP_AUXCTL, reg_val); + + if (tegra_dpaux_wait_transaction(dp)) +- debug("dp: aux read transaction timeout\n"); ++printf("dp: aux read transaction timeout\n"); + + *aux_stat = tegra_dpaux_readl(dp, DPAUX_DP_AUXSTAT); + +@@ -242,14 +242,14 @@ static int tegra_dc_dpaux_read_chunk(struct tegra_dp_priv *dp, u32 cmd, + (*aux_stat & DPAUX_DP_AUXSTAT_SINKSTAT_ERROR_PENDING) || + (*aux_stat & DPAUX_DP_AUXSTAT_NO_STOP_ERROR_PENDING)) { + if (timeout_retries-- > 0) { +- debug("dp: aux read retry (0x%x) -- %d\n", ++printf("dp: aux read retry (0x%x) -- %d\n", + *aux_stat, timeout_retries); + /* clear the error bits */ + tegra_dpaux_writel(dp, DPAUX_DP_AUXSTAT, + *aux_stat); + continue; /* retry */ + } else { +- debug("dp: aux read got error (0x%x)\n", ++printf("dp: aux read got error (0x%x)\n", + *aux_stat); + return -ETIMEDOUT; + } +@@ -258,14 +258,14 @@ static int tegra_dc_dpaux_read_chunk(struct tegra_dp_priv *dp, u32 cmd, + if ((*aux_stat & DPAUX_DP_AUXSTAT_REPLYTYPE_I2CDEFER) || + (*aux_stat & DPAUX_DP_AUXSTAT_REPLYTYPE_DEFER)) { + if (defer_retries-- > 0) { +- debug("dp: aux read defer (0x%x) -- %d\n", ++printf("dp: aux read defer (0x%x) -- %d\n", + *aux_stat, defer_retries); + /* clear the error bits */ + tegra_dpaux_writel(dp, DPAUX_DP_AUXSTAT, + *aux_stat); + continue; + } else { +- debug("dp: aux read defer exceeds max retries (0x%x)\n", ++printf("dp: aux read defer exceeds max retries (0x%x)\n", + *aux_stat); + return -ETIMEDOUT; + } +@@ -285,12 +285,12 @@ static int tegra_dc_dpaux_read_chunk(struct tegra_dp_priv *dp, u32 cmd, + + return 0; + } else { +- debug("dp: aux read failed (0x%x\n", *aux_stat); ++printf("dp: aux read failed (0x%x\n", *aux_stat); + return -EIO; + } + } + /* Should never come to here */ +- debug("%s: can't\n", __func__); ++printf("%s: can't\n", __func__); + + return -EIO; + } +@@ -333,7 +333,7 @@ static int tegra_dc_dp_dpcd_read(struct tegra_dp_priv *dp, u32 cmd, + ret = tegra_dc_dpaux_read_chunk(dp, DPAUX_DP_AUXCTL_CMD_AUXRD, + cmd, data_ptr, &size, &status); + if (ret) { +- debug("dp: Failed to read DPCD data. CMD 0x%x, Status 0x%x\n", ++printf("dp: Failed to read DPCD data. CMD 0x%x, Status 0x%x\n", + cmd, status); + } + +@@ -350,7 +350,7 @@ static int tegra_dc_dp_dpcd_write(struct tegra_dp_priv *dp, u32 cmd, + ret = tegra_dc_dpaux_write_chunk(dp, DPAUX_DP_AUXCTL_CMD_AUXWR, + cmd, &data, &size, &status); + if (ret) { +- debug("dp: Failed to write DPCD data. CMD 0x%x, Status 0x%x\n", ++printf("dp: Failed to write DPCD data. CMD 0x%x, Status 0x%x\n", + cmd, status); + } + +@@ -371,7 +371,7 @@ static int tegra_dc_i2c_aux_read(struct tegra_dp_priv *dp, u32 i2c_addr, + dp, DPAUX_DP_AUXCTL_CMD_MOTWR, i2c_addr, + &addr, &len, aux_stat); + if (ret) { +- debug("%s: error sending address to read.\n", ++printf("%s: error sending address to read.\n", + __func__); + return ret; + } +@@ -380,7 +380,7 @@ static int tegra_dc_i2c_aux_read(struct tegra_dp_priv *dp, u32 i2c_addr, + dp, DPAUX_DP_AUXCTL_CMD_I2CRD, i2c_addr, + data, &cur_size, aux_stat); + if (ret) { +- debug("%s: error reading data.\n", __func__); ++printf("%s: error reading data.\n", __func__); + return ret; + } + +@@ -414,36 +414,36 @@ static void tegra_dc_dpaux_enable(struct tegra_dp_priv *dp) + static void tegra_dc_dp_dump_link_cfg(struct tegra_dp_priv *dp, + const struct tegra_dp_link_config *link_cfg) + { +- debug("DP config: cfg_name cfg_value\n"); +- debug(" Lane Count %d\n", ++printf("DP config: cfg_name cfg_value\n"); ++printf(" Lane Count %d\n", + link_cfg->max_lane_count); +- debug(" SupportEnhancedFraming %s\n", ++printf(" SupportEnhancedFraming %s\n", + link_cfg->support_enhanced_framing ? "Y" : "N"); +- debug(" Bandwidth %d\n", ++printf(" Bandwidth %d\n", + link_cfg->max_link_bw); +- debug(" bpp %d\n", ++printf(" bpp %d\n", + link_cfg->bits_per_pixel); +- debug(" EnhancedFraming %s\n", ++printf(" EnhancedFraming %s\n", + link_cfg->enhanced_framing ? "Y" : "N"); +- debug(" Scramble_enabled %s\n", ++printf(" Scramble_enabled %s\n", + link_cfg->scramble_ena ? "Y" : "N"); +- debug(" LinkBW %d\n", ++printf(" LinkBW %d\n", + link_cfg->link_bw); +- debug(" lane_count %d\n", ++printf(" lane_count %d\n", + link_cfg->lane_count); +- debug(" activespolarity %d\n", ++printf(" activespolarity %d\n", + link_cfg->activepolarity); +- debug(" active_count %d\n", ++printf(" active_count %d\n", + link_cfg->active_count); +- debug(" tu_size %d\n", ++printf(" tu_size %d\n", + link_cfg->tu_size); +- debug(" active_frac %d\n", ++printf(" active_frac %d\n", + link_cfg->active_frac); +- debug(" watermark %d\n", ++printf(" watermark %d\n", + link_cfg->watermark); +- debug(" hblank_sym %d\n", ++printf(" hblank_sym %d\n", + link_cfg->hblank_sym); +- debug(" vblank_sym %d\n", ++printf(" vblank_sym %d\n", + link_cfg->vblank_sym); + } + #endif +@@ -469,7 +469,7 @@ static int _tegra_dp_lower_link_config(struct tegra_dp_priv *dp, + } + break; + default: +- debug("dp: Error link rate %d\n", cfg->link_bw); ++printf("dp: Error link rate %d\n", cfg->link_bw); + return -ENOLINK; + } + +@@ -602,11 +602,11 @@ static int tegra_dc_dp_calc_config(struct tegra_dp_priv *dp, + (8 * link_cfg->lane_count); + + if (link_cfg->watermark > 30) { +- debug("dp: sor setting: unable to get a good tusize, force watermark to 30\n"); ++printf("dp: sor setting: unable to get a good tusize, force watermark to 30\n"); + link_cfg->watermark = 30; + return -1; + } else if (link_cfg->watermark > num_symbols_per_line) { +- debug("dp: sor setting: force watermark to the number of symbols in the line\n"); ++printf("dp: sor setting: force watermark to the number of symbols in the line\n"); + link_cfg->watermark = num_symbols_per_line; + return -1; + } +@@ -930,7 +930,7 @@ static int tegra_dp_link_config(struct tegra_dp_priv *dp, + int ret; + + if (link_cfg->lane_count == 0) { +- debug("dp: error: lane count is 0. Can not set link config.\n"); ++printf("dp: error: lane count is 0. Can not set link config.\n"); + return -ENOLINK; + } + +@@ -949,7 +949,7 @@ static int tegra_dp_link_config(struct tegra_dp_priv *dp, + if (!ret) + break; + if (retry == 1) { +- debug("dp: Failed to set DP panel power\n"); ++printf("dp: Failed to set DP panel power\n"); + return ret; + } + } +@@ -964,12 +964,12 @@ static int tegra_dp_link_config(struct tegra_dp_priv *dp, + + ret = tegra_dp_set_link_bandwidth(dp, dp->sor, link_cfg->link_bw); + if (ret) { +- debug("dp: Failed to set link bandwidth\n"); ++printf("dp: Failed to set link bandwidth\n"); + return ret; + } + ret = tegra_dp_set_lane_count(dp, link_cfg, dp->sor); + if (ret) { +- debug("dp: Failed to set lane count\n"); ++printf("dp: Failed to set lane count\n"); + return ret; + } + tegra_dc_sor_set_dp_linkctl(dp->sor, 1, training_pattern_none, +@@ -1036,7 +1036,7 @@ static int tegra_dp_lt_config(struct tegra_dp_priv *dp, u32 pe[4], u32 vs[4], + shift = PR_LANE3_DP_LANE3_SHIFT; + break; + default: +- debug("dp: incorrect lane cnt\n"); ++printf("dp: incorrect lane cnt\n"); + return -EINVAL; + } + +@@ -1110,7 +1110,7 @@ static int _tegra_dp_channel_eq(struct tegra_dp_priv *dp, u32 pe[4], + tegra_dp_wait_aux_training(dp, false, cfg); + + if (!tegra_dp_clock_recovery_status(dp, cfg)) { +- debug("dp: CR failed in channel EQ sequence!\n"); ++printf("dp: CR failed in channel EQ sequence!\n"); + break; + } + +@@ -1207,7 +1207,7 @@ retry_cr: + if (!tegra_dp_lower_link_config(dp, timing, cfg)) + goto retry_cr; + +- debug("dp: clk recovery failed\n"); ++printf("dp: clk recovery failed\n"); + goto fail; + } + +@@ -1216,7 +1216,7 @@ retry_cr: + if (!tegra_dp_lower_link_config(dp, timing, cfg)) + goto retry_cr; + +- debug("dp: channel equalization failed\n"); ++printf("dp: channel equalization failed\n"); + goto fail; + } + #ifdef DEBUG +@@ -1263,7 +1263,7 @@ static int tegra_dc_dp_fast_link_training(struct tegra_dp_priv *dp, + DP_LANE0_1_STATUS, (u8 *)&data16, &size, &status); + status = mask & 0x1111; + if ((data16 & status) != status) { +- debug("dp: Link training error for TP1 (%#x, status %#x)\n", ++printf("dp: Link training error for TP1 (%#x, status %#x)\n", + data16, status); + return -EFAULT; + } +@@ -1282,7 +1282,7 @@ static int tegra_dc_dp_fast_link_training(struct tegra_dp_priv *dp, + tegra_dc_dpaux_read(dp, DPAUX_DP_AUXCTL_CMD_AUXRD, DP_LANE0_1_STATUS, + (u8 *)&data32, &size, &status); + if ((data32 & mask) != (0x7777 & mask)) { +- debug("dp: Link training error for TP2/3 (0x%x)\n", data32); ++printf("dp: Link training error for TP2/3 (0x%x)\n", data32); + return -EFAULT; + } + +@@ -1292,12 +1292,12 @@ static int tegra_dc_dp_fast_link_training(struct tegra_dp_priv *dp, + + if (tegra_dc_dp_link_trained(dp, link_cfg)) { + tegra_dc_sor_read_link_config(sor, &link_bw, &lane_count); +- debug("Fast link training failed, link bw %d, lane # %d\n", ++printf("Fast link training failed, link bw %d, lane # %d\n", + link_bw, lane_count); + return -EFAULT; + } + +- debug("Fast link training succeeded, link bw %d, lane %d\n", ++printf("Fast link training succeeded, link bw %d, lane %d\n", + link_cfg->link_bw, link_cfg->lane_count); + + return 0; +@@ -1315,7 +1315,7 @@ static int tegra_dp_do_link_training(struct tegra_dp_priv *dp, + if (DO_FAST_LINK_TRAINING) { + ret = tegra_dc_dp_fast_link_training(dp, link_cfg, sor); + if (ret) { +- debug("dp: fast link training failed\n"); ++printf("dp: fast link training failed\n"); + } else { + /* + * set to a known-good drive setting if fast link +@@ -1323,7 +1323,7 @@ static int tegra_dp_do_link_training(struct tegra_dp_priv *dp, + */ + ret = tegra_dc_sor_set_voltage_swing(dp->sor, link_cfg); + if (ret) +- debug("Failed to set voltage swing\n"); ++printf("Failed to set voltage swing\n"); + } + } else { + ret = -ENOSYS; +@@ -1332,7 +1332,7 @@ static int tegra_dp_do_link_training(struct tegra_dp_priv *dp, + /* Try full link training then */ + ret = tegra_dc_dp_full_link_training(dp, timing, link_cfg); + if (ret) { +- debug("dp: full link training failed\n"); ++printf("dp: full link training failed\n"); + return ret; + } + } +@@ -1356,11 +1356,11 @@ static int tegra_dc_dp_explore_link_cfg(struct tegra_dp_priv *dp, + + if (!timing->pixelclock.typ || !timing->hactive.typ || + !timing->vactive.typ) { +- debug("dp: error mode configuration"); ++printf("dp: error mode configuration"); + return -EINVAL; + } + if (!link_cfg->max_link_bw || !link_cfg->max_lane_count) { +- debug("dp: error link configuration"); ++printf("dp: error link configuration"); + return -EINVAL; + } + +@@ -1406,7 +1406,7 @@ static int tegra_dc_dp_sink_out_of_sync(struct tegra_dp_priv *dp, u32 delay_ms) + int out_of_sync; + int ret; + +- debug("%s: delay=%d\n", __func__, delay_ms); ++printf("%s: delay=%d\n", __func__, delay_ms); + mdelay(delay_ms); + ret = tegra_dc_dp_dpcd_read(dp, DP_SINK_STATUS, &dpcd_data); + if (ret) +@@ -1414,9 +1414,9 @@ static int tegra_dc_dp_sink_out_of_sync(struct tegra_dp_priv *dp, u32 delay_ms) + + out_of_sync = !(dpcd_data & DP_SINK_STATUS_PORT0_IN_SYNC); + if (out_of_sync) +- debug("SINK receive port 0 out of sync, data=%x\n", dpcd_data); ++printf("SINK receive port 0 out of sync, data=%x\n", dpcd_data); + else +- debug("SINK is in synchronization\n"); ++printf("SINK is in synchronization\n"); + + return out_of_sync; + } +@@ -1444,7 +1444,7 @@ static int tegra_dc_dp_check_sink(struct tegra_dp_priv *dp, + delay_frame)) + return 0; + +- debug("%s: retries left %d\n", __func__, retries); ++printf("%s: retries left %d\n", __func__, retries); + if (!retries--) { + printf("DP: Out of sync after %d retries\n", max_retry); + return -EIO; +@@ -1454,7 +1454,7 @@ static int tegra_dc_dp_check_sink(struct tegra_dp_priv *dp, + return ret; + if (tegra_dc_dp_explore_link_cfg(dp, link_cfg, dp->sor, + timing)) { +- debug("dp: %s: error to configure link\n", __func__); ++printf("dp: %s: error to configure link\n", __func__); + continue; + } + +@@ -1484,19 +1484,19 @@ int tegra_dp_enable(struct udevice *dev, int panel_bpp, + tegra_dc_dpaux_enable(priv); + + if (tegra_dp_hpd_plug(priv) < 0) { +- debug("dp: hpd plug failed\n"); ++printf("dp: hpd plug failed\n"); + return -EIO; + } + + link_cfg->bits_per_pixel = panel_bpp; + if (tegra_dc_dp_init_max_link_cfg(timing, priv, link_cfg)) { +- debug("dp: failed to init link configuration\n"); ++printf("dp: failed to init link configuration\n"); + return -ENOLINK; + } + + ret = uclass_first_device(UCLASS_VIDEO_BRIDGE, &sor); + if (ret || !sor) { +- debug("dp: failed to find SOR device: ret=%d\n", ret); ++printf("dp: failed to find SOR device: ret=%d\n", ret); + return ret; + } + priv->sor = sor; +@@ -1514,7 +1514,7 @@ int tegra_dp_enable(struct udevice *dev, int panel_bpp, + } while ((retry++ < DP_POWER_ON_MAX_TRIES) && ret); + + if (ret || retry >= DP_POWER_ON_MAX_TRIES) { +- debug("dp: failed to power on panel (0x%x)\n", ret); ++printf("dp: failed to power on panel (0x%x)\n", ret); + return -ENETUNREACH; + goto error_enable; + } +@@ -1522,18 +1522,18 @@ int tegra_dp_enable(struct udevice *dev, int panel_bpp, + /* Confirm DP plugging status */ + if (!(tegra_dpaux_readl(priv, DPAUX_DP_AUXSTAT) & + DPAUX_DP_AUXSTAT_HPD_STATUS_PLUGGED)) { +- debug("dp: could not detect HPD\n"); ++printf("dp: could not detect HPD\n"); + return -ENXIO; + } + + /* Check DP version */ + if (tegra_dc_dp_dpcd_read(priv, DP_DPCD_REV, &priv->revision)) { +- debug("dp: failed to read the revision number from sink\n"); ++printf("dp: failed to read the revision number from sink\n"); + return -EIO; + } + + if (tegra_dc_dp_explore_link_cfg(priv, link_cfg, sor, timing)) { +- debug("dp: error configuring link\n"); ++printf("dp: error configuring link\n"); + return -ENOMEDIUM; + } + +@@ -1557,7 +1557,7 @@ int tegra_dp_enable(struct udevice *dev, int panel_bpp, + + ret = video_bridge_set_backlight(sor, 80); + if (ret) { +- debug("dp: failed to set backlight\n"); ++printf("dp: failed to set backlight\n"); + return ret; + } + +diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c +index ef1a2e6dc..e2b6b20e5 100644 +--- a/drivers/video/tegra124/sor.c ++++ b/drivers/video/tegra124/sor.c +@@ -104,7 +104,7 @@ static int tegra_dc_sor_poll_register(struct tegra_dc_sor_data *sor, u32 reg, + udelay(poll_interval_us); + } while (get_timer(start) < timeout_ms); + +- debug("sor_poll_register 0x%x: timeout, (reg_val)0x%08x & (mask)0x%08x != (exp_val)0x%08x\n", ++printf("sor_poll_register 0x%x: timeout, (reg_val)0x%08x & (mask)0x%08x != (exp_val)0x%08x\n", + reg, reg_val, mask, exp_val); + + return -ETIMEDOUT; +@@ -132,7 +132,7 @@ int tegra_dc_sor_set_power_state(struct udevice *dev, int pu_pd) + PWR_SETTING_NEW_DEFAULT_MASK, + PWR_SETTING_NEW_DONE, + 100, TEGRA_SOR_TIMEOUT_MS)) { +- debug("dc timeout waiting for SOR_PWR = NEW_DONE\n"); ++printf("dc timeout waiting for SOR_PWR = NEW_DONE\n"); + return -EFAULT; + } + +@@ -204,7 +204,7 @@ static int tegra_dc_sor_enable_lane_sequencer(struct tegra_dc_sor_data *sor, + LANE_SEQ_CTL_SETTING_MASK, + LANE_SEQ_CTL_SETTING_NEW_DONE, + 100, TEGRA_SOR_TIMEOUT_MS)) { +- debug("dp: timeout while waiting for SOR lane sequencer to power down lanes\n"); ++printf("dp: timeout while waiting for SOR lane sequencer to power down lanes\n"); + return -1; + } + +@@ -231,7 +231,7 @@ static int tegra_dc_sor_power_dplanes(struct udevice *dev, + reg_val |= DP_PADCTL_PD_TXD_0_NO; + break; + default: +- debug("dp: invalid lane number %d\n", lane_count); ++printf("dp: invalid lane number %d\n", lane_count); + return -1; + } + +@@ -269,7 +269,7 @@ static void tegra_dc_sor_config_pwm(struct tegra_dc_sor_data *sor, u32 pwm_div, + PWM_CTL_SETTING_NEW_SHIFT, + PWM_CTL_SETTING_NEW_DONE, + 100, TEGRA_SOR_TIMEOUT_MS)) { +- debug("dp: timeout while waiting for SOR PWM setting\n"); ++printf("dp: timeout while waiting for SOR PWM setting\n"); + } + } + +@@ -358,7 +358,7 @@ static int tegra_dc_sor_io_set_dpd(struct tegra_dc_sor_data *sor, int up) + } while ((reg_val & APBDEV_PMC_IO_DPD2_STATUS_LVDS_ON) != 0); + + if ((reg_val & APBDEV_PMC_IO_DPD2_STATUS_LVDS_ON) != 0) { +- debug("PMC_IO_DPD2 polling failed (0x%x)\n", reg_val); ++printf("PMC_IO_DPD2 polling failed (0x%x)\n", reg_val); + return -EIO; + } + +@@ -739,7 +739,7 @@ int tegra_dc_sor_enable_dp(struct udevice *dev, + + ret = tegra_dc_sor_power_up(dev, 0); + if (ret) { +- debug("DP failed to power up\n"); ++printf("DP failed to power up\n"); + return ret; + } + +@@ -750,7 +750,7 @@ int tegra_dc_sor_enable_dp(struct udevice *dev, + tegra_dc_sor_power_dplanes(dev, link_cfg->lane_count, 1); + + tegra_dc_sor_set_dp_mode(dev, link_cfg); +- debug("%s ret\n", __func__); ++printf("%s ret\n", __func__); + + return 0; + } +@@ -764,7 +764,7 @@ int tegra_dc_sor_attach(struct udevice *dc_dev, struct udevice *dev, + u32 reg_val; + + /* Use the first display controller */ +- debug("%s\n", __func__); ++printf("%s\n", __func__); + disp_ctrl = (struct dc_ctlr *)dev_read_addr(dc_dev); + + tegra_dc_sor_enable_dc(disp_ctrl); +@@ -819,13 +819,13 @@ int tegra_dc_sor_attach(struct udevice *dc_dev, struct udevice *dev, + printf("dc timeout waiting for OPMOD = AWAKE\n"); + return -ETIMEDOUT; + } else { +- debug("%s: sor is attached\n", __func__); ++printf("%s: sor is attached\n", __func__); + } + + #if DEBUG_SOR + dump_sor_reg(sor); + #endif +- debug("%s: ret=%d\n", __func__, 0); ++printf("%s: ret=%d\n", __func__, 0); + + return 0; + } +@@ -874,9 +874,9 @@ int tegra_dc_sor_set_voltage_swing(struct udevice *dev, + pre_emphasis = 0; + break; + case SOR_LINK_SPEED_G5_4: +- debug("T124 does not support 5.4G link clock.\n"); ++printf("T124 does not support 5.4G link clock.\n"); + default: +- debug("Invalid sor link bandwidth: %d\n", link_cfg->link_bw); ++printf("Invalid sor link bandwidth: %d\n", link_cfg->link_bw); + return -ENOLINK; + } + +@@ -922,7 +922,7 @@ void tegra_dc_sor_power_down_unused_lanes(struct udevice *dev, + + err = tegra_dc_sor_enable_lane_sequencer(sor, 0, 0); + if (err) { +- debug("Wait for lane power down failed: %d\n", err); ++printf("Wait for lane power down failed: %d\n", err); + return; + } + } +@@ -945,7 +945,7 @@ int tegra_sor_precharge_lanes(struct udevice *dev, + val |= DP_PADCTL_PD_TXD_0_NO; + break; + default: +- debug("dp: invalid lane number %d\n", cfg->lane_count); ++printf("dp: invalid lane number %d\n", cfg->lane_count); + return -EINVAL; + } + +@@ -976,7 +976,7 @@ int tegra_dc_sor_detach(struct udevice *dc_dev, struct udevice *dev) + unsigned long dc_int_mask; + int ret; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + /* Use the first display controller */ + disp_ctrl = (struct dc_ctlr *)dev_read_addr(dev); + +@@ -992,7 +992,7 @@ int tegra_dc_sor_detach(struct udevice *dc_dev, struct udevice *dev) + TEST_ACT_HEAD_OPMODE_DEFAULT_MASK, + TEST_ACT_HEAD_OPMODE_SLEEP, 100, + TEGRA_SOR_ATTACH_TIMEOUT_MS)) { +- debug("dc timeout waiting for OPMOD = SLEEP\n"); ++printf("dc timeout waiting for OPMOD = SLEEP\n"); + ret = -ETIMEDOUT; + goto err; + } +@@ -1023,7 +1023,7 @@ int tegra_dc_sor_detach(struct udevice *dc_dev, struct udevice *dev) + + return 0; + err: +- debug("%s: ret=%d\n", __func__, ret); ++printf("%s: ret=%d\n", __func__, ret); + + return ret; + } +@@ -1035,7 +1035,7 @@ static int tegra_sor_set_backlight(struct udevice *dev, int percent) + + ret = panel_enable_backlight(priv->panel); + if (ret) { +- debug("sor: Cannot enable panel backlight\n"); ++printf("sor: Cannot enable panel backlight\n"); + return ret; + } + +@@ -1056,7 +1056,7 @@ static int tegra_sor_of_to_plat(struct udevice *dev) + ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "nvidia,panel", + &priv->panel); + if (ret) { +- debug("%s: Cannot find panel for '%s' (ret=%d)\n", __func__, ++printf("%s: Cannot find panel for '%s' (ret=%d)\n", __func__, + dev->name, ret); + return ret; + } +diff --git a/drivers/video/ti/am335x-fb.c b/drivers/video/ti/am335x-fb.c +index 8b41dac66..9907550ee 100644 +--- a/drivers/video/ti/am335x-fb.c ++++ b/drivers/video/ti/am335x-fb.c +@@ -178,7 +178,7 @@ static ulong am335x_dpll_round_rate(struct dpll_data *dd, ulong rate) + } + } + +- debug("DPLL display: best error %d Hz (M %d, N %d, DIV %d)\n", ++printf("DPLL display: best error %d Hz (M %d, N %d, DIV %d)\n", + err_r, dd->rounded_m, dd->rounded_n, dd->rounded_div); + + return dd->rounded_rate; +@@ -250,12 +250,12 @@ int am335xfb_init(struct am335x_lcdpanel *panel) + return -1; + } + +- debug("setting up LCD-Controller for %dx%dx%d (hfp=%d,hbp=%d,hsw=%d / ", ++printf("setting up LCD-Controller for %dx%dx%d (hfp=%d,hbp=%d,hsw=%d / ", + panel->hactive, panel->vactive, panel->bpp, + panel->hfp, panel->hbp, panel->hsw); +- debug("vfp=%d,vbp=%d,vsw=%d / clk=%d)\n", ++printf("vfp=%d,vbp=%d,vsw=%d / clk=%d)\n", + panel->vfp, panel->vfp, panel->vsw, panel->pxl_clk); +- debug("using frambuffer at 0x%08x with size %d.\n", ++printf("using frambuffer at 0x%08x with size %d.\n", + (unsigned int)gd->fb_base, FBSIZE(panel)); + + rate = am335x_fb_set_pixel_clk_rate(lcdhw, panel->pxl_clk); +@@ -275,7 +275,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel) + if (panel->panel_power_ctrl != NULL) + panel->panel_power_ctrl(1); + +- debug("am335x-fb: wait for stable power ...\n"); ++printf("am335x-fb: wait for stable power ...\n"); + mdelay(panel->pup_delay); + lcdhw->clkc_enable = LCDC_CLKC_ENABLE_CORECLKEN | + LCDC_CLKC_ENABLE_LIDDCLKEN | LCDC_CLKC_ENABLE_DMACLKEN; +@@ -311,7 +311,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel) + LCDC_RASTER_CTRL_TFT_MODE | + LCDC_RASTER_CTRL_ENABLE; + +- debug("am335x-fb: waiting picture to be stable.\n."); ++printf("am335x-fb: waiting picture to be stable.\n."); + mdelay(panel->pon_delay); + + return 0; +diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c +index 81b65f5aa..d7baab37f 100644 +--- a/drivers/video/vidconsole-uclass.c ++++ b/drivers/video/vidconsole-uclass.c +@@ -363,7 +363,7 @@ static void vidconsole_escape_char(struct udevice *dev, char ch) + priv->ycur = 0; + priv->xcur_frac = priv->xstart_frac; + } else { +- debug("unsupported clear mode: %d\n", mode); ++printf("unsupported clear mode: %d\n", mode); + } + break; + } +@@ -467,7 +467,7 @@ static void vidconsole_escape_char(struct udevice *dev, char ch) + break; + } + default: +- debug("unrecognized escape sequence: %*s\n", ++printf("unrecognized escape sequence: %*s\n", + priv->escape_len, priv->escape_buf); + } + +diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c +index 96ec6f80a..fd5985a1a 100644 +--- a/drivers/video/video-uclass.c ++++ b/drivers/video/video-uclass.c +@@ -96,7 +96,7 @@ int video_reserve(ulong *addrp) + dev; + uclass_find_next_device(&dev)) { + size = alloc_fb(dev, addrp); +- debug("%s: Reserving %lx bytes at %lx for video device '%s'\n", ++printf("%s: Reserving %lx bytes at %lx for video device '%s'\n", + __func__, size, *addrp, dev->name); + } + +@@ -106,7 +106,7 @@ int video_reserve(ulong *addrp) + + gd->video_bottom = *addrp; + gd->fb_base = *addrp; +- debug("Video frame buffers from %lx to %lx\n", gd->video_bottom, ++printf("Video frame buffers from %lx to %lx\n", gd->video_bottom, + gd->video_top); + + return 0; +@@ -379,13 +379,13 @@ static int video_post_probe(struct udevice *dev) + drv_name = priv->vidconsole_drv_name; + ret = device_bind_driver(dev, drv_name, str, &cons); + if (ret) { +- debug("%s: Cannot bind console driver\n", __func__); ++printf("%s: Cannot bind console driver\n", __func__); + return ret; + } + + ret = device_probe(cons); + if (ret) { +- debug("%s: Cannot probe console driver\n", __func__); ++printf("%s: Cannot probe console driver\n", __func__); + return ret; + } + +@@ -419,7 +419,7 @@ static int video_post_bind(struct udevice *dev) + dev->name); + return -ENOSPC; + } +- debug("%s: Claiming %lx bytes at %lx for video device '%s'\n", ++printf("%s: Claiming %lx bytes at %lx for video device '%s'\n", + __func__, size, addr, dev->name); + uc_priv->video_ptr = addr; + +diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c +index 1e6f07ff4..a444867a6 100644 +--- a/drivers/video/video_bmp.c ++++ b/drivers/video/video_bmp.c +@@ -50,7 +50,7 @@ static void video_display_rle8_bitmap(struct udevice *dev, + int x, y; + int decode = 1; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + bmap = (uchar *)bmp + get_unaligned_le32(&bmp->header.data_offset); + + x = 0; +@@ -176,7 +176,7 @@ static void video_set_cmap(struct udevice *dev, + int i; + ushort *cmap = priv->cmap; + +- debug("%s: colours=%d\n", __func__, colours); ++printf("%s: colours=%d\n", __func__, colours); + for (i = 0; i < colours; ++i) { + *cmap = ((cte->red << 8) & 0xf800) | + ((cte->green << 3) & 0x07e0) | +@@ -214,7 +214,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, + height = get_unaligned_le32(&bmp->header.height); + bmp_bpix = get_unaligned_le16(&bmp->header.bit_count); + hdr_size = get_unaligned_le16(&bmp->header.size); +- debug("hdr_size=%d, bmp_bpix=%d\n", hdr_size, bmp_bpix); ++printf("hdr_size=%d, bmp_bpix=%d\n", hdr_size, bmp_bpix); + palette = (void *)bmp + 14 + hdr_size; + + colours = 1 << bmp_bpix; +@@ -243,7 +243,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, + return -EPERM; + } + +- debug("Display-bmp: %d x %d with %d colours, display %d\n", ++printf("Display-bmp: %d x %d with %d colours, display %d\n", + (int)width, (int)height, (int)colours, 1 << bpix); + + if (bmp_bpix == 8) +@@ -275,7 +275,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, + cmap_base = priv->cmap; + #ifdef CONFIG_VIDEO_BMP_RLE8 + u32 compression = get_unaligned_le32(&bmp->header.compression); +- debug("compressed %d %d\n", compression, BMP_BI_RLE8); ++printf("compressed %d %d\n", compression, BMP_BI_RLE8); + if (compression == BMP_BI_RLE8) { + if (bpix != 16) { + /* TODO implement render code for bpix != 16 */ +diff --git a/drivers/virtio/virtio-uclass.c b/drivers/virtio/virtio-uclass.c +index 0379536c5..1c1521d0f 100644 +--- a/drivers/virtio/virtio-uclass.c ++++ b/drivers/virtio/virtio-uclass.c +@@ -160,7 +160,7 @@ int virtio_finalize_features(struct udevice *vdev) + if (ret) + return ret; + if (!(status & VIRTIO_CONFIG_S_FEATURES_OK)) { +- debug("(%s): device refuses features %x\n", vdev->name, status); ++printf("(%s): device refuses features %x\n", vdev->name, status); + return -ENODEV; + } + +@@ -228,13 +228,13 @@ static int virtio_uclass_post_probe(struct udevice *udev) + int ret; + + if (uc_priv->device >= VIRTIO_ID_MAX_NUM) { +- debug("(%s): virtio device ID %d exceeds maximum num\n", ++printf("(%s): virtio device ID %d exceeds maximum num\n", + udev->name, uc_priv->device); + return 0; + } + + if (!virtio_drv_name[uc_priv->device]) { +- debug("(%s): underlying virtio device driver unavailable\n", ++printf("(%s): underlying virtio device driver unavailable\n", + udev->name); + return 0; + } +@@ -248,7 +248,7 @@ static int virtio_uclass_post_probe(struct udevice *udev) + ret = device_bind_driver(udev, virtio_drv_name[uc_priv->device], + str, &vdev); + if (ret == -ENOENT) { +- debug("(%s): no driver configured\n", udev->name); ++printf("(%s): no driver configured\n", udev->name); + return 0; + } + if (ret) { +@@ -298,7 +298,7 @@ static int virtio_uclass_child_pre_probe(struct udevice *vdev) + + /* Figure out what features the device supports */ + virtio_get_features(vdev, &device_features); +- debug("(%s) plain device features supported %016llx\n", ++printf("(%s) plain device features supported %016llx\n", + vdev->name, device_features); + if (!(device_features & (1ULL << VIRTIO_F_VERSION_1))) + uc_priv->legacy = true; +@@ -326,10 +326,10 @@ static int virtio_uclass_child_pre_probe(struct udevice *vdev) + } + + if (uc_priv->legacy) { +- debug("(%s): legacy virtio device\n", vdev->name); ++printf("(%s): legacy virtio device\n", vdev->name); + uc_priv->features = driver_features_legacy & device_features; + } else { +- debug("(%s): v1.0 complaint virtio device\n", vdev->name); ++printf("(%s): v1.0 complaint virtio device\n", vdev->name); + uc_priv->features = driver_features & device_features; + } + +@@ -339,7 +339,7 @@ static int virtio_uclass_child_pre_probe(struct udevice *vdev) + (i == VIRTIO_F_VERSION_1)) + __virtio_set_bit(vdev->parent, i); + +- debug("(%s) final negotiated features supported %016llx\n", ++printf("(%s) final negotiated features supported %016llx\n", + vdev->name, uc_priv->features); + ret = virtio_finalize_features(vdev); + if (ret) +diff --git a/drivers/virtio/virtio_mmio.c b/drivers/virtio/virtio_mmio.c +index 78c15c821..521b65ab5 100644 +--- a/drivers/virtio/virtio_mmio.c ++++ b/drivers/virtio/virtio_mmio.c +@@ -173,7 +173,7 @@ static int virtio_mmio_set_features(struct udevice *udev) + + /* Make sure there is are no mixed devices */ + if (priv->version == 2 && uc_priv->legacy) { +- debug("New virtio-mmio devices (version 2) must provide VIRTIO_F_VERSION_1 feature!\n"); ++printf("New virtio-mmio devices (version 2) must provide VIRTIO_F_VERSION_1 feature!\n"); + return -EINVAL; + } + +@@ -231,7 +231,7 @@ static struct virtqueue *virtio_mmio_setup_vq(struct udevice *udev, + * pretending to be successful. + */ + if (q_pfn >> 32) { +- debug("platform bug: legacy virtio-mmio must not be used with RAM above 0x%llxGB\n", ++printf("platform bug: legacy virtio-mmio must not be used with RAM above 0x%llxGB\n", + 0x1ULL << (32 + PAGE_SHIFT - 30)); + err = -E2BIG; + goto error_bad_pfn; +@@ -354,14 +354,14 @@ static int virtio_mmio_probe(struct udevice *udev) + /* Check magic value */ + magic = readl(priv->base + VIRTIO_MMIO_MAGIC_VALUE); + if (magic != ('v' | 'i' << 8 | 'r' << 16 | 't' << 24)) { +- debug("(%s): wrong magic value 0x%08x!\n", udev->name, magic); ++printf("(%s): wrong magic value 0x%08x!\n", udev->name, magic); + return 0; + } + + /* Check device version */ + priv->version = readl(priv->base + VIRTIO_MMIO_VERSION); + if (priv->version < 1 || priv->version > 2) { +- debug("(%s): version %d not supported!\n", ++printf("(%s): version %d not supported!\n", + udev->name, priv->version); + return 0; + } +@@ -380,7 +380,7 @@ static int virtio_mmio_probe(struct udevice *udev) + if (priv->version == 1) + writel(PAGE_SIZE, priv->base + VIRTIO_MMIO_GUEST_PAGE_SIZE); + +- debug("(%s): device (%d) vendor (%08x) version (%d)\n", udev->name, ++printf("(%s): device (%d) vendor (%08x) version (%d)\n", udev->name, + uc_priv->device, uc_priv->vendor, priv->version); + + return 0; +diff --git a/drivers/virtio/virtio_pci_legacy.c b/drivers/virtio/virtio_pci_legacy.c +index 03fa5cb60..1a0879aaa 100644 +--- a/drivers/virtio/virtio_pci_legacy.c ++++ b/drivers/virtio/virtio_pci_legacy.c +@@ -322,10 +322,10 @@ static int virtio_pci_probe(struct udevice *udev) + priv->ioaddr = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0, PCI_REGION_IO); + if (!priv->ioaddr) + return -ENXIO; +- debug("(%s): virtio legacy device reg base %04lx\n", ++printf("(%s): virtio legacy device reg base %04lx\n", + udev->name, (ulong)priv->ioaddr); + +- debug("(%s): device (%d) vendor (%08x) version (%d)\n", udev->name, ++printf("(%s): device (%d) vendor (%08x) version (%d)\n", udev->name, + uc_priv->device, uc_priv->vendor, revision); + + return 0; +diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c +index dfbbf8a62..188f1ff99 100644 +--- a/drivers/virtio/virtio_pci_modern.c ++++ b/drivers/virtio/virtio_pci_modern.c +@@ -245,7 +245,7 @@ static int virtio_pci_set_features(struct udevice *udev) + struct virtio_dev_priv *uc_priv = dev_get_uclass_priv(udev); + + if (!__virtio_test_bit(udev, VIRTIO_F_VERSION_1)) { +- debug("virtio: device uses modern interface but does not have VIRTIO_F_VERSION_1\n"); ++printf("virtio: device uses modern interface but does not have VIRTIO_F_VERSION_1\n"); + return -EINVAL; + } + +@@ -505,7 +505,7 @@ static int virtio_pci_probe(struct udevice *udev) + priv->common = virtio_pci_map_capability(udev, common); + priv->notify_base = virtio_pci_map_capability(udev, notify); + priv->device = virtio_pci_map_capability(udev, device); +- debug("(%p): common @ %p, notify base @ %p, device @ %p\n", ++printf("(%p): common @ %p, notify base @ %p, device @ %p\n", + udev, priv->common, priv->notify_base, priv->device); + + /* Read notify_off_multiplier from config space */ +@@ -513,7 +513,7 @@ static int virtio_pci_probe(struct udevice *udev) + notify_off_multiplier); + dm_pci_read_config32(udev, offset, &priv->notify_offset_multiplier); + +- debug("(%s): device (%d) vendor (%08x) version (%d)\n", udev->name, ++printf("(%s): device (%d) vendor (%08x) version (%d)\n", udev->name, + uc_priv->device, uc_priv->vendor, revision); + + return 0; +diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c +index 7f1cbc593..cd9ca7284 100644 +--- a/drivers/virtio/virtio_ring.c ++++ b/drivers/virtio/virtio_ring.c +@@ -33,7 +33,7 @@ int virtqueue_add(struct virtqueue *vq, struct virtio_sg *sgs[], + descs_used = total_sg; + + if (vq->num_free < descs_used) { +- debug("Can't add buf len %i - avail = %i\n", ++printf("Can't add buf len %i - avail = %i\n", + descs_used, vq->num_free); + /* + * FIXME: for historical reasons, we force a notify here if +@@ -166,7 +166,7 @@ void *virtqueue_get_buf(struct virtqueue *vq, unsigned int *len) + u16 last_used; + + if (!more_used(vq)) { +- debug("(%s.%d): No more buffers in queue\n", ++printf("(%s.%d): No more buffers in queue\n", + vq->vdev->name, vq->index); + return NULL; + } +@@ -179,7 +179,7 @@ void *virtqueue_get_buf(struct virtqueue *vq, unsigned int *len) + if (len) { + *len = virtio32_to_cpu(vq->vdev, + vq->vring.used->ring[last_used].len); +- debug("(%s.%d): last used idx %u with len %u\n", ++printf("(%s.%d): last used idx %u with len %u\n", + vq->vdev->name, vq->index, i, *len); + } + +@@ -282,7 +282,7 @@ struct virtqueue *vring_create_virtqueue(unsigned int index, unsigned int num, + free(queue); + return NULL; + } +- debug("(%s): created vring @ %p for vq @ %p with num %u\n", udev->name, ++printf("(%s): created vring @ %p for vq @ %p with num %u\n", udev->name, + queue, vq, num); + + return vq; +diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c +index 9314c0a03..cfdd0ee03 100644 +--- a/drivers/virtio/virtio_rng.c ++++ b/drivers/virtio/virtio_rng.c +@@ -66,7 +66,7 @@ static int virtio_rng_probe(struct udevice *dev) + + ret = virtio_find_vqs(dev, 1, &priv->rng_vq); + if (ret < 0) { +- debug("%s: virtio_find_vqs failed\n", __func__); ++printf("%s: virtio_find_vqs failed\n", __func__); + return ret; + } + +diff --git a/drivers/w1-eeprom/w1-eeprom-uclass.c b/drivers/w1-eeprom/w1-eeprom-uclass.c +index 7a02af3dd..993e38013 100644 +--- a/drivers/w1-eeprom/w1-eeprom-uclass.c ++++ b/drivers/w1-eeprom/w1-eeprom-uclass.c +@@ -65,14 +65,14 @@ int w1_eeprom_dm_init(void) + + ret = uclass_get(UCLASS_W1_EEPROM, &uc); + if (ret) { +- debug("W1_EEPROM uclass not available\n"); ++printf("W1_EEPROM uclass not available\n"); + return ret; + } + + uclass_foreach_dev(dev, uc) { + ret = device_probe(dev); + if (ret == -ENODEV) { /* No such device. */ +- debug("W1_EEPROM not available.\n"); ++printf("W1_EEPROM not available.\n"); + continue; + } + +diff --git a/drivers/w1/w1-gpio.c b/drivers/w1/w1-gpio.c +index 3b0ead6f6..4e18b39a2 100644 +--- a/drivers/w1/w1-gpio.c ++++ b/drivers/w1/w1-gpio.c +@@ -44,7 +44,7 @@ static bool w1_gpio_read_bit(struct udevice *dev) + + val = dm_gpio_get_value(&pdata->gpio); + if (val < 0) +- debug("error in retrieving GPIO value"); ++printf("error in retrieving GPIO value"); + udelay(W1_TIMING_F); + + return val; +@@ -101,7 +101,7 @@ static bool w1_gpio_reset(struct udevice *dev) + + val = dm_gpio_get_value(&pdata->gpio); + if (val < 0) +- debug("error in retrieving GPIO value"); ++printf("error in retrieving GPIO value"); + + /* if nobody pulled the bus down , it means nobody is on the bus */ + if (val != 0) +@@ -112,7 +112,7 @@ static bool w1_gpio_reset(struct udevice *dev) + /* read again, the other end should leave the bus free */ + val = dm_gpio_get_value(&pdata->gpio); + if (val < 0) +- debug("error in retrieving GPIO value"); ++printf("error in retrieving GPIO value"); + + /* bus is not going up again, so we have an error */ + if (val != 1) +diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c +index b98927389..a066b210e 100644 +--- a/drivers/w1/w1-uclass.c ++++ b/drivers/w1/w1-uclass.c +@@ -39,7 +39,7 @@ int w1_bus_find_dev(const struct udevice *bus, u64 id, struct udevice + !ret && dev; + uclass_next_device(&dev)) { + if (ret || !dev) { +- debug("cannot find w1 eeprom dev\n"); ++printf("cannot find w1 eeprom dev\n"); + return -ENODEV; + } + +@@ -93,7 +93,7 @@ int w1_register_new_device(u64 id, struct udevice *bus) + } + } + +- debug("%s: No matches found: error %d\n", __func__, ret); ++printf("%s: No matches found: error %d\n", __func__, ret); + + return ret; + } +@@ -123,7 +123,7 @@ static int w1_enumerate(struct udevice *bus) + * Return 0 - device(s) present, 1 - no devices present. + */ + if (ops->reset(bus)) { +- debug("%s: No devices present on the wire.\n", ++printf("%s: No devices present on the wire.\n", + __func__); + break; + } +@@ -166,7 +166,7 @@ static int w1_enumerate(struct udevice *bus) + } + desc_bit = last_zero; + +- debug("%s: Detected new device 0x%llx (family 0x%x)\n", ++printf("%s: Detected new device 0x%llx (family 0x%x)\n", + bus->name, rn, (u8)(rn & 0xff)); + + /* attempt to register as w1 device */ +@@ -193,7 +193,7 @@ int w1_get_bus(int busnum, struct udevice **busp) + } + + if (!ret) { +- debug("Cannot find w1 bus %d\n", busnum); ++printf("Cannot find w1 bus %d\n", busnum); + ret = -ENODEV; + } + +diff --git a/drivers/watchdog/ast2600_wdt.c b/drivers/watchdog/ast2600_wdt.c +index bc9842089..c049ac366 100644 +--- a/drivers/watchdog/ast2600_wdt.c ++++ b/drivers/watchdog/ast2600_wdt.c +@@ -93,7 +93,7 @@ static const struct udevice_id ast2600_wdt_ids[] = { + + static int ast2600_wdt_probe(struct udevice *dev) + { +- debug("%s() wdt%u\n", __func__, dev_seq(dev)); ++printf("%s() wdt%u\n", __func__, dev_seq(dev)); + ast2600_wdt_stop(dev); + + return 0; +diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c +index f7b5a1adc..2d293d9bb 100644 +--- a/drivers/watchdog/ast_wdt.c ++++ b/drivers/watchdog/ast_wdt.c +@@ -113,7 +113,7 @@ static const struct udevice_id ast_wdt_ids[] = { + + static int ast_wdt_probe(struct udevice *dev) + { +- debug("%s() wdt%u\n", __func__, dev_seq(dev)); ++printf("%s() wdt%u\n", __func__, dev_seq(dev)); + ast_wdt_stop(dev); + + return 0; +diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c +index 647ae325e..a810a1174 100644 +--- a/drivers/watchdog/at91sam9_wdt.c ++++ b/drivers/watchdog/at91sam9_wdt.c +@@ -109,7 +109,7 @@ static int at91_wdt_probe(struct udevice *dev) + if (!priv->regs) + return -EINVAL; + +- debug("%s: Probing wdt%u\n", __func__, dev_seq(dev)); ++printf("%s: Probing wdt%u\n", __func__, dev_seq(dev)); + + return 0; + } +diff --git a/drivers/watchdog/bcm6345_wdt.c b/drivers/watchdog/bcm6345_wdt.c +index 677b1347c..ae18188e9 100644 +--- a/drivers/watchdog/bcm6345_wdt.c ++++ b/drivers/watchdog/bcm6345_wdt.c +@@ -47,10 +47,10 @@ static int bcm6345_wdt_start(struct udevice *dev, u64 timeout, ulong flags) + u32 val = priv->clk_rate / 1000 * timeout; + + if (val < WDT_VAL_MIN) { +- debug("watchdog won't fire with less than 2 ticks\n"); ++printf("watchdog won't fire with less than 2 ticks\n"); + val = WDT_VAL_MIN; + } else if (val > WDT_VAL_MAX) { +- debug("maximum watchdog timeout exceeded\n"); ++printf("maximum watchdog timeout exceeded\n"); + val = WDT_VAL_MAX; + } + +diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c +index 966d010e4..22ca9332f 100644 +--- a/drivers/watchdog/cdns_wdt.c ++++ b/drivers/watchdog/cdns_wdt.c +@@ -95,7 +95,7 @@ static int cdns_wdt_reset(struct udevice *dev) + { + struct cdns_wdt_priv *priv = dev_get_priv(dev); + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + cdns_wdt_writereg(&priv->regs->restart, CDNS_WDT_RESTART_KEY); + +@@ -148,7 +148,7 @@ static int cdns_wdt_start(struct udevice *dev, u64 timeout, ulong flags) + timeout = max_t(u64, timeout, CDNS_WDT_MIN_TIMEOUT); + timeout = min_t(u64, timeout, CDNS_WDT_MAX_TIMEOUT); + +- debug("%s: CLK_FREQ %ld, timeout %lld\n", __func__, clk_f, timeout); ++printf("%s: CLK_FREQ %ld, timeout %lld\n", __func__, clk_f, timeout); + + if (clk_f <= CDNS_WDT_CLK_75MHZ) { + prescaler = CDNS_WDT_PRESCALE_512; +@@ -223,7 +223,7 @@ static int cdns_wdt_stop(struct udevice *dev) + */ + static int cdns_wdt_probe(struct udevice *dev) + { +- debug("%s: Probing wdt%u\n", __func__, dev_seq(dev)); ++printf("%s: Probing wdt%u\n", __func__, dev_seq(dev)); + + return 0; + } +@@ -238,7 +238,7 @@ static int cdns_wdt_of_to_plat(struct udevice *dev) + + priv->rst = dev_read_bool(dev, "reset-on-timeout"); + +- debug("%s: reset %d\n", __func__, priv->rst); ++printf("%s: reset %d\n", __func__, priv->rst); + + return 0; + } +diff --git a/drivers/watchdog/ftwdt010_wdt.c b/drivers/watchdog/ftwdt010_wdt.c +index 6aed41642..f18ffbcd3 100644 +--- a/drivers/watchdog/ftwdt010_wdt.c ++++ b/drivers/watchdog/ftwdt010_wdt.c +@@ -29,7 +29,7 @@ int ftwdt010_wdt_settimeout(unsigned int timeout) + + struct ftwdt010_wdt *wd = (struct ftwdt010_wdt *)CONFIG_FTWDT010_BASE; + +- debug("Activating WDT..\n"); ++printf("Activating WDT..\n"); + + /* Check if disabled */ + if (readl(&wd->wdcr) & ~FTWDT010_WDCR_ENABLE) { +@@ -67,7 +67,7 @@ void ftwdt010_wdt_disable(void) + { + struct ftwdt010_wdt *wd = (struct ftwdt010_wdt *)CONFIG_FTWDT010_BASE; + +- debug("Deactivating WDT..\n"); ++printf("Deactivating WDT..\n"); + + /* + * It was defined with CONFIG_WATCHDOG_NOWAYOUT in Linux +diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c +index ca2bc7cfb..fdcbfeb23 100644 +--- a/drivers/watchdog/omap_wdt.c ++++ b/drivers/watchdog/omap_wdt.c +@@ -242,7 +242,7 @@ static int omap3_wdt_probe(struct udevice *dev) + return -EINVAL; + + priv->wdt_trgr_pattern = 0x1234; +- debug("%s: Probing wdt%u\n", __func__, dev_seq(dev)); ++printf("%s: Probing wdt%u\n", __func__, dev_seq(dev)); + return 0; + } + +diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c +index cebea426f..7d5e212b8 100644 +--- a/drivers/watchdog/orion_wdt.c ++++ b/drivers/watchdog/orion_wdt.c +@@ -150,7 +150,7 @@ static int orion_wdt_of_to_plat(struct udevice *dev) + + return 0; + err: +- debug("%s: Could not determine Orion wdt IO addresses\n", __func__); ++printf("%s: Could not determine Orion wdt IO addresses\n", __func__); + return -ENXIO; + } + +@@ -159,7 +159,7 @@ static int orion_wdt_probe(struct udevice *dev) + struct orion_wdt_priv *priv = dev_get_priv(dev); + int ret; + +- debug("%s: Probing wdt%u\n", __func__, dev_seq(dev)); ++printf("%s: Probing wdt%u\n", __func__, dev_seq(dev)); + orion_wdt_stop(dev); + + ret = clk_get_by_name(dev, "fixed", &priv->clk); +diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c +index f43cd3fd2..b168f55b5 100644 +--- a/drivers/watchdog/sbsa_gwdt.c ++++ b/drivers/watchdog/sbsa_gwdt.c +@@ -89,7 +89,7 @@ static int sbsa_gwdt_expire_now(struct udevice *dev, ulong flags) + + static int sbsa_gwdt_probe(struct udevice *dev) + { +- debug("%s: Probing wdt%u (sbsa-gwdt)\n", __func__, dev_seq(dev)); ++printf("%s: Probing wdt%u (sbsa-gwdt)\n", __func__, dev_seq(dev)); + + return 0; + } +diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c +index bec8827ce..ea9745e75 100644 +--- a/drivers/watchdog/sp805_wdt.c ++++ b/drivers/watchdog/sp805_wdt.c +@@ -106,7 +106,7 @@ static int sp805_wdt_expire_now(struct udevice *dev, ulong flags) + + static int sp805_wdt_probe(struct udevice *dev) + { +- debug("%s: Probing wdt%u (sp805-wdt)\n", __func__, dev_seq(dev)); ++printf("%s: Probing wdt%u (sp805-wdt)\n", __func__, dev_seq(dev)); + + return 0; + } +diff --git a/drivers/watchdog/tangier_wdt.c b/drivers/watchdog/tangier_wdt.c +index bdc65597d..443e634c4 100644 +--- a/drivers/watchdog/tangier_wdt.c ++++ b/drivers/watchdog/tangier_wdt.c +@@ -80,7 +80,7 @@ static const struct udevice_id tangier_wdt_ids[] = { + + static int tangier_wdt_probe(struct udevice *dev) + { +- debug("%s: Probing wdt%u\n", __func__, dev_seq(dev)); ++printf("%s: Probing wdt%u\n", __func__, dev_seq(dev)); + return 0; + } + +diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c +index 268713529..3c0825745 100644 +--- a/drivers/watchdog/wdt-uclass.c ++++ b/drivers/watchdog/wdt-uclass.c +@@ -35,7 +35,7 @@ int initr_watchdog(void) + */ + if (uclass_get_device_by_seq(UCLASS_WDT, 0, + (struct udevice **)&gd->watchdog_dev)) { +- debug("WDT: Not found by seq!\n"); ++printf("WDT: Not found by seq!\n"); + if (uclass_get_device(UCLASS_WDT, 0, + (struct udevice **)&gd->watchdog_dev)) { + printf("WDT: Not found!\n"); +@@ -113,7 +113,7 @@ int wdt_expire_now(struct udevice *dev, ulong flags) + int ret = 0; + const struct wdt_ops *ops; + +- debug("WDT Resetting: %lu\n", flags); ++printf("WDT Resetting: %lu\n", flags); + ops = device_get_ops(dev); + if (ops->expire_now) { + return ops->expire_now(dev, flags); +diff --git a/drivers/watchdog/xilinx_tb_wdt.c b/drivers/watchdog/xilinx_tb_wdt.c +index 1687a4599..318417544 100644 +--- a/drivers/watchdog/xilinx_tb_wdt.c ++++ b/drivers/watchdog/xilinx_tb_wdt.c +@@ -36,7 +36,7 @@ static int xlnx_wdt_reset(struct udevice *dev) + u32 reg; + struct xlnx_wdt_plat *plat = dev_get_plat(dev); + +- debug("%s ", __func__); ++printf("%s ", __func__); + + /* Read the current contents of TCSR0 */ + reg = readl(&plat->regs->twcsr0); +@@ -54,7 +54,7 @@ static int xlnx_wdt_stop(struct udevice *dev) + struct xlnx_wdt_plat *plat = dev_get_plat(dev); + + if (plat->enable_once) { +- debug("Can't stop Xilinx watchdog.\n"); ++printf("Can't stop Xilinx watchdog.\n"); + return -EBUSY; + } + +@@ -64,7 +64,7 @@ static int xlnx_wdt_stop(struct udevice *dev) + writel(reg & ~XWT_CSR0_EWDT1_MASK, &plat->regs->twcsr0); + writel(~XWT_CSRX_EWDT2_MASK, &plat->regs->twcsr1); + +- debug("Watchdog disabled!\n"); ++printf("Watchdog disabled!\n"); + + return 0; + } +@@ -73,7 +73,7 @@ static int xlnx_wdt_start(struct udevice *dev, u64 timeout, ulong flags) + { + struct xlnx_wdt_plat *plat = dev_get_plat(dev); + +- debug("%s:\n", __func__); ++printf("%s:\n", __func__); + + writel((XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK | XWT_CSR0_EWDT1_MASK), + &plat->regs->twcsr0); +@@ -85,7 +85,7 @@ static int xlnx_wdt_start(struct udevice *dev, u64 timeout, ulong flags) + + static int xlnx_wdt_probe(struct udevice *dev) + { +- debug("%s: Probing wdt%u\n", __func__, dev_seq(dev)); ++printf("%s: Probing wdt%u\n", __func__, dev_seq(dev)); + + return 0; + } +@@ -101,7 +101,7 @@ static int xlnx_wdt_of_to_plat(struct udevice *dev) + plat->enable_once = dev_read_u32_default(dev, "xlnx,wdt-enable-once", + 0); + +- debug("%s: wdt-enable-once %d\n", __func__, plat->enable_once); ++printf("%s: wdt-enable-once %d\n", __func__, plat->enable_once); + + return 0; + } +diff --git a/drivers/xen/events.c b/drivers/xen/events.c +index c490f87b2..15b210e38 100644 +--- a/drivers/xen/events.c ++++ b/drivers/xen/events.c +@@ -107,7 +107,7 @@ void unbind_evtchn(evtchn_port_t port) + int rc; + + if (ev_actions[port].handler == default_handler) +- debug("Default handler for port %d when unbinding\n", port); ++printf("Default handler for port %d when unbinding\n", port); + mask_evtchn(port); + clear_evtchn(port); + +@@ -124,7 +124,7 @@ void unbind_evtchn(evtchn_port_t port) + + void default_handler(evtchn_port_t port, struct pt_regs *regs, void *ignore) + { +- debug("[Port %d] - event received\n", port); ++printf("[Port %d] - event received\n", port); + } + + /** +@@ -176,7 +176,7 @@ void init_events(void) + { + int i; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + for (i = 0; i < NR_EVS; i++) { + ev_actions[i].handler = default_handler; +@@ -192,7 +192,7 @@ void init_events(void) + */ + void fini_events(void) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + /* Dealloc all events */ + unbind_all_ports(); + } +diff --git a/drivers/xen/gnttab.c b/drivers/xen/gnttab.c +index 778729d64..607c3c55f 100644 +--- a/drivers/xen/gnttab.c ++++ b/drivers/xen/gnttab.c +@@ -158,7 +158,7 @@ void get_gnttab_base(phys_addr_t *gnttab_base, phys_size_t *gnttab_sz) + if (gnttab_sz) + *gnttab_sz = (phys_size_t)(res.end - res.start + 1); + +- debug("FDT suggests grant table base at %llx\n", ++printf("FDT suggests grant table base at %llx\n", + *gnttab_base); + } + +@@ -169,7 +169,7 @@ void init_gnttab(void) + xen_pfn_t frames[NR_GRANT_FRAMES]; + int i, rc; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + for (i = NR_RESERVED_ENTRIES; i < NR_GRANT_ENTRIES; i++) + put_free_entry(i); +@@ -200,7 +200,7 @@ void fini_gnttab(void) + struct gnttab_setup_table setup; + int i, rc; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + for (i = 0; i < NR_GRANT_FRAMES; i++) { + xrtp.domid = DOMID_SELF; +diff --git a/drivers/xen/hypervisor.c b/drivers/xen/hypervisor.c +index 256089483..2809260f3 100644 +--- a/drivers/xen/hypervisor.c ++++ b/drivers/xen/hypervisor.c +@@ -234,7 +234,7 @@ void clear_evtchn(uint32_t port) + + int xen_init(void) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + map_shared_info(NULL); + init_events(); +@@ -246,7 +246,7 @@ int xen_init(void) + + void xen_fini(void) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + fini_gnttab(); + fini_xenbus(); +diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c +index 1c5d039ef..7eb5b412e 100644 +--- a/drivers/xen/pvblock.c ++++ b/drivers/xen/pvblock.c +@@ -267,7 +267,7 @@ done: + goto error; + } + +- debug("%llu sectors of %u bytes, bounce buffer at %p\n", ++printf("%llu sectors of %u bytes, bounce buffer at %p\n", + dev->info.sectors, dev->info.sector_size, + dev->bounce_buffer); + +@@ -288,7 +288,7 @@ static void shutdown_blkfront(struct blkfront_dev *dev) + char path[strlen(dev->backend) + strlen("/state") + 1]; + char nodename[strlen(dev->nodename) + strlen("/event-channel") + 1]; + +- debug("Close " DRV_NAME ", device ID %d\n", dev->devid); ++printf("Close " DRV_NAME ", device ID %d\n", dev->devid); + + blkfront_sync(dev); + +@@ -741,7 +741,7 @@ static int on_new_vbd(struct udevice *parent, unsigned int devid) + struct blkfront_plat *plat; + int ret; + +- debug("New " DRV_NAME_BLK ", device ID %d\n", devid); ++printf("New " DRV_NAME_BLK ", device ID %d\n", devid); + + plat = malloc(sizeof(struct blkfront_plat)); + if (!plat) { +diff --git a/drivers/xen/xenbus.c b/drivers/xen/xenbus.c +index 177d14472..9c8c6e32f 100644 +--- a/drivers/xen/xenbus.c ++++ b/drivers/xen/xenbus.c +@@ -541,7 +541,7 @@ void init_xenbus(void) + { + u64 v; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + if (hvm_get_parameter(HVM_PARAM_STORE_EVTCHN, &v)) + BUG(); + xenbus_evtchn = v; +@@ -553,5 +553,5 @@ void init_xenbus(void) + + void fini_xenbus(void) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + } +diff --git a/env/common.c b/env/common.c +index 81e9e0b2a..7bf9b633e 100644 +--- a/env/common.c ++++ b/env/common.c +@@ -80,7 +80,7 @@ void env_set_default(const char *s, int flags) + puts(s); + } + } else { +- debug("Using default environment\n"); ++printf("Using default environment\n"); + } + + flags |= H_DEFAULT; +diff --git a/env/env.c b/env/env.c +index e53400800..065f61804 100644 +--- a/env/env.c ++++ b/env/env.c +@@ -158,7 +158,7 @@ static struct env_driver *env_driver_lookup(enum env_operation op, int prio) + + drv = _env_driver_lookup(loc); + if (!drv) { +- debug("%s: No environment driver for location %d\n", __func__, ++printf("%s: No environment driver for location %d\n", __func__, + loc); + return NULL; + } +@@ -210,7 +210,7 @@ int env_load(void) + if (best_prio == -1) + best_prio = prio; + } else { +- debug("Failed (%d)\n", ret); ++printf("Failed (%d)\n", ret); + } + } + +@@ -224,7 +224,7 @@ int env_load(void) + * at the right place. + */ + if (best_prio >= 0) +- debug("Selecting environment with bad CRC\n"); ++printf("Selecting environment with bad CRC\n"); + else + best_prio = 0; + +@@ -333,7 +333,7 @@ int env_init(void) + if (ret == -ENOENT) + env_set_inited(drv->location); + +- debug("%s: Environment %s init done (ret=%d)\n", __func__, ++printf("%s: Environment %s init done (ret=%d)\n", __func__, + drv->name, ret); + + if (gd->env_valid == ENV_INVALID) +diff --git a/env/flash.c b/env/flash.c +index ebee9069e..3308aeb58 100644 +--- a/env/flash.c ++++ b/env/flash.c +@@ -128,12 +128,12 @@ static int env_flash_save(void) + ulong up_data = 0; + #endif + +- debug("Protect off %08lX ... %08lX\n", (ulong)flash_addr, end_addr); ++printf("Protect off %08lX ... %08lX\n", (ulong)flash_addr, end_addr); + + if (flash_sect_protect(0, (ulong)flash_addr, end_addr)) + goto done; + +- debug("Protect off %08lX ... %08lX\n", ++printf("Protect off %08lX ... %08lX\n", + (ulong)flash_addr_new, end_addr_new); + + if (flash_sect_protect(0, (ulong)flash_addr_new, end_addr_new)) +@@ -146,7 +146,7 @@ static int env_flash_save(void) + + #if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE + up_data = end_addr_new + 1 - ((long)flash_addr_new + CONFIG_ENV_SIZE); +- debug("Data to save 0x%lX\n", up_data); ++printf("Data to save 0x%lX\n", up_data); + if (up_data) { + saved_data = malloc(up_data); + if (saved_data == NULL) { +@@ -157,19 +157,19 @@ static int env_flash_save(void) + memcpy(saved_data, + (void *)((long)flash_addr_new + CONFIG_ENV_SIZE), + up_data); +- debug("Data (start 0x%lX, len 0x%lX) saved at 0x%p\n", ++printf("Data (start 0x%lX, len 0x%lX) saved at 0x%p\n", + (long)flash_addr_new + CONFIG_ENV_SIZE, + up_data, saved_data); + } + #endif + puts("Erasing Flash..."); +- debug(" %08lX ... %08lX ...", (ulong)flash_addr_new, end_addr_new); ++printf(" %08lX ... %08lX ...", (ulong)flash_addr_new, end_addr_new); + + if (flash_sect_erase((ulong)flash_addr_new, end_addr_new)) + goto done; + + puts("Writing to Flash... "); +- debug(" %08lX ... %08lX ...", ++printf(" %08lX ... %08lX ...", + (ulong)&(flash_addr_new->data), + sizeof(env_ptr->data) + (ulong)&(flash_addr_new->data)); + rc = flash_write((char *)&env_new, (ulong)flash_addr_new, +@@ -184,7 +184,7 @@ static int env_flash_save(void) + + #if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE + if (up_data) { /* restore the rest of sector */ +- debug("Restoring the rest of data to 0x%lX len 0x%lX\n", ++printf("Restoring the rest of data to 0x%lX len 0x%lX\n", + (long)flash_addr_new + CONFIG_ENV_SIZE, up_data); + if (flash_write(saved_data, + (long)flash_addr_new + CONFIG_ENV_SIZE, +@@ -247,7 +247,7 @@ static int env_flash_save(void) + ulong up_data = 0; + + up_data = end_addr + 1 - ((long)flash_addr + CONFIG_ENV_SIZE); +- debug("Data to save 0x%lx\n", up_data); ++printf("Data to save 0x%lx\n", up_data); + if (up_data) { + saved_data = malloc(up_data); + if (saved_data == NULL) { +@@ -257,14 +257,14 @@ static int env_flash_save(void) + } + memcpy(saved_data, + (void *)((long)flash_addr + CONFIG_ENV_SIZE), up_data); +- debug("Data (start 0x%lx, len 0x%lx) saved at 0x%lx\n", ++printf("Data (start 0x%lx, len 0x%lx) saved at 0x%lx\n", + (ulong)flash_addr + CONFIG_ENV_SIZE, + up_data, + (ulong)saved_data); + } + #endif /* CONFIG_ENV_SECT_SIZE */ + +- debug("Protect off %08lX ... %08lX\n", (ulong)flash_addr, end_addr); ++printf("Protect off %08lX ... %08lX\n", (ulong)flash_addr, end_addr); + + if (flash_sect_protect(0, (long)flash_addr, end_addr)) + goto done; +@@ -284,7 +284,7 @@ static int env_flash_save(void) + + #if CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE + if (up_data) { /* restore the rest of sector */ +- debug("Restoring the rest of data to 0x%lx len 0x%lx\n", ++printf("Restoring the rest of data to 0x%lx len 0x%lx\n", + (ulong)flash_addr + CONFIG_ENV_SIZE, up_data); + if (flash_write(saved_data, + (long)flash_addr + CONFIG_ENV_SIZE, +diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c +index 23efefa19..29da51c51 100644 +--- a/fs/btrfs/compression.c ++++ b/fs/btrfs/compression.c +@@ -146,7 +146,7 @@ static u32 decompress_zstd(const u8 *cbuf, u32 clen, u8 *dbuf, u32 dlen) + wsize = ZSTD_DStreamWorkspaceBound(ZSTD_BTRFS_MAX_INPUT); + workspace = malloc(wsize); + if (!workspace) { +- debug("%s: cannot allocate workspace of size %zu\n", __func__, ++printf("%s: cannot allocate workspace of size %zu\n", __func__, + wsize); + return -1; + } +diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c +index c52cc400e..f0716e18a 100644 +--- a/fs/ext4/ext4_common.c ++++ b/fs/ext4/ext4_common.c +@@ -1009,7 +1009,7 @@ uint32_t ext4fs_get_new_blk_no(void) + goto fail; + goto success; + } else { +- debug("no space left on block group %d\n", i); ++printf("no space left on block group %d\n", i); + } + } + +@@ -1035,7 +1035,7 @@ restart: + struct ext2_block_group *bgd = NULL; + bgd = ext4fs_get_group_descriptor(fs, bg_idx); + if (ext4fs_bg_get_free_blocks(bgd, fs) == 0) { +- debug("block group %u is full. Skipping\n", bg_idx); ++printf("block group %u is full. Skipping\n", bg_idx); + fs->curr_blkno = (bg_idx + 1) * blk_per_grp; + if (fs->blksz == 1024) + fs->curr_blkno += 1; +@@ -1054,7 +1054,7 @@ restart: + + if (ext4fs_set_block_bmap(fs->curr_blkno, fs->blk_bmaps[bg_idx], + bg_idx) != 0) { +- debug("going for restart for the block no %ld %u\n", ++printf("going for restart for the block no %ld %u\n", + fs->curr_blkno, bg_idx); + fs->curr_blkno++; + goto restart; +@@ -1145,7 +1145,7 @@ int ext4fs_get_new_inode_no(void) + goto fail; + goto success; + } else +- debug("no inode left on block group %d\n", i); ++printf("no inode left on block group %d\n", i); + } + goto fail; + } else { +@@ -1170,7 +1170,7 @@ restart: + if (ext4fs_set_inode_bmap(fs->curr_inode_no, + fs->inode_bmaps[ibmap_idx], + ibmap_idx) != 0) { +- debug("going for restart for the block no %d %u\n", ++printf("going for restart for the block no %d %u\n", + fs->curr_inode_no, ibmap_idx); + goto restart; + } +@@ -1233,7 +1233,7 @@ static void alloc_single_indirect_block(struct ext2_inode *file_inode, + goto fail; + } + (*no_blks_reqd)++; +- debug("SIPB %ld: %u\n", si_blockno, *total_remaining_blocks); ++printf("SIPB %ld: %u\n", si_blockno, *total_remaining_blocks); + + status = ext4fs_devread((lbaint_t)si_blockno * fs->sect_perblk, + 0, fs->blksz, (char *)si_buffer); +@@ -1248,7 +1248,7 @@ static void alloc_single_indirect_block(struct ext2_inode *file_inode, + goto fail; + } + *si_buffer = cpu_to_le32(actual_block_no); +- debug("SIAB %u: %u\n", *si_buffer, ++printf("SIAB %u: %u\n", *si_buffer, + *total_remaining_blocks); + + si_buffer++; +@@ -1296,7 +1296,7 @@ static void alloc_double_indirect_block(struct ext2_inode *file_inode, + + di_block_start_addr = di_parent_buffer; + (*no_blks_reqd)++; +- debug("DIPB %ld: %u\n", di_blockno_parent, ++printf("DIPB %ld: %u\n", di_blockno_parent, + *total_remaining_blocks); + + status = ext4fs_devread((lbaint_t)di_blockno_parent * +@@ -1327,7 +1327,7 @@ static void alloc_double_indirect_block(struct ext2_inode *file_inode, + *di_parent_buffer = cpu_to_le32(di_blockno_child); + di_parent_buffer++; + (*no_blks_reqd)++; +- debug("DICB %ld: %u\n", di_blockno_child, ++printf("DICB %ld: %u\n", di_blockno_child, + *total_remaining_blocks); + + status = ext4fs_devread((lbaint_t)di_blockno_child * +@@ -1348,7 +1348,7 @@ static void alloc_double_indirect_block(struct ext2_inode *file_inode, + goto fail; + } + *di_child_buff = cpu_to_le32(actual_block_no); +- debug("DIAB %ld: %u\n", actual_block_no, ++printf("DIAB %ld: %u\n", actual_block_no, + *total_remaining_blocks); + + di_child_buff++; +@@ -1405,7 +1405,7 @@ static void alloc_triple_indirect_block(struct ext2_inode *file_inode, + + ti_gp_buff_start_addr = ti_gp_buff; + (*no_blks_reqd)++; +- debug("TIGPB %ld: %u\n", ti_gp_blockno, ++printf("TIGPB %ld: %u\n", ti_gp_blockno, + *total_remaining_blocks); + + /* for each 4 byte grand parent entry create one more block */ +@@ -1423,7 +1423,7 @@ static void alloc_triple_indirect_block(struct ext2_inode *file_inode, + *ti_gp_buff = cpu_to_le32(ti_parent_blockno); + ti_gp_buff++; + (*no_blks_reqd)++; +- debug("TIPB %ld: %u\n", ti_parent_blockno, ++printf("TIPB %ld: %u\n", ti_parent_blockno, + *total_remaining_blocks); + + /* for each 4 byte entry parent create one more block */ +@@ -1441,7 +1441,7 @@ static void alloc_triple_indirect_block(struct ext2_inode *file_inode, + *ti_parent_buff = cpu_to_le32(ti_child_blockno); + ti_parent_buff++; + (*no_blks_reqd)++; +- debug("TICB %ld: %u\n", ti_parent_blockno, ++printf("TICB %ld: %u\n", ti_parent_blockno, + *total_remaining_blocks); + + /* fill actual datablocks for each child */ +@@ -1455,7 +1455,7 @@ static void alloc_triple_indirect_block(struct ext2_inode *file_inode, + goto fail1; + } + *ti_child_buff = cpu_to_le32(actual_block_no); +- debug("TIAB %ld: %u\n", actual_block_no, ++printf("TIAB %ld: %u\n", actual_block_no, + *total_remaining_blocks); + + ti_child_buff++; +@@ -1509,7 +1509,7 @@ void ext4fs_allocate_blocks(struct ext2_inode *file_inode, + return; + } + file_inode->b.blocks.dir_blocks[i] = cpu_to_le32(direct_blockno); +- debug("DB %ld: %u\n", direct_blockno, total_remaining_blocks); ++printf("DB %ld: %u\n", direct_blockno, total_remaining_blocks); + + total_remaining_blocks--; + } +@@ -1584,7 +1584,7 @@ static int ext4fs_blockgroup + group / desc_per_blk; + blkoff = (group % desc_per_blk) * desc_size; + +- debug("ext4fs read %d group descriptor (blkno %ld blkoff %u)\n", ++printf("ext4fs read %d group descriptor (blkno %ld blkoff %u)\n", + group, blkno, blkoff); + + return ext4fs_devread((lbaint_t)blkno << +@@ -1990,7 +1990,7 @@ long int read_allocated_block(struct ext2_inode *inode, int fileblock, + blknr = le32_to_cpu(ext4fs_indir3_block + [rblock % perblock_child]); + } +- debug("read_allocated_block %ld\n", blknr); ++printf("read_allocated_block %ld\n", blknr); + + return blknr; + } +@@ -2277,7 +2277,7 @@ static int ext4fs_find_file1(const char *currpath, + return 0; + } + +- debug("Got symlink >%s<\n", symlink); ++printf("Got symlink >%s<\n", symlink); + + if (symlink[0] == '/') { + ext4fs_free_node(oldnode, currroot); +@@ -2387,7 +2387,7 @@ int ext4fs_mount(unsigned part_length) + fs->inodesz = 128; + fs->gdsize = 32; + } else { +- debug("EXT4 features COMPAT: %08x INCOMPAT: %08x RO_COMPAT: %08x\n", ++printf("EXT4 features COMPAT: %08x INCOMPAT: %08x RO_COMPAT: %08x\n", + __le32_to_cpu(data->sblock.feature_compatibility), + __le32_to_cpu(data->sblock.feature_incompat), + __le32_to_cpu(data->sblock.feature_ro_compat)); +@@ -2398,7 +2398,7 @@ int ext4fs_mount(unsigned part_length) + le16_to_cpu(data->sblock.descriptor_size) : 32; + } + +- debug("EXT2 rev %d, inode_size %d, descriptor size %d\n", ++printf("EXT2 rev %d, inode_size %d, descriptor size %d\n", + le32_to_cpu(data->sblock.revision_level), + fs->inodesz, fs->gdsize); + +diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c +index 1a340b476..346db4196 100644 +--- a/fs/ext4/ext4_journal.c ++++ b/fs/ext4/ext4_journal.c +@@ -363,7 +363,7 @@ void recover_transaction(int prev_desc_logical_no) + ofs += 16; + + i++; +- debug("\t\ttag %u\n", be32_to_cpu(tag->block)); ++printf("\t\ttag %u\n", be32_to_cpu(tag->block)); + if (revk_blk_list != NULL) { + if (check_blknr_for_revoke(be32_to_cpu(tag->block), + be32_to_cpu(jdb->h_sequence)) == 0) +@@ -475,7 +475,7 @@ int ext4fs_check_journal_state(int recovery_flag) + if (!(flags & EXT3_JOURNAL_FLAG_SAME_UUID)) + ofs += 16; + i++; +- debug("\t\ttag %u\n", be32_to_cpu(tag->block)); ++printf("\t\ttag %u\n", be32_to_cpu(tag->block)); + } while (!(flags & EXT3_JOURNAL_FLAG_LAST_TAG)); + i++; + DB_FOUND = YES; +@@ -511,7 +511,7 @@ int ext4fs_check_journal_state(int recovery_flag) + ext4fs_push_revoke_blk((char *)jdb); + i++; + } else { +- debug("Else Case\n"); ++printf("Else Case\n"); + if (be32_to_cpu(jdb->h_sequence) != + be32_to_cpu(jsb->s_sequence)) { + print_jrnl_status(recovery_flag); +diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c +index f22af45d1..25732c05c 100644 +--- a/fs/ext4/ext4_write.c ++++ b/fs/ext4/ext4_write.c +@@ -155,7 +155,7 @@ static void delete_single_indirect_block(struct ext2_inode *inode) + /* deleting the single indirect block associated with inode */ + if (inode->b.blocks.indir_block != 0) { + blknr = le32_to_cpu(inode->b.blocks.indir_block); +- debug("SIPB releasing %u\n", blknr); ++printf("SIPB releasing %u\n", blknr); + bg_idx = blknr / blk_per_grp; + if (fs->blksz == 1024) { + remainder = blknr % blk_per_grp; +@@ -217,7 +217,7 @@ static void delete_double_indirect_block(struct ext2_inode *inode) + if (*di_buffer == 0) + break; + +- debug("DICB releasing %u\n", *di_buffer); ++printf("DICB releasing %u\n", *di_buffer); + bg_idx = le32_to_cpu(*di_buffer) / blk_per_grp; + if (fs->blksz == 1024) { + remainder = le32_to_cpu(*di_buffer) % blk_per_grp; +@@ -274,7 +274,7 @@ static void delete_double_indirect_block(struct ext2_inode *inode) + goto fail; + prev_bg_bmap_idx = bg_idx; + } +- debug("DIPB releasing %d\n", blknr); ++printf("DIPB releasing %d\n", blknr); + } + fail: + free(dib_start_addr); +@@ -315,7 +315,7 @@ static void delete_triple_indirect_block(struct ext2_inode *inode) + for (i = 0; i < fs->blksz / sizeof(int); i++) { + if (*tigp_buffer == 0) + break; +- debug("tigp buffer releasing %u\n", *tigp_buffer); ++printf("tigp buffer releasing %u\n", *tigp_buffer); + + tip_buffer = zalloc(fs->blksz); + if (!tip_buffer) +@@ -427,7 +427,7 @@ static void delete_triple_indirect_block(struct ext2_inode *inode) + goto fail; + prev_bg_bmap_idx = bg_idx; + } +- debug("tigp buffer itself releasing %d\n", blknr); ++printf("tigp buffer itself releasing %d\n", blknr); + } + fail: + free(tib_start_addr); +@@ -483,7 +483,7 @@ static int ext4fs_delete_file(int inodeno) + struct ext4_extent_header *eh = + (struct ext4_extent_header *) + inode.b.blocks.dir_blocks; +- debug("del: dep=%d entries=%d\n", eh->eh_depth, eh->eh_entries); ++printf("del: dep=%d entries=%d\n", eh->eh_depth, eh->eh_entries); + } else { + delete_single_indirect_block(&inode); + delete_double_indirect_block(&inode); +@@ -505,7 +505,7 @@ static int ext4fs_delete_file(int inodeno) + } + ext4fs_reset_block_bmap(blknr, fs->blk_bmaps[bg_idx], + bg_idx); +- debug("EXT4 Block releasing %ld: %d\n", blknr, bg_idx); ++printf("EXT4 Block releasing %ld: %d\n", blknr, bg_idx); + + /* get block group descriptor table */ + bgd = ext4fs_get_group_descriptor(fs, bg_idx); +@@ -922,7 +922,7 @@ int ext4fs_write(const char *fname, const char *buffer, + blks_reqd_for_file = lldiv(bytes_reqd_for_file, fs->blksz); + if (do_div(bytes_reqd_for_file, fs->blksz) != 0) { + blks_reqd_for_file++; +- debug("total bytes for a file %u\n", blks_reqd_for_file); ++printf("total bytes for a file %u\n", blks_reqd_for_file); + } + blocks_remaining = blks_reqd_for_file; + /* test for available space in partition */ +diff --git a/fs/fat/fat.c b/fs/fat/fat.c +index c561d82b3..06c2c5e52 100644 +--- a/fs/fat/fat.c ++++ b/fs/fat/fat.c +@@ -191,7 +191,7 @@ static __u32 get_fatent(fsdata *mydata, __u32 entry) + return ret; + } + +- debug("FAT%d: entry: 0x%08x = %d, offset: 0x%04x = %d\n", ++printf("FAT%d: entry: 0x%08x = %d, offset: 0x%04x = %d\n", + mydata->fatsize, entry, entry, offset, offset); + + /* Read a new block of FAT entries into the cache. */ +@@ -212,7 +212,7 @@ static __u32 get_fatent(fsdata *mydata, __u32 entry) + return -1; + + if (disk_read(startblock, getsize, bufptr) < 0) { +- debug("Error reading FAT blocks\n"); ++printf("Error reading FAT blocks\n"); + return ret; + } + mydata->fatbufnum = bufnum; +@@ -235,7 +235,7 @@ static __u32 get_fatent(fsdata *mydata, __u32 entry) + ret >>= 4; + ret &= 0xfff; + } +- debug("FAT%d: ret: 0x%08x, entry: 0x%08x, offset: 0x%04x\n", ++printf("FAT%d: ret: 0x%08x, entry: 0x%08x, offset: 0x%04x\n", + mydata->fatsize, ret, entry, offset); + + return ret; +@@ -257,17 +257,17 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size) + startsect = mydata->rootdir_sect; + } + +- debug("gc - clustnum: %d, startsect: %d\n", clustnum, startsect); ++printf("gc - clustnum: %d, startsect: %d\n", clustnum, startsect); + + if ((unsigned long)buffer & (ARCH_DMA_MINALIGN - 1)) { + ALLOC_CACHE_ALIGN_BUFFER(__u8, tmpbuf, mydata->sect_size); + +- debug("FAT: Misaligned buffer address (%p)\n", buffer); ++printf("FAT: Misaligned buffer address (%p)\n", buffer); + + while (size >= mydata->sect_size) { + ret = disk_read(startsect++, 1, tmpbuf); + if (ret != 1) { +- debug("Error reading data (got %d)\n", ret); ++printf("Error reading data (got %d)\n", ret); + return -1; + } + +@@ -284,7 +284,7 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size) + else + ret = disk_read(startsect, idx, buffer); + if (ret != idx) { +- debug("Error reading data (got %d)\n", ret); ++printf("Error reading data (got %d)\n", ret); + return -1; + } + startsect += idx; +@@ -297,7 +297,7 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size) + + ret = disk_read(startsect, 1, tmpbuf); + if (ret != 1) { +- debug("Error reading data (got %d)\n", ret); ++printf("Error reading data (got %d)\n", ret); + return -1; + } + +@@ -332,17 +332,17 @@ static int get_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos, + loff_t actsize; + + *gotsize = 0; +- debug("Filesize: %llu bytes\n", filesize); ++printf("Filesize: %llu bytes\n", filesize); + + if (pos >= filesize) { +- debug("Read position past EOF: %llu\n", pos); ++printf("Read position past EOF: %llu\n", pos); + return 0; + } + + if (maxsize > 0 && filesize > pos + maxsize) + filesize = pos + maxsize; + +- debug("%llu bytes\n", filesize); ++printf("%llu bytes\n", filesize); + + actsize = bytesperclust; + +@@ -350,7 +350,7 @@ static int get_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos, + while (actsize <= pos) { + curclust = get_fatent(mydata, curclust); + if (CHECK_CLUST(curclust, mydata->fatsize)) { +- debug("curclust: 0x%x\n", curclust); ++printf("curclust: 0x%x\n", curclust); + printf("Invalid FAT entry\n"); + return -1; + } +@@ -369,7 +369,7 @@ static int get_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos, + actsize = min(filesize, (loff_t)bytesperclust); + tmp_buffer = malloc_cache_aligned(actsize); + if (!tmp_buffer) { +- debug("Error: allocating buffer\n"); ++printf("Error: allocating buffer\n"); + return -1; + } + +@@ -389,7 +389,7 @@ static int get_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos, + + curclust = get_fatent(mydata, curclust); + if (CHECK_CLUST(curclust, mydata->fatsize)) { +- debug("curclust: 0x%x\n", curclust); ++printf("curclust: 0x%x\n", curclust); + printf("Invalid FAT entry\n"); + return -1; + } +@@ -405,7 +405,7 @@ static int get_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos, + if ((newclust - 1) != endclust) + goto getit; + if (CHECK_CLUST(newclust, mydata->fatsize)) { +- debug("curclust: 0x%x\n", newclust); ++printf("curclust: 0x%x\n", newclust); + printf("Invalid FAT entry\n"); + return -1; + } +@@ -432,7 +432,7 @@ getit: + + curclust = get_fatent(mydata, endclust); + if (CHECK_CLUST(curclust, mydata->fatsize)) { +- debug("curclust: 0x%x\n", curclust); ++printf("curclust: 0x%x\n", curclust); + printf("Invalid FAT entry\n"); + return -1; + } +@@ -497,18 +497,18 @@ read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize) + int ret = 0; + + if (cur_dev == NULL) { +- debug("Error: no device selected\n"); ++printf("Error: no device selected\n"); + return -1; + } + + block = malloc_cache_aligned(cur_dev->blksz); + if (block == NULL) { +- debug("Error: allocating block\n"); ++printf("Error: allocating block\n"); + return -1; + } + + if (disk_read(0, 1, block) < 0) { +- debug("Error: reading block\n"); ++printf("Error: reading block\n"); + goto fail; + } + +@@ -549,7 +549,7 @@ read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize) + } + } + +- debug("Error: broken fs_type sign\n"); ++printf("Error: broken fs_type sign\n"); + fail: + ret = -1; + exit: +@@ -565,7 +565,7 @@ static int get_fs_info(fsdata *mydata) + + ret = read_bootsectandvi(&bs, &volinfo, &mydata->fatsize); + if (ret) { +- debug("Error: reading boot sector\n"); ++printf("Error: reading boot sector\n"); + return ret; + } + +@@ -630,18 +630,18 @@ static int get_fs_info(fsdata *mydata) + mydata->fat_dirty = 0; + mydata->fatbuf = malloc_cache_aligned(FATBUFSIZE); + if (mydata->fatbuf == NULL) { +- debug("Error: allocating memory\n"); ++printf("Error: allocating memory\n"); + return -1; + } + +- debug("FAT%d, fat_sect: %d, fatlength: %d\n", ++printf("FAT%d, fat_sect: %d, fatlength: %d\n", + mydata->fatsize, mydata->fat_sect, mydata->fatlength); +- debug("Rootdir begins at cluster: %d, sector: %d, offset: %x\n" ++printf("Rootdir begins at cluster: %d, sector: %d, offset: %x\n" + "Data begins at: %d\n", + mydata->root_cluster, + mydata->rootdir_sect, + mydata->rootdir_sect * mydata->sect_size, mydata->data_begin); +- debug("Sector size: %d, cluster size: %d\n", mydata->sect_size, ++printf("Sector size: %d, cluster size: %d\n", mydata->sect_size, + mydata->clust_size); + + return 0; +@@ -851,7 +851,7 @@ void *fat_next_cluster(fat_itr *itr, unsigned int *nbytes) + */ + ret = disk_read(sect, read_size, itr->block); + if (ret < 0) { +- debug("Error: reading block\n"); ++printf("Error: reading block\n"); + return NULL; + } + +@@ -861,13 +861,13 @@ void *fat_next_cluster(fat_itr *itr, unsigned int *nbytes) + itr->next_clust++; + if (itr->next_clust * itr->fsdata->clust_size >= + itr->fsdata->rootdir_size) { +- debug("nextclust: 0x%x\n", itr->next_clust); ++printf("nextclust: 0x%x\n", itr->next_clust); + itr->last_cluster = 1; + } + } else { + itr->next_clust = get_fatent(itr->fsdata, itr->next_clust); + if (CHECK_CLUST(itr->next_clust, itr->fsdata->fatsize)) { +- debug("nextclust: 0x%x\n", itr->next_clust); ++printf("nextclust: 0x%x\n", itr->next_clust); + itr->last_cluster = 1; + } + } +@@ -942,7 +942,7 @@ static dir_entry *extract_vfat_name(fat_itr *itr) + + /* checksum mismatch could mean deleted file, etc.. skip it: */ + if (chksum != alias_checksum) { +- debug("** chksum=%x, alias_checksum=%x, l_name=%s, s_name=%8s.%3s\n", ++printf("** chksum=%x, alias_checksum=%x, l_name=%s, s_name=%8s.%3s\n", + chksum, alias_checksum, itr->l_name, dent->nameext.name, + dent->nameext.ext); + return NULL; +@@ -1123,7 +1123,7 @@ static int fat_itr_resolve(fat_itr *itr, const char *path, unsigned type) + * If next is not empty then we have a case + * like: /path/to/realfile/nonsense + */ +- debug("bad trailing path: %s\n", next); ++printf("bad trailing path: %s\n", next); + return -ENOENT; + } else if (!(type & TYPE_FILE)) { + return -ENOTDIR; +@@ -1242,7 +1242,7 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer, + if (ret) + goto out_free_both; + +- debug("reading %s at pos %llu\n", filename, pos); ++printf("reading %s at pos %llu\n", filename, pos); + + /* For saving default max clustersize memory allocated to malloc pool */ + dir_entry *dentptr = itr->dent; +diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c +index 8ff2f6def..0c48fe587 100644 +--- a/fs/fat/fat_write.c ++++ b/fs/fat/fat_write.c +@@ -166,7 +166,7 @@ static int set_name(fat_itr *itr, const char *filename, char *shortname) + else + sprintf(buf, "%.*s", suffix_start + suffix_len, + dirent.name); +- debug("generated short name: %s\n", buf); ++printf("generated short name: %s\n", buf); + + /* Check that the short name does not exist yet. */ + ret = fat_move_to_cluster(itr, itr->start_clust); +@@ -175,7 +175,7 @@ static int set_name(fat_itr *itr, const char *filename, char *shortname) + if (find_directory_entry(itr, buf)) + continue; + +- debug("chosen short name: %s\n", buf); ++printf("chosen short name: %s\n", buf); + /* Each long name directory entry takes 13 characters. */ + ret = (strlen(filename) + 25) / 13; + goto out; +@@ -217,7 +217,7 @@ static int flush_dirty_fat_buffer(fsdata *mydata) + __u8 *bufptr = mydata->fatbuf; + __u32 startblock = mydata->fatbufnum * FATBUFBLOCKS; + +- debug("debug: evicting %d, dirty: %d\n", mydata->fatbufnum, ++printf("debug: evicting %d, dirty: %d\n", mydata->fatbufnum, + (int)mydata->fat_dirty); + + if ((!mydata->fat_dirty) || (mydata->fatbufnum == -1)) +@@ -231,7 +231,7 @@ static int flush_dirty_fat_buffer(fsdata *mydata) + + /* Write FAT buf */ + if (disk_write(startblock, getsize, bufptr) < 0) { +- debug("error: writing FAT blocks\n"); ++printf("error: writing FAT blocks\n"); + return -1; + } + +@@ -239,7 +239,7 @@ static int flush_dirty_fat_buffer(fsdata *mydata) + /* Update corresponding second FAT blocks */ + startblock += mydata->fatlength; + if (disk_write(startblock, getsize, bufptr) < 0) { +- debug("error: writing second FAT blocks\n"); ++printf("error: writing second FAT blocks\n"); + return -1; + } + } +@@ -473,7 +473,7 @@ static int set_fatent_value(fsdata *mydata, __u32 entry, __u32 entry_value) + startblock += mydata->fat_sect; + + if (disk_read(startblock, getsize, bufptr) < 0) { +- debug("Error reading FAT blocks\n"); ++printf("Error reading FAT blocks\n"); + return -1; + } + mydata->fatbufnum = bufnum; +@@ -553,7 +553,7 @@ static __u32 determine_fatent(fsdata *mydata, __u32 entry) + } + next_entry++; + } +- debug("FAT%d: entry: %08x, entry_value: %04x\n", ++printf("FAT%d: entry: %08x, entry_value: %04x\n", + mydata->fatsize, entry, next_entry); + + return next_entry; +@@ -575,18 +575,18 @@ set_sectors(fsdata *mydata, u32 startsect, u8 *buffer, u32 size) + { + int ret; + +- debug("startsect: %d\n", startsect); ++printf("startsect: %d\n", startsect); + + if ((unsigned long)buffer & (ARCH_DMA_MINALIGN - 1)) { + ALLOC_CACHE_ALIGN_BUFFER(__u8, tmpbuf, mydata->sect_size); + +- debug("FAT: Misaligned buffer address (%p)\n", buffer); ++printf("FAT: Misaligned buffer address (%p)\n", buffer); + + while (size >= mydata->sect_size) { + memcpy(tmpbuf, buffer, mydata->sect_size); + ret = disk_write(startsect++, 1, tmpbuf); + if (ret != 1) { +- debug("Error writing data (got %d)\n", ret); ++printf("Error writing data (got %d)\n", ret); + return -1; + } + +@@ -599,7 +599,7 @@ set_sectors(fsdata *mydata, u32 startsect, u8 *buffer, u32 size) + nsects = size / mydata->sect_size; + ret = disk_write(startsect, nsects, buffer); + if (ret != nsects) { +- debug("Error writing data (got %d)\n", ret); ++printf("Error writing data (got %d)\n", ret); + return -1; + } + +@@ -615,7 +615,7 @@ set_sectors(fsdata *mydata, u32 startsect, u8 *buffer, u32 size) + memcpy(tmpbuf, buffer, size); + ret = disk_write(startsect, 1, tmpbuf); + if (ret != 1) { +- debug("Error writing data (got %d)\n", ret); ++printf("Error writing data (got %d)\n", ret); + return -1; + } + } +@@ -701,7 +701,7 @@ get_set_cluster(fsdata *mydata, __u32 clustnum, loff_t pos, __u8 *buffer, + assert(pos < bytesperclust); + startsect = clust_to_sect(mydata, clustnum); + +- debug("clustnum: %d, startsect: %d, pos: %lld\n", ++printf("clustnum: %d, startsect: %d, pos: %lld\n", + clustnum, startsect, pos); + + /* partial write at beginning */ +@@ -709,14 +709,14 @@ get_set_cluster(fsdata *mydata, __u32 clustnum, loff_t pos, __u8 *buffer, + wsize = min(bytesperclust - pos, size); + ret = disk_read(startsect, mydata->clust_size, tmpbuf_cluster); + if (ret != mydata->clust_size) { +- debug("Error reading data (got %d)\n", ret); ++printf("Error reading data (got %d)\n", ret); + return -1; + } + + memcpy(tmpbuf_cluster + pos, buffer, wsize); + ret = disk_write(startsect, mydata->clust_size, tmpbuf_cluster); + if (ret != mydata->clust_size) { +- debug("Error writing data (got %d)\n", ret); ++printf("Error writing data (got %d)\n", ret); + return -1; + } + +@@ -740,7 +740,7 @@ get_set_cluster(fsdata *mydata, __u32 clustnum, loff_t pos, __u8 *buffer, + clustcount * mydata->clust_size, + buffer); + if (ret != clustcount * mydata->clust_size) { +- debug("Error writing data (got %d)\n", ret); ++printf("Error writing data (got %d)\n", ret); + return -1; + } + +@@ -756,7 +756,7 @@ get_set_cluster(fsdata *mydata, __u32 clustnum, loff_t pos, __u8 *buffer, + mydata->clust_size, + tmpbuf_cluster); + if (ret != mydata->clust_size) { +- debug("Error writing data (got %d)\n", ++printf("Error writing data (got %d)\n", + ret); + return -1; + } +@@ -775,13 +775,13 @@ get_set_cluster(fsdata *mydata, __u32 clustnum, loff_t pos, __u8 *buffer, + wsize = size; + ret = disk_read(startsect, mydata->clust_size, tmpbuf_cluster); + if (ret != mydata->clust_size) { +- debug("Error reading data (got %d)\n", ret); ++printf("Error reading data (got %d)\n", ret); + return -1; + } + memcpy(tmpbuf_cluster, buffer, wsize); + ret = disk_write(startsect, mydata->clust_size, tmpbuf_cluster); + if (ret != mydata->clust_size) { +- debug("Error writing data (got %d)\n", ret); ++printf("Error writing data (got %d)\n", ret); + return -1; + } + +@@ -933,7 +933,7 @@ set_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos, __u8 *buffer, + *gotsize = 0; + filesize = pos + maxsize; + +- debug("%llu bytes\n", filesize); ++printf("%llu bytes\n", filesize); + + if (!filesize) { + if (!curclust) +@@ -944,8 +944,8 @@ set_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos, __u8 *buffer, + set_start_cluster(mydata, dentptr, 0); + return 0; + } +- debug("curclust: 0x%x\n", curclust); +- debug("Invalid FAT entry\n"); ++printf("curclust: 0x%x\n", curclust); ++printf("Invalid FAT entry\n"); + return -1; + } + +@@ -965,8 +965,8 @@ set_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos, __u8 *buffer, + newclust = get_fatent(mydata, curclust); + if (!IS_LAST_CLUST(newclust, mydata->fatsize) && + CHECK_CLUST(newclust, mydata->fatsize)) { +- debug("curclust: 0x%x\n", curclust); +- debug("Invalid FAT entry\n"); ++printf("curclust: 0x%x\n", curclust); ++printf("Invalid FAT entry\n"); + return -1; + } + +@@ -1000,8 +1000,8 @@ set_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos, __u8 *buffer, + if (IS_LAST_CLUST(newclust, mydata->fatsize)) + break; + if (CHECK_CLUST(newclust, mydata->fatsize)) { +- debug("curclust: 0x%x\n", curclust); +- debug("Invalid FAT entry\n"); ++printf("curclust: 0x%x\n", curclust); ++printf("Invalid FAT entry\n"); + return -1; + } + +@@ -1076,7 +1076,7 @@ set_clusters: + set_fatent_value(mydata, curclust, newclust); + curclust = newclust; + } else { +- debug("error: something wrong\n"); ++printf("error: something wrong\n"); + return -1; + } + } +@@ -1099,8 +1099,8 @@ set_clusters: + goto getit; + + if (CHECK_CLUST(newclust, mydata->fatsize)) { +- debug("newclust: 0x%x\n", newclust); +- debug("Invalid FAT entry\n"); ++printf("newclust: 0x%x\n", newclust); ++printf("Invalid FAT entry\n"); + return 0; + } + endclust = newclust; +@@ -1110,7 +1110,7 @@ set_clusters: + /* set remaining bytes */ + actsize = filesize; + if (set_cluster(mydata, curclust, buffer, (u32)actsize) != 0) { +- debug("error: writing cluster\n"); ++printf("error: writing cluster\n"); + return -1; + } + *gotsize += actsize; +@@ -1127,7 +1127,7 @@ set_clusters: + return 0; + getit: + if (set_cluster(mydata, curclust, buffer, (u32)actsize) != 0) { +- debug("error: writing cluster\n"); ++printf("error: writing cluster\n"); + return -1; + } + *gotsize += actsize; +@@ -1135,8 +1135,8 @@ getit: + buffer += actsize; + + if (CHECK_CLUST(newclust, mydata->fatsize)) { +- debug("newclust: 0x%x\n", newclust); +- debug("Invalid FAT entry\n"); ++printf("newclust: 0x%x\n", newclust); ++printf("Invalid FAT entry\n"); + return 0; + } + actsize = bytesperclust; +@@ -1315,7 +1315,7 @@ int file_fat_write_at(const char *filename, loff_t pos, void *buffer, + char *filename_copy, *parent, *basename; + char l_filename[VFAT_MAXLEN_BYTES]; + +- debug("writing %s\n", filename); ++printf("writing %s\n", filename); + + filename_copy = strdup(filename); + if (!filename_copy) +@@ -1411,7 +1411,7 @@ int file_fat_write_at(const char *filename, loff_t pos, void *buffer, + ret = -EIO; + goto exit; + } +- debug("attempt to write 0x%llx bytes\n", *actwrite); ++printf("attempt to write 0x%llx bytes\n", *actwrite); + + /* Flush fat buffer */ + ret = flush_dirty_fat_buffer(mydata); +@@ -1446,7 +1446,7 @@ static int fat_dir_entries(fat_itr *itr) + + dirs = malloc_cache_aligned(sizeof(fat_itr)); + if (!dirs) { +- debug("Error: allocating memory\n"); ++printf("Error: allocating memory\n"); + count = -ENOMEM; + goto exit; + } +@@ -1458,7 +1458,7 @@ static int fat_dir_entries(fat_itr *itr) + /* allocate local fat buffer */ + fsdata.fatbuf = malloc_cache_aligned(FATBUFSIZE); + if (!fsdata.fatbuf) { +- debug("Error: allocating memory\n"); ++printf("Error: allocating memory\n"); + count = -ENOMEM; + goto exit; + } +diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c +index d6be5c947..33e808dc0 100644 +--- a/fs/ubifs/ubifs.c ++++ b/fs/ubifs/ubifs.c +@@ -555,7 +555,7 @@ static unsigned long ubifs_findfile(struct super_block *sb, char *filename) + int ubifs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info) + { + if (rbdd) { +- debug("UBIFS cannot be used with normal block devices\n"); ++printf("UBIFS cannot be used with normal block devices\n"); + return -1; + } + +@@ -564,7 +564,7 @@ int ubifs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info) + * this, but better safe then sorry. + */ + if (!ubifs_is_mounted()) { +- debug("UBIFS not mounted, use ubifsmount to mount volume first!\n"); ++printf("UBIFS not mounted, use ubifsmount to mount volume first!\n"); + return -1; + } + +diff --git a/fs/zfs/zfs.c b/fs/zfs/zfs.c +index 1fec96cd5..2a00016d1 100644 +--- a/fs/zfs/zfs.c ++++ b/fs/zfs/zfs.c +@@ -350,7 +350,7 @@ uberblock_verify(uberblock_t *uber, int offset, struct zfs_data *data) + zio_cksum_t zc; + + if (uber->ub_txg < data->label_txg) { +- debug("ignoring partially written label: uber_txg < label_txg %llu %llu\n", ++printf("ignoring partially written label: uber_txg < label_txg %llu %llu\n", + uber->ub_txg, data->label_txg); + return ZFS_ERR_BAD_FS; + } +@@ -423,7 +423,7 @@ static uberblock_t *find_bestub(char *ub_array, struct zfs_data *data) + } + + if (ubbest) +- debug("zfs Found best uberblock at idx %d, txg %llu\n", ++printf("zfs Found best uberblock at idx %d, txg %llu\n", + pickedub, (unsigned long long) ubbest->ub_txg); + + return ubbest; +@@ -1897,7 +1897,7 @@ zfs_mount(device_t dev) + uint64_t labelstartbytes = vdev_label_start(alignedbytes, label); + uint64_t labelstart = labelstartbytes >> SECTOR_BITS; + +- debug("zfs reading label %d at sector %llu (byte %llu)\n", ++printf("zfs reading label %d at sector %llu (byte %llu)\n", + label, (unsigned long long) labelstart, + (unsigned long long) labelstartbytes); + +@@ -1929,7 +1929,7 @@ zfs_mount(device_t dev) + /* Looks like the block is good, so use it.*/ + memcpy(ubbest, ubcur, sizeof(*ubbest)); + bestlabel = label; +- debug("zfs Current best uberblock found in label %d\n", label); ++printf("zfs Current best uberblock found in label %d\n", label); + } + } + free(ub_array); +@@ -1943,13 +1943,13 @@ zfs_mount(device_t dev) + return 0; + } + +- debug("zfs ubbest %p in label %d\n", ubbest, bestlabel); ++printf("zfs ubbest %p in label %d\n", ubbest, bestlabel); + + zfs_endian_t ub_endian = + zfs_to_cpu64(ubbest->ub_magic, LITTLE_ENDIAN) == UBERBLOCK_MAGIC + ? LITTLE_ENDIAN : BIG_ENDIAN; + +- debug("zfs endian set to %s\n", !ub_endian ? "big" : "little"); ++printf("zfs endian set to %s\n", !ub_endian ? "big" : "little"); + + err = zio_read(&ubbest->ub_rootbp, ub_endian, &osp, &ospsize, data); + +@@ -2221,7 +2221,7 @@ static int iterate_zap(const char *name, uint64_t val, struct zfs_data *data) + info.mtimeset = 1; + info.mtime = zfs_to_cpu64(((znode_phys_t *) DN_BONUS(&dn.dn))->zp_mtime[0], dn.endian); + info.dir = (dn.dn.dn_type == DMU_OT_DIRECTORY_CONTENTS); +- debug("zfs type=%d, name=%s\n", ++printf("zfs type=%d, name=%s\n", + (int)dn.dn.dn_type, (char *)name); + if (!data->userhook) + return 0; +diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h +index eb9ccf47c..2d93713a4 100644 +--- a/include/configs/sunxi-common.h ++++ b/include/configs/sunxi-common.h +@@ -46,6 +46,9 @@ + # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE + # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE + # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE ++#ifdef CONFIG_MACH_SUN50I_H616 ++# define CONFIG_SYS_NS16550_COM6 0x05001400 ++#endif + #endif + + /* CPU */ +@@ -470,7 +473,7 @@ extern int soft_i2c_gpio_scl; + MEM_LAYOUT_ENV_EXTRA_SETTINGS \ + DFU_ALT_INFO_RAM \ + "fdtfile=" FDTFILE "\0" \ +- "console=ttyS0,115200\0" \ ++ "console=ttyS5,115200\0" \ + SUNXI_MTDIDS_DEFAULT \ + SUNXI_MTDPARTS_DEFAULT \ + "uuid_gpt_esp=" UUID_GPT_ESP "\0" \ +diff --git a/include/efi_loader.h b/include/efi_loader.h +index b81180cfd..04caa8aa4 100644 +--- a/include/efi_loader.h ++++ b/include/efi_loader.h +@@ -80,7 +80,7 @@ const char *__efi_nesting_dec(void); + */ + #define EFI_ENTRY(format, ...) do { \ + assert(__efi_entry_check()); \ +- debug("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \ ++printf("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \ + __func__, ##__VA_ARGS__); \ + } while(0) + +@@ -89,7 +89,7 @@ const char *__efi_nesting_dec(void); + */ + #define EFI_EXIT(ret) ({ \ + typeof(ret) _r = ret; \ +- debug("%sEFI: Exit: %s: %u\n", __efi_nesting_dec(), \ ++printf("%sEFI: Exit: %s: %u\n", __efi_nesting_dec(), \ + __func__, (u32)((uintptr_t) _r & ~EFI_ERROR_MASK)); \ + assert(__efi_exit_check()); \ + _r; \ +@@ -99,11 +99,11 @@ const char *__efi_nesting_dec(void); + * Call non-void UEFI function from u-boot and retrieve return value: + */ + #define EFI_CALL(exp) ({ \ +- debug("%sEFI: Call: %s\n", __efi_nesting_inc(), #exp); \ ++printf("%sEFI: Call: %s\n", __efi_nesting_inc(), #exp); \ + assert(__efi_exit_check()); \ + typeof(exp) _r = exp; \ + assert(__efi_entry_check()); \ +- debug("%sEFI: %lu returned by %s\n", __efi_nesting_dec(), \ ++printf("%sEFI: %lu returned by %s\n", __efi_nesting_dec(), \ + (unsigned long)((uintptr_t)_r & ~EFI_ERROR_MASK), #exp); \ + _r; \ + }) +@@ -112,18 +112,18 @@ const char *__efi_nesting_dec(void); + * Call void UEFI function from u-boot: + */ + #define EFI_CALL_VOID(exp) do { \ +- debug("%sEFI: Call: %s\n", __efi_nesting_inc(), #exp); \ ++printf("%sEFI: Call: %s\n", __efi_nesting_inc(), #exp); \ + assert(__efi_exit_check()); \ + exp; \ + assert(__efi_entry_check()); \ +- debug("%sEFI: Return From: %s\n", __efi_nesting_dec(), #exp); \ ++printf("%sEFI: Return From: %s\n", __efi_nesting_dec(), #exp); \ + } while(0) + + /* + * Write an indented message with EFI prefix + */ + #define EFI_PRINT(format, ...) ({ \ +- debug("%sEFI: " format, __efi_nesting(), \ ++printf("%sEFI: " format, __efi_nesting(), \ + ##__VA_ARGS__); \ + }) + +diff --git a/include/initcall.h b/include/initcall.h +index 69ce26807..f1f4dcc55 100644 +--- a/include/initcall.h ++++ b/include/initcall.h +@@ -37,11 +37,11 @@ static inline int initcall_run_list(const init_fnc_t init_sequence[]) + reloc_ofs = (unsigned long)image_base; + #endif + if (reloc_ofs) +- debug("initcall: %p (relocated to %p)\n", ++printf("initcall: %p (relocated to %p)\n", + (char *)*init_fnc_ptr - reloc_ofs, + (char *)*init_fnc_ptr); + else +- debug("initcall: %p\n", (char *)*init_fnc_ptr - reloc_ofs); ++printf("initcall: %p\n", (char *)*init_fnc_ptr - reloc_ofs); + + ret = (*init_fnc_ptr)(); + if (ret) { +diff --git a/include/phy.h b/include/phy.h +index 2754421ed..fded45742 100644 +--- a/include/phy.h ++++ b/include/phy.h +@@ -185,7 +185,7 @@ static inline int phy_read(struct phy_device *phydev, int devad, int regnum) + struct mii_dev *bus = phydev->bus; + + if (!bus || !bus->read) { +- debug("%s: No bus configured\n", __func__); ++printf("%s: No bus configured\n", __func__); + return -1; + } + +@@ -206,7 +206,7 @@ static inline int phy_write(struct phy_device *phydev, int devad, int regnum, + struct mii_dev *bus = phydev->bus; + + if (!bus || !bus->write) { +- debug("%s: No bus configured\n", __func__); ++printf("%s: No bus configured\n", __func__); + return -1; + } + +diff --git a/include/wait_bit.h b/include/wait_bit.h +index dc2ffeb2c..113bd0131 100644 +--- a/include/wait_bit.h ++++ b/include/wait_bit.h +@@ -66,7 +66,7 @@ static inline int wait_for_bit_##sfx(const void *reg, \ + WATCHDOG_RESET(); \ + } \ + \ +- debug("%s: Timeout (reg=%p mask=%x wait_set=%i)\n", __func__, \ ++printf("%s: Timeout (reg=%p mask=%x wait_set=%i)\n", __func__, \ + reg, mask, set); \ + \ + return -ETIMEDOUT; \ +diff --git a/lib/aes.c b/lib/aes.c +index 05ec23570..b3d6a712c 100644 +--- a/lib/aes.c ++++ b/lib/aes.c +@@ -640,7 +640,7 @@ void aes_cbc_encrypt_blocks(u32 key_len, u8 *key_exp, u8 *iv, u8 *src, u8 *dst, + u32 i; + + for (i = 0; i < num_aes_blocks; i++) { +- debug("encrypt_object: block %d of %d\n", i, num_aes_blocks); ++printf("encrypt_object: block %d of %d\n", i, num_aes_blocks); + debug_print_vector("AES Src", AES_BLOCK_LENGTH, src); + + /* Apply the chain data */ +@@ -668,7 +668,7 @@ void aes_cbc_decrypt_blocks(u32 key_len, u8 *key_exp, u8 *iv, u8 *src, u8 *dst, + + memcpy(cbc_chain_data, iv, AES_BLOCK_LENGTH); + for (i = 0; i < num_aes_blocks; i++) { +- debug("encrypt_object: block %d of %d\n", i, num_aes_blocks); ++printf("encrypt_object: block %d of %d\n", i, num_aes_blocks); + debug_print_vector("AES Src", AES_BLOCK_LENGTH, src); + + memcpy(tmp_block, src, AES_BLOCK_LENGTH); +diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c +index 50bed32bf..4128592a9 100644 +--- a/lib/efi_loader/efi_capsule.c ++++ b/lib/efi_loader/efi_capsule.c +@@ -267,7 +267,7 @@ efi_status_t efi_capsule_authenticate(const void *capsule, efi_uintn_t capsule_s + - sizeof(auth_hdr->auth_info), + &buf); + if (IS_ERR(capsule_sig)) { +- debug("Parsing variable's pkcs7 header failed\n"); ++printf("Parsing variable's pkcs7 header failed\n"); + capsule_sig = NULL; + goto out; + } +@@ -287,9 +287,9 @@ efi_status_t efi_capsule_authenticate(const void *capsule, efi_uintn_t capsule_s + + /* verify signature */ + if (efi_signature_verify(regs, capsule_sig, truststore, NULL)) { +- debug("Verified\n"); ++printf("Verified\n"); + } else { +- debug("Verifying variable's signature failed\n"); ++printf("Verifying variable's signature failed\n"); + goto out; + } + +diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c +index 76c2f82fe..515bc8ec1 100644 +--- a/lib/efi_loader/efi_device_path.c ++++ b/lib/efi_loader/efi_device_path.c +@@ -67,7 +67,7 @@ static void *dp_alloc(size_t sz) + + if (efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, sz, &buf) != + EFI_SUCCESS) { +- debug("EFI: ERROR: out of memory in %s\n", __func__); ++printf("EFI: ERROR: out of memory in %s\n", __func__); + return NULL; + } + +@@ -719,7 +719,7 @@ __maybe_unused static void *dp_fill(void *buf, struct udevice *dev) + } + #endif + default: +- debug("%s(%u) %s: unhandled parent class: %s (%u)\n", ++printf("%s(%u) %s: unhandled parent class: %s (%u)\n", + __FILE__, __LINE__, __func__, + dev->name, dev->parent->uclass->uc_drv->id); + return dp_fill(buf, dev->parent); +@@ -761,7 +761,7 @@ __maybe_unused static void *dp_fill(void *buf, struct udevice *dev) + return &udp[1]; + } + default: +- debug("%s(%u) %s: unhandled device class: %s (%u)\n", ++printf("%s(%u) %s: unhandled device class: %s (%u)\n", + __FILE__, __LINE__, __func__, + dev->name, dev->driver->id); + return dp_fill(buf, dev->parent); +diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c +index a1b88dbfc..8264ccb61 100644 +--- a/lib/efi_loader/efi_firmware.c ++++ b/lib/efi_loader/efi_firmware.c +@@ -435,12 +435,12 @@ efi_status_t EFIAPI efi_firmware_raw_set_image( + return EFI_EXIT(status); + } + +- debug("Capsule authentication successfull\n"); ++printf("Capsule authentication successfull\n"); + image = capsule_payload; + image_size = capsule_payload_size; + } else { +- debug("Capsule authentication disabled. "); +- debug("Updating capsule without authenticating.\n"); ++printf("Capsule authentication disabled. "); ++printf("Updating capsule without authenticating.\n"); + } + + fmp_hdr_signature = FMP_PAYLOAD_HDR_SIGNATURE; +diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c +index 1206b2d7a..f1f714f51 100644 +--- a/lib/efi_loader/efi_gop.c ++++ b/lib/efi_loader/efi_gop.c +@@ -443,7 +443,7 @@ efi_status_t efi_gop_register(void) + + /* We only support a single video output device for now */ + if (uclass_first_device(UCLASS_VIDEO, &vdev) || !vdev) { +- debug("WARNING: No video device\n"); ++printf("WARNING: No video device\n"); + return EFI_SUCCESS; + } + +@@ -476,7 +476,7 @@ efi_status_t efi_gop_register(void) + break; + default: + /* So far, we only work in 16 or 32 bit mode */ +- debug("WARNING: Unsupported video mode\n"); ++printf("WARNING: Unsupported video mode\n"); + return EFI_SUCCESS; + } + +diff --git a/lib/efi_loader/efi_rng.c b/lib/efi_loader/efi_rng.c +index 0e0654685..cb9a43e5e 100644 +--- a/lib/efi_loader/efi_rng.c ++++ b/lib/efi_loader/efi_rng.c +@@ -35,7 +35,7 @@ __weak efi_status_t platform_get_rng_device(struct udevice **dev) + + ret = uclass_get_device(UCLASS_RNG, 0, &devp); + if (ret) { +- debug("Unable to get rng device\n"); ++printf("Unable to get rng device\n"); + return EFI_DEVICE_ERROR; + } + +diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c +index 93a695fc2..561f52590 100644 +--- a/lib/efi_loader/efi_runtime.c ++++ b/lib/efi_loader/efi_runtime.c +@@ -675,7 +675,7 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) + static ulong lastoff = CONFIG_SYS_TEXT_BASE; + #endif + +- debug("%s: Relocating to offset=%lx\n", __func__, offset); ++printf("%s: Relocating to offset=%lx\n", __func__, offset); + for (; (ulong)rel < (ulong)&__efi_runtime_rel_stop; rel++) { + ulong base = CONFIG_SYS_TEXT_BASE; + ulong *p; +@@ -690,7 +690,7 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) + if (map && efi_is_runtime_service_pointer(p)) + continue; + +- debug("%s: rel->info=%#lx *p=%#lx rel->offset=%p\n", __func__, ++printf("%s: rel->info=%#lx *p=%#lx rel->offset=%p\n", __func__, + rel->info, *p, rel->offset); + + switch (rel->info & R_MASK) { +@@ -727,7 +727,7 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) + continue; + } + +- debug("%s: Setting %p to %lx\n", __func__, p, newaddr); ++printf("%s: Setting %p to %lx\n", __func__, p, newaddr); + *p = newaddr; + flush_dcache_range((ulong)p & ~(EFI_CACHELINE_SIZE - 1), + ALIGN((ulong)&p[1], EFI_CACHELINE_SIZE)); +diff --git a/lib/elf.c b/lib/elf.c +index d074e4e0a..5128126a4 100644 +--- a/lib/elf.c ++++ b/lib/elf.c +@@ -37,7 +37,7 @@ unsigned long load_elf64_image_phdr(unsigned long addr) + void *dst = (void *)(ulong)phdr->p_paddr; + void *src = (void *)addr + phdr->p_offset; + +- debug("Loading phdr %i to 0x%p (%lu bytes)\n", ++printf("Loading phdr %i to 0x%p (%lu bytes)\n", + i, dst, (ulong)phdr->p_filesz); + if (phdr->p_filesz) + memcpy(dst, src, phdr->p_filesz); +@@ -92,7 +92,7 @@ unsigned long load_elf64_image_shdr(unsigned long addr) + } + + if (strtab) { +- debug("%sing %s @ 0x%08lx (%ld bytes)\n", ++printf("%sing %s @ 0x%08lx (%ld bytes)\n", + (shdr->sh_type == SHT_NOBITS) ? "Clear" : "Load", + &strtab[shdr->sh_name], + (unsigned long)shdr->sh_addr, +@@ -152,7 +152,7 @@ unsigned long load_elf_image_phdr(unsigned long addr) + void *dst = (void *)(uintptr_t)phdr->p_paddr; + void *src = (void *)addr + phdr->p_offset; + +- debug("Loading phdr %i to 0x%p (%i bytes)\n", ++printf("Loading phdr %i to 0x%p (%i bytes)\n", + i, dst, phdr->p_filesz); + if (phdr->p_filesz) + memcpy(dst, src, phdr->p_filesz); +@@ -197,7 +197,7 @@ unsigned long load_elf_image_shdr(unsigned long addr) + } + + if (strtab) { +- debug("%sing %s @ 0x%08lx (%ld bytes)\n", ++printf("%sing %s @ 0x%08lx (%ld bytes)\n", + (shdr->sh_type == SHT_NOBITS) ? "Clear" : "Load", + &strtab[shdr->sh_name], + (unsigned long)shdr->sh_addr, +diff --git a/lib/fdtdec.c b/lib/fdtdec.c +index 4b097fb58..ab67d1300 100644 +--- a/lib/fdtdec.c ++++ b/lib/fdtdec.c +@@ -95,11 +95,11 @@ fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, + int len; + fdt_addr_t addr; + +- debug("%s: %s: ", __func__, prop_name); ++printf("%s: %s: ", __func__, prop_name); + + prop = fdt_getprop(blob, node, prop_name, &len); + if (!prop) { +- debug("(not found)\n"); ++printf("(not found)\n"); + return FDT_ADDR_T_NONE; + } + prop_end = prop + (len / sizeof(*prop)); +@@ -108,7 +108,7 @@ fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, + prop_size = prop_addr + na; + prop_after_size = prop_size + ns; + if (prop_after_size > prop_end) { +- debug("(not enough data: expected >= %d cells, got %d cells)\n", ++printf("(not enough data: expected >= %d cells, got %d cells)\n", + (u32)(prop_after_size - prop), ((u32)(prop_end - prop))); + return FDT_ADDR_T_NONE; + } +@@ -122,10 +122,10 @@ fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, + + if (sizep) { + *sizep = fdtdec_get_number(prop_size, ns); +- debug("addr=%08llx, size=%llx\n", (unsigned long long)addr, ++printf("addr=%08llx, size=%llx\n", (unsigned long long)addr, + (unsigned long long)*sizep); + } else { +- debug("addr=%08llx\n", (unsigned long long)addr); ++printf("addr=%08llx\n", (unsigned long long)addr); + } + + return addr; +@@ -138,21 +138,21 @@ fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent, + { + int na, ns; + +- debug("%s: ", __func__); ++printf("%s: ", __func__); + + na = fdt_address_cells(blob, parent); + if (na < 1) { +- debug("(bad #address-cells)\n"); ++printf("(bad #address-cells)\n"); + return FDT_ADDR_T_NONE; + } + + ns = fdt_size_cells(blob, parent); + if (ns < 0) { +- debug("(bad #size-cells)\n"); ++printf("(bad #size-cells)\n"); + return FDT_ADDR_T_NONE; + } + +- debug("na=%d, ns=%d, ", na, ns); ++printf("na=%d, ns=%d, ", na, ns); + + return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na, + ns, sizep, translate); +@@ -165,11 +165,11 @@ fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node, + { + int parent; + +- debug("%s: ", __func__); ++printf("%s: ", __func__); + + parent = fdt_parent_offset(blob, node); + if (parent < 0) { +- debug("(no parent found)\n"); ++printf("(no parent found)\n"); + return FDT_ADDR_T_NONE; + } + +@@ -384,7 +384,7 @@ int fdtdec_add_aliases_for_id(const void *blob, const char *name, + nodes[count++] = node; + } + if (node >= 0) +- debug("%s: warning: maxcount exceeded with alias '%s'\n", ++printf("%s: warning: maxcount exceeded with alias '%s'\n", + __func__, name); + + /* Now find all the aliases */ +@@ -407,7 +407,7 @@ int fdtdec_add_aliases_for_id(const void *blob, const char *name, + /* Get the alias number */ + number = simple_strtoul(path + name_len, NULL, 10); + if (number < 0 || number >= maxcount) { +- debug("%s: warning: alias '%s' is out of range\n", ++printf("%s: warning: alias '%s' is out of range\n", + __func__, path); + continue; + } +@@ -421,7 +421,7 @@ int fdtdec_add_aliases_for_id(const void *blob, const char *name, + } + + if (found == -1) { +- debug("%s: warning: alias '%s' points to a node " ++printf("%s: warning: alias '%s' points to a node " + "'%s' that is missing or is not compatible " + " with '%s'\n", __func__, path, + fdt_get_name(blob, node, NULL), +@@ -435,7 +435,7 @@ int fdtdec_add_aliases_for_id(const void *blob, const char *name, + */ + if (fdtdec_get_is_enabled(blob, node)) { + if (node_list[number]) { +- debug("%s: warning: alias '%s' requires that " ++printf("%s: warning: alias '%s' requires that " + "a node be placed in the list in a " + "position which is already filled by " + "node '%s'\n", __func__, path, +@@ -481,7 +481,7 @@ int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, + int aliases; + + find_name = fdt_get_name(blob, offset, &find_namelen); +- debug("Looking for '%s' at %d, name %s\n", base, offset, find_name); ++printf("Looking for '%s' at %d, name %s\n", base, offset, find_name); + + aliases = fdt_path_offset(blob, "/aliases"); + for (prop_offset = fdt_first_property_offset(blob, aliases); +@@ -493,7 +493,7 @@ int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, + int len, val; + + prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len); +- debug(" - %s, %s\n", name, prop); ++printf(" - %s, %s\n", name, prop); + if (len < find_namelen || *prop != '/' || prop[len - 1] || + strncmp(name, base, base_len)) + continue; +@@ -515,12 +515,12 @@ int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, + val = trailing_strtol(name); + if (val != -1) { + *seqp = val; +- debug("Found seq %d\n", *seqp); ++printf("Found seq %d\n", *seqp); + return 0; + } + } + +- debug("Not found\n"); ++printf("Not found\n"); + return -ENOENT; + } + +@@ -531,7 +531,7 @@ int fdtdec_get_alias_highest_id(const void *blob, const char *base) + int aliases; + int max = -1; + +- debug("Looking for highest alias id for '%s'\n", base); ++printf("Looking for highest alias id for '%s'\n", base); + + aliases = fdt_path_offset(blob, "/aliases"); + for (prop_offset = fdt_first_property_offset(blob, aliases); +@@ -542,14 +542,14 @@ int fdtdec_get_alias_highest_id(const void *blob, const char *base) + int len, val; + + prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len); +- debug(" - %s, %s\n", name, prop); ++printf(" - %s, %s\n", name, prop); + if (*prop != '/' || prop[len - 1] || + strncmp(name, base, base_len)) + continue; + + val = trailing_strtol(name); + if (val > max) { +- debug("Found seq %d\n", val); ++printf("Found seq %d\n", val); + max = val; + } + } +@@ -621,7 +621,7 @@ int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name) + const u32 *phandle; + int lookup; + +- debug("%s: %s\n", __func__, prop_name); ++printf("%s: %s\n", __func__, prop_name); + phandle = fdt_getprop(blob, node, prop_name, NULL); + if (!phandle) + return -FDT_ERR_NOTFOUND; +@@ -648,7 +648,7 @@ static const void *get_prop_check_min_len(const void *blob, int node, + const void *cell; + int len; + +- debug("%s: %s\n", __func__, prop_name); ++printf("%s: %s\n", __func__, prop_name); + cell = fdt_getprop(blob, node, prop_name, &len); + if (!cell) + *err = -FDT_ERR_NOTFOUND; +@@ -665,7 +665,7 @@ int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, + const u32 *cell; + int err = 0; + +- debug("%s: %s\n", __func__, prop_name); ++printf("%s: %s\n", __func__, prop_name); + cell = get_prop_check_min_len(blob, node, prop_name, + sizeof(u32) * count, &err); + if (!err) { +@@ -684,7 +684,7 @@ int fdtdec_get_int_array_count(const void *blob, int node, + int len, elems; + int i; + +- debug("%s: %s\n", __func__, prop_name); ++printf("%s: %s\n", __func__, prop_name); + cell = fdt_getprop(blob, node, prop_name, &len); + if (!cell) + return -FDT_ERR_NOTFOUND; +@@ -713,7 +713,7 @@ int fdtdec_get_bool(const void *blob, int node, const char *prop_name) + const s32 *cell; + int len; + +- debug("%s: %s\n", __func__, prop_name); ++printf("%s: %s\n", __func__, prop_name); + cell = fdt_getprop(blob, node, prop_name, &len); + return cell != NULL; + } +@@ -760,7 +760,7 @@ int fdtdec_parse_phandle_with_args(const void *blob, int src_node, + node = fdt_node_offset_by_phandle(blob, + phandle); + if (node < 0) { +- debug("%s: could not find phandle\n", ++printf("%s: could not find phandle\n", + fdt_get_name(blob, src_node, + NULL)); + goto err; +@@ -771,7 +771,7 @@ int fdtdec_parse_phandle_with_args(const void *blob, int src_node, + count = fdtdec_get_int(blob, node, cells_name, + -1); + if (count == -1) { +- debug("%s: could not get %s for %s\n", ++printf("%s: could not get %s for %s\n", + fdt_get_name(blob, src_node, + NULL), + cells_name, +@@ -788,7 +788,7 @@ int fdtdec_parse_phandle_with_args(const void *blob, int src_node, + * remaining property data length + */ + if (list + count > list_end) { +- debug("%s: arguments longer than property\n", ++printf("%s: arguments longer than property\n", + fdt_get_name(blob, src_node, NULL)); + goto err; + } +@@ -809,7 +809,7 @@ int fdtdec_parse_phandle_with_args(const void *blob, int src_node, + int i; + + if (count > MAX_PHANDLE_ARGS) { +- debug("%s: too many arguments %d\n", ++printf("%s: too many arguments %d\n", + fdt_get_name(blob, src_node, + NULL), count); + count = MAX_PHANDLE_ARGS; +@@ -871,7 +871,7 @@ int fdtdec_get_config_int(const void *blob, const char *prop_name, + { + int config_node; + +- debug("%s: %s\n", __func__, prop_name); ++printf("%s: %s\n", __func__, prop_name); + config_node = fdt_path_offset(blob, "/config"); + if (config_node < 0) + return default_val; +@@ -883,7 +883,7 @@ int fdtdec_get_config_bool(const void *blob, const char *prop_name) + int config_node; + const void *prop; + +- debug("%s: %s\n", __func__, prop_name); ++printf("%s: %s\n", __func__, prop_name); + config_node = fdt_path_offset(blob, "/config"); + if (config_node < 0) + return 0; +@@ -898,7 +898,7 @@ char *fdtdec_get_config_string(const void *blob, const char *prop_name) + int nodeoffset; + int len; + +- debug("%s: %s\n", __func__, prop_name); ++printf("%s: %s\n", __func__, prop_name); + nodeoffset = fdt_path_offset(blob, "/config"); + if (nodeoffset < 0) + return NULL; +@@ -980,7 +980,7 @@ static int decode_timing_property(const void *blob, int node, const char *name, + + prop = fdt_getprop(blob, node, name, &length); + if (!prop) { +- debug("%s: could not find property %s\n", ++printf("%s: could not find property %s\n", + fdt_get_name(blob, node, NULL), name); + return length; + } +@@ -1072,19 +1072,19 @@ int fdtdec_setup_mem_size_base(void) + + mem = ofnode_path("/memory"); + if (!ofnode_valid(mem)) { +- debug("%s: Missing /memory node\n", __func__); ++printf("%s: Missing /memory node\n", __func__); + return -EINVAL; + } + + ret = ofnode_read_resource(mem, 0, &res); + if (ret != 0) { +- debug("%s: Unable to decode first memory bank\n", __func__); ++printf("%s: Unable to decode first memory bank\n", __func__); + return -EINVAL; + } + + gd->ram_size = (phys_size_t)(res.end - res.start + 1); + gd->ram_base = (unsigned long)res.start; +- debug("%s: Initial DRAM size %llx\n", __func__, ++printf("%s: Initial DRAM size %llx\n", __func__, + (unsigned long long)gd->ram_size); + + return 0; +@@ -1107,7 +1107,7 @@ int fdtdec_setup_memory_banksize(void) + + mem = get_next_memory_node(mem); + if (!ofnode_valid(mem)) { +- debug("%s: Missing /memory node\n", __func__); ++printf("%s: Missing /memory node\n", __func__); + return -EINVAL; + } + +@@ -1131,7 +1131,7 @@ int fdtdec_setup_memory_banksize(void) + gd->bd->bi_dram[bank].size = + (phys_size_t)(res.end - res.start + 1); + +- debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n", ++printf("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n", + __func__, bank, + (unsigned long long)gd->bd->bi_dram[bank].start, + (unsigned long long)gd->bd->bi_dram[bank].size); +@@ -1152,7 +1152,7 @@ int fdtdec_setup_mem_size_base_lowest(void) + + mem = get_next_memory_node(mem); + if (!ofnode_valid(mem)) { +- debug("%s: Missing /memory node\n", __func__); ++printf("%s: Missing /memory node\n", __func__); + return -EINVAL; + } + +@@ -1178,7 +1178,7 @@ int fdtdec_setup_mem_size_base_lowest(void) + if (gd->ram_base > base && size) { + gd->ram_base = base; + gd->ram_size = size; +- debug("%s: Initial DRAM base %lx size %lx\n", ++printf("%s: Initial DRAM base %lx size %lx\n", + __func__, base, (unsigned long)size); + } + } +@@ -1282,11 +1282,11 @@ int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size) + if (!path) + return 0; + +- debug("ethernet alias found: %s\n", path); ++printf("ethernet alias found: %s\n", path); + + offset = fdt_path_offset(fdt, path); + if (offset < 0) { +- debug("ethernet alias points to absent node %s\n", path); ++printf("ethernet alias points to absent node %s\n", path); + return -ENOENT; + } + +@@ -1294,7 +1294,7 @@ int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size) + if (err < 0) + return err; + +- debug("MAC address: %pM\n", mac); ++printf("MAC address: %pM\n", mac); + + return 0; + } +@@ -1367,7 +1367,7 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns, + &size, false); + if (addr == FDT_ADDR_T_NONE) { +- debug("failed to read address/size for %s\n", name); ++printf("failed to read address/size for %s\n", name); + continue; + } + +@@ -1391,7 +1391,7 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename, + lower); + else { + if (upper > 0) { +- debug("address %08x:%08x exceeds addressable space\n", ++printf("address %08x:%08x exceeds addressable space\n", + upper, lower); + return -FDT_ERR_BADVALUE; + } +@@ -1460,17 +1460,17 @@ int fdtdec_get_carveout(const void *blob, const char *node, const char *name, + + prop = fdt_getprop(blob, offset, name, &len); + if (!prop) { +- debug("failed to get %s for %s\n", name, node); ++printf("failed to get %s for %s\n", name, node); + return -FDT_ERR_NOTFOUND; + } + + if ((len % sizeof(phandle)) != 0) { +- debug("invalid phandle property\n"); ++printf("invalid phandle property\n"); + return -FDT_ERR_BADPHANDLE; + } + + if (len < (sizeof(phandle) * (index + 1))) { +- debug("invalid phandle index\n"); ++printf("invalid phandle index\n"); + return -FDT_ERR_BADPHANDLE; + } + +@@ -1478,7 +1478,7 @@ int fdtdec_get_carveout(const void *blob, const char *node, const char *name, + + offset = fdt_node_offset_by_phandle(blob, phandle); + if (offset < 0) { +- debug("failed to find node for phandle %u\n", phandle); ++printf("failed to find node for phandle %u\n", phandle); + return offset; + } + +@@ -1486,7 +1486,7 @@ int fdtdec_get_carveout(const void *blob, const char *node, const char *name, + "reg", 0, &size, + true); + if (carveout->start == FDT_ADDR_T_NONE) { +- debug("failed to read address/size from \"reg\" property\n"); ++printf("failed to read address/size from \"reg\" property\n"); + return -FDT_ERR_NOTFOUND; + } + +@@ -1506,13 +1506,13 @@ int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, + + err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle, false); + if (err < 0) { +- debug("failed to add reserved memory: %d\n", err); ++printf("failed to add reserved memory: %d\n", err); + return err; + } + + offset = fdt_path_offset(blob, node); + if (offset < 0) { +- debug("failed to find offset for node %s: %d\n", node, offset); ++printf("failed to find offset for node %s: %d\n", node, offset); + return offset; + } + +@@ -1530,7 +1530,7 @@ int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, + (index + 1) * sizeof(value), + &prop); + if (err < 0) { +- debug("failed to resize reserved memory property: %s\n", ++printf("failed to resize reserved memory property: %s\n", + fdt_strerror(err)); + return err; + } +@@ -1541,7 +1541,7 @@ int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, + index * sizeof(value), + &value, sizeof(value)); + if (err < 0) { +- debug("failed to update %s property for node %s: %s\n", ++printf("failed to update %s property for node %s: %s\n", + prop_name, node, fdt_strerror(err)); + return err; + } +@@ -1665,18 +1665,18 @@ int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, + int bank; + int len; + +- debug("%s: board_id=%d\n", __func__, board_id); ++printf("%s: board_id=%d\n", __func__, board_id); + if (!area) + area = "/memory"; + node = fdt_path_offset(blob, area); + if (node < 0) { +- debug("No %s node found\n", area); ++printf("No %s node found\n", area); + return -ENOENT; + } + + cell = fdt_getprop(blob, node, "reg", &len); + if (!cell) { +- debug("No reg property found\n"); ++printf("No reg property found\n"); + return -ENOENT; + } + +@@ -1695,11 +1695,11 @@ int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, + if (match_value >= 0 && + ((board_id & match_mask) == match_value)) { + /* Found matching mask */ +- debug("Found matching mask %d\n", match_mask); ++printf("Found matching mask %d\n", match_mask); + node = child; + cell = fdt_getprop(blob, node, "reg", &len); + if (!cell) { +- debug("No memory-banks property found\n"); ++printf("No memory-banks property found\n"); + return -EINVAL; + } + break; +@@ -1716,7 +1716,7 @@ int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, + + total_size = 0; + end = cell + len / 4 - addr_cells - size_cells; +- debug("cell at %p, end %p\n", cell, end); ++printf("cell at %p, end %p\n", cell, end); + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + if (cell > end) + break; +@@ -1737,12 +1737,12 @@ int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, + if (auto_size) { + u64 new_size; + +- debug("Auto-sizing %llx, size %llx: ", addr, size); ++printf("Auto-sizing %llx, size %llx: ", addr, size); + new_size = get_ram_size((long *)(uintptr_t)addr, size); + if (new_size == size) { +- debug("OK\n"); ++printf("OK\n"); + } else { +- debug("sized to %llx\n", new_size); ++printf("sized to %llx\n", new_size); + size = new_size; + } + } +@@ -1752,7 +1752,7 @@ int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, + total_size += size; + } + +- debug("Memory size %llu\n", total_size); ++printf("Memory size %llu\n", total_size); + if (sizep) + *sizep = (phys_size_t)total_size; + +diff --git a/lib/fdtdec_common.c b/lib/fdtdec_common.c +index ddaca0087..7cac5ca72 100644 +--- a/lib/fdtdec_common.c ++++ b/lib/fdtdec_common.c +@@ -25,15 +25,15 @@ int fdtdec_get_int(const void *blob, int node, const char *prop_name, + const int *cell; + int len; + +- debug("%s: %s: ", __func__, prop_name); ++printf("%s: %s: ", __func__, prop_name); + cell = fdt_getprop(blob, node, prop_name, &len); + if (cell && len >= sizeof(int)) { + int val = fdt32_to_cpu(cell[0]); + +- debug("%#x (%d)\n", val, val); ++printf("%#x (%d)\n", val, val); + return val; + } +- debug("(not found)\n"); ++printf("(not found)\n"); + return default_val; + } + +@@ -43,15 +43,15 @@ unsigned int fdtdec_get_uint(const void *blob, int node, const char *prop_name, + const int *cell; + int len; + +- debug("%s: %s: ", __func__, prop_name); ++printf("%s: %s: ", __func__, prop_name); + cell = fdt_getprop(blob, node, prop_name, &len); + if (cell && len >= sizeof(unsigned int)) { + unsigned int val = fdt32_to_cpu(cell[0]); + +- debug("%#x (%d)\n", val, val); ++printf("%#x (%d)\n", val, val); + return val; + } +- debug("(not found)\n"); ++printf("(not found)\n"); + return default_val; + } + +diff --git a/lib/hashtable.c b/lib/hashtable.c +index ff5ff7263..d6443e74a 100644 +--- a/lib/hashtable.c ++++ b/lib/hashtable.c +@@ -255,7 +255,7 @@ static inline int _compare_and_overwrite_entry(struct env_entry item, + if (htab->change_ok != NULL && htab->change_ok( + &htab->table[idx].entry, item.data, + env_op_overwrite, flag)) { +- debug("change_ok() rejected setting variable " ++printf("change_ok() rejected setting variable " + "%s, skipping it!\n", item.key); + __set_errno(EPERM); + *retval = NULL; +@@ -265,7 +265,7 @@ static inline int _compare_and_overwrite_entry(struct env_entry item, + /* If there is a callback, call it */ + if (do_callback(&htab->table[idx].entry, item.key, + item.data, env_op_overwrite, flag)) { +- debug("callback() rejected setting variable " ++printf("callback() rejected setting variable " + "%s, skipping it!\n", item.key); + __set_errno(EINVAL); + *retval = NULL; +@@ -407,7 +407,7 @@ int hsearch_r(struct env_entry item, enum env_action action, + /* check for permission */ + if (htab->change_ok != NULL && htab->change_ok( + &htab->table[idx].entry, item.data, env_op_create, flag)) { +- debug("change_ok() rejected setting variable " ++printf("change_ok() rejected setting variable " + "%s, skipping it!\n", item.key); + _hdelete(item.key, htab, &htab->table[idx].entry, idx); + __set_errno(EPERM); +@@ -418,7 +418,7 @@ int hsearch_r(struct env_entry item, enum env_action action, + /* If there is a callback, call it */ + if (do_callback(&htab->table[idx].entry, item.key, item.data, + env_op_create, flag)) { +- debug("callback() rejected setting variable " ++printf("callback() rejected setting variable " + "%s, skipping it!\n", item.key); + _hdelete(item.key, htab, &htab->table[idx].entry, idx); + __set_errno(EINVAL); +@@ -451,7 +451,7 @@ static void _hdelete(const char *key, struct hsearch_data *htab, + struct env_entry *ep, int idx) + { + /* free used entry */ +- debug("hdelete: DELETING key \"%s\"\n", key); ++printf("hdelete: DELETING key \"%s\"\n", key); + free((void *)ep->key); + free(ep->data); + ep->flags = 0; +@@ -465,7 +465,7 @@ int hdelete_r(const char *key, struct hsearch_data *htab, int flag) + struct env_entry e, *ep; + int idx; + +- debug("hdelete: DELETE key \"%s\"\n", key); ++printf("hdelete: DELETE key \"%s\"\n", key); + + e.key = (char *)key; + +@@ -478,7 +478,7 @@ int hdelete_r(const char *key, struct hsearch_data *htab, int flag) + /* Check for permission */ + if (htab->change_ok != NULL && + htab->change_ok(ep, NULL, env_op_delete, flag)) { +- debug("change_ok() rejected deleting variable " ++printf("change_ok() rejected deleting variable " + "%s, skipping it!\n", key); + __set_errno(EPERM); + return -EPERM; +@@ -487,7 +487,7 @@ int hdelete_r(const char *key, struct hsearch_data *htab, int flag) + /* If there is a callback, call it */ + if (do_callback(&htab->table[idx].entry, key, NULL, + env_op_delete, flag)) { +- debug("callback() rejected deleting variable " ++printf("callback() rejected deleting variable " + "%s, skipping it!\n", key); + __set_errno(EINVAL); + return -EINVAL; +@@ -622,7 +622,7 @@ ssize_t hexport_r(struct hsearch_data *htab, const char sep, int flag, + return (-1); + } + +- debug("EXPORT table = %p, htab.size = %d, htab.filled = %d, size = %lu\n", ++printf("EXPORT table = %p, htab.size = %d, htab.filled = %d, size = %lu\n", + htab, htab->size, htab->filled, (ulong)size); + /* + * Pass 1: +@@ -754,7 +754,7 @@ static int drop_var_from_set(const char *name, int nvars, char * vars[]) + } + } + if (!res) +- debug("Skipping non-listed variable %s\n", name); ++printf("Skipping non-listed variable %s\n", name); + + return res; + } +@@ -813,7 +813,7 @@ int himport_r(struct hsearch_data *htab, + + /* we allocate new space to make sure we can write to the array */ + if ((data = malloc(size + 1)) == NULL) { +- debug("himport_r: can't malloc %lu bytes\n", (ulong)size + 1); ++printf("himport_r: can't malloc %lu bytes\n", (ulong)size + 1); + __set_errno(ENOMEM); + return 0; + } +@@ -831,7 +831,7 @@ int himport_r(struct hsearch_data *htab, + + if ((flag & H_NOCLEAR) == 0 && !nvars) { + /* Destroy old hash table if one exists */ +- debug("Destroy Hash Table: %p table = %p\n", htab, ++printf("Destroy Hash Table: %p table = %p\n", htab, + htab->table); + if (htab->table) + hdestroy_r(htab); +@@ -861,7 +861,7 @@ int himport_r(struct hsearch_data *htab, + if (nent > CONFIG_ENV_MAX_ENTRIES) + nent = CONFIG_ENV_MAX_ENTRIES; + +- debug("Create Hash Table: N=%d\n", nent); ++printf("Create Hash Table: N=%d\n", nent); + + if (hcreate_r(nent, htab) == 0) { + free(data); +@@ -913,12 +913,12 @@ int himport_r(struct hsearch_data *htab, + *dp++ = '\0'; + *dp++ = '\0'; /* terminate name */ + +- debug("DELETE CANDIDATE: \"%s\"\n", name); ++printf("DELETE CANDIDATE: \"%s\"\n", name); + if (!drop_var_from_set(name, nvars, localvars)) + continue; + + if (hdelete_r(name, htab, flag)) +- debug("DELETE ERROR ##############################\n"); ++printf("DELETE ERROR ##############################\n"); + + continue; + } +@@ -934,7 +934,7 @@ int himport_r(struct hsearch_data *htab, + ++dp; + + if (*name == 0) { +- debug("INSERT: unable to use an empty key\n"); ++printf("INSERT: unable to use an empty key\n"); + __set_errno(EINVAL); + free(data); + return 0; +@@ -956,12 +956,12 @@ int himport_r(struct hsearch_data *htab, + } + #endif + +- debug("INSERT: table %p, filled %d/%d rv %p ==> name=\"%s\" value=\"%s\"\n", ++printf("INSERT: table %p, filled %d/%d rv %p ==> name=\"%s\" value=\"%s\"\n", + htab, htab->filled, htab->size, + rv, name, value); + } while ((dp < data + size) && *dp); /* size check needed for text */ + /* without '\0' termination */ +- debug("INSERT: free(data = %p)\n", data); ++printf("INSERT: free(data = %p)\n", data); + free(data); + + if (flag & H_NOCLEAR) +@@ -986,7 +986,7 @@ int himport_r(struct hsearch_data *htab, + } + + end: +- debug("INSERT: done\n"); ++printf("INSERT: done\n"); + return 1; /* everything OK */ + } + +diff --git a/lib/image-sparse.c b/lib/image-sparse.c +index d80fdbbf5..59244a627 100644 +--- a/lib/image-sparse.c ++++ b/lib/image-sparse.c +@@ -85,15 +85,15 @@ int write_sparse_image(struct sparse_storage *info, + if (!info->mssg) + info->mssg = default_log; + +- debug("=== Sparse Image Header ===\n"); +- debug("magic: 0x%x\n", sparse_header->magic); +- debug("major_version: 0x%x\n", sparse_header->major_version); +- debug("minor_version: 0x%x\n", sparse_header->minor_version); +- debug("file_hdr_sz: %d\n", sparse_header->file_hdr_sz); +- debug("chunk_hdr_sz: %d\n", sparse_header->chunk_hdr_sz); +- debug("blk_sz: %d\n", sparse_header->blk_sz); +- debug("total_blks: %d\n", sparse_header->total_blks); +- debug("total_chunks: %d\n", sparse_header->total_chunks); ++printf("=== Sparse Image Header ===\n"); ++printf("magic: 0x%x\n", sparse_header->magic); ++printf("major_version: 0x%x\n", sparse_header->major_version); ++printf("minor_version: 0x%x\n", sparse_header->minor_version); ++printf("file_hdr_sz: %d\n", sparse_header->file_hdr_sz); ++printf("chunk_hdr_sz: %d\n", sparse_header->chunk_hdr_sz); ++printf("blk_sz: %d\n", sparse_header->blk_sz); ++printf("total_blks: %d\n", sparse_header->total_blks); ++printf("total_chunks: %d\n", sparse_header->total_chunks); + + /* + * Verify that the sparse block size is a multiple of our +@@ -117,10 +117,10 @@ int write_sparse_image(struct sparse_storage *info, + data += sizeof(chunk_header_t); + + if (chunk_header->chunk_type != CHUNK_TYPE_RAW) { +- debug("=== Chunk Header ===\n"); +- debug("chunk_type: 0x%x\n", chunk_header->chunk_type); +- debug("chunk_data_sz: 0x%x\n", chunk_header->chunk_sz); +- debug("total_size: 0x%x\n", chunk_header->total_sz); ++printf("=== Chunk Header ===\n"); ++printf("chunk_type: 0x%x\n", chunk_header->chunk_type); ++printf("chunk_data_sz: 0x%x\n", chunk_header->chunk_sz); ++printf("total_size: 0x%x\n", chunk_header->total_sz); + } + + if (sparse_header->chunk_hdr_sz > sizeof(chunk_header_t)) { +@@ -252,7 +252,7 @@ int write_sparse_image(struct sparse_storage *info, + } + } + +- debug("Wrote %d blocks, expected to write %d blocks\n", ++printf("Wrote %d blocks, expected to write %d blocks\n", + total_blocks, sparse_header->total_blks); + printf("........ wrote %llu bytes to '%s'\n", bytes_written, part_name); + +diff --git a/lib/lzma/LzmaTools.c b/lib/lzma/LzmaTools.c +index 521258e62..db72391ac 100644 +--- a/lib/lzma/LzmaTools.c ++++ b/lib/lzma/LzmaTools.c +@@ -91,8 +91,8 @@ int lzmaBuffToBuffDecompress (unsigned char *outStream, SizeT *uncompressedSize, + } + } + +- debug("LZMA: Uncompresed size............ 0x%zx\n", outSizeFull); +- debug("LZMA: Compresed size.............. 0x%zx\n", compressedSize); ++printf("LZMA: Uncompresed size............ 0x%zx\n", outSizeFull); ++printf("LZMA: Compresed size.............. 0x%zx\n", compressedSize); + + g_Alloc.Alloc = SzAlloc; + g_Alloc.Free = SzFree; +@@ -112,7 +112,7 @@ int lzmaBuffToBuffDecompress (unsigned char *outStream, SizeT *uncompressedSize, + inStream, LZMA_PROPS_SIZE, LZMA_FINISH_END, &state, &g_Alloc); + *uncompressedSize = outProcessed; + +- debug("LZMA: Uncompressed ............... 0x%zx\n", outProcessed); ++printf("LZMA: Uncompressed ............... 0x%zx\n", outProcessed); + + if (res != SZ_OK) { + return res; +diff --git a/lib/membuff.c b/lib/membuff.c +index 36dc43a52..967732c24 100644 +--- a/lib/membuff.c ++++ b/lib/membuff.c +@@ -139,7 +139,7 @@ int membuff_getraw(struct membuff *mb, int maxlen, bool update, char **data) + } + } + +- debug("getraw: maxlen=%d, update=%d, head=%d, tail=%d, data=%d, len=%d", ++printf("getraw: maxlen=%d, update=%d, head=%d, tail=%d, data=%d, len=%d", + maxlen, update, (int)(mb->head - mb->start), + (int)(mb->tail - mb->start), (int)(*data - mb->start), len); + +@@ -235,7 +235,7 @@ bool membuff_makecontig(struct membuff *mb) + { + int topsize, botsize; + +- debug("makecontig: head=%d, tail=%d, size=%d", ++printf("makecontig: head=%d, tail=%d, size=%d", + (int)(mb->head - mb->start), (int)(mb->tail - mb->start), + (int)(mb->end - mb->start)); + +@@ -259,7 +259,7 @@ bool membuff_makecontig(struct membuff *mb) + if (mb->head + topsize >= mb->tail) + return false; + memmove(mb->start + topsize, mb->start, botsize); +- debug(" - memmove(%d, %d, %d)", topsize, 0, botsize); ++printf(" - memmove(%d, %d, %d)", topsize, 0, botsize); + + /* nothing at the start, so skip that step */ + } else { +@@ -269,13 +269,13 @@ bool membuff_makecontig(struct membuff *mb) + + /* now move data at top down to the bottom */ + memcpy(mb->start, mb->tail, topsize); +- debug(" - memcpy(%d, %d, %d)", 0, (int)(mb->tail - mb->start), topsize); ++printf(" - memcpy(%d, %d, %d)", 0, (int)(mb->tail - mb->start), topsize); + + /* adjust pointers */ + mb->tail = mb->start; + mb->head = mb->start + topsize + botsize; + +- debug(" - head=%d, tail=%d", (int)(mb->head - mb->start), ++printf(" - head=%d, tail=%d", (int)(mb->head - mb->start), + (int)(mb->tail - mb->start)); + + /* all ok */ +diff --git a/lib/of_live.c b/lib/of_live.c +index 05a45ed34..bb0273322 100644 +--- a/lib/of_live.c ++++ b/lib/of_live.c +@@ -104,7 +104,7 @@ static void *unflatten_dt_node(const void *blob, void *mem, int *poffset, + strcpy(fn, dad->full_name); + #ifdef DEBUG + if ((strlen(fn) + l + 1) != allocl) { +- debug("%s: p: %d, l: %d, a: %d\n", ++printf("%s: p: %d, l: %d, a: %d\n", + pathp, (int)strlen(fn), l, + allocl); + } +@@ -136,7 +136,7 @@ static void *unflatten_dt_node(const void *blob, void *mem, int *poffset, + } + + if (pname == NULL) { +- debug("Can't find property name in list !\n"); ++printf("Can't find property name in list !\n"); + break; + } + if (strcmp(pname, "name") == 0) +@@ -196,7 +196,7 @@ static void *unflatten_dt_node(const void *blob, void *mem, int *poffset, + prev_pp = &pp->next; + memcpy(pp->value, ps, sz - 1); + ((char *)pp->value)[sz - 1] = 0; +- debug("fixed up name for %s -> %s\n", pathp, ++printf("fixed up name for %s -> %s\n", pathp, + (char *)pp->value); + } + } +@@ -222,7 +222,7 @@ static void *unflatten_dt_node(const void *blob, void *mem, int *poffset, + } + + if (*poffset < 0 && *poffset != -FDT_ERR_NOTFOUND) { +- debug("unflatten: error %d processing FDT\n", *poffset); ++printf("unflatten: error %d processing FDT\n", *poffset); + return NULL; + } + +@@ -266,20 +266,20 @@ static int unflatten_device_tree(const void *blob, + int start; + void *mem; + +- debug(" -> unflatten_device_tree()\n"); ++printf(" -> unflatten_device_tree()\n"); + + if (!blob) { +- debug("No device tree pointer\n"); ++printf("No device tree pointer\n"); + return -EINVAL; + } + +- debug("Unflattening device tree:\n"); +- debug("magic: %08x\n", fdt_magic(blob)); +- debug("size: %08x\n", fdt_totalsize(blob)); +- debug("version: %08x\n", fdt_version(blob)); ++printf("Unflattening device tree:\n"); ++printf("magic: %08x\n", fdt_magic(blob)); ++printf("size: %08x\n", fdt_totalsize(blob)); ++printf("version: %08x\n", fdt_version(blob)); + + if (fdt_check_header(blob)) { +- debug("Invalid device tree blob header\n"); ++printf("Invalid device tree blob header\n"); + return -EINVAL; + } + +@@ -291,7 +291,7 @@ static int unflatten_device_tree(const void *blob, + return -EFAULT; + size = ALIGN(size, 4); + +- debug(" size is %lx, allocating...\n", size); ++printf(" size is %lx, allocating...\n", size); + + /* Allocate memory for the expanded device tree */ + mem = malloc(size + 4); +@@ -299,18 +299,18 @@ static int unflatten_device_tree(const void *blob, + + *(__be32 *)(mem + size) = cpu_to_be32(0xdeadbeef); + +- debug(" unflattening %p...\n", mem); ++printf(" unflattening %p...\n", mem); + + /* Second pass, do actual unflattening */ + start = 0; + unflatten_dt_node(blob, mem, &start, NULL, mynodes, 0, false); + if (be32_to_cpup(mem + size) != 0xdeadbeef) { +- debug("End of tree marker overwritten: %08x\n", ++printf("End of tree marker overwritten: %08x\n", + be32_to_cpup(mem + size)); + return -ENOSPC; + } + +- debug(" <- unflatten_device_tree()\n"); ++printf(" <- unflatten_device_tree()\n"); + + return 0; + } +@@ -319,18 +319,18 @@ int of_live_build(const void *fdt_blob, struct device_node **rootp) + { + int ret; + +- debug("%s: start\n", __func__); ++printf("%s: start\n", __func__); + ret = unflatten_device_tree(fdt_blob, rootp); + if (ret) { +- debug("Failed to create live tree: err=%d\n", ret); ++printf("Failed to create live tree: err=%d\n", ret); + return ret; + } + ret = of_alias_scan(); + if (ret) { +- debug("Failed to scan live tree aliases: err=%d\n", ret); ++printf("Failed to scan live tree aliases: err=%d\n", ret); + return ret; + } +- debug("%s: stop\n", __func__); ++printf("%s: stop\n", __func__); + + return ret; + } +diff --git a/lib/optee/optee.c b/lib/optee/optee.c +index 672690dc5..9464410cb 100644 +--- a/lib/optee/optee.c ++++ b/lib/optee/optee.c +@@ -95,7 +95,7 @@ static int optee_copy_firmware_node(ofnode node, void *fdt_blob) + /* copy the compatible property */ + prop = ofnode_get_property(node, "compatible", &len); + if (!prop) { +- debug("missing OP-TEE compatible property"); ++printf("missing OP-TEE compatible property"); + return -EINVAL; + } + +@@ -106,7 +106,7 @@ static int optee_copy_firmware_node(ofnode node, void *fdt_blob) + /* copy the method property */ + prop = ofnode_get_property(node, "method", &len); + if (!prop) { +- debug("missing OP-TEE method property"); ++printf("missing OP-TEE method property"); + return -EINVAL; + } + +@@ -129,7 +129,7 @@ int optee_copy_fdt_nodes(void *new_blob) + /* only proceed if there is an /firmware/optee node */ + node = ofnode_path("/firmware/optee"); + if (!ofnode_valid(node)) { +- debug("No OP-TEE firmware node in old fdt, nothing to do"); ++printf("No OP-TEE firmware node in old fdt, nothing to do"); + return 0; + } + +@@ -139,7 +139,7 @@ int optee_copy_fdt_nodes(void *new_blob) + * so do not interfere. + */ + if (fdt_path_offset(new_blob, "/firmware/optee") >= 0) { +- debug("OP-TEE Device Tree node already exists in target"); ++printf("OP-TEE Device Tree node already exists in target"); + return 0; + } + +diff --git a/lib/rsa/rsa-mod-exp.c b/lib/rsa/rsa-mod-exp.c +index 74f9eb16c..b3b372b61 100644 +--- a/lib/rsa/rsa-mod-exp.c ++++ b/lib/rsa/rsa-mod-exp.c +@@ -188,7 +188,7 @@ static int pow_mod(const struct rsa_public_key *key, uint32_t *inout) + + /* Sanity check for stack size - key->len is in 32-bit words */ + if (key->len > RSA_MAX_KEY_BITS / 32) { +- debug("RSA key words %u exceeds maximum %d\n", key->len, ++printf("RSA key words %u exceeds maximum %d\n", key->len, + RSA_MAX_KEY_BITS / 32); + return -EINVAL; + } +@@ -205,13 +205,13 @@ static int pow_mod(const struct rsa_public_key *key, uint32_t *inout) + return -EINVAL; + + if (k < 2) { +- debug("Public exponent is too short (%d bits, minimum 2)\n", ++printf("Public exponent is too short (%d bits, minimum 2)\n", + k); + return -EINVAL; + } + + if (!is_public_exponent_bit_set(key, 0)) { +- debug("LSB of RSA public exponent must be set.\n"); ++printf("LSB of RSA public exponent must be set.\n"); + return -EINVAL; + } + +@@ -262,7 +262,7 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len, + int ret; + + if (!prop) { +- debug("%s: Skipping invalid prop", __func__); ++printf("%s: Skipping invalid prop", __func__); + return -EBADF; + } + key.n0inv = prop->n0inv; +@@ -274,13 +274,13 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len, + key.exponent = fdt64_to_cpup(prop->public_exponent); + + if (!key.len || !prop->modulus || !prop->rr) { +- debug("%s: Missing RSA key info", __func__); ++printf("%s: Missing RSA key info", __func__); + return -EFAULT; + } + + /* Sanity check for stack size */ + if (key.len > RSA_MAX_KEY_BITS || key.len < RSA_MIN_KEY_BITS) { +- debug("RSA key bits %u outside allowed range %d..%d\n", ++printf("RSA key bits %u outside allowed range %d..%d\n", + key.len, RSA_MIN_KEY_BITS, RSA_MAX_KEY_BITS); + return -EFAULT; + } +@@ -292,7 +292,7 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len, + rsa_convert_big_endian(key.modulus, (uint32_t *)prop->modulus, key.len); + rsa_convert_big_endian(key.rr, (uint32_t *)prop->rr, key.len); + if (!key.modulus || !key.rr) { +- debug("%s: Out of memory", __func__); ++printf("%s: Out of memory", __func__); + return -ENOMEM; + } + +@@ -332,7 +332,7 @@ int zynq_pow_mod(uint32_t *keyptr, uint32_t *inout) + + /* Sanity check for stack size - key->len is in 32-bit words */ + if (key->len > RSA_MAX_KEY_BITS / 32) { +- debug("RSA key words %u exceeds maximum %d\n", key->len, ++printf("RSA key words %u exceeds maximum %d\n", key->len, + RSA_MAX_KEY_BITS / 32); + return -EINVAL; + } +diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c +index 5a1583b8f..c912961b2 100644 +--- a/lib/rsa/rsa-sign.c ++++ b/lib/rsa/rsa-sign.c +@@ -473,7 +473,7 @@ static int rsa_sign_with_key(EVP_PKEY *pkey, struct padding_algo *padding_algo, + #endif + EVP_MD_CTX_destroy(context); + +- debug("Got signature: %d bytes, expected %zu\n", *sig_size, size); ++printf("Got signature: %d bytes, expected %zu\n", *sig_size, size); + *sigp = sig; + *sig_size = size; + +@@ -666,7 +666,7 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest) + EVP_PKEY *pkey = NULL; + ENGINE *e = NULL; + +- debug("%s: Getting verification data\n", __func__); ++printf("%s: Getting verification data\n", __func__); + if (info->engine_id) { + ret = rsa_engine_init(info->engine_id, &e); + if (ret) +diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c +index aee76f42d..22243f5d7 100644 +--- a/lib/rsa/rsa-verify.c ++++ b/lib/rsa/rsa-verify.c +@@ -82,13 +82,13 @@ int padding_pkcs_15_verify(struct image_sign_info *info, + /* Check pkcs1.5 padding bytes. */ + ret = rsa_verify_padding(msg, pad_len, checksum); + if (ret) { +- debug("In RSAVerify(): Padding check failed!\n"); ++printf("In RSAVerify(): Padding check failed!\n"); + return -EINVAL; + } + + /* Check hash. */ + if (memcmp((uint8_t *)msg + pad_len, hash, msg_len - pad_len)) { +- debug("In RSAVerify(): Hash check failed!\n"); ++printf("In RSAVerify(): Hash check failed!\n"); + return -EACCES; + } + +@@ -136,7 +136,7 @@ static int mask_generation_function1(struct checksum_algo *checksum, + + tmp = malloc(hash_len); + if (!tmp) { +- debug("%s: can't allocate array tmp\n", __func__); ++printf("%s: can't allocate array tmp\n", __func__); + ret = -ENOMEM; + goto out; + } +@@ -148,7 +148,7 @@ static int mask_generation_function1(struct checksum_algo *checksum, + region, region_count, + tmp); + if (ret < 0) { +- debug("%s: Error in checksum calculation\n", __func__); ++printf("%s: Error in checksum calculation\n", __func__); + goto out; + } + +@@ -186,7 +186,7 @@ static int compute_hash_prime(struct checksum_algo *checksum, + + ret = checksum->calculate(checksum->name, region, region_count, hprime); + if (ret < 0) { +- debug("%s: Error in checksum calculation\n", __func__); ++printf("%s: Error in checksum calculation\n", __func__); + goto out; + } + +@@ -330,15 +330,15 @@ static int rsa_verify_key(struct image_sign_info *info, + return -EIO; + + if (sig_len != (prop->num_bits / 8)) { +- debug("Signature is of incorrect length %d\n", sig_len); ++printf("Signature is of incorrect length %d\n", sig_len); + return -EINVAL; + } + +- debug("Checksum algorithm: %s", checksum->name); ++printf("Checksum algorithm: %s", checksum->name); + + /* Sanity check for stack size */ + if (sig_len > RSA_MAX_SIG_BITS / 8) { +- debug("Signature length %u exceeds maximum %d\n", sig_len, ++printf("Signature length %u exceeds maximum %d\n", sig_len, + RSA_MAX_SIG_BITS / 8); + return -EINVAL; + } +@@ -358,13 +358,13 @@ static int rsa_verify_key(struct image_sign_info *info, + ret = rsa_mod_exp_sw(sig, sig_len, prop, buf); + #endif + if (ret) { +- debug("Error in Modular exponentation\n"); ++printf("Error in Modular exponentation\n"); + return ret; + } + + ret = padding->verify(info, buf, key_len, hash, hash_len); + if (ret) { +- debug("In RSAVerify(): padding check failed!\n"); ++printf("In RSAVerify(): padding check failed!\n"); + return ret; + } + +@@ -396,7 +396,7 @@ int rsa_verify_with_pkey(struct image_sign_info *info, + /* Public key is self-described to fill key_prop */ + ret = rsa_gen_key_prop(info->key, info->keylen, &prop); + if (ret) { +- debug("Generating necessary parameter for decoding failed\n"); ++printf("Generating necessary parameter for decoding failed\n"); + return ret; + } + +@@ -442,13 +442,13 @@ static int rsa_verify_with_keynode(struct image_sign_info *info, + const char *algo; + + if (node < 0) { +- debug("%s: Skipping invalid node", __func__); ++printf("%s: Skipping invalid node", __func__); + return -EBADF; + } + + algo = fdt_getprop(blob, node, "algo", NULL); + if (strcmp(info->name, algo)) { +- debug("%s: Wrong algo: have %s, expected %s", __func__, ++printf("%s: Wrong algo: have %s, expected %s", __func__, + info->name, algo); + return -EFAULT; + } +@@ -468,7 +468,7 @@ static int rsa_verify_with_keynode(struct image_sign_info *info, + prop.rr = fdt_getprop(blob, node, "rsa,r-squared", NULL); + + if (!prop.num_bits || !prop.modulus || !prop.rr) { +- debug("%s: Missing RSA key info", __func__); ++printf("%s: Missing RSA key info", __func__); + return -EFAULT; + } + +@@ -506,7 +506,7 @@ int rsa_verify_hash(struct image_sign_info *info, + + sig_node = fdt_subnode_offset(blob, 0, FIT_SIG_NODENAME); + if (sig_node < 0) { +- debug("%s: No signature node found\n", __func__); ++printf("%s: No signature node found\n", __func__); + return -ENOENT; + } + +@@ -556,7 +556,7 @@ int rsa_verify(struct image_sign_info *info, + */ + if (info->checksum->checksum_len > + info->crypto->key_len) { +- debug("%s: invlaid checksum-algorithm %s for %s\n", ++printf("%s: invlaid checksum-algorithm %s for %s\n", + __func__, info->checksum->name, info->crypto->name); + return -EINVAL; + } +@@ -565,7 +565,7 @@ int rsa_verify(struct image_sign_info *info, + ret = info->checksum->calculate(info->checksum->name, + region, region_count, hash); + if (ret < 0) { +- debug("%s: Error in checksum calculation\n", __func__); ++printf("%s: Error in checksum calculation\n", __func__); + return -EINVAL; + } + +diff --git a/lib/tpm-common.c b/lib/tpm-common.c +index 4277846fd..8124a3403 100644 +--- a/lib/tpm-common.c ++++ b/lib/tpm-common.c +@@ -51,7 +51,7 @@ int pack_byte_string(u8 *str, size_t size, const char *format, ...) + length = va_arg(args, u32); + break; + default: +- debug("Couldn't recognize format string\n"); ++printf("Couldn't recognize format string\n"); + va_end(args); + return -1; + } +@@ -114,7 +114,7 @@ int unpack_byte_string(const u8 *str, size_t size, const char *format, ...) + break; + default: + va_end(args); +- debug("Couldn't recognize format string\n"); ++printf("Couldn't recognize format string\n"); + return -1; + } + +diff --git a/net/arp.c b/net/arp.c +index 1d06ed257..c63df738c 100644 +--- a/net/arp.c ++++ b/net/arp.c +@@ -233,7 +233,7 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) + } + return; + default: +- debug("Unexpected ARP opcode 0x%x\n", ++printf("Unexpected ARP opcode 0x%x\n", + ntohs(arp->ar_op)); + return; + } +diff --git a/net/bootp.c b/net/bootp.c +index 163af41e9..a2504826d 100644 +--- a/net/bootp.c ++++ b/net/bootp.c +@@ -141,7 +141,7 @@ static int check_reply_packet(uchar *pkt, unsigned dest, unsigned src, + else if (memcmp(bp->bp_chaddr, net_ethaddr, HWL_ETHER) != 0) + retval = -7; + +- debug("Filtering pkt = %d\n", retval); ++printf("Filtering pkt = %d\n", retval); + + return retval; + } +@@ -171,7 +171,7 @@ static void store_bootp_params(struct bootp_hdr *bp) + sizeof(net_boot_file_name)); + } + +- debug("net_boot_file_name: %s\n", net_boot_file_name); ++printf("net_boot_file_name: %s\n", net_boot_file_name); + + /* Propagate to environment: + * don't delete exising entry when BOOTP / DHCP reply does +@@ -209,7 +209,7 @@ static void bootp_process_vendor_field(u8 *ext) + { + int size = *(ext + 1); + +- debug("[BOOTP] Processing extension %d... (%d bytes)\n", *ext, ++printf("[BOOTP] Processing extension %d... (%d bytes)\n", *ext, + *(ext + 1)); + + net_boot_file_expected_size_in_blocks = 0; +@@ -317,7 +317,7 @@ static void bootp_process_vendor(u8 *ext, int size) + { + u8 *end = ext + size; + +- debug("[BOOTP] Checking extension (%d bytes)...\n", size); ++printf("[BOOTP] Checking extension (%d bytes)...\n", size); + + while ((ext < end) && (*ext != 0xff)) { + if (*ext == 0) { +@@ -331,29 +331,29 @@ static void bootp_process_vendor(u8 *ext, int size) + } + } + +- debug("[BOOTP] Received fields:\n"); ++printf("[BOOTP] Received fields:\n"); + if (net_netmask.s_addr) +- debug("net_netmask : %pI4\n", &net_netmask); ++printf("net_netmask : %pI4\n", &net_netmask); + + if (net_gateway.s_addr) +- debug("net_gateway : %pI4", &net_gateway); ++printf("net_gateway : %pI4", &net_gateway); + + if (net_boot_file_expected_size_in_blocks) +- debug("net_boot_file_expected_size_in_blocks : %d\n", ++printf("net_boot_file_expected_size_in_blocks : %d\n", + net_boot_file_expected_size_in_blocks); + + if (net_hostname[0]) +- debug("net_hostname : %s\n", net_hostname); ++printf("net_hostname : %s\n", net_hostname); + + if (net_root_path[0]) +- debug("net_root_path : %s\n", net_root_path); ++printf("net_root_path : %s\n", net_root_path); + + if (net_nis_domain[0]) +- debug("net_nis_domain : %s\n", net_nis_domain); ++printf("net_nis_domain : %s\n", net_nis_domain); + + #if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_NTPSERVER) + if (net_ntp_server.s_addr) +- debug("net_ntp_server : %pI4\n", &net_ntp_server); ++printf("net_ntp_server : %pI4\n", &net_ntp_server); + #endif + } + +@@ -365,7 +365,7 @@ static void bootp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + { + struct bootp_hdr *bp; + +- debug("got BOOTP packet (src=%d, dst=%d, len=%d want_len=%zu)\n", ++printf("got BOOTP packet (src=%d, dst=%d, len=%d want_len=%zu)\n", + src, dest, len, sizeof(struct bootp_hdr)); + + bp = (struct bootp_hdr *)pkt; +@@ -390,7 +390,7 @@ static void bootp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + net_set_timeout_handler(0, (thand_f *)0); + bootstage_mark_name(BOOTSTAGE_ID_BOOTP_STOP, "bootp_stop"); + +- debug("Got good BOOTP\n"); ++printf("Got good BOOTP\n"); + + net_auto_load(); + } +@@ -988,7 +988,7 @@ static void dhcp_send_request_packet(struct bootp_hdr *bp_offer) + struct in_addr zero_ip; + struct in_addr bcast_ip; + +- debug("dhcp_send_request_packet: Sending DHCPREQUEST\n"); ++printf("dhcp_send_request_packet: Sending DHCPREQUEST\n"); + pkt = net_tx_packet; + memset((void *)pkt, 0, PKTSIZE); + +@@ -1040,7 +1040,7 @@ static void dhcp_send_request_packet(struct bootp_hdr *bp_offer) + #ifdef CONFIG_BOOTP_DHCP_REQUEST_DELAY + udelay(CONFIG_BOOTP_DHCP_REQUEST_DELAY); + #endif /* CONFIG_BOOTP_DHCP_REQUEST_DELAY */ +- debug("Transmitting DHCPREQUEST packet: len = %d\n", pktlen); ++printf("Transmitting DHCPREQUEST packet: len = %d\n", pktlen); + net_send_packet(net_tx_packet, pktlen); + } + +@@ -1052,14 +1052,14 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + { + struct bootp_hdr *bp = (struct bootp_hdr *)pkt; + +- debug("DHCPHandler: got packet: (src=%d, dst=%d, len=%d) state: %d\n", ++printf("DHCPHandler: got packet: (src=%d, dst=%d, len=%d) state: %d\n", + src, dest, len, dhcp_state); + + /* Filter out pkts we don't want */ + if (check_reply_packet(pkt, dest, src, len)) + return; + +- debug("DHCPHandler: got DHCP packet: (src=%d, dst=%d, len=%d) state: " ++printf("DHCPHandler: got DHCP packet: (src=%d, dst=%d, len=%d) state: " + "%d\n", src, dest, len, dhcp_state); + + if (net_read_ip(&bp->bp_yiaddr).s_addr == 0) { +@@ -1077,7 +1077,7 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + * response. If filename is in format we recognize, assume it + * is a valid OFFER from a server we want. + */ +- debug("DHCP: state=SELECTING bp_file: \"%s\"\n", bp->bp_file); ++printf("DHCP: state=SELECTING bp_file: \"%s\"\n", bp->bp_file); + #ifdef CONFIG_SYS_BOOTFILE_PREFIX + if (strncmp(bp->bp_file, + CONFIG_SYS_BOOTFILE_PREFIX, +@@ -1092,7 +1092,7 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + 1000); + #endif /* CONFIG_SERVERIP_FROM_PROXYDHCP */ + +- debug("TRANSITIONING TO REQUESTING STATE\n"); ++printf("TRANSITIONING TO REQUESTING STATE\n"); + dhcp_state = REQUESTING; + + net_set_timeout_handler(5000, bootp_timeout_handler); +@@ -1104,7 +1104,7 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + return; + break; + case REQUESTING: +- debug("DHCP State: REQUESTING\n"); ++printf("DHCP State: REQUESTING\n"); + + if (dhcp_message_type((u8 *)bp->bp_vend) == DHCP_ACK) { + dhcp_packet_process_options(bp); +diff --git a/net/dns.c b/net/dns.c +index 5b1fe5b01..675158330 100644 +--- a/net/dns.c ++++ b/net/dns.c +@@ -97,13 +97,13 @@ static void dns_send(void) + *p++ = 1; /* Class: inet, 0x0001 */ + + n = p - pkt; /* Total packet length */ +- debug("Packet size %d\n", n); ++printf("Packet size %d\n", n); + + dns_our_port = random_port(); + + net_send_udp_packet(net_server_ethaddr, net_dns_server, + DNS_SERVICE_PORT, dns_our_port, n); +- debug("DNS packet sent\n"); ++printf("DNS packet sent\n"); + } + + static void dns_timeout_handler(void) +@@ -123,12 +123,12 @@ static void dns_handler(uchar *pkt, unsigned dest, struct in_addr sip, + struct in_addr ip_addr; + + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + if (dest != dns_our_port) + return; + + for (i = 0; i < len; i += 4) +- debug("0x%p - 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n", ++printf("0x%p - 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n", + pkt+i, pkt[i], pkt[i+1], pkt[i+2], pkt[i+3]); + + /* We sent one query. We want to have a single answer: */ +@@ -167,22 +167,22 @@ static void dns_handler(uchar *pkt, unsigned dest, struct in_addr sip, + p++; + p--; + } +- debug("Name (Offset in header): %d\n", p[1]); ++printf("Name (Offset in header): %d\n", p[1]); + + type = get_unaligned_be16(p+2); +- debug("type = %d\n", type); ++printf("type = %d\n", type); + if (type == DNS_CNAME_RECORD) { + /* CNAME answer. shift to the next section */ +- debug("Found canonical name\n"); ++printf("Found canonical name\n"); + dlen = get_unaligned_be16(p+10); +- debug("dlen = %d\n", dlen); ++printf("dlen = %d\n", dlen); + p += 12 + dlen; + } else if (type == DNS_A_RECORD) { +- debug("Found A-record\n"); ++printf("Found A-record\n"); + found = 1; + stop = 1; + } else { +- debug("Unknown type\n"); ++printf("Unknown type\n"); + stop = 1; + } + } +@@ -207,7 +207,7 @@ static void dns_handler(uchar *pkt, unsigned dest, struct in_addr sip, + + void dns_start(void) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + net_set_timeout_handler(DNS_TIMEOUT, dns_timeout_handler); + net_set_udp_handler(dns_handler); +diff --git a/net/eth-uclass.c b/net/eth-uclass.c +index 5146bd666..cb2d0d002 100644 +--- a/net/eth-uclass.c ++++ b/net/eth-uclass.c +@@ -290,7 +290,7 @@ int eth_init(void) + old_current = current; + do { + if (current) { +- debug("Trying %s\n", current->name); ++printf("Trying %s\n", current->name); + + if (device_active(current)) { + ret = eth_get_ops(current)->start(current); +@@ -306,9 +306,9 @@ int eth_init(void) + ret = eth_errno; + } + +- debug("FAIL\n"); ++printf("FAIL\n"); + } else { +- debug("PROBE FAIL\n"); ++printf("PROBE FAIL\n"); + } + + /* +@@ -367,7 +367,7 @@ int eth_send(void *packet, int length) + ret = eth_get_ops(current)->send(current, packet, length); + if (ret < 0) { + /* We cannot completely return the error at present */ +- debug("%s: send() returned error %d\n", __func__, ret); ++printf("%s: send() returned error %d\n", __func__, ret); + } + #if defined(CONFIG_CMD_PCAP) + if (ret >= 0) +@@ -407,7 +407,7 @@ int eth_rx(void) + ret = 0; + if (ret < 0) { + /* We cannot completely return the error at present */ +- debug("%s: recv() returned error %d\n", __func__, ret); ++printf("%s: recv() returned error %d\n", __func__, ret); + } + return ret; + } +diff --git a/net/eth_legacy.c b/net/eth_legacy.c +index 96ed5a472..d621721f8 100644 +--- a/net/eth_legacy.c ++++ b/net/eth_legacy.c +@@ -326,14 +326,14 @@ int eth_init(void) + + old_current = eth_current; + do { +- debug("Trying %s\n", eth_current->name); ++printf("Trying %s\n", eth_current->name); + + if (eth_current->init(eth_current, gd->bd) >= 0) { + eth_current->state = ETH_STATE_ACTIVE; + + return 0; + } +- debug("FAIL\n"); ++printf("FAIL\n"); + + eth_try_another(0); + } while (old_current != eth_current); +diff --git a/net/link_local.c b/net/link_local.c +index 8aec3c799..2fe17b359 100644 +--- a/net/link_local.c ++++ b/net/link_local.c +@@ -299,7 +299,7 @@ void link_local_receive_arp(struct arp_hdr *arp, int len) + conflicts++; + state = PROBE; + if (conflicts >= MAX_CONFLICTS) { +- debug("%s ratelimit\n", eth_get_name()); ++printf("%s ratelimit\n", eth_get_name()); + timeout_ms = RATE_LIMIT_INTERVAL * 1000; + state = RATE_LIMIT_PROBE; + } +@@ -314,7 +314,7 @@ void link_local_receive_arp(struct arp_hdr *arp, int len) + case MONITOR: + /* If a conflict, we try to defend with a single ARP probe */ + if (source_ip_conflict) { +- debug("monitor conflict -- defending\n"); ++printf("monitor conflict -- defending\n"); + state = DEFEND; + timeout_ms = DEFEND_INTERVAL * 1000; + arp_raw_request(ip, net_ethaddr, ip); +@@ -324,7 +324,7 @@ void link_local_receive_arp(struct arp_hdr *arp, int len) + /* Well, we tried. Start over (on conflict) */ + if (source_ip_conflict) { + state = PROBE; +- debug("defend conflict -- starting over\n"); ++printf("defend conflict -- starting over\n"); + ready = 0; + net_ip.s_addr = 0; + +@@ -337,7 +337,7 @@ void link_local_receive_arp(struct arp_hdr *arp, int len) + break; + default: + /* Invalid, should never happen. Restart the whole protocol */ +- debug("invalid state -- starting over\n"); ++printf("invalid state -- starting over\n"); + state = PROBE; + ip = pick(); + timeout_ms = 0; +diff --git a/net/mdio-mux-uclass.c b/net/mdio-mux-uclass.c +index 780526c19..2d3c1d4b3 100644 +--- a/net/mdio-mux-uclass.c ++++ b/net/mdio-mux-uclass.c +@@ -164,7 +164,7 @@ static int dm_mdio_mux_post_bind(struct udevice *mux) + int err, first_err = 0; + + if (!dev_has_ofnode(mux)) { +- debug("%s: no mux node found, no child MDIO busses set up\n", ++printf("%s: no mux node found, no child MDIO busses set up\n", + __func__); + return 0; + } +@@ -202,7 +202,7 @@ static int dm_mdio_mux_post_probe(struct udevice *mux) + err = uclass_get_device_by_phandle(UCLASS_MDIO, mux, "mdio-parent-bus", + &priv->mdio_parent); + if (err) { +- debug("%s: didn't find mdio-parent-bus\n", __func__); ++printf("%s: didn't find mdio-parent-bus\n", __func__); + return err; + } + +diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c +index 1b687765b..ce0a4db79 100644 +--- a/net/mdio-uclass.c ++++ b/net/mdio-uclass.c +@@ -44,7 +44,7 @@ static int dm_mdio_post_bind(struct udevice *dev) + if (dev_has_ofnode(dev)) { + dt_name = dev_read_string(dev, "device-name"); + if (dt_name) { +- debug("renaming dev %s to %s\n", dev->name, dt_name); ++printf("renaming dev %s to %s\n", dev->name, dt_name); + device_set_name(dev, dt_name); + } + } +@@ -54,7 +54,7 @@ static int dm_mdio_post_bind(struct udevice *dev) + * it happy + */ + if (strchr(dev->name, ' ')) { +- debug("\nError: MDIO device name \"%s\" has a space!\n", ++printf("\nError: MDIO device name \"%s\" has a space!\n", + dev->name); + return -EINVAL; + } +@@ -193,7 +193,7 @@ struct phy_device *dm_eth_phy_connect(struct udevice *ethdev) + int i; + + if (!dev_has_ofnode(ethdev)) { +- debug("%s: supplied eth dev has no DT node!\n", ethdev->name); ++printf("%s: supplied eth dev has no DT node!\n", ethdev->name); + return NULL; + } + +diff --git a/net/net.c b/net/net.c +index b58f3062b..709e7cafd 100644 +--- a/net/net.c ++++ b/net/net.c +@@ -1189,13 +1189,13 @@ void net_process_received_packet(uchar *in_packet, int len) + debug_cond(DEBUG_NET_PKT, "Got IP\n"); + /* Before we start poking the header, make sure it is there */ + if (len < IP_UDP_HDR_SIZE) { +- debug("len bad %d < %lu\n", len, ++printf("len bad %d < %lu\n", len, + (ulong)IP_UDP_HDR_SIZE); + return; + } + /* Check the packet length */ + if (len < ntohs(ip->ip_len)) { +- debug("len bad %d < %d\n", len, ntohs(ip->ip_len)); ++printf("len bad %d < %d\n", len, ntohs(ip->ip_len)); + return; + } + len = ntohs(ip->ip_len); +@@ -1210,7 +1210,7 @@ void net_process_received_packet(uchar *in_packet, int len) + return; + /* Check the Checksum of the header */ + if (!ip_checksum_ok((uchar *)ip, IP_HDR_SIZE)) { +- debug("checksum bad\n"); ++printf("checksum bad\n"); + return; + } + /* If it is not for us, ignore it */ +diff --git a/net/nfs.c b/net/nfs.c +index 70d0e08bd..2981f5b66 100644 +--- a/net/nfs.c ++++ b/net/nfs.c +@@ -396,7 +396,7 @@ RPC request dispatcher + **************************************************************************/ + static void nfs_send(void) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + switch (nfs_state) { + case STATE_PRCLOOKUP_PROG_MOUNT_REQ: +@@ -439,7 +439,7 @@ static int rpc_lookup_reply(int prog, uchar *pkt, unsigned len) + + memcpy(&rpc_pkt.u.data[0], pkt, len); + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (ntohl(rpc_pkt.u.reply.id) > rpc_id) + return -NFS_RPC_ERR; +@@ -467,7 +467,7 @@ static int nfs_mount_reply(uchar *pkt, unsigned len) + { + struct rpc_t rpc_pkt; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + memcpy(&rpc_pkt.u.data[0], pkt, len); + +@@ -493,7 +493,7 @@ static int nfs_umountall_reply(uchar *pkt, unsigned len) + { + struct rpc_t rpc_pkt; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + memcpy(&rpc_pkt.u.data[0], pkt, len); + +@@ -517,7 +517,7 @@ static int nfs_lookup_reply(uchar *pkt, unsigned len) + { + struct rpc_t rpc_pkt; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + memcpy(&rpc_pkt.u.data[0], pkt, len); + +@@ -538,19 +538,19 @@ static int nfs_lookup_reply(uchar *pkt, unsigned len) + switch (ntohl(rpc_pkt.u.reply.data[0])) { + /* Minimal supported NFS version */ + case 3: +- debug("*** Warning: NFS version not supported: Requested: V%d, accepted: min V%d - max V%d\n", ++printf("*** Warning: NFS version not supported: Requested: V%d, accepted: min V%d - max V%d\n", + (supported_nfs_versions & NFSV2_FLAG) ? + 2 : 3, + ntohl(rpc_pkt.u.reply.data[0]), + ntohl(rpc_pkt.u.reply.data[1])); +- debug("Will retry with NFSv3\n"); ++printf("Will retry with NFSv3\n"); + /* Clear NFSV2_FLAG from supported versions */ + supported_nfs_versions &= ~NFSV2_FLAG; + return -NFS_RPC_PROG_MISMATCH; + case 4: + default: + puts("*** ERROR: NFS version not supported"); +- debug(": Requested: V%d, accepted: min V%d - max V%d\n", ++printf(": Requested: V%d, accepted: min V%d - max V%d\n", + (supported_nfs_versions & NFSV2_FLAG) ? + 2 : 3, + ntohl(rpc_pkt.u.reply.data[0]), +@@ -563,7 +563,7 @@ static int nfs_lookup_reply(uchar *pkt, unsigned len) + case NFS_RPC_GARBAGE_ARGS: + case NFS_RPC_SYSTEM_ERR: + default: /* Unknown error on 'accept state' flag */ +- debug("*** ERROR: accept state error (%d)\n", ++printf("*** ERROR: accept state error (%d)\n", + ntohl(rpc_pkt.u.reply.astatus)); + break; + } +@@ -620,7 +620,7 @@ static int nfs_readlink_reply(uchar *pkt, unsigned len) + int rlen; + int nfsv3_data_offset = 0; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + memcpy((unsigned char *)&rpc_pkt, pkt, len); + +@@ -670,7 +670,7 @@ static int nfs_read_reply(uchar *pkt, unsigned len) + int rlen; + uchar *data_ptr; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + memcpy(&rpc_pkt.u.data[0], pkt, sizeof(rpc_pkt.u.reply)); + +@@ -745,7 +745,7 @@ static void nfs_handler(uchar *pkt, unsigned dest, struct in_addr sip, + int rlen; + int reply; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (len > sizeof(struct rpc_t)) + return; +@@ -788,7 +788,7 @@ static void nfs_handler(uchar *pkt, unsigned dest, struct in_addr sip, + if (reply == -NFS_RPC_DROP) { + break; + } else if (reply == -NFS_RPC_ERR) { +- debug("*** ERROR: Cannot umount\n"); ++printf("*** ERROR: Cannot umount\n"); + net_set_state(NETLOOP_FAIL); + } else { + puts("\ndone\n"); +@@ -829,7 +829,7 @@ static void nfs_handler(uchar *pkt, unsigned dest, struct in_addr sip, + nfs_state = STATE_UMOUNT_REQ; + nfs_send(); + } else { +- debug("Symlink --> %s\n", nfs_path); ++printf("Symlink --> %s\n", nfs_path); + nfs_filename = basename(nfs_path); + nfs_path = dirname(nfs_path); + +@@ -854,7 +854,7 @@ static void nfs_handler(uchar *pkt, unsigned dest, struct in_addr sip, + if (!rlen) + nfs_download_state = NETLOOP_SUCCESS; + if (rlen < 0) +- debug("NFS READ error (%d)\n", rlen); ++printf("NFS READ error (%d)\n", rlen); + nfs_state = STATE_UMOUNT_REQ; + nfs_send(); + } +@@ -865,7 +865,7 @@ static void nfs_handler(uchar *pkt, unsigned dest, struct in_addr sip, + + void nfs_start(void) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + nfs_download_state = NETLOOP_FAIL; + + nfs_server_ip = net_server_ip; +diff --git a/net/sntp.c b/net/sntp.c +index dac0f8cee..753b252ba 100644 +--- a/net/sntp.c ++++ b/net/sntp.c +@@ -29,7 +29,7 @@ static void sntp_send(void) + int pktlen = SNTP_PACKET_LEN; + int sport; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + memset(&pkt, 0, sizeof(pkt)); + +@@ -61,7 +61,7 @@ static void sntp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + struct rtc_time tm; + ulong seconds; + +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + if (dest != sntp_our_port) + return; +@@ -112,7 +112,7 @@ int sntp_prereq(void *data) + + int sntp_start(void *data) + { +- debug("%s\n", __func__); ++printf("%s\n", __func__); + + net_set_timeout_handler(SNTP_TIMEOUT, sntp_timeout_handler); + net_set_udp_handler(sntp_handler); +diff --git a/net/tftp.c b/net/tftp.c +index 00ab7ca0b..4d6009d41 100644 +--- a/net/tftp.c ++++ b/net/tftp.c +@@ -241,7 +241,7 @@ static int load_block(unsigned block, uchar *dst, unsigned len) + + tosend = min(net_boot_file_size - offset, tosend); + (void)memcpy(dst, (void *)(image_save_addr + offset), tosend); +- debug("%s: block=%u, offset=%lu, len=%u, tosend=%lu\n", __func__, ++printf("%s: block=%u, offset=%lu, len=%u, tosend=%lu\n", __func__, + block, offset, len, tosend); + return tosend; + } +@@ -372,7 +372,7 @@ static void tftp_send(void) + strcpy((char *)pkt, "timeout"); + pkt += 7 /*strlen("timeout")*/ + 1; + sprintf((char *)pkt, "%lu", timeout_ms / 1000); +- debug("send option \"timeout %s\"\n", (char *)pkt); ++printf("send option \"timeout %s\"\n", (char *)pkt); + pkt += strlen((char *)pkt) + 1; + #ifdef CONFIG_TFTP_TSIZE + pkt += sprintf((char *)pkt, "tsize%c%u%c", +@@ -526,7 +526,7 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + + #ifdef CONFIG_CMD_TFTPSRV + case TFTP_WRQ: +- debug("Got WRQ\n"); ++printf("Got WRQ\n"); + tftp_remote_ip = sip; + tftp_remote_port = src; + tftp_our_port = 1024 + (get_timer(0) % 3072); +@@ -536,14 +536,14 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + #endif + + case TFTP_OACK: +- debug("Got OACK: "); ++printf("Got OACK: "); + for (i = 0; i < len; i++) { + if (pkt[i] == '\0') +- debug(" "); ++printf(" "); + else +- debug("%c", pkt[i]); ++printf("%c", pkt[i]); + } +- debug("\n"); ++printf("\n"); + tftp_state = STATE_OACK; + tftp_remote_port = src; + /* +@@ -556,7 +556,7 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + tftp_block_size = (unsigned short) + simple_strtoul((char *)pkt + i + 8, + NULL, 10); +- debug("Blocksize oack: %s, %d\n", ++printf("Blocksize oack: %s, %d\n", + (char *)pkt + i + 8, tftp_block_size); + if (tftp_block_size > tftp_block_size_option) { + printf("Invalid blk size(=%d)\n", +@@ -568,7 +568,7 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + timeout_val_rcvd = (unsigned short) + simple_strtoul((char *)pkt + i + 8, + NULL, 10); +- debug("Timeout oack: %s, %d\n", ++printf("Timeout oack: %s, %d\n", + (char *)pkt + i + 8, timeout_val_rcvd); + if (timeout_val_rcvd != (timeout_ms / 1000)) { + printf("Invalid timeout val(=%d s)\n", +@@ -580,7 +580,7 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + if (strcasecmp((char *)pkt + i, "tsize") == 0) { + tftp_tsize = simple_strtoul((char *)pkt + i + 6, + NULL, 10); +- debug("size = %s, %d\n", ++printf("size = %s, %d\n", + (char *)pkt + i + 6, tftp_tsize); + } + #endif +@@ -588,7 +588,7 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + tftp_windowsize = + simple_strtoul((char *)pkt + i + 11, + NULL, 10); +- debug("windowsize = %s, %d\n", ++printf("windowsize = %s, %d\n", + (char *)pkt + i + 11, tftp_windowsize); + } + } +@@ -610,7 +610,7 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + len -= 2; + + if (ntohs(*(__be16 *)pkt) != (ushort)(tftp_cur_block + 1)) { +- debug("Received unexpected block: %d, expected: %d\n", ++printf("Received unexpected block: %d, expected: %d\n", + ntohs(*(__be16 *)pkt), + (ushort)(tftp_cur_block + 1)); + /* +@@ -632,7 +632,7 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, + tftp_cur_block %= TFTP_SEQUENCE_SIZE; + + if (tftp_state == STATE_SEND_RRQ) { +- debug("Server did not acknowledge any options!\n"); ++printf("Server did not acknowledge any options!\n"); + tftp_next_ack = tftp_windowsize; + } + +@@ -781,7 +781,7 @@ void tftp_start(enum proto_t protocol) + } + #endif + +- debug("TFTP blocksize = %i, TFTP windowsize = %d timeout = %ld ms\n", ++printf("TFTP blocksize = %i, TFTP windowsize = %d timeout = %ld ms\n", + tftp_block_size_option, tftp_window_size_option, timeout_ms); + + tftp_remote_ip = net_server_ip; +diff --git a/post/cpu/mpc83xx/ecc.c b/post/cpu/mpc83xx/ecc.c +index cc971a890..bc33a0115 100644 +--- a/post/cpu/mpc83xx/ecc.c ++++ b/post/cpu/mpc83xx/ecc.c +@@ -63,7 +63,7 @@ int ecc_post_test(int flags) + + /* Check if ECC is enabled */ + if (__raw_readl(&ddr->err_disable) & ECC_ERROR_ENABLE) { +- debug("DDR's ECC is not enabled, skipping the ECC POST.\n"); ++printf("DDR's ECC is not enabled, skipping the ECC POST.\n"); + return 0; + } + +diff --git a/test/dm/core.c b/test/dm/core.c +index 2210345dd..768784d36 100644 +--- a/test/dm/core.c ++++ b/test/dm/core.c +@@ -447,7 +447,7 @@ static int dm_test_operations(struct unit_test_state *uts) + * to test the code that sets that up (testfdt_drv_probe()). + */ + base = test_pdata[i].ping_add; +- debug("dev=%d, base=%d\n", i, base); ++printf("dev=%d, base=%d\n", i, base); + + ut_assert(!dm_check_operations(uts, dev, base, dev_get_priv(dev))); + } +diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c +index 8866d4d95..d11f0c5a4 100644 +--- a/test/dm/test-fdt.c ++++ b/test/dm/test-fdt.c +@@ -137,7 +137,7 @@ int dm_check_devices(struct unit_test_state *uts, int num_devices) + */ + base = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), + "ping-expect"); +- debug("dev=%d, base=%d: %s\n", i, base, ++printf("dev=%d, base=%d: %s\n", i, base, + fdt_get_name(gd->fdt_blob, dev_of_offset(dev), NULL)); + + ut_assert(!dm_check_operations(uts, dev, base, +diff --git a/test/lib/string.c b/test/lib/string.c +index 64234bef3..bb2ce06ad 100644 +--- a/test/lib/string.c ++++ b/test/lib/string.c +@@ -84,7 +84,7 @@ static int lib_memset(struct unit_test_state *uts) + ptr = memset(buf + offset, MASK, len); + ut_asserteq_ptr(buf + offset, (u8 *)ptr); + if (test_memset(uts, buf, MASK, offset, len)) { +- debug("%s: failure %d, %d\n", ++printf("%s: failure %d, %d\n", + __func__, offset, len); + return CMD_RET_FAILURE; + } +@@ -147,7 +147,7 @@ static int lib_memcpy(struct unit_test_state *uts) + ut_asserteq_ptr(buf2 + offset2, (u8 *)ptr); + if (test_memmove(uts, buf2, MASK, offset1, + offset2, len)) { +- debug("%s: failure %d, %d, %d\n", ++printf("%s: failure %d, %d, %d\n", + __func__, offset1, offset2, len); + return CMD_RET_FAILURE; + } +@@ -182,7 +182,7 @@ static int lib_memmove(struct unit_test_state *uts) + ut_asserteq_ptr(buf + offset2, (u8 *)ptr); + if (test_memmove(uts, buf, 0, offset1, offset2, + len)) { +- debug("%s: failure %d, %d, %d\n", ++printf("%s: failure %d, %d, %d\n", + __func__, offset1, offset2, len); + return CMD_RET_FAILURE; + } +diff --git a/test/log/log_test.c b/test/log/log_test.c +index 4a814ff41..51ea24a05 100644 +--- a/test/log/log_test.c ++++ b/test/log/log_test.c +@@ -27,7 +27,7 @@ static int do_log_run(struct unit_test_state *uts, int cat, const char *file) + expected_ret = -ENOSYS; + + gd->log_fmt = LOGF_TEST; +- debug("debug\n"); ++printf("debug\n"); + for (i = LOGL_FIRST; i < LOGL_COUNT; i++) { + log(cat, i, "log %d\n", i); + ret = _log(log_uc_cat(cat), i, file, 100 + i, +diff --git a/test/log/nolog_test.c b/test/log/nolog_test.c +index cb4fb3db9..a4904d9c4 100644 +--- a/test/log/nolog_test.c ++++ b/test/log/nolog_test.c +@@ -84,7 +84,7 @@ static int nolog_test_nodebug(struct unit_test_state *uts) + + memset(buf, 0, BUFFSIZE); + console_record_reset_enable(); +- debug("testing %s\n", "debug"); ++printf("testing %s\n", "debug"); + gd->flags &= ~GD_FLG_RECORD; + ut_assertok(ut_check_console_end(uts)); + return 0; +@@ -113,7 +113,7 @@ static int nolog_test_debug(struct unit_test_state *uts) + + memset(buf, 0, BUFFSIZE); + console_record_reset_enable(); +- debug("testing %s\n", "debug"); ++printf("testing %s\n", "debug"); + gd->flags &= ~GD_FLG_RECORD; + ut_assertok(ut_check_console_line(uts, "testing debug")); + ut_assertok(ut_check_console_end(uts)); +diff --git a/tools/asn1_compiler.c b/tools/asn1_compiler.c +index adabd4145..c0b3b8c95 100644 +--- a/tools/asn1_compiler.c ++++ b/tools/asn1_compiler.c +@@ -544,7 +544,7 @@ static void tokenise(char *buffer, char *end) + { + int n; + for (n = 0; n < nr_tokens; n++) +- debug("Token %3u: '%s'\n", n, token_list[n].content); ++printf("Token %3u: '%s'\n", n, token_list[n].content); + } + #endif + } +@@ -790,7 +790,7 @@ static void build_type_list(void) + #if 0 + for (n = 0; n < nr_types; n++) { + struct type *type = type_index[n]; +- debug("- %*.*s\n", type->name->content); ++printf("- %*.*s\n", type->name->content); + } + #endif + } +diff --git a/tools/atmelimage.c b/tools/atmelimage.c +index 7b3b243d5..c13fa833a 100644 +--- a/tools/atmelimage.c ++++ b/tools/atmelimage.c +@@ -57,7 +57,7 @@ static int atmel_find_pmecc_parameter_in_token(const char *token) + size_t pos; + char *param; + +- debug("token: '%s'\n", token); ++printf("token: '%s'\n", token); + + for (pos = 0; pos < ARRAY_SIZE(configs); pos++) { + if (strncmp(token, configs[pos], strlen(configs[pos])) == 0) { +@@ -66,7 +66,7 @@ static int atmel_find_pmecc_parameter_in_token(const char *token) + goto err; + + param++; +- debug("\t%s parameter: '%s'\n", configs[pos], param); ++printf("\t%s parameter: '%s'\n", configs[pos], param); + + switch (pos) { + case 0: +@@ -130,7 +130,7 @@ static int atmel_verify_header(unsigned char *ptr, int image_size, + + /* check the seven interrupt vectors of binary */ + for (pos = 0; pos < 7; pos++) { +- debug("atmelimage: interrupt vector #%zu is 0x%08X\n", pos+1, ++printf("atmelimage: interrupt vector #%zu is 0x%08X\n", pos+1, + ints[pos]); + /* + * all vectors except the 6'th one must contain valid +@@ -315,7 +315,7 @@ static int atmel_vrec_header(struct image_tool_params *params, + for (pos = 0; pos < ARRAY_SIZE(nand_pmecc_header); pos++) + nand_pmecc_header[pos] = tmp; + +- debug("PMECC header filled 52 times with 0x%08X\n", tmp); ++printf("PMECC header filled 52 times with 0x%08X\n", tmp); + + tparams->header_size = sizeof(nand_pmecc_header); + tparams->hdr = nand_pmecc_header; +diff --git a/tools/default_image.c b/tools/default_image.c +index e164c0c27..95f345c23 100644 +--- a/tools/default_image.c ++++ b/tools/default_image.c +@@ -57,7 +57,7 @@ static int image_verify_header(unsigned char *ptr, int image_size, + memcpy(hdr, ptr, sizeof(image_header_t)); + + if (be32_to_cpu(hdr->ih_magic) != IH_MAGIC) { +- debug("%s: Bad Magic Number: \"%s\" is no valid image\n", ++printf("%s: Bad Magic Number: \"%s\" is no valid image\n", + params->cmdname, params->imagefile); + return -FDT_ERR_BADMAGIC; + } +@@ -69,7 +69,7 @@ static int image_verify_header(unsigned char *ptr, int image_size, + hdr->ih_hcrc = cpu_to_be32(0); /* clear for re-calculation */ + + if (crc32(0, data, len) != checksum) { +- debug("%s: ERROR: \"%s\" has bad header checksum!\n", ++printf("%s: ERROR: \"%s\" has bad header checksum!\n", + params->cmdname, params->imagefile); + return -FDT_ERR_BADSTATE; + } +@@ -79,7 +79,7 @@ static int image_verify_header(unsigned char *ptr, int image_size, + + checksum = be32_to_cpu(hdr->ih_dcrc); + if (crc32(0, data, len) != checksum) { +- debug("%s: ERROR: \"%s\" has corrupted data!\n", ++printf("%s: ERROR: \"%s\" has corrupted data!\n", + params->cmdname, params->imagefile); + return -FDT_ERR_BADSTRUCTURE; + } +diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c +index db512465d..d6ad48710 100644 +--- a/tools/fdtgrep.c ++++ b/tools/fdtgrep.c +@@ -517,9 +517,9 @@ static int check_type_include(void *priv, int type, const char *data, int size) + int match, none_match = FDT_IS_ANY; + + /* If none of our conditions mention this type, we know nothing */ +- debug("type=%x, data=%s\n", type, data ? data : "(null)"); ++printf("type=%x, data=%s\n", type, data ? data : "(null)"); + if (!((disp->types_inc | disp->types_exc) & type)) { +- debug(" - not in any condition\n"); ++printf(" - not in any condition\n"); + return -1; + } + +@@ -534,10 +534,10 @@ static int check_type_include(void *priv, int type, const char *data, int size) + continue; + match = fdt_stringlist_contains(data, size, + val->string); +- debug(" - val->type=%x, str='%s', match=%d\n", ++printf(" - val->type=%x, str='%s', match=%d\n", + val->type, val->string, match); + if (match && val->include) { +- debug(" - match inc %s\n", val->string); ++printf(" - match inc %s\n", val->string); + return 1; + } + if (match) +@@ -550,13 +550,13 @@ static int check_type_include(void *priv, int type, const char *data, int size) + * should return 1. + */ + if ((type & disp->types_exc) && (none_match & type)) { +- debug(" - match exc\n"); ++printf(" - match exc\n"); + /* + * Allow FDT_IS_COMPAT to make the final decision in the + * case where there is no specific type + */ + if (type == FDT_IS_NODE && disp->types_exc == FDT_ANY_GLOBAL) { +- debug(" - supressed exc node\n"); ++printf(" - supressed exc node\n"); + return -1; + } + return 1; +@@ -569,7 +569,7 @@ static int check_type_include(void *priv, int type, const char *data, int size) + if (type == FDT_IS_NODE && disp->types_inc == FDT_ANY_GLOBAL) + return -1; + +- debug(" - no match, types_inc=%x, types_exc=%x, none_match=%x\n", ++printf(" - no match, types_inc=%x, types_exc=%x, none_match=%x\n", + disp->types_inc, disp->types_exc, none_match); + + return 0; +@@ -601,7 +601,7 @@ static int h_include(void *priv, const void *fdt, int offset, int type, + * compatible string + */ + if (inc == -1 && type == FDT_IS_NODE) { +- debug(" - checking compatible2\n"); ++printf(" - checking compatible2\n"); + data = fdt_getprop(fdt, offset, "compatible", &len); + inc = check_type_include(priv, FDT_IS_COMPAT, data, len); + } +@@ -609,7 +609,7 @@ static int h_include(void *priv, const void *fdt, int offset, int type, + /* If we still have no idea, check for properties in the node */ + if (inc != 1 && type == FDT_IS_NODE && + (disp->types_inc & FDT_NODE_HAS_PROP)) { +- debug(" - checking node '%s'\n", ++printf(" - checking node '%s'\n", + fdt_get_name(fdt, offset, NULL)); + for (offset = fdt_first_property_offset(fdt, offset); + offset > 0 && inc != 1; +@@ -636,7 +636,7 @@ static int h_include(void *priv, const void *fdt, int offset, int type, + inc = disp->invert; + break; + } +- debug(" - returning %d\n", inc); ++printf(" - returning %d\n", inc); + + return inc; + } +diff --git a/tools/fit_image.c b/tools/fit_image.c +index ae30f8078..8f096495f 100644 +--- a/tools/fit_image.c ++++ b/tools/fit_image.c +@@ -458,7 +458,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) + + images = fdt_path_offset(fdt, FIT_IMAGES_PATH); + if (images < 0) { +- debug("%s: Cannot find /images node: %d\n", __func__, images); ++printf("%s: Cannot find /images node: %d\n", __func__, images); + ret = -EINVAL; + goto err_munmap; + } +@@ -485,7 +485,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) + if (!data) + continue; + memcpy(buf + buf_ptr, data, len); +- debug("Extracting data size %x\n", len); ++printf("Extracting data size %x\n", len); + + ret = fdt_delprop(fdt, node, FIT_DATA_PROP); + if (ret) { +@@ -510,12 +510,12 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) + new_size = fdt_totalsize(fdt); + new_size = ALIGN(new_size, align_size); + fdt_set_totalsize(fdt, new_size); +- debug("Size reduced from %x to %x\n", fit_size, fdt_totalsize(fdt)); +- debug("External data size %x\n", buf_ptr); ++printf("Size reduced from %x to %x\n", fit_size, fdt_totalsize(fdt)); ++printf("External data size %x\n", buf_ptr); + munmap(fdt, sbuf.st_size); + + if (ftruncate(fd, new_size)) { +- debug("%s: Failed to truncate file: %s\n", __func__, ++printf("%s: Failed to truncate file: %s\n", __func__, + strerror(errno)); + ret = -EIO; + goto err; +@@ -524,7 +524,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) + /* Check if an offset for the external data was set. */ + if (params->external_offset > 0) { + if (params->external_offset < new_size) { +- debug("External offset %x overlaps FIT length %x", ++printf("External offset %x overlaps FIT length %x", + params->external_offset, new_size); + ret = -EINVAL; + goto err; +@@ -532,13 +532,13 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) + new_size = params->external_offset; + } + if (lseek(fd, new_size, SEEK_SET) < 0) { +- debug("%s: Failed to seek to end of file: %s\n", __func__, ++printf("%s: Failed to seek to end of file: %s\n", __func__, + strerror(errno)); + ret = -EIO; + goto err; + } + if (write(fd, buf, buf_ptr) != buf_ptr) { +- debug("%s: Failed to write external data to file %s\n", ++printf("%s: Failed to write external data to file %s\n", + __func__, strerror(errno)); + ret = -EIO; + goto err; +@@ -582,7 +582,7 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) + } + ret = fdt_open_into(old_fdt, fdt, size); + if (ret) { +- debug("%s: Failed to expand FIT: %s\n", __func__, ++printf("%s: Failed to expand FIT: %s\n", __func__, + fdt_strerror(errno)); + ret = -EINVAL; + goto err_munmap; +@@ -590,7 +590,7 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) + + images = fdt_path_offset(fdt, FIT_IMAGES_PATH); + if (images < 0) { +- debug("%s: Cannot find /images node: %d\n", __func__, images); ++printf("%s: Cannot find /images node: %d\n", __func__, images); + ret = -EINVAL; + goto err_munmap; + } +@@ -605,12 +605,12 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) + len = fdtdec_get_int(fdt, node, "data-size", -1); + if (buf_ptr == -1 || len == -1) + continue; +- debug("Importing data size %x\n", len); ++printf("Importing data size %x\n", len); + + ret = fdt_setprop(fdt, node, "data", + old_fdt + data_base + buf_ptr, len); + if (ret) { +- debug("%s: Failed to write property: %s\n", __func__, ++printf("%s: Failed to write property: %s\n", __func__, + fdt_strerror(ret)); + ret = -EINVAL; + goto err_munmap; +@@ -626,7 +626,7 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) + fdt_pack(fdt); + + new_size = fdt_totalsize(fdt); +- debug("Size expanded from %x to %x\n", fit_size, new_size); ++printf("Size expanded from %x to %x\n", fit_size, new_size); + + fd = open(fname, O_RDWR | O_CREAT | O_TRUNC | O_BINARY, 0666); + if (fd < 0) { +@@ -636,7 +636,7 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) + goto err; + } + if (write(fd, fdt, new_size) != new_size) { +- debug("%s: Failed to write external data to file %s\n", ++printf("%s: Failed to write external data to file %s\n", + __func__, strerror(errno)); + ret = -EIO; + goto err; +@@ -755,7 +755,7 @@ static int fit_handle_file(struct image_tool_params *params) + /* dtc -I dts -O dtb -p 500 -o tmpfile datafile */ + snprintf(cmd, sizeof(cmd), "%s %s -o \"%s\" \"%s\"", + MKIMAGE_DTC, params->dtc, tmpfile, params->datafile); +- debug("Trying to execute \"%s\"\n", cmd); ++printf("Trying to execute \"%s\"\n", cmd); + } else { + snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"", + params->imagefile, tmpfile); +diff --git a/tools/ifdtool.c b/tools/ifdtool.c +index 3a39b7bc7..fe78a6596 100644 +--- a/tools/ifdtool.c ++++ b/tools/ifdtool.c +@@ -60,7 +60,7 @@ static struct fdbar_t *find_fd(char *image, int size) + return NULL; + } + +- debug("Found Flash Descriptor signature at 0x%08lx\n", ++printf("Found Flash Descriptor signature at 0x%08lx\n", + (char *)ptr - image); + + return (struct fdbar_t *)ptr; +@@ -493,7 +493,7 @@ static int write_image(char *filename, char *image, int size) + { + int new_fd; + +- debug("Writing new image to %s\n", filename); ++printf("Writing new image to %s\n", filename); + + new_fd = open(filename, O_WRONLY | O_CREAT | O_TRUNC, S_IRUSR | + S_IWUSR | S_IRGRP | S_IROTH); +@@ -607,7 +607,7 @@ int open_for_read(const char *fname, int *sizep) + if (fstat(fd, &buf) == -1) + return perror_fname("Could not stat file '%s'", fname); + *sizep = buf.st_size; +- debug("File %s is %d bytes\n", fname, *sizep); ++printf("File %s is %d bytes\n", fname, *sizep); + + return fd; + } +@@ -681,7 +681,7 @@ int inject_region(char *image, int size, int region_type, char *region_fname) + + close(region_fd); + +- debug("Adding %s as the %s section\n", region_fname, ++printf("Adding %s as the %s section\n", region_fname, + region_name(region_type)); + + return 0; +@@ -735,7 +735,7 @@ static int write_data(char *image, int size, unsigned int addr, + return -EXDEV; + } + } +- debug("Writing %s to offset %#x\n", write_fname, offset); ++printf("Writing %s to offset %#x\n", write_fname, offset); + + if (offset < 0 || offset + write_size > size) { + fprintf(stderr, "Output file is too small. (%d < %d)\n", +@@ -895,7 +895,7 @@ int main(int argc, char *argv[]) + break; + case 'r': + rom_size = strtol(optarg, NULL, 0); +- debug("ROM size %d\n", rom_size); ++printf("ROM size %d\n", rom_size); + break; + case 's': + /* Parse the requested SPI frequency */ +@@ -1022,7 +1022,7 @@ int main(int argc, char *argv[]) + size = buf.st_size; + } + +- debug("File %s is %d bytes\n", filename, size); ++printf("File %s is %d bytes\n", filename, size); + + if (rom_size == -1) + rom_size = size; +@@ -1039,7 +1039,7 @@ int main(int argc, char *argv[]) + exit(EXIT_FAILURE); + } + if (size != rom_size) { +- debug("ROM size changed to %d bytes\n", rom_size); ++printf("ROM size changed to %d bytes\n", rom_size); + size = rom_size; + } + +diff --git a/tools/image-host.c b/tools/image-host.c +index 270d36fe4..f5b601eca 100644 +--- a/tools/image-host.c ++++ b/tools/image-host.c +@@ -866,7 +866,7 @@ static int fit_config_get_data(void *fit, int conf_noffset, int noffset, + + conf_name = fit_get_name(fit, conf_noffset, NULL); + sig_name = fit_get_name(fit, noffset, NULL); +- debug("%s: conf='%s', sig='%s'\n", __func__, conf_name, sig_name); ++printf("%s: conf='%s', sig='%s'\n", __func__, conf_name, sig_name); + + /* Get a list of nodes we want to hash */ + ret = fit_config_get_hash_list(fit, conf_noffset, noffset, &node_inc); +@@ -898,9 +898,9 @@ static int fit_config_get_data(void *fit, int conf_noffset, int noffset, + } + + /* Create a list of all hashed properties */ +- debug("Hash nodes:\n"); ++printf("Hash nodes:\n"); + for (i = len = 0; i < node_inc.count; i++) { +- debug(" %s\n", node_inc.strings[i]); ++printf(" %s\n", node_inc.strings[i]); + len += strlen(node_inc.strings[i]) + 1; + } + region_prop = malloc(len); +diff --git a/tools/proftool.c b/tools/proftool.c +index ea7d07a27..15f93a4d2 100644 +--- a/tools/proftool.c ++++ b/tools/proftool.c +@@ -312,10 +312,10 @@ static void check_trace_config_line(struct trace_configline_info *item) + struct func_info *func, *end; + int err; + +- debug("Checking trace config line '%s'\n", item->name); ++printf("Checking trace config line '%s'\n", item->name); + for (func = func_list, end = func + func_count; func < end; func++) { + err = regexec(&item->regex, func->name, 0, NULL, 0); +- debug(" - regex '%s', string '%s': %d\n", item->name, ++printf(" - regex '%s', string '%s': %d\n", item->name, + func->name, err); + if (err == REG_NOMATCH) + continue; +@@ -514,7 +514,7 @@ static int make_ftrace(void) + } + + if (!(func->flags & FUNCF_TRACE)) { +- debug("Funcion '%s' is excluded from trace\n", ++printf("Funcion '%s' is excluded from trace\n", + func->name); + skip_count++; + continue; +@@ -593,7 +593,7 @@ int main(int argc, char *argv[]) + if (argc < 1) + usage(); + +- debug("Debug enabled\n"); ++printf("Debug enabled\n"); + return prof_tool(argc, argv, prof_fname, map_fname, + trace_config_fname); + } +diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c +index 6a524014b..da3c08387 100644 +--- a/tools/relocate-rela.c ++++ b/tools/relocate-rela.c +@@ -123,7 +123,7 @@ int main(int argc, char **argv) + if (!supported_rela(&swrela)) + continue; + +- debug("Rela %" PRIx64 " %" PRIu64 " %" PRIx64 "\n", ++printf("Rela %" PRIx64 " %" PRIu64 " %" PRIx64 "\n", + swrela.r_offset, swrela.r_info, swrela.r_addend); + + if (swrela.r_offset < text_base) { +diff --git a/tools/rkspi.c b/tools/rkspi.c +index f2530f7bd..363bb0bf4 100644 +--- a/tools/rkspi.c ++++ b/tools/rkspi.c +@@ -36,7 +36,7 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd, + size, params->file_size); + + for (sector = size / RKSPI_SECT_LEN - 1; sector >= 0; sector--) { +- debug("sector %u\n", sector); ++printf("sector %u\n", sector); + memmove(buf + sector * RKSPI_SECT_LEN * 2, + buf + sector * RKSPI_SECT_LEN, + RKSPI_SECT_LEN); +diff --git a/tools/socfpgaimage.c b/tools/socfpgaimage.c +index eba812fec..1778d33a1 100644 +--- a/tools/socfpgaimage.c ++++ b/tools/socfpgaimage.c +@@ -245,12 +245,12 @@ static int sfp_verify_buffer(const uint8_t *buf) + + len = sfp_verify_header(buf + HEADER_OFFSET, &ver); + if (len < 0) { +- debug("Invalid header\n"); ++printf("Invalid header\n"); + return -1; + } + + if (len < HEADER_OFFSET || len > sfp_max_size(ver)) { +- debug("Invalid header length (%i)\n", len); ++printf("Invalid header length (%i)\n", len); + return -1; + } + +diff --git a/tools/update_octeon_header.c b/tools/update_octeon_header.c +index 8054ceec8..ecc072c27 100644 +--- a/tools/update_octeon_header.c ++++ b/tools/update_octeon_header.c +@@ -177,7 +177,7 @@ int main(int argc, char *argv[]) + return -1; + } + +- debug("header size is: %d bytes\n", hdr_size); ++printf("header size is: %d bytes\n", hdr_size); + + /* Parse command line options using getopt_long */ + while (1) { +@@ -193,13 +193,13 @@ int main(int argc, char *argv[]) + /* If this option set a flag, do nothing else now. */ + if (long_options[option_index].flag != 0) + break; +- debug("option(l) %s", long_options[option_index].name); ++printf("option(l) %s", long_options[option_index].name); + + if (!optarg) { + usage(); + return -1; + } +- debug(" with arg %s\n", optarg); ++printf(" with arg %s\n", optarg); + + if (!strcmp(long_options[option_index].name, "board")) { + if (strlen(optarg) >= NAME_LEN) { +diff --git a/tools/zynqmpbif.c b/tools/zynqmpbif.c +index 82ce0ac1a..d43902f48 100644 +--- a/tools/zynqmpbif.c ++++ b/tools/zynqmpbif.c +@@ -476,7 +476,7 @@ static int bif_add_bit(struct bif_entry *bf) + /* Design name */ + len = be16_to_cpu(*(uint16_t *)bit); + bit += sizeof(uint16_t); +- debug("Design: %s\n", bit); ++printf("Design: %s\n", bit); + bit += len; + + /* Device identifier */ +@@ -485,7 +485,7 @@ static int bif_add_bit(struct bif_entry *bf) + bit++; + len = be16_to_cpu(*(uint16_t *)bit); + bit += sizeof(uint16_t); +- debug("Device: %s\n", bit); ++printf("Device: %s\n", bit); + bit += len; + + /* Date */ +@@ -494,7 +494,7 @@ static int bif_add_bit(struct bif_entry *bf) + bit++; + len = be16_to_cpu(*(uint16_t *)bit); + bit += sizeof(uint16_t); +- debug("Date: %s\n", bit); ++printf("Date: %s\n", bit); + bit += len; + + /* Time */ +@@ -503,7 +503,7 @@ static int bif_add_bit(struct bif_entry *bf) + bit++; + len = be16_to_cpu(*(uint16_t *)bit); + bit += sizeof(uint16_t); +- debug("Time: %s\n", bit); ++printf("Time: %s\n", bit); + bit += len; + + /* Bitstream length */ +@@ -514,7 +514,7 @@ static int bif_add_bit(struct bif_entry *bf) + bit += sizeof(uint32_t); + bitbin = bit; + +- debug("Bitstream Length: 0x%x\n", bitlen); ++printf("Bitstream Length: 0x%x\n", bitlen); + for (i = 0; i < bitlen; i += sizeof(uint32_t)) { + uint32_t *bitbin32 = (uint32_t *)&bitbin[i]; + *bitbin32 = __builtin_bswap32(*bitbin32); +@@ -909,7 +909,7 @@ int zynqmpbif_copy_image(int outfd, struct image_tool_params *mparams) + } + + for (i = 0; i < nr_entries; i++) { +- debug("Entry flags=%#lx name=%s\n", entries[i].flags, ++printf("Entry flags=%#lx name=%s\n", entries[i].flags, + entries[i].filename); + } + +@@ -953,7 +953,7 @@ int zynqmpbif_copy_image(int outfd, struct image_tool_params *mparams) + if (!type) + goto err; + +- debug("type=%s file=%s\n", type->name, entry->filename); ++printf("type=%s file=%s\n", type->name, entry->filename); + r = type->add(entry); + if (r) + goto err; diff --git a/recipes-bsp/u-boot/files/boot.cmd b/recipes-bsp/u-boot/files/boot.cmd new file mode 100644 index 0000000..7f6705a --- /dev/null +++ b/recipes-bsp/u-boot/files/boot.cmd @@ -0,0 +1,83 @@ +# default values +setenv load_addr "0x45000000" +setenv overlay_error "false" +setenv rootdev "/dev/mmcblk1p2" +setenv verbosity "1" +setenv rootfstype "ext4" +setenv console "both" +setenv bootlogo "false" +setenv overlay_prefix "sun50i-h616" +setenv disp_mode "1920x1080p60" +setenv recovery "false" +setenv recovery_image "recovery.initramfs" + +# Print boot source +itest.b *0x10028 == 0x00 && echo "U-boot loaded from SD" +itest.b *0x10028 == 0x02 && echo "U-boot loaded from eMMC or secondary SD" +itest.b *0x10028 == 0x03 && echo "U-boot loaded from SPI" + +echo "Boot script loaded from ${devtype}" + +if test -e ${devtype} ${devnum} config.txt; then + load ${devtype} ${devnum} ${load_addr} config.txt + env import -t ${load_addr} ${filesize} +fi + +if test "${console}" = "display" || test "${console}" = "both"; then setenv consoleargs "console=ttyS0,115200 console=tty1"; fi +if test "${console}" = "serial"; then setenv consoleargs "console=ttyS0,115200"; fi +if test "${bootlogo}" = "true"; then + setenv consoleargs "splash plymouth.ignore-serial-consoles ${consoleargs}" +else + setenv consoleargs "splash=verbose ${consoleargs}" +fi + +# get PARTUUID of first partition on SD/eMMC it was loaded from +# mmc 0 is always mapped to device u-boot (2016.09+) was loaded from +if test "${devtype}" = "mmc"; then part uuid mmc 0:1 partuuid; fi + +# consoleblank=0 loglevel=${verbosity} + +setenv bootargs "root=${rootdev} rootwait rootfstype=${rootfstype} ${consoleargs} ubootpart=${partuuid} usb-storage.quirks=${usbstoragequirks} ${extraargs} ${extraboardargs}" + +# if test "${docker_optimizations}" = "on"; then setenv bootargs "${bootargs} cgroup_enable=memory swapaccount=1"; fi + +load ${devtype} ${devnum} ${fdt_addr_r} ${fdtfile} +fdt addr ${fdt_addr_r} +fdt resize 65536 +for overlay_file in ${overlays}; do + if load ${devtype} ${devnum} ${load_addr} allwinner/overlay/${overlay_prefix}-${overlay_file}.dtbo; then + echo "Applying kernel provided DT overlay ${overlay_prefix}-${overlay_file}.dtbo" + fdt apply ${load_addr} || setenv overlay_error "true" + fi +done + +if test "${overlay_error}" = "true"; then + echo "Error applying DT overlays, restoring original DT" + load ${devtype} ${devnum} ${fdt_addr_r} ${fdtfile} +else + if load ${devtype} ${devnum} ${load_addr} allwinner/overlay/${overlay_prefix}-fixup.scr; then + echo "Applying kernel provided DT fixup script (${overlay_prefix}-fixup.scr)" + source ${load_addr} + fi +fi + +if test "${ethernet_phy}" = "rtl8211f"; then + fdt set /soc/ethernet@5020000 allwinner,rx-delay-ps <3100> + fdt set /soc/ethernet@5020000 allwinner,tx-delay-ps <700> +fi + +if test "${ethernet_phy}" = "yt8531c"; then + fdt set /soc/ethernet@5020000 allwinner,rx-delay-ps <0> + fdt set /soc/ethernet@5020000 allwinner,tx-delay-ps <600> +fi + +load ${devtype} ${devnum} ${kernel_addr_r} Image +if test "${recovery}" = "true"; then + load ${devtype} ${devnum} ${ramdisk_addr_r} ${recovery_image} + booti ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r} +else + booti ${kernel_addr_r} - ${fdt_addr_r} +fi + +# Recompile with: +# mkimage -C none -A arm -T script -d /boot/boot.cmd /boot/boot.scr diff --git a/recipes-bsp/u-boot/files/boot.scr b/recipes-bsp/u-boot/files/boot.scr new file mode 100644 index 0000000000000000000000000000000000000000..a74f1caebaa957cb71a93130643d2bf348250f88 GIT binary patch literal 3186 zcmb_e&2HO95H<>=fQY<6Zv$FLlhl+*IZ~atD(c2P_z=K|?Oufyxs(_4)IU%hP9H zeQh5P{D1yhA09(QV^Smv<|HYobR<l@{+XW-{Q6wbP`g2R zdvR6r5lhJgjjdjXWlRZ@#?p11W4IP9Q=kEYS!xWXOGltjtU4HKjhC}d|z7H>6 z01c-Y#GPmKb<$}BvEV7(T)K}L_6{1-43WYDzPwr9*yLx4o`=uxaSD zbbGQi=K|lO(6*u0UdJq0{4 zQ8^%DBEhX5hDxn&{F5N)_pqD|Vc?zv0i4B#-HGKSdO=DfL(iCk7Jln1=klJ zZ}0A|E`i6GB!T^s6QP)5JOli@x$K%AW(pQWHk%FYkxsw|CV?aivXYRJJjYg49C>Wc zLJCDWN-ukUFzEPizk7AhNuwxr>*}UJ*R~=W4-^H9%J;ns3_>k1WknoSY~zGvv!Rb5 zCkdU?WY}KU^tN#Li^J2P)+~Sm^M(z zu_qN5$V;8y3MOU}k5O33N|E-3)GCOEQa_A25y%oKG3?b$4i9HkjCihC%03ZY9#qnq z;+aiU)nD5H+iUw9hjt=(k&kFb#t9v!H04M}azSzuhP=qsu$mI*5DCPQGJ9wwG-Q0z z6OPjzDKP8F$gGAD3qt@f==V@UT_x2G* z>c`rvQ9fOji54n3>jgo)&*8efSV-tf9(JwSPkkR(4lbR#BTvNAizse2FPHGcDc&@G ztm*oxE>zRS_u9k1qF$-9{%K&D^NZiO1Ny%r9$3VOnynl;%NTH_FLTXBZLf6?bpIi@ zcmc#)#jN&=B)@ZC+&C@Gj0_uN4*_c4vu#X7xp*Hl_RwEbx!kfJ@zrUr>2AT)^qtb#NK!Q0WQci(f|Me literal 0 HcmV?d00001 diff --git a/recipes-bsp/u-boot/u-boot-xunlong.bb b/recipes-bsp/u-boot/u-boot-xunlong.bb new file mode 100644 index 0000000..b38315e --- /dev/null +++ b/recipes-bsp/u-boot/u-boot-xunlong.bb @@ -0,0 +1,62 @@ +DESCRIPTION = "U-Boot port for orange pi zero 2w" + +require recipes-bsp/u-boot/u-boot.inc + +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://Licenses/gpl-2.0.txt;md5=b234ee4d69f5fce4486a80fdaf4a4263" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +DEPENDS:append = " bc-native dtc-native swig-native python3-native flex-native bison-native python3-setuptools-native " +DEPENDS:append = " atf-50i-h616 " + +# No patches for other machines yet +# PROVIDES = "virtual/bootloader" +# COMPATIBLE_MACHINE = "orange-pi-zero2w" + +# DEFAULT_PREFERENCE_orange-pi-zero2w="1" + +COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i|sun8i|sun50i)" +DEFAULT_PREFERENCE:sun4i = "1" +DEFAULT_PREFERENCE:sun5i = "1" +DEFAULT_PREFERENCE:sun7i = "1" +DEFAULT_PREFERENCE:sun8i = "1" +DEFAULT_PREFERENCE:sun50i = "1" + + +SRC_URI = " \ + git://github.com/orangepi-xunlong/u-boot-orangepi.git;protocol=https;branch=v2021.07-sunxi \ + file://boot.cmd \ + " + +PE = "1" + +PV = "v2021.07+git${SRCPV}" + +SRCREV = "6fe17fac388aad17490cf386578b7532975e567f" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +SPL_BINARY="u-boot-sunxi-with-spl.bin" +UBOOT_ENV_SUFFIX = "scr" +UBOOT_ENV = "boot" + +EXTRA_OEMAKE:append = ' HOSTLDSHARED="${BUILD_CC} -shared ${BUILD_LDFLAGS} ${BUILD_CFLAGS}" ' +EXTRA_OEMAKE:append = " BL31=${DEPLOY_DIR_IMAGE}/bl31.bin SCP=/dev/null" + + +do_compile[depends] += "atf-50i-h616:do_install" + +do_configure() { + oe_runmake ${UBOOT_MACHINE} +# oe_runmake -C ${S} O=${B} ${UBOOT_MACHINE} mrproper +} + +do_compile() { + oe_runmake + oe_runmake u-boot-initial-env + ${B}/tools/mkimage -C none -A arm -T script -d ${WORKDIR}/boot.cmd ${WORKDIR}/${UBOOT_ENV_BINARY} +} + diff --git a/recipes-core/base-files/base-files_%.bbappend b/recipes-core/base-files/base-files_%.bbappend new file mode 100644 index 0000000..78cc593 --- /dev/null +++ b/recipes-core/base-files/base-files_%.bbappend @@ -0,0 +1,28 @@ +hostname = "diya" + +do_install:append () { + cat << 'EOF' >> "${D}${sysconfdir}/profile" +export GDK_BACKEND=wayland +export XDG_RUNTIME_DIR=/home/$USER/.xdg +export XDG_CONFIG_HOME=/home/$USER/.config +export PATH=$PATH:/home/$USER/bin:/home/$USER/.local/bin +export LD_LIBRARY_PATH=/home/$USER/lib:/home/$USER/.local/lib +if [ ! -e "$XDG_RUNTIME_DIR" ]; then + mkdir -p "$XDG_RUNTIME_DIR" +fi +export TERM=xterm-256color +EOF + +cat << EOF >> "${D}${sysconfdir}/profile" +export MACHINE=${MACHINE} +EOF + +cat << EOF >> "${D}${sysconfdir}/modules" +uwe5622_bsp_sdio +sprdwl_ng +sprdbt_tty +bluetooth +hci_uart +rfcomm +EOF +} diff --git a/recipes-core/dropbear/dropbear_%.bbappend b/recipes-core/dropbear/dropbear_%.bbappend new file mode 100644 index 0000000..ef85ee1 --- /dev/null +++ b/recipes-core/dropbear/dropbear_%.bbappend @@ -0,0 +1,7 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" +SRC_URI += "file://default" + +do_install:append () { + rm -rf ${D}/etc/dropbear + install -m 0644 ${WORKDIR}/default ${D}${sysconfdir}/default/dropbear +} \ No newline at end of file diff --git a/recipes-core/dropbear/files/default b/recipes-core/dropbear/files/default new file mode 100644 index 0000000..36af6d9 --- /dev/null +++ b/recipes-core/dropbear/files/default @@ -0,0 +1,2 @@ +DROPBEAR_EXTRA_ARGS="-w" +DROPBEAR_RSAKEY_DIR=/etc/dropbear \ No newline at end of file diff --git a/recipes-core/images/README.md b/recipes-core/images/README.md new file mode 100644 index 0000000..8623ba8 --- /dev/null +++ b/recipes-core/images/README.md @@ -0,0 +1,40 @@ +#webrtc-audio-processing \ +pulseaudio \ +pulseaudio-server \ +alsa-utils \ +pulseaudio-module-alsa-card \ +pulseaudio-module-alsa-source \ +pulseaudio-module-alsa-sink \ +pulseaudio-module-cli \ +pulseaudio-module-echo-cancel \ +pulseaudio-misc \ +i2c-tools \ +mpg123 +libsdl2-mixer \ +#tslib +#tslib-tests +#tslib-calibrate +#tslib-uinput + +libsdl2 \ + libsdl2-ttf \ + libsdl2-image \ + libsdl2-mixer \ + libsdl2-net \ +# v4l-utils +evtest + +# openvt -v -c 5 -- /usr/bin/weston --tty=/dev/tty5 + +mesa \ + mesa-demos \ + libgbm \ + + +dtdebug=1 +dtoverlay=vc4-kms-v3d +dtoverlay=vc4-kms-dpi-generic,hactive=480,hfp=26,hsync=16,hbp=10 +dtparam=vactive=640,vfp=25,vsync=10,vbp=16 +dtparam=clock-frequency=32000000,rgb666-padhi + +Diyas symbolise goodness and purity, and lighting them denotes dispelling darkness and going into light. \ No newline at end of file diff --git a/recipes-core/images/core-image-base.bbappend b/recipes-core/images/core-image-base.bbappend new file mode 120000 index 0000000..65e0d4a --- /dev/null +++ b/recipes-core/images/core-image-base.bbappend @@ -0,0 +1 @@ +core-image-minimal.bbappend \ No newline at end of file diff --git a/recipes-core/images/core-image-minimal.bbappend b/recipes-core/images/core-image-minimal.bbappend new file mode 100644 index 0000000..ba3f09c --- /dev/null +++ b/recipes-core/images/core-image-minimal.bbappend @@ -0,0 +1,63 @@ +inherit extrausers + +# usermod -p BJpK8ADNDLsGg root; +EXTRA_USERS_PARAMS = "usermod -p 2Pe/4xyFxsokE diya; \ + usermod -a -G video diya; \ + usermod -a -G tty diya; \ + usermod -a -G input diya; \ + usermod -a -G dialout diya; \ + usermod -a -G audio diya; \ + usermod -a -G avahi diya; \ + usermod -a -G sudo diya \ + " +IMAGE_BOOT_FILES:append = "fs_resize config.txt recovery-${MACHINE}.cpio.gz Image boot.scr ${KERNEL_DEVICETREE} allwinner/overlay/sun50i-h616-fixup.scr " + +IMAGE_INSTALL:append = "kernel-modules \ + libcurl \ + libdrm \ + libgbm \ + libgles2 \ + libegl-mesa \ + libglapi \ + libudev \ + libinput \ + pango \ + libxkbcommon \ + xkeyboard-config \ + diya-overlay \ + seatd \ + pixman \ + cairo \ + glib-2.0 \ + udev \ + glew \ + freetype \ + fontconfig \ + librsvg librsvg-gtk \ + gdk-pixbuf \ + gtk-layer-shell \ + gobject-introspection \ + l3afpad \ + mesa \ + sudo \ + htop \ + i2c-tools \ + bash \ + nano \ + wpa-supplicant \ + evtest \ + rsync \ + coreutils \ + wayland wayland-protocols \ + foot swaybg swayidle swaylock wlopm sfwbar tofi wtype \ + mc \ + gdbserver \ + " + +IMAGE_PREPROCESS_COMMAND += "image_patch;" + +image_patch () { + # delete unused kernel image + rm -rf ${IMAGE_ROOTFS}/boot/* +} +# labwc wlr-randr \ No newline at end of file diff --git a/recipes-core/images/core-image-recovery.bb b/recipes-core/images/core-image-recovery.bb new file mode 100644 index 0000000..dd8844a --- /dev/null +++ b/recipes-core/images/core-image-recovery.bb @@ -0,0 +1,53 @@ + +DESCRIPTION = "Recovery initramfs image." + + +PACKAGE_INSTALL = "recovery-boot \ + dosfstools \ + e2fsprogs \ + util-linux-fsck \ + kernel-modules \ + busybox \ + sysvinit \ + sysvinit-inittab \ + ${VIRTUAL-RUNTIME_base-utils} \ + udev \ + initscripts \ + base-passwd \ + ${ROOTFS_BOOTSTRAP_INSTALL}" + +# Do not pollute the initrd image with rootfs features +IMAGE_FEATURES = "" + +export IMAGE_BASENAME = "${MLPREFIX}recovery" +IMAGE_NAME_SUFFIX ?= "" +IMAGE_LINGUAS = "" + +LICENSE = "MIT" + +IMAGE_FSTYPES = "${INITRAMFS_FSTYPES}" +inherit core-image extrausers + +IMAGE_ROOTFS_SIZE = "8192" +IMAGE_ROOTFS_EXTRA_SPACE = "0" + +EXTRA_USERS_PARAMS = "usermod -p 2Pe/4xyFxsokE root " + +# Use the same restriction as initramfs-module-install +COMPATIBLE_HOST = '(x86_64.*|i.86.*|arm.*|aarch64.*)-(linux.*|freebsd.*)' + +IMAGE_PREPROCESS_COMMAND += "image_patch;" + +image_patch () { + # delete unused image + rm -rf ${IMAGE_ROOTFS}/boot/* + # create /etc/fstab + cat << EOF > ${IMAGE_ROOTFS}/etc/fstab +/dev/mmcblk1p1 /boot auto defaults 0 0 +/dev/mmcblk1p4 /home auto defaults 0 0 + +EOF + cat << EOF > ${IMAGE_ROOTFS}/etc/hostname +diya-recovery +EOF +} \ No newline at end of file diff --git a/recipes-core/init-ifupdown/files/itf_diya b/recipes-core/init-ifupdown/files/itf_diya new file mode 100644 index 0000000..75f8100 --- /dev/null +++ b/recipes-core/init-ifupdown/files/itf_diya @@ -0,0 +1,24 @@ +# /etc/network/interfaces -- configuration file for ifup(8), ifdown(8) + +# The loopback interface +auto lo +iface lo inet loopback + +# Wireless interfaces +auto wlan0 +iface wlan0 inet dhcp +# wireless_mode managed +# wireless_essid any +# wpa-driver wext +wpa-conf /etc/network/wpa_supplicant.conf + +# Ethernet/RNDIS gadget (g_ether) +# ... or on host side, usbnet and random hwaddr +iface usb0 inet static + address 192.168.7.2 + netmask 255.255.255.0 + network 192.168.7.0 + gateway 192.168.7.1 + +# Bluetooth networking +# iface bnep0 inet dhcp diff --git a/recipes-core/init-ifupdown/init-ifupdown_%.bbappend b/recipes-core/init-ifupdown/init-ifupdown_%.bbappend new file mode 100644 index 0000000..9617860 --- /dev/null +++ b/recipes-core/init-ifupdown/init-ifupdown_%.bbappend @@ -0,0 +1,7 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" +SRC_URI += " file://itf_diya " + +do_install:append () { + rm ${D}/etc/network/interfaces + install -m 0644 ${WORKDIR}/itf_diya ${D}/etc/network/interfaces +} \ No newline at end of file diff --git a/recipes-diya/diya-overlay/diya-overlay.bb b/recipes-diya/diya-overlay/diya-overlay.bb new file mode 100644 index 0000000..2d431a8 --- /dev/null +++ b/recipes-diya/diya-overlay/diya-overlay.bb @@ -0,0 +1,44 @@ +DESCRIPTION = "Auto configuration deployment from media" +DEPENDS = "" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +SRC_URI += "file://confd \ + file://expandfs.sh \ + file://80_diya \ + file://fs_resize \ + file://boot-to-recovery" + + +inherit update-rc.d useradd + +USERADD_PACKAGES = "${PN}" +GROUPADD_PACKAGES = "${PN}" + +USERADD_PARAM:${PN} = "-u 1000 -d /home/diya -r -s /bin/sh diya" + +INITSCRIPT_NAME = "confd" +INITSCRIPT_PARAMS = "start 30 S ." + +do_install() { + install -d ${D}/${sysconfdir}/init.d/ + install -d ${DEPLOY_DIR_IMAGE} + install -m 0755 ${WORKDIR}/confd ${D}/${sysconfdir}/init.d/confd + install -d ${D}/sbin/ + install -d ${D}/etc/default/volatiles + # install -m 0644 ${WORKDIR}/80_diya ${D}${sysconfdir}/default/volatiles + install -m 0755 ${WORKDIR}/expandfs.sh ${D}/sbin/expandfs.sh + install -m 0755 ${WORKDIR}/boot-to-recovery ${D}/sbin/boot-to-recovery + install -m 0755 ${WORKDIR}/fs_resize ${DEPLOY_DIR_IMAGE}/ + + cat << EOF >> ${DEPLOY_DIR_IMAGE}/config.txt +recovery=false +recovery_image=recovery-${MACHINE}.cpio.gz +console=both +bootlogo=false +EOF + + install -d ${D}/var/etc + install -d ${D}/var/etc/upper + install -d ${D}/var/etc/work +} diff --git a/recipes-diya/diya-overlay/files/80_diya b/recipes-diya/diya-overlay/files/80_diya new file mode 100644 index 0000000..19504cd --- /dev/null +++ b/recipes-diya/diya-overlay/files/80_diya @@ -0,0 +1,3 @@ +# d root root 0755 /var/etc/upper none +# d root root 0755 /var/etc/work none +# l root root 0644 /etc/dropbear /var/etc/dropbear diff --git a/recipes-diya/diya-overlay/files/boot-to-recovery b/recipes-diya/diya-overlay/files/boot-to-recovery new file mode 100755 index 0000000..2f6f9b1 --- /dev/null +++ b/recipes-diya/diya-overlay/files/boot-to-recovery @@ -0,0 +1,21 @@ +#! /bin/sh + +if [[ $(/usr/bin/id -u) -ne 0 ]]; then + echo "$0 shall be run as root" + exit 1 +fi + +. /etc/profile + +if [ ! -e /boot/config.txt ]; then + # prepare env for recovery boot + cat << EOF > /boot/config.txt +recovery=true +recovery_image=recovery-${MACHINE}.cpio.gz +EOF +else + sed -i 's/^.*recovery.*/recovery=true/g' /boot/config.txt || \ + echo "recovery=true" >> /boot/config.txt +fi +echo "Rebooting to recovery mode" +reboot \ No newline at end of file diff --git a/recipes-diya/diya-overlay/files/confd b/recipes-diya/diya-overlay/files/confd new file mode 100644 index 0000000..b969dd6 --- /dev/null +++ b/recipes-diya/diya-overlay/files/confd @@ -0,0 +1,44 @@ +#!/bin/sh + +PATH=/sbin:/bin:/usr/sbin:/usr/bin +DESC="Auto deployment configuration from media" + +case "$1" in + start) + echo -n "Start $DESC: " + # mount the overlay which is not auto mount by fstab + # this make /etc editable + mount -t overlay -o lowerdir=/etc,upperdir=/var/etc/upper,workdir=/var/etc/work overlay /etc + # for some reason the LCD backlight is turned off + # need to turn it on manually + if [ -f "/boot/fs_resize" ]; then + /sbin/expandfs.sh + touch /boot/home_partition_should_be_formated + rm /boot/fs_resize + reboot + fi + if [ -f "/boot/home_partition_should_be_formated" ]; then + echo "Trying to format the home partition" + umount /dev/mmcblk1p4 + yes | mkfs.ext4 /dev/mmcblk1p4 + mount /dev/mmcblk1p4 /home + mkdir -p /home/diya + chown -R diya:diya /home/diya + rm /boot/home_partition_should_be_formated + fi + if [ -e "/boot/wpa_supplicant.conf" ];then + mv /boot/wpa_supplicant.conf /etc/network/ + reboot + fi + # display information + # disable wifi power save + # /usr/sbin/iw wlan0 set power_save off + ;; + *) + N=/etc/init.d/$NAME + echo "Usage: $N {start}" >&2 + exit 1 + ;; +esac + +exit 0 \ No newline at end of file diff --git a/recipes-diya/diya-overlay/files/expandfs.sh b/recipes-diya/diya-overlay/files/expandfs.sh new file mode 100644 index 0000000..f4ef5df --- /dev/null +++ b/recipes-diya/diya-overlay/files/expandfs.sh @@ -0,0 +1,37 @@ +#! /bin/sh + +if [[ $(/usr/bin/id -u) -ne 0 ]]; then + echo "$0 shall be run as root" + exit 1 +fi + +line=$( +sed -e 's/\s*\([\+0-9a-zA-Z]*\).*/\1/' << EOF | fdisk /dev/mmcblk1 | grep /dev/mmcblk1p4 +p +q +EOF +) + +echo "Partition: $line" +#start_sector=$(echo "$line" | cut -d' ' -f14) +start_sector=$(echo "$line" | cut -d' ' -f15) +echo "Start sector is: $start_sector" + +if [ -z "$start_sector" ]; then + echo "Cannot find the start sector" + exit 1 +fi + +echo "Expanding the partition" +sed -e 's/\s*\([\+0-9a-zA-Z]*\).*/\1/' << EOF | fdisk /dev/mmcblk1p4 +d # delete partition +4 # number 4 +n # new partition +p # primary partition +4 # partition number 4 +$start_sector + # default - end of disk +p # print the in-memory partition table +w # write the partition table +q # and we're done +EOF \ No newline at end of file diff --git a/recipes-diya/diya-overlay/files/fs_resize b/recipes-diya/diya-overlay/files/fs_resize new file mode 100644 index 0000000..18096d4 --- /dev/null +++ b/recipes-diya/diya-overlay/files/fs_resize @@ -0,0 +1 @@ +resize the partition \ No newline at end of file diff --git a/recipes-diya/initramfs/files/confd b/recipes-diya/initramfs/files/confd new file mode 100644 index 0000000..ac65de7 --- /dev/null +++ b/recipes-diya/initramfs/files/confd @@ -0,0 +1,21 @@ +#!/bin/sh + +PATH=/sbin:/bin:/usr/sbin:/usr/bin +DESC="Custom configuration" +. /etc/profile + +case "$1" in + start) + echo -n "Start $DESC: " + sed -i 's/^.*recovery.*/recovery=false/g' /boot/config.txt || \ + echo "recovery=false" >> /boot/config.txt + ;; + + *) + N=/etc/init.d/$NAME + echo "Usage: $N {start}" >&2 + exit 1 + ;; +esac + +exit 0 \ No newline at end of file diff --git a/recipes-diya/initramfs/files/diya-update b/recipes-diya/initramfs/files/diya-update new file mode 100755 index 0000000..8d7615a --- /dev/null +++ b/recipes-diya/initramfs/files/diya-update @@ -0,0 +1,147 @@ +#! /bin/sh + +. /etc/profile + +DEFAULT_ROOTFS_NAME="rootfs-$MACHINE.tar.bz2" +DEFAULT_KERNEL_NAME="Image-$MACHINE.bin" +DEFAULT_INITRAMFS_NAME="recovery-$MACHINE.cpio.gz" +UPDATE_SRC_PATH="/home/diya/.update" +ROOTFS_DEV="/dev/mmcblk1p2" +SUPPORTED_COMMAND="rootfs kernel initramfs all" +TMP_MOUNT="/tmp/rootfs" + + +rootfs() +{ + filename=$1 + if [ -z "$filename" ]; then + filename="$DEFAULT_ROOTFS_NAME" + fi + path="$UPDATE_SRC_PATH/$filename" + backup_file="$UPDATE_SRC_PATH/rootfs-backup.img" + echo "Checking rootfs at: $path" + if [ ! -e "$path" ]; then + echo "Error: rootfs file not found" + return 1 + fi + # backup the rootfs file + echo "Backing up the current rootfs" + if ! dd if=$ROOTFS_DEV of=$backup_file; then + echo "Error: unable to backup current rootfs" + return 1 + fi + + echo "Format rootfs partition" + if ! mkfs.ext4 -F $ROOTFS_DEV; then + echo "Error: Unable to format rootfs partition. Restore and quit" + dd if=$backup_file of=$ROOTFS_DEV + return 1 + fi + mkdir -p $TMP_MOUNT + echo "Mount rootfs partition to $TMP_MOUNT" + if ! mount $ROOTFS_DEV $TMP_MOUNT; then + echo "Error: Unable to mount rootfs partition. Restore and quit" + dd if=$backup_file of=$ROOTFS_DEV + return 1 + fi + echo "Installing new rootfs" + if ! tar -xpvf "$path" -C $TMP_MOUNT; then + echo "Error: unable to install new rootfs. Restore and quit" + umount $TMP_MOUNT + dd if=$backup_file of=$ROOTFS_DEV + return 1 + fi + echo "Patch /etc/fstab" + cat << EOF >> $TMP_MOUNT/etc/fstab + +/dev/mmcblk1p1 /boot vfat defaults 0 0 +/dev/mmcblk1p3 /var/etc ext4 defaults 0 0 +/dev/mmcblk1p4 /home ext4 defaults 0 0 + +EOF + sync + echo "Unmount the rootfs partition" + umount $TMP_MOUNT + echo "Done" + return 0 +} + +kernel() +{ + filename=$1 + if [ -z "$filename" ]; then + filename="$DEFAULT_KERNEL_NAME" + fi + path="$UPDATE_SRC_PATH/$filename" + echo "Checking kernel at: $path" + if [ ! -e "$path" ]; then + echo "Error: kernel file not found" + return 1 + fi + echo "Update kernel" + cp -v "$path" /boot/kernel8.img + cd /boot + sync + echo "Done" + return 0 +} + +initramfs() +{ + filename=$1 + if [ -z "$filename" ]; then + filename="$DEFAULT_INITRAMFS_NAME" + fi + path="$UPDATE_SRC_PATH/$filename" + echo "Checking initramfs at: $path" + if [ ! -e "$path" ]; then + echo "Error: initramfs file not found" + return 1 + fi + echo "Update recovery intramfs" + cp -v "$path" /boot/$DEFAULT_INITRAMFS_NAME + cd /boot + sync + echo "Done" + return 0 +} + +command_valid() { + VALUE=$1 + echo $SUPPORTED_COMMAND | tr " " '\n' | grep -F -q -x "$VALUE" +} + + +name=$(basename $0) +cmd=${name#diya-update-} +file="$1" + +if ! command_valid "$cmd"; then + cmd="$1" + file="$2" +fi + +case "$cmd" in + rootfs) + rootfs $file + ;; + kernel) + kernel $file + ;; + initramfs) + initramfs $file + ;; + all) + rootfs && kernel && initramfs + ;; + *) +cat << EOF +Usage: $name [file] + commands: + - rootfs: update rootfs + - kernel: update kernel image + - initramfs: update recovery initramfs +EOF + exit 1 + ;; +esac diff --git a/recipes-diya/initramfs/files/init b/recipes-diya/initramfs/files/init new file mode 100755 index 0000000..b85c4d1 --- /dev/null +++ b/recipes-diya/initramfs/files/init @@ -0,0 +1,107 @@ +#!/bin/sh +# Copyright (C) 2011 O.S. Systems Software LTDA. +# Licensed on MIT +# +# Provides the API to be used by the initramfs modules +# +# Modules need to provide the following functions: +# +# _enabled : check if the module ought to run (return 1 to skip) +# _run : do what is need +# +# Boot parameters are available on environment in the as: +# +# 'foo=value' as 'bootparam_foo=value' +# 'foo' as 'bootparam_foo=true' +# 'foo.bar[=value] as 'foo_bar=[value|true]' + + +# Load kernel module +load_kernel_module() { + if modprobe $1 >/dev/null 2>&1; then + info "Loaded module $1" + else + debug "Failed to load module $1" + fi +} + +# Prints information +msg() { + echo "$@" >/dev/console +} + +# Prints information if verbose bootparam is used +info() { + [ -n "$bootparam_verbose" ] && echo "$@" >/dev/console +} + +# Prints information if debug bootparam is used +debug() { + [ -n "$bootparam_debug" ] && echo "DEBUG: $@" >/dev/console +} + +# Prints a message and start a endless loop +fatal() { + echo $1 >/dev/console + echo >/dev/console + + if [ -n "$bootparam_init_fatal_sh" ]; then + sh + else + while [ "true" ]; do + sleep 3600 + done + fi +} + +# Variables shared amoung modules +EFI_DIR=/sys/firmware/efi # place to store device firmware information + +# initialize /proc, /sys, /run/lock and /var/lock +mkdir -p /proc /sys /run/lock /var/lock /var/run /home +mount -t proc proc /proc +mount -t sysfs sysfs /sys + +if [ -d $EFI_DIR ];then + mount -t efivarfs none /sys/firmware/efi/efivars +fi + +# populate bootparam environment +for p in `cat /proc/cmdline`; do + if [ -n "$quoted" ]; then + value="$value $p" + if [ "`echo $p | sed -e 's/\"$//'`" != "$p" ]; then + eval "bootparam_${quoted}=${value}" + unset quoted + fi + continue + fi + + opt=`echo $p | cut -d'=' -f1` + opt=`echo $opt | sed -e 'y/.-/__/'` + if [ "`echo $p | cut -d'=' -f1`" = "$p" ]; then + eval "bootparam_${opt}=true" + else + value="`echo $p | cut -d'=' -f2-`" + if [ "`echo $value | sed -e 's/^\"//'`" != "$value" ]; then + quoted=${opt} + continue + fi + eval "bootparam_${opt}=\"${value}\"" + fi +done + +# use /dev with devtmpfs +if grep -q devtmpfs /proc/filesystems; then + mkdir -p /dev + mount -t devtmpfs devtmpfs /dev +else + if [ ! -d /dev ]; then + fatal "ERROR: /dev doesn't exist and kernel doesn't has devtmpfs enabled." + fi +fi +# run init +exec /sbin/init + +# Catch all +fatal "ERROR: Initramfs failed to initialize the system." diff --git a/recipes-diya/initramfs/recovery-boot_0.1.bb b/recipes-diya/initramfs/recovery-boot_0.1.bb new file mode 100644 index 0000000..33a0552 --- /dev/null +++ b/recipes-diya/initramfs/recovery-boot_0.1.bb @@ -0,0 +1,47 @@ +SUMMARY = "Modular initramfs system" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/COPYING.MIT;md5=3da9cfbcb788c80a0384361b4de20420" +RDEPENDS:${PN} += "${VIRTUAL-RUNTIME_base-utils} sysvinit" +RRECOMMENDS:${PN} = "${VIRTUAL-RUNTIME_base-utils-syslog}" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +PR = "r4" + +inherit allarch update-rc.d + +SRC_URI = "file://init \ + file://confd \ + file://diya-update \ + " + +S = "${WORKDIR}" + +INITSCRIPT_NAME = "confd" +INITSCRIPT_PARAMS = "start 30 S ." + +do_install() { + install -d ${D}/etc/init.d + install -d ${D}/sbin + # base + install -m 0755 ${WORKDIR}/init ${D}/init + install -m 0755 ${WORKDIR}/confd ${D}/etc/init.d/confd +cat << EOF >> ${D}/etc/profile +export MACHINE=${MACHINE} +EOF + install -m 0755 ${WORKDIR}/diya-update ${D}/sbin/ + + # create symlink + ln -sf /sbin/diya-update ${D}/sbin/diya-update-rootfs + ln -sf /sbin/diya-update ${D}/sbin/diya-update-kernel + ln -sf /sbin/diya-update ${D}/sbin/diya-update-initramfs + ln -sf /sbin/diya-update ${D}/sbin/diya-update-all + + # Create device nodes expected by some kernels in initramfs + # before even executing /init. + install -d ${D}/dev + mknod -m 622 ${D}/dev/console c 5 1 +} + + +FILES:${PN} = "/etc /init /dev /sbin" \ No newline at end of file diff --git a/recipes-extended/sudo/sudo_%.bbappend b/recipes-extended/sudo/sudo_%.bbappend new file mode 100644 index 0000000..f63db11 --- /dev/null +++ b/recipes-extended/sudo/sudo_%.bbappend @@ -0,0 +1,9 @@ +do_install:append() { + # grant all permission to sudo group + sed -i 's/^#\s*\(%sudo\s*ALL=(ALL:ALL)\s*ALL\)/\1/' ${D}/${sysconfdir}/sudoers + # allow sudo group to power off/reboot system without password + cat << EOF >> ${D}/${sysconfdir}/sudoers +## sudo user group is allowed to execute halt and reboot +%sudo ALL=NOPASSWD: /sbin/halt, /sbin/reboot, /sbin/poweroff, /usr/bin/swaylock +EOF +} \ No newline at end of file diff --git a/recipes-graphics/libsdl2/libsdl2_%.bbappend b/recipes-graphics/libsdl2/libsdl2_%.bbappend new file mode 100644 index 0000000..1990f0c --- /dev/null +++ b/recipes-graphics/libsdl2/libsdl2_%.bbappend @@ -0,0 +1,4 @@ +DEPENS += " mesa libdrm alsa virtual/libgbm virtual/libgles2 virtual/libgl udev libudev " + +PACKAGECONFIG = " kmsdrm opengl gles2 alsa libusb " +# PACKAGECONFIG:remove = "x11 wayland" \ No newline at end of file diff --git a/recipes-graphics/wayland/weston-init.bbappend b/recipes-graphics/wayland/weston-init.bbappend new file mode 100644 index 0000000..9aa2987 --- /dev/null +++ b/recipes-graphics/wayland/weston-init.bbappend @@ -0,0 +1,7 @@ + +# change default weston user to diya +do_install:append() { + if [ -e ${D}/${sysconfdir}/init.d/weston ]; then + sed -i 's#WESTON_USER=weston#WESTON_USER=diya WESTON_GROUP=weston#' ${D}/${sysconfdir}/init.d/weston + fi +} diff --git a/recipes-kernel/linux/files/0001-Fix-reset-issue-on-H6-by-using-R_WDOG.patch b/recipes-kernel/linux/files/0001-Fix-reset-issue-on-H6-by-using-R_WDOG.patch new file mode 100644 index 0000000..5ce8c3f --- /dev/null +++ b/recipes-kernel/linux/files/0001-Fix-reset-issue-on-H6-by-using-R_WDOG.patch @@ -0,0 +1,28 @@ +From 82fa50eadf11f01e6315f5e2c2a29845e2a516b8 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Mon, 8 Apr 2019 03:49:26 +0200 +Subject: [PATCH] Fix reset issue on H6 by using R_WDOG + +Inspired by froezuses patch here: + +https://forum.armbian.com/topic/9833-h6-famous-reboot-problem/?page=3 + +Signed-off-by: Ondrej Jirman +--- + plat/allwinner/sun50i_h6/include/sunxi_mmap.h | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/plat/allwinner/sun50i_h6/include/sunxi_mmap.h b/plat/allwinner/sun50i_h6/include/sunxi_mmap.h +index f36491a8..f01745a4 100644 +--- a/plat/allwinner/sun50i_h6/include/sunxi_mmap.h ++++ b/plat/allwinner/sun50i_h6/include/sunxi_mmap.h +@@ -58,4 +58,7 @@ + #define SUNXI_R_UART_BASE 0x07080000 + #define SUNXI_R_PIO_BASE 0x07022000 + ++#undef SUNXI_WDOG_BASE ++#define SUNXI_WDOG_BASE SUNXI_R_WDOG_BASE ++ + #endif /* SUNXI_MMAP_H */ +-- +2.21.0 diff --git a/recipes-kernel/linux/files/0002-fix-rtl8822c-compi-error.patch b/recipes-kernel/linux/files/0002-fix-rtl8822c-compi-error.patch new file mode 100644 index 0000000..1460607 --- /dev/null +++ b/recipes-kernel/linux/files/0002-fix-rtl8822c-compi-error.patch @@ -0,0 +1,13 @@ +diff --git a/drivers/net/wireless/rtl88x2cs/Makefile b/drivers/net/wireless/rtl88x2cs/Makefile +index 814cf1e1ba5f..fe0c5cbe991a 100755 +--- a/drivers/net/wireless/rtl88x2cs/Makefile ++++ b/drivers/net/wireless/rtl88x2cs/Makefile +@@ -2316,7 +2316,7 @@ endif + + ########### HAL_RTL8822C ################################# + ifeq ($(CONFIG_RTL8822C), y) +-include $(TopDIR)/drivers/net/wireless/rtl88x2cs/rtl8822c.mk ++include $(src)/rtl8822c.mk + EXTRA_CFLAGS += -DCONFIG_RTW_IOCTL_SET_COUNTRY + endif + diff --git a/recipes-kernel/linux/files/0003-enable-mali-gpu.patch b/recipes-kernel/linux/files/0003-enable-mali-gpu.patch new file mode 100644 index 0000000..13048b7 --- /dev/null +++ b/recipes-kernel/linux/files/0003-enable-mali-gpu.patch @@ -0,0 +1,13 @@ +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2w.dts +index 27e817b379a4..01d2d6682c67 100755 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2w.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2w.dts +@@ -134,7 +134,7 @@ hdmi_out_con: endpoint { + + &gpu { + mali-supply = <®_dcdc1>; +- status = "disabled"; ++ status = "okay"; + }; + + &mmc0 { diff --git a/recipes-kernel/linux/files/0004-fix-unisocwcn-include-path.patch b/recipes-kernel/linux/files/0004-fix-unisocwcn-include-path.patch new file mode 100644 index 0000000..fc6925b --- /dev/null +++ b/recipes-kernel/linux/files/0004-fix-unisocwcn-include-path.patch @@ -0,0 +1,33 @@ +diff --git a/drivers/net/wireless/uwe5622/Makefile b/drivers/net/wireless/uwe5622/Makefile +index 313ea512340c..8a68354a186a 100644 +--- a/drivers/net/wireless/uwe5622/Makefile ++++ b/drivers/net/wireless/uwe5622/Makefile +@@ -2,7 +2,10 @@ obj-$(CONFIG_AW_WIFI_DEVICE_UWE5622) += unisocwcn/ + obj-$(CONFIG_WLAN_UWE5622) += unisocwifi/ + obj-$(CONFIG_TTY_OVERY_SDIO) += tty-sdio/ + +-UNISOCWCN_DIR := $(shell cd $(src)/unisocwcn/ && /bin/pwd) ++# UNISOCWCN_DIR := $(shell cd $(src)/unisocwcn/ && /bin/pwd) ++mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST))) ++UNISOCWCN_DIR := $(dir $(mkfile_path))/unisocwcn/ ++ + UNISOC_BSP_INCLUDE := $(UNISOCWCN_DIR)/include + export UNISOC_BSP_INCLUDE + +diff --git a/drivers/net/wireless/uwe5622/unisocwcn/Makefile b/drivers/net/wireless/uwe5622/unisocwcn/Makefile +index f9c595747547..1ad490594cf2 100644 +--- a/drivers/net/wireless/uwe5622/unisocwcn/Makefile ++++ b/drivers/net/wireless/uwe5622/unisocwcn/Makefile +@@ -129,9 +129,9 @@ ccflags-y += -DCONFIG_WCN_BOOT + ccflags-y += -DCONFIG_WCN_UTILS + + #### include path ###### +-ccflags-y += -I$(src)/include/ +-ccflags-y += -I$(src)/platform/ +-ccflags-y += -I$(src)/platform/rf/ ++ccflags-y += -I$(srctree)/$(src)/include/ ++ccflags-y += -I$(srctree)/$(src)/platform/ ++ccflags-y += -I$(srctree)/$(src)/platform/rf/ + + #### add cflag for Customer ###### + ### ---------- Hisilicon start ---------- ### diff --git a/recipes-kernel/linux/files/0005-fix-rtl8xxx-include-path.patch b/recipes-kernel/linux/files/0005-fix-rtl8xxx-include-path.patch new file mode 100644 index 0000000..a2b3a43 --- /dev/null +++ b/recipes-kernel/linux/files/0005-fix-rtl8xxx-include-path.patch @@ -0,0 +1,271 @@ +diff --git a/drivers/net/wireless/rtl8189es/Makefile b/drivers/net/wireless/rtl8189es/Makefile +index faa4c0cb66d5..1a99826eee1d 100644 +--- a/drivers/net/wireless/rtl8189es/Makefile ++++ b/drivers/net/wireless/rtl8189es/Makefile +@@ -19,7 +19,7 @@ ifeq ($(GCC_VER_49),1) + EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later + endif + +-EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(srctree)/$(src)/include + + EXTRA_LDFLAGS += --strip-debug + +@@ -249,10 +249,10 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ + hal/led/hal_$(HCI_NAME)_led.o + + +-EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(srctree)/$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + +-EXTRA_CFLAGS += -I$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm + + ########### HAL_RTL8188E ################################# + ifeq ($(CONFIG_RTL8188E), y) +diff --git a/drivers/net/wireless/rtl8189fs/Makefile b/drivers/net/wireless/rtl8189fs/Makefile +index fd5fb4350def..06653cc3d697 100644 +--- a/drivers/net/wireless/rtl8189fs/Makefile ++++ b/drivers/net/wireless/rtl8189fs/Makefile +@@ -20,7 +20,7 @@ ifeq ($(GCC_VER_49),1) + EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later + endif + +-EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(srctree)/$(src)/include + + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +@@ -250,10 +250,10 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ + hal/led/hal_$(HCI_NAME)_led.o + + +-EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(srctree)/$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + +-EXTRA_CFLAGS += -I$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm + + ########### HAL_RTL8188E ################################# + ifeq ($(CONFIG_RTL8188E), y) +diff --git a/drivers/net/wireless/rtl8192eu/Makefile b/drivers/net/wireless/rtl8192eu/Makefile +index 8ecdb72d6e0f..1372c5140e0f 100644 +--- a/drivers/net/wireless/rtl8192eu/Makefile ++++ b/drivers/net/wireless/rtl8192eu/Makefile +@@ -11,7 +11,7 @@ GCC_VER_49 := $(shell echo `$(CC) -dumpversion | cut -f1-2 -d.` \>= 4.9 | bc ) + ifeq ($(GCC_VER_49),1) + endif + +-EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(srctree)/$(src)/include + + EXTRA_LDFLAGS += --strip-debug + +@@ -251,10 +251,10 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ + hal/led/hal_$(HCI_NAME)_led.o + + +-EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(srctree)/$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + +-EXTRA_CFLAGS += -I$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm + + ########### HAL_RTL8188E ################################# + ifeq ($(CONFIG_RTL8188E), y) +diff --git a/drivers/net/wireless/rtl8723ds/Makefile b/drivers/net/wireless/rtl8723ds/Makefile +index ddd45612e06f..3748a4d288a3 100644 +--- a/drivers/net/wireless/rtl8723ds/Makefile ++++ b/drivers/net/wireless/rtl8723ds/Makefile +@@ -19,8 +19,8 @@ ifeq ($(GCC_VER_49),1) + EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later + endif + +-EXTRA_CFLAGS += -I$(src)/include +-EXTRA_CFLAGS += -I$(src)/hal/phydm ++EXTRA_CFLAGS += -I$(srctree)/$(src)/include ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm + + EXTRA_LDFLAGS += --strip-debug + +@@ -232,11 +232,11 @@ _OUTSRC_FILES := hal/phydm/phydm_debug.o \ + hal/phydm/phydm_ccx.o + + +-EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(srctree)/$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + + ifeq ($(CONFIG_BT_COEXIST), y) +-EXTRA_CFLAGS += -I$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/btc + _OUTSRC_FILES += hal/btc/HalBtc8192e1Ant.o \ + hal/btc/HalBtc8192e2Ant.o \ + hal/btc/HalBtc8723b1Ant.o \ +diff --git a/drivers/net/wireless/rtl8723du/Makefile b/drivers/net/wireless/rtl8723du/Makefile +index 1b39e2722942..d5f978817e51 100644 +--- a/drivers/net/wireless/rtl8723du/Makefile ++++ b/drivers/net/wireless/rtl8723du/Makefile +@@ -6,7 +6,7 @@ ifeq ($(GCC_VER_49),1) + EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later + endif + +-EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(srctree)/$(src)/include + + #EXTRA_LDFLAGS += --strip-debug + +@@ -59,10 +59,10 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ + hal/hal_usb_led.o + + +-EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(srctree)/$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + +-EXTRA_CFLAGS += -I$(src)/hal ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal + + include $(TopDIR)/hal/phydm/phydm.mk + ########### HAL_RTL8723D ################################# +diff --git a/drivers/net/wireless/rtl8811cu/Makefile b/drivers/net/wireless/rtl8811cu/Makefile +index 1051a18a3cf0..fd455e266d89 100644 +--- a/drivers/net/wireless/rtl8811cu/Makefile ++++ b/drivers/net/wireless/rtl8811cu/Makefile +@@ -28,7 +28,7 @@ ifeq ($(GCC_VER_49),1) + EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later + endif + +-EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(srctree)/$(src)/include + + EXTRA_LDFLAGS += --strip-debug + +@@ -282,10 +282,10 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ + hal/led/hal_$(HCI_NAME)_led.o + + +-EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(srctree)/$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + +-EXTRA_CFLAGS += -I$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm + + ########### HAL_RTL8188E ################################# + ifeq ($(CONFIG_RTL8188E), y) +@@ -2459,7 +2459,7 @@ ifeq ($(CONFIG_SDIO_HCI), y) + rtk_core += core/rtw_sdio.o + endif + +-EXTRA_CFLAGS += -I$(src)/core/crypto ++EXTRA_CFLAGS += -I$(srctree)/$(src)/core/crypto + rtk_core += \ + core/crypto/aes-internal.o \ + core/crypto/aes-internal-enc.o \ +diff --git a/drivers/net/wireless/rtl8812au/Makefile b/drivers/net/wireless/rtl8812au/Makefile +index 69585ae65f9e..bd18f9dca1c1 100755 +--- a/drivers/net/wireless/rtl8812au/Makefile ++++ b/drivers/net/wireless/rtl8812au/Makefile +@@ -20,7 +20,7 @@ EXTRA_CFLAGS += -Wno-vla -g + #EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later + #endif + +-EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(srctree)/$(src)/include + EXTRA_LDFLAGS += --strip-all -O3 + + ########################## WIFI IC ############################ +@@ -230,10 +230,10 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ + hal/led/hal_$(HCI_NAME)_led.o + + +-EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(srctree)/$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + +-EXTRA_CFLAGS += -I$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm + + ########### HAL_RTL8188E ################################# + ifeq ($(CONFIG_RTL8188E), y) +diff --git a/drivers/net/wireless/rtl88x2cs/Makefile b/drivers/net/wireless/rtl88x2cs/Makefile +index fe0c5cbe991a..82e09b258edb 100755 +--- a/drivers/net/wireless/rtl88x2cs/Makefile ++++ b/drivers/net/wireless/rtl88x2cs/Makefile +@@ -20,7 +20,7 @@ ifeq ($(GCC_VER_49),1) + EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later + endif + +-EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(srctree)/$(src)/include + + EXTRA_LDFLAGS += --strip-debug + +@@ -268,10 +268,10 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ + hal/led/hal_$(HCI_NAME)_led.o + + +-EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(srctree)/$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + +-EXTRA_CFLAGS += -I$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm + + ########### HAL_RTL8188E ################################# + ifeq ($(CONFIG_RTL8188E), y) +@@ -2370,7 +2370,7 @@ ifeq ($(CONFIG_SDIO_HCI), y) + rtk_core += core/rtw_sdio.o + endif + +-EXTRA_CFLAGS += -I$(src)/core/crypto ++EXTRA_CFLAGS += -I$(srctree)/$(src)/core/crypto + rtk_core += \ + core/crypto/aes-internal.o \ + core/crypto/aes-internal-enc.o \ +diff --git a/drivers/net/wireless/rtl88x2bu/Makefile b/drivers/net/wireless/rtl88x2bu/Makefile +index 1cd1c6a7043b..1c6dbb64bc8c 100644 +--- a/drivers/net/wireless/rtl88x2bu/Makefile ++++ b/drivers/net/wireless/rtl88x2bu/Makefile +@@ -28,7 +28,7 @@ ifeq ($(GCC_VER_49),1) + EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later + endif + +-EXTRA_CFLAGS += -I$(src)/include ++EXTRA_CFLAGS += -I$(srctree)/$(src)/include + + EXTRA_LDFLAGS += --strip-debug + +@@ -285,10 +285,10 @@ _HAL_INTFS_FILES := hal/hal_intf.o \ + hal/led/hal_$(HCI_NAME)_led.o + + +-EXTRA_CFLAGS += -I$(src)/platform ++EXTRA_CFLAGS += -I$(srctree)/$(src)/platform + _PLATFORM_FILES := platform/platform_ops.o + +-EXTRA_CFLAGS += -I$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/btc ++EXTRA_CFLAGS += -I$(srctree)/$(src)/hal/phydm + + ########### HAL_RTL8188E ################################# + ifeq ($(CONFIG_RTL8188E), y) +@@ -2457,7 +2457,7 @@ ifeq ($(CONFIG_SDIO_HCI), y) + rtk_core += core/rtw_sdio.o + endif + +-EXTRA_CFLAGS += -I$(src)/core/crypto ++EXTRA_CFLAGS += -I$(srctree)/$(src)/core/crypto + rtk_core += \ + core/crypto/aes-internal.o \ + core/crypto/aes-internal-enc.o \ diff --git a/recipes-kernel/linux/files/defconfig b/recipes-kernel/linux/files/defconfig new file mode 100644 index 0000000..690d52b --- /dev/null +++ b/recipes-kernel/linux/files/defconfig @@ -0,0 +1,8422 @@ +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_TABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +# CONFIG_WERROR is not set +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_SIM=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y +CONFIG_GENERIC_IRQ_IPI=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +CONFIG_BPF=y +CONFIG_HAVE_EBPF_JIT=y +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y + +# +# BPF subsystem +# +CONFIG_BPF_SYSCALL=y +CONFIG_BPF_JIT=y +# CONFIG_BPF_JIT_ALWAYS_ON is not set +CONFIG_BPF_JIT_DEFAULT_ON=y +# CONFIG_BPF_UNPRIV_DEFAULT_OFF is not set +CONFIG_USERMODE_DRIVER=y +# CONFIG_BPF_PRELOAD is not set +# end of BPF subsystem + +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +# CONFIG_PREEMPT_DYNAMIC is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y +CONFIG_TASKS_TRACE_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_IKHEADERS=m +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=17 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +# CONFIG_PRINTK_INDEX is not set +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CC_HAS_INT128=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_ARCH_SUPPORTS_INT128=y +# CONFIG_NUMA_BALANCING is not set +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +# CONFIG_CGROUP_FAVOR_DYNMODS is not set +CONFIG_MEMCG=y +CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_RDMA=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +# CONFIG_CGROUP_MISC is not set +CONFIG_SOCK_CGROUP_DATA=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_TIME_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_RD_ZSTD=y +# CONFIG_BOOT_CONFIG is not set +CONFIG_INITRAMFS_PRESERVE_MTIME=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_LD_ORPHAN_WARN=y +CONFIG_SYSCTL=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +# CONFIG_EXPERT is not set +CONFIG_UID16=y +CONFIG_MULTIUSER=y +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# end of Kernel Performance Events And Counters + +CONFIG_SYSTEM_DATA_VERIFICATION=y +# CONFIG_PROFILING is not set +# end of General setup + +CONFIG_ARM64=y +CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_NO_IOPORT_MAP=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +CONFIG_ARCH_SUNXI=y +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_APPLE is not set +# CONFIG_ARCH_BCM is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SPARX5 is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_KEEMBAY is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_NXP is not set +# CONFIG_ARCH_NPCM is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_INTEL_SOCFPGA is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VISCONTI is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +# CONFIG_ARM64_ERRATUM_832075 is not set +CONFIG_ARM64_ERRATUM_1742098=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_ERRATUM_1418040=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_2441007=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_ARM64_ERRATUM_1542419=y +CONFIG_ARM64_ERRATUM_1508412=y +CONFIG_ARM64_ERRATUM_2051678=y +CONFIG_ARM64_ERRATUM_2077057=y +CONFIG_ARM64_ERRATUM_2658417=y +CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y +CONFIG_ARM64_ERRATUM_2054223=y +CONFIG_ARM64_ERRATUM_2067961=y +CONFIG_ARM64_ERRATUM_2441009=y +CONFIG_ARM64_ERRATUM_2457168=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +CONFIG_CAVIUM_ERRATUM_23144=y +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +# CONFIG_CAVIUM_ERRATUM_30115 is not set +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y +# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set +# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_NVIDIA_CARMEL_CNP_ERRATUM=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_CLUSTER=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=8 +CONFIG_HOTPLUG_CPU=y +CONFIG_NUMA=y +CONFIG_NODES_SHIFT=2 +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +# CONFIG_KEXEC is not set +# CONFIG_KEXEC_FILE is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_ARCH_FORCE_MAX_ORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_COMPAT=y +CONFIG_KUSER_HELPERS=y +# CONFIG_COMPAT_ALIGNMENT_FIXUPS is not set +CONFIG_ARMV8_DEPRECATED=y +CONFIG_SWP_EMULATION=y +CONFIG_CP15_BARRIER_EMULATION=y +CONFIG_SETEND_EMULATION=y + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_AS_HAS_LDAPR=y +CONFIG_AS_HAS_LSE_ATOMICS=y +CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_USE_LSE_ATOMICS=y +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +CONFIG_AS_HAS_ARMV8_2=y +CONFIG_AS_HAS_SHA3=y +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +CONFIG_ARM64_PTR_AUTH_KERNEL=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y +CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y +CONFIG_AS_HAS_PAC=y +CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y +# end of ARMv8.3 architectural features + +# +# ARMv8.4 architectural features +# +CONFIG_ARM64_AMU_EXTN=y +CONFIG_AS_HAS_ARMV8_4=y +CONFIG_ARM64_TLB_RANGE=y +# end of ARMv8.4 architectural features + +# +# ARMv8.5 architectural features +# +CONFIG_AS_HAS_ARMV8_5=y +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y +CONFIG_ARM64_E0PD=y +CONFIG_ARM64_AS_HAS_MTE=y +CONFIG_ARM64_MTE=y +# end of ARMv8.5 architectural features + +# +# ARMv8.7 architectural features +# +CONFIG_ARM64_EPAN=y +# end of ARMv8.7 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_SME=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARCH_NR_GPIO=0 +# end of Kernel Features + +# +# Boot options +# +CONFIG_CMDLINE="" +# CONFIG_EFI is not set +# end of Boot options + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_USERSPACE_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +# CONFIG_ENERGY_MODEL is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +CONFIG_DT_IDLE_STATES=y +CONFIG_DT_IDLE_GENPD=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +# end of ARM CPU Idle Drivers +# end of CPU Idle + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y +CONFIG_ARM_SCPI_CPUFREQ=m +# CONFIG_ARM_SCMI_CPUFREQ is not set +# end of CPU Frequency scaling +# end of CPU Power Management + +CONFIG_HAVE_KVM=y +# CONFIG_VIRTUALIZATION is not set + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_ARCH_HAS_SUBPAGE_FAULTS=y +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_MMU_GATHER_TABLE_FREE=y +CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y +CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y +CONFIG_HAVE_CONTEXT_TRACKING_USER=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y +CONFIG_HAVE_MOVE_PMD=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +# CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y +CONFIG_HAVE_PREEMPT_DYNAMIC=y +CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y +CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y +CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_HAVE_GCC_PLUGINS=y +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULE_SIG_FORMAT=y +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_MODULE_SIG=y +# CONFIG_MODULE_SIG_FORCE is not set +CONFIG_MODULE_SIG_ALL=y +CONFIG_MODULE_SIG_SHA1=y +# CONFIG_MODULE_SIG_SHA224 is not set +# CONFIG_MODULE_SIG_SHA256 is not set +# CONFIG_MODULE_SIG_SHA384 is not set +# CONFIG_MODULE_SIG_SHA512 is not set +CONFIG_MODULE_SIG_HASH="sha1" +CONFIG_MODULE_COMPRESS_NONE=y +# CONFIG_MODULE_COMPRESS_GZIP is not set +# CONFIG_MODULE_COMPRESS_XZ is not set +# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +CONFIG_MODPROBE_PATH="/sbin/modprobe" +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLOCK_LEGACY_AUTOLOAD=y +CONFIG_BLK_CGROUP_RWSTAT=y +CONFIG_BLK_DEV_BSG_COMMON=y +CONFIG_BLK_ICQ=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_ZONED=y +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_DEV_THROTTLING_LOW is not set +CONFIG_BLK_WBT=y +CONFIG_BLK_WBT_MQ=y +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +CONFIG_BLK_CGROUP_IOPRIO=y +# CONFIG_BLK_DEBUG_FS is not set +# CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +# end of Partition Types + +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y +CONFIG_BLOCK_HOLDER_DEPRECATED=y +CONFIG_BLK_MQ_STACKING=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +CONFIG_IOSCHED_BFQ=y +CONFIG_BFQ_GROUP_IOSCHED=y +# CONFIG_BFQ_CGROUP_DEBUG is not set +# end of IO Schedulers + +CONFIG_PADATA=y +CONFIG_ASN1=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_SPIN_TRYLOCK=y +CONFIG_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_INLINE_SPIN_LOCK=y +CONFIG_INLINE_SPIN_LOCK_BH=y +CONFIG_INLINE_SPIN_LOCK_IRQ=y +CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_INLINE_SPIN_UNLOCK_BH=y +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_READ_LOCK=y +CONFIG_INLINE_READ_LOCK_BH=y +CONFIG_INLINE_READ_LOCK_IRQ=y +CONFIG_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_BH=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_WRITE_LOCK=y +CONFIG_INLINE_WRITE_LOCK_BH=y +CONFIG_INLINE_WRITE_LOCK_IRQ=y +CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_BH=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +CONFIG_BINFMT_MISC=m +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_ZPOOL=y +CONFIG_SWAP=y +CONFIG_ZSWAP=y +CONFIG_ZSWAP_DEFAULT_ON=y +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set +CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y +CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd" +# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD is not set +CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD=y +# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set +CONFIG_ZSWAP_ZPOOL_DEFAULT="z3fold" +CONFIG_ZBUD=y +CONFIG_Z3FOLD=y +CONFIG_ZSMALLOC=y +# CONFIG_ZSMALLOC_STAT is not set + +# +# SLAB allocator options +# +# CONFIG_SLAB is not set +CONFIG_SLUB=y +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SLUB_STATS is not set +CONFIG_SLUB_CPU_PARTIAL=y +# end of SLAB allocator options + +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y +CONFIG_ARCH_ENABLE_THP_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_TRANSPARENT_HUGEPAGE=y +# CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +CONFIG_THP_SWAP=y +# CONFIG_READ_ONLY_THP_FOR_FS is not set +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_FRONTSWAP=y +CONFIG_CMA=y +# CONFIG_CMA_DEBUGFS is not set +# CONFIG_CMA_SYSFS is not set +CONFIG_CMA_AREAS=7 +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +CONFIG_PAGE_IDLE_FLAG=y +CONFIG_IDLE_PAGE_TRACKING=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PERCPU_STATS=y +# CONFIG_GUP_TEST is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_SECRETMEM=y +# CONFIG_ANON_VMA_NAME is not set +# CONFIG_USERFAULTFD is not set +# CONFIG_LRU_GEN is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring +# end of Memory Management options + +CONFIG_NET=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y +CONFIG_NET_REDIRECT=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=m +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +CONFIG_AF_UNIX_OOB=y +CONFIG_UNIX_DIAG=m +CONFIG_TLS=y +# CONFIG_TLS_DEVICE is not set +# CONFIG_TLS_TOE is not set +CONFIG_XFRM=y +CONFIG_XFRM_OFFLOAD=y +CONFIG_XFRM_ALGO=m +CONFIG_XFRM_USER=m +CONFIG_XFRM_INTERFACE=m +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_AH=m +CONFIG_XFRM_ESP=m +CONFIG_XFRM_IPCOMP=m +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +# CONFIG_XDP_SOCKETS is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_FIB_TRIE_STATS=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_ROUTE_CLASSID=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE_DEMUX=m +CONFIG_NET_IP_TUNNEL=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_MULTIPLE_TABLES=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_SYN_COOKIES=y +CONFIG_NET_IPVTI=m +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_ESP_OFFLOAD=m +# CONFIG_INET_ESPINTCP is not set +CONFIG_INET_IPCOMP=m +CONFIG_INET_TABLE_PERTURB_ORDER=16 +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=m +CONFIG_INET_TCP_DIAG=m +CONFIG_INET_UDP_DIAG=m +CONFIG_INET_RAW_DIAG=m +# CONFIG_INET_DIAG_DESTROY is not set +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_NV=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_TCP_CONG_DCTCP=m +CONFIG_TCP_CONG_CDG=m +CONFIG_TCP_CONG_BBR=m +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_MD5SIG=y +CONFIG_IPV6=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_ESP_OFFLOAD=m +# CONFIG_INET6_ESPINTCP is not set +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +# CONFIG_IPV6_ILA is not set +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_IPV6_VTI=m +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_GRE=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_IPV6_MROUTE=y +# CONFIG_IPV6_MROUTE_MULTIPLE_TABLES is not set +# CONFIG_IPV6_PIMSM_V2 is not set +CONFIG_IPV6_SEG6_LWTUNNEL=y +CONFIG_IPV6_SEG6_HMAC=y +CONFIG_IPV6_SEG6_BPF=y +# CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_IPV6_IOAM6_LWTUNNEL is not set +CONFIG_NETLABEL=y +# CONFIG_MPTCP is not set +CONFIG_NETWORK_SECMARK=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NETWORK_PHY_TIMESTAMPING=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_EGRESS=y +CONFIG_NETFILTER_SKIP_EGRESS=y +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_FAMILY_BRIDGE=y +CONFIG_NETFILTER_FAMILY_ARP=y +CONFIG_NETFILTER_NETLINK_HOOK=m +CONFIG_NETFILTER_NETLINK_ACCT=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_OSF=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_SYSLOG=m +CONFIG_NETFILTER_CONNCOUNT=m +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_ZONES=y +# CONFIG_NF_CONNTRACK_PROCFS is not set +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_TIMEOUT=y +CONFIG_NF_CONNTRACK_TIMESTAMP=y +CONFIG_NF_CONNTRACK_LABELS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_GRE=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_BROADCAST=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_SNMP=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NF_CT_NETLINK_TIMEOUT=m +CONFIG_NF_CT_NETLINK_HELPER=m +CONFIG_NETFILTER_NETLINK_GLUE_CT=y +CONFIG_NF_NAT=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_SIP=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NETFILTER_SYNPROXY=m +CONFIG_NF_TABLES=m +CONFIG_NF_TABLES_INET=y +CONFIG_NF_TABLES_NETDEV=y +CONFIG_NFT_NUMGEN=m +CONFIG_NFT_CT=m +CONFIG_NFT_FLOW_OFFLOAD=m +CONFIG_NFT_CONNLIMIT=m +CONFIG_NFT_LOG=m +CONFIG_NFT_LIMIT=m +CONFIG_NFT_MASQ=m +CONFIG_NFT_REDIR=m +CONFIG_NFT_NAT=m +CONFIG_NFT_TUNNEL=m +CONFIG_NFT_OBJREF=m +CONFIG_NFT_QUEUE=m +CONFIG_NFT_QUOTA=m +CONFIG_NFT_REJECT=m +CONFIG_NFT_REJECT_INET=m +CONFIG_NFT_COMPAT=m +CONFIG_NFT_HASH=m +CONFIG_NFT_FIB=m +CONFIG_NFT_FIB_INET=m +CONFIG_NFT_XFRM=m +CONFIG_NFT_SOCKET=m +CONFIG_NFT_OSF=m +CONFIG_NFT_TPROXY=m +# CONFIG_NFT_SYNPROXY is not set +CONFIG_NF_DUP_NETDEV=m +CONFIG_NFT_DUP_NETDEV=m +CONFIG_NFT_FWD_NETDEV=m +CONFIG_NFT_FIB_NETDEV=m +CONFIG_NFT_REJECT_NETDEV=m +CONFIG_NF_FLOW_TABLE_INET=m +CONFIG_NF_FLOW_TABLE=m +# CONFIG_NF_FLOW_TABLE_PROCFS is not set +CONFIG_NETFILTER_XTABLES=y +CONFIG_NETFILTER_XTABLES_COMPAT=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_CONNMARK=m +CONFIG_NETFILTER_XT_SET=m + +# +# Xtables targets +# +CONFIG_NETFILTER_XT_TARGET_AUDIT=m +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +CONFIG_NETFILTER_XT_TARGET_CT=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +CONFIG_NETFILTER_XT_TARGET_HMARK=m +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_NAT=m +CONFIG_NETFILTER_XT_TARGET_NETMAP=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +CONFIG_NETFILTER_XT_TARGET_REDIRECT=m +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +CONFIG_NETFILTER_XT_TARGET_TEE=m +CONFIG_NETFILTER_XT_TARGET_TPROXY=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_BPF=m +CONFIG_NETFILTER_XT_MATCH_CGROUP=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ECN=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +CONFIG_NETFILTER_XT_MATCH_IPCOMP=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_NETFILTER_XT_MATCH_L2TP=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_NFACCT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +# end of Core Netfilter Configuration + +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +CONFIG_IP_SET_BITMAP_IP=m +CONFIG_IP_SET_BITMAP_IPMAC=m +CONFIG_IP_SET_BITMAP_PORT=m +CONFIG_IP_SET_HASH_IP=m +CONFIG_IP_SET_HASH_IPMARK=m +CONFIG_IP_SET_HASH_IPPORT=m +CONFIG_IP_SET_HASH_IPPORTIP=m +CONFIG_IP_SET_HASH_IPPORTNET=m +CONFIG_IP_SET_HASH_IPMAC=m +CONFIG_IP_SET_HASH_MAC=m +CONFIG_IP_SET_HASH_NETPORTNET=m +CONFIG_IP_SET_HASH_NET=m +CONFIG_IP_SET_HASH_NETNET=m +CONFIG_IP_SET_HASH_NETPORT=m +CONFIG_IP_SET_HASH_NETIFACE=m +CONFIG_IP_SET_LIST_SET=m +CONFIG_IP_VS=m +CONFIG_IP_VS_IPV6=y +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y +CONFIG_IP_VS_PROTO_SCTP=y + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_FO=m +CONFIG_IP_VS_OVF=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_MH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m +CONFIG_IP_VS_TWOS=m + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m +CONFIG_IP_VS_NFCT=y +CONFIG_IP_VS_PE_SIP=m + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_SOCKET_IPV4=m +CONFIG_NF_TPROXY_IPV4=m +CONFIG_NF_TABLES_IPV4=y +CONFIG_NFT_REJECT_IPV4=m +CONFIG_NFT_DUP_IPV4=m +CONFIG_NFT_FIB_IPV4=m +CONFIG_NF_TABLES_ARP=y +CONFIG_NF_DUP_IPV4=m +CONFIG_NF_LOG_ARP=m +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_RPFILTER=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_SYNPROXY=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_SECURITY=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_SOCKET_IPV6=m +CONFIG_NF_TPROXY_IPV6=m +CONFIG_NF_TABLES_IPV6=y +CONFIG_NFT_REJECT_IPV6=m +CONFIG_NFT_DUP_IPV6=m +CONFIG_NFT_FIB_IPV6=m +CONFIG_NF_DUP_IPV6=m +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RPFILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_SRH=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_TARGET_SYNPROXY=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_IP6_NF_TARGET_NPT=m +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_NF_TABLES_BRIDGE=m +CONFIG_NFT_BRIDGE_META=m +CONFIG_NFT_BRIDGE_REJECT=m +CONFIG_NF_CONNTRACK_BRIDGE=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_NFLOG=m +CONFIG_BPFILTER=y +CONFIG_BPFILTER_UMH=m +# CONFIG_IP_DCCP is not set +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_OBJCNT is not set +CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1 is not set +# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set +CONFIG_SCTP_COOKIE_HMAC_MD5=y +# CONFIG_SCTP_COOKIE_HMAC_SHA1 is not set +CONFIG_INET_SCTP_DIAG=m +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_L2TP=m +# CONFIG_L2TP_DEBUGFS is not set +CONFIG_L2TP_V3=y +CONFIG_L2TP_IP=m +CONFIG_L2TP_ETH=m +CONFIG_STP=y +CONFIG_GARP=y +CONFIG_MRP=y +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_BRIDGE_MRP=y +# CONFIG_BRIDGE_CFM is not set +CONFIG_NET_DSA=m +CONFIG_NET_DSA_TAG_AR9331=m +CONFIG_NET_DSA_TAG_BRCM_COMMON=m +CONFIG_NET_DSA_TAG_BRCM=m +CONFIG_NET_DSA_TAG_BRCM_LEGACY=m +CONFIG_NET_DSA_TAG_BRCM_PREPEND=m +CONFIG_NET_DSA_TAG_HELLCREEK=m +CONFIG_NET_DSA_TAG_GSWIP=m +CONFIG_NET_DSA_TAG_DSA_COMMON=m +CONFIG_NET_DSA_TAG_DSA=m +CONFIG_NET_DSA_TAG_EDSA=m +CONFIG_NET_DSA_TAG_MTK=m +CONFIG_NET_DSA_TAG_KSZ=m +CONFIG_NET_DSA_TAG_OCELOT=m +CONFIG_NET_DSA_TAG_OCELOT_8021Q=m +CONFIG_NET_DSA_TAG_QCA=m +CONFIG_NET_DSA_TAG_RTL4_A=m +CONFIG_NET_DSA_TAG_RTL8_4=m +CONFIG_NET_DSA_TAG_RZN1_A5PSW=m +CONFIG_NET_DSA_TAG_LAN9303=m +CONFIG_NET_DSA_TAG_SJA1105=m +CONFIG_NET_DSA_TAG_TRAILER=m +CONFIG_NET_DSA_TAG_XRS700X=m +CONFIG_VLAN_8021Q=y +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +CONFIG_6LOWPAN=m +# CONFIG_6LOWPAN_DEBUGFS is not set +CONFIG_6LOWPAN_NHC=m +CONFIG_6LOWPAN_NHC_DEST=m +CONFIG_6LOWPAN_NHC_FRAGMENT=m +CONFIG_6LOWPAN_NHC_HOP=m +CONFIG_6LOWPAN_NHC_IPV6=m +CONFIG_6LOWPAN_NHC_MOBILITY=m +CONFIG_6LOWPAN_NHC_ROUTING=m +CONFIG_6LOWPAN_NHC_UDP=m +# CONFIG_6LOWPAN_GHC_EXT_HDR_HOP is not set +# CONFIG_6LOWPAN_GHC_UDP is not set +# CONFIG_6LOWPAN_GHC_ICMPV6 is not set +# CONFIG_6LOWPAN_GHC_EXT_HDR_DEST is not set +# CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG is not set +# CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE is not set +CONFIG_IEEE802154=m +# CONFIG_IEEE802154_NL802154_EXPERIMENTAL is not set +CONFIG_IEEE802154_SOCKET=m +# CONFIG_IEEE802154_6LOWPAN is not set +# CONFIG_MAC802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFB=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_CBS=m +CONFIG_NET_SCH_ETF=m +CONFIG_NET_SCH_TAPRIO=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_MQPRIO=m +CONFIG_NET_SCH_SKBPRIO=m +CONFIG_NET_SCH_CHOKE=m +CONFIG_NET_SCH_QFQ=m +CONFIG_NET_SCH_CODEL=m +CONFIG_NET_SCH_FQ_CODEL=m +CONFIG_NET_SCH_CAKE=m +CONFIG_NET_SCH_FQ=m +CONFIG_NET_SCH_HHF=m +CONFIG_NET_SCH_PIE=m +CONFIG_NET_SCH_FQ_PIE=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_SCH_PLUG=m +CONFIG_NET_SCH_ETS=m +CONFIG_NET_SCH_DEFAULT=y +# CONFIG_DEFAULT_FQ is not set +# CONFIG_DEFAULT_CODEL is not set +# CONFIG_DEFAULT_FQ_CODEL is not set +# CONFIG_DEFAULT_FQ_PIE is not set +# CONFIG_DEFAULT_SFQ is not set +CONFIG_DEFAULT_PFIFO_FAST=y +CONFIG_DEFAULT_NET_SCH="pfifo_fast" + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_CLS_U32_PERF=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_CLS_CGROUP=m +CONFIG_NET_CLS_BPF=m +CONFIG_NET_CLS_FLOWER=m +CONFIG_NET_CLS_MATCHALL=m +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_TEXT=m +CONFIG_NET_EMATCH_CANID=m +CONFIG_NET_EMATCH_IPSET=m +CONFIG_NET_EMATCH_IPT=m +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_GACT=m +CONFIG_GACT_PROB=y +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_SAMPLE=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +CONFIG_NET_ACT_CSUM=m +# CONFIG_NET_ACT_MPLS is not set +CONFIG_NET_ACT_VLAN=m +CONFIG_NET_ACT_BPF=m +CONFIG_NET_ACT_CONNMARK=m +CONFIG_NET_ACT_CTINFO=m +CONFIG_NET_ACT_SKBMOD=m +CONFIG_NET_ACT_IFE=m +CONFIG_NET_ACT_TUNNEL_KEY=m +CONFIG_NET_ACT_CT=m +CONFIG_NET_ACT_GATE=m +CONFIG_NET_IFE_SKBMARK=m +CONFIG_NET_IFE_SKBPRIO=m +CONFIG_NET_IFE_SKBTCINDEX=m +# CONFIG_NET_TC_SKB_EXT is not set +CONFIG_NET_SCH_FIFO=y +CONFIG_DCB=y +CONFIG_DNS_RESOLVER=y +CONFIG_BATMAN_ADV=m +CONFIG_BATMAN_ADV_BATMAN_V=y +CONFIG_BATMAN_ADV_BLA=y +CONFIG_BATMAN_ADV_DAT=y +CONFIG_BATMAN_ADV_NC=y +CONFIG_BATMAN_ADV_MCAST=y +CONFIG_BATMAN_ADV_DEBUG=y +CONFIG_OPENVSWITCH=m +CONFIG_OPENVSWITCH_GRE=m +CONFIG_OPENVSWITCH_VXLAN=m +CONFIG_OPENVSWITCH_GENEVE=m +CONFIG_VSOCKETS=m +CONFIG_VSOCKETS_DIAG=m +CONFIG_VSOCKETS_LOOPBACK=m +CONFIG_VIRTIO_VSOCKETS=m +CONFIG_VIRTIO_VSOCKETS_COMMON=m +CONFIG_NETLINK_DIAG=m +CONFIG_MPLS=y +CONFIG_NET_MPLS_GSO=m +CONFIG_MPLS_ROUTING=m +CONFIG_MPLS_IPTUNNEL=m +CONFIG_NET_NSH=m +# CONFIG_HSR is not set +CONFIG_NET_SWITCHDEV=y +CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set +# CONFIG_NET_NCSI is not set +CONFIG_PCPU_DEV_REFCNT=y +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_XPS=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CGROUP_NET_CLASSID=y +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_STREAM_PARSER is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# end of Network testing +# end of Networking options + +CONFIG_HAMRADIO=y + +# +# Packet Radio protocols +# +CONFIG_AX25=m +CONFIG_AX25_DAMA_SLAVE=y +CONFIG_NETROM=m +CONFIG_ROSE=m + +# +# AX.25 network device drivers +# +CONFIG_MKISS=m +CONFIG_6PACK=m +CONFIG_BPQETHER=m +CONFIG_BAYCOM_SER_FDX=m +CONFIG_BAYCOM_SER_HDX=m +CONFIG_YAM=m +# end of AX.25 network device drivers + +CONFIG_CAN=m +CONFIG_CAN_RAW=m +CONFIG_CAN_BCM=m +CONFIG_CAN_GW=m +CONFIG_CAN_J1939=m +# CONFIG_CAN_ISOTP is not set +CONFIG_BT=m +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m +CONFIG_BT_HS=y +CONFIG_BT_LE=y +# CONFIG_BT_6LOWPAN is not set +CONFIG_BT_LEDS=y +# CONFIG_BT_MSFTEXT is not set +# CONFIG_BT_AOSPEXT is not set +CONFIG_BT_DEBUGFS=y + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m +CONFIG_BT_BCM=m +CONFIG_BT_RTL=m +CONFIG_BT_QCA=m +CONFIG_BT_MTK=m +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +CONFIG_BT_HCIBTUSB_BCM=y +# CONFIG_BT_HCIBTUSB_MTK is not set +CONFIG_BT_HCIBTUSB_RTL=y +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_SERDEV=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_NOKIA=m +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIUART_3WIRE=y +CONFIG_BT_HCIUART_INTEL=y +CONFIG_BT_HCIUART_BCM=y +CONFIG_BT_HCIUART_RTL=y +CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_HCIUART_AG6XX=y +CONFIG_BT_HCIUART_MRVL=y +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIVHCI=m +CONFIG_BT_MRVL=m +CONFIG_BT_MRVL_SDIO=m +CONFIG_BT_ATH3K=m +CONFIG_BT_MTKSDIO=m +CONFIG_BT_MTKUART=m +CONFIG_BT_VIRTIO=m +# end of Bluetooth device drivers + +CONFIG_AF_RXRPC=m +# CONFIG_AF_RXRPC_IPV6 is not set +# CONFIG_AF_RXRPC_INJECT_LOSS is not set +# CONFIG_AF_RXRPC_DEBUG is not set +# CONFIG_RXKAD is not set +# CONFIG_AF_KCM is not set +CONFIG_STREAM_PARSER=y +CONFIG_MCTP=y +CONFIG_MCTP_FLOWS=y +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +# CONFIG_CFG80211_DEFAULT_PS is not set +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_WEP=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_DEBUG=y +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +CONFIG_MAC80211_MESH=y +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_FD=m +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +CONFIG_CEPH_LIB=m +# CONFIG_CEPH_LIB_PRETTYDEBUG is not set +# CONFIG_CEPH_LIB_USE_DNS_RESOLVER is not set +CONFIG_NFC=m +CONFIG_NFC_DIGITAL=m +CONFIG_NFC_NCI=m +CONFIG_NFC_NCI_SPI=m +CONFIG_NFC_NCI_UART=m +CONFIG_NFC_HCI=m +CONFIG_NFC_SHDLC=y + +# +# Near Field Communication (NFC) devices +# +CONFIG_NFC_TRF7970A=m +CONFIG_NFC_SIM=m +CONFIG_NFC_PORT100=m +CONFIG_NFC_VIRTUAL_NCI=m +CONFIG_NFC_FDP=m +CONFIG_NFC_FDP_I2C=m +CONFIG_NFC_PN544=m +CONFIG_NFC_PN544_I2C=m +CONFIG_NFC_PN533=m +CONFIG_NFC_PN533_USB=m +CONFIG_NFC_PN533_I2C=m +CONFIG_NFC_PN532_UART=m +CONFIG_NFC_MICROREAD=m +CONFIG_NFC_MICROREAD_I2C=m +CONFIG_NFC_MRVL=m +CONFIG_NFC_MRVL_USB=m +CONFIG_NFC_MRVL_UART=m +CONFIG_NFC_MRVL_I2C=m +CONFIG_NFC_MRVL_SPI=m +CONFIG_NFC_ST21NFCA=m +CONFIG_NFC_ST21NFCA_I2C=m +CONFIG_NFC_ST_NCI=m +CONFIG_NFC_ST_NCI_I2C=m +CONFIG_NFC_ST_NCI_SPI=m +CONFIG_NFC_NXP_NCI=m +CONFIG_NFC_NXP_NCI_I2C=m +CONFIG_NFC_S3FWRN5=m +CONFIG_NFC_S3FWRN5_I2C=m +CONFIG_NFC_S3FWRN82_UART=m +CONFIG_NFC_ST95HF=m +# end of Near Field Communication (NFC) devices + +CONFIG_PSAMPLE=m +CONFIG_NET_IFE=m +CONFIG_LWTUNNEL=y +# CONFIG_LWTUNNEL_BPF is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SOCK_MSG=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +# CONFIG_PAGE_POOL_STATS is not set +CONFIG_FAILOVER=m +CONFIG_ETHTOOL_NETLINK=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +# CONFIG_PCI is not set +# CONFIG_PCCARD is not set + +# +# Generic Driver Options +# +CONFIG_AUXILIARY_BUS=y +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_DEVTMPFS_SAFE is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_FW_LOADER_COMPRESS is not set +CONFIG_FW_CACHE=y +# CONFIG_FW_UPLOAD is not set +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_SPMI=m +CONFIG_REGMAP_W1=m +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_SCCB=m +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_ARCH_NUMA=y +# end of Generic Driver Options + +# +# Bus devices +# +CONFIG_ARM_CCI=y +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_MOXTET is not set +CONFIG_SUN50I_DE2_BUS=y +CONFIG_SUNXI_RSB=y +# CONFIG_VEXPRESS_CONFIG is not set +CONFIG_MHI_BUS=m +# CONFIG_MHI_BUS_DEBUG is not set +CONFIG_MHI_BUS_EP=m +# end of Bus devices + +CONFIG_CONNECTOR=m + +# +# Firmware Drivers +# + +# +# ARM System Control and Management Interface Protocol +# +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_HAVE_TRANSPORT=y +CONFIG_ARM_SCMI_HAVE_SHMEM=y +CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y +CONFIG_ARM_SCMI_TRANSPORT_SMC=y +# CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set +# CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCMI_POWER_CONTROL=m +# end of ARM System Control and Management Interface Protocol + +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +CONFIG_ARM_FFA_TRANSPORT=y +CONFIG_ARM_FFA_SMCCC=y +CONFIG_CS_DSP=m +# CONFIG_GOOGLE_FIRMWARE is not set +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +CONFIG_ARM_SMCCC_SOC_ID=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_GNSS=m +CONFIG_GNSS_SERIAL=m +CONFIG_GNSS_MTK_SERIAL=m +CONFIG_GNSS_SIRF_SERIAL=m +CONFIG_GNSS_UBX_SERIAL=m +CONFIG_GNSS_USB=m +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y + +# +# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK. +# +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +CONFIG_MTD_PSTORE=m +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_INTELEXT is not set +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +CONFIG_MTD_MCHP48L640=m +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# +# NAND +# +CONFIG_MTD_NAND_CORE=y +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_RAW_NAND=m + +# +# Raw/parallel NAND flash controllers +# +CONFIG_MTD_NAND_DENALI=m +CONFIG_MTD_NAND_DENALI_DT=m +CONFIG_MTD_NAND_BRCMNAND=m +CONFIG_MTD_NAND_BRCMNAND_BCM63XX=m +CONFIG_MTD_NAND_BRCMNAND_BCMBCA=m +CONFIG_MTD_NAND_BRCMNAND_BRCMSTB=m +CONFIG_MTD_NAND_BRCMNAND_IPROC=m +CONFIG_MTD_NAND_SUNXI=m +CONFIG_MTD_NAND_MXIC=m +CONFIG_MTD_NAND_GPIO=m +CONFIG_MTD_NAND_PLATFORM=m +CONFIG_MTD_NAND_CADENCE=m +# CONFIG_MTD_NAND_ARASAN is not set +CONFIG_MTD_NAND_INTEL_LGM=m + +# +# Misc +# +CONFIG_MTD_NAND_NANDSIM=m +CONFIG_MTD_NAND_DISKONCHIP=m +# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 +# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set +CONFIG_MTD_SPI_NAND=m + +# +# ECC engine support +# +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +# CONFIG_MTD_NAND_ECC_SW_BCH is not set +CONFIG_MTD_NAND_ECC_MXIC=y +# end of ECC engine support +# end of NAND + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_MTD_SPI_NOR_SWP_DISABLE is not set +CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y +# CONFIG_MTD_SPI_NOR_SWP_KEEP is not set +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OF_RESOLVE=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_NUMA=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +CONFIG_CDROM=m +CONFIG_ZRAM=m +CONFIG_ZRAM_DEF_COMP_LZORLE=y +# CONFIG_ZRAM_DEF_COMP_ZSTD is not set +# CONFIG_ZRAM_DEF_COMP_LZ4 is not set +# CONFIG_ZRAM_DEF_COMP_LZO is not set +# CONFIG_ZRAM_DEF_COMP_LZ4HC is not set +# CONFIG_ZRAM_DEF_COMP_842 is not set +CONFIG_ZRAM_DEF_COMP="lzo-rle" +CONFIG_ZRAM_WRITEBACK=y +# CONFIG_ZRAM_MEMORY_TRACKING is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +CONFIG_BLK_DEV_DRBD=m +# CONFIG_DRBD_FAULT_INJECTION is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=m +CONFIG_BLK_DEV_RAM_COUNT=8 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_CDROM_PKTCDVD is not set +CONFIG_ATA_OVER_ETH=m +# CONFIG_VIRTIO_BLK is not set +CONFIG_BLK_DEV_RBD=m +CONFIG_BLK_DEV_UBLK=m + +# +# NVME Support +# +CONFIG_NVME_CORE=m +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_VERBOSE_ERRORS is not set +# CONFIG_NVME_HWMON is not set +CONFIG_NVME_FABRICS=m +# CONFIG_NVME_FC is not set +CONFIG_NVME_TCP=m +# CONFIG_NVME_AUTH is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HI6421V600_IRQ=m +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_HISI_HIKEY_USB is not set +CONFIG_OPEN_DICE=m +CONFIG_VCPU_STALL_DETECTOR=m +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +CONFIG_EEPROM_LEGACY=m +# CONFIG_EEPROM_MAX6875 is not set +CONFIG_EEPROM_93CX6=m +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +CONFIG_EEPROM_EE1004=m +# end of EEPROM support + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_RTSX_USB is not set +CONFIG_UACCE=m +# CONFIG_PVPANIC is not set +CONFIG_SUNXI_ADDR_MGT=m +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI_COMMON=y +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +CONFIG_BLK_DEV_SR=m +CONFIG_CHR_DEV_SG=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=m +CONFIG_SCSI_SAS_ATTRS=m +# CONFIG_SCSI_SAS_LIBSAS is not set +CONFIG_SCSI_SRP_ATTRS=m +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=m +CONFIG_ISCSI_BOOT_SYSFS=m +# CONFIG_SCSI_HISI_SAS is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_ATA=m +CONFIG_SATA_HOST=y +# CONFIG_ATA_VERBOSE_ERROR is not set +CONFIG_ATA_FORCE=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +# CONFIG_SATA_AHCI_PLATFORM is not set +CONFIG_AHCI_DWC=m +# CONFIG_AHCI_CEVA is not set +# CONFIG_AHCI_SUNXI is not set +# CONFIG_AHCI_QORIQ is not set +# CONFIG_ATA_SFF is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_AUTODETECT=y +CONFIG_MD_LINEAR=y +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +CONFIG_MD_RAID10=y +CONFIG_MD_RAID456=y +CONFIG_MD_MULTIPATH=y +CONFIG_MD_FAULTY=y +CONFIG_MD_CLUSTER=m +CONFIG_BCACHE=y +# CONFIG_BCACHE_DEBUG is not set +# CONFIG_BCACHE_CLOSURES_DEBUG is not set +# CONFIG_BCACHE_ASYNC_REGISTRATION is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=m +# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set +CONFIG_DM_BIO_PRISON=m +CONFIG_DM_PERSISTENT_DATA=m +CONFIG_DM_UNSTRIPED=m +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_THIN_PROVISIONING=m +CONFIG_DM_CACHE=m +CONFIG_DM_CACHE_SMQ=m +CONFIG_DM_WRITECACHE=m +# CONFIG_DM_EBS is not set +CONFIG_DM_ERA=m +CONFIG_DM_CLONE=m +CONFIG_DM_MIRROR=m +CONFIG_DM_LOG_USERSPACE=m +CONFIG_DM_RAID=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +# CONFIG_DM_MULTIPATH_QL is not set +# CONFIG_DM_MULTIPATH_ST is not set +# CONFIG_DM_MULTIPATH_HST is not set +CONFIG_DM_MULTIPATH_IOA=m +CONFIG_DM_DELAY=m +CONFIG_DM_DUST=m +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +CONFIG_DM_INTEGRITY=m +# CONFIG_DM_ZONED is not set +CONFIG_DM_AUDIT=y +CONFIG_TARGET_CORE=m +CONFIG_TCM_IBLOCK=m +CONFIG_TCM_FILEIO=m +CONFIG_TCM_PSCSI=m +CONFIG_LOOPBACK_TARGET=m +CONFIG_ISCSI_TARGET=m +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +CONFIG_BONDING=m +CONFIG_DUMMY=m +CONFIG_WIREGUARD=m +# CONFIG_WIREGUARD_DEBUG is not set +CONFIG_EQUALIZER=m +CONFIG_IFB=m +CONFIG_NET_TEAM=m +CONFIG_NET_TEAM_MODE_BROADCAST=m +CONFIG_NET_TEAM_MODE_ROUNDROBIN=m +CONFIG_NET_TEAM_MODE_RANDOM=m +CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m +CONFIG_NET_TEAM_MODE_LOADBALANCE=m +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +CONFIG_IPVLAN_L3S=y +CONFIG_IPVLAN=m +CONFIG_IPVTAP=m +CONFIG_VXLAN=m +CONFIG_GENEVE=m +CONFIG_BAREUDP=m +CONFIG_GTP=m +CONFIG_AMT=m +CONFIG_MACSEC=m +CONFIG_NETCONSOLE=m +# CONFIG_NETCONSOLE_DYNAMIC is not set +CONFIG_NETPOLL=y +CONFIG_NET_POLL_CONTROLLER=y +CONFIG_TUN=m +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=m +CONFIG_NLMON=m +# CONFIG_NET_VRF is not set +CONFIG_MHI_NET=m + +# +# Distributed Switch Architecture drivers +# +# CONFIG_B53 is not set +# CONFIG_NET_DSA_BCM_SF2 is not set +# CONFIG_NET_DSA_LOOP is not set +CONFIG_NET_DSA_HIRSCHMANN_HELLCREEK=m +CONFIG_NET_DSA_LANTIQ_GSWIP=m +# CONFIG_NET_DSA_MT7530 is not set +# CONFIG_NET_DSA_MV88E6060 is not set +CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON=m +CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C=m +CONFIG_NET_DSA_MICROCHIP_KSZ_SPI=m +CONFIG_NET_DSA_MICROCHIP_KSZ8863_SMI=m +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MSCC_SEVILLE is not set +CONFIG_NET_DSA_AR9331=m +# CONFIG_NET_DSA_QCA8K is not set +CONFIG_NET_DSA_SJA1105=m +# CONFIG_NET_DSA_SJA1105_PTP is not set +CONFIG_NET_DSA_XRS700X=m +CONFIG_NET_DSA_XRS700X_I2C=m +CONFIG_NET_DSA_XRS700X_MDIO=m +CONFIG_NET_DSA_REALTEK=m +CONFIG_NET_DSA_REALTEK_MDIO=m +CONFIG_NET_DSA_REALTEK_SMI=m +CONFIG_NET_DSA_REALTEK_RTL8365MB=m +CONFIG_NET_DSA_REALTEK_RTL8366RB=m +# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set +# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +CONFIG_MDIO=m +CONFIG_NET_VENDOR_ALACRITECH=y +CONFIG_NET_VENDOR_ALLWINNER=y +CONFIG_SUN4I_EMAC=y +CONFIG_SUNXI_GMAC=y +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +CONFIG_NET_VENDOR_AMD=y +CONFIG_AMD_XGBE=m +# CONFIG_AMD_XGBE_DCB is not set +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_NET_VENDOR_ARC is not set +CONFIG_NET_VENDOR_ASIX=y +CONFIG_SPI_AX88796C=m +# CONFIG_SPI_AX88796C_COMPRESSION is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +CONFIG_NET_VENDOR_CAVIUM=y +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +CONFIG_NET_VENDOR_DAVICOM=y +CONFIG_DM9051=m +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_ENGLEDER=y +CONFIG_TSNEP=m +# CONFIG_TSNEP_SELFTESTS is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_FUNGIBLE=y +CONFIG_NET_VENDOR_GOOGLE=y +CONFIG_NET_VENDOR_HISILICON=y +# CONFIG_HIX5HD2_GMAC is not set +# CONFIG_HISI_FEMAC is not set +CONFIG_HIP04_ETH=m +# CONFIG_HI13X1_GMAC is not set +CONFIG_HNS_MDIO=m +# CONFIG_HNS_DSAF is not set +# CONFIG_HNS_ENET is not set +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_NET_VENDOR_INTEL is not set +CONFIG_NET_VENDOR_WANGXUN=y +CONFIG_NET_VENDOR_ADI=y +CONFIG_ADIN1110=m +CONFIG_NET_VENDOR_LITEX=y +# CONFIG_LITEX_LITEETH is not set +# CONFIG_NET_VENDOR_MARVELL is not set +CONFIG_NET_VENDOR_MELLANOX=y +# CONFIG_MLXSW_CORE is not set +# CONFIG_MLXFW is not set +# CONFIG_NET_VENDOR_MICREL is not set +CONFIG_NET_VENDOR_MICROCHIP=y +CONFIG_ENC28J60=m +CONFIG_ENC28J60_WRITEVERIFY=y +# CONFIG_ENCX24J600 is not set +CONFIG_LAN966X_SWITCH=m +CONFIG_NET_VENDOR_MICROSEMI=y +# CONFIG_MSCC_OCELOT_SWITCH is not set +CONFIG_NET_VENDOR_MICROSOFT=y +CONFIG_NET_VENDOR_NI=y +CONFIG_NI_XGE_MANAGEMENT_ENET=m +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PENSANDO=y +CONFIG_NET_VENDOR_QUALCOMM=y +CONFIG_QCA7000=m +# CONFIG_QCA7000_SPI is not set +CONFIG_QCA7000_UART=m +# CONFIG_QCOM_EMAC is not set +# CONFIG_RMNET is not set +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_ROCKER=y +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=y +CONFIG_DWMAC_DWC_QOS_ETH=m +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_SUNXI=m +CONFIG_DWMAC_SUN8I=m +# CONFIG_DWMAC_INTEL_PLAT is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +CONFIG_NET_VENDOR_VERTEXCOM=y +CONFIG_MSE102X=m +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_NET_VENDOR_XILINX=y +CONFIG_XILINX_EMACLITE=m +CONFIG_XILINX_AXI_EMAC=m +CONFIG_XILINX_LL_TEMAC=m +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +CONFIG_LED_TRIGGER_PHY=y +CONFIG_FIXED_PHY=y +# CONFIG_SFP is not set + +# +# MII PHY device drivers +# +CONFIG_AMD_PHY=m +CONFIG_ADIN_PHY=m +CONFIG_ADIN1100_PHY=m +CONFIG_AQUANTIA_PHY=m +CONFIG_AX88796B_PHY=m +CONFIG_BROADCOM_PHY=m +# CONFIG_BCM54140_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM84881_PHY is not set +CONFIG_BCM87XX_PHY=m +CONFIG_BCM_NET_PHYLIB=m +CONFIG_BCM_NET_PHYPTP=m +CONFIG_CICADA_PHY=m +# CONFIG_CORTINA_PHY is not set +CONFIG_DAVICOM_PHY=m +CONFIG_ICPLUS_PHY=m +CONFIG_LXT_PHY=m +# CONFIG_INTEL_XWAY_PHY is not set +CONFIG_LSI_ET1011C_PHY=m +CONFIG_MARVELL_PHY=m +# CONFIG_MARVELL_10G_PHY is not set +CONFIG_MARVELL_88X2222_PHY=m +CONFIG_MAXLINEAR_GPHY=m +CONFIG_MEDIATEK_GE_PHY=m +CONFIG_MICREL_PHY=m +CONFIG_MICROCHIP_PHY=m +CONFIG_MICROCHIP_T1_PHY=m +# CONFIG_MICROSEMI_PHY is not set +CONFIG_MOTORCOMM_PHY=m +CONFIG_NATIONAL_PHY=m +CONFIG_NXP_C45_TJA11XX_PHY=m +# CONFIG_NXP_TJA11XX_PHY is not set +CONFIG_AT803X_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_REALTEK_PHY=m +# CONFIG_RENESAS_PHY is not set +# CONFIG_ROCKCHIP_PHY is not set +CONFIG_SMSC_PHY=m +CONFIG_STE10XP=m +CONFIG_TERANETICS_PHY=m +# CONFIG_DP83822_PHY is not set +CONFIG_DP83TC811_PHY=m +CONFIG_DP83848_PHY=m +# CONFIG_DP83867_PHY is not set +CONFIG_DP83869_PHY=m +CONFIG_DP83TD510_PHY=m +CONFIG_VITESSE_PHY=m +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PSE_CONTROLLER is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_VCAN=m +CONFIG_CAN_VXCAN=m +CONFIG_CAN_NETLINK=y +CONFIG_CAN_CALC_BITTIMING=y +CONFIG_CAN_RX_OFFLOAD=y +CONFIG_CAN_CAN327=m +# CONFIG_CAN_FLEXCAN is not set +# CONFIG_CAN_GRCAN is not set +CONFIG_CAN_SLCAN=m +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +CONFIG_CAN_CTUCANFD=m +CONFIG_CAN_CTUCANFD_PLATFORM=m +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +CONFIG_CAN_HI311X=m +CONFIG_CAN_MCP251X=m +CONFIG_CAN_MCP251XFD=m +# CONFIG_CAN_MCP251XFD_SANITY is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +CONFIG_CAN_8DEV_USB=m +CONFIG_CAN_EMS_USB=m +CONFIG_CAN_ESD_USB=m +CONFIG_CAN_ETAS_ES58X=m +CONFIG_CAN_GS_USB=m +CONFIG_CAN_KVASER_USB=m +CONFIG_CAN_MCBA_USB=m +CONFIG_CAN_PEAK_USB=m +CONFIG_CAN_UCAN=m +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set + +# +# MCTP Device Drivers +# +CONFIG_MCTP_SERIAL=m +CONFIG_MCTP_TRANSPORT_I2C=m +# end of MCTP Device Drivers + +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +CONFIG_FWNODE_MDIO=y +CONFIG_OF_MDIO=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_SUN4I=y +CONFIG_MDIO_BITBANG=y +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_GPIO is not set +# CONFIG_MDIO_HISI_FEMAC is not set +CONFIG_MDIO_MVUSB=m +CONFIG_MDIO_MSCC_MIIM=m +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_IPQ4019 is not set +CONFIG_MDIO_IPQ8064=m + +# +# MDIO Multiplexers +# +CONFIG_MDIO_BUS_MUX=m +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set + +# +# PCS device drivers +# +CONFIG_PCS_XPCS=y +# end of PCS device drivers + +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOE=m +CONFIG_PPTP=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +# CONFIG_SLIP is not set +CONFIG_SLHC=m +CONFIG_USB_NET_DRIVERS=m +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_CDC_NCM=m +CONFIG_USB_NET_HUAWEI_CDC_NCM=m +CONFIG_USB_NET_CDC_MBIM=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_SR9700=m +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +CONFIG_USB_NET_ZAURUS=m +CONFIG_USB_NET_CX82310_ETH=m +CONFIG_USB_NET_KALMIA=m +CONFIG_USB_NET_QMI_WWAN=m +CONFIG_USB_HSO=m +CONFIG_USB_NET_INT51X1=m +CONFIG_USB_IPHETH=m +CONFIG_USB_SIERRA_NET=m +CONFIG_USB_VL600=m +CONFIG_USB_NET_CH9200=m +# CONFIG_USB_NET_AQC111 is not set +CONFIG_USB_RTL8153_ECM=m +CONFIG_WLAN=y +CONFIG_WLAN_VENDOR_ADMTEK=y +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m +CONFIG_ATH9K_BTCOEX_SUPPORT=y +CONFIG_ATH9K=m +# CONFIG_ATH9K_AHB is not set +# CONFIG_ATH9K_DEBUGFS is not set +# CONFIG_ATH9K_DYNACK is not set +# CONFIG_ATH9K_WOW is not set +CONFIG_ATH9K_RFKILL=y +# CONFIG_ATH9K_CHANNEL_CONTEXT is not set +CONFIG_ATH9K_PCOEM=y +CONFIG_ATH9K_HTC=m +# CONFIG_ATH9K_HTC_DEBUGFS is not set +CONFIG_ATH9K_HWRNG=y +CONFIG_CARL9170=m +CONFIG_CARL9170_LEDS=y +CONFIG_CARL9170_WPC=y +CONFIG_CARL9170_HWRNG=y +# CONFIG_ATH6KL is not set +CONFIG_AR5523=m +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +# CONFIG_ATH10K_SDIO is not set +CONFIG_ATH10K_USB=m +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_ATH10K_DEBUGFS is not set +# CONFIG_WCN36XX is not set +# CONFIG_ATH11K is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +CONFIG_B43=m +CONFIG_B43_BCMA=y +CONFIG_B43_SSB=y +CONFIG_B43_BUSES_BCMA_AND_SSB=y +# CONFIG_B43_BUSES_BCMA is not set +# CONFIG_B43_BUSES_SSB is not set +CONFIG_B43_SDIO=y +CONFIG_B43_BCMA_PIO=y +CONFIG_B43_PIO=y +CONFIG_B43_PHY_G=y +CONFIG_B43_PHY_N=y +CONFIG_B43_PHY_LP=y +CONFIG_B43_PHY_HT=y +CONFIG_B43_LEDS=y +CONFIG_B43_HWRNG=y +# CONFIG_B43_DEBUG is not set +CONFIG_B43LEGACY=m +CONFIG_B43LEGACY_LEDS=y +CONFIG_B43LEGACY_HWRNG=y +CONFIG_B43LEGACY_DEBUG=y +CONFIG_B43LEGACY_DMA=y +CONFIG_B43LEGACY_PIO=y +CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y +# CONFIG_B43LEGACY_DMA_MODE is not set +# CONFIG_B43LEGACY_PIO_MODE is not set +CONFIG_BRCMUTIL=m +CONFIG_BRCMSMAC=m +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +# CONFIG_WLAN_VENDOR_CISCO is not set +# CONFIG_WLAN_VENDOR_INTEL is not set +# CONFIG_WLAN_VENDOR_INTERSIL is not set +# CONFIG_WLAN_VENDOR_MARVELL is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +CONFIG_MT7601U=m +CONFIG_MT76_CORE=m +CONFIG_MT76_LEDS=y +CONFIG_MT76_USB=m +CONFIG_MT76_SDIO=m +CONFIG_MT76x02_LIB=m +CONFIG_MT76x02_USB=m +CONFIG_MT76_CONNAC_LIB=m +CONFIG_MT76x0_COMMON=m +CONFIG_MT76x0U=m +CONFIG_MT76x2_COMMON=m +CONFIG_MT76x2U=m +CONFIG_MT7615_COMMON=m +CONFIG_MT7663_USB_SDIO_COMMON=m +CONFIG_MT7663U=m +# CONFIG_MT7663S is not set +CONFIG_MT7921_COMMON=m +CONFIG_MT7921S=m +CONFIG_MT7921U=m +CONFIG_WLAN_VENDOR_MICROCHIP=y +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_PURELIFI=y +CONFIG_PLFXLC=m +CONFIG_WLAN_VENDOR_RALINK=y +CONFIG_RT2X00=m +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT33XX=y +CONFIG_RT2800USB_RT35XX=y +CONFIG_RT2800USB_RT3573=y +CONFIG_RT2800USB_RT53XX=y +CONFIG_RT2800USB_RT55XX=y +# CONFIG_RT2800USB_UNKNOWN is not set +CONFIG_RT2800_LIB=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_DEBUG is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8187 is not set +# CONFIG_RTL8187_LEDS is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CU is not set +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_USB=m +# CONFIG_RTLWIFI_DEBUG is not set +# CONFIG_RTL8192C_COMMON is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTL8XXXU_UNTESTED is not set +CONFIG_RTW88=m +# CONFIG_RTW89 is not set +# CONFIG_WLAN_VENDOR_RSI is not set +CONFIG_WLAN_VENDOR_SILABS=y +CONFIG_WFX=m +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_RTL8723DU is not set +# CONFIG_RTL8723DS is not set +# CONFIG_RTL8822CS is not set +# CONFIG_RTL8822BU is not set +# CONFIG_RTL8821CU is not set +# CONFIG_88XXAU is not set +# CONFIG_RTL8192EU is not set +# CONFIG_RTL8189FS is not set +# CONFIG_RTL8189ES is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +CONFIG_SPARD_WLAN_SUPPORT=y + +# +# UNISOC WCN Device Drivers(for new chip...) +# +# CONFIG_SC23XX is not set +# CONFIG_WCN_BSP_DRIVER_BUILDIN is not set +# CONFIG_RK_WIFI_DEVICE_UWE5621 is not set +# CONFIG_RK_WIFI_DEVICE_UWE5622 is not set +CONFIG_AW_WIFI_DEVICE_UWE5622=y +CONFIG_AW_BIND_VERIFY=y +# end of UNISOC WCN Device Drivers(for new chip...) + +# CONFIG_WLAN_UWE5621 is not set +CONFIG_WLAN_UWE5622=m +CONFIG_SPRDWL_NG=m +CONFIG_UNISOC_WIFI_PS=y +CONFIG_TTY_OVERY_SDIO=m +# CONFIG_MAC80211_HWSIM is not set +CONFIG_USB_NET_RNDIS_WLAN=m +CONFIG_VIRT_WIFI=m +# CONFIG_WAN is not set +CONFIG_IEEE802154_DRIVERS=m + +# +# Wireless WAN +# +CONFIG_WWAN=m +CONFIG_WWAN_DEBUGFS=y +CONFIG_WWAN_HWSIM=m +CONFIG_MHI_WWAN_CTRL=m +CONFIG_MHI_WWAN_MBIM=m +# end of Wireless WAN + +CONFIG_NETDEVSIM=m +CONFIG_NET_FAILOVER=m +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=m +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=m +CONFIG_INPUT_VIVALDIFMAP=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +CONFIG_KEYBOARD_QT1050=m +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +CONFIG_KEYBOARD_PINEPHONE=m +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +CONFIG_KEYBOARD_SUN4I_LRADC=y +CONFIG_KEYBOARD_IQS62X=m +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_KEYBOARD_CYPRESS_SF=m +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADC is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_USB=m +# CONFIG_JOYSTICK_IFORCE_232 is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_AS5011 is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +CONFIG_JOYSTICK_XPAD=m +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +# CONFIG_JOYSTICK_PSXPAD_SPI is not set +# CONFIG_JOYSTICK_PXRC is not set +CONFIG_JOYSTICK_QWIIC=m +# CONFIG_JOYSTICK_FSIA6B is not set +CONFIG_JOYSTICK_SENSEHAT=m +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_TOUCHSCREEN_AD7877=m +CONFIG_TOUCHSCREEN_AD7879=m +CONFIG_TOUCHSCREEN_AD7879_I2C=m +CONFIG_TOUCHSCREEN_AD7879_SPI=m +CONFIG_TOUCHSCREEN_ADC=m +CONFIG_TOUCHSCREEN_AR1021_I2C=m +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +CONFIG_TOUCHSCREEN_BU21029=m +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +CONFIG_TOUCHSCREEN_EXC3000=m +# CONFIG_TOUCHSCREEN_FUJITSU is not set +CONFIG_TOUCHSCREEN_GOODIX=m +CONFIG_TOUCHSCREEN_HIDEEP=m +CONFIG_TOUCHSCREEN_HYCON_HY46XX=m +CONFIG_TOUCHSCREEN_ILI210X=m +CONFIG_TOUCHSCREEN_ILITEK=m +CONFIG_TOUCHSCREEN_S6SY761=m +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +CONFIG_TOUCHSCREEN_MAX11801=m +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +CONFIG_TOUCHSCREEN_MSG2638=m +# CONFIG_TOUCHSCREEN_MTOUCH is not set +CONFIG_TOUCHSCREEN_IMAGIS=m +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_JASTEC=y +CONFIG_TOUCHSCREEN_USB_ELO=y +CONFIG_TOUCHSCREEN_USB_E2I=y +CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y +CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y +CONFIG_TOUCHSCREEN_USB_NEXIO=y +CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +CONFIG_TOUCHSCREEN_SILEAD=m +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUN4I is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +CONFIG_TOUCHSCREEN_COLIBRI_VF50=m +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +CONFIG_TOUCHSCREEN_IQS5XX=m +# CONFIG_TOUCHSCREEN_ZINITIX is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +CONFIG_INPUT_ATC260X_ONKEY=m +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +CONFIG_INPUT_MAX77650_ONKEY=m +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +CONFIG_INPUT_GPIO_DECODER=m +CONFIG_INPUT_GPIO_VIBRA=m +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +CONFIG_INPUT_AXP20X_PEK=y +CONFIG_INPUT_UINPUT=m +CONFIG_INPUT_PCF8574=m +# CONFIG_INPUT_PWM_BEEPER is not set +CONFIG_INPUT_PWM_VIBRA=m +CONFIG_INPUT_GPIO_ROTARY_ENCODER=m +CONFIG_INPUT_DA7280_HAPTICS=m +# CONFIG_INPUT_ADXL34X is not set +CONFIG_INPUT_IBM_PANEL=m +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set +CONFIG_INPUT_IQS626A=m +CONFIG_INPUT_IQS7222=m +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +CONFIG_INPUT_RAVE_SP_PWRBUTTON=m +CONFIG_INPUT_RT5120_PWRKEY=m +CONFIG_RMI4_CORE=m +CONFIG_RMI4_I2C=m +CONFIG_RMI4_SPI=m +CONFIG_RMI4_SMB=m +CONFIG_RMI4_F03=y +CONFIG_RMI4_F03_SERIO=m +CONFIG_RMI4_2D_SENSOR=y +CONFIG_RMI4_F11=y +CONFIG_RMI4_F12=y +CONFIG_RMI4_F30=y +# CONFIG_RMI4_F34 is not set +# CONFIG_RMI4_F3A is not set +# CONFIG_RMI4_F54 is not set +# CONFIG_RMI4_F55 is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=m +CONFIG_SERIO_AMBAKMI=y +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_SUN4I_PS2 is not set +CONFIG_SERIO_GPIO_PS2=m +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +CONFIG_LDISC_AUTOLOAD=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +# CONFIG_SERIAL_8250_16550A_VARIANTS is not set +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_NR_UARTS=6 +CONFIG_SERIAL_8250_RUNTIME_UARTS=6 +# CONFIG_SERIAL_8250_EXTENDED is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_SIFIVE=m +# CONFIG_SERIAL_SCCNXP is not set +CONFIG_SERIAL_SC16IS7XX_CORE=m +CONFIG_SERIAL_SC16IS7XX=m +CONFIG_SERIAL_SC16IS7XX_I2C=y +# CONFIG_SERIAL_SC16IS7XX_SPI is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_FSL_LPUART is not set +CONFIG_SERIAL_FSL_LINFLEXUART=m +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +CONFIG_SERIAL_SPRD=m +CONFIG_SERIAL_LITEUART=m +CONFIG_SERIAL_LITEUART_MAX_PORTS=1 +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_N_GSM is not set +CONFIG_NULL_TTY=m +CONFIG_HVC_DRIVER=y +# CONFIG_HVC_DCC is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_VIRTIO_CONSOLE=y +# CONFIG_IPMI_HANDLER is not set +# CONFIG_IPMB_DEVICE_INTERFACE is not set +CONFIG_SUNXI_SYS_INFO=y +CONFIG_DUMP_REG=y +CONFIG_DUMP_REG_MISC=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_TIMERIOMEM=m +CONFIG_HW_RANDOM_BA431=m +CONFIG_HW_RANDOM_VIRTIO=m +CONFIG_HW_RANDOM_CCTRNG=m +CONFIG_HW_RANDOM_XIPHERA=m +CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=y +CONFIG_DEVMEM=y +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +CONFIG_TCG_TIS_CORE=m +CONFIG_TCG_TIS=m +CONFIG_TCG_TIS_SPI=m +# CONFIG_TCG_TIS_SPI_CR50 is not set +CONFIG_TCG_TIS_I2C=m +CONFIG_TCG_TIS_I2C_CR50=m +CONFIG_TCG_TIS_I2C_ATMEL=m +CONFIG_TCG_TIS_I2C_INFINEON=m +CONFIG_TCG_TIS_I2C_NUVOTON=m +CONFIG_TCG_VTPM_PROXY=m +CONFIG_TCG_TIS_ST33ZP24=m +CONFIG_TCG_TIS_ST33ZP24_I2C=m +CONFIG_TCG_TIS_ST33ZP24_SPI=m +CONFIG_XILLYBUS_CLASS=m +# CONFIG_XILLYBUS is not set +CONFIG_XILLYUSB=m +# CONFIG_RANDOM_TRUST_CPU is not set +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set +# end of Character devices + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +CONFIG_I2C_ARB_GPIO_CHALLENGE=m +CONFIG_I2C_MUX_GPIO=m +CONFIG_I2C_MUX_GPMUX=m +CONFIG_I2C_MUX_LTC4306=m +CONFIG_I2C_MUX_PCA9541=m +CONFIG_I2C_MUX_PCA954x=m +CONFIG_I2C_MUX_PINCTRL=m +CONFIG_I2C_MUX_REG=m +CONFIG_I2C_DEMUX_PINCTRL=m +CONFIG_I2C_MUX_MLXCPLD=m +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_SMBUS=m +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_ALGOPCA=m + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_CADENCE=m +CONFIG_I2C_CBUS_GPIO=m +CONFIG_I2C_DESIGNWARE_CORE=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_I2C_EMEV2=m +CONFIG_I2C_GPIO=m +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +CONFIG_I2C_MV64XXX=y +CONFIG_I2C_NOMADIK=m +CONFIG_I2C_OCORES=m +CONFIG_I2C_PCA_PLATFORM=m +CONFIG_I2C_RK3X=m +CONFIG_I2C_SIMTEC=m +CONFIG_I2C_XILINX=m + +# +# External I2C/SMBus adapter drivers +# +CONFIG_I2C_DIOLAN_U2C=m +CONFIG_I2C_CP2615=m +CONFIG_I2C_ROBOTFUZZ_OSIF=m +CONFIG_I2C_TAOS_EVM=m +CONFIG_I2C_TINY_USB=m + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_VIRTIO=m +# end of I2C Hardware Bus support + +CONFIG_I2C_STUB=m +CONFIG_I2C_SLAVE=y +CONFIG_I2C_SLAVE_EEPROM=m +# CONFIG_I2C_SLAVE_TESTUNIT is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +CONFIG_I3C=m +CONFIG_CDNS_I3C_MASTER=m +CONFIG_DW_I3C_MASTER=m +CONFIG_SVC_I3C_MASTER=m +CONFIG_MIPI_I3C_HCI=m +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ALTERA=m +CONFIG_SPI_ALTERA_CORE=m +CONFIG_SPI_AXI_SPI_ENGINE=m +CONFIG_SPI_BITBANG=m +CONFIG_SPI_CADENCE=m +# CONFIG_SPI_CADENCE_QUADSPI is not set +CONFIG_SPI_CADENCE_XSPI=m +CONFIG_SPI_DESIGNWARE=m +CONFIG_SPI_DW_DMA=y +CONFIG_SPI_DW_MMIO=m +CONFIG_SPI_NXP_FLEXSPI=m +CONFIG_SPI_GPIO=m +CONFIG_SPI_FSL_LIB=m +CONFIG_SPI_FSL_SPI=m +CONFIG_SPI_MICROCHIP_CORE=m +CONFIG_SPI_MICROCHIP_CORE_QSPI=m +CONFIG_SPI_OC_TINY=m +CONFIG_SPI_PL022=y +CONFIG_SPI_ROCKCHIP=m +CONFIG_SPI_SC18IS602=m +CONFIG_SPI_SIFIVE=m +CONFIG_SPI_SUN4I=y +CONFIG_SPI_SUN6I=y +CONFIG_SPI_MXIC=m +CONFIG_SPI_XCOMM=m +CONFIG_SPI_XILINX=m +CONFIG_SPI_ZYNQMP_GQSPI=m +CONFIG_SPI_AMD=m + +# +# SPI Multiplexer support +# +CONFIG_SPI_MUX=m + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +CONFIG_SPI_LOOPBACK_TEST=m +CONFIG_SPI_TLE62X0=m +CONFIG_SPI_SLAVE=y +CONFIG_SPI_SLAVE_TIME=m +CONFIG_SPI_SLAVE_SYSTEM_CONTROL=m +CONFIG_SPI_DYNAMIC=y +CONFIG_SPMI=y +# CONFIG_SPMI_HISI3670 is not set +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +CONFIG_PPS_CLIENT_LDISC=m +CONFIG_PPS_CLIENT_GPIO=m + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +# CONFIG_DP83640_PHY is not set +CONFIG_PTP_1588_CLOCK_INES=m +CONFIG_PTP_1588_CLOCK_KVM=m +CONFIG_PTP_1588_CLOCK_IDT82P33=m +CONFIG_PTP_1588_CLOCK_IDTCM=m +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +CONFIG_PINCTRL_AXP209=m +CONFIG_PINCTRL_CY8C95X0=m +# CONFIG_PINCTRL_MCP23S08 is not set +# CONFIG_PINCTRL_MICROCHIP_SGPIO is not set +# CONFIG_PINCTRL_OCELOT is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_PINCTRL_STMFX=m +# CONFIG_PINCTRL_SX150X is not set +CONFIG_PINCTRL_MADERA=m + +# +# Renesas pinctrl drivers +# +# end of Renesas pinctrl drivers + +CONFIG_PINCTRL_SUNXI=y +# CONFIG_PINCTRL_SUN4I_A10 is not set +# CONFIG_PINCTRL_SUN5I is not set +# CONFIG_PINCTRL_SUN6I_A31 is not set +# CONFIG_PINCTRL_SUN6I_A31_R is not set +# CONFIG_PINCTRL_SUN8I_A23 is not set +# CONFIG_PINCTRL_SUN8I_A33 is not set +# CONFIG_PINCTRL_SUN8I_A83T is not set +# CONFIG_PINCTRL_SUN8I_A83T_R is not set +# CONFIG_PINCTRL_SUN8I_A23_R is not set +# CONFIG_PINCTRL_SUN8I_H3 is not set +CONFIG_PINCTRL_SUN8I_H3_R=y +# CONFIG_PINCTRL_SUN8I_V3S is not set +# CONFIG_PINCTRL_SUN9I_A80 is not set +# CONFIG_PINCTRL_SUN9I_A80_R is not set +CONFIG_PINCTRL_SUN20I_D1=y +CONFIG_PINCTRL_SUN50I_A64=y +CONFIG_PINCTRL_SUN50I_A64_R=y +CONFIG_PINCTRL_SUN50I_A100=y +CONFIG_PINCTRL_SUN50I_A100_R=y +CONFIG_PINCTRL_SUN50I_H5=y +CONFIG_PINCTRL_SUN50I_H6=y +CONFIG_PINCTRL_SUN50I_H6_R=y +CONFIG_PINCTRL_SUN50I_H616=y +CONFIG_PINCTRL_SUN50I_H616_R=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_MAX730X=m + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +CONFIG_GPIO_CADENCE=m +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +CONFIG_GPIO_HLWD=m +CONFIG_GPIO_LOGICVC=m +# CONFIG_GPIO_MB86S7X is not set +# CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_SIFIVE is not set +CONFIG_GPIO_SYSCON=m +# CONFIG_GPIO_XGENE is not set +# CONFIG_GPIO_XILINX is not set +CONFIG_GPIO_AMD_FCH=m +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +CONFIG_GPIO_ADNP=m +CONFIG_GPIO_GW_PLD=m +CONFIG_GPIO_MAX7300=m +CONFIG_GPIO_MAX732X=m +CONFIG_GPIO_PCA953X=m +# CONFIG_GPIO_PCA953X_IRQ is not set +# CONFIG_GPIO_PCA9570 is not set +CONFIG_GPIO_PCF857X=m +CONFIG_GPIO_TPIC2810=m +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +CONFIG_GPIO_BD71815=m +CONFIG_GPIO_BD71828=m +CONFIG_GPIO_BD9571MWV=m +CONFIG_GPIO_MADERA=m +CONFIG_GPIO_MAX77650=m +# end of MFD GPIO expanders + +# +# SPI GPIO expanders +# +CONFIG_GPIO_74X164=m +CONFIG_GPIO_MAX3191X=m +CONFIG_GPIO_MAX7301=m +CONFIG_GPIO_MC33880=m +CONFIG_GPIO_PISOSR=m +CONFIG_GPIO_XRA1403=m +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# +# Virtual GPIO drivers +# +CONFIG_GPIO_AGGREGATOR=m +CONFIG_GPIO_MOCKUP=m +CONFIG_GPIO_VIRTIO=m +# CONFIG_GPIO_SIM is not set +# end of Virtual GPIO drivers + +CONFIG_W1=m +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_DS2482=m +CONFIG_W1_MASTER_DS1WM=m +CONFIG_W1_MASTER_GPIO=m +CONFIG_W1_MASTER_SGI=m +# end of 1-wire Bus Masters + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=m +CONFIG_W1_SLAVE_SMEM=m +CONFIG_W1_SLAVE_DS2405=m +CONFIG_W1_SLAVE_DS2408=m +CONFIG_W1_SLAVE_DS2408_READBACK=y +CONFIG_W1_SLAVE_DS2413=m +CONFIG_W1_SLAVE_DS2406=m +CONFIG_W1_SLAVE_DS2423=m +CONFIG_W1_SLAVE_DS2805=m +CONFIG_W1_SLAVE_DS2430=m +CONFIG_W1_SLAVE_DS2431=m +CONFIG_W1_SLAVE_DS2433=m +# CONFIG_W1_SLAVE_DS2433_CRC is not set +# CONFIG_W1_SLAVE_DS2438 is not set +CONFIG_W1_SLAVE_DS250X=m +CONFIG_W1_SLAVE_DS2780=m +CONFIG_W1_SLAVE_DS2781=m +CONFIG_W1_SLAVE_DS28E04=m +CONFIG_W1_SLAVE_DS28E17=m +# end of 1-wire Slaves + +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_ATC260X=m +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_REGULATOR is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +# CONFIG_SYSCON_REBOOT_MODE is not set +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +CONFIG_IP5XXX_POWER=m +# CONFIG_TEST_POWER is not set +CONFIG_CHARGER_ADP5061=m +CONFIG_BATTERY_CW2015=m +CONFIG_BATTERY_DS2760=m +CONFIG_BATTERY_DS2780=m +CONFIG_BATTERY_DS2781=m +CONFIG_BATTERY_DS2782=m +# CONFIG_BATTERY_SAMSUNG_SDI is not set +CONFIG_BATTERY_SBS=m +CONFIG_CHARGER_SBS=m +CONFIG_MANAGER_SBS=m +CONFIG_BATTERY_BQ27XXX=m +CONFIG_BATTERY_BQ27XXX_I2C=m +CONFIG_BATTERY_BQ27XXX_HDQ=m +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +CONFIG_CHARGER_AXP20X=m +CONFIG_BATTERY_AXP20X=m +CONFIG_AXP20X_POWER=m +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +CONFIG_BATTERY_MAX1721X=m +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +CONFIG_CHARGER_GPIO=m +# CONFIG_CHARGER_MANAGER is not set +CONFIG_CHARGER_LT3651=m +CONFIG_CHARGER_LTC4162L=m +CONFIG_CHARGER_DETECTOR_MAX14656=m +CONFIG_CHARGER_MAX77650=m +CONFIG_CHARGER_MAX77976=m +CONFIG_CHARGER_MT6370=m +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ2515X is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_BQ25980 is not set +CONFIG_CHARGER_BQ256XX=m +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +CONFIG_BATTERY_GOLDFISH=m +CONFIG_BATTERY_RT5033=m +# CONFIG_CHARGER_RT9455 is not set +CONFIG_CHARGER_UCS1002=m +# CONFIG_CHARGER_BD99954 is not set +CONFIG_BATTERY_UG3105=m +CONFIG_HWMON=y +CONFIG_HWMON_VID=m +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +CONFIG_SENSORS_AD7314=m +CONFIG_SENSORS_AD7414=m +CONFIG_SENSORS_AD7418=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1029=m +CONFIG_SENSORS_ADM1031=m +CONFIG_SENSORS_ADM1177=m +CONFIG_SENSORS_ADM9240=m +CONFIG_SENSORS_ADT7X10=m +CONFIG_SENSORS_ADT7310=m +CONFIG_SENSORS_ADT7410=m +CONFIG_SENSORS_ADT7411=m +CONFIG_SENSORS_ADT7462=m +CONFIG_SENSORS_ADT7470=m +CONFIG_SENSORS_ADT7475=m +CONFIG_SENSORS_AHT10=m +CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m +CONFIG_SENSORS_AS370=m +CONFIG_SENSORS_ASC7621=m +CONFIG_SENSORS_AXI_FAN_CONTROL=m +CONFIG_SENSORS_ARM_SCMI=m +CONFIG_SENSORS_ARM_SCPI=m +CONFIG_SENSORS_ATXP1=m +# CONFIG_SENSORS_CORSAIR_CPRO is not set +CONFIG_SENSORS_CORSAIR_PSU=m +CONFIG_SENSORS_DRIVETEMP=m +CONFIG_SENSORS_DS620=m +CONFIG_SENSORS_DS1621=m +CONFIG_SENSORS_F71805F=m +CONFIG_SENSORS_F71882FG=m +CONFIG_SENSORS_F75375S=m +CONFIG_SENSORS_FTSTEUTATES=m +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_GL520SM=m +CONFIG_SENSORS_G760A=m +CONFIG_SENSORS_G762=m +CONFIG_SENSORS_GPIO_FAN=m +CONFIG_SENSORS_HIH6130=m +CONFIG_SENSORS_IIO_HWMON=m +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_JC42=m +CONFIG_SENSORS_POWR1220=m +CONFIG_SENSORS_LINEAGE=m +CONFIG_SENSORS_LTC2945=m +CONFIG_SENSORS_LTC2947=m +CONFIG_SENSORS_LTC2947_I2C=m +# CONFIG_SENSORS_LTC2947_SPI is not set +CONFIG_SENSORS_LTC2990=m +CONFIG_SENSORS_LTC2992=m +CONFIG_SENSORS_LTC4151=m +CONFIG_SENSORS_LTC4215=m +CONFIG_SENSORS_LTC4222=m +CONFIG_SENSORS_LTC4245=m +CONFIG_SENSORS_LTC4260=m +CONFIG_SENSORS_LTC4261=m +CONFIG_SENSORS_MAX1111=m +CONFIG_SENSORS_MAX127=m +CONFIG_SENSORS_MAX16065=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_MAX1668=m +CONFIG_SENSORS_MAX197=m +CONFIG_SENSORS_MAX31722=m +CONFIG_SENSORS_MAX31730=m +CONFIG_SENSORS_MAX31760=m +CONFIG_SENSORS_MAX6620=m +CONFIG_SENSORS_MAX6621=m +CONFIG_SENSORS_MAX6639=m +CONFIG_SENSORS_MAX6650=m +CONFIG_SENSORS_MAX6697=m +CONFIG_SENSORS_MAX31790=m +CONFIG_SENSORS_MCP3021=m +CONFIG_SENSORS_TC654=m +CONFIG_SENSORS_TPS23861=m +# CONFIG_SENSORS_MR75203 is not set +CONFIG_SENSORS_ADCXX=m +CONFIG_SENSORS_LM63=m +CONFIG_SENSORS_LM70=m +CONFIG_SENSORS_LM73=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_LM92=m +CONFIG_SENSORS_LM93=m +CONFIG_SENSORS_LM95234=m +CONFIG_SENSORS_LM95241=m +CONFIG_SENSORS_LM95245=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_PC87427=m +CONFIG_SENSORS_NTC_THERMISTOR=m +CONFIG_SENSORS_NCT6683=m +CONFIG_SENSORS_NCT6775_CORE=m +CONFIG_SENSORS_NCT6775=m +CONFIG_SENSORS_NCT6775_I2C=m +CONFIG_SENSORS_NCT7802=m +CONFIG_SENSORS_NCT7904=m +CONFIG_SENSORS_NPCM7XX=m +CONFIG_SENSORS_NZXT_KRAKEN2=m +CONFIG_SENSORS_NZXT_SMART2=m +CONFIG_SENSORS_OCC_P8_I2C=m +CONFIG_SENSORS_OCC=m +CONFIG_SENSORS_PCF8591=m +CONFIG_SENSORS_PECI_CPUTEMP=m +CONFIG_SENSORS_PECI_DIMMTEMP=m +CONFIG_SENSORS_PECI=m +CONFIG_PMBUS=m +CONFIG_SENSORS_PMBUS=m +# CONFIG_SENSORS_ADM1266 is not set +CONFIG_SENSORS_ADM1275=m +CONFIG_SENSORS_BEL_PFE=m +CONFIG_SENSORS_BPA_RS600=m +CONFIG_SENSORS_DELTA_AHE50DC_FAN=m +CONFIG_SENSORS_FSP_3Y=m +CONFIG_SENSORS_IBM_CFFPS=m +CONFIG_SENSORS_DPS920AB=m +CONFIG_SENSORS_INSPUR_IPSPS=m +CONFIG_SENSORS_IR35221=m +CONFIG_SENSORS_IR36021=m +CONFIG_SENSORS_IR38064=m +# CONFIG_SENSORS_IR38064_REGULATOR is not set +# CONFIG_SENSORS_IRPS5401 is not set +CONFIG_SENSORS_ISL68137=m +CONFIG_SENSORS_LM25066=m +# CONFIG_SENSORS_LM25066_REGULATOR is not set +CONFIG_SENSORS_LT7182S=m +# CONFIG_SENSORS_LTC2978 is not set +CONFIG_SENSORS_LTC3815=m +CONFIG_SENSORS_MAX15301=m +CONFIG_SENSORS_MAX16064=m +CONFIG_SENSORS_MAX16601=m +CONFIG_SENSORS_MAX20730=m +CONFIG_SENSORS_MAX20751=m +CONFIG_SENSORS_MAX31785=m +CONFIG_SENSORS_MAX34440=m +CONFIG_SENSORS_MAX8688=m +CONFIG_SENSORS_MP2888=m +# CONFIG_SENSORS_MP2975 is not set +CONFIG_SENSORS_MP5023=m +CONFIG_SENSORS_PIM4328=m +# CONFIG_SENSORS_PLI1209BC is not set +CONFIG_SENSORS_PM6764TR=m +# CONFIG_SENSORS_PXE1610 is not set +CONFIG_SENSORS_Q54SJ108A2=m +CONFIG_SENSORS_STPDDC60=m +CONFIG_SENSORS_TPS40422=m +CONFIG_SENSORS_TPS53679=m +CONFIG_SENSORS_TPS546D24=m +CONFIG_SENSORS_UCD9000=m +CONFIG_SENSORS_UCD9200=m +CONFIG_SENSORS_XDPE152=m +CONFIG_SENSORS_XDPE122=m +# CONFIG_SENSORS_XDPE122_REGULATOR is not set +CONFIG_SENSORS_ZL6100=m +CONFIG_SENSORS_PWM_FAN=m +CONFIG_SENSORS_SBTSI=m +CONFIG_SENSORS_SBRMI=m +CONFIG_SENSORS_SHT15=m +CONFIG_SENSORS_SHT21=m +CONFIG_SENSORS_SHT3x=m +CONFIG_SENSORS_SHT4x=m +CONFIG_SENSORS_SHTC1=m +CONFIG_SENSORS_SY7636A=m +CONFIG_SENSORS_DME1737=m +CONFIG_SENSORS_EMC1403=m +CONFIG_SENSORS_EMC2103=m +CONFIG_SENSORS_EMC2305=m +CONFIG_SENSORS_EMC6W201=m +CONFIG_SENSORS_SMSC47M1=m +CONFIG_SENSORS_SMSC47M192=m +CONFIG_SENSORS_SMSC47B397=m +CONFIG_SENSORS_SCH56XX_COMMON=m +CONFIG_SENSORS_SCH5627=m +CONFIG_SENSORS_SCH5636=m +CONFIG_SENSORS_STTS751=m +CONFIG_SENSORS_SMM665=m +CONFIG_SENSORS_ADC128D818=m +CONFIG_SENSORS_ADS7828=m +CONFIG_SENSORS_ADS7871=m +CONFIG_SENSORS_AMC6821=m +CONFIG_SENSORS_INA209=m +CONFIG_SENSORS_INA2XX=m +CONFIG_SENSORS_INA238=m +CONFIG_SENSORS_INA3221=m +CONFIG_SENSORS_TC74=m +CONFIG_SENSORS_THMC50=m +CONFIG_SENSORS_TMP102=m +CONFIG_SENSORS_TMP103=m +CONFIG_SENSORS_TMP108=m +CONFIG_SENSORS_TMP401=m +CONFIG_SENSORS_TMP421=m +CONFIG_SENSORS_TMP464=m +CONFIG_SENSORS_TMP513=m +CONFIG_SENSORS_VT1211=m +CONFIG_SENSORS_W83773G=m +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83791D=m +CONFIG_SENSORS_W83792D=m +CONFIG_SENSORS_W83793=m +CONFIG_SENSORS_W83795=m +# CONFIG_SENSORS_W83795_FANCTRL is not set +CONFIG_SENSORS_W83L785TS=m +CONFIG_SENSORS_W83L786NG=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83627EHF=m +CONFIG_THERMAL=y +# CONFIG_THERMAL_NETLINK is not set +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +# CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set +CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE=y +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_GOV_BANG_BANG=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_FREQ_THERMAL=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_THERMAL_EMULATION=y +CONFIG_THERMAL_MMIO=m +CONFIG_SUN8I_THERMAL=y +CONFIG_GENERIC_ADC_THERMAL=m +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set +# CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=m +CONFIG_BD957XMUF_WATCHDOG=m +CONFIG_GPIO_WATCHDOG=m +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +CONFIG_RAVE_SP_WATCHDOG=m +CONFIG_ARM_SP805_WATCHDOG=m +CONFIG_ARM_SBSA_WATCHDOG=m +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +CONFIG_SUNXI_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +CONFIG_MAX77620_WATCHDOG=m +# CONFIG_ARM_SMC_WATCHDOG is not set +# CONFIG_MEN_A21_WDT is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +CONFIG_SSB=m +CONFIG_SSB_BLOCKIO=y +CONFIG_SSB_SDIOHOST_POSSIBLE=y +CONFIG_SSB_SDIOHOST=y +# CONFIG_SSB_DRIVER_GPIO is not set +CONFIG_BCMA_POSSIBLE=y +CONFIG_BCMA=m +CONFIG_BCMA_BLOCKIO=y +# CONFIG_BCMA_HOST_SOC is not set +# CONFIG_BCMA_DRIVER_GMAC_CMN is not set +# CONFIG_BCMA_DRIVER_GPIO is not set +# CONFIG_BCMA_DEBUG is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +CONFIG_MFD_SUN4I_GPADC=y +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +CONFIG_MFD_BD9571MWV=m +CONFIG_MFD_AC100=y +CONFIG_MFD_AC200=y +CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_AXP20X_RSB=y +CONFIG_MFD_MADERA=m +CONFIG_MFD_MADERA_I2C=m +# CONFIG_MFD_MADERA_SPI is not set +# CONFIG_MFD_CS47L15 is not set +# CONFIG_MFD_CS47L35 is not set +# CONFIG_MFD_CS47L85 is not set +# CONFIG_MFD_CS47L90 is not set +# CONFIG_MFD_CS47L92 is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_MFD_HI6421_SPMI is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +CONFIG_MFD_IQS62X=m +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +CONFIG_MFD_MAX77650=m +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +CONFIG_MFD_MAX77714=m +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set +CONFIG_MFD_MT6370=m +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +CONFIG_MFD_OCELOT=m +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +CONFIG_MFD_NTXEC=m +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +CONFIG_MFD_SY7636A=m +CONFIG_MFD_RT4831=m +# CONFIG_MFD_RT5033 is not set +CONFIG_MFD_RT5120=m +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK808 is not set +# CONFIG_MFD_RN5T618 is not set +CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +CONFIG_MFD_SIMPLE_MFD_I2C=m +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SUN6I_PRCM=y +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +CONFIG_MFD_WL1273_CORE=m +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +CONFIG_MFD_TQMX86=m +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_MFD_ROHM_BD718XX=m +CONFIG_MFD_ROHM_BD71828=m +CONFIG_MFD_ROHM_BD957XMUF=m +# CONFIG_MFD_STPMIC1 is not set +CONFIG_MFD_STMFX=m +CONFIG_MFD_ATC260X=m +CONFIG_MFD_ATC260X_I2C=m +CONFIG_MFD_QCOM_PM8008=m +CONFIG_RAVE_SP_CORE=m +# CONFIG_MFD_INTEL_M10_BMC is not set +CONFIG_MFD_RSMU_I2C=m +# CONFIG_MFD_RSMU_SPI is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +CONFIG_REGULATOR_88PG86X=m +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ARIZONA_LDO1 is not set +# CONFIG_REGULATOR_ARIZONA_MICSUPP is not set +CONFIG_REGULATOR_ARM_SCMI=m +CONFIG_REGULATOR_ATC260X=m +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_BD71815=m +CONFIG_REGULATOR_BD71828=m +CONFIG_REGULATOR_BD718XX=m +CONFIG_REGULATOR_BD9571MWV=m +CONFIG_REGULATOR_BD957XMUF=m +CONFIG_REGULATOR_DA9121=m +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +# CONFIG_REGULATOR_FAN53555 is not set +# CONFIG_REGULATOR_FAN53880 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_MAX77650=m +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +CONFIG_REGULATOR_MAX8893=m +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +CONFIG_REGULATOR_MAX20086=m +# CONFIG_REGULATOR_MAX77826 is not set +CONFIG_REGULATOR_MCP16502=m +CONFIG_REGULATOR_MP5416=m +CONFIG_REGULATOR_MP8859=m +CONFIG_REGULATOR_MP886X=m +CONFIG_REGULATOR_MPQ7920=m +# CONFIG_REGULATOR_MT6311 is not set +CONFIG_REGULATOR_MT6315=m +CONFIG_REGULATOR_MT6370=m +# CONFIG_REGULATOR_PCA9450 is not set +CONFIG_REGULATOR_PF8X00=m +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +# CONFIG_REGULATOR_PWM is not set +CONFIG_REGULATOR_QCOM_SPMI=y +# CONFIG_REGULATOR_QCOM_USB_VBUS is not set +# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set +CONFIG_REGULATOR_ROHM=m +# CONFIG_REGULATOR_RT4801 is not set +CONFIG_REGULATOR_RT4831=m +CONFIG_REGULATOR_RT5120=m +CONFIG_REGULATOR_RT5190A=m +CONFIG_REGULATOR_RT5759=m +CONFIG_REGULATOR_RT6160=m +CONFIG_REGULATOR_RT6245=m +CONFIG_REGULATOR_RTQ2134=m +# CONFIG_REGULATOR_RTMV20 is not set +CONFIG_REGULATOR_RTQ6752=m +# CONFIG_REGULATOR_S2MPA01 is not set +CONFIG_REGULATOR_S2MPS11=y +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_SLG51000 is not set +CONFIG_REGULATOR_SY7636A=m +CONFIG_REGULATOR_SY8106A=m +CONFIG_REGULATOR_SY8824X=m +# CONFIG_REGULATOR_SY8827N is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +CONFIG_REGULATOR_TPS6286X=m +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +# CONFIG_REGULATOR_VCTRL is not set +# CONFIG_REGULATOR_QCOM_LABIBB is not set +CONFIG_RC_CORE=m +CONFIG_LIRC=y +CONFIG_RC_MAP=m +CONFIG_RC_DECODERS=y +CONFIG_IR_IMON_DECODER=m +CONFIG_IR_JVC_DECODER=m +CONFIG_IR_MCE_KBD_DECODER=m +CONFIG_IR_NEC_DECODER=m +CONFIG_IR_RC5_DECODER=m +CONFIG_IR_RC6_DECODER=m +CONFIG_IR_RCMM_DECODER=m +CONFIG_IR_SANYO_DECODER=m +CONFIG_IR_SHARP_DECODER=m +CONFIG_IR_SONY_DECODER=m +CONFIG_IR_XMP_DECODER=m +CONFIG_RC_DEVICES=y +CONFIG_IR_GPIO_CIR=m +CONFIG_IR_GPIO_TX=m +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_IMON is not set +CONFIG_IR_IMON_RAW=m +# CONFIG_IR_MCEUSB is not set +CONFIG_IR_PWM_TX=m +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_SERIAL is not set +CONFIG_IR_SPI=m +# CONFIG_IR_STREAMZAP is not set +CONFIG_IR_SUNXI=m +# CONFIG_IR_TOY is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_RC_LOOPBACK is not set +CONFIG_RC_XBOX_DVD=m +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y + +# +# CEC support +# +# CONFIG_MEDIA_CEC_SUPPORT is not set +# end of CEC support + +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y + +# +# Media device types +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +# CONFIG_MEDIA_PLATFORM_SUPPORT is not set +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + +CONFIG_VIDEO_DEV=m +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=m + +# +# Video4Linux options +# +CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_FIXED_MINOR_RANGES=y +CONFIG_VIDEO_TUNER=m +CONFIG_V4L2_MEM2MEM_DEV=m +CONFIG_V4L2_FWNODE=m +CONFIG_V4L2_ASYNC=m +# end of Video4Linux options + +# +# Media controller options +# +CONFIG_MEDIA_CONTROLLER_DVB=y +CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +# end of Media controller options + +# +# Digital TV options +# +# CONFIG_DVB_MMAP is not set +CONFIG_DVB_NET=y +CONFIG_DVB_MAX_ADAPTERS=8 +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options + +# +# Media drivers +# + +# +# Drivers filtered as selected at 'Filter media drivers' +# + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_GSPCA=m +CONFIG_USB_GSPCA_BENQ=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_CPIA1=m +CONFIG_USB_GSPCA_DTCS033=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_JEILINJ=m +CONFIG_USB_GSPCA_JL2005BCD=m +CONFIG_USB_GSPCA_KINECT=m +CONFIG_USB_GSPCA_KONICA=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_NW80X=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_OV534_9=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7302=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SE401=m +CONFIG_USB_GSPCA_SN9C2028=m +CONFIG_USB_GSPCA_SN9C20X=m +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA1528=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_SQ930X=m +CONFIG_USB_GSPCA_STK014=m +CONFIG_USB_GSPCA_STK1135=m +CONFIG_USB_GSPCA_STV0680=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TOPRO=m +CONFIG_USB_GSPCA_TOUPTEK=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_VICAM=m +CONFIG_USB_GSPCA_XIRLINK_CIT=m +CONFIG_USB_GSPCA_ZC3XX=m +CONFIG_USB_GL860=m +CONFIG_USB_M5602=m +CONFIG_USB_STV06XX=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +CONFIG_USB_S2255=m +CONFIG_VIDEO_USBTV=m +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_GO7007 is not set +CONFIG_VIDEO_HDPVR=m +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_PVRUSB2_DVB=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_STK1160_COMMON=m +CONFIG_VIDEO_STK1160=m + +# +# Analog/digital TV USB devices +# +CONFIG_VIDEO_AU0828=m +CONFIG_VIDEO_AU0828_V4L2=y +# CONFIG_VIDEO_AU0828_RC is not set +CONFIG_VIDEO_CX231XX=m +CONFIG_VIDEO_CX231XX_RC=y +CONFIG_VIDEO_CX231XX_ALSA=m +CONFIG_VIDEO_CX231XX_DVB=m + +# +# Digital TV USB devices +# +CONFIG_DVB_AS102=m +CONFIG_DVB_B2C2_FLEXCOP_USB=m +# CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG is not set +CONFIG_DVB_USB_V2=m +CONFIG_DVB_USB_AF9015=m +CONFIG_DVB_USB_AF9035=m +CONFIG_DVB_USB_ANYSEE=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_AZ6007=m +CONFIG_DVB_USB_CE6230=m +CONFIG_DVB_USB_DVBSKY=m +CONFIG_DVB_USB_EC168=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_LME2510=m +CONFIG_DVB_USB_MXL111SF=m +CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_ZD1301=m +CONFIG_DVB_USB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +CONFIG_DVB_USB_AZ6027=m +CONFIG_DVB_USB_CINERGY_T2=m +CONFIG_DVB_USB_CXUSB=m +# CONFIG_DVB_USB_CXUSB_ANALOG is not set +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_DIB3000MC=m +CONFIG_DVB_USB_DIBUSB_MB=m +CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_DTV5100=m +CONFIG_DVB_USB_DW2102=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_PCTV452E=m +CONFIG_DVB_USB_TECHNISAT_USB2=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_VP7045=m +CONFIG_SMS_USB_DRV=m + +# +# Webcam, TV (analog/digital) USB devices +# +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_V4L2=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_VIDEO_EM28XX_RC=m + +# +# Software defined radio USB devices +# +CONFIG_USB_AIRSPY=m +CONFIG_USB_HACKRF=m +CONFIG_USB_MSI2500=m +CONFIG_RADIO_ADAPTERS=m +CONFIG_RADIO_SAA7706H=m +CONFIG_RADIO_SHARK=m +CONFIG_RADIO_SHARK2=m +# CONFIG_RADIO_SI4713 is not set +CONFIG_RADIO_TEA575X=m +CONFIG_RADIO_TEA5764=m +CONFIG_RADIO_TEF6862=m +CONFIG_RADIO_WL1273=m +CONFIG_USB_DSBR=m +CONFIG_USB_KEENE=m +CONFIG_USB_MA901=m +# CONFIG_USB_MR800 is not set +CONFIG_USB_RAREMONO=m +# CONFIG_RADIO_SI470X is not set +CONFIG_MEDIA_COMMON_OPTIONS=y + +# +# common driver options +# +CONFIG_CYPRESS_FIRMWARE=m +CONFIG_TTPCI_EEPROM=m +CONFIG_VIDEO_CX2341X=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_DVB_B2C2_FLEXCOP=m +CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_SIANO_RC=y +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_DMA_CONTIG=m +CONFIG_VIDEOBUF2_VMALLOC=m +CONFIG_VIDEOBUF2_DMA_SG=m +# end of Media drivers + +CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y + +# +# Media ancillary drivers +# +CONFIG_MEDIA_ATTACH=y + +# +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' +# +CONFIG_VIDEO_IR_I2C=m + +# +# Camera sensor devices +# +CONFIG_VIDEO_APTINA_PLL=m +CONFIG_VIDEO_CCS_PLL=m +CONFIG_VIDEO_AR0521=m +CONFIG_VIDEO_HI556=m +CONFIG_VIDEO_HI846=m +CONFIG_VIDEO_HI847=m +CONFIG_VIDEO_IMX208=m +CONFIG_VIDEO_IMX214=m +CONFIG_VIDEO_IMX219=m +CONFIG_VIDEO_IMX258=m +CONFIG_VIDEO_IMX274=m +CONFIG_VIDEO_IMX290=m +CONFIG_VIDEO_IMX319=m +CONFIG_VIDEO_IMX334=m +CONFIG_VIDEO_IMX335=m +CONFIG_VIDEO_IMX355=m +CONFIG_VIDEO_IMX412=m +CONFIG_VIDEO_MAX9271_LIB=m +CONFIG_VIDEO_MT9M001=m +CONFIG_VIDEO_MT9M032=m +CONFIG_VIDEO_MT9M111=m +CONFIG_VIDEO_MT9P031=m +CONFIG_VIDEO_MT9T001=m +CONFIG_VIDEO_MT9T112=m +CONFIG_VIDEO_MT9V011=m +CONFIG_VIDEO_MT9V032=m +CONFIG_VIDEO_MT9V111=m +CONFIG_VIDEO_NOON010PC30=m +CONFIG_VIDEO_OG01A1B=m +CONFIG_VIDEO_OV02A10=m +CONFIG_VIDEO_OV08D10=m +CONFIG_VIDEO_OV13858=m +CONFIG_VIDEO_OV13B10=m +CONFIG_VIDEO_OV2640=m +CONFIG_VIDEO_OV2659=m +CONFIG_VIDEO_OV2680=m +CONFIG_VIDEO_OV2685=m +CONFIG_VIDEO_OV5640=m +CONFIG_VIDEO_OV5645=m +CONFIG_VIDEO_OV5647=m +CONFIG_VIDEO_OV5648=m +CONFIG_VIDEO_OV5670=m +CONFIG_VIDEO_OV5675=m +CONFIG_VIDEO_OV5693=m +CONFIG_VIDEO_OV5695=m +CONFIG_VIDEO_OV6650=m +CONFIG_VIDEO_OV7251=m +CONFIG_VIDEO_OV7640=m +CONFIG_VIDEO_OV7670=m +CONFIG_VIDEO_OV772X=m +CONFIG_VIDEO_OV7740=m +CONFIG_VIDEO_OV8856=m +CONFIG_VIDEO_OV8865=m +CONFIG_VIDEO_OV9282=m +CONFIG_VIDEO_OV9640=m +CONFIG_VIDEO_OV9650=m +CONFIG_VIDEO_RDACM20=m +CONFIG_VIDEO_RDACM21=m +CONFIG_VIDEO_RJ54N1=m +CONFIG_VIDEO_S5C73M3=m +CONFIG_VIDEO_S5K4ECGX=m +CONFIG_VIDEO_S5K5BAF=m +CONFIG_VIDEO_S5K6A3=m +CONFIG_VIDEO_S5K6AA=m +CONFIG_VIDEO_SR030PC30=m +CONFIG_VIDEO_VS6624=m +CONFIG_VIDEO_CCS=m +CONFIG_VIDEO_ET8EK8=m +CONFIG_VIDEO_M5MOLS=m +# end of Camera sensor devices + +# +# Lens drivers +# +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9768 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers + +# +# Flash devices +# +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices + +# +# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers' +# +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_TVP5150=m + +# +# Video and audio decoders +# +CONFIG_VIDEO_CX25840=m + +# +# SPI I2C drivers auto-selected by 'Autoselect ancillary drivers' +# + +# +# Media SPI Adapters +# +CONFIG_CXD2880_SPI_DRV=m +CONFIG_VIDEO_GS1662=m +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=m + +# +# Tuner drivers auto-selected by 'Autoselect ancillary drivers' +# +CONFIG_MEDIA_TUNER_E4000=m +CONFIG_MEDIA_TUNER_FC0011=m +CONFIG_MEDIA_TUNER_FC0012=m +CONFIG_MEDIA_TUNER_FC0013=m +CONFIG_MEDIA_TUNER_FC2580=m +CONFIG_MEDIA_TUNER_IT913X=m +CONFIG_MEDIA_TUNER_MAX2165=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MSI001=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2063=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_QM1D1C0042=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_R820T=m +CONFIG_MEDIA_TUNER_SI2157=m +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18212=m +CONFIG_MEDIA_TUNER_TDA18218=m +CONFIG_MEDIA_TUNER_TDA18250=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_TUA9001=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_XC5000=m + +# +# DVB Frontend drivers auto-selected by 'Autoselect ancillary drivers' +# + +# +# Multistandard (satellite) frontends +# +CONFIG_DVB_M88DS3103=m +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV090x=m +CONFIG_DVB_STV6110x=m + +# +# Multistandard (cable + terrestrial) frontends +# +CONFIG_DVB_DRXK=m +CONFIG_DVB_MN88472=m +CONFIG_DVB_MN88473=m +CONFIG_DVB_SI2165=m +CONFIG_DVB_TDA18271C2DD=m + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24120=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_DS3000=m +CONFIG_DVB_MT312=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_TDA10071=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TS2020=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_ZL10039=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_AF9013=m +CONFIG_DVB_AS102_FE=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_CXD2820R=m +CONFIG_DVB_CXD2841ER=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DRXD=m +CONFIG_DVB_EC100=m +CONFIG_DVB_GP8PSK_FE=m +CONFIG_DVB_MT352=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_RTL2830=m +CONFIG_DVB_RTL2832=m +CONFIG_DVB_RTL2832_SDR=m +CONFIG_DVB_SI2168=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_ZD1301_DEMOD=m +CONFIG_DVB_ZL10353=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_STV0297=m +CONFIG_DVB_TDA10023=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_AU8522=m +CONFIG_DVB_AU8522_DTV=m +CONFIG_DVB_AU8522_V4L=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LG2160=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT3306A=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_MXL692=m +CONFIG_DVB_NXT200X=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_S5H1411=m + +# +# ISDB-T (terrestrial) frontends +# +CONFIG_DVB_DIB8000=m +CONFIG_DVB_MB86A20S=m +CONFIG_DVB_S921=m + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +CONFIG_DVB_TC90522=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_DIB0090=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_A8293=m +CONFIG_DVB_AF9033=m +CONFIG_DVB_ATBM8830=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_ISL6423=m +CONFIG_DVB_IX2505V=m +CONFIG_DVB_LGS8GXX=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_LNBP22=m +CONFIG_DVB_M88RS2000=m +CONFIG_DVB_DRX39XYJ=m + +# +# Common Interface (EN50221) controller drivers +# +CONFIG_DVB_SP2=m +# end of Media ancillary drivers + +# +# Graphics support +# +CONFIG_APERTURE_HELPERS=y +CONFIG_DRM=y +CONFIG_DRM_MIPI_DBI=m +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DEBUG_MM is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_DP_AUX_BUS=m +CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_GEM_DMA_HELPER=y +CONFIG_DRM_GEM_SHMEM_HELPER=m +CONFIG_DRM_SCHED=m + +# +# I2C encoder or helper chips +# +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +# CONFIG_DRM_I2C_NXP_TDA998X is not set +CONFIG_DRM_I2C_NXP_TDA9950=m +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +CONFIG_DRM_KOMEDA=m +# end of ARM devices + +# CONFIG_DRM_VGEM is not set +CONFIG_DRM_VKMS=m +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_USE_LVDS is not set +# CONFIG_DRM_RCAR_USE_MIPI_DSI is not set +CONFIG_DRM_SUN4I=y +CONFIG_DRM_SUN6I_DSI=y +CONFIG_DRM_SUN8I_DW_HDMI=y +CONFIG_DRM_SUN8I_MIXER=y +CONFIG_DRM_SUN8I_TCON_TOP=y +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +CONFIG_DRM_PANEL_ABT_Y030XX067A=m +CONFIG_DRM_PANEL_ARM_VERSATILE=m +# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set +CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0=m +CONFIG_DRM_PANEL_BOE_HIMAX8279D=m +# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set +CONFIG_DRM_PANEL_DSI_CM=m +CONFIG_DRM_PANEL_LVDS=m +CONFIG_DRM_PANEL_SIMPLE=m +CONFIG_DRM_PANEL_EDP=m +CONFIG_DRM_PANEL_EBBG_FT8719=m +# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set +CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m +CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m +CONFIG_DRM_PANEL_ILITEK_IL9322=m +CONFIG_DRM_PANEL_ILITEK_ILI9341=m +CONFIG_DRM_PANEL_ILITEK_ILI9881C=m +CONFIG_DRM_PANEL_INNOLUX_EJ030NA=m +CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m +CONFIG_DRM_PANEL_JDI_LT070ME05000=m +CONFIG_DRM_PANEL_JDI_R63452=m +CONFIG_DRM_PANEL_KHADAS_TS050=m +CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04=m +# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set +CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=m +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +CONFIG_DRM_PANEL_LG_LB035Q02=m +# CONFIG_DRM_PANEL_LG_LG4573 is not set +CONFIG_DRM_PANEL_NEC_NL8048HL11=m +CONFIG_DRM_PANEL_NEWVISION_NV3052C=m +CONFIG_DRM_PANEL_NOVATEK_NT35510=m +CONFIG_DRM_PANEL_NOVATEK_NT35560=m +CONFIG_DRM_PANEL_NOVATEK_NT35950=m +CONFIG_DRM_PANEL_NOVATEK_NT36672A=m +CONFIG_DRM_PANEL_NOVATEK_NT39016=m +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set +CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=m +CONFIG_DRM_PANEL_ORISETECH_OTM8009A=m +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m +CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m +CONFIG_DRM_PANEL_RAYDIUM_RM67191=m +CONFIG_DRM_PANEL_RAYDIUM_RM68200=m +CONFIG_DRM_PANEL_RONBO_RB070D30=m +CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=m +CONFIG_DRM_PANEL_SAMSUNG_DB7430=m +CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=m +CONFIG_DRM_PANEL_SAMSUNG_S6D27A1=m +CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m +CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01=m +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=m +CONFIG_DRM_PANEL_SEIKO_43WVF1G=m +CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m +CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m +CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m +CONFIG_DRM_PANEL_SHARP_LS060T1SX01=m +CONFIG_DRM_PANEL_SITRONIX_ST7701=m +# CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +CONFIG_DRM_PANEL_SONY_ACX565AKM=m +CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521=m +CONFIG_DRM_PANEL_TDO_TL070WSH30=m +CONFIG_DRM_PANEL_TPO_TD028TTEC1=m +CONFIG_DRM_PANEL_TPO_TD043MTEA1=m +CONFIG_DRM_PANEL_TPO_TPG110=m +CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +CONFIG_DRM_PANEL_WIDECHIPS_WS2401=m +CONFIG_DRM_PANEL_XINPENG_XPP055C272=m +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +CONFIG_DRM_CDNS_DSI=m +CONFIG_DRM_CHIPONE_ICN6211=m +# CONFIG_DRM_CHRONTEL_CH7033 is not set +CONFIG_DRM_DISPLAY_CONNECTOR=m +CONFIG_DRM_ITE_IT6505=m +CONFIG_DRM_LONTIUM_LT8912B=m +CONFIG_DRM_LONTIUM_LT9211=m +# CONFIG_DRM_LONTIUM_LT9611 is not set +CONFIG_DRM_LONTIUM_LT9611UXC=m +CONFIG_DRM_ITE_IT66121=m +CONFIG_DRM_LVDS_CODEC=m +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +CONFIG_DRM_PARADE_PS8640=m +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +CONFIG_DRM_SII9234=m +CONFIG_DRM_SIMPLE_BRIDGE=m +CONFIG_DRM_THINE_THC63LVD1024=m +# CONFIG_DRM_TOSHIBA_TC358762 is not set +CONFIG_DRM_TOSHIBA_TC358764=m +# CONFIG_DRM_TOSHIBA_TC358767 is not set +CONFIG_DRM_TOSHIBA_TC358768=m +# CONFIG_DRM_TOSHIBA_TC358775 is not set +CONFIG_DRM_TI_DLPC3433=m +# CONFIG_DRM_TI_TFP410 is not set +CONFIG_DRM_TI_SN65DSI83=m +CONFIG_DRM_TI_SN65DSI86=m +CONFIG_DRM_TI_TPD12S015=m +CONFIG_DRM_ANALOGIX_ANX6345=m +CONFIG_DRM_ANALOGIX_ANX78XX=m +CONFIG_DRM_ANALOGIX_DP=m +CONFIG_DRM_ANALOGIX_ANX7625=m +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_CDNS_MHDP8546 is not set +CONFIG_DRM_DW_HDMI=y +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m +CONFIG_DRM_DW_HDMI_I2S_AUDIO=y +CONFIG_DRM_DW_HDMI_GP_AUDIO=m +CONFIG_DRM_DW_HDMI_CEC=m +# end of Display Interface Bridges + +CONFIG_DRM_ETNAVIV=m +CONFIG_DRM_ETNAVIV_THERMAL=y +# CONFIG_DRM_HISI_KIRIN is not set +CONFIG_DRM_LOGICVC=m +# CONFIG_DRM_ARCPGU is not set +CONFIG_DRM_GM12U320=m +CONFIG_DRM_PANEL_MIPI_DBI=m +CONFIG_DRM_SIMPLEDRM=m +CONFIG_TINYDRM_HX8357D=m +CONFIG_TINYDRM_ILI9163=m +CONFIG_TINYDRM_ILI9225=m +CONFIG_TINYDRM_ILI9341=m +CONFIG_TINYDRM_ILI9486=m +CONFIG_TINYDRM_MI0283QT=m +CONFIG_TINYDRM_REPAPER=m +CONFIG_TINYDRM_ST7586=m +CONFIG_TINYDRM_ST7735R=m +# CONFIG_DRM_PL111 is not set +CONFIG_DRM_LIMA=m +CONFIG_DRM_PANFROST=m +CONFIG_DRM_TIDSS=m +CONFIG_DRM_GUD=m +CONFIG_DRM_SSD130X=m +CONFIG_DRM_SSD130X_I2C=m +CONFIG_DRM_SSD130X_SPI=m +# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +CONFIG_DRM_NOMODESET=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_BACKLIGHT=m +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +CONFIG_FB_SIMPLE=m +# CONFIG_FB_SSD1307 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +CONFIG_LCD_CLASS_DEVICE=m +# CONFIG_LCD_L4F00242T03 is not set +# CONFIG_LCD_LMS283GF05 is not set +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI922X is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LCD_PLATFORM is not set +# CONFIG_LCD_AMS369FG06 is not set +# CONFIG_LCD_LMS501KF03 is not set +# CONFIG_LCD_HX8357 is not set +CONFIG_LCD_OTM3225A=m +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_KTD253 is not set +CONFIG_BACKLIGHT_PWM=m +CONFIG_BACKLIGHT_MT6370=m +CONFIG_BACKLIGHT_QCOM_WLED=m +CONFIG_BACKLIGHT_RT4831=m +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +CONFIG_BACKLIGHT_GPIO=m +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +CONFIG_BACKLIGHT_RAVE_SP=m +CONFIG_BACKLIGHT_LED=m +# end of Backlight & LCD device support + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_SEQ_DEVICE=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_COMPRESS_OFFLOAD=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +CONFIG_SND_CTL_FAST_LOOKUP=y +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_CTL_INPUT_VALIDATION is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_CTL_LED=m +CONFIG_SND_SEQUENCER=m +# CONFIG_SND_SEQ_DUMMY is not set +CONFIG_SND_SEQ_MIDI_EVENT=m +CONFIG_SND_SEQ_MIDI=m +CONFIG_SND_SEQ_VIRMIDI=m +CONFIG_SND_MPU401_UART=m +CONFIG_SND_DRIVERS=y +CONFIG_SND_DUMMY=m +CONFIG_SND_ALOOP=m +CONFIG_SND_VIRMIDI=m +CONFIG_SND_MTPAV=m +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_SERIAL_GENERIC=m +CONFIG_SND_MPU401=m + +# +# HD-Audio +# +CONFIG_SND_HDA=m +CONFIG_SND_HDA_GENERIC_LEDS=y +# CONFIG_SND_HDA_HWDEP is not set +# CONFIG_SND_HDA_RECONFIG is not set +# CONFIG_SND_HDA_INPUT_BEEP is not set +# CONFIG_SND_HDA_PATCH_LOADER is not set +# CONFIG_SND_HDA_CODEC_REALTEK is not set +CONFIG_SND_HDA_CODEC_ANALOG=m +CONFIG_SND_HDA_CODEC_SIGMATEL=m +CONFIG_SND_HDA_CODEC_VIA=m +CONFIG_SND_HDA_CODEC_HDMI=m +CONFIG_SND_HDA_CODEC_CIRRUS=m +CONFIG_SND_HDA_CODEC_CS8409=m +CONFIG_SND_HDA_CODEC_CONEXANT=m +CONFIG_SND_HDA_CODEC_CA0110=m +CONFIG_SND_HDA_CODEC_CA0132=m +CONFIG_SND_HDA_CODEC_CA0132_DSP=y +CONFIG_SND_HDA_CODEC_CMEDIA=m +CONFIG_SND_HDA_CODEC_SI3054=m +CONFIG_SND_HDA_GENERIC=m +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 +# end of HD-Audio + +CONFIG_SND_HDA_CORE=m +CONFIG_SND_HDA_DSP_LOADER=y +CONFIG_SND_HDA_EXT_CORE=m +CONFIG_SND_HDA_PREALLOC_SIZE=64 +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +CONFIG_SND_SOC_COMPRESS=y +CONFIG_SND_SOC_ADI=m +CONFIG_SND_SOC_ADI_AXI_I2S=m +CONFIG_SND_SOC_ADI_AXI_SPDIF=m +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_AMD_ACP_CONFIG is not set +# CONFIG_SND_ATMEL_SOC is not set +CONFIG_SND_BCM63XX_I2S_WHISTLER=m +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +CONFIG_SND_SOC_FSL_AUDMIX=m +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +CONFIG_SND_SOC_FSL_MICFIL=m +CONFIG_SND_SOC_FSL_XCVR=m +CONFIG_SND_SOC_FSL_UTILS=m +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +CONFIG_SND_SOC_MTK_BTCVSD=m +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# +# Allwinner SoC Audio support +# +# CONFIG_SND_SUN4I_CODEC is not set +CONFIG_SND_SUN50IW9_CODEC=y +# CONFIG_SND_SUN8I_CODEC is not set +# CONFIG_SND_SUN8I_CODEC_ANALOG is not set +# CONFIG_SND_SUN50I_CODEC_ANALOG is not set +# CONFIG_SND_SUN4I_I2S is not set +# CONFIG_SND_SUN4I_SPDIF is not set +# CONFIG_SND_SUN50I_DMIC is not set +# end of Allwinner SoC Audio support + +CONFIG_SND_SOC_SUNXI_MACH=y +CONFIG_SND_SOC_SUNXI_AHUB_DAM=y + +# +# Allwinner SoC Audio support V2 +# +# CONFIG_SND_SOC_SUNXI_AAUDIO is not set +CONFIG_SND_SOC_SUNXI_AHUB=y +# end of Allwinner SoC Audio support V2 + +CONFIG_SND_SOC_XILINX_I2S=m +CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=m +CONFIG_SND_SOC_XILINX_SPDIF=m +# CONFIG_SND_SOC_XTFPGA_I2S is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +CONFIG_SND_SOC_WM_ADSP=m +# CONFIG_SND_SOC_AC97_CODEC is not set +CONFIG_SND_SOC_ADAU_UTILS=m +CONFIG_SND_SOC_ADAU1372=m +CONFIG_SND_SOC_ADAU1372_I2C=m +CONFIG_SND_SOC_ADAU1372_SPI=m +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +CONFIG_SND_SOC_ADAU7118=m +CONFIG_SND_SOC_ADAU7118_HW=m +CONFIG_SND_SOC_ADAU7118_I2C=m +# CONFIG_SND_SOC_AK4104 is not set +CONFIG_SND_SOC_AK4118=m +CONFIG_SND_SOC_AK4375=m +CONFIG_SND_SOC_AK4458=m +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +CONFIG_SND_SOC_AK5558=m +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_AW8738 is not set +CONFIG_SND_SOC_BD28623=m +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +CONFIG_SND_SOC_CS35L36=m +CONFIG_SND_SOC_CS35L41_LIB=m +CONFIG_SND_SOC_CS35L41=m +CONFIG_SND_SOC_CS35L41_SPI=m +CONFIG_SND_SOC_CS35L41_I2C=m +CONFIG_SND_SOC_CS35L45_TABLES=m +CONFIG_SND_SOC_CS35L45=m +CONFIG_SND_SOC_CS35L45_SPI=m +CONFIG_SND_SOC_CS35L45_I2C=m +CONFIG_SND_SOC_CS42L42_CORE=m +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +CONFIG_SND_SOC_CS42L83=m +# CONFIG_SND_SOC_CS4234 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +CONFIG_SND_SOC_CS43130=m +CONFIG_SND_SOC_CS4341=m +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +CONFIG_SND_SOC_DA7213=m +CONFIG_SND_SOC_DMIC=m +CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_ES7134 is not set +CONFIG_SND_SOC_ES7241=m +# CONFIG_SND_SOC_ES8316 is not set +CONFIG_SND_SOC_ES8326=m +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +CONFIG_SND_SOC_HDA=m +CONFIG_SND_SOC_ICS43432=m +# CONFIG_SND_SOC_INNO_RK3036 is not set +CONFIG_SND_SOC_MAX98088=m +# CONFIG_SND_SOC_MAX98357A is not set +# CONFIG_SND_SOC_MAX98504 is not set +CONFIG_SND_SOC_MAX9867=m +# CONFIG_SND_SOC_MAX98927 is not set +CONFIG_SND_SOC_MAX98520=m +# CONFIG_SND_SOC_MAX98373_I2C is not set +# CONFIG_SND_SOC_MAX98390 is not set +CONFIG_SND_SOC_MAX98396=m +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +CONFIG_SND_SOC_PCM1789=m +CONFIG_SND_SOC_PCM1789_I2C=m +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +CONFIG_SND_SOC_PCM186X=m +CONFIG_SND_SOC_PCM186X_I2C=m +CONFIG_SND_SOC_PCM186X_SPI=m +CONFIG_SND_SOC_PCM3060=m +CONFIG_SND_SOC_PCM3060_I2C=m +CONFIG_SND_SOC_PCM3060_SPI=m +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +CONFIG_SND_SOC_PCM5102A=m +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +CONFIG_SND_SOC_RK3328=m +CONFIG_SND_SOC_RL6231=m +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +CONFIG_SND_SOC_RT5640=m +CONFIG_SND_SOC_RT5659=m +CONFIG_SND_SOC_RT9120=m +# CONFIG_SND_SOC_SGTL5000 is not set +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m +CONFIG_SND_SOC_SIMPLE_MUX=m +CONFIG_SND_SOC_SPDIF=m +CONFIG_SND_SOC_SRC4XXX_I2C=m +CONFIG_SND_SOC_SRC4XXX=m +CONFIG_SND_SOC_SSM2305=m +CONFIG_SND_SOC_SSM2518=m +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +CONFIG_SND_SOC_TAS2562=m +# CONFIG_SND_SOC_TAS2764 is not set +CONFIG_SND_SOC_TAS2770=m +CONFIG_SND_SOC_TAS2780=m +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +CONFIG_SND_SOC_TAS5805M=m +CONFIG_SND_SOC_TAS6424=m +CONFIG_SND_SOC_TDA7419=m +# CONFIG_SND_SOC_TFA9879 is not set +CONFIG_SND_SOC_TFA989X=m +CONFIG_SND_SOC_TLV320ADC3XXX=m +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +CONFIG_SND_SOC_TLV320AIC32X4=m +CONFIG_SND_SOC_TLV320AIC32X4_I2C=m +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +CONFIG_SND_SOC_TLV320AIC3X=m +CONFIG_SND_SOC_TLV320AIC3X_I2C=m +CONFIG_SND_SOC_TLV320AIC3X_SPI=m +CONFIG_SND_SOC_TLV320ADCX140=m +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +CONFIG_SND_SOC_TSCS454=m +CONFIG_SND_SOC_UDA1334=m +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +CONFIG_SND_SOC_WM8524=m +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +CONFIG_SND_SOC_WM8731=m +CONFIG_SND_SOC_WM8731_I2C=m +CONFIG_SND_SOC_WM8731_SPI=m +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +CONFIG_SND_SOC_WM8782=m +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +CONFIG_SND_SOC_WM8904=m +CONFIG_SND_SOC_WM8940=m +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set +CONFIG_SND_SOC_MAX9759=m +CONFIG_SND_SOC_MT6351=m +CONFIG_SND_SOC_MT6358=m +CONFIG_SND_SOC_MT6660=m +CONFIG_SND_SOC_NAU8315=m +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +CONFIG_SND_SOC_NAU8821=m +CONFIG_SND_SOC_NAU8822=m +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +CONFIG_SND_SOC_LPASS_MACRO_COMMON=m +CONFIG_SND_SOC_LPASS_WSA_MACRO=m +CONFIG_SND_SOC_LPASS_VA_MACRO=m +CONFIG_SND_SOC_LPASS_RX_MACRO=m +CONFIG_SND_SOC_LPASS_TX_MACRO=m +# end of CODEC drivers + +CONFIG_SND_SIMPLE_CARD_UTILS=m +CONFIG_SND_SIMPLE_CARD=m +# CONFIG_SND_AUDIO_GRAPH_CARD is not set +CONFIG_SND_AUDIO_GRAPH_CARD2=m +CONFIG_SND_AUDIO_GRAPH_CARD2_CUSTOM_SAMPLE=m +CONFIG_SND_TEST_COMPONENT=m +CONFIG_SND_VIRTIO=m + +# +# HID support +# +CONFIG_HID=y +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=m +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=m +CONFIG_HID_ACCUTOUCH=m +CONFIG_HID_ACRUX=m +CONFIG_HID_ACRUX_FF=y +CONFIG_HID_APPLE=m +CONFIG_HID_APPLEIR=m +# CONFIG_HID_ASUS is not set +CONFIG_HID_AUREAL=m +CONFIG_HID_BELKIN=m +CONFIG_HID_BETOP_FF=m +CONFIG_HID_BIGBEN_FF=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CORSAIR=m +CONFIG_HID_COUGAR=m +CONFIG_HID_MACALLY=m +CONFIG_HID_PRODIKEYS=m +# CONFIG_HID_CMEDIA is not set +CONFIG_HID_CP2112=m +CONFIG_HID_CREATIVE_SB0540=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_DRAGONRISE=m +CONFIG_DRAGONRISE_FF=y +CONFIG_HID_EMS_FF=m +CONFIG_HID_ELAN=m +CONFIG_HID_ELECOM=m +CONFIG_HID_ELO=m +CONFIG_HID_EZKEY=m +CONFIG_HID_FT260=m +CONFIG_HID_GEMBIRD=m +CONFIG_HID_GFRM=m +CONFIG_HID_GLORIOUS=m +CONFIG_HID_HOLTEK=m +CONFIG_HOLTEK_FF=y +# CONFIG_HID_VIVALDI is not set +CONFIG_HID_GT683R=m +CONFIG_HID_KEYTOUCH=m +CONFIG_HID_KYE=m +CONFIG_HID_UCLOGIC=m +CONFIG_HID_WALTOP=m +CONFIG_HID_VIEWSONIC=m +CONFIG_HID_VRC2=m +CONFIG_HID_XIAOMI=m +CONFIG_HID_GYRATION=m +CONFIG_HID_ICADE=m +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +CONFIG_HID_TWINHAN=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_LCPOWER=m +CONFIG_HID_LED=m +CONFIG_HID_LENOVO=m +# CONFIG_HID_LETSKETCH is not set +CONFIG_HID_LOGITECH=m +CONFIG_HID_LOGITECH_DJ=m +CONFIG_HID_LOGITECH_HIDPP=m +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGIG940_FF=y +CONFIG_LOGIWHEELS_FF=y +CONFIG_HID_MAGICMOUSE=m +CONFIG_HID_MALTRON=m +# CONFIG_HID_MAYFLASH is not set +CONFIG_HID_MEGAWORLD_FF=m +CONFIG_HID_REDRAGON=m +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_MULTITOUCH=m +CONFIG_HID_NINTENDO=m +# CONFIG_NINTENDO_FF is not set +CONFIG_HID_NTI=m +CONFIG_HID_NTRIG=m +CONFIG_HID_ORTEK=m +CONFIG_HID_PANTHERLORD=m +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PENMOUNT=m +CONFIG_HID_PETALYNX=m +CONFIG_HID_PICOLCD=m +CONFIG_HID_PICOLCD_FB=y +CONFIG_HID_PICOLCD_BACKLIGHT=y +CONFIG_HID_PICOLCD_LCD=y +CONFIG_HID_PICOLCD_LEDS=y +CONFIG_HID_PICOLCD_CIR=y +CONFIG_HID_PLANTRONICS=m +CONFIG_HID_PXRC=m +CONFIG_HID_RAZER=m +CONFIG_HID_PRIMAX=m +# CONFIG_HID_RETRODE is not set +CONFIG_HID_ROCCAT=m +CONFIG_HID_SAITEK=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SEMITEK=m +CONFIG_HID_SIGMAMICRO=m +CONFIG_HID_SONY=m +CONFIG_SONY_FF=y +CONFIG_HID_SPEEDLINK=m +CONFIG_HID_STEAM=m +CONFIG_HID_STEELSERIES=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_RMI=m +CONFIG_HID_GREENASIA=m +CONFIG_GREENASIA_FF=y +CONFIG_HID_SMARTJOYPLUS=m +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_HID_TIVO=m +CONFIG_HID_TOPSEED=m +CONFIG_HID_TOPRE=m +CONFIG_HID_THINGM=m +CONFIG_HID_THRUSTMASTER=m +CONFIG_THRUSTMASTER_FF=y +# CONFIG_HID_UDRAW_PS3 is not set +CONFIG_HID_U2FZERO=m +CONFIG_HID_WACOM=m +CONFIG_HID_WIIMOTE=m +CONFIG_HID_XINMO=m +CONFIG_HID_ZEROPLUS=m +CONFIG_ZEROPLUS_FF=y +CONFIG_HID_ZYDACRON=m +CONFIG_HID_SENSOR_HUB=m +CONFIG_HID_SENSOR_CUSTOM_SENSOR=m +CONFIG_HID_ALPS=m +CONFIG_HID_MCP2221=m +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +CONFIG_HID_PID=y +CONFIG_USB_HIDDEV=y +# end of USB HID support + +# +# I2C HID support +# +CONFIG_I2C_HID_OF=m +CONFIG_I2C_HID_OF_ELAN=m +CONFIG_I2C_HID_OF_GOODIX=m +# end of I2C HID support + +CONFIG_I2C_HID_CORE=m +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_LED_TRIG=y +# CONFIG_USB_ULPI_BUS is not set +CONFIG_USB_CONN_GPIO=m +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_FEW_INIT_RETRIES is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set +# CONFIG_USB_OTG_FSM is not set +CONFIG_USB_LEDS_TRIGGER_USBPORT=y +CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_MON=m + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +# CONFIG_USB_XHCI_PCI_RENESAS is not set +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_BCMA is not set +# CONFIG_USB_HCD_SSB is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=m +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=m + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USBIP_CORE=m +CONFIG_USBIP_VHCI_HCD=m +CONFIG_USBIP_VHCI_HC_PORTS=8 +CONFIG_USBIP_VHCI_NR_HCS=1 +CONFIG_USBIP_HOST=m +CONFIG_USBIP_VUDC=m +# CONFIG_USBIP_DEBUG is not set +CONFIG_USB_CDNS_SUPPORT=m +CONFIG_USB_CDNS3=m +# CONFIG_USB_CDNS3_GADGET is not set +# CONFIG_USB_CDNS3_HOST is not set +CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y + +# +# Platform Glue Layer +# +CONFIG_USB_MUSB_SUNXI=y + +# +# MUSB DMA mode +# +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_OF_SIMPLE=m +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_SIMPLE=m +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_CP210X=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_F81232=m +# CONFIG_USB_SERIAL_F8153X is not set +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_IUU=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_METRO=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MXUPORT=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_QCAUX=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_SAFE=m +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_SYMBOL=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_WWAN=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_OPTICON=m +CONFIG_USB_SERIAL_XSENS_MT=m +CONFIG_USB_SERIAL_WISHBONE=m +CONFIG_USB_SERIAL_SSU100=m +CONFIG_USB_SERIAL_QT2=m +CONFIG_USB_SERIAL_UPD78F0730=m +CONFIG_USB_SERIAL_XR=m +CONFIG_USB_SERIAL_DEBUG=m + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +CONFIG_APPLE_MFI_FASTCHARGE=m +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_EZUSB_FX2=m +CONFIG_USB_HUB_USB251XB=m +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +CONFIG_USB_CHAOSKEY=m +CONFIG_USB_ONBOARD_HUB=m + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +CONFIG_U_SERIAL_CONSOLE=y + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_GADGET_XILINX is not set +CONFIG_USB_MAX3420_UDC=m +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +CONFIG_USB_LIBCOMPOSITE=m +CONFIG_USB_F_ACM=m +CONFIG_USB_F_SS_LB=m +CONFIG_USB_U_SERIAL=m +CONFIG_USB_U_ETHER=m +CONFIG_USB_U_AUDIO=m +CONFIG_USB_F_SERIAL=m +CONFIG_USB_F_OBEX=m +CONFIG_USB_F_NCM=m +CONFIG_USB_F_ECM=m +CONFIG_USB_F_EEM=m +CONFIG_USB_F_SUBSET=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_F_MASS_STORAGE=m +CONFIG_USB_F_FS=m +CONFIG_USB_F_UAC1=m +CONFIG_USB_F_UAC2=m +CONFIG_USB_F_UVC=m +CONFIG_USB_F_MIDI=m +CONFIG_USB_F_HID=m +CONFIG_USB_F_PRINTER=m +CONFIG_USB_F_TCM=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_UAC1=y +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_CONFIGFS_F_UVC=y +CONFIG_USB_CONFIGFS_F_PRINTER=y +# CONFIG_USB_CONFIGFS_F_TCM is not set + +# +# USB Gadget precomposed configurations +# +CONFIG_USB_ZERO=m +# CONFIG_USB_ZERO_HNPTEST is not set +CONFIG_USB_AUDIO=m +# CONFIG_GADGET_UAC1 is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_ETH_EEM=y +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_FUNCTIONFS_ETH=y +CONFIG_USB_FUNCTIONFS_RNDIS=y +CONFIG_USB_FUNCTIONFS_GENERIC=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_GADGET_TARGET=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_MIDI_GADGET=m +CONFIG_USB_G_PRINTER=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_G_ACM_MS=m +CONFIG_USB_G_MULTI=m +CONFIG_USB_G_MULTI_RNDIS=y +CONFIG_USB_G_MULTI_CDC=y +CONFIG_USB_G_HID=m +# CONFIG_USB_G_DBGP is not set +CONFIG_USB_G_WEBCAM=m +CONFIG_USB_RAW_GADGET=m +# end of USB Gadget precomposed configurations + +CONFIG_TYPEC=m +# CONFIG_TYPEC_TCPM is not set +# CONFIG_TYPEC_UCSI is not set +CONFIG_TYPEC_TPS6598X=m +CONFIG_TYPEC_ANX7411=m +CONFIG_TYPEC_RT1719=m +CONFIG_TYPEC_HD3SS3220=m +# CONFIG_TYPEC_STUSB160X is not set +CONFIG_TYPEC_WUSB3801=m + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +CONFIG_TYPEC_MUX_FSA4480=m +CONFIG_TYPEC_MUX_PI3USB30532=m +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +CONFIG_TYPEC_DP_ALTMODE=m +# CONFIG_TYPEC_NVIDIA_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_STM32_SDMMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_SDHCI_OF_ARASAN is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +# CONFIG_MMC_SDHCI_CADENCE is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +CONFIG_MMC_SDHCI_MILBEAUT=m +CONFIG_MMC_SPI=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +CONFIG_MMC_DW_BLUEFIELD=m +CONFIG_MMC_DW_EXYNOS=y +CONFIG_MMC_DW_HI3798CV200=m +CONFIG_MMC_DW_K3=y +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_SUNXI=y +CONFIG_MMC_CQHCI=m +CONFIG_MMC_HSQ=m +# CONFIG_MMC_MTK is not set +# CONFIG_MMC_SDHCI_XENON is not set +# CONFIG_MMC_SDHCI_OMAP is not set +CONFIG_MMC_SDHCI_AM654=m +CONFIG_MMC_LITEX=m +CONFIG_SCSI_UFSHCD=m +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_UFS_HPB is not set +# CONFIG_SCSI_UFS_HWMON is not set +# CONFIG_SCSI_UFSHCD_PLATFORM is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_CLASS_MULTICOLOR is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +CONFIG_LEDS_AN30259A=m +# CONFIG_LEDS_AW2013 is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +CONFIG_LEDS_CR0014114=m +CONFIG_LEDS_EL15203000=m +# CONFIG_LEDS_LM3530 is not set +CONFIG_LEDS_LM3532=m +# CONFIG_LEDS_LM3642 is not set +CONFIG_LEDS_LM3692X=m +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP50XX is not set +# CONFIG_LEDS_LP55XX_COMMON is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +CONFIG_LEDS_PWM=m +CONFIG_LEDS_REGULATOR=m +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +CONFIG_LEDS_MAX77650=m +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +CONFIG_LEDS_SYSCON=y +CONFIG_LEDS_MLXREG=m +CONFIG_LEDS_USER=y +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set + +# +# Flash and Torch LED drivers +# + +# +# RGB LED drivers +# + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_TRIGGER_ONESHOT=m +CONFIG_LEDS_TRIGGER_DISK=y +CONFIG_LEDS_TRIGGER_MTD=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_ACTIVITY=y +CONFIG_LEDS_TRIGGER_GPIO=m +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +CONFIG_LEDS_TRIGGER_TRANSIENT=m +CONFIG_LEDS_TRIGGER_CAMERA=m +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_LEDS_TRIGGER_NETDEV=y +CONFIG_LEDS_TRIGGER_PATTERN=m +CONFIG_LEDS_TRIGGER_AUDIO=m +CONFIG_LEDS_TRIGGER_TTY=m + +# +# Simple LED drivers +# +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=m +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_XGENE=m +CONFIG_EDAC_DMC520=m +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +# CONFIG_RTC_INTF_PROC is not set +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +CONFIG_RTC_DRV_ABB5ZES3=m +CONFIG_RTC_DRV_ABEOZ9=m +CONFIG_RTC_DRV_ABX80X=m +CONFIG_RTC_DRV_AC100=m +CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1307_CENTURY=y +CONFIG_RTC_DRV_DS1374=m +CONFIG_RTC_DRV_DS1374_WDT=y +CONFIG_RTC_DRV_DS1672=m +CONFIG_RTC_DRV_HYM8563=m +CONFIG_RTC_DRV_MAX6900=m +CONFIG_RTC_DRV_MAX77686=m +CONFIG_RTC_DRV_NCT3018Y=m +CONFIG_RTC_DRV_RS5C372=m +CONFIG_RTC_DRV_ISL1208=m +CONFIG_RTC_DRV_ISL12022=m +CONFIG_RTC_DRV_ISL12026=m +CONFIG_RTC_DRV_X1205=m +CONFIG_RTC_DRV_PCF8523=m +CONFIG_RTC_DRV_PCF85063=m +CONFIG_RTC_DRV_PCF85363=m +CONFIG_RTC_DRV_PCF8563=m +CONFIG_RTC_DRV_PCF8583=m +CONFIG_RTC_DRV_M41T80=m +CONFIG_RTC_DRV_M41T80_WDT=y +CONFIG_RTC_DRV_BD70528=m +CONFIG_RTC_DRV_BQ32K=m +CONFIG_RTC_DRV_S35390A=m +CONFIG_RTC_DRV_FM3130=m +CONFIG_RTC_DRV_RX8010=m +CONFIG_RTC_DRV_RX8581=m +CONFIG_RTC_DRV_RX8025=m +CONFIG_RTC_DRV_EM3027=m +CONFIG_RTC_DRV_RV3028=m +# CONFIG_RTC_DRV_RV3032 is not set +CONFIG_RTC_DRV_RV8803=m +CONFIG_RTC_DRV_S5M=m +CONFIG_RTC_DRV_SD3078=m + +# +# SPI RTC drivers +# +CONFIG_RTC_DRV_M41T93=m +CONFIG_RTC_DRV_M41T94=m +CONFIG_RTC_DRV_DS1302=m +CONFIG_RTC_DRV_DS1305=m +CONFIG_RTC_DRV_DS1343=m +CONFIG_RTC_DRV_DS1347=m +CONFIG_RTC_DRV_DS1390=m +CONFIG_RTC_DRV_MAX6916=m +CONFIG_RTC_DRV_R9701=m +CONFIG_RTC_DRV_RX4581=m +CONFIG_RTC_DRV_RS5C348=m +CONFIG_RTC_DRV_MAX6902=m +CONFIG_RTC_DRV_PCF2123=m +CONFIG_RTC_DRV_MCP795=m +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=m +CONFIG_RTC_DRV_DS3232_HWMON=y +CONFIG_RTC_DRV_PCF2127=m +CONFIG_RTC_DRV_RV3029C2=m +CONFIG_RTC_DRV_RV3029_HWMON=y +CONFIG_RTC_DRV_RX6110=m + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set +CONFIG_RTC_DRV_NTXEC=m + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_PL030=m +CONFIG_RTC_DRV_PL031=m +CONFIG_RTC_DRV_SUN6I=y +CONFIG_RTC_DRV_CADENCE=m +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_RTC_DRV_GOLDFISH=m +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_OF=y +CONFIG_ALTERA_MSGDMA=m +# CONFIG_AMBA_PL08X is not set +# CONFIG_BCM_SBA_RAID is not set +CONFIG_DMA_SUN6I=y +CONFIG_DW_AXI_DMAC=m +# CONFIG_FSL_EDMA is not set +CONFIG_FSL_QDMA=m +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_MV_XOR_V2 is not set +# CONFIG_PL330_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +CONFIG_SF_PDMA=m + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_DEBUG is not set +CONFIG_DMABUF_SELFTESTS=m +# CONFIG_DMABUF_HEAPS is not set +# CONFIG_DMABUF_SYSFS_STATS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO_ANCHOR=y +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VDPA is not set +CONFIG_VHOST_IOTLB=m +CONFIG_VHOST=m +CONFIG_VHOST_MENU=y +# CONFIG_VHOST_NET is not set +CONFIG_VHOST_SCSI=m +# CONFIG_VHOST_VSOCK is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +# CONFIG_COMEDI is not set +CONFIG_STAGING=y +# CONFIG_PRISM2_USB is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16240 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Direct Digital Synthesis +# +CONFIG_AD9832=m +CONFIG_AD9834=m +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters + +# +# Active energy metering IC +# +# CONFIG_ADE7854 is not set +# end of Active energy metering IC + +# +# Resolver to digital converters +# +# CONFIG_AD2S1210 is not set +# end of Resolver to digital converters +# end of IIO staging drivers + +CONFIG_STAGING_MEDIA=y +# CONFIG_VIDEO_MAX96712 is not set +CONFIG_VIDEO_SUNXI=y +CONFIG_VIDEO_SUNXI_CEDRUS=m +# CONFIG_STAGING_MEDIA_DEPRECATED is not set +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +CONFIG_FB_TFT=m +CONFIG_FB_TFT_AGM1264K_FL=m +CONFIG_FB_TFT_BD663474=m +CONFIG_FB_TFT_HX8340BN=m +CONFIG_FB_TFT_HX8347D=m +CONFIG_FB_TFT_HX8353D=m +CONFIG_FB_TFT_HX8357D=m +CONFIG_FB_TFT_ILI9163=m +CONFIG_FB_TFT_ILI9320=m +CONFIG_FB_TFT_ILI9325=m +CONFIG_FB_TFT_ILI9340=m +CONFIG_FB_TFT_ILI9341=m +CONFIG_FB_TFT_ILI9481=m +CONFIG_FB_TFT_ILI9486=m +CONFIG_FB_TFT_PCD8544=m +CONFIG_FB_TFT_RA8875=m +CONFIG_FB_TFT_S6D02A1=m +CONFIG_FB_TFT_S6D1121=m +CONFIG_FB_TFT_SEPS525=m +CONFIG_FB_TFT_SH1106=m +CONFIG_FB_TFT_SSD1289=m +CONFIG_FB_TFT_SSD1305=m +CONFIG_FB_TFT_SSD1306=m +CONFIG_FB_TFT_SSD1331=m +CONFIG_FB_TFT_SSD1351=m +CONFIG_FB_TFT_ST7735R=m +CONFIG_FB_TFT_ST7789V=m +CONFIG_FB_TFT_TINYLCD=m +CONFIG_FB_TFT_TLS8204=m +CONFIG_FB_TFT_UC1611=m +CONFIG_FB_TFT_UC1701=m +CONFIG_FB_TFT_UPD161704=m +CONFIG_MOST_COMPONENTS=m +# CONFIG_MOST_NET is not set +# CONFIG_MOST_VIDEO is not set +# CONFIG_MOST_DIM2 is not set +# CONFIG_MOST_I2C is not set +# CONFIG_KS7010 is not set +# CONFIG_PI433 is not set +CONFIG_XIL_AXIS_FIFO=m +# CONFIG_FIELDBUS_DEV is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set +# CONFIG_SURFACE_PLATFORMS is not set +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Clock driver for ARM Reference designs +# +# CONFIG_CLK_ICST is not set +# CONFIG_CLK_SP810 is not set +# end of Clock driver for ARM Reference designs + +CONFIG_LMK04832=m +CONFIG_COMMON_CLK_MAX9485=m +# CONFIG_COMMON_CLK_SCMI is not set +CONFIG_COMMON_CLK_SCPI=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +CONFIG_COMMON_CLK_SI544=m +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_COMMON_CLK_S2MPS11 is not set +CONFIG_COMMON_CLK_AXI_CLKGEN=m +# CONFIG_COMMON_CLK_XGENE is not set +CONFIG_COMMON_CLK_PWM=y +CONFIG_COMMON_CLK_RS9_PCIE=m +# CONFIG_COMMON_CLK_VC5 is not set +CONFIG_COMMON_CLK_VC7=m +CONFIG_COMMON_CLK_BD718XX=m +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_SUNXI_CCU=y +CONFIG_SUN50I_A64_CCU=y +CONFIG_SUN50I_A100_CCU=y +CONFIG_SUN50I_A100_R_CCU=y +CONFIG_SUN50I_H6_CCU=y +CONFIG_SUN50I_H616_CCU=y +CONFIG_SUN50I_H6_R_CCU=y +CONFIG_SUN6I_RTC_CCU=m +CONFIG_SUN8I_H3_CCU=y +CONFIG_SUN8I_DE2_CCU=y +CONFIG_SUN8I_DE33_CCU=y +CONFIG_SUN8I_R_CCU=y +# CONFIG_XILINX_VCU is not set +CONFIG_COMMON_CLK_XLNX_CLKWZRD=m +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_SUN4I_TIMER=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +# CONFIG_HISILICON_ERRATUM_161010101 is not set +# CONFIG_ARM64_ERRATUM_858921 is not set +CONFIG_SUN50I_ERRATUM_UNKNOWN1=y +# CONFIG_MICROCHIP_PIT64B is not set +# end of Clock Source drivers + +CONFIG_MAILBOX=y +CONFIG_ARM_MHU=y +CONFIG_ARM_MHU_V2=m +# CONFIG_PLATFORM_MHU is not set +# CONFIG_PL320_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +CONFIG_SUN6I_MSGBOX=y +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# CONFIG_IOMMU_IO_PGTABLE_DART is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +CONFIG_IOMMU_DEFAULT_DMA_STRICT=y +# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_SUN50I_IOMMU=y +CONFIG_ARM_SMMU=y +# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set +CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +# CONFIG_ARM_SMMU_V3 is not set +# CONFIG_VIRTIO_IOMMU is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# CONFIG_QUICC_ENGINE is not set +# CONFIG_FSL_RCPM is not set +# end of NXP/Freescale QorIQ SoC drivers + +# +# fujitsu SoC drivers +# +# end of fujitsu SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Enable LiteX SoC Builder specific drivers +# +CONFIG_LITEX=y +CONFIG_LITEX_SOC_CONTROLLER=m +# end of Enable LiteX SoC Builder specific drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +CONFIG_SUNXI_MBUS=y +CONFIG_SUNXI_SRAM=y +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +CONFIG_DEVFREQ_GOV_PASSIVE=y + +# +# DEVFREQ Drivers +# +CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ=m +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +CONFIG_EXTCON_PTN5150=m +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +CONFIG_EXTCON_USB_GPIO=y +CONFIG_EXTCON_USBC_TUSB320=m +# CONFIG_MEMORY is not set +CONFIG_IIO=m +CONFIG_IIO_BUFFER=y +CONFIG_IIO_BUFFER_CB=m +# CONFIG_IIO_BUFFER_DMA is not set +# CONFIG_IIO_BUFFER_DMAENGINE is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +CONFIG_IIO_CONFIGFS=m +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +CONFIG_IIO_SW_DEVICE=m +CONFIG_IIO_SW_TRIGGER=m +CONFIG_IIO_TRIGGERED_EVENT=m + +# +# Accelerometers +# +CONFIG_ADIS16201=m +CONFIG_ADIS16209=m +CONFIG_ADXL313=m +CONFIG_ADXL313_I2C=m +CONFIG_ADXL313_SPI=m +CONFIG_ADXL345=m +CONFIG_ADXL345_I2C=m +CONFIG_ADXL345_SPI=m +CONFIG_ADXL355=m +CONFIG_ADXL355_I2C=m +CONFIG_ADXL355_SPI=m +CONFIG_ADXL367=m +CONFIG_ADXL367_SPI=m +CONFIG_ADXL367_I2C=m +CONFIG_ADXL372=m +CONFIG_ADXL372_SPI=m +CONFIG_ADXL372_I2C=m +CONFIG_BMA180=m +CONFIG_BMA220=m +CONFIG_BMA400=m +CONFIG_BMA400_I2C=m +CONFIG_BMA400_SPI=m +CONFIG_BMC150_ACCEL=m +CONFIG_BMC150_ACCEL_I2C=m +CONFIG_BMC150_ACCEL_SPI=m +CONFIG_BMI088_ACCEL=m +CONFIG_BMI088_ACCEL_SPI=m +CONFIG_DA280=m +CONFIG_DA311=m +CONFIG_DMARD06=m +CONFIG_DMARD09=m +CONFIG_DMARD10=m +CONFIG_FXLS8962AF=m +CONFIG_FXLS8962AF_I2C=m +CONFIG_FXLS8962AF_SPI=m +CONFIG_HID_SENSOR_ACCEL_3D=m +CONFIG_IIO_ST_ACCEL_3AXIS=m +CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m +CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m +CONFIG_KXSD9=m +CONFIG_KXSD9_SPI=m +CONFIG_KXSD9_I2C=m +CONFIG_KXCJK1013=m +CONFIG_MC3230=m +CONFIG_MMA7455=m +CONFIG_MMA7455_I2C=m +CONFIG_MMA7455_SPI=m +CONFIG_MMA7660=m +CONFIG_MMA8452=m +CONFIG_MMA9551_CORE=m +CONFIG_MMA9551=m +CONFIG_MMA9553=m +CONFIG_MSA311=m +CONFIG_MXC4005=m +CONFIG_MXC6255=m +CONFIG_SCA3000=m +CONFIG_SCA3300=m +CONFIG_STK8312=m +CONFIG_STK8BA50=m +# end of Accelerometers + +# +# Analog to digital converters +# +CONFIG_AD_SIGMA_DELTA=m +CONFIG_AD7091R5=m +CONFIG_AD7124=m +# CONFIG_AD7192 is not set +CONFIG_AD7266=m +# CONFIG_AD7280 is not set +CONFIG_AD7291=m +CONFIG_AD7292=m +CONFIG_AD7298=m +CONFIG_AD7476=m +CONFIG_AD7606=m +CONFIG_AD7606_IFACE_PARALLEL=m +CONFIG_AD7606_IFACE_SPI=m +CONFIG_AD7766=m +CONFIG_AD7768_1=m +# CONFIG_AD7780 is not set +CONFIG_AD7791=m +CONFIG_AD7793=m +CONFIG_AD7887=m +CONFIG_AD7923=m +CONFIG_AD7949=m +CONFIG_AD799X=m +# CONFIG_ADI_AXI_ADC is not set +CONFIG_AXP20X_ADC=m +CONFIG_AXP288_ADC=m +CONFIG_CC10001_ADC=m +CONFIG_ENVELOPE_DETECTOR=m +CONFIG_HI8435=m +# CONFIG_HX711 is not set +CONFIG_INA2XX_ADC=m +CONFIG_LTC2471=m +CONFIG_LTC2485=m +CONFIG_LTC2496=m +CONFIG_LTC2497=m +CONFIG_MAX1027=m +CONFIG_MAX11100=m +CONFIG_MAX1118=m +CONFIG_MAX11205=m +# CONFIG_MAX1241 is not set +CONFIG_MAX1363=m +CONFIG_MAX9611=m +CONFIG_MCP320X=m +CONFIG_MCP3422=m +CONFIG_MCP3911=m +# CONFIG_NAU7802 is not set +CONFIG_QCOM_VADC_COMMON=m +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +CONFIG_QCOM_SPMI_ADC5=m +CONFIG_RICHTEK_RTQ6056=m +# CONFIG_SD_ADC_MODULATOR is not set +CONFIG_SUN4I_GPADC=m +CONFIG_TI_ADC081C=m +CONFIG_TI_ADC0832=m +CONFIG_TI_ADC084S021=m +CONFIG_TI_ADC12138=m +CONFIG_TI_ADC108S102=m +CONFIG_TI_ADC128S052=m +CONFIG_TI_ADC161S626=m +CONFIG_TI_ADS1015=m +CONFIG_TI_ADS7950=m +CONFIG_TI_ADS8344=m +CONFIG_TI_ADS8688=m +CONFIG_TI_ADS124S08=m +CONFIG_TI_ADS131E08=m +CONFIG_TI_TLC4541=m +CONFIG_TI_TSC2046=m +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog to digital and digital to analog converters +# +CONFIG_AD74413R=m +# end of Analog to digital and digital to analog converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +CONFIG_ADA4250=m +CONFIG_HMC425=m +# end of Amplifiers + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set +CONFIG_BME680=m +CONFIG_BME680_I2C=m +CONFIG_BME680_SPI=m +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +CONFIG_PMS7003=m +# CONFIG_SCD30_CORE is not set +CONFIG_SCD4X=m +CONFIG_SENSIRION_SGP30=m +CONFIG_SENSIRION_SGP40=m +CONFIG_SPS30=m +CONFIG_SPS30_I2C=m +CONFIG_SPS30_SERIAL=m +CONFIG_SENSEAIR_SUNRISE_CO2=m +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +# +# Hid Sensor IIO Common +# +CONFIG_HID_SENSOR_IIO_COMMON=m +CONFIG_HID_SENSOR_IIO_TRIGGER=m +# end of Hid Sensor IIO Common + +CONFIG_IIO_MS_SENSORS_I2C=m + +# +# IIO SCMI Sensors +# +CONFIG_IIO_SCMI=m +# end of IIO SCMI Sensors + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +CONFIG_IIO_ST_SENSORS_I2C=m +CONFIG_IIO_ST_SENSORS_SPI=m +CONFIG_IIO_ST_SENSORS_CORE=m + +# +# Digital to analog converters +# +CONFIG_AD3552R=m +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +CONFIG_LTC2688=m +CONFIG_AD5686=m +CONFIG_AD5686_SPI=m +CONFIG_AD5696_I2C=m +# CONFIG_AD5755 is not set +CONFIG_AD5758=m +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +CONFIG_AD5766=m +CONFIG_AD5770R=m +# CONFIG_AD5791 is not set +CONFIG_AD7293=m +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +CONFIG_LTC1660=m +# CONFIG_LTC2632 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +CONFIG_TI_DAC5571=m +CONFIG_TI_DAC7311=m +CONFIG_TI_DAC7612=m +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +CONFIG_IIO_SIMPLE_DUMMY=m +# CONFIG_IIO_SIMPLE_DUMMY_EVENTS is not set +# CONFIG_IIO_SIMPLE_DUMMY_BUFFER is not set +# end of IIO dummy driver + +# +# Filters +# +CONFIG_ADMV8818=m +# end of Filters + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# CONFIG_ADMV1013 is not set +CONFIG_ADMV1014=m +CONFIG_ADMV4420=m +CONFIG_ADRF6780=m +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +CONFIG_ADIS16080=m +CONFIG_ADIS16130=m +CONFIG_ADIS16136=m +CONFIG_ADIS16260=m +# CONFIG_ADXRS290 is not set +CONFIG_ADXRS450=m +CONFIG_BMG160=m +CONFIG_BMG160_I2C=m +CONFIG_BMG160_SPI=m +CONFIG_FXAS21002C=m +CONFIG_FXAS21002C_I2C=m +CONFIG_FXAS21002C_SPI=m +CONFIG_HID_SENSOR_GYRO_3D=m +CONFIG_MPU3050=m +CONFIG_MPU3050_I2C=m +CONFIG_IIO_ST_GYRO_3AXIS=m +CONFIG_IIO_ST_GYRO_I2C_3AXIS=m +CONFIG_IIO_ST_GYRO_SPI_3AXIS=m +CONFIG_ITG3200=m +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +CONFIG_AM2315=m +CONFIG_DHT11=m +CONFIG_HDC100X=m +# CONFIG_HDC2010 is not set +CONFIG_HID_SENSOR_HUMIDITY=m +CONFIG_HTS221=m +CONFIG_HTS221_I2C=m +CONFIG_HTS221_SPI=m +CONFIG_HTU21=m +CONFIG_SI7005=m +CONFIG_SI7020=m +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +CONFIG_ADIS16460=m +# CONFIG_ADIS16475 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +CONFIG_BOSCH_BNO055=m +CONFIG_BOSCH_BNO055_SERIAL=m +CONFIG_BOSCH_BNO055_I2C=m +CONFIG_FXOS8700=m +CONFIG_FXOS8700_I2C=m +CONFIG_FXOS8700_SPI=m +# CONFIG_KMX61 is not set +# CONFIG_INV_ICM42600_I2C is not set +# CONFIG_INV_ICM42600_SPI is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +CONFIG_IIO_ST_LSM9DS0=m +CONFIG_IIO_ST_LSM9DS0_I2C=m +CONFIG_IIO_ST_LSM9DS0_SPI=m +# end of Inertial measurement units + +CONFIG_IIO_ADIS_LIB=m +CONFIG_IIO_ADIS_LIB_BUFFER=y + +# +# Light sensors +# +CONFIG_ADJD_S311=m +CONFIG_ADUX1020=m +CONFIG_AL3010=m +CONFIG_AL3320A=m +CONFIG_APDS9300=m +CONFIG_APDS9960=m +# CONFIG_AS73211 is not set +CONFIG_BH1750=m +CONFIG_BH1780=m +CONFIG_CM32181=m +CONFIG_CM3232=m +CONFIG_CM3323=m +CONFIG_CM3605=m +CONFIG_CM36651=m +CONFIG_GP2AP002=m +CONFIG_GP2AP020A00F=m +CONFIG_IQS621_ALS=m +CONFIG_SENSORS_ISL29018=m +CONFIG_SENSORS_ISL29028=m +CONFIG_ISL29125=m +CONFIG_HID_SENSOR_ALS=m +CONFIG_HID_SENSOR_PROX=m +CONFIG_JSA1212=m +CONFIG_RPR0521=m +CONFIG_LTR501=m +CONFIG_LTRF216A=m +CONFIG_LV0104CS=m +CONFIG_MAX44000=m +CONFIG_MAX44009=m +CONFIG_NOA1305=m +CONFIG_OPT3001=m +CONFIG_PA12203001=m +CONFIG_SI1133=m +CONFIG_SI1145=m +CONFIG_STK3310=m +CONFIG_ST_UVIS25=m +CONFIG_ST_UVIS25_I2C=m +CONFIG_ST_UVIS25_SPI=m +CONFIG_TCS3414=m +CONFIG_TCS3472=m +CONFIG_SENSORS_TSL2563=m +CONFIG_TSL2583=m +CONFIG_TSL2591=m +CONFIG_TSL2772=m +CONFIG_TSL4531=m +CONFIG_US5182D=m +CONFIG_VCNL4000=m +CONFIG_VCNL4035=m +CONFIG_VEML6030=m +CONFIG_VEML6070=m +CONFIG_VL6180=m +CONFIG_ZOPT2201=m +# end of Light sensors + +# +# Magnetometer sensors +# +CONFIG_AK8974=m +CONFIG_AK8975=m +CONFIG_AK09911=m +CONFIG_BMC150_MAGN=m +CONFIG_BMC150_MAGN_I2C=m +CONFIG_BMC150_MAGN_SPI=m +CONFIG_MAG3110=m +CONFIG_HID_SENSOR_MAGNETOMETER_3D=m +CONFIG_MMC35240=m +CONFIG_IIO_ST_MAGN_3AXIS=m +CONFIG_IIO_ST_MAGN_I2C_3AXIS=m +CONFIG_IIO_ST_MAGN_SPI_3AXIS=m +CONFIG_SENSORS_HMC5843=m +CONFIG_SENSORS_HMC5843_I2C=m +CONFIG_SENSORS_HMC5843_SPI=m +CONFIG_SENSORS_RM3100=m +CONFIG_SENSORS_RM3100_I2C=m +CONFIG_SENSORS_RM3100_SPI=m +CONFIG_YAMAHA_YAS530=m +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +CONFIG_HID_SENSOR_INCLINOMETER_3D=m +CONFIG_HID_SENSOR_DEVICE_ROTATION=m +# end of Inclinometer sensors + +# +# Triggers - standalone +# +CONFIG_IIO_HRTIMER_TRIGGER=m +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +CONFIG_IIO_TIGHTLOOP_TRIGGER=m +# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Triggers - standalone + +# +# Linear and angular position sensors +# +CONFIG_IQS624_POS=m +CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=m +# end of Linear and angular position sensors + +# +# Digital potentiometers +# +CONFIG_AD5110=m +CONFIG_AD5272=m +CONFIG_DS1803=m +CONFIG_MAX5432=m +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +CONFIG_MCP4018=m +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +CONFIG_MCP41010=m +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +CONFIG_BMP280=m +CONFIG_BMP280_I2C=m +CONFIG_BMP280_SPI=m +CONFIG_DLHL60D=m +# CONFIG_DPS310 is not set +# CONFIG_HID_SENSOR_PRESS is not set +# CONFIG_HP03 is not set +CONFIG_ICP10100=m +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +CONFIG_ISL29501=m +# CONFIG_LIDAR_LITE_V2 is not set +CONFIG_MB1232=m +CONFIG_PING=m +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +CONFIG_SX_COMMON=m +# CONFIG_SX9310 is not set +CONFIG_SX9324=m +CONFIG_SX9360=m +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set +CONFIG_VL53L0X_I2C=m +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +CONFIG_IQS620AT_TEMP=m +CONFIG_LTC2983=m +CONFIG_MAXIM_THERMOCOUPLE=m +CONFIG_HID_SENSOR_TEMP=m +CONFIG_MLX90614=m +# CONFIG_MLX90632 is not set +CONFIG_TMP006=m +CONFIG_TMP007=m +CONFIG_TMP117=m +CONFIG_TSYS01=m +CONFIG_TSYS02D=m +CONFIG_MAX31856=m +CONFIG_MAX31865=m +# end of Temperature sensors + +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_PWM_ATMEL_TCB=m +CONFIG_PWM_CLK=m +# CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_IQS620A is not set +CONFIG_PWM_NTXEC=m +CONFIG_PWM_PCA9685=m +CONFIG_PWM_SUN4I=m +CONFIG_PWM_SUNXI_ENHANCE=y +CONFIG_PWM_XILINX=m + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +# CONFIG_AL_FIC is not set +CONFIG_MADERA_IRQ=m +CONFIG_SUN6I_R_INTC=y +CONFIG_SUNXI_NMI_INTC=y +# CONFIG_XILINX_INTC is not set +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SCMI=y +CONFIG_RESET_SIMPLE=y +CONFIG_RESET_SUNXI=y +# CONFIG_RESET_TI_SYSCON is not set +CONFIG_RESET_TI_TPS380X=m + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PHY_MIPI_DPHY=y +# CONFIG_PHY_XGENE is not set +CONFIG_PHY_CAN_TRANSCEIVER=m +CONFIG_PHY_SUN4I_USB=y +CONFIG_PHY_SUN6I_MIPI_DPHY=y +CONFIG_PHY_SUN9I_USB=y +CONFIG_PHY_SUN50I_USB3=y + +# +# PHY drivers for Broadcom platforms +# +# CONFIG_BCM_KONA_USB2_PHY is not set +# end of PHY drivers for Broadcom platforms + +CONFIG_PHY_CADENCE_TORRENT=m +CONFIG_PHY_CADENCE_DPHY=m +CONFIG_PHY_CADENCE_DPHY_RX=m +CONFIG_PHY_CADENCE_SIERRA=m +# CONFIG_PHY_CADENCE_SALVO is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +CONFIG_PHY_LAN966X_SERDES=m +# CONFIG_PHY_CPCAP_USB is not set +CONFIG_PHY_MAPPHONE_MDM6600=m +CONFIG_PHY_OCELOT_SERDES=m +CONFIG_PHY_SAMSUNG_USB2=y +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_CCI_PMU=m +# CONFIG_ARM_CCI400_PMU is not set +# CONFIG_ARM_CCI5xx_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_ARM_CMN is not set +CONFIG_ARM_PMU=y +CONFIG_ARM_DSU_PMU=m +CONFIG_ARM_SPE_PMU=m +# end of Performance monitor support + +CONFIG_RAS=y + +# +# Android +# +# CONFIG_ANDROID_BINDER_IPC is not set +# end of Android + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_RAVE_SP_EEPROM=m +CONFIG_NVMEM_RMEM=m +CONFIG_NVMEM_SPMI_SDAM=m +CONFIG_NVMEM_SUNXI_SID=y +CONFIG_NVMEM_U_BOOT_ENV=m + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +# CONFIG_TEE is not set +CONFIG_MULTIPLEXER=m + +# +# Multiplexer drivers +# +CONFIG_MUX_ADG792A=m +CONFIG_MUX_ADGS1408=m +CONFIG_MUX_GPIO=m +CONFIG_MUX_MMIO=m +# end of Multiplexer drivers + +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +CONFIG_COUNTER=m +CONFIG_INTERRUPT_CNT=m +CONFIG_FTM_QUADDEC=m +# CONFIG_MICROCHIP_TCB_CAPTURE is not set +CONFIG_MOST=m +# CONFIG_MOST_USB_HDM is not set +# CONFIG_MOST_CDEV is not set +CONFIG_MOST_SND=m +CONFIG_PECI=m +CONFIG_PECI_CPU=m +# CONFIG_HTE is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_VALIDATE_FS_PARSER=y +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_XFS_FS=m +CONFIG_XFS_SUPPORT_V4=y +# CONFIG_XFS_QUOTA is not set +CONFIG_XFS_POSIX_ACL=y +CONFIG_XFS_RT=y +# CONFIG_XFS_ONLINE_SCRUB is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=y +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +CONFIG_F2FS_FS=y +CONFIG_F2FS_STAT_FS=y +CONFIG_F2FS_FS_XATTR=y +CONFIG_F2FS_FS_POSIX_ACL=y +CONFIG_F2FS_FS_SECURITY=y +# CONFIG_F2FS_CHECK_FS is not set +# CONFIG_F2FS_FAULT_INJECTION is not set +CONFIG_F2FS_FS_COMPRESSION=y +CONFIG_F2FS_FS_LZO=y +CONFIG_F2FS_FS_LZORLE=y +CONFIG_F2FS_FS_LZ4=y +CONFIG_F2FS_FS_LZ4HC=y +CONFIG_F2FS_FS_ZSTD=y +CONFIG_F2FS_IOSTAT=y +# CONFIG_F2FS_UNFAIR_RWSEM is not set +CONFIG_ZONEFS_FS=m +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_FILE_LOCKING=y +CONFIG_FS_ENCRYPTION=y +CONFIG_FS_ENCRYPTION_ALGS=y +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=m +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=m +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +CONFIG_VIRTIO_FS=m +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +CONFIG_NETFS_SUPPORT=m +# CONFIG_NETFS_STATS is not set +CONFIG_FSCACHE=m +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_DEBUG is not set +CONFIG_CACHEFILES=m +# CONFIG_CACHEFILES_DEBUG is not set +# CONFIG_CACHEFILES_ERROR_INJECTION is not set +# CONFIG_CACHEFILES_ONDEMAND is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/EXFAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +CONFIG_EXFAT_FS=m +CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" +# CONFIG_NTFS_FS is not set +CONFIG_NTFS3_FS=m +# CONFIG_NTFS3_64BIT_CLUSTER is not set +CONFIG_NTFS3_LZX_XPRESS=y +CONFIG_NTFS3_FS_POSIX_ACL=y +# end of DOS/FAT/EXFAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_CHILDREN=y +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_INODE64 is not set +CONFIG_ARCH_SUPPORTS_HUGETLBFS=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +CONFIG_ORANGEFS_FS=m +CONFIG_ADFS_FS=m +# CONFIG_ADFS_FS_RW is not set +CONFIG_AFFS_FS=m +CONFIG_ECRYPT_FS=y +CONFIG_ECRYPT_FS_MESSAGING=y +CONFIG_HFS_FS=m +CONFIG_HFSPLUS_FS=m +CONFIG_BEFS_FS=m +# CONFIG_BEFS_DEBUG is not set +CONFIG_BFS_FS=m +CONFIG_EFS_FS=m +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +# CONFIG_JFFS2_CMODE_PRIORITY is not set +# CONFIG_JFFS2_CMODE_SIZE is not set +CONFIG_JFFS2_CMODE_FAVOURLZO=y +CONFIG_CRAMFS=m +CONFIG_CRAMFS_BLOCKDEV=y +CONFIG_CRAMFS_MTD=y +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_FILE_CACHE is not set +CONFIG_SQUASHFS_FILE_DIRECT=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +CONFIG_VXFS_FS=m +CONFIG_MINIX_FS=m +CONFIG_OMFS_FS=m +CONFIG_HPFS_FS=m +CONFIG_QNX4FS_FS=m +CONFIG_QNX6FS_FS=m +# CONFIG_QNX6FS_DEBUG is not set +CONFIG_ROMFS_FS=m +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240 +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +CONFIG_PSTORE_RAM=m +CONFIG_PSTORE_ZONE=m +CONFIG_PSTORE_BLK=m +CONFIG_PSTORE_BLK_BLKDEV="m" +CONFIG_PSTORE_BLK_KMSG_SIZE=64 +CONFIG_PSTORE_BLK_MAX_REASON=2 +CONFIG_SYSV_FS=m +CONFIG_UFS_FS=m +# CONFIG_UFS_FS_WRITE is not set +# CONFIG_UFS_DEBUG is not set +CONFIG_EROFS_FS=m +# CONFIG_EROFS_FS_DEBUG is not set +CONFIG_EROFS_FS_XATTR=y +CONFIG_EROFS_FS_POSIX_ACL=y +CONFIG_EROFS_FS_SECURITY=y +# CONFIG_EROFS_FS_ZIP is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=m +CONFIG_NFS_V2=m +CONFIG_NFS_V3=m +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=m +CONFIG_NFS_SWAP=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=m +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +CONFIG_NFS_V4_1_MIGRATION=y +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_NFS_FSCACHE=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +CONFIG_NFS_DEBUG=y +CONFIG_NFS_DISABLE_UDP_SUPPORT=y +# CONFIG_NFS_V4_2_READ_PLUS is not set +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_PNFS=y +CONFIG_NFSD_BLOCKLAYOUT=y +CONFIG_NFSD_SCSILAYOUT=y +CONFIG_NFSD_FLEXFILELAYOUT=y +# CONFIG_NFSD_V4_2_INTER_SSC is not set +CONFIG_NFSD_V4_SECURITY_LABEL=y +CONFIG_GRACE_PERIOD=m +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_NFS_V4_2_SSC_HELPER=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_SUNRPC_SWAP=y +CONFIG_RPCSEC_GSS_KRB5=m +# CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES is not set +CONFIG_SUNRPC_DEBUG=y +CONFIG_CEPH_FS=m +CONFIG_CEPH_FSCACHE=y +CONFIG_CEPH_FS_POSIX_ACL=y +CONFIG_CEPH_FS_SECURITY_LABEL=y +CONFIG_CIFS=m +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +CONFIG_CIFS_DEBUG=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set +CONFIG_CIFS_DFS_UPCALL=y +# CONFIG_CIFS_SWN_UPCALL is not set +CONFIG_CIFS_FSCACHE=y +CONFIG_SMB_SERVER=m +CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y +CONFIG_SMB_SERVER_KERBEROS5=y +CONFIG_SMBFS_COMMON=m +CONFIG_CODA_FS=m +CONFIG_AFS_FS=m +# CONFIG_AFS_DEBUG is not set +CONFIG_AFS_FSCACHE=y +# CONFIG_AFS_DEBUG_CURSOR is not set +CONFIG_9P_FS=m +CONFIG_9P_FSCACHE=y +CONFIG_9P_FS_POSIX_ACL=y +CONFIG_9P_FS_SECURITY=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_MAC_ROMAN=m +CONFIG_NLS_MAC_CELTIC=m +CONFIG_NLS_MAC_CENTEURO=m +CONFIG_NLS_MAC_CROATIAN=m +CONFIG_NLS_MAC_CYRILLIC=m +CONFIG_NLS_MAC_GAELIC=m +CONFIG_NLS_MAC_GREEK=m +CONFIG_NLS_MAC_ICELAND=m +CONFIG_NLS_MAC_INUIT=m +CONFIG_NLS_MAC_ROMANIAN=m +CONFIG_NLS_MAC_TURKISH=m +CONFIG_NLS_UTF8=m +CONFIG_DLM=m +# CONFIG_DLM_DEPRECATED_API is not set +# CONFIG_DLM_DEBUG is not set +CONFIG_UNICODE=y +# CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set +CONFIG_IO_WQ=y +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_REQUEST_CACHE=y +CONFIG_PERSISTENT_KEYRINGS=y +CONFIG_TRUSTED_KEYS=y +CONFIG_TRUSTED_KEYS_TPM=y +CONFIG_ENCRYPTED_KEYS=y +# CONFIG_USER_DECRYPTED_DATA is not set +CONFIG_KEY_DH_OPERATIONS=y +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_NETWORK=y +CONFIG_SECURITY_NETWORK_XFRM=y +CONFIG_SECURITY_PATH=y +CONFIG_LSM_MMAP_MIN_ADDR=0 +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +CONFIG_HARDENED_USERCOPY=y +CONFIG_FORTIFY_SOURCE=y +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +# CONFIG_SECURITY_SELINUX_DISABLE is not set +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 +CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 +CONFIG_SECURITY_SMACK=y +# CONFIG_SECURITY_SMACK_BRINGUP is not set +CONFIG_SECURITY_SMACK_NETFILTER=y +CONFIG_SECURITY_SMACK_APPEND_SIGNALS=y +CONFIG_SECURITY_TOMOYO=y +CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048 +CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024 +# CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set +CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init" +CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init" +# CONFIG_SECURITY_TOMOYO_INSECURE_BUILTIN_SETTING is not set +CONFIG_SECURITY_APPARMOR=y +# CONFIG_SECURITY_APPARMOR_DEBUG is not set +CONFIG_SECURITY_APPARMOR_INTROSPECT_POLICY=y +CONFIG_SECURITY_APPARMOR_HASH=y +CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y +CONFIG_SECURITY_APPARMOR_EXPORT_BINARY=y +CONFIG_SECURITY_APPARMOR_PARANOID_LOAD=y +# CONFIG_SECURITY_LOADPIN is not set +CONFIG_SECURITY_YAMA=y +CONFIG_SECURITY_SAFESETID=y +CONFIG_SECURITY_LOCKDOWN_LSM=y +CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y +CONFIG_LOCK_DOWN_KERNEL_FORCE_NONE=y +# CONFIG_LOCK_DOWN_KERNEL_FORCE_INTEGRITY is not set +# CONFIG_LOCK_DOWN_KERNEL_FORCE_CONFIDENTIALITY is not set +# CONFIG_SECURITY_LANDLOCK is not set +CONFIG_INTEGRITY=y +CONFIG_INTEGRITY_SIGNATURE=y +CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y +CONFIG_INTEGRITY_TRUSTED_KEYRING=y +CONFIG_INTEGRITY_PLATFORM_KEYRING=y +CONFIG_INTEGRITY_AUDIT=y +CONFIG_IMA=y +CONFIG_IMA_MEASURE_PCR_IDX=10 +CONFIG_IMA_LSM_RULES=y +CONFIG_IMA_NG_TEMPLATE=y +# CONFIG_IMA_SIG_TEMPLATE is not set +CONFIG_IMA_DEFAULT_TEMPLATE="ima-ng" +CONFIG_IMA_DEFAULT_HASH_SHA1=y +# CONFIG_IMA_DEFAULT_HASH_SHA256 is not set +# CONFIG_IMA_DEFAULT_HASH_SHA512 is not set +CONFIG_IMA_DEFAULT_HASH="sha1" +# CONFIG_IMA_WRITE_POLICY is not set +# CONFIG_IMA_READ_POLICY is not set +CONFIG_IMA_APPRAISE=y +# CONFIG_IMA_ARCH_POLICY is not set +# CONFIG_IMA_APPRAISE_BUILD_POLICY is not set +CONFIG_IMA_APPRAISE_BOOTPARAM=y +# CONFIG_IMA_APPRAISE_MODSIG is not set +CONFIG_IMA_TRUSTED_KEYRING=y +# CONFIG_IMA_KEYRINGS_PERMIT_SIGNED_BY_BUILTIN_OR_SECONDARY is not set +# CONFIG_IMA_BLACKLIST_KEYRING is not set +# CONFIG_IMA_LOAD_X509 is not set +CONFIG_IMA_MEASURE_ASYMMETRIC_KEYS=y +CONFIG_IMA_QUEUE_EARLY_BOOT_KEYS=y +# CONFIG_IMA_DISABLE_HTABLE is not set +CONFIG_EVM=y +CONFIG_EVM_ATTR_FSUUID=y +CONFIG_EVM_EXTRA_SMACK_XATTRS=y +# CONFIG_EVM_ADD_XATTRS is not set +# CONFIG_EVM_LOAD_X509 is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_APPARMOR=y +# CONFIG_DEFAULT_SECURITY_DAC is not set +CONFIG_LSM="lockdown,yama,integrity,apparmor" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y +# CONFIG_ZERO_CALL_USED_REGS is not set +# end of Memory initialization + +CONFIG_RANDSTRUCT_NONE=y +# end of Kernel hardening options +# end of Security options + +CONFIG_XOR_BLOCKS=y +CONFIG_ASYNC_CORE=y +CONFIG_ASYNC_MEMCPY=y +CONFIG_ASYNC_XOR=y +CONFIG_ASYNC_PQ=y +CONFIG_ASYNC_RAID6_RECOV=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SKCIPHER=y +CONFIG_CRYPTO_SKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_USER=m +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_PCRYPT=m +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_ENGINE=y +# end of Crypto core or helper + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_DH=y +# CONFIG_CRYPTO_DH_RFC7919_GROUPS is not set +CONFIG_CRYPTO_ECC=m +CONFIG_CRYPTO_ECDH=m +CONFIG_CRYPTO_ECDSA=m +CONFIG_CRYPTO_ECRDSA=m +# CONFIG_CRYPTO_SM2 is not set +CONFIG_CRYPTO_CURVE25519=m +# end of Public-key cryptography + +# +# Block ciphers +# +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_AES_TI=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARIA=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_BLOWFISH_COMMON=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST_COMMON=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_SM4=m +CONFIG_CRYPTO_SM4_GENERIC=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +# end of Block ciphers + +# +# Length-preserving ciphers and modes +# +CONFIG_CRYPTO_ADIANTUM=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_CHACHA20=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CFB=m +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_HCTR2=m +CONFIG_CRYPTO_KEYWRAP=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_OFB=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XCTR=m +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_NHPOLY1305=m +# end of Length-preserving ciphers and modes + +# +# AEAD (authenticated encryption with associated data) ciphers +# +CONFIG_CRYPTO_AEGIS128=m +CONFIG_CRYPTO_AEGIS128_SIMD=y +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=m +CONFIG_CRYPTO_ESSIV=m +# end of AEAD (authenticated encryption with associated data) ciphers + +# +# Hashes, digests, and MACs +# +CONFIG_CRYPTO_BLAKE2B=y +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_POLYVAL=m +CONFIG_CRYPTO_POLY1305=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=m +CONFIG_CRYPTO_SM3_GENERIC=m +CONFIG_CRYPTO_STREEBOG=m +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_XXHASH=y +# end of Hashes, digests, and MACs + +# +# CRCs (cyclic redundancy checks) +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRC64_ROCKSOFT=y +# end of CRCs (cyclic redundancy checks) + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_842=m +CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_LZ4HC=m +CONFIG_CRYPTO_ZSTD=y +# end of Compression + +# +# Random number generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_KDF800108_CTR=y +# end of Random number generation + +# +# Userspace interface +# +CONFIG_CRYPTO_USER_API=m +CONFIG_CRYPTO_USER_API_HASH=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +CONFIG_CRYPTO_USER_API_RNG=m +# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set +CONFIG_CRYPTO_USER_API_AEAD=m +CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +# CONFIG_CRYPTO_STATS is not set +# end of Userspace interface + +CONFIG_CRYPTO_HASH_INFO=y +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +CONFIG_CRYPTO_CHACHA20_NEON=y + +# +# Accelerated Cryptographic Algorithms for CPU (arm64) +# +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_POLY1305_NEON=m +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64=y +# CONFIG_CRYPTO_SHA512_ARM64_CE is not set +# CONFIG_CRYPTO_SHA3_ARM64 is not set +CONFIG_CRYPTO_SM3_NEON=m +# CONFIG_CRYPTO_SM3_ARM64_CE is not set +CONFIG_CRYPTO_POLYVAL_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y +CONFIG_CRYPTO_AES_ARM64_BS=y +CONFIG_CRYPTO_SM4_ARM64_CE=m +CONFIG_CRYPTO_SM4_ARM64_CE_BLK=m +CONFIG_CRYPTO_SM4_ARM64_NEON_BLK=m +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +# end of Accelerated Cryptographic Algorithms for CPU (arm64) + +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_DEV_ALLWINNER=y +CONFIG_CRYPTO_DEV_SUN4I_SS=y +CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y +# CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG is not set +CONFIG_CRYPTO_DEV_SUN8I_CE=y +# CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG is not set +CONFIG_CRYPTO_DEV_SUN8I_CE_HASH=y +CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG=y +CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG=y +CONFIG_CRYPTO_DEV_SUN8I_SS=y +# CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG is not set +CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG=y +CONFIG_CRYPTO_DEV_SUN8I_SS_HASH=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +CONFIG_CRYPTO_DEV_VIRTIO=m +CONFIG_CRYPTO_DEV_SAFEXCEL=m +CONFIG_CRYPTO_DEV_CCREE=m +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m +# CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_PKCS8_PRIVATE_KEY_PARSER=m +CONFIG_PKCS7_MESSAGE_PARSER=y +CONFIG_PKCS7_TEST_KEY=m +CONFIG_SIGNED_PE_FILE_VERIFICATION=y +# CONFIG_FIPS_SIGNATURE_SELFTEST is not set + +# +# Certificates for signature checking +# +CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" +CONFIG_MODULE_SIG_KEY_TYPE_RSA=y +# CONFIG_MODULE_SIG_KEY_TYPE_ECDSA is not set +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +CONFIG_SYSTEM_EXTRA_CERTIFICATE=y +CONFIG_SYSTEM_EXTRA_CERTIFICATE_SIZE=4096 +CONFIG_SECONDARY_TRUSTED_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" +# CONFIG_SYSTEM_REVOCATION_LIST is not set +# CONFIG_SYSTEM_BLACKLIST_AUTH_UPDATE is not set +# end of Certificates for signature checking + +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_RAID6_PQ=y +CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y +CONFIG_PACKING=y +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_CORDIC=m +CONFIG_PRIME_NUMBERS=m +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y +# CONFIG_INDIRECT_PIO is not set + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_ARC4=m +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y +CONFIG_CRYPTO_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 +CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC64_ROCKSOFT=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC64=y +CONFIG_CRC4=m +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +CONFIG_CRC8=m +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_842_COMPRESS=m +CONFIG_842_DECOMPRESS=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_COMPRESS=y +CONFIG_LZ4HC_COMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +# CONFIG_XZ_DEC_MICROLZMA is not set +CONFIG_XZ_DEC_BCJ=y +CONFIG_XZ_DEC_TEST=m +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_DECOMPRESS_ZSTD=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_REED_SOLOMON=m +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_REED_SOLOMON_DEC16=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_XARRAY_MULTI=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_DMA=y +CONFIG_DMA_OPS=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_SWIOTLB=y +# CONFIG_DMA_RESTRICTED_POOL is not set +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_CMA=y +CONFIG_DMA_PERNUMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=128 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set +CONFIG_SGL_ALLOC=y +# CONFIG_FORCE_NR_CPUS is not set +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_LRU_CACHE=m +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_SIGNATURE=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_FONT_SUPPORT=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +CONFIG_FONT_ACORN_8x8=y +# CONFIG_FONT_MINI_4x6 is not set +CONFIG_FONT_6x10=y +# CONFIG_FONT_10x18 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +CONFIG_FONT_TER16x32=y +# CONFIG_FONT_6x8 is not set +CONFIG_SG_POOL=y +CONFIG_ARCH_STACKWALK=y +CONFIG_STACKDEPOT=y +CONFIG_SBITMAP=y +# end of Library routines + +CONFIG_GENERIC_IOREMAP=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_ASN1_ENCODER=y +CONFIG_POLYNOMIAL=m + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +# CONFIG_STACKTRACE_BUILD_ID is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DYNAMIC_DEBUG_CORE=y +CONFIG_SYMBOLIC_ERRNAME=y +CONFIG_DEBUG_BUGVERBOSE=y +# end of printk and dmesg options + +# CONFIG_DEBUG_KERNEL is not set + +# +# Compile-time checks and compiler options +# +CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_HEADERS_INSTALL is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# end of Compile-time checks and compiler options + +# +# Generic Kernel Debugging Instruments +# +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ALLOW_ALL=y +# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set +# CONFIG_DEBUG_FS_ALLOW_NONE is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_HAVE_KCSAN_COMPILER=y +# end of Generic Kernel Debugging Instruments + +# +# Networking Debugging +# +# end of Networking Debugging + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_PAGE_TABLE_CHECK is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set +CONFIG_GENERIC_PTDUMP=y +# CONFIG_SHRINKER_DEBUG is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VM_PGTABLE is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_HW_TAGS=y +CONFIG_HAVE_ARCH_KASAN_VMALLOC=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_KASAN_SW_TAGS=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y +# CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +# end of Memory Debugging + +# +# Debug Oops, Lockups and Hangs +# +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_TEST_LOCKUP=m +# end of Debug Oops, Lockups and Hangs + +# +# Scheduler Debugging +# +CONFIG_SCHED_INFO=y +# end of Scheduler Debugging + +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_WW_MUTEX_SELFTEST is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_DEBUG_IRQFLAGS is not set +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set + +# +# Debug kernel data structures +# +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Debug kernel data structures + +# +# RCU Debugging +# +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 +# end of RCU Debugging + +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +# CONFIG_STRICT_DEVMEM is not set + +# +# arm64 Debugging +# +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of arm64 Debugging + +# +# Kernel Testing and Coverage +# +# CONFIG_KUNIT is not set +CONFIG_FUNCTION_ERROR_INJECTION=y +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_LKDTM is not set +CONFIG_TEST_MIN_HEAP=m +CONFIG_TEST_DIV64=m +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_ASYNC_RAID6_TEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_STRING_SELFTEST is not set +# CONFIG_TEST_STRING_HELPERS is not set +CONFIG_TEST_STRSCPY=m +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +CONFIG_TEST_SCANF=m +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +CONFIG_TEST_XARRAY=m +# CONFIG_TEST_MAPLE_TREE is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_SIPHASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +CONFIG_TEST_BPF=m +CONFIG_TEST_BLACKHOLE_DEV=m +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +CONFIG_TEST_DYNAMIC_DEBUG=m +# CONFIG_TEST_KMOD is not set +CONFIG_TEST_MEMCAT_P=m +# CONFIG_TEST_MEMINIT is not set +# CONFIG_TEST_FREE_PAGES is not set +CONFIG_ARCH_USE_MEMTEST=y +# CONFIG_MEMTEST is not set +# end of Kernel Testing and Coverage + +# +# Rust hacking +# +# end of Rust hacking +# end of Kernel hacking \ No newline at end of file diff --git a/recipes-kernel/linux/linux-xunlong_6.1.31.bb b/recipes-kernel/linux/linux-xunlong_6.1.31.bb new file mode 100644 index 0000000..942b37f --- /dev/null +++ b/recipes-kernel/linux/linux-xunlong_6.1.31.bb @@ -0,0 +1,56 @@ +DESCRIPTION = "Linux Kernel for Raspberry Pi" +SECTION = "kernel" +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +SRCREV_machine = "3495b5ee0594566c9fed930b96b1cae90600412e" +# SRCREV_meta = "1a97a82e62ebf4ef3787768a1f5937e2d2f280ce" + +# COMPATIBLE_MACHINE ?= "^orange-pi-zero2w$" +COMPATIBLE_MACHINE = "(sun4i|sun5i|sun7i|sun8i|sun50i)" + +LINUX_OPI_BRANCH ?= "orange-pi-6.1-sun50iw9" + +SRC_URI = " \ + git://github.com/orangepi-xunlong/linux-orangepi.git;name=machine;branch=${LINUX_OPI_BRANCH};protocol=https \ + file://defconfig \ + file://0003-enable-mali-gpu.patch \ + file://0004-fix-unisocwcn-include-path.patch \ + " +# file://0002-fix-rtl8822c-compi-error.patch +# file://0005-fix-rtl8xxx-include-path.patch + +# Pull in the devicetree files into the rootfs +RDEPENDS_${KERNEL_PACKAGE_NAME}-base += "kernel-devicetree" + +KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}" + +inherit kernel + +require linux.inc + +LINUX_VERSION ?= "${PV}" +S = "${WORKDIR}/linux-${PV}" + +do_deploy:append() { + install -d ${DEPLOY_DIR_IMAGE} + install -d ${DEPLOY_DIR_IMAGE}/allwinner + install -d ${DEPLOY_DIR_IMAGE}/allwinner/overlay + for file in ${KERNEL_DEVICETREE}; do + name=$(basename $file) + ext="${name##*.}" + if [ "$ext" = "dtb" ]; then + ln -sf ${DEPLOY_DIR_IMAGE}/${name} ${DEPLOY_DIR_IMAGE}/allwinner/${name} + else + ln -sf ${DEPLOY_DIR_IMAGE}/${name} ${DEPLOY_DIR_IMAGE}/allwinner/overlay/${name} + fi + done + install -m 0755 ${S}/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr ${DEPLOY_DIR_IMAGE}/allwinner/overlay/ + +} + +# allwinner/overlay/sun50i-h616-fixup.scr + +FILES_${KERNEL_PACKAGE_NAME}-base:append = " ${nonarch_base_libdir}/modules/${KERNEL_VERSION}/modules.builtin.modinfo" diff --git a/recipes-kernel/linux/linux.inc b/recipes-kernel/linux/linux.inc new file mode 100644 index 0000000..95d9ec1 --- /dev/null +++ b/recipes-kernel/linux/linux.inc @@ -0,0 +1,126 @@ +DESCRIPTION = "Linux Kernel" +SECTION = "kernel" +LICENSE = "GPLv2" + +INC_PR = "r0" + +inherit kernel kernel-yocto siteinfo + +# Enable OABI compat for people stuck with obsolete userspace +ARM_KEEP_OABI ?= "0" + +# Set the verbosity of kernel messages during runtime +# You can define CMDLINE_DEBUG in your local.conf or distro.conf to override this behaviour +CMDLINE_DEBUG ?= "loglevel=3" + +# Kernel bootlogo is distro-specific (default is OE logo). +# Logo resolution (qvga, vga, ...) is machine-specific. +LOGO_SIZE ?= '${@oe.utils.conditional("MACHINE_GUI_CLASS", "bigscreen", "vga", "qvga", d)}' +# To use this, add file://${LOGO_SIZE}/logo_linux_clut224.ppm.bz2 or similar +# to your kernel recipe, and then structure your logos for each resolution +# accordingly. + +LOCALVERSION ?= "" +KCONFIG_MODE ?= "alldefconfig" +KMACHINE ?= "${MACHINE}" + +#kernel_conf_variable CMDLINE "\"${CMDLINE} ${CMDLINE_DEBUG}\"" +kernel_conf_variable() { + CONF_SED_SCRIPT="$CONF_SED_SCRIPT /CONFIG_$1[ =]/d;" + if test "$2" = "n" + then + echo "# CONFIG_$1 is not set" >> ${B}/.config + else + echo "CONFIG_$1=$2" >> ${B}/.config + fi +} + +do_kernel_configme[depends] += "virtual/${TARGET_PREFIX}binutils:do_populate_sysroot" +do_kernel_configme[depends] += "virtual/${TARGET_PREFIX}gcc:do_populate_sysroot" +do_kernel_configme[depends] += "bc-native:do_populate_sysroot bison-native:do_populate_sysroot" + +do_configure:prepend() { + CONF_SED_SCRIPT="" + + # + # logo support, if you supply logo_linux_clut224.ppm in SRC_URI, then it's going to be used + # + if [ -e ${WORKDIR}/logo_linux_clut224.ppm ]; then + install -m 0644 ${WORKDIR}/logo_linux_clut224.ppm drivers/video/logo/logo_linux_clut224.ppm + kernel_conf_variable LOGO y + kernel_conf_variable LOGO_LINUX_CLUT224 y + fi + + # + # oabi / eabi support + # + kernel_conf_variable AEABI y + if [ "${ARM_KEEP_OABI}" = "1" ] ; then + kernel_conf_variable OABI_COMPAT y + else + kernel_conf_variable OABI_COMPAT n + fi + + # When enabling thumb for userspace we also need thumb support in the kernel + if [ "${ARM_INSTRUCTION_SET}" = "thumb" ] ; then + kernel_conf_variable ARM_THUMB y + fi + + kernel_conf_variable CMDLINE "\"${CMDLINE} ${CMDLINE_DEBUG}\"" + + kernel_conf_variable LOCALVERSION "\"${LOCALVERSION}\"" + kernel_conf_variable LOCALVERSION_AUTO n + + kernel_conf_variable SYSFS_DEPRECATED n + kernel_conf_variable SYSFS_DEPRECATED_V2 n + kernel_conf_variable HOTPLUG y + kernel_conf_variable UEVENT_HELPER_PATH \"\" + kernel_conf_variable UNIX y + kernel_conf_variable SYSFS y + kernel_conf_variable PROC_FS y + kernel_conf_variable TMPFS y + kernel_conf_variable INOTIFY_USER y + kernel_conf_variable SIGNALFD y + kernel_conf_variable TMPFS_POSIX_ACL y + kernel_conf_variable BLK_DEV_BSG y + kernel_conf_variable DEVTMPFS y + kernel_conf_variable DEVTMPFS_MOUNT y + + # Newer inits like systemd need cgroup support + if [ "${KERNEL_ENABLE_CGROUPS}" = "1" ] ; then + kernel_conf_variable CGROUP_SCHED y + kernel_conf_variable CGROUPS y + kernel_conf_variable CGROUP_NS y + kernel_conf_variable CGROUP_FREEZER y + kernel_conf_variable CGROUP_DEVICE y + kernel_conf_variable CPUSETS y + kernel_conf_variable PROC_PID_CPUSET y + kernel_conf_variable CGROUP_CPUACCT y + kernel_conf_variable RESOURCE_COUNTERS y + fi + + # + # root-over-nfs-over-usb-eth support. Limited, but should cover some cases. + # Enable this by setting a proper CMDLINE_NFSROOT_USB. + # + if [ ! -z "${CMDLINE_NFSROOT_USB}" ]; then + bbnote "Configuring the kernel for root-over-nfs-over-usb-eth with CMDLINE ${CMDLINE_NFSROOT_USB}" + kernel_conf_variable INET y + kernel_conf_variable IP_PNP y + kernel_conf_variable USB_GADGET y + kernel_conf_variable USB_GADGET_SELECTED y + kernel_conf_variable USB_ETH y + kernel_conf_variable NFS_FS y + kernel_conf_variable ROOT_NFS y + kernel_conf_variable CMDLINE \"${CMDLINE_NFSROOT_USB} ${CMDLINE_DEBUG}\" + fi + + yes '' | oe_runmake -C ${S} O=${B} oldconfig +} + +do_configure:append() { + if test -e scripts/Makefile.fwinst ; then + sed -i -e "s:-m0644:-m 0644:g" scripts/Makefile.fwinst + fi +} + diff --git a/recipes-kernel/uwe5622-firmware/files/wcnmodem.bin b/recipes-kernel/uwe5622-firmware/files/wcnmodem.bin new file mode 100644 index 0000000000000000000000000000000000000000..79a319633a682033ea16a65b459fd4aea67c68bd GIT binary patch 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/dev/null +++ b/recipes-kernel/uwe5622-firmware/files/wifi_2355b001_1ant.ini @@ -0,0 +1,177 @@ +[Section 1: Version] +Major = 2 +Minor = 2 + +[Section 2: Board Config] +Calib_Bypass = 11758 +TxChain_Mask = 2 +RxChain_Mask = 2 + +[Section 3: Board Config TPC] +DPD_LUT_idx = 0x33,0x33,0x0,0x11,0x22,0x33,0x33,0x33 +TPC_Goal_Chain0 = 0,0,0,0,0,0,0,0 +TPC_Goal_Chain1 = 159,167,162,152,159,167,162,152 + +[Section 4: TPC-LUT] +Chain0_LUT_0 = 6,0,40,0 +Chain0_LUT_1 = 6,1,24,0 +Chain0_LUT_2 = 6,2,8,0 +Chain0_LUT_3 = 10,2,0,0 +Chain0_LUT_4 = 14,2,0,0 +Chain0_LUT_5 = 18,2,0,0 +Chain0_LUT_6 = 22,2,0,0 +Chain0_LUT_7 = 26,2,0,0 +Chain1_LUT_0 = 6,0,40,0 +Chain1_LUT_1 = 6,1,24,0 +Chain1_LUT_2 = 6,2,8,0 +Chain1_LUT_3 = 10,2,0,0 +Chain1_LUT_4 = 14,2,0,0 +Chain1_LUT_5 = 18,2,0,0 +Chain1_LUT_6 = 22,2,0,0 +Chain1_LUT_7 = 26,2,0,0 + +[Section 5: Board Config Frequency Compensation] +2G_Channel_Chain0 = 6,6,6,6,7,7,7,7,7,7,7,7,7,7 +2G_Channel_Chain1 = 6,6,6,6,7,7,7,7,7,7,7,7,7,7 +5G_Channel_Chain0 = 11,11,11,11,9,9,9,9,10,10,10,10,10,10,10,10,10,10,10,10,9,9,9,9,9 +5G_Channel_Chain1 = 11,11,11,11,9,9,9,9,10,10,10,10,10,10,10,10,10,10,10,10,9,9,9,9,9 + +[Section 6: Rate To Power with BW 20M] +11b_Power = 20,20,20,20 +11ag_Power = 28,32,36,44,28,32,36,48 +11n_Power = 34,38,38,40,40,44,44,48,32,36,36,40,40,44,44,54,48 +11ac_Power = 32,36,36,40,40,44,44,48,50,66,32,36,36,40,40,44,44,48,50,66 + +[Section 7: Power Backoff] +Green_WIFI_offset = 0 +HT40_Power_offset = 0 +VHT40_Power_offset = 0 +VHT80_Power_offset = 0 +SAR_Power_offset = 0 +Mean_Power_offset = 36 + +[Section 8: Reg Domain] +reg_domain1 = 0x00000001 +reg_domain2 = 0x00000002 + +[Section 9: Band Edge Power offset (MKK, FCC, ETSI)] +BW20M = 3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41 +BW40M = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21 +BW80M = 6,5,4,3,2,1 + +[Section 10: TX Scale] +Chain0_1 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 +Chain1_1 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 +Chain0_2 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,17 +Chain1_2 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,17 +Chain0_3 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,18 +Chain1_3 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,18 +Chain0_4 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,19 +Chain1_4 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,19 +Chain0_5 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,20 +Chain1_5 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,20 +Chain0_6 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,21 +Chain1_6 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,21 +Chain0_7 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,22 +Chain1_7 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,22 +Chain0_8 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,23 +Chain1_8 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,23 +Chain0_9 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,24 +Chain1_9 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,24 +Chain0_10 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,25 +Chain1_10 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,25 +Chain0_11 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,26 +Chain1_11 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,26 +Chain0_12 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,27 +Chain1_12 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,27 +Chain0_13 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,28 +Chain1_13 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,28 +Chain0_14 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,29 +Chain1_14 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,29 +Chain0_36 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,30 +Chain1_36 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,30 +Chain0_40 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,31 +Chain1_40 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,31 +Chain0_44 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,32 +Chain1_44 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,32 +Chain0_48 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,33 +Chain1_48 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,33 +Chain0_52 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,34 +Chain1_52 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,34 +Chain0_56 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,35 +Chain1_56 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,35 +Chain0_60 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,36 +Chain1_60 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,36 +Chain0_64 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,37 +Chain1_64 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,37 +Chain0_100 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,38 +Chain1_100 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,38 +Chain0_104 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,39 +Chain1_104 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,39 +Chain0_108 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,40 +Chain1_108 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,40 +Chain0_112 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,41 +Chain1_112 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,41 +Chain0_116 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,42 +Chain1_116 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,42 +Chain0_120 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,43 +Chain1_120 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,43 +Chain0_124 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,44 +Chain1_124 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,44 +Chain0_128 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,45 +Chain1_128 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,45 +Chain0_132 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,46 +Chain1_132 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,46 +Chain0_136 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,47 +Chain1_136 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,47 +Chain0_140 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,48 +Chain1_140 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,48 +Chain0_144 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,49 +Chain1_144 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,49 +Chain0_149 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,50 +Chain1_149 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,50 +Chain0_153 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,51 +Chain1_153 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,51 +Chain0_157 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,52 +Chain1_157 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,52 +Chain0_161 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,53 +Chain1_161 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,53 +Chain0_165 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,54 +Chain1_165 = 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,54 + +[Section 11: misc] +DFS_switch = 1 +power_save_switch = 2 +ex-Fem_and_ex-LNA_param_setup = 3 +rssi_report_diff = 4 + +[Section 12: debug reg] +address = 0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0x10,0x11,0x12,0x13,0x14,0x15,0x16 +value = 0x16,0x17,0x18,0x19,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x30,0x31 + +[Section 13: coex_config] +bt_performance_cfg0 = 0x01010101 +bt_performance_cfg1 = 0x01000000 +wifi_performance_cfg0 = 0x01050A01 +wifi_performance_cfg2 = 0x00000000 +strategy_cfg0 = 0x01010100 +strategy_cfg1 = 0x03000000 +strategy_cfg2 = 0x08020000 +compatibility_cfg0 = 0x04040000 +compatibility_cfg1 = 0x0 +ant_cfg0 = 0x0 +ant_cfg1 = 0x0 +isolation_cfg0 = 0x0505 +isolation_cfg1 = 0x0 +reserved_cfg0 = 0x0 +reserved_cfg1 = 0x0 +reserved_cfg2 = 0x0 +reserved_cfg3 = 0x0 +reserved_cfg4 = 0x0 +reserved_cfg5 = 0x0 +reserved_cfg6 = 0x0 +reserved_cfg7 = 0x0 + +[Section 14: rf_tlv_config] +rf_config = 0xAA,0x55,0x00,0xFF,0x8,0xA,0x0,0x5,0x0,0x0,0x0,0x0,0x0,0x0 + diff --git a/recipes-kernel/uwe5622-firmware/uwe5622-firmware.bb b/recipes-kernel/uwe5622-firmware/uwe5622-firmware.bb new file mode 100644 index 0000000..a818ac3 --- /dev/null +++ b/recipes-kernel/uwe5622-firmware/uwe5622-firmware.bb @@ -0,0 +1,22 @@ +DESCRIPTION = "UWE5622 Wifi firmware" +LICENSE = "CC0-1.0" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/${LICENSE};md5=0ceb3372c9595f0a8067e55da801e4a1" + +S = "${WORKDIR}" + +COMPATIBLE_MACHINE = "orange-pi-zero2" + +SRC_URI:append = " \ + file://wcnmodem.bin \ + file://wifi_2355b001_1ant.ini \ +" + +do_install() { + install -d ${D}${base_libdir}/firmware + install -m 0644 ${S}/wcnmodem.bin ${D}${base_libdir}/firmware/wcnmodem.bin + install -m 0644 ${S}/wifi_2355b001_1ant.ini ${D}${base_libdir}/firmware/wifi_2355b001_1ant.ini +} + +FILES:${PN} = "${base_libdir}/*" + +PACKAGES = "${PN}" diff --git a/recipes-support/l3afpad/files/l3afpad-0.8.18.1.11.tar.gz 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"${THISDIR}/files:" + +S="${WORKDIR}" + +DEPENDS = "gtk+3 pango cairo harfbuzz gdk-pixbuf intltool-native" + +inherit pkgconfig + + +SRC_URI = "file://l3afpad-0.8.18.1.11.tar.gz" +SRC_URI[sha256sum] = "005457fa35a7e37024e403852a21a5c7362a0314a8de9b7fff73b1e7802d8959" + +do_configure () { + ./configure --host=x86_64-unknown-linux --target=aarch64-poky-linux +} + +do_compile () { + make +} + +do_install () { + DESTDIR=${D} make install +} + +FILES:${PN} += "/usr/local/*" \ No newline at end of file diff --git a/recipes-support/sfwbar/files/sfwbar.config b/recipes-support/sfwbar/files/sfwbar.config new file mode 100644 index 0000000..b7f7618 --- /dev/null +++ b/recipes-support/sfwbar/files/sfwbar.config @@ -0,0 +1,334 @@ +Set Term = "foot" + +# Task Switcher +switcher { + interval = 700 + icons = true + labels = false + cols = 5 +} + +function("SfwbarInit") { + SetBarId "bar-0" + SetLayer "bottom" +} + +function("ToggleMinimize") { + [!Minimized] Minimize + [Minimized] UnMinimize +} + +function("ToggleMaximize") { + [!Maximized] Maximize + [Maximized] UnMaximize +} + + +function("ShowDesktopSaveFocus") { + [Focused] UserState "2:on" + [!Focused] UserState "2:off" +} + +function("ShowdesktopMinimize") { + [!Minimized] UserState "on" + [Minimized] UserState "off" + [!Minimized] Minimize +} + +function("ShowDesktopRestore") { + [UserState] UnMinimize +} + +function("ShowDesktopRestoreFocus") { + [UserState2] Focus +} + +function("ShowDesktopCheckWindow") { + [!Minimized] UserState "target","2:on" +} + +function("ShowDesktopReminimize") +{ + [!Minimized] UserState "on" + [!Minimized] Minimize +} + +function("ShowDesktopUnminimized") { + [UserState2 | Children] Function "ShowDesktopSaveFocus" + [UserState2 | Children] Function "ShowDesktopReminimize" + [!UserState2 | Children] Function "ShowDesktopRestore" + [!UserState2 | Children] Function "ShowDesktopRestoreFocus" + [!UserState2] UserState "off" + [UserState2] UserState "on" +} + +function("ShowDesktop") { + [!UserState | Children] Function "ShowDesktopSaveFocus" + [!UserState | Children] Function "ShowDesktopMinimize" + [UserState] UserState "2:off" + [UserState| Children ] Function "ShowDesktopCheckWindow" + [UserState] Function "target","ShowDesktopUnminimized" + [!UserState] UserState "on" +} + +menu("winops") { + item("Focus", Focus ); + item("Close", Close ); + item("Toggle minimize", Function "ToggleMinimize" ); + item("Toggle maximize", Function "ToggleMaximize" ); +} + +# Panel layout + +layout { + button { + style = "launcher" + value = "/usr/share/icons/Adwaita/scalable/actions/view-app-grid-symbolic.svg" + action = Exec "wtype -M alt ' ' -m alt" + } + button { + style = "launcher" + value = "/usr/share/icons/Adwaita/scalable/actions/system-run-symbolic.svg" + tooltip = "Quick run" + action = Exec "bash -c \"`drun`\"" + } + button { + value = "/usr/share/icons/Adwaita/scalable/devices/tv-symbolic.svg" + style = "launcher" + tooltip = "Show Desktop" + action = Function "target", "ShowDesktop" + } + button { + style = "launcher" + value = $Term + tooltip = "Terminal" + action = Exec $Term + } + taskbar "target" { + rows = 1 + css = "* { -GtkWidget-hexpand:false; }" # stretch horizontally + icons = true + group = false + sort = false + labels = true + action[3] = Menu "winops" + action[2] = Close + } + label { + css = "* { -GtkWidget-hexpand: true; }" + } + tray { + rows = 1 + } + include("network-module.widget") + include("cpu.widget") + include("memory.widget") +} + +#CSS +button#launcher, button#module{ + padding: 0px 2px 0px 2px; + /*background: none; + background-color: #5F548E;*/ + border-style:none; + box-shadow: none; + border-radius: 0; +} + +window { + -GtkWidget-direction: top; + /*background-color: rgba(0,0,0,0.6);*/ + border-color: rgba(0,0,0,0.3); +} + +#hidden { + -GtkWidget-visible: false; +} + +button#taskbar_normal grid { + -GtkWidget-hexpand: false; + padding-right: 0px; + margin-right: 0px; +} +button#launcher image, button#taskbar_normal image, button#taskbar_active image, button#taskbar_normal:hover image { + -GtkWidget-vexpand: true; + box-shadow: none; + border: none; + border-image: none; + background-image: none; + background: none; + min-width: 24px; + min-height: 24px; + -gtk-icon-shadow: none; +} + +button#taskbar_normal label, button#taskbar_active label, button#taskbar_normal:hover label { + -GtkWidget-vexpand: true; + -GtkWidget-hexpand: false; + padding-left: 0.75mm; + padding-top: 0px; + padding-bottom: 0px; + font: 0.3cm Sans; +} + +button#taskbar_normal , button#taskbar_active , button#taskbar_normal:hover { + padding-left: 0.75mm; + padding-top: 0.5mm; + padding-bottom: 0.5mm; + background-image: none; + border-radius: 0; + border-image: none; + -GtkWidget-hexpand: false; + -GtkWidget-vexpand: true; + background-color: rgba(119,119,119,0.2); + border: none; + /*border-color: rgba(119,119,119,0.3);*/ + box-shadow: none; +} + +button#taskbar_normal label { + color: black; +} + +button#taskbar_active { + /* background-color: rgba(255,255,255,0.2); + border-color: rgba(255,255,255,0.4); */ + border-bottom:3px solid #5F548E; +} +button#taskbar_active label, button#taskbar_normal:hover label { + color: #5F548E; +} +/* button#taskbar_active:hover*/ +button#taskbar_normal:hover { + background-color: #d2d2d2; + border-color: rgba(234,234,234,0.44); +} + +grid#switcher_active image, +grid#switcher_active { + min-width: 1.25cm; + min-height: 1.25cm; + border-image: none; + padding: 1.25mm; + background-color: #777777; + border: 0px; + box-shadow: none; + border-radius: 1.25mm; + -GtkWidget-hexpand: true; +} + +grid#switcher_normal image, +grid#switcher_normal { + min-width: 1.25cm; + min-height: 1.25cm; + border-image: none; + padding: 1.25mm; + -GtkWidget-direction: right; + -GtkWidget-hexpand: true; +} + +window#switcher { + border-style: solid; + border-width: 0.25mm; + border-color: #000000; + border-radius: 1.25mm; + padding: 1.25mm; + -GtkWidget-hexpand: true; +} + +grid#switcher { + border-radius: 1.25mm; + padding: 1.25mm; + background-color: rgba(0,0,0,0.8); + border-color: rgba(119,119,119,0.8); + box-shadow: none; + -GtkWidget-hexpand: true; +} + +button#tray_active, +button#tray_passive, +button#tray_attention { + background-image: none; + border: 0px; + padding: 0px 1px; + margin: 0px; + border-image: none; + border-radius: 0px; + outline-style: none; + box-shadow: none; + -GtkWidget-hexpand: true; + -GtkWidget-vexpand: true; +} + +button#tray_active image, +button#tray_passive image, +button#tray_attention image { + min-width: 26px; +} + +grid#layout { + padding: 0.25mm; + -GtkWidget-direction: right; + min-height: 30px; +} + +menu { + background-color: rgba(0,0,0,0.8); + border-color: rgba(119,119,119,0.3); + box-shadow: none; +} + +menuitem { +color: #ffffff; +} + +menu image { + min-width: 24px; + min-height: 24px; + padding-right: 5px; +} + +chart#cpu_chart { + background: rgba(127,127,127,0.3); + min-width: 9px; + -GtkWidget-vexpand: true; + margin: 2px; + border: 1px solid @theme_fg_color; + color: red; +} + +progressbar#memory { + -GtkWidget-direction: top; + -GtkWidget-vexpand: true; + min-width: 9px; + border: 1px solid @theme_fg_color; + margin: 2px; +} + +progressbar#memory trough { + min-height: 2px; + min-width: 9px; + border: none; + border-radius: 0px; + background: rgba(127,127,127,0.3); +} + +progressbar#memory progress { + -GtkWidget-hexpand: true; + min-width: 9px; + border-radius: 0px; + border: none; + margin: 0px; + background-color: alpha(green,0.9); +} + + +label { + font: 0.27cm Sans; + color: #ffffff; + text-shadow: none; +} + +* { + -GtkWidget-vexpand: true; +} diff --git a/recipes-support/sfwbar/sfwbar_git.bb b/recipes-support/sfwbar/sfwbar_git.bb new file mode 100644 index 0000000..fbf7d72 --- /dev/null +++ b/recipes-support/sfwbar/sfwbar_git.bb @@ -0,0 +1,27 @@ +DESCRIPTION = "sfwbar pannel for wayland" + +LICENSE = "GPL-3.0-only" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/GPL-3.0-only;md5=c79ff39f19dfec6d293b95dea7b07891" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +DEPENDS = "gtk+3 gtk-layer-shell json-c wayland-native" + +SRCREV = "${AUTOREV}" + +SRC_URI = "git://github.com/LBCrion/sfwbar.git;protocol=https;branch=main" +SRC_URI += " file://sfwbar.config " + +S="${WORKDIR}/git" + +inherit meson pkgconfig + +EXTRA_OEMESON += "--buildtype release" + +do_install:append () { + install -d ${D}/${sysconfdir}/xdg/ + install -d ${D}/${sysconfdir}/xdg/sfwbar/ + install -m 0755 ${WORKDIR}/sfwbar.config ${D}/${sysconfdir}/xdg/sfwbar/ +} + +FILES:${PN} += "/usr/share/icons/*" diff --git a/recipes-support/swayidle/swayidle_%.bbappend b/recipes-support/swayidle/swayidle_%.bbappend new file mode 100644 index 0000000..ed81400 --- /dev/null +++ b/recipes-support/swayidle/swayidle_%.bbappend @@ -0,0 +1 @@ +PACKAGECONFIG:remove = " systemd sysvinit man-pages " \ No newline at end of file diff --git a/recipes-support/swaylock/swaylock_%.bbappend b/recipes-support/swaylock/swaylock_%.bbappend new file mode 100644 index 0000000..36fdf59 --- /dev/null +++ b/recipes-support/swaylock/swaylock_%.bbappend @@ -0,0 +1 @@ +PACKAGECONFIG:remove = " man-pages pam " diff --git a/recipes-support/tofi/files/config b/recipes-support/tofi/files/config new file mode 100644 index 0000000..3074b41 --- /dev/null +++ b/recipes-support/tofi/files/config @@ -0,0 +1,320 @@ +# Default config for tofi +# +# Copy this file to ~/.config/tofi/config and get customising! +# +# A complete reference of available options can be found in `man 5 tofi`. + +# +### Fonts +# + # Font to use, either a path to a font file or a name. + # + # If a path is given, tofi will startup much quicker, but any + # characters not in the chosen font will fail to render. + # + # Otherwise, fonts are interpreted in Pango format. + font = "Sans" + + # Point size of text. + font-size = 24 + + # Comma separated list of OpenType font feature settings to apply, + # if supported by the chosen font. The format is similar to the CSS + # "font-feature-settings" property. + # + # Examples: + # + # font-features = "smcp, c2sc" (all small caps) + # font-features = "liga 0" (disable ligatures) + font-features = "" + + # Comma separated list of OpenType font variation settings to apply + # to variable fonts. The format is similar to the CSS + # "font-variation-settings" property. + # + # Examples: + # + # font-variations = "wght 900" (Extra bold) + # font-variations = "wdth 25, slnt -10" (Narrow and slanted) + font-variations = "" + + # Perform font hinting. Only applies when a path to a font has been + # specified via `font`. Disabling font hinting speeds up text + # rendering appreciably, but will likely look poor at small font pixel + # sizes. + hint-font = true + +# +### Text theming +# + # Default text color + # + # All text defaults to this color if not otherwise specified. + text-color = #FFFFFF + + # All pieces of text have the same theming attributes available: + # + # *-color + # Foreground color + # + # *-background + # Background color + # + # *-background-padding + # Background padding in pixels (comma-delimited, CSS-style list). + # See "DIRECTIONAL VALUES" under `man 5 tofi` for more info. + # + # *-background-corner-radius + # Radius of background box corners in pixels + + # Prompt text theme + # prompt-color = #FFFFFF + prompt-background = #00000000 + prompt-background-padding = 0 + prompt-background-corner-radius = 0 + + # Placeholder text theme + placeholder-color = #FFFFFFA8 + placeholder-background = #00000000 + placeholder-background-padding = 0 + placeholder-background-corner-radius = 0 + + # Input text theme + # input-color = #FFFFFF + input-background = #00000000 + input-background-padding = 0 + input-background-corner-radius = 0 + + # Default result text theme + # default-result-color = #FFFFFF + default-result-background = #00000000 + default-result-background-padding = 0 + default-result-background-corner-radius = 0 + + # Alternate (even-numbered) result text theme + # + # If unspecified, these all default to the corresponding + # default-result-* attribute. + # + # alternate-result-color = #FFFFFF + # alternate-result-background = #00000000 + # alternate-result-background-padding = 0 + # alternate-result-background-corner-radius = 0 + + # Selection text + selection-color = #F92672 + selection-background = #00000000 + selection-background-padding = 0 + selection-background-corner-radius = 0 + + # Matching portion of selection text + selection-match-color = #00000000 + + +# +### Text cursor theme +# + # Style of the optional text cursor. + # + # Supported values: bar, block, underscore + text-cursor-style = bar + + # Color of the text cursor + # + # If unspecified, defaults to the same as input-color + # text-cursor-color = #FFFFFF + + # Color of text behind the text cursor when text-cursor-style = block + # + # If unspecified, defaults to the same as background-color + # text-cursor-background = #000000 + + # Corner radius of the text cursor + text-cursor-corner-radius = 0 + + # Thickness of the bar and underscore text cursors. + # + # If unspecified, defaults to a font-dependent value when + # text-cursor-style = underscore, or to 2 otherwise. + # text-cursor-thickness = 2 + +# +### Text layout +# + # Prompt to display. + prompt-text = "run: " + + # Extra horizontal padding between prompt and input. + prompt-padding = 0 + + # Placeholder input text. + placeholder-text = "" + + # Maximum number of results to display. + # If 0, tofi will draw as many results as it can fit in the window. + num-results = 0 + + # Spacing between results in pixels. Can be negative. + result-spacing = 0 + + # List results horizontally. + horizontal = false + + # Minimum width of input in horizontal mode. + min-input-width = 0 + +# +### Window theming +# + # Width and height of the window. Can be pixels or a percentage. + width = 640 + height = 480 + + # Window background color + background-color = #1B1D1E + + # Width of the border outlines in pixels. + outline-width = 4 + + # Border outline color + outline-color = #080800 + + # Width of the border in pixels. + border-width = 12 + + # Border color + border-color = #F92672 + + # Radius of window corners in pixels. + corner-radius = 0 + + # Padding between borders and text. Can be pixels or a percentage. + padding-top = 8 + padding-bottom = 8 + padding-left = 8 + padding-right = 8 + + # Whether to clip text drawing to be within the specified padding. This + # is mostly important for allowing text to be inset from the border, + # while still allowing text backgrounds to reach right to the edge. + clip-to-padding = true + + # Whether to scale the window by the output's scale factor. + scale = true + +# +### Window positioning +# + # The name of the output to appear on. An empty string will use the + # default output chosen by the compositor. + output = "" + + # Location on screen to anchor the window to. + # + # Supported values: top-left, top, top-right, right, bottom-right, + # bottom, bottom-left, left, center. + anchor = center + + # Set the size of the exclusive zone. + # + # A value of -1 means ignore exclusive zones completely. + # A value of 0 will move tofi out of the way of other windows' zones. + # A value greater than 0 will set that much space as an exclusive zone. + # + # Values greater than 0 are only meaningful when tofi is anchored to a + # single edge. + exclusive-zone = -1 + + # Window offset from edge of screen. Only has an effect when anchored + # to the relevant edge. Can be pixels or a percentage. + margin-top = 0 + margin-bottom = 0 + margin-left = 0 + margin-right = 0 + +# +### Behaviour +# + # Hide the mouse cursor. + hide-cursor = true + + # Show a text cursor in the input field. + text-cursor = true + + # Sort results by number of usages in run and drun modes. + history = true + + # Specify an alternate file to read and store history information + # from / to. This shouldn't normally be needed, and is intended to + # facilitate the creation of custom modes. + # history-file = /path/to/histfile + + # Select the matching algorithm used. If normal, substring matching is + # used, weighted to favour matches closer to the beginning of the + # string. If prefix, only substrings at the beginning of the string are + # matched. If fuzzy, searching is performed via a simple fuzzy matching + # algorithm. + # + # Supported values: normal, prefix, fuzzy + matching-algorithm = normal + + # If true, require a match to allow a selection to be made. If false, + # making a selection with no matches will print input to stdout. + # In drun mode, this is always true. + require-match = true + + # If true, automatically accept a result if it is the only one + # remaining. If there's only one result on startup, window creation is + # skipped altogether. + auto-accept-single = false + + # If true, typed input will be hidden, and what is displayed (if + # anything) is determined by the hidden-character option. + hide-input = false + + # Replace displayed input characters with a character. If the empty + # string is given, input will be completely hidden. + # This option only has an effect when hide-input is set to true. + hidden-character = "*" + + # If true, use physical keys for shortcuts, regardless of the current + # keyboard layout. If false, use the current layout's keys. + physical-keybindings = true + + # Instead of printing the selected entry, print the 1-based index of + # the selection. This option has no effect in run or drun mode. If + # require-match is set to false, non-matching input will still result + # in the input being printed. + print-index = false + + # If true, directly launch applications on selection when in drun mode. + # Otherwise, just print the command line to stdout. + drun-launch = false + + # The terminal to run terminal programs in when in drun mode. + # This option has no effect if drun-launch is set to true. + # Defaults to the value of the TERMINAL environment variable. + terminal = foot + + # Delay keyboard initialisation until after the first draw to screen. + # This option is experimental, and will cause tofi to miss keypresses + # for a short time after launch. The only reason to use this option is + # performance on slow systems. + late-keyboard-init = false + + # If true, allow multiple simultaneous processes. + # If false, create a lock file on startup to prevent multiple instances + # from running simultaneously. + multi-instance = false + + # Assume input is plain ASCII, and disable some Unicode handling + # functions. This is faster, but means e.g. a search for "e" will not + # match "é". + ascii-input = false + +# +### Inclusion +# + # Configs can be split between multiple files, and then included + # within each other. + # include = /path/to/config diff --git a/recipes-support/tofi/files/drun b/recipes-support/tofi/files/drun new file mode 100755 index 0000000..2554145 --- /dev/null +++ b/recipes-support/tofi/files/drun @@ -0,0 +1,9 @@ +#! /bin/sh + +config="/etc/xdg/tofi/config" + +if [ -e "$HOME/.config/tofi/config" ]; then + config="$HOME/.config/tofi/config" +fi + +tofi-drun -c "$config" \ No newline at end of file diff --git a/recipes-support/tofi/tofi_git.bb b/recipes-support/tofi/tofi_git.bb new file mode 100644 index 0000000..8fe5315 --- /dev/null +++ b/recipes-support/tofi/tofi_git.bb @@ -0,0 +1,27 @@ +DESCRIPTION = "tofi menu for wayland" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +DEPENDS = "wayland freetype wayland-native wayland-protocols-native wayland-protocols harfbuzz pango libxkbcommon" + +SRCREV = "${AUTOREV}" + +SRC_URI = "git://github.com/philj56/tofi.git;protocol=https;branch=master" +SRC_URI += " file://config file://drun " + +S="${WORKDIR}/git" + +inherit meson pkgconfig + +EXTRA_OEMESON += "--buildtype release" + +do_install:append () { + # replace the default config + install -m 0755 ${WORKDIR}/drun ${D}/usr/bin/ + install -m 0755 ${WORKDIR}/config ${D}/${sysconfdir}/xdg/tofi/ +} + +FILES:${PN} += "/usr/share/*" diff --git a/recipes-support/wlopm/wlopm_git.bb b/recipes-support/wlopm/wlopm_git.bb new file mode 100644 index 0000000..cd09208 --- /dev/null +++ b/recipes-support/wlopm/wlopm_git.bb @@ -0,0 +1,23 @@ +DESCRIPTION = "wlopm" + +LICENSE = "GPL-3.0-only" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/GPL-3.0-only;md5=c79ff39f19dfec6d293b95dea7b07891" + + +DEPENDS = "wayland wayland-native wayland-protocols" + +SRCREV = "${AUTOREV}" + +SRC_URI = "git://git.iohub.dev/dany/wlopm.git;protocol=https;branch=master" + +S="${WORKDIR}/git" + +do_compile () { + oe_runmake +} + +do_install() { + oe_runmake install DESTDIR='${D}' +} + +FILES:${PN} += "/usr/local/*" \ No newline at end of file diff --git a/recipes-support/wtype/wtype_git.bb b/recipes-support/wtype/wtype_git.bb new file mode 100644 index 0000000..ef5d28b --- /dev/null +++ b/recipes-support/wtype/wtype_git.bb @@ -0,0 +1,17 @@ +DESCRIPTION = "virtual key event for wayland" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + + +DEPENDS = "wayland wayland-native wayland-protocols-native wayland-protocols libxkbcommon" + +SRCREV = "${AUTOREV}" + +SRC_URI = "git://github.com/atx/wtype.git;protocol=https;branch=master" + +S="${WORKDIR}/git" + +inherit meson pkgconfig + +EXTRA_OEMESON += "--buildtype release" \ No newline at end of file diff --git a/recipes-wlroots/labwc/files/autostart b/recipes-wlroots/labwc/files/autostart new file mode 100644 index 0000000..d005d5d --- /dev/null +++ b/recipes-wlroots/labwc/files/autostart @@ -0,0 +1,38 @@ +# Example autostart file + +# Set background color +swaybg -i /etc/xdg/labwc/wpp.jpg >/dev/null 2>&1 & + +wlr-randr --output DPI-1 --transform 90 + +# Configure output directives such as mode, position, scale and transform. +# Use wlr-randr to get your output names +# Example ~/.config/kanshi/config below: +# profile { +# output HDMI-A-1 position 1366,0 +# output eDP-1 position 0,0 +# } +# kanshi >/dev/null 2>&1 & + +# Launch a panel such as yambar or waybar. +# waybar >/dev/null 2>&1 & + +# Enable notifications. Typically GNOME/KDE application notifications go +# through the org.freedesktop.Notifications D-Bus API and require a client such +# as mako to function correctly. Thunderbird is an example of this. +# mako >/dev/null 2>&1 & + +# Lock screen after 1 minute; turn off display after another 5 minutes. +# +# Note that in the context of idle system power management, it is *NOT* a good +# idea to turn off displays by 'disabling outputs' for example by +# `wlr-randr --output --off` because this re-arranges views +# (since a837fef). Instead use a wlr-output-power-management client such as +# https://git.sr.ht/~leon_plickat/wlopm +swayidle -w timeout 60 'wlopm --off DPI-1' resume 'wlopm --on DPI-1' & + +SFWBAR_CNF="/etc/xdg/sfwbar/sfwbar.config" +if [ -e "$HOME/.config/sfwbar/sfwbar.config" ]; then + SFWBAR_CNF="$HOME/.config/sfwbar/sfwbar.config" +fi +sfwbar -f "$SFWBAR_CNF" diff --git a/recipes-wlroots/labwc/files/environment b/recipes-wlroots/labwc/files/environment new file mode 100644 index 0000000..d0fb461 --- /dev/null +++ b/recipes-wlroots/labwc/files/environment @@ -0,0 +1,28 @@ +# Example environment file + +# This allows xdg-desktop-portal-wlr to function (e.g. for screen-recording) +XDG_CURRENT_DESKTOP=wlroots + +# Set keyboard layout to Swedish +# XKB_DEFAULT_LAYOUT=se + +# Set two keyboard layouts and toggle between them using alt+shift +# XKB_DEFAULT_LAYOUT=se,de +XKB_DEFAULT_OPTIONS=grp:alt_shift_toggle + +# Force firefox to use wayland backend +# MOZ_ENABLE_WAYLAND=1 + +# Set cursor theme. +# Find icons themes with the command below or similar: +# find /usr/share/icons/ -type d -name "cursors" +XCURSOR_THEME=breeze_cursors + +# Disable hardware cursors. Most users wouldn't want to do this, but if you +# are experiencing issues with disappearing cursors, this might fix it. +# WLR_NO_HARDWARE_CURSORS=1 + +# For Java applications such as JetBrains/Intellij Idea, set this variable +# to avoid menus with incorrect offset and blank windows +# See https://github.com/swaywm/sway/issues/595 +# _JAVA_AWT_WM_NONREPARENTING=1 diff --git a/recipes-wlroots/labwc/files/init b/recipes-wlroots/labwc/files/init new file mode 100755 index 0000000..9177f97 --- /dev/null +++ b/recipes-wlroots/labwc/files/init @@ -0,0 +1,53 @@ +#!/bin/sh +# +### BEGIN INIT INFO +# Provides: labwc +# Required-Start: $local_fs $remote_fs +# Required-Stop: $local_fs $remote_fs +# Default-Start: 2 3 4 5 +# Default-Stop: 0 1 6 +### END INIT INFO +LABWC_USER=diya +LABWC_CONFDIR="/etc/xdg/labwc" +if test -e "/home/$LABWC_USER/.config/labwc" ; then + LABWC_CONFDIR="/home/$LABWC_USER/.config/labwc" +fi + +killproc() { + pid=`/bin/pidof $1` + [ "$pid" != "" ] && kill $pid +} + +read CMDLINE < /proc/cmdline +for x in $CMDLINE; do + case $x in + labwc=false) + echo "labwc disabled" + exit 0; + ;; + esac +done + +case "$1" in + start) + . /etc/profile + su - $LABWC_USER -c "labwc -C $LABWC_CONFDIR" & + ;; + + stop) + echo "Stopping labwc" + killproc labwc + ;; + + restart) + $0 stop + sleep 1 + $0 start + ;; + + *) + echo "usage: $0 { start | stop | restart }" + ;; +esac + +exit 0 diff --git a/recipes-wlroots/labwc/files/menu.xml b/recipes-wlroots/labwc/files/menu.xml new file mode 100644 index 0000000..3daf1a8 --- /dev/null +++ b/recipes-wlroots/labwc/files/menu.xml @@ -0,0 +1,49 @@ + + + + +

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/recipes-wlroots/labwc/files/rc.xml b/recipes-wlroots/labwc/files/rc.xml new file mode 100644 index 0000000..b48299e --- /dev/null +++ b/recipes-wlroots/labwc/files/rc.xml @@ -0,0 +1,71 @@ + + + + + + + + 10 + + + + Adwaita + 0 + + + + + + + + + + + + + + root-menu + + + + + root-menu + + + + + + + + + bash -c "bash -c \"`drun`\"" + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/recipes-wlroots/labwc/files/wpp.jpg b/recipes-wlroots/labwc/files/wpp.jpg new file mode 100644 index 0000000000000000000000000000000000000000..7871b7d201eccbefea4f2ea123b2583b3f791058 GIT binary patch literal 164654 zcmbrlhd*2I8#f+XQ`87;jT)_$7_B{u8nJ1D#BNK?*n6we)TVZAq6m@NR7=&WRn$mJ zi>lhI6g5iwJNbN{-}4VVa$b_--1l`~>;1m2`<(bU{ci!ptgo%74Wgg`fhd3%=-*e6 zCUExu_Cpr(|0V&L{jVFuLQk9 zI{FL1Wo`=4|E>b2{NL;UyZrA9h=Ga%M9ECW4A^=Si#C!4+f8G$2d7Q2Q3K9-PoGix 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${D}/${sysconfdir}/xdg + install -d ${D}/${sysconfdir}/init.d + install -d ${D}/${sysconfdir}/xdg/labwc + install -m 0755 ${WORKDIR}/init ${D}/${sysconfdir}/init.d/labwc + + install -m 0755 ${WORKDIR}/wpp.jpg ${D}/${sysconfdir}/xdg/labwc/ + install -m 0755 ${WORKDIR}/autostart ${D}/${sysconfdir}/xdg/labwc/ + install -m 0755 ${WORKDIR}/environment ${D}/${sysconfdir}/xdg/labwc/ + install -m 0755 ${WORKDIR}/menu.xml ${D}/${sysconfdir}/xdg/labwc/ + install -m 0755 ${WORKDIR}/rc.xml ${D}/${sysconfdir}/xdg/labwc/ + +} + +inherit update-rc.d +INITSCRIPT_NAME = "labwc" +INITSCRIPT_PARAMS = "start 9 5 2 . stop 20 0 1 6 ." diff --git a/recipes-wlroots/wlroots/wlroots-%.bbappend b/recipes-wlroots/wlroots/wlroots-%.bbappend new file mode 100644 index 0000000..e47a686 --- /dev/null +++ b/recipes-wlroots/wlroots/wlroots-%.bbappend @@ -0,0 +1,2 @@ +PACKAGECONFIG += " opengl gbm libinput " +PACKAGECONFIG:remove = " sysvinit systemd x11 xwayland " \ No newline at end of file diff --git a/wic/opi.wks.in b/wic/opi.wks.in new file mode 100644 index 0000000..47cb8a2 --- /dev/null +++ b/wic/opi.wks.in @@ -0,0 +1,12 @@ +# short-description: Create Raspberry Pi SD card image +# long-description: Creates a partitioned SD card image for use with + +part u-boot --source rawcopy --sourceparams="file=${SPL_BINARY}" --ondisk mmcblk1 --no-table --align 8 +part /boot --source bootimg-partition --ondisk mmcblk1 --fstype=vfat --label boot --active --align 4096 --size 32 +# read only roofs +part / --source rootfs --ondisk mmcblk1 --fstype=ext4 --label root --align 4096 --size 150 --exclude-path home/ --exclude-path var/etc/ --exclude-path boot/ +# modifiable configurations stored in /var/etc +part /var/etc --source rootfs --rootfs-dir=${IMAGE_ROOTFS}/var/etc --ondisk mmcblk1 --fstype=ext4 --label diya --align 1024 --size 32 +# home partition +part /home --source rootfs --rootfs-dir=${IMAGE_ROOTFS}/home --ondisk mmcblk1 --fstype=ext4 --label home --align 1024 --size 16 +# part /home --ondisk mmcblk1 --fstype=vfat --label music --active --align 1024 --size 16 \ No newline at end of file