From b275e598b50e70c038a56e4bd41bbf0b93eabca3 Mon Sep 17 00:00:00 2001 From: Sriraman Tallam Date: Fri, 4 Sep 2015 03:23:05 +0000 Subject: [PATCH] fix optimized build with -mcmodel=medium INFO: From Compiling src/dsp/cpu.c: src/dsp/cpu.c: In function 'x86CPUInfo': src/dsp/cpu.c:36:3: inconsistent operand constraints in an 'asm' With PIC and mcmodel=medium, the %rbx register must be saved and restored which causes this problem. This was also solved in GCC-4.9 with this patch: https://gcc.gnu.org/ml/gcc-patches/2012-12/msg01484.html Tested: Builds fine with this change. Change-Id: Icca8eea7bf5af3ef9f17f6ae2886e3430143febf --- src/dsp/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/dsp/cpu.c b/src/dsp/cpu.c index 35c2af7f..8844cb40 100644 --- a/src/dsp/cpu.c +++ b/src/dsp/cpu.c @@ -31,6 +31,18 @@ static WEBP_INLINE void GetCPUInfo(int cpu_info[4], int info_type) { : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) : "a"(info_type), "c"(0)); } +#elif defined(__x86_64__) && \ + (defined(__code_model_medium__) || defined(__code_model_large__)) && \ + defined(__PIC__) +static WEBP_INLINE void GetCPUInfo(int cpu_info[4], int info_type) { + __asm__ volatile ( + "xchg{q}\t{%%rbx}, %q1\n" + "cpuid\n" + "xchg{q}\t{%%rbx}, %q1\n" + : "=a"(cpu_info[0]), "=&r"(cpu_info[1]), "=c"(cpu_info[2]), + "=d"(cpu_info[3]) + : "a"(info_type), "c"(0)); +} #elif defined(__i386__) || defined(__x86_64__) static WEBP_INLINE void GetCPUInfo(int cpu_info[4], int info_type) { __asm__ volatile (