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https://github.com/webmproject/libwebp.git
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enc_neon: move Transpose4x4 to dsp/neon.h
+ reuse it in TransformWHT() Change-Id: Idfbd0f9b58d6253ac3d65ba55b58989c427ee989
This commit is contained in:
parent
8e5f90b086
commit
5e1a17ef4b
@ -200,9 +200,14 @@ HDRS = \
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src/dec/webpi.h \
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src/dec/webpi.h \
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src/dsp/dsp.h \
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src/dsp/dsp.h \
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src/dsp/lossless.h \
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src/dsp/lossless.h \
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src/dsp/neon.h \
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src/dsp/yuv.h \
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src/dsp/yuv.h \
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src/enc/backward_references.h \
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src/enc/cost.h \
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src/enc/cost.h \
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src/enc/histogram.h \
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src/enc/vp8enci.h \
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src/enc/vp8enci.h \
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src/enc/vp8li.h \
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src/mux/muxi.h \
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src/utils/alpha_processing.h \
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src/utils/alpha_processing.h \
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src/utils/bit_reader.h \
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src/utils/bit_reader.h \
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src/utils/bit_writer.h \
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src/utils/bit_writer.h \
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@ -215,6 +220,7 @@ HDRS = \
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src/utils/random.h \
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src/utils/random.h \
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src/utils/rescaler.h \
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src/utils/rescaler.h \
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src/utils/thread.h \
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src/utils/thread.h \
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src/utils/utils.h \
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src/webp/format_constants.h \
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src/webp/format_constants.h \
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$(HDRS_INSTALLED) \
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$(HDRS_INSTALLED) \
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@ -17,10 +17,11 @@ COMMON_SOURCES += dec_neon.c
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COMMON_SOURCES += dec_sse2.c
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COMMON_SOURCES += dec_sse2.c
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COMMON_SOURCES += dsp.h
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COMMON_SOURCES += dsp.h
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COMMON_SOURCES += lossless.c
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COMMON_SOURCES += lossless.c
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COMMON_SOURCES += lossless.h
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COMMON_SOURCES += lossless_mips32.c
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COMMON_SOURCES += lossless_mips32.c
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COMMON_SOURCES += lossless_neon.c
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COMMON_SOURCES += lossless_neon.c
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COMMON_SOURCES += lossless_sse2.c
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COMMON_SOURCES += lossless_sse2.c
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COMMON_SOURCES += lossless.h
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COMMON_SOURCES += neon.h
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COMMON_SOURCES += upsampling.c
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COMMON_SOURCES += upsampling.c
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COMMON_SOURCES += upsampling_mips32.c
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COMMON_SOURCES += upsampling_mips32.c
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COMMON_SOURCES += upsampling_neon.c
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COMMON_SOURCES += upsampling_neon.c
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@ -23,8 +23,7 @@
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// (probably similar to gcc.gnu.org/bugzilla/show_bug.cgi?id=48183)
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// (probably similar to gcc.gnu.org/bugzilla/show_bug.cgi?id=48183)
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#define WORK_AROUND_GCC
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#define WORK_AROUND_GCC
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#include <arm_neon.h>
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#include "./neon.h"
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#include "../dec/vp8i.h"
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#include "../dec/vp8i.h"
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#define QRegs "q0", "q1", "q2", "q3", \
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#define QRegs "q0", "q1", "q2", "q3", \
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@ -1217,16 +1216,15 @@ static void TransformDC(const int16_t* in, uint8_t* dst) {
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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#define STORE_WHT(dst, col, row01, row23) do { \
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#define STORE_WHT(dst, col, rows) do { \
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*dst = vgetq_lane_s32(row01.val[0], col); (dst) += 16; \
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*dst = vgetq_lane_s32(rows.val[0], col); (dst) += 16; \
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*dst = vgetq_lane_s32(row01.val[1], col); (dst) += 16; \
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*dst = vgetq_lane_s32(rows.val[1], col); (dst) += 16; \
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*dst = vgetq_lane_s32(row23.val[0], col); (dst) += 16; \
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*dst = vgetq_lane_s32(rows.val[2], col); (dst) += 16; \
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*dst = vgetq_lane_s32(row23.val[1], col); (dst) += 16; \
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*dst = vgetq_lane_s32(rows.val[3], col); (dst) += 16; \
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} while (0)
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} while (0)
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static void TransformWHT(const int16_t* in, int16_t* out) {
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static void TransformWHT(const int16_t* in, int16_t* out) {
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int32x4x2_t tmp0; // tmp[0..7]
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int32x4x4_t tmp;
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int32x4x2_t tmp1; // tmp[8..15]
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{
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{
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// Load the source.
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// Load the source.
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@ -1238,47 +1236,37 @@ static void TransformWHT(const int16_t* in, int16_t* out) {
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const int32x4_t a1 = vaddl_s16(in04_07, in08_11); // in[4..7] + in[8..11]
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const int32x4_t a1 = vaddl_s16(in04_07, in08_11); // in[4..7] + in[8..11]
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const int32x4_t a2 = vsubl_s16(in04_07, in08_11); // in[4..7] - in[8..11]
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const int32x4_t a2 = vsubl_s16(in04_07, in08_11); // in[4..7] - in[8..11]
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const int32x4_t a3 = vsubl_s16(in00_03, in12_15); // in[0..3] - in[12..15]
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const int32x4_t a3 = vsubl_s16(in00_03, in12_15); // in[0..3] - in[12..15]
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tmp0.val[0] = vaddq_s32(a0, a1);
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tmp.val[0] = vaddq_s32(a0, a1);
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tmp0.val[1] = vaddq_s32(a3, a2);
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tmp.val[1] = vaddq_s32(a3, a2);
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tmp1.val[0] = vsubq_s32(a0, a1);
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tmp.val[2] = vsubq_s32(a0, a1);
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tmp1.val[1] = vsubq_s32(a3, a2);
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tmp.val[3] = vsubq_s32(a3, a2);
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// Arrange the temporary results column-wise.
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tmp = Transpose4x4(tmp);
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}
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}
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tmp0 = vzipq_s32(tmp0.val[0], tmp0.val[1]); // 0, 4, 1, 5 | 2, 6, 3, 7
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tmp1 = vzipq_s32(tmp1.val[0], tmp1.val[1]); // 8, 12, 9, 13 | 10, 14, 11, 15
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{
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{
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// Arrange the temporary results column-wise.
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const int32x4_t kCst3 = vdupq_n_s32(3);
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const int32x4_t tmp_0_4_8_12 =
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const int32x4_t dc = vaddq_s32(tmp.val[0], kCst3); // add rounder
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vcombine_s32(vget_low_s32(tmp0.val[0]), vget_low_s32(tmp1.val[0]));
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const int32x4_t a0 = vaddq_s32(dc, tmp.val[3]);
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const int32x4_t tmp_2_6_10_14 =
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const int32x4_t a1 = vaddq_s32(tmp.val[1], tmp.val[2]);
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vcombine_s32(vget_low_s32(tmp0.val[1]), vget_low_s32(tmp1.val[1]));
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const int32x4_t a2 = vsubq_s32(tmp.val[1], tmp.val[2]);
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const int32x4_t tmp_1_5_9_13 =
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const int32x4_t a3 = vsubq_s32(dc, tmp.val[3]);
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vcombine_s32(vget_high_s32(tmp0.val[0]), vget_high_s32(tmp1.val[0]));
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const int32x4_t tmp_3_7_11_15 =
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vcombine_s32(vget_high_s32(tmp0.val[1]), vget_high_s32(tmp1.val[1]));
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const int32x4_t three = vdupq_n_s32(3);
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const int32x4_t dc = vaddq_s32(tmp_0_4_8_12, three); // add rounder
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const int32x4_t a0 = vaddq_s32(dc, tmp_3_7_11_15);
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const int32x4_t a1 = vaddq_s32(tmp_1_5_9_13, tmp_2_6_10_14);
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const int32x4_t a2 = vsubq_s32(tmp_1_5_9_13, tmp_2_6_10_14);
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const int32x4_t a3 = vsubq_s32(dc, tmp_3_7_11_15);
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tmp0.val[0] = vaddq_s32(a0, a1);
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tmp.val[0] = vaddq_s32(a0, a1);
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tmp0.val[1] = vaddq_s32(a3, a2);
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tmp.val[1] = vaddq_s32(a3, a2);
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tmp1.val[0] = vsubq_s32(a0, a1);
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tmp.val[2] = vsubq_s32(a0, a1);
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tmp1.val[1] = vsubq_s32(a3, a2);
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tmp.val[3] = vsubq_s32(a3, a2);
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// right shift the results by 3.
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// right shift the results by 3.
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tmp0.val[0] = vshrq_n_s32(tmp0.val[0], 3);
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tmp.val[0] = vshrq_n_s32(tmp.val[0], 3);
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tmp0.val[1] = vshrq_n_s32(tmp0.val[1], 3);
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tmp.val[1] = vshrq_n_s32(tmp.val[1], 3);
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tmp1.val[0] = vshrq_n_s32(tmp1.val[0], 3);
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tmp.val[2] = vshrq_n_s32(tmp.val[2], 3);
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tmp1.val[1] = vshrq_n_s32(tmp1.val[1], 3);
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tmp.val[3] = vshrq_n_s32(tmp.val[3], 3);
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STORE_WHT(out, 0, tmp0, tmp1);
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STORE_WHT(out, 0, tmp);
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STORE_WHT(out, 1, tmp0, tmp1);
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STORE_WHT(out, 1, tmp);
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STORE_WHT(out, 2, tmp0, tmp1);
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STORE_WHT(out, 2, tmp);
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STORE_WHT(out, 3, tmp0, tmp1);
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STORE_WHT(out, 3, tmp);
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}
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}
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}
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}
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@ -18,8 +18,8 @@
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#define USE_INTRINSICS // use intrinsics when possible
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#define USE_INTRINSICS // use intrinsics when possible
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#include <assert.h>
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#include <assert.h>
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#include <arm_neon.h>
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#include "./neon.h"
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#include "../enc/vp8enci.h"
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#include "../enc/vp8enci.h"
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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@ -474,38 +474,6 @@ static void FTransform(const uint8_t* src, const uint8_t* ref,
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#endif
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#endif
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static WEBP_INLINE int32x4x4_t Transpose4x4(const int32x4x4_t rows) {
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uint64x2x2_t row01, row23;
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row01.val[0] = vreinterpretq_u64_s32(rows.val[0]);
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row01.val[1] = vreinterpretq_u64_s32(rows.val[1]);
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row23.val[0] = vreinterpretq_u64_s32(rows.val[2]);
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row23.val[1] = vreinterpretq_u64_s32(rows.val[3]);
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// Transpose 64-bit values (there's no vswp equivalent)
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{
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const uint64x1_t row0h = vget_high_u64(row01.val[0]);
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const uint64x1_t row2l = vget_low_u64(row23.val[0]);
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const uint64x1_t row1h = vget_high_u64(row01.val[1]);
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const uint64x1_t row3l = vget_low_u64(row23.val[1]);
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row01.val[0] = vcombine_u64(vget_low_u64(row01.val[0]), row2l);
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row23.val[0] = vcombine_u64(row0h, vget_high_u64(row23.val[0]));
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row01.val[1] = vcombine_u64(vget_low_u64(row01.val[1]), row3l);
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row23.val[1] = vcombine_u64(row1h, vget_high_u64(row23.val[1]));
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}
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{
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const int32x4x2_t out01 = vtrnq_s32(vreinterpretq_s32_u64(row01.val[0]),
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vreinterpretq_s32_u64(row01.val[1]));
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const int32x4x2_t out23 = vtrnq_s32(vreinterpretq_s32_u64(row23.val[0]),
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vreinterpretq_s32_u64(row23.val[1]));
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int32x4x4_t out;
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out.val[0] = out01.val[0];
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out.val[1] = out01.val[1];
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out.val[2] = out23.val[0];
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out.val[3] = out23.val[1];
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return out;
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}
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}
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#define LOAD_LANE_16b(VALUE, LANE) do { \
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#define LOAD_LANE_16b(VALUE, LANE) do { \
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(VALUE) = vld1_lane_s16(src, (VALUE), (LANE)); \
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(VALUE) = vld1_lane_s16(src, (VALUE), (LANE)); \
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src += stride; \
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src += stride; \
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49
src/dsp/neon.h
Normal file
49
src/dsp/neon.h
Normal file
@ -0,0 +1,49 @@
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// Copyright 2014 Google Inc. All Rights Reserved.
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//
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// Use of this source code is governed by a BSD-style license
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// that can be found in the COPYING file in the root of the source
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// tree. An additional intellectual property rights grant can be found
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// in the file PATENTS. All contributing project authors may
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// be found in the AUTHORS file in the root of the source tree.
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// -----------------------------------------------------------------------------
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//
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// NEON common code.
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#ifndef WEBP_DSP_NEON_H_
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#define WEBP_DSP_NEON_H_
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#include <arm_neon.h>
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static WEBP_INLINE int32x4x4_t Transpose4x4(const int32x4x4_t rows) {
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uint64x2x2_t row01, row23;
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row01.val[0] = vreinterpretq_u64_s32(rows.val[0]);
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row01.val[1] = vreinterpretq_u64_s32(rows.val[1]);
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row23.val[0] = vreinterpretq_u64_s32(rows.val[2]);
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row23.val[1] = vreinterpretq_u64_s32(rows.val[3]);
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// Transpose 64-bit values (there's no vswp equivalent)
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{
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const uint64x1_t row0h = vget_high_u64(row01.val[0]);
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const uint64x1_t row2l = vget_low_u64(row23.val[0]);
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const uint64x1_t row1h = vget_high_u64(row01.val[1]);
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const uint64x1_t row3l = vget_low_u64(row23.val[1]);
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row01.val[0] = vcombine_u64(vget_low_u64(row01.val[0]), row2l);
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row23.val[0] = vcombine_u64(row0h, vget_high_u64(row23.val[0]));
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row01.val[1] = vcombine_u64(vget_low_u64(row01.val[1]), row3l);
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row23.val[1] = vcombine_u64(row1h, vget_high_u64(row23.val[1]));
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}
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{
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const int32x4x2_t out01 = vtrnq_s32(vreinterpretq_s32_u64(row01.val[0]),
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vreinterpretq_s32_u64(row01.val[1]));
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const int32x4x2_t out23 = vtrnq_s32(vreinterpretq_s32_u64(row23.val[0]),
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vreinterpretq_s32_u64(row23.val[1]));
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int32x4x4_t out;
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out.val[0] = out01.val[0];
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out.val[1] = out01.val[1];
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out.val[2] = out23.val[0];
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out.val[3] = out23.val[1];
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return out;
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}
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}
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#endif // WEBP_DSP_NEON_H_
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