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MIPS: dspr2: added optimizations for VP8YuvTo*
VP8YuvToRgb VP8YuvToBgr VP8YuvToRgb565 VP8YuvToRgba4444 VP8YuvToArgb VP8YuvToBgra VP8YuvToRgba Change-Id: I22212a125d890e1fd28388fec906a1a5c07ff386
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@@ -169,7 +169,7 @@ YUV444_FUNC(Yuv444ToRgb565, VP8YuvToRgb565, 2)
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#undef YUV444_FUNC
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const WebPYUV444Converter WebPYUV444Converters[MODE_LAST] = {
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WebPYUV444Converter WebPYUV444Converters[MODE_LAST] = {
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Yuv444ToRgb, // MODE_RGB
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Yuv444ToRgba, // MODE_RGBA
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Yuv444ToBgr, // MODE_BGR
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@@ -188,6 +188,7 @@ const WebPYUV444Converter WebPYUV444Converters[MODE_LAST] = {
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extern void WebPInitUpsamplersSSE2(void);
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extern void WebPInitUpsamplersNEON(void);
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extern void WebPInitUpsamplersMIPSdspR2(void);
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void WebPInitUpsamplers(void) {
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#ifdef FANCY_UPSAMPLING
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@@ -217,6 +218,14 @@ void WebPInitUpsamplers(void) {
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#endif
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}
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#endif // FANCY_UPSAMPLING
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if (VP8GetCPUInfo != NULL) {
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#if defined(WEBP_USE_MIPS_DSP_R2)
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if (VP8GetCPUInfo(kMIPSdspR2)) {
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WebPInitUpsamplersMIPSdspR2();
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}
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#endif
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}
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}
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//------------------------------------------------------------------------------
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