2015-01-09 12:05:53 +01:00
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// Copyright 2014 Google Inc. All Rights Reserved.
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//
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// Use of this source code is governed by a BSD-style license
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// that can be found in the COPYING file in the root of the source
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// tree. An additional intellectual property rights grant can be found
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// in the file PATENTS. All contributing project authors may
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// be found in the AUTHORS file in the root of the source tree.
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// -----------------------------------------------------------------------------
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//
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// MIPS version of rescaling functions
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//
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// Author(s): Djordje Pesut (djordje.pesut@imgtec.com)
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#include "./dsp.h"
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#if defined(WEBP_USE_MIPS_DSP_R2)
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#include "../utils/rescaler.h"
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static void ImportRow(WebPRescaler* const wrk,
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const uint8_t* const src, int channel) {
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const int x_stride = wrk->num_channels;
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const int x_out_max = wrk->dst_width * wrk->num_channels;
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const int fx_scale = wrk->fx_scale;
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const int x_add = wrk->x_add;
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const int x_sub = wrk->x_sub;
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int* frow = wrk->frow + channel;
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int* irow = wrk->irow + channel;
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const uint8_t* src1 = src + channel;
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int temp1, temp2, temp3;
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int base, frac, sum;
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int accum, accum1;
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const int x_stride1 = x_stride << 2;
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int loop_c = x_out_max - channel;
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if (!wrk->x_expand) {
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__asm__ volatile (
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"li %[sum], 0 \n\t"
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"li %[accum], 0 \n\t"
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"1: \n\t"
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"addu %[accum], %[accum], %[x_add] \n\t"
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"blez %[accum], 3f \n\t"
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"2: \n\t"
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"lbu %[temp3], 0(%[src1]) \n\t"
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"subu %[accum], %[accum], %[x_sub] \n\t"
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"addu %[src1], %[src1], %[x_stride] \n\t"
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"addu %[sum], %[sum], %[temp3] \n\t"
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"bgtz %[accum], 2b \n\t"
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"3: \n\t"
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"lbu %[base], 0(%[src1]) \n\t"
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"addu %[src1], %[src1], %[x_stride] \n\t"
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"negu %[accum1], %[accum] \n\t"
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"mul %[frac], %[base], %[accum1] \n\t"
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"addu %[temp3], %[sum], %[base] \n\t"
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"mul %[temp3], %[temp3], %[x_sub] \n\t"
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"lw %[base], 0(%[irow]) \n\t"
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"sll %[accum1], %[frac], 1 \n\t"
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"subu %[loop_c], %[loop_c], %[x_stride] \n\t"
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"mulq_rs.w %[sum], %[accum1], %[fx_scale] \n\t"
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"subu %[temp3], %[temp3], %[frac] \n\t"
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"sw %[temp3], 0(%[frow]) \n\t"
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"add %[base], %[base], %[temp3] \n\t"
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"sw %[base], 0(%[irow]) \n\t"
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"addu %[irow], %[irow], %[x_stride1] \n\t"
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"addu %[frow], %[frow], %[x_stride1] \n\t"
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"bgtz %[loop_c], 1b \n\t"
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: [accum]"=&r"(accum), [src1]"+&r"(src1), [temp3]"=&r"(temp3),
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[sum]"=&r"(sum), [base]"=&r"(base), [frac]"=&r"(frac),
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[frow]"+&r"(frow), [irow]"+&r"(irow), [accum1]"=&r"(accum1),
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[loop_c]"+&r"(loop_c)
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: [x_stride]"r"(x_stride), [fx_scale]"r"(fx_scale), [x_sub]"r"(x_sub),
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[x_add] "r" (x_add), [x_stride1] "r" (x_stride1)
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: "memory", "hi", "lo"
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);
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} else {
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__asm__ volatile (
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"lbu %[temp1], 0(%[src1]) \n\t"
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"move %[temp2], %[temp1] \n\t"
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"li %[accum], 0 \n\t"
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"1: \n\t"
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"bgez %[accum], 2f \n\t"
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"move %[temp2], %[temp1] \n\t"
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"addu %[src1], %[x_stride] \n\t"
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"lbu %[temp1], 0(%[src1]) \n\t"
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"addu %[accum], %[x_add] \n\t"
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"2: \n\t"
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"subu %[temp3], %[temp2], %[temp1] \n\t"
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"mul %[temp3], %[temp3], %[accum] \n\t"
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"mul %[base], %[temp1], %[x_add] \n\t"
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"subu %[accum], %[accum], %[x_sub] \n\t"
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"lw %[frac], 0(%[irow]) \n\t"
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"subu %[loop_c], %[loop_c], %[x_stride] \n\t"
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"addu %[temp3], %[base], %[temp3] \n\t"
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"sw %[temp3], 0(%[frow]) \n\t"
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"addu %[frow], %[x_stride1] \n\t"
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"addu %[frac], %[temp3] \n\t"
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"sw %[frac], 0(%[irow]) \n\t"
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"addu %[irow], %[x_stride1] \n\t"
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"bgtz %[loop_c], 1b \n\t"
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: [src1]"+&r"(src1), [accum]"=&r"(accum), [temp1]"=&r"(temp1),
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[temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [base]"=&r"(base),
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[frac]"=&r"(frac), [frow]"+&r"(frow), [irow]"+&r"(irow),
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[loop_c]"+&r"(loop_c)
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: [x_stride]"r"(x_stride), [x_add]"r"(x_add), [x_sub]"r"(x_sub),
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[x_stride1]"r"(x_stride1)
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: "memory", "hi", "lo"
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);
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}
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}
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static void ExportRow(WebPRescaler* const wrk, int x_out) {
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if (wrk->y_accum <= 0) {
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// if wrk->fxy_scale can fit into 32 bits use optimized code,
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// otherwise use C code
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if ((wrk->fxy_scale >> 32) == 0) {
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2015-01-10 15:46:00 +01:00
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uint8_t* dst = wrk->dst;
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int32_t* irow = wrk->irow;
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const int32_t* frow = wrk->frow;
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const int yscale = wrk->fy_scale * (-wrk->y_accum);
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const int x_out_max = wrk->dst_width * wrk->num_channels;
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2015-01-09 12:05:53 +01:00
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int temp0, temp1, temp3, temp4, temp5, temp6, temp7;
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const int temp2 = (int)wrk->fxy_scale;
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const int rest = (x_out_max - x_out) & 1;
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const int32_t* const loop_end = frow + (x_out_max - x_out) - rest;
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__asm__ volatile (
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".set push \n\t"
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".set noreorder \n\t"
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"beq %[frow], %[loop_end], 1f \n\t"
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" nop \n\t"
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"0: \n\t"
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"lw %[temp0], 0(%[frow]) \n\t"
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"lw %[temp1], 0(%[irow]) \n\t"
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"lw %[temp3], 4(%[frow]) \n\t"
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"lw %[temp4], 4(%[irow]) \n\t"
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"sll %[temp0], %[temp0], 1 \n\t"
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"sll %[temp3], %[temp3], 1 \n\t"
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"mulq_rs.w %[temp5], %[temp0], %[yscale] \n\t"
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"mulq_rs.w %[temp6], %[temp3], %[yscale] \n\t"
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"addiu %[frow], %[frow], 8 \n\t"
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"addiu %[dst], %[dst], 2 \n\t"
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"addiu %[irow], %[irow], 8 \n\t"
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"subu %[temp1], %[temp1], %[temp5] \n\t"
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"subu %[temp4], %[temp4], %[temp6] \n\t"
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"sll %[temp1], %[temp1], 1 \n\t"
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"sll %[temp4], %[temp4], 1 \n\t"
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"mulq_rs.w %[temp0], %[temp1], %[temp2] \n\t"
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"mulq_rs.w %[temp3], %[temp4], %[temp2] \n\t"
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"sw %[temp5], -8(%[irow]) \n\t"
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"sw %[temp6], -4(%[irow]) \n\t"
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"shll_s.ph %[temp0], %[temp0], 7 \n\t"
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"shll_s.ph %[temp3], %[temp3], 7 \n\t"
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"precrqu_s.qb.ph %[temp0], %[temp0], %[temp3] \n\t"
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"sb %[temp0], -1(%[dst]) \n\t"
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"srl %[temp0], %[temp0], 16 \n\t"
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"bne %[frow], %[loop_end], 0b \n\t"
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" sb %[temp0], -2(%[dst]) \n\t"
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"1: \n\t"
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"beqz %[rest], 3f \n\t"
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" nop \n\t"
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"addiu %[temp6], $zero, -256 \n\t"
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"addiu %[temp7], $zero, 255 \n\t"
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"lw %[temp0], 0(%[frow]) \n\t"
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"sll %[temp0], %[temp0], 1 \n\t"
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"mulq_rs.w %[temp1], %[temp0], %[yscale] \n\t"
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"lw %[temp0], 0(%[irow]) \n\t"
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"subu %[temp0], %[temp0], %[temp1] \n\t"
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"sll %[temp0], %[temp0], 1 \n\t"
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"mulq_rs.w %[temp5], %[temp0], %[temp2] \n\t"
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"sw %[temp1], 0(%[irow]) \n\t"
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"and %[temp0], %[temp5], %[temp6] \n\t"
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"beqz %[temp0], 2f \n\t"
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" slti %[temp1], %[temp5], 0 \n\t"
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"xor %[temp5], %[temp5], %[temp5] \n\t"
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"movz %[temp5], %[temp7], %[temp1] \n\t"
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"2: \n\t"
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"sb %[temp5], 0(%[dst]) \n\t"
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"3: \n\t"
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".set pop \n\t"
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: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp3]"=&r"(temp3),
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[temp4]"=&r"(temp4), [temp5]"=&r"(temp5), [temp6]"=&r"(temp6),
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[temp7]"=&r"(temp7), [frow]"+&r"(frow), [irow]"+&r"(irow),
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[dst]"+&r"(dst)
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: [temp2]"r"(temp2), [yscale]"r"(yscale), [loop_end]"r"(loop_end),
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[rest]"r"(rest)
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: "memory", "hi", "lo"
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);
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2015-01-10 15:46:00 +01:00
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wrk->y_accum += wrk->y_add;
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wrk->dst += wrk->dst_stride;
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2015-01-09 12:05:53 +01:00
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} else {
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2015-01-10 15:46:00 +01:00
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WebPRescalerExportRowC(wrk, x_out);
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2015-01-09 12:05:53 +01:00
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}
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}
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}
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//------------------------------------------------------------------------------
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// Entry point
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2015-02-13 09:24:25 +01:00
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extern void WebPRescalerDspInitMIPSdspR2(void);
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2015-01-09 12:05:53 +01:00
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WEBP_TSAN_IGNORE_FUNCTION void WebPRescalerDspInitMIPSdspR2(void) {
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WebPRescalerImportRow = ImportRow;
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WebPRescalerExportRow = ExportRow;
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}
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2015-03-20 04:49:35 +01:00
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#else // !WEBP_USE_MIPS_DSP_R2
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extern void WebPRescalerDspInitMIPSdspR2(void);
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WEBP_TSAN_IGNORE_FUNCTION void WebPRescalerDspInitMIPSdspR2(void) {}
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#endif // WEBP_USE_MIPS_DSP_R2
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