dany/facetimehd
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rename driver to facetimehd

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This commit is contained in:
Sven Schnelle
2015-11-27 20:32:06 +01:00
parent 3cc6e64906
commit f3067f211a
17 changed files with 827 additions and 827 deletions
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4
Makefile
View File

@@ -1,5 +1,5 @@
bcwc_pcie-objs := bcwc_ddr.o bcwc_hw.o bcwc_drv.o bcwc_ringbuf.o bcwc_isp.o bcwc_v4l2.o bcwc_buffer.o
obj-m := bcwc_pcie.o
facetimehd-objs := fthd_ddr.o fthd_hw.o fthd_drv.o fthd_ringbuf.o fthd_isp.o fthd_v4l2.o fthd_buffer.o
obj-m := facetimehd.o
KVERSION := $(shell uname -r)
KDIR := /lib/modules/$(KVERSION)/build

2
README.md
View File

@@ -1,4 +1,4 @@
#bcwc_pcie
#facetimehd
Linux driver for the Facetime HD (Broadcom 1570) PCIe webcam
found in recent Macbooks, according to Apple the following models

34
bcwc_buffer.c → fthd_buffer.c
View File

@@ -20,19 +20,19 @@
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/printk.h>
#include "bcwc_drv.h"
#include "bcwc_isp.h"
#include "bcwc_hw.h"
#include "bcwc_buffer.h"
#include "fthd_drv.h"
#include "fthd_isp.h"
#include "fthd_hw.h"
#include "fthd_buffer.h"
#define GET_IOMMU_PAGES(_x) (((_x) + 4095)/4096)
struct buf_ctx {
struct bcwc_plane plane[4];
struct fthd_plane plane[4];
struct isp_mem_obj *isphdr;
};
static int iommu_allocator_init(struct bcwc_private *dev_priv)
static int iommu_allocator_init(struct fthd_private *dev_priv)
{
dev_priv->iommu = kzalloc(sizeof(struct resource), GFP_KERNEL);
if (!dev_priv->iommu)
@@ -43,7 +43,7 @@ static int iommu_allocator_init(struct bcwc_private *dev_priv)
return 0;
}
struct iommu_obj *iommu_allocate(struct bcwc_private *dev_priv, resource_size_t size, unsigned long long phys_addr)
struct iommu_obj *iommu_allocate(struct fthd_private *dev_priv, resource_size_t size, unsigned long long phys_addr)
{
struct iommu_obj *obj;
struct resource *root = dev_priv->iommu;
@@ -74,13 +74,13 @@ struct iommu_obj *iommu_allocate(struct bcwc_private *dev_priv, resource_size_t
obj->size = pages;
for (i = obj->offset, j = 0; i < obj->offset + obj->size; i++, j++)
BCWC_S2_REG_WRITE((phys_addr >> 12) + j, 0x9000 + i * 4);
FTHD_S2_REG_WRITE((phys_addr >> 12) + j, 0x9000 + i * 4);
pr_debug("allocated %d pages @ %p / offset %d\n", obj->size, obj, obj->offset);
return obj;
}
struct iommu_obj *iommu_allocate_sgtable(struct bcwc_private *dev_priv, struct sg_table *sgtable)
struct iommu_obj *iommu_allocate_sgtable(struct fthd_private *dev_priv, struct sg_table *sgtable)
{
struct iommu_obj *obj;
struct resource *root = dev_priv->iommu;
@@ -127,7 +127,7 @@ struct iommu_obj *iommu_allocate_sgtable(struct bcwc_private *dev_priv, struct s
for(dma_length = 0; dma_length < sg_dma_len(sg); dma_length += 0x1000) {
// pr_debug("IOMMU %08x -> %08llx (dma length %d)\n", pos, dma_addr, dma_length);
BCWC_S2_REG_WRITE(dma_addr++, pos);
FTHD_S2_REG_WRITE(dma_addr++, pos);
pos += 4;
}
}
@@ -136,7 +136,7 @@ struct iommu_obj *iommu_allocate_sgtable(struct bcwc_private *dev_priv, struct s
return obj;
}
#if 0
struct iommu_obj *get_iommu_obj(struct bcwc_private *dev_priv, int pos)
struct iommu_obj *get_iommu_obj(struct fthd_private *dev_priv, int pos)
{
struct iommu_obj *obj;
struct resource *res;
@@ -151,7 +151,7 @@ struct iommu_obj *get_iommu_obj(struct bcwc_private *dev_priv, int pos)
return obj;
}
#endif
void iommu_free(struct bcwc_private *dev_priv, struct iommu_obj *obj)
void iommu_free(struct fthd_private *dev_priv, struct iommu_obj *obj)
{
int i;
pr_debug("freeing %p\n", obj);
@@ -160,28 +160,28 @@ void iommu_free(struct bcwc_private *dev_priv, struct iommu_obj *obj)
return;
for (i = obj->offset; i < obj->offset + obj->size; i++)
BCWC_S2_REG_WRITE(0, 0x9000 + i * 4);
FTHD_S2_REG_WRITE(0, 0x9000 + i * 4);
release_resource(&obj->base);
kfree(obj);
obj = NULL;
}
static void iommu_allocator_destroy(struct bcwc_private *dev_priv)
static void iommu_allocator_destroy(struct fthd_private *dev_priv)
{
kfree(dev_priv->iommu);
}
int bcwc_buffer_init(struct bcwc_private *dev_priv)
int fthd_buffer_init(struct fthd_private *dev_priv)
{
int i;
for(i = 0; i < 0x1000; i++)
BCWC_S2_REG_WRITE(0, 0x9000 + i * 4);
FTHD_S2_REG_WRITE(0, 0x9000 + i * 4);
return iommu_allocator_init(dev_priv);
}
void bcwc_buffer_exit(struct bcwc_private *dev_priv)
void fthd_buffer_exit(struct fthd_private *dev_priv)
{
iommu_allocator_destroy(dev_priv);
}

26
bcwc_buffer.h → fthd_buffer.h
View File

@@ -16,13 +16,13 @@
* along with this program; if not, write to the Free Software Foundation.
*
*/
#ifndef BCWC_BUFFER_H
#define BCWC_BUFFER_H
#ifndef FTHD_BUFFER_H
#define FTHD_BUFFER_H
#include <linux/scatterlist.h>
#include "bcwc_buffer.h"
#include "fthd_buffer.h"
enum bcwc_buffer_state {
enum fthd_buffer_state {
BUF_FREE,
BUF_ALLOC,
BUF_DRV_QUEUED,
@@ -53,7 +53,7 @@ struct iommu_obj {
int offset;
};
struct bcwc_plane {
struct fthd_plane {
u8 *virt;
u64 phys;
dma_addr_t dma;
@@ -62,7 +62,7 @@ struct bcwc_plane {
};
struct h2t_buf_ctx {
enum bcwc_buffer_state state;
enum fthd_buffer_state state;
struct vb2_buffer *vb;
struct iommu_obj *plane[4];
struct isp_mem_obj *dma_desc_obj;
@@ -72,11 +72,11 @@ struct h2t_buf_ctx {
int done;
};
extern int setup_buffers(struct bcwc_private *dev_priv);
extern int bcwc_buffer_init(struct bcwc_private *dev_priv);
extern void bcwc_buffer_exit(struct bcwc_private *dev_priv);
extern void bcwc_buffer_return_handler(struct bcwc_private *dev_priv, struct dma_descriptor_list *list, int size);
extern void bcwc_buffer_queued_handler(struct bcwc_private *dev_priv, struct dma_descriptor_list *list);
extern struct iommu_obj *iommu_allocate_sgtable(struct bcwc_private *dev_priv, struct sg_table *);
extern void iommu_free(struct bcwc_private *dev_priv, struct iommu_obj *obj);
extern int setup_buffers(struct fthd_private *dev_priv);
extern int fthd_buffer_init(struct fthd_private *dev_priv);
extern void fthd_buffer_exit(struct fthd_private *dev_priv);
extern void fthd_buffer_return_handler(struct fthd_private *dev_priv, struct dma_descriptor_list *list, int size);
extern void fthd_buffer_queued_handler(struct fthd_private *dev_priv, struct dma_descriptor_list *list);
extern struct iommu_obj *iommu_allocate_sgtable(struct fthd_private *dev_priv, struct sg_table *);
extern void iommu_free(struct fthd_private *dev_priv, struct iommu_obj *obj);
#endif

202
bcwc_ddr.c → fthd_ddr.c
View File

@@ -18,11 +18,11 @@
*/
#include <linux/random.h>
#include "bcwc_drv.h"
#include "bcwc_hw.h"
#include "bcwc_ddr.h"
#include "fthd_drv.h"
#include "fthd_hw.h"
#include "fthd_ddr.h"
int bcwc_ddr_verify_mem(struct bcwc_private *dev_priv, u32 base, int count)
int fthd_ddr_verify_mem(struct fthd_private *dev_priv, u32 base, int count)
{
u32 i, val, val_read;
int failed_bits = 0;
@@ -32,14 +32,14 @@ int bcwc_ddr_verify_mem(struct bcwc_private *dev_priv, u32 base, int count)
for (i = 0; i < count; i++) {
val = prandom_u32_state(&state);
BCWC_S2_MEM_WRITE(val, i * 4 + MEM_VERIFY_BASE);
FTHD_S2_MEM_WRITE(val, i * 4 + MEM_VERIFY_BASE);
}
prandom_seed_state(&state, 0x12345678);
for (i = 0; i < count; i++) {
val = prandom_u32_state(&state);
val_read = BCWC_S2_MEM_READ(i * 4 + MEM_VERIFY_BASE);
val_read = FTHD_S2_MEM_READ(i * 4 + MEM_VERIFY_BASE);
failed_bits |= val ^ val_read;
}
@@ -47,7 +47,7 @@ int bcwc_ddr_verify_mem(struct bcwc_private *dev_priv, u32 base, int count)
return ((failed_bits & 0xffff) | ((failed_bits >> 16) & 0xffff));
}
static int bcwc_ddr_calibrate_rd_data_dly_fifo(struct bcwc_private *dev_priv)
static int fthd_ddr_calibrate_rd_data_dly_fifo(struct fthd_private *dev_priv)
{
u32 fifo_status[2];
u32 rden_bytes[3];
@@ -55,13 +55,13 @@ static int bcwc_ddr_calibrate_rd_data_dly_fifo(struct bcwc_private *dev_priv)
u32 byte0_pass, byte1_pass;
int passed;
rden_bytes[0] = BCWC_S2_REG_READ(S2_DDR40_RDEN_BYTE);
rden_bytes[1] = BCWC_S2_REG_READ(S2_DDR40_RDEN_BYTE0);
rden_bytes[2] = BCWC_S2_REG_READ(S2_DDR40_RDEN_BYTE1);
rden_bytes[0] = FTHD_S2_REG_READ(S2_DDR40_RDEN_BYTE);
rden_bytes[1] = FTHD_S2_REG_READ(S2_DDR40_RDEN_BYTE0);
rden_bytes[2] = FTHD_S2_REG_READ(S2_DDR40_RDEN_BYTE1);
BCWC_S2_REG_WRITE(0x30000, S2_DDR40_RDEN_BYTE);
BCWC_S2_REG_WRITE(0x30100, S2_DDR40_RDEN_BYTE0);
BCWC_S2_REG_WRITE(0x30100, S2_DDR40_RDEN_BYTE1);
FTHD_S2_REG_WRITE(0x30000, S2_DDR40_RDEN_BYTE);
FTHD_S2_REG_WRITE(0x30100, S2_DDR40_RDEN_BYTE0);
FTHD_S2_REG_WRITE(0x30100, S2_DDR40_RDEN_BYTE1);
passed = 0;
setting = 1;
@@ -71,15 +71,15 @@ static int bcwc_ddr_calibrate_rd_data_dly_fifo(struct bcwc_private *dev_priv)
rden_bl_setting = 0;
while (passed == 0) {
BCWC_S2_REG_WRITE(setting & 0x7, S2_DDR40_WL_RD_DATA_DLY);
FTHD_S2_REG_WRITE(setting & 0x7, S2_DDR40_WL_RD_DATA_DLY);
bcwc_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fthd_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
tmp = BCWC_S2_REG_READ(S2_DDR40_WL_READ_FIFO_STATUS);
tmp = FTHD_S2_REG_READ(S2_DDR40_WL_READ_FIFO_STATUS);
fifo_status[0] = tmp & 0xf;
fifo_status[1] = (tmp & 0xf0) >> 4;
BCWC_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
FTHD_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
if (fifo_status[0] == 0) {
if (byte0_pass == 0)
@@ -118,11 +118,11 @@ static int bcwc_ddr_calibrate_rd_data_dly_fifo(struct bcwc_private *dev_priv)
}
/* Write new setting */
BCWC_S2_REG_WRITE(rden_wl_setting | 0x30000,
FTHD_S2_REG_WRITE(rden_wl_setting | 0x30000,
S2_DDR40_RDEN_BYTE);
BCWC_S2_REG_WRITE(rden_bl_setting | 0x30100,
FTHD_S2_REG_WRITE(rden_bl_setting | 0x30100,
S2_DDR40_RDEN_BYTE0);
BCWC_S2_REG_WRITE(rden_bl_setting | 0x30100,
FTHD_S2_REG_WRITE(rden_bl_setting | 0x30100,
S2_DDR40_RDEN_BYTE1);
}
@@ -137,20 +137,20 @@ static int bcwc_ddr_calibrate_rd_data_dly_fifo(struct bcwc_private *dev_priv)
setting = 7;
/* Restore settings */
BCWC_S2_REG_WRITE(rden_bytes[0], S2_DDR40_RDEN_BYTE);
BCWC_S2_REG_WRITE(rden_bytes[1], S2_DDR40_RDEN_BYTE0);
BCWC_S2_REG_WRITE(rden_bytes[2], S2_DDR40_RDEN_BYTE1);
FTHD_S2_REG_WRITE(rden_bytes[0], S2_DDR40_RDEN_BYTE);
FTHD_S2_REG_WRITE(rden_bytes[1], S2_DDR40_RDEN_BYTE0);
FTHD_S2_REG_WRITE(rden_bytes[2], S2_DDR40_RDEN_BYTE1);
if (setting < 7)
setting++;
BCWC_S2_REG_WRITE(setting, S2_DDR40_WL_RD_DATA_DLY);
FTHD_S2_REG_WRITE(setting, S2_DDR40_WL_RD_DATA_DLY);
dev_info(&dev_priv->pdev->dev, "RD_DATA_DLY: 0x%x\n", setting);
return 0;
}
static int bcwc_ddr_calibrate_one_re_fifo(struct bcwc_private *dev_priv,
static int fthd_ddr_calibrate_one_re_fifo(struct fthd_private *dev_priv,
u32 *rden_byte, u32 *rden_byte0, u32 *rden_byte1)
{
u32 fifo_status[2];
@@ -160,31 +160,31 @@ static int bcwc_ddr_calibrate_one_re_fifo(struct bcwc_private *dev_priv,
u32 word_setting, byte_setting, passed, delta;
u32 tmp;
delta = ((BCWC_S2_REG_READ(S2_DDR40_PHY_VDL_STATUS) & 0xffc) >> 2) / 4;
delta = ((FTHD_S2_REG_READ(S2_DDR40_PHY_VDL_STATUS) & 0xffc) >> 2) / 4;
/* Start with word and byte setting at 0 */
BCWC_S2_REG_WRITE(0x30000, S2_DDR40_RDEN_BYTE);
BCWC_S2_REG_WRITE(0x30100, S2_DDR40_RDEN_BYTE0);
BCWC_S2_REG_WRITE(0x30100, S2_DDR40_RDEN_BYTE0);
FTHD_S2_REG_WRITE(0x30000, S2_DDR40_RDEN_BYTE);
FTHD_S2_REG_WRITE(0x30100, S2_DDR40_RDEN_BYTE0);
FTHD_S2_REG_WRITE(0x30100, S2_DDR40_RDEN_BYTE0);
bcwc_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fthd_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
BCWC_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
FTHD_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
word_setting = 0;
byte_setting = 0;
passed = 0;
while (passed == 0) {
bcwc_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fthd_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fifo_status[0] =
BCWC_S2_REG_READ(S2_DDR40_WL_READ_FIFO_STATUS) & 0xf;
FTHD_S2_REG_READ(S2_DDR40_WL_READ_FIFO_STATUS) & 0xf;
fifo_status[1] =
(BCWC_S2_REG_READ(S2_DDR40_WL_READ_FIFO_STATUS) &
(FTHD_S2_REG_READ(S2_DDR40_WL_READ_FIFO_STATUS) &
0xf0) >> 4;
BCWC_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
FTHD_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
if (fifo_status[0] == 0) {
if (bl_pass[0] == 0)
@@ -204,13 +204,13 @@ static int bcwc_ddr_calibrate_one_re_fifo(struct bcwc_private *dev_priv,
if (passed == 0) {
if (word_setting < 63) {
word_setting++;
BCWC_S2_REG_WRITE(0x30000 | (word_setting & 0x3f),
FTHD_S2_REG_WRITE(0x30000 | (word_setting & 0x3f),
S2_DDR40_RDEN_BYTE);
} else {
byte_setting++;
BCWC_S2_REG_WRITE(0x30100 | (byte_setting & 0x3f),
FTHD_S2_REG_WRITE(0x30100 | (byte_setting & 0x3f),
S2_DDR40_RDEN_BYTE0);
BCWC_S2_REG_WRITE(0x30100 | (byte_setting & 0x3f),
FTHD_S2_REG_WRITE(0x30100 | (byte_setting & 0x3f),
S2_DDR40_RDEN_BYTE1);
if (word_setting > 64) {
@@ -222,10 +222,10 @@ static int bcwc_ddr_calibrate_one_re_fifo(struct bcwc_private *dev_priv,
}
}
wl_start = BCWC_S2_REG_READ(S2_DDR40_RDEN_BYTE) & 0x3f;
wl_start = FTHD_S2_REG_READ(S2_DDR40_RDEN_BYTE) & 0x3f;
if (bl_pass[0] == 1) {
bl_start[0] = BCWC_S2_REG_READ(S2_DDR40_RDEN_BYTE0) & 0x3f;
bl_start[0] = FTHD_S2_REG_READ(S2_DDR40_RDEN_BYTE0) & 0x3f;
passed = 0;
while (passed == 0) {
@@ -236,26 +236,26 @@ static int bcwc_ddr_calibrate_one_re_fifo(struct bcwc_private *dev_priv,
return -EIO;
}
BCWC_S2_REG_WRITE(0x30100 | (byte_setting & 0x3f),
FTHD_S2_REG_WRITE(0x30100 | (byte_setting & 0x3f),
S2_DDR40_RDEN_BYTE1);
bcwc_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fthd_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fifo_status[0] = BCWC_S2_REG_READ(
fifo_status[0] = FTHD_S2_REG_READ(
S2_DDR40_WL_READ_FIFO_STATUS) & 0xf;
fifo_status[1] =
(BCWC_S2_REG_READ(S2_DDR40_WL_READ_FIFO_STATUS) &
(FTHD_S2_REG_READ(S2_DDR40_WL_READ_FIFO_STATUS) &
0xf0) >> 4;
BCWC_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
FTHD_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
if (fifo_status[1] == 0)
passed = 1;
}
bl_start[1] = BCWC_S2_REG_READ(S2_DDR40_RDEN_BYTE1) & 0x3f;
bl_start[1] = FTHD_S2_REG_READ(S2_DDR40_RDEN_BYTE1) & 0x3f;
}
if (bl_pass[1] == 1) {
bl_start[1] = BCWC_S2_REG_READ(S2_DDR40_RDEN_BYTE1) & 0x3f;
bl_start[1] = FTHD_S2_REG_READ(S2_DDR40_RDEN_BYTE1) & 0x3f;
passed = 0;
while (passed == 0) {
@@ -266,22 +266,22 @@ static int bcwc_ddr_calibrate_one_re_fifo(struct bcwc_private *dev_priv,
return -EIO;
}
BCWC_S2_REG_WRITE(0x30100 | (byte_setting & 0x3f),
FTHD_S2_REG_WRITE(0x30100 | (byte_setting & 0x3f),
S2_DDR40_RDEN_BYTE0);
bcwc_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fthd_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fifo_status[0] = BCWC_S2_REG_READ(
fifo_status[0] = FTHD_S2_REG_READ(
S2_DDR40_WL_READ_FIFO_STATUS) & 0xf;
fifo_status[1] = BCWC_S2_REG_READ(
fifo_status[1] = FTHD_S2_REG_READ(
S2_DDR40_WL_READ_FIFO_STATUS) & 0xf0;
BCWC_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
FTHD_S2_REG_WRITE(1, S2_DDR40_WL_READ_FIFO_CLEAR);
if (fifo_status[0] == 0)
passed = 1;
}
bl_start[0] = BCWC_S2_REG_READ(S2_DDR40_RDEN_BYTE0) & 0x3f;
bl_start[0] = FTHD_S2_REG_READ(S2_DDR40_RDEN_BYTE0) & 0x3f;
}
*rden_byte = wl_start + delta;
@@ -306,25 +306,25 @@ static int bcwc_ddr_calibrate_one_re_fifo(struct bcwc_private *dev_priv,
return 0;
}
static int bcwc_ddr_calibrate_re_byte_fifo(struct bcwc_private *dev_priv)
static int fthd_ddr_calibrate_re_byte_fifo(struct fthd_private *dev_priv)
{
u32 rden_byte = 0;
u32 rden_byte0 = 0;
u32 rden_byte1 = 0;
int ret;
ret = bcwc_ddr_calibrate_one_re_fifo(dev_priv, &rden_byte, &rden_byte0, &rden_byte1);
ret = fthd_ddr_calibrate_one_re_fifo(dev_priv, &rden_byte, &rden_byte0, &rden_byte1);
if (ret)
return ret;
rden_byte = (rden_byte & 0x3f) | 0x30000;
BCWC_S2_REG_WRITE(rden_byte, S2_DDR40_RDEN_BYTE);
FTHD_S2_REG_WRITE(rden_byte, S2_DDR40_RDEN_BYTE);
rden_byte0 = (rden_byte0 & 0x3f) | 0x30100;
BCWC_S2_REG_WRITE(rden_byte0, S2_DDR40_RDEN_BYTE0);
FTHD_S2_REG_WRITE(rden_byte0, S2_DDR40_RDEN_BYTE0);
rden_byte1 = (rden_byte1 & 0x3f) | 0x30100;
BCWC_S2_REG_WRITE(rden_byte1, S2_DDR40_RDEN_BYTE1);
FTHD_S2_REG_WRITE(rden_byte1, S2_DDR40_RDEN_BYTE1);
dev_info(&dev_priv->pdev->dev,
"RE BYTE FIFO success: b0 = 0x%x, b1 = 0x%x, b = 0x%x\n",
@@ -334,7 +334,7 @@ static int bcwc_ddr_calibrate_re_byte_fifo(struct bcwc_private *dev_priv)
}
/* Set default/generic read data strobe */
static int bcwc_ddr_generic_shmoo_rd_dqs(struct bcwc_private *dev_priv,
static int fthd_ddr_generic_shmoo_rd_dqs(struct fthd_private *dev_priv,
u32 *fail_bits)
{
u32 retries, setting, tmp, offset;
@@ -343,7 +343,7 @@ static int bcwc_ddr_generic_shmoo_rd_dqs(struct bcwc_private *dev_priv,
/* Save the current byte lanes */
for (i = 0; i < S2_DDR40_NUM_BYTE_LANES; i++) {
tmp = BCWC_S2_REG_READ(S2_DDR40_RDEN_BYTE0 +
tmp = FTHD_S2_REG_READ(S2_DDR40_RDEN_BYTE0 +
(i * S2_DDR40_BYTE_LANE_SIZE));
bytes[i] = tmp & 0x3f;
}
@@ -353,18 +353,18 @@ static int bcwc_ddr_generic_shmoo_rd_dqs(struct bcwc_private *dev_priv,
for (j = 0; j < 8; j++) {
offset = S2_DDR40_2A38 + (i * 0xa0) + (j * 8);
BCWC_S2_REG_WRITE(0x30000, offset - 4);
BCWC_S2_REG_WRITE(0x30000, offset);
FTHD_S2_REG_WRITE(0x30000, offset - 4);
FTHD_S2_REG_WRITE(0x30000, offset);
}
}
setting = (BCWC_S2_REG_READ(S2_DDR40_PHY_DQ_CALIB_STATUS) >> 20) & 0x3f;
setting = (FTHD_S2_REG_READ(S2_DDR40_PHY_DQ_CALIB_STATUS) >> 20) & 0x3f;
retries = 1000;
fail = 0;
while (retries-- > 0 && !fail) {
ret = bcwc_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
ret = fthd_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fail_bits[0] = ret;
if (ret == 0xffff) {
@@ -376,12 +376,12 @@ static int bcwc_ddr_generic_shmoo_rd_dqs(struct bcwc_private *dev_priv,
tmp = (setting & 0x3f) | 0x30100;
/* Byte 0 */
BCWC_S2_REG_WRITE(tmp, S2_DDR40_2A08);
BCWC_S2_REG_WRITE(tmp, S2_DDR40_2A0C);
FTHD_S2_REG_WRITE(tmp, S2_DDR40_2A08);
FTHD_S2_REG_WRITE(tmp, S2_DDR40_2A0C);
/* Byte 1 */
BCWC_S2_REG_WRITE(tmp, S2_DDR40_2AA8);
BCWC_S2_REG_WRITE(tmp, S2_DDR40_2AAC);
FTHD_S2_REG_WRITE(tmp, S2_DDR40_2AA8);
FTHD_S2_REG_WRITE(tmp, S2_DDR40_2AAC);
if (setting > 62)
fail = 1;
@@ -395,7 +395,7 @@ static int bcwc_ddr_generic_shmoo_rd_dqs(struct bcwc_private *dev_priv,
if (bytes[i] > 62)
fail = 1;
BCWC_S2_REG_WRITE((bytes[i] & 0x3f) | 0x30100, offset);
FTHD_S2_REG_WRITE((bytes[i] & 0x3f) | 0x30100, offset);
offset += 0xa0;
}
@@ -415,7 +415,7 @@ static int bcwc_ddr_generic_shmoo_rd_dqs(struct bcwc_private *dev_priv,
return 0;
}
static int bcwc_ddr_calibrate_rd_dqs(struct bcwc_private *dev_priv,
static int fthd_ddr_calibrate_rd_dqs(struct fthd_private *dev_priv,
u32 *fails, u32 *settings)
{
s32 pass_len[16];
@@ -481,7 +481,7 @@ static int bcwc_ddr_calibrate_rd_dqs(struct bcwc_private *dev_priv,
return 0;
}
static int bcwc_ddr_wr_dqs_setting(struct bcwc_private *dev_priv, int set_bits,
static int fthd_ddr_wr_dqs_setting(struct fthd_private *dev_priv, int set_bits,
u32 *fail_bits, u32 *settings)
{
u32 bl, setting, byte, bit, offset, tmp, start, inc, reg;
@@ -495,13 +495,13 @@ static int bcwc_ddr_wr_dqs_setting(struct bcwc_private *dev_priv, int set_bits,
tmp = setting | 0x30000;
if (set_bits & 1)
BCWC_S2_REG_WRITE(tmp, offset - 4);
FTHD_S2_REG_WRITE(tmp, offset - 4);
if (set_bits & 2)
BCWC_S2_REG_WRITE(tmp, offset);
FTHD_S2_REG_WRITE(tmp, offset);
}
}
fail_bits[setting] = bcwc_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fail_bits[setting] = fthd_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
}
if (set_bits == 3) {
@@ -515,7 +515,7 @@ static int bcwc_ddr_wr_dqs_setting(struct bcwc_private *dev_priv, int set_bits,
inc = 2;
}
bcwc_ddr_calibrate_rd_dqs(dev_priv, fail_bits, settings);
fthd_ddr_calibrate_rd_dqs(dev_priv, fail_bits, settings);
offset = 0;
@@ -532,7 +532,7 @@ static int bcwc_ddr_wr_dqs_setting(struct bcwc_private *dev_priv, int set_bits,
}
tmp = (settings[offset] & 0x3f) | 0x30000;
BCWC_S2_REG_WRITE(tmp, reg);
FTHD_S2_REG_WRITE(tmp, reg);
if (set_bits == 3) {
if (i & 1)
offset++;
@@ -547,50 +547,50 @@ static int bcwc_ddr_wr_dqs_setting(struct bcwc_private *dev_priv, int set_bits,
return 0;
}
static int bcwc_ddr_calibrate_create_result(struct bcwc_private *dev_priv)
static int fthd_ddr_calibrate_create_result(struct fthd_private *dev_priv)
{
return 0;
}
static int bcwc_ddr_generic_shmoo_calibrate_rd_dqs(
struct bcwc_private *dev_priv)
static int fthd_ddr_generic_shmoo_calibrate_rd_dqs(
struct fthd_private *dev_priv)
{
u32 settings[64]; /* Don't know the real size yet */
u32 fails[64]; /* Number of fails on a setting */
int ret;
ret = bcwc_ddr_generic_shmoo_rd_dqs(dev_priv, fails);
ret = fthd_ddr_generic_shmoo_rd_dqs(dev_priv, fails);
if (ret)
return ret;
ret = bcwc_ddr_wr_dqs_setting(dev_priv, 3, fails, settings);
ret = fthd_ddr_wr_dqs_setting(dev_priv, 3, fails, settings);
if (ret)
return ret;
ret = bcwc_ddr_wr_dqs_setting(dev_priv, 1, fails, settings);
ret = fthd_ddr_wr_dqs_setting(dev_priv, 1, fails, settings);
if (ret)
return ret;
ret = bcwc_ddr_wr_dqs_setting(dev_priv, 2, fails, settings);
ret = fthd_ddr_wr_dqs_setting(dev_priv, 2, fails, settings);
if (ret)
return ret;
/* NOP for now */
ret = bcwc_ddr_calibrate_create_result(dev_priv);
ret = fthd_ddr_calibrate_create_result(dev_priv);
if (ret)
return ret;
return 0;
}
static int bcwc_ddr_calibrate_wr_dq(struct bcwc_private *dev_priv, u32 *fails,
static int fthd_ddr_calibrate_wr_dq(struct fthd_private *dev_priv, u32 *fails,
u32 *settings)
{
return 0;
}
static int bcwc_ddr_generic_shmoo_calibrate_wr_dq(struct bcwc_private *dev_priv)
static int fthd_ddr_generic_shmoo_calibrate_wr_dq(struct fthd_private *dev_priv)
{
u32 fails[64];
u32 settings[64]; /* Size is actually 16? */
@@ -602,66 +602,66 @@ static int bcwc_ddr_generic_shmoo_calibrate_wr_dq(struct bcwc_private *dev_priv)
for (bl = 0; bl < 2; bl++) {
offset = S2_DDR40_2A10 + (bl * S2_DDR40_BYTE_LANE_SIZE);
for (bit = 0; bit < 8; bit++) {
BCWC_S2_REG_WRITE(setting | 0x30000,
FTHD_S2_REG_WRITE(setting | 0x30000,
offset + (bit * 4));
}
}
fails[setting] = bcwc_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
fails[setting] = fthd_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM);
}
fails[63] = 0xffff; /* Last setting is always a fail */
bcwc_ddr_calibrate_wr_dq(dev_priv, fails, settings);
fthd_ddr_calibrate_wr_dq(dev_priv, fails, settings);
return ret;
}
static int bcwc_ddr_generic_shmoo_calibrate_wr_dm(struct bcwc_private *dev_priv)
static int fthd_ddr_generic_shmoo_calibrate_wr_dm(struct fthd_private *dev_priv)
{
return 0;
}
static int bcwc_ddr_generic_shmoo_calibrate_addr(struct bcwc_private *dev_priv)
static int fthd_ddr_generic_shmoo_calibrate_addr(struct fthd_private *dev_priv)
{
return 0;
}
int bcwc_ddr_calibrate(struct bcwc_private *dev_priv)
int fthd_ddr_calibrate(struct fthd_private *dev_priv)
{
u32 reg;
int ret;
BCWC_S2_REG_WRITE(0, S2_DDR40_PHY_VDL_CTL);
BCWC_S2_REG_WRITE(0x200, S2_DDR40_PHY_VDL_CTL);
FTHD_S2_REG_WRITE(0, S2_DDR40_PHY_VDL_CTL);
FTHD_S2_REG_WRITE(0x200, S2_DDR40_PHY_VDL_CTL);
while (1) {
reg = BCWC_S2_REG_READ(S2_DDR40_PHY_VDL_STATUS);
reg = FTHD_S2_REG_READ(S2_DDR40_PHY_VDL_STATUS);
if (reg & 0x1)
break;
}
ret = bcwc_ddr_calibrate_rd_data_dly_fifo(dev_priv);
ret = fthd_ddr_calibrate_rd_data_dly_fifo(dev_priv);
if (ret)
return ret;
ret = bcwc_ddr_calibrate_re_byte_fifo(dev_priv);
ret = fthd_ddr_calibrate_re_byte_fifo(dev_priv);
if (ret)
return ret;
ret = bcwc_ddr_generic_shmoo_calibrate_rd_dqs(dev_priv);
ret = fthd_ddr_generic_shmoo_calibrate_rd_dqs(dev_priv);
if (ret)
return ret;
ret = bcwc_ddr_generic_shmoo_calibrate_wr_dq(dev_priv);
ret = fthd_ddr_generic_shmoo_calibrate_wr_dq(dev_priv);
if (ret)
return ret;
ret = bcwc_ddr_generic_shmoo_calibrate_wr_dm(dev_priv);
ret = fthd_ddr_generic_shmoo_calibrate_wr_dm(dev_priv);
if (ret)
return ret;
ret = bcwc_ddr_generic_shmoo_calibrate_addr(dev_priv);
ret = fthd_ddr_generic_shmoo_calibrate_addr(dev_priv);
if (ret)
return ret;

8
bcwc_ddr.h → fthd_ddr.h
View File

@@ -17,14 +17,14 @@
*
*/
#ifndef _BCWC_DDR_H
#define _BCWC_DDR_H
#ifndef _FTHD_DDR_H
#define _FTHD_DDR_H
#define MEM_VERIFY_BASE 0x0 /* 0x1000000 */
#define MEM_VERIFY_NUM 128
#define MEM_VERIFY_NUM_FULL (1 * 1024 * 1024)
int bcwc_ddr_calibrate(struct bcwc_private *dev_priv);
int bcwc_ddr_verify_mem(struct bcwc_private *dev_priv, u32 base, int count);
int fthd_ddr_calibrate(struct fthd_private *dev_priv);
int fthd_ddr_verify_mem(struct fthd_private *dev_priv, u32 base, int count);
#endif

228
bcwc_drv.c → fthd_drv.c
View File

@@ -28,79 +28,79 @@
#include <linux/sched.h>
#include <linux/wait.h>
#include <linux/videodev2.h>
#include "bcwc_drv.h"
#include "bcwc_hw.h"
#include "bcwc_isp.h"
#include "bcwc_ringbuf.h"
#include "bcwc_buffer.h"
#include "bcwc_v4l2.h"
#include "fthd_drv.h"
#include "fthd_hw.h"
#include "fthd_isp.h"
#include "fthd_ringbuf.h"
#include "fthd_buffer.h"
#include "fthd_v4l2.h"
static int bcwc_pci_reserve_mem(struct bcwc_private *dev_priv)
static int fthd_pci_reserve_mem(struct fthd_private *dev_priv)
{
unsigned long start;
unsigned long len;
int ret;
/* Reserve resources */
ret = pci_request_region(dev_priv->pdev, BCWC_PCI_S2_IO, "S2 IO");
ret = pci_request_region(dev_priv->pdev, FTHD_PCI_S2_IO, "S2 IO");
if (ret) {
dev_err(&dev_priv->pdev->dev, "Failed to request S2 IO\n");
return ret;
}
ret = pci_request_region(dev_priv->pdev, BCWC_PCI_ISP_IO, "ISP IO");
ret = pci_request_region(dev_priv->pdev, FTHD_PCI_ISP_IO, "ISP IO");
if (ret) {
dev_err(&dev_priv->pdev->dev, "Failed to request ISP IO\n");
pci_release_region(dev_priv->pdev, BCWC_PCI_S2_IO);
pci_release_region(dev_priv->pdev, FTHD_PCI_S2_IO);
return ret;
}
ret = pci_request_region(dev_priv->pdev, BCWC_PCI_S2_MEM, "S2 MEM");
ret = pci_request_region(dev_priv->pdev, FTHD_PCI_S2_MEM, "S2 MEM");
if (ret) {
pci_release_region(dev_priv->pdev, BCWC_PCI_ISP_IO);
pci_release_region(dev_priv->pdev, BCWC_PCI_S2_IO);
pci_release_region(dev_priv->pdev, FTHD_PCI_ISP_IO);
pci_release_region(dev_priv->pdev, FTHD_PCI_S2_IO);
return ret;
}
/* S2 IO */
start = pci_resource_start(dev_priv->pdev, BCWC_PCI_S2_IO);
len = pci_resource_len(dev_priv->pdev, BCWC_PCI_S2_IO);
start = pci_resource_start(dev_priv->pdev, FTHD_PCI_S2_IO);
len = pci_resource_len(dev_priv->pdev, FTHD_PCI_S2_IO);
dev_priv->s2_io = ioremap_nocache(start, len);
dev_priv->s2_io_len = len;
/* S2 MEM */
start = pci_resource_start(dev_priv->pdev, BCWC_PCI_S2_MEM);
len = pci_resource_len(dev_priv->pdev, BCWC_PCI_S2_MEM);
start = pci_resource_start(dev_priv->pdev, FTHD_PCI_S2_MEM);
len = pci_resource_len(dev_priv->pdev, FTHD_PCI_S2_MEM);
dev_priv->s2_mem = ioremap_nocache(start, len);
dev_priv->s2_mem_len = len;
/* ISP IO */
start = pci_resource_start(dev_priv->pdev, BCWC_PCI_ISP_IO);
len = pci_resource_len(dev_priv->pdev, BCWC_PCI_ISP_IO);
start = pci_resource_start(dev_priv->pdev, FTHD_PCI_ISP_IO);
len = pci_resource_len(dev_priv->pdev, FTHD_PCI_ISP_IO);
dev_priv->isp_io = ioremap_nocache(start, len);
dev_priv->isp_io_len = len;
pr_debug("Allocated S2 regs (BAR %d). %u bytes at 0x%p",
BCWC_PCI_S2_IO, dev_priv->s2_io_len, dev_priv->s2_io);
FTHD_PCI_S2_IO, dev_priv->s2_io_len, dev_priv->s2_io);
pr_debug("Allocated S2 mem (BAR %d). %u bytes at 0x%p",
BCWC_PCI_S2_MEM, dev_priv->s2_mem_len, dev_priv->s2_mem);
FTHD_PCI_S2_MEM, dev_priv->s2_mem_len, dev_priv->s2_mem);
pr_debug("Allocated ISP regs (BAR %d). %u bytes at 0x%p",
BCWC_PCI_ISP_IO, dev_priv->isp_io_len, dev_priv->isp_io);
FTHD_PCI_ISP_IO, dev_priv->isp_io_len, dev_priv->isp_io);
return 0;
}
static void bcwc_irq_disable(struct bcwc_private *dev_priv)
static void fthd_irq_disable(struct fthd_private *dev_priv)
{
//bcwc_hw_irq_disable(dev_priv);
//fthd_hw_irq_disable(dev_priv);
free_irq(dev_priv->pdev->irq, dev_priv);
}
static void sharedmalloc_handler(struct bcwc_private *dev_priv,
static void sharedmalloc_handler(struct fthd_private *dev_priv,
struct fw_channel *chan,
struct bcwc_ringbuf_entry *entry)
struct fthd_ringbuf_entry *entry)
{
u32 request_size, response_size, address;
struct isp_mem_obj *obj, **p;
@@ -114,7 +114,7 @@ static void sharedmalloc_handler(struct bcwc_private *dev_priv,
p = dev_priv->s2_mem + address - 64;
isp_mem_destroy(*p);
bcwc_channel_ringbuf_send(dev_priv, chan, 0, 0, 0);
fthd_channel_ringbuf_send(dev_priv, chan, 0, 0, 0);
} else {
if (!request_size)
return;
@@ -127,15 +127,15 @@ static void sharedmalloc_handler(struct bcwc_private *dev_priv,
response_size >> 8, response_size);
p = dev_priv->s2_mem + obj->offset;
*p = obj;
bcwc_channel_ringbuf_send(dev_priv, chan, obj->offset + 64, 0, 0);
fthd_channel_ringbuf_send(dev_priv, chan, obj->offset + 64, 0, 0);
}
}
static void terminal_handler(struct bcwc_private *dev_priv,
static void terminal_handler(struct fthd_private *dev_priv,
struct fw_channel *chan,
struct bcwc_ringbuf_entry *entry)
struct fthd_ringbuf_entry *entry)
{
u32 request_size, response_size, address;
@@ -150,9 +150,9 @@ static void terminal_handler(struct bcwc_private *dev_priv,
}
static void buf_t2h_handler(struct bcwc_private *dev_priv,
static void buf_t2h_handler(struct fthd_private *dev_priv,
struct fw_channel *chan,
struct bcwc_ringbuf_entry *entry)
struct fthd_ringbuf_entry *entry)
{
u32 request_size, response_size, address;
@@ -163,36 +163,36 @@ static void buf_t2h_handler(struct bcwc_private *dev_priv,
if (entry->address_flags & 1)
return;
bcwc_buffer_return_handler(dev_priv, dev_priv->s2_mem + address, request_size);
bcwc_channel_ringbuf_send(dev_priv, chan, (response_size & 0x10000000) ? address : 0,
fthd_buffer_return_handler(dev_priv, dev_priv->s2_mem + address, request_size);
fthd_channel_ringbuf_send(dev_priv, chan, (response_size & 0x10000000) ? address : 0,
0, 0x80000000);
}
static void io_t2h_handler(struct bcwc_private *dev_priv,
static void io_t2h_handler(struct fthd_private *dev_priv,
struct fw_channel *chan,
struct bcwc_ringbuf_entry *entry)
struct fthd_ringbuf_entry *entry)
{
bcwc_channel_ringbuf_send(dev_priv, chan, 0, 0, 0);
fthd_channel_ringbuf_send(dev_priv, chan, 0, 0, 0);
}
static void buf_h2t_handler(struct bcwc_private *dev_priv,
static void buf_h2t_handler(struct fthd_private *dev_priv,
struct fw_channel *chan,
struct bcwc_ringbuf_entry *entry)
struct fthd_ringbuf_entry *entry)
{
bcwc_buffer_queued_handler(dev_priv, (struct dma_descriptor_list *)(dev_priv->s2_mem + (entry->address_flags & ~3)));
fthd_buffer_queued_handler(dev_priv, (struct dma_descriptor_list *)(dev_priv->s2_mem + (entry->address_flags & ~3)));
}
static void bcwc_handle_irq(struct bcwc_private *dev_priv, struct fw_channel *chan)
static void fthd_handle_irq(struct fthd_private *dev_priv, struct fw_channel *chan)
{
struct bcwc_ringbuf_entry *entry;
struct fthd_ringbuf_entry *entry;
while((entry = bcwc_channel_ringbuf_receive(dev_priv, chan))) {
while((entry = fthd_channel_ringbuf_receive(dev_priv, chan))) {
pr_debug("channel %s: message available, address %08x\n", chan->name, entry->address_flags);
if (chan == dev_priv->channel_shared_malloc) {
sharedmalloc_handler(dev_priv, chan, entry);
} else if (chan == dev_priv->channel_terminal) {
terminal_handler(dev_priv, chan, entry);
bcwc_channel_ringbuf_send(dev_priv, chan, 0, 0, 0);
fthd_channel_ringbuf_send(dev_priv, chan, 0, 0, 0);
} else if (chan == dev_priv->channel_buf_t2h) {
buf_t2h_handler(dev_priv, chan, entry);
} else if (chan == dev_priv->channel_io) {
@@ -206,9 +206,9 @@ static void bcwc_handle_irq(struct bcwc_private *dev_priv, struct fw_channel *ch
}
}
static void bcwc_irq_work(struct work_struct *work)
static void fthd_irq_work(struct work_struct *work)
{
struct bcwc_private *dev_priv = container_of(work, struct bcwc_private, irq_work);
struct fthd_private *dev_priv = container_of(work, struct fthd_private, irq_work);
struct fw_channel *chan;
u32 pending;
@@ -216,7 +216,7 @@ static void bcwc_irq_work(struct work_struct *work)
while(i++ < 500) {
spin_lock_irq(&dev_priv->io_lock);
pending = BCWC_ISP_REG_READ(ISP_REG_41000);
pending = FTHD_ISP_REG_READ(ISP_REG_41000);
spin_unlock_irq(&dev_priv->io_lock);
if (!(pending & 0xf0))
@@ -224,7 +224,7 @@ static void bcwc_irq_work(struct work_struct *work)
pci_write_config_dword(dev_priv->pdev, 0x94, 0);
spin_lock_irq(&dev_priv->io_lock);
BCWC_ISP_REG_WRITE(pending, ISP_REG_41024);
FTHD_ISP_REG_WRITE(pending, ISP_REG_41024);
spin_unlock_irq(&dev_priv->io_lock);
pci_write_config_dword(dev_priv->pdev, 0x90, 0x200);
@@ -235,25 +235,25 @@ static void bcwc_irq_work(struct work_struct *work)
BUG_ON(chan->source > 3);
if (!((0x10 << chan->source) & pending))
continue;
bcwc_handle_irq(dev_priv, chan);
fthd_handle_irq(dev_priv, chan);
}
}
if (i >= 500) {
dev_err(&dev_priv->pdev->dev, "irq stuck, disabling\n");
bcwc_irq_disable(dev_priv);
fthd_irq_disable(dev_priv);
}
pci_write_config_dword(dev_priv->pdev, 0x94, 0x200);
}
static irqreturn_t bcwc_irq_handler(int irq, void *arg)
static irqreturn_t fthd_irq_handler(int irq, void *arg)
{
struct bcwc_private *dev_priv = arg;
struct fthd_private *dev_priv = arg;
u32 pending;
unsigned long flags;
spin_lock_irqsave(&dev_priv->io_lock, flags);
pending = BCWC_ISP_REG_READ(ISP_REG_41000);
pending = FTHD_ISP_REG_READ(ISP_REG_41000);
spin_unlock_irqrestore(&dev_priv->io_lock, flags);
if (!(pending & 0xf0))
@@ -264,11 +264,11 @@ static irqreturn_t bcwc_irq_handler(int irq, void *arg)
return IRQ_HANDLED;
}
static int bcwc_irq_enable(struct bcwc_private *dev_priv)
static int fthd_irq_enable(struct fthd_private *dev_priv)
{
int ret;
ret = request_irq(dev_priv->pdev->irq, bcwc_irq_handler, IRQF_SHARED,
ret = request_irq(dev_priv->pdev->irq, fthd_irq_handler, IRQF_SHARED,
KBUILD_MODNAME, (void *)dev_priv);
if (ret)
@@ -278,7 +278,7 @@ static int bcwc_irq_enable(struct bcwc_private *dev_priv)
}
static int bcwc_pci_set_dma_mask(struct bcwc_private *dev_priv,
static int fthd_pci_set_dma_mask(struct fthd_private *dev_priv,
unsigned int mask)
{
int ret;
@@ -295,33 +295,33 @@ static int bcwc_pci_set_dma_mask(struct bcwc_private *dev_priv,
return 0;
}
static void bcwc_stop_firmware(struct bcwc_private *dev_priv)
static void fthd_stop_firmware(struct fthd_private *dev_priv)
{
bcwc_isp_cmd_stop(dev_priv);
fthd_isp_cmd_stop(dev_priv);
isp_powerdown(dev_priv);
}
static void bcwc_pci_remove(struct pci_dev *pdev)
static void fthd_pci_remove(struct pci_dev *pdev)
{
struct bcwc_private *dev_priv;
struct fthd_private *dev_priv;
dev_priv = pci_get_drvdata(pdev);
if (!dev_priv)
goto out;
bcwc_v4l2_unregister(dev_priv);
fthd_v4l2_unregister(dev_priv);
bcwc_stop_firmware(dev_priv);
fthd_stop_firmware(dev_priv);
bcwc_irq_disable(dev_priv);
fthd_irq_disable(dev_priv);
cancel_work_sync(&dev_priv->irq_work);
isp_uninit(dev_priv);
bcwc_hw_deinit(dev_priv);
fthd_hw_deinit(dev_priv);
bcwc_buffer_exit(dev_priv);
fthd_buffer_exit(dev_priv);
pci_disable_msi(pdev);
@@ -332,14 +332,14 @@ static void bcwc_pci_remove(struct pci_dev *pdev)
if (dev_priv->isp_io)
iounmap(dev_priv->isp_io);
pci_release_region(pdev, BCWC_PCI_S2_IO);
pci_release_region(pdev, BCWC_PCI_S2_MEM);
pci_release_region(pdev, BCWC_PCI_ISP_IO);
pci_release_region(pdev, FTHD_PCI_S2_IO);
pci_release_region(pdev, FTHD_PCI_S2_MEM);
pci_release_region(pdev, FTHD_PCI_ISP_IO);
out:
pci_disable_device(pdev);
}
static int bcwc_pci_init(struct bcwc_private *dev_priv)
static int fthd_pci_init(struct fthd_private *dev_priv)
{
struct pci_dev *pdev = dev_priv->pdev;
int ret;
@@ -351,7 +351,7 @@ static int bcwc_pci_init(struct bcwc_private *dev_priv)
return ret;
}
ret = bcwc_pci_reserve_mem(dev_priv);
ret = fthd_pci_reserve_mem(dev_priv);
if (ret)
goto fail_enable;
@@ -361,13 +361,13 @@ static int bcwc_pci_init(struct bcwc_private *dev_priv)
goto fail_reserve;
}
ret = bcwc_irq_enable(dev_priv);
ret = fthd_irq_enable(dev_priv);
if (ret)
goto fail_msi;
ret = bcwc_pci_set_dma_mask(dev_priv, 64);
ret = fthd_pci_set_dma_mask(dev_priv, 64);
if (ret)
ret = bcwc_pci_set_dma_mask(dev_priv, 32);
ret = fthd_pci_set_dma_mask(dev_priv, 32);
if (ret)
goto fail_irq;
@@ -380,52 +380,52 @@ static int bcwc_pci_init(struct bcwc_private *dev_priv)
return 0;
fail_irq:
bcwc_irq_disable(dev_priv);
fthd_irq_disable(dev_priv);
fail_msi:
pci_disable_msi(pdev);
fail_reserve:
pci_release_region(pdev, BCWC_PCI_S2_IO);
pci_release_region(pdev, BCWC_PCI_S2_MEM);
pci_release_region(pdev, BCWC_PCI_ISP_IO);
pci_release_region(pdev, FTHD_PCI_S2_IO);
pci_release_region(pdev, FTHD_PCI_S2_MEM);
pci_release_region(pdev, FTHD_PCI_ISP_IO);
fail_enable:
pci_disable_device(pdev);
return ret;
}
static int bcwc_firmware_start(struct bcwc_private *dev_priv)
static int fthd_firmware_start(struct fthd_private *dev_priv)
{
int ret;
ret = bcwc_isp_cmd_start(dev_priv);
ret = fthd_isp_cmd_start(dev_priv);
if (ret)
return ret;
ret = bcwc_isp_cmd_print_enable(dev_priv, 1);
ret = fthd_isp_cmd_print_enable(dev_priv, 1);
if (ret)
return ret;
ret = bcwc_isp_cmd_camera_config(dev_priv);
ret = fthd_isp_cmd_camera_config(dev_priv);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_info(dev_priv);
ret = fthd_isp_cmd_channel_info(dev_priv);
if (ret)
return ret;
return bcwc_isp_cmd_set_loadfile(dev_priv);
return fthd_isp_cmd_set_loadfile(dev_priv);
}
static int bcwc_pci_probe(struct pci_dev *pdev,
static int fthd_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *entry)
{
struct bcwc_private *dev_priv;
struct fthd_private *dev_priv;
int ret;
dev_info(&pdev->dev, "Found Broadcom PCIe webcam with device id: %x\n",
pdev->device);
dev_priv = kzalloc(sizeof(struct bcwc_private), GFP_KERNEL);
dev_priv = kzalloc(sizeof(struct fthd_private), GFP_KERNEL);
if (!dev_priv) {
dev_err(&pdev->dev, "Failed to allocate memory\n");
return -ENOMEM;
@@ -441,43 +441,43 @@ static int bcwc_pci_probe(struct pci_dev *pdev,
mutex_init(&dev_priv->ioctl_lock);
init_waitqueue_head(&dev_priv->cmd_wq);
INIT_LIST_HEAD(&dev_priv->buffer_queue);
INIT_WORK(&dev_priv->irq_work, bcwc_irq_work);
INIT_WORK(&dev_priv->irq_work, fthd_irq_work);
dev_priv->pdev = pdev;
ret = bcwc_pci_init(dev_priv);
ret = fthd_pci_init(dev_priv);
if (ret)
goto fail_work;
ret = bcwc_buffer_init(dev_priv);
ret = fthd_buffer_init(dev_priv);
if (ret)
goto fail_pci;
ret = bcwc_hw_init(dev_priv);
ret = fthd_hw_init(dev_priv);
if (ret)
goto fail_buffer;
ret = bcwc_firmware_start(dev_priv);
ret = fthd_firmware_start(dev_priv);
if (ret)
goto fail_hw;
ret = bcwc_v4l2_register(dev_priv);
ret = fthd_v4l2_register(dev_priv);
if (ret)
goto fail_firmware;
return 0;
fail_firmware:
bcwc_stop_firmware(dev_priv);
fthd_stop_firmware(dev_priv);
fail_hw:
bcwc_hw_deinit(dev_priv);
fthd_hw_deinit(dev_priv);
fail_buffer:
bcwc_buffer_exit(dev_priv);
fthd_buffer_exit(dev_priv);
fail_pci:
bcwc_irq_disable(dev_priv);
fthd_irq_disable(dev_priv);
pci_disable_msi(pdev);
pci_release_region(pdev, BCWC_PCI_S2_IO);
pci_release_region(pdev, BCWC_PCI_S2_MEM);
pci_release_region(pdev, BCWC_PCI_ISP_IO);
pci_release_region(pdev, FTHD_PCI_S2_IO);
pci_release_region(pdev, FTHD_PCI_S2_MEM);
pci_release_region(pdev, FTHD_PCI_ISP_IO);
pci_disable_device(pdev);
fail_work:
@@ -487,38 +487,38 @@ fail_work:
}
#ifdef CONFIG_PM
static int bcwc_pci_suspend(struct pci_dev *pdev, pm_message_t state)
static int fthd_pci_suspend(struct pci_dev *pdev, pm_message_t state)
{
return 0;
}
static int bcwc_pci_resume(struct pci_dev *pdev)
static int fthd_pci_resume(struct pci_dev *pdev)
{
return 0;
}
#endif /* CONFIG_PM */
static const struct pci_device_id bcwc_pci_id_table[] = {
static const struct pci_device_id fthd_pci_id_table[] = {
{ PCI_VDEVICE(BROADCOM, 0x1570), 4 },
{ 0, },
};
static struct pci_driver bcwc_pci_driver = {
static struct pci_driver fthd_pci_driver = {
.name = KBUILD_MODNAME,
.probe = bcwc_pci_probe,
.remove = bcwc_pci_remove,
.id_table = bcwc_pci_id_table,
.probe = fthd_pci_probe,
.remove = fthd_pci_remove,
.id_table = fthd_pci_id_table,
#ifdef CONFIG_PM
.suspend = bcwc_pci_suspend,
.resume = bcwc_pci_resume,
.suspend = fthd_pci_suspend,
.resume = fthd_pci_resume,
#endif
};
static int __init bcwc_init(void)
static int __init fthd_init(void)
{
int ret = 0;
ret = pci_register_driver(&bcwc_pci_driver);
ret = pci_register_driver(&fthd_pci_driver);
if (ret)
pr_err("Couldn't find any devices (ret=%d)\n", ret);
@@ -526,13 +526,13 @@ static int __init bcwc_init(void)
return ret;
}
static void __exit bcwc_exit(void)
static void __exit fthd_exit(void)
{
pci_unregister_driver(&bcwc_pci_driver);
pci_unregister_driver(&fthd_pci_driver);
}
module_init(bcwc_init);
module_exit(bcwc_exit);
module_init(fthd_init);
module_exit(fthd_exit);
MODULE_AUTHOR("Patrik Jakobsson <patrik.r.jakobsson@gmail.com>");
MODULE_DESCRIPTION("Broadcom PCIe 1570 webcam driver");

30
bcwc_drv.h → fthd_drv.h
View File

@@ -17,7 +17,7 @@
*
*/
#ifndef _BCWC_PCIE_H
#ifndef _FTHD_PCIE_H
#define _PCWC_PCIE_H
#include <linux/pci.h>
@@ -26,20 +26,20 @@
#include <linux/mutex.h>
#include <media/videobuf2-dma-sg.h>
#include <media/v4l2-device.h>
#include "bcwc_reg.h"
#include "bcwc_ringbuf.h"
#include "bcwc_buffer.h"
#include "bcwc_v4l2.h"
#include "fthd_reg.h"
#include "fthd_ringbuf.h"
#include "fthd_buffer.h"
#include "fthd_v4l2.h"
#define BCWC_PCI_S2_IO 0
#define BCWC_PCI_S2_MEM 2
#define BCWC_PCI_ISP_IO 4
#define FTHD_PCI_S2_IO 0
#define FTHD_PCI_S2_MEM 2
#define FTHD_PCI_ISP_IO 4
#define MAX(a, b) ((a)>(b)?(a):(b))
#define BCWC_BUFFERS 4
#define FTHD_BUFFERS 4
struct bcwc_reg {
struct fthd_reg {
u32 offset;
u32 value;
};
@@ -57,13 +57,13 @@ struct fw_channel {
u32 type;
int tx_lock;
int rx_lock;
struct bcwc_ringbuf ringbuf;
struct fthd_ringbuf ringbuf;
spinlock_t lock;
char *name;
};
struct bcwc_private {
struct fthd_private {
struct pci_dev *pdev;
unsigned int dma_mask;
@@ -97,7 +97,7 @@ struct bcwc_private {
/* DDR_PHY saved registers. Offsets need to be initialized somewhere */
u32 ddr_phy_num_regs;
struct bcwc_reg ddr_phy_reg_map[DDR_PHY_NUM_REGS];
struct fthd_reg ddr_phy_reg_map[DDR_PHY_NUM_REGS];
/* Root resource for memory management */
struct resource *mem;
@@ -125,13 +125,13 @@ struct bcwc_private {
int sensor_id0;
int sensor_id1;
struct bcwc_fmt fmt;
struct fthd_fmt fmt;
struct vb2_queue vb2_queue;
struct mutex vb2_queue_lock;
struct list_head buffer_queue;
struct vb2_alloc_ctx *alloc_ctx;
struct h2t_buf_ctx h2t_bufs[BCWC_BUFFERS];
struct h2t_buf_ctx h2t_bufs[FTHD_BUFFERS];
int frametime;
};

316
bcwc_hw.c → fthd_hw.c
View File

@@ -18,10 +18,10 @@
*/
#include <linux/delay.h>
#include "bcwc_drv.h"
#include "bcwc_hw.h"
#include "bcwc_ddr.h"
#include "bcwc_isp.h"
#include "fthd_drv.h"
#include "fthd_hw.h"
#include "fthd_ddr.h"
#include "fthd_isp.h"
/* FIXME: Double check these */
static u32 ddr_phy_reg_map[] = {
@@ -43,35 +43,35 @@ static u32 ddr_phy_reg_map[] = {
0x038c, 0x0390, 0x0394, 0x03a0, 0x03a4, 0x03a8, 0x03ac,
};
static int bcwc_hw_s2_pll_reset(struct bcwc_private *dev_priv)
static int fthd_hw_s2_pll_reset(struct fthd_private *dev_priv)
{
BCWC_S2_REG_WRITE(0x40, S2_PLL_CTRL_2C);
BCWC_S2_REG_WRITE(0x0, S2_PLL_CTRL_2C);
BCWC_S2_REG_WRITE(0xbcbc1500, S2_PLL_CTRL_100);
BCWC_S2_REG_WRITE(0x0, S2_PLL_CTRL_14);
FTHD_S2_REG_WRITE(0x40, S2_PLL_CTRL_2C);
FTHD_S2_REG_WRITE(0x0, S2_PLL_CTRL_2C);
FTHD_S2_REG_WRITE(0xbcbc1500, S2_PLL_CTRL_100);
FTHD_S2_REG_WRITE(0x0, S2_PLL_CTRL_14);
udelay(10000);
BCWC_S2_REG_WRITE(0x3, S2_PLL_CTRL_14);
FTHD_S2_REG_WRITE(0x3, S2_PLL_CTRL_14);
dev_info(&dev_priv->pdev->dev, "PLL reset finished\n");
return 0;
}
static int bcwc_hw_s2_init_pcie_link(struct bcwc_private *dev_priv)
static int fthd_hw_s2_init_pcie_link(struct fthd_private *dev_priv)
{
u32 reg;
reg = BCWC_S2_REG_READ(S2_PCIE_LINK_D000);
BCWC_S2_REG_WRITE(reg | 0x10, S2_PCIE_LINK_D000);
reg = FTHD_S2_REG_READ(S2_PCIE_LINK_D000);
FTHD_S2_REG_WRITE(reg | 0x10, S2_PCIE_LINK_D000);
BCWC_S2_REG_WRITE(0x1804, S2_PCIE_LINK_D120);
BCWC_S2_REG_WRITE(0xac5800, S2_PCIE_LINK_D124);
BCWC_S2_REG_WRITE(0x1804, S2_PCIE_LINK_D120);
FTHD_S2_REG_WRITE(0x1804, S2_PCIE_LINK_D120);
FTHD_S2_REG_WRITE(0xac5800, S2_PCIE_LINK_D124);
FTHD_S2_REG_WRITE(0x1804, S2_PCIE_LINK_D120);
/* Check if PLL is powered down when S2 PCIe link is in L1 state */
reg = BCWC_S2_REG_READ(S2_PCIE_LINK_D124);
reg = FTHD_S2_REG_READ(S2_PCIE_LINK_D124);
if (reg != 0xac5800) {
dev_err(&dev_priv->pdev->dev,
"Failed to init S2 PCIe link: %08x\n", reg);
@@ -81,25 +81,25 @@ static int bcwc_hw_s2_init_pcie_link(struct bcwc_private *dev_priv)
/* PLL is powered down */
dev_info(&dev_priv->pdev->dev, "S2 PCIe link init succeeded\n");
BCWC_S2_REG_WRITE(0x1f08, S2_PCIE_LINK_D128);
BCWC_S2_REG_WRITE(0x80008610, S2_PCIE_LINK_D12C);
BCWC_S2_REG_WRITE(0x1608, S2_PCIE_LINK_D128);
BCWC_S2_REG_WRITE(0x8000fc00, S2_PCIE_LINK_D12C);
BCWC_S2_REG_WRITE(0x1f08, S2_PCIE_LINK_D128);
BCWC_S2_REG_WRITE(0x80008610, S2_PCIE_LINK_D12C);
BCWC_S2_REG_WRITE(0x1708, S2_PCIE_LINK_D128);
BCWC_S2_REG_WRITE(0x800005bf, S2_PCIE_LINK_D12C);
FTHD_S2_REG_WRITE(0x1f08, S2_PCIE_LINK_D128);
FTHD_S2_REG_WRITE(0x80008610, S2_PCIE_LINK_D12C);
FTHD_S2_REG_WRITE(0x1608, S2_PCIE_LINK_D128);
FTHD_S2_REG_WRITE(0x8000fc00, S2_PCIE_LINK_D12C);
FTHD_S2_REG_WRITE(0x1f08, S2_PCIE_LINK_D128);
FTHD_S2_REG_WRITE(0x80008610, S2_PCIE_LINK_D12C);
FTHD_S2_REG_WRITE(0x1708, S2_PCIE_LINK_D128);
FTHD_S2_REG_WRITE(0x800005bf, S2_PCIE_LINK_D12C);
return 0;
}
static int bcwc_hw_s2_pll_init(struct bcwc_private *dev_priv, u32 ddr_speed)
static int fthd_hw_s2_pll_init(struct fthd_private *dev_priv, u32 ddr_speed)
{
u32 ref_clk_25;
u32 reg;
int retries = 0;
reg = BCWC_S2_REG_READ(S2_PLL_REFCLK);
reg = FTHD_S2_REG_READ(S2_PLL_REFCLK);
ref_clk_25 = reg & S2_PLL_REFCLK_25MHZ ? 1 : 0;
if (ref_clk_25)
@@ -110,32 +110,32 @@ static int bcwc_hw_s2_pll_init(struct bcwc_private *dev_priv, u32 ddr_speed)
if (ddr_speed == 400) {
if (ref_clk_25) {
/* Ref clk 25 */
BCWC_S2_REG_WRITE(0x00400078, S2_PLL_CTRL_510);
BCWC_S2_REG_WRITE(0x19280804, S2_PLL_CTRL_24);
FTHD_S2_REG_WRITE(0x00400078, S2_PLL_CTRL_510);
FTHD_S2_REG_WRITE(0x19280804, S2_PLL_CTRL_24);
} else {
/* Ref clk 24 */
BCWC_S2_REG_WRITE(0x03200000, S2_PLL_CTRL_20);
BCWC_S2_REG_WRITE(0x14280603, S2_PLL_CTRL_24);
FTHD_S2_REG_WRITE(0x03200000, S2_PLL_CTRL_20);
FTHD_S2_REG_WRITE(0x14280603, S2_PLL_CTRL_24);
}
} else if (ddr_speed == 300) {
if (ref_clk_25) {
/* Ref clk 25 */
BCWC_S2_REG_WRITE(0x00480078, S2_PLL_CTRL_510);
BCWC_S2_REG_WRITE(0x19280c06, S2_PLL_CTRL_24);
FTHD_S2_REG_WRITE(0x00480078, S2_PLL_CTRL_510);
FTHD_S2_REG_WRITE(0x19280c06, S2_PLL_CTRL_24);
} else {
/* Ref clk 24 */
BCWC_S2_REG_WRITE(0x03200000, S2_PLL_CTRL_20);
BCWC_S2_REG_WRITE(0x14280804, S2_PLL_CTRL_24);
FTHD_S2_REG_WRITE(0x03200000, S2_PLL_CTRL_20);
FTHD_S2_REG_WRITE(0x14280804, S2_PLL_CTRL_24);
}
} else if (ddr_speed == 200) {
if (ref_clk_25) {
/* Ref clk 25 */
BCWC_S2_REG_WRITE(0x00400078, S2_PLL_CTRL_510);
BCWC_S2_REG_WRITE(0x19281008, S2_PLL_CTRL_24);
FTHD_S2_REG_WRITE(0x00400078, S2_PLL_CTRL_510);
FTHD_S2_REG_WRITE(0x19281008, S2_PLL_CTRL_24);
} else {
/* Ref clk 24 */
BCWC_S2_REG_WRITE(0x03200000, S2_PLL_CTRL_20);
BCWC_S2_REG_WRITE(0x14280c06, S2_PLL_CTRL_24);
FTHD_S2_REG_WRITE(0x03200000, S2_PLL_CTRL_20);
FTHD_S2_REG_WRITE(0x14280c06, S2_PLL_CTRL_24);
}
} else {
if (ddr_speed != 450) {
@@ -147,23 +147,23 @@ static int bcwc_hw_s2_pll_init(struct bcwc_private *dev_priv, u32 ddr_speed)
if (ref_clk_25) {
/* Ref clk 25 */
BCWC_S2_REG_WRITE(0x0048007d, S2_PLL_CTRL_510);
BCWC_S2_REG_WRITE(0x19280904, S2_PLL_CTRL_24);
FTHD_S2_REG_WRITE(0x0048007d, S2_PLL_CTRL_510);
FTHD_S2_REG_WRITE(0x19280904, S2_PLL_CTRL_24);
} else {
/* Ref clk 24 */
BCWC_S2_REG_WRITE(0x04b00000, S2_PLL_CTRL_20);
BCWC_S2_REG_WRITE(0x14280904, S2_PLL_CTRL_24);
FTHD_S2_REG_WRITE(0x04b00000, S2_PLL_CTRL_20);
FTHD_S2_REG_WRITE(0x14280904, S2_PLL_CTRL_24);
}
}
bcwc_hw_s2_pll_reset(dev_priv);
fthd_hw_s2_pll_reset(dev_priv);
dev_info(&dev_priv->pdev->dev, "Waiting for S2 PLL to lock at %d MHz\n",
ddr_speed);
do {
reg = BCWC_S2_REG_READ(S2_PLL_CMU_STATUS);
reg = FTHD_S2_REG_READ(S2_PLL_CMU_STATUS);
udelay(10);
retries++;
} while (((reg & 0xff00) & S2_PLL_CMU_STATUS_LOCKED) && retries <= 10000);
@@ -177,11 +177,11 @@ static int bcwc_hw_s2_pll_init(struct bcwc_private *dev_priv, u32 ddr_speed)
(retries * 10));
}
reg = BCWC_S2_REG_READ(S2_PLL_STATUS_A8);
BCWC_S2_REG_WRITE(reg | S2_PLL_BYPASS, S2_PLL_STATUS_A8);
reg = FTHD_S2_REG_READ(S2_PLL_STATUS_A8);
FTHD_S2_REG_WRITE(reg | S2_PLL_BYPASS, S2_PLL_STATUS_A8);
udelay(10000);
reg = BCWC_S2_REG_READ(S2_PLL_STATUS_A8);
reg = FTHD_S2_REG_READ(S2_PLL_STATUS_A8);
if (reg & S2_PLL_BYPASS)
dev_info(&dev_priv->pdev->dev, "S2 PLL is in bypass mode\n");
else
@@ -190,42 +190,42 @@ static int bcwc_hw_s2_pll_init(struct bcwc_private *dev_priv, u32 ddr_speed)
return 0;
}
static int bcwc_hw_s2_preinit_ddr_controller_soc(struct bcwc_private *dev_priv)
static int fthd_hw_s2_preinit_ddr_controller_soc(struct fthd_private *dev_priv)
{
/* Wingardium leviosa */
BCWC_S2_REG_WRITE(0x203, S2_DDR_REG_1100);
BCWC_S2_REG_WRITE(0x203, S2_DDR_REG_1104);
BCWC_S2_REG_WRITE(0x203, S2_DDR_REG_1108);
BCWC_S2_REG_WRITE(0x203, S2_DDR_REG_110C);
BCWC_S2_REG_WRITE(0x203, S2_DDR_REG_1110);
BCWC_S2_REG_WRITE(0x203, S2_DDR_REG_1114);
BCWC_S2_REG_WRITE(0x203, S2_DDR_REG_1118);
BCWC_S2_REG_WRITE(0x203, S2_DDR_REG_111C);
FTHD_S2_REG_WRITE(0x203, S2_DDR_REG_1100);
FTHD_S2_REG_WRITE(0x203, S2_DDR_REG_1104);
FTHD_S2_REG_WRITE(0x203, S2_DDR_REG_1108);
FTHD_S2_REG_WRITE(0x203, S2_DDR_REG_110C);
FTHD_S2_REG_WRITE(0x203, S2_DDR_REG_1110);
FTHD_S2_REG_WRITE(0x203, S2_DDR_REG_1114);
FTHD_S2_REG_WRITE(0x203, S2_DDR_REG_1118);
FTHD_S2_REG_WRITE(0x203, S2_DDR_REG_111C);
return 0;
}
static int bcwc_hw_ddr_phy_soft_reset(struct bcwc_private *dev_priv)
static int fthd_hw_ddr_phy_soft_reset(struct fthd_private *dev_priv)
{
/* Clear status bits? */
BCWC_S2_REG_WRITE(0x281, S2_PLL_STATUS_A8);
FTHD_S2_REG_WRITE(0x281, S2_PLL_STATUS_A8);
BCWC_S2_REG_WRITE(0xfffff, S2_PLL_CTRL_9C);
FTHD_S2_REG_WRITE(0xfffff, S2_PLL_CTRL_9C);
udelay(10000);
BCWC_S2_REG_WRITE(0xffbff, S2_PLL_CTRL_9C);
FTHD_S2_REG_WRITE(0xffbff, S2_PLL_CTRL_9C);
return 0;
}
static inline int bcwc_hw_ddr_status_busy(struct bcwc_private *dev_priv,
static inline int fthd_hw_ddr_status_busy(struct fthd_private *dev_priv,
int retries, int delay)
{
int reg, i;
for (i = 0; i < retries; i++) {
reg = BCWC_S2_REG_READ(S2_DDR_STATUS_2018);
reg = FTHD_S2_REG_READ(S2_DDR_STATUS_2018);
if (!(reg & S2_DDR_STATUS_BUSY))
break;
@@ -243,25 +243,25 @@ static inline int bcwc_hw_ddr_status_busy(struct bcwc_private *dev_priv,
return 0;
}
static int bcwc_hw_ddr_rewrite_mode_regs(struct bcwc_private *dev_priv)
static int fthd_hw_ddr_rewrite_mode_regs(struct fthd_private *dev_priv)
{
int ret, val;
BCWC_S2_REG_WRITE(0x02000802, S2_DDR_2014);
FTHD_S2_REG_WRITE(0x02000802, S2_DDR_2014);
ret = bcwc_hw_ddr_status_busy(dev_priv, 500, 5);
ret = fthd_hw_ddr_status_busy(dev_priv, 500, 5);
if (ret != 0)
return ret;
BCWC_S2_REG_WRITE(0x3, S2_DDR_2014);
FTHD_S2_REG_WRITE(0x3, S2_DDR_2014);
ret = bcwc_hw_ddr_status_busy(dev_priv, 500, 5);
ret = fthd_hw_ddr_status_busy(dev_priv, 500, 5);
if (ret != 0)
return ret;
BCWC_S2_REG_WRITE(0x1, S2_DDR_2014);
FTHD_S2_REG_WRITE(0x1, S2_DDR_2014);
ret = bcwc_hw_ddr_status_busy(dev_priv, 500, 5);
ret = fthd_hw_ddr_status_busy(dev_priv, 500, 5);
if (ret != 0)
return ret;
@@ -270,9 +270,9 @@ static int bcwc_hw_ddr_rewrite_mode_regs(struct bcwc_private *dev_priv)
else
val = 0x16002000;
BCWC_S2_REG_WRITE(val, S2_DDR_2014);
FTHD_S2_REG_WRITE(val, S2_DDR_2014);
ret = bcwc_hw_ddr_status_busy(dev_priv, 500, 5);
ret = fthd_hw_ddr_status_busy(dev_priv, 500, 5);
if (ret != 0)
return ret;
@@ -282,7 +282,7 @@ static int bcwc_hw_ddr_rewrite_mode_regs(struct bcwc_private *dev_priv)
return 0;
}
static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
static int fthd_hw_s2_init_ddr_controller_soc(struct fthd_private *dev_priv)
{
u32 cmd;
u32 val;
@@ -304,29 +304,29 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
return -EIO;
}
reg = BCWC_S2_REG_READ(S2_PLL_CTRL_9C);
BCWC_S2_REG_WRITE(reg & 0xfffffcff, S2_PLL_CTRL_9C);
BCWC_S2_REG_WRITE(reg | 0x300, S2_PLL_CTRL_9C);
reg = FTHD_S2_REG_READ(S2_PLL_CTRL_9C);
FTHD_S2_REG_WRITE(reg & 0xfffffcff, S2_PLL_CTRL_9C);
FTHD_S2_REG_WRITE(reg | 0x300, S2_PLL_CTRL_9C);
bcwc_hw_s2_pll_init(dev_priv, dev_priv->ddr_speed);
fthd_hw_s2_pll_init(dev_priv, dev_priv->ddr_speed);
bcwc_hw_ddr_phy_soft_reset(dev_priv);
fthd_hw_ddr_phy_soft_reset(dev_priv);
BCWC_S2_REG_WRITE(0x2, S2_DDR40_WL_DRV_PAD_CTL);
BCWC_S2_REG_WRITE(0x2, S2_DDR40_WL_CLK_PAD_DISABLE);
FTHD_S2_REG_WRITE(0x2, S2_DDR40_WL_DRV_PAD_CTL);
FTHD_S2_REG_WRITE(0x2, S2_DDR40_WL_CLK_PAD_DISABLE);
/* Disable the hardware frequency change function */
BCWC_S2_REG_WRITE(0x3f4, S2_20F8);
FTHD_S2_REG_WRITE(0x3f4, S2_20F8);
/* Setup the PLL */
BCWC_S2_REG_WRITE(0x40, S2_2434);
BCWC_S2_REG_WRITE(0x10000000, S2_2438);
BCWC_S2_REG_WRITE(0x4, S2_2424);
BCWC_S2_REG_WRITE(0x1f37291, S2_2430);
FTHD_S2_REG_WRITE(0x40, S2_2434);
FTHD_S2_REG_WRITE(0x10000000, S2_2438);
FTHD_S2_REG_WRITE(0x4, S2_2424);
FTHD_S2_REG_WRITE(0x1f37291, S2_2430);
/* Wait for DDR PLL to lock */
for (i = 0; i <= 10000; i++) {
reg = BCWC_S2_REG_READ(S2_DDR_PLL_STATUS_2444);
reg = FTHD_S2_REG_READ(S2_DDR_PLL_STATUS_2444);
if (reg & S2_DDR_PLL_STATUS_2444_LOCKED)
break;
udelay(10);
@@ -338,10 +338,10 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
return -EIO;
}
BCWC_S2_REG_WRITE(0x1f37205, S2_2430);
FTHD_S2_REG_WRITE(0x1f37205, S2_2430);
for (i = 0; i <= 10000; i++) {
reg = BCWC_S2_REG_READ(S2_DDR_PLL_STATUS_241C);
reg = FTHD_S2_REG_READ(S2_DDR_PLL_STATUS_241C);
if (reg & S2_DDR_PLL_STATUS_241C_LOCKED)
break;
udelay(10);
@@ -356,11 +356,11 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
udelay(10000);
/* WL */
BCWC_S2_REG_WRITE(0x0c10, S2_DDR40_PHY_PLL_DIV);
BCWC_S2_REG_WRITE(0x0010, S2_DDR40_PHY_PLL_CFG);
FTHD_S2_REG_WRITE(0x0c10, S2_DDR40_PHY_PLL_DIV);
FTHD_S2_REG_WRITE(0x0010, S2_DDR40_PHY_PLL_CFG);
for (i = 0; i <= 10000; i++) {
reg = BCWC_S2_REG_READ(S2_DDR40_PHY_PLL_STATUS);
reg = FTHD_S2_REG_READ(S2_DDR40_PHY_PLL_STATUS);
if (reg & S2_DDR40_PHY_PLL_STATUS_LOCKED)
break;
udelay(10);
@@ -387,12 +387,12 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
val = 0;
}
BCWC_S2_REG_WRITE(0x10737545, S2_DDR_20A0);
BCWC_S2_REG_WRITE(0x12643173, S2_DDR_20A4);
BCWC_S2_REG_WRITE(0xff3f, S2_DDR_20A8);
BCWC_S2_REG_WRITE(val, S2_DDR_20B0);
BCWC_S2_REG_WRITE(0x101f, S2_DDR_2118);
BCWC_S2_REG_WRITE(0x1c0, S2_DDR40_PHY_AUX_CTL);
FTHD_S2_REG_WRITE(0x10737545, S2_DDR_20A0);
FTHD_S2_REG_WRITE(0x12643173, S2_DDR_20A4);
FTHD_S2_REG_WRITE(0xff3f, S2_DDR_20A8);
FTHD_S2_REG_WRITE(val, S2_DDR_20B0);
FTHD_S2_REG_WRITE(0x101f, S2_DDR_2118);
FTHD_S2_REG_WRITE(0x1c0, S2_DDR40_PHY_AUX_CTL);
switch (dev_priv->ddr_model) {
case 4:
@@ -403,21 +403,21 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
break;
}
BCWC_S2_REG_WRITE(val, S2_DDR40_STRAP_CTL);
FTHD_S2_REG_WRITE(val, S2_DDR40_STRAP_CTL);
if (dev_priv->ddr_speed == 450)
val = 0x108307;
else
val = 0x108286;
BCWC_S2_REG_WRITE(val, S2_DDR40_STRAP_CTL_2);
FTHD_S2_REG_WRITE(val, S2_DDR40_STRAP_CTL_2);
/* Strap control */
BCWC_S2_REG_WRITE(0x2159559, S2_DDR40_STRAP_CTL);
FTHD_S2_REG_WRITE(0x2159559, S2_DDR40_STRAP_CTL);
/* Polling for STRAP valid */
for (i = 0; i < 10000; i++) {
reg = BCWC_S2_REG_READ(S2_DDR40_STRAP_STATUS);
reg = FTHD_S2_REG_READ(S2_DDR40_STRAP_STATUS);
if (reg & 0x1)
break;
udelay(10);
@@ -448,19 +448,19 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
/* Start programming the DDR PLL */
reg = BCWC_S2_REG_READ(S2_DDR40_PHY_PLL_DIV);
reg = FTHD_S2_REG_READ(S2_DDR40_PHY_PLL_DIV);
reg &= 0xffffc700;
val |= reg;
BCWC_S2_REG_WRITE(val, S2_DDR40_PHY_PLL_DIV);
FTHD_S2_REG_WRITE(val, S2_DDR40_PHY_PLL_DIV);
reg = BCWC_S2_REG_READ(S2_DDR40_PHY_PLL_CFG);
reg = FTHD_S2_REG_READ(S2_DDR40_PHY_PLL_CFG);
reg &= 0xfffffffd;
BCWC_S2_REG_WRITE(reg, S2_DDR40_PHY_PLL_CFG);
FTHD_S2_REG_WRITE(reg, S2_DDR40_PHY_PLL_CFG);
/* Start polling for the lock */
for (i = 0; i < 100; i++) {
reg = BCWC_S2_REG_READ(S2_DDR40_PHY_PLL_STATUS);
reg = FTHD_S2_REG_READ(S2_DDR40_PHY_PLL_STATUS);
if (reg & S2_DDR40_PHY_PLL_STATUS_LOCKED)
break;
udelay(1);
@@ -474,12 +474,12 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
dev_info(&dev_priv->pdev->dev, "DDR40 PLL is locked after %d us\n", i);
/* Configure DDR40 VDL */
BCWC_S2_REG_WRITE(0, S2_DDR40_PHY_VDL_CTL);
BCWC_S2_REG_WRITE(0x103, S2_DDR40_PHY_VDL_CTL);
FTHD_S2_REG_WRITE(0, S2_DDR40_PHY_VDL_CTL);
FTHD_S2_REG_WRITE(0x103, S2_DDR40_PHY_VDL_CTL);
/* Poll for VDL calibration */
for (i = 0; i < 100; i++) {
reg = BCWC_S2_REG_READ(S2_DDR40_PHY_VDL_STATUS);
reg = FTHD_S2_REG_READ(S2_DDR40_PHY_VDL_STATUS);
if (reg & 0x1)
break;
udelay(1);
@@ -500,12 +500,12 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
"First DDR40 VDL calibration failed\n");
}
BCWC_S2_REG_WRITE(0, S2_DDR40_PHY_VDL_CTL);
BCWC_S2_REG_WRITE(0, S2_DDR40_PHY_VDL_CTL); /* Needed? */
BCWC_S2_REG_WRITE(0x200, S2_DDR40_PHY_VDL_CTL); /* calib steps */
FTHD_S2_REG_WRITE(0, S2_DDR40_PHY_VDL_CTL);
FTHD_S2_REG_WRITE(0, S2_DDR40_PHY_VDL_CTL); /* Needed? */
FTHD_S2_REG_WRITE(0x200, S2_DDR40_PHY_VDL_CTL); /* calib steps */
for (i = 0; i < 1000; i++) {
reg = BCWC_S2_REG_READ(S2_DDR40_PHY_VDL_STATUS);
reg = FTHD_S2_REG_READ(S2_DDR40_PHY_VDL_STATUS);
if (reg & 0x1)
break;
udelay(1);
@@ -529,14 +529,14 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
dev_priv->vdl_step_size = step_size;
vdl_fine = BCWC_S2_REG_READ(S2_DDR40_PHY_VDL_CHAN_STATUS);
vdl_fine = FTHD_S2_REG_READ(S2_DDR40_PHY_VDL_CHAN_STATUS);
/* lock = 1 and byte_sel = 1 */
if ((vdl_fine & 2) == 0) {
vdl_fine = (vdl_fine >> 8) & 0x3f;
vdl_fine |= 0x10100;
BCWC_S2_REG_WRITE(vdl_fine, S2_DDR40_PHY_VDL_OVR_FINE);
FTHD_S2_REG_WRITE(vdl_fine, S2_DDR40_PHY_VDL_OVR_FINE);
vdl_coarse = 0x10000;
@@ -550,7 +550,7 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
vdl_coarse = step_size;
}
BCWC_S2_REG_WRITE(vdl_coarse, S2_DDR40_PHY_VDL_OVR_COARSE);
FTHD_S2_REG_WRITE(vdl_coarse, S2_DDR40_PHY_VDL_OVR_COARSE);
dev_info(&dev_priv->pdev->dev,
"VDL set to: coarse=0x%x, fine=0x%x\n",
@@ -560,19 +560,19 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
/* Configure Virtual VTT connections and override */
vtt_cons = 0x1cf7fff;
BCWC_S2_REG_WRITE(vtt_cons, S2_DDR40_PHY_VTT_CONNECTIONS);
FTHD_S2_REG_WRITE(vtt_cons, S2_DDR40_PHY_VTT_CONNECTIONS);
vtt_ovr = 0x77fff;
BCWC_S2_REG_WRITE(vtt_ovr, S2_DDR40_PHY_VTT_OVERRIDE);
FTHD_S2_REG_WRITE(vtt_ovr, S2_DDR40_PHY_VTT_OVERRIDE);
BCWC_S2_REG_WRITE(0x4, S2_DDR40_PHY_VTT_CTL);
FTHD_S2_REG_WRITE(0x4, S2_DDR40_PHY_VTT_CTL);
dev_info(&dev_priv->pdev->dev, "Virtual VTT enabled");
/* Process, Voltage and Temperature compensation */
BCWC_S2_REG_WRITE(0xc0fff, S2_DDR40_PHY_ZQ_PVT_COMP_CTL);
BCWC_S2_REG_WRITE(0x2, S2_DDR40_PHY_DRV_PAD_CTL);
BCWC_S2_REG_WRITE(0x2, S2_DDR40_WL_DRV_PAD_CTL);
FTHD_S2_REG_WRITE(0xc0fff, S2_DDR40_PHY_ZQ_PVT_COMP_CTL);
FTHD_S2_REG_WRITE(0x2, S2_DDR40_PHY_DRV_PAD_CTL);
FTHD_S2_REG_WRITE(0x2, S2_DDR40_WL_DRV_PAD_CTL);
val = 1000000 / dev_priv->ddr_speed;
reg = 4;
@@ -585,31 +585,31 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
}
/* DDR read FIFO delay? */
BCWC_S2_REG_WRITE(reg, S2_DDR40_WL_RD_DATA_DLY);
BCWC_S2_REG_WRITE(0x2, S2_DDR40_WL_READ_CTL); /* le_adj, te_adj */
BCWC_S2_REG_WRITE(0x3, S2_DDR40_WL_WR_PREAMBLE_MODE); /* mode, long */
FTHD_S2_REG_WRITE(reg, S2_DDR40_WL_RD_DATA_DLY);
FTHD_S2_REG_WRITE(0x2, S2_DDR40_WL_READ_CTL); /* le_adj, te_adj */
FTHD_S2_REG_WRITE(0x3, S2_DDR40_WL_WR_PREAMBLE_MODE); /* mode, long */
/* dq_oeb, dq_reb, dq_iddq, dq_rxenb */
reg = BCWC_S2_REG_READ(S2_DDR40_WL_IDLE_PAD_CTL);
BCWC_S2_REG_WRITE(reg & 0xff0fffff, S2_DDR40_WL_IDLE_PAD_CTL);
reg = FTHD_S2_REG_READ(S2_DDR40_WL_IDLE_PAD_CTL);
FTHD_S2_REG_WRITE(reg & 0xff0fffff, S2_DDR40_WL_IDLE_PAD_CTL);
udelay(500);
BCWC_S2_REG_WRITE(0, S2_DDR_2004);
FTHD_S2_REG_WRITE(0, S2_DDR_2004);
udelay(10000);
BCWC_S2_REG_WRITE(0xab0a, S2_DDR_2014);
FTHD_S2_REG_WRITE(0xab0a, S2_DDR_2014);
/* Polling for BUSY */
ret = bcwc_hw_ddr_status_busy(dev_priv, 10000, 10);
ret = fthd_hw_ddr_status_busy(dev_priv, 10000, 10);
if (ret != 0)
return -EBUSY;
udelay(10000);
BCWC_S2_REG_WRITE(0, S2_3204);
FTHD_S2_REG_WRITE(0, S2_3204);
/* Read DRAM mem address (FIXME: Need to mask a few bits here) */
reg = BCWC_S2_REG_READ(S2_DDR40_STRAP_STATUS);
reg = FTHD_S2_REG_READ(S2_DDR40_STRAP_STATUS);
dev_info(&dev_priv->pdev->dev,
"S2 DRAM memory address: 0x%08x\n", reg);
@@ -625,18 +625,18 @@ static int bcwc_hw_s2_init_ddr_controller_soc(struct bcwc_private *dev_priv)
val = dev_priv->ddr_model;
}
BCWC_S2_REG_WRITE(val, S2_3208);
BCWC_S2_REG_WRITE(0x1040, S2_3200);
FTHD_S2_REG_WRITE(val, S2_3208);
FTHD_S2_REG_WRITE(0x1040, S2_3200);
bcwc_hw_ddr_rewrite_mode_regs(dev_priv);
fthd_hw_ddr_rewrite_mode_regs(dev_priv);
BCWC_S2_REG_WRITE(0x20000, S2_DDR_2014);
BCWC_S2_REG_WRITE(1, S2_DDR_2008);
FTHD_S2_REG_WRITE(0x20000, S2_DDR_2014);
FTHD_S2_REG_WRITE(1, S2_DDR_2008);
return 0;
}
static int bcwc_hw_ddr_phy_save_regs(struct bcwc_private *dev_priv)
static int fthd_hw_ddr_phy_save_regs(struct fthd_private *dev_priv)
{
u32 reg, offset;
int i;
@@ -646,38 +646,38 @@ static int bcwc_hw_ddr_phy_save_regs(struct bcwc_private *dev_priv)
for (i = 0; i < dev_priv->ddr_phy_num_regs; i++) {
offset = dev_priv->ddr_phy_reg_map[i].offset;
reg = BCWC_ISP_REG_READ(offset + DDR_PHY_REG_BASE);
reg = FTHD_ISP_REG_READ(offset + DDR_PHY_REG_BASE);
dev_priv->ddr_phy_reg_map[i].value = reg;
}
return 0;
}
static int bcwc_hw_irq_enable(struct bcwc_private *dev_priv)
static int fthd_hw_irq_enable(struct fthd_private *dev_priv)
{
BCWC_ISP_REG_WRITE(0xf8, ISP_REG_41004);
FTHD_ISP_REG_WRITE(0xf8, ISP_REG_41004);
pci_write_config_dword(dev_priv->pdev, 0x94, 0x200);
return 0;
}
static int bcwc_hw_irq_disable(struct bcwc_private *dev_priv)
static int fthd_hw_irq_disable(struct fthd_private *dev_priv)
{
BCWC_ISP_REG_WRITE(0, ISP_REG_41004);
FTHD_ISP_REG_WRITE(0, ISP_REG_41004);
pci_write_config_dword(dev_priv->pdev, 0x94, 0x0);
return 0;
}
int bcwc_hw_init(struct bcwc_private *dev_priv)
int fthd_hw_init(struct fthd_private *dev_priv)
{
int ret, i;
ret = bcwc_hw_s2_init_pcie_link(dev_priv);
ret = fthd_hw_s2_init_pcie_link(dev_priv);
if (ret)
goto out;
bcwc_hw_s2_preinit_ddr_controller_soc(dev_priv);
bcwc_hw_s2_init_ddr_controller_soc(dev_priv);
fthd_hw_s2_preinit_ddr_controller_soc(dev_priv);
fthd_hw_s2_init_ddr_controller_soc(dev_priv);
/* Initialize the reg map */
for (i = 0; i < DDR_PHY_NUM_REGS; i++)
@@ -691,13 +691,13 @@ int bcwc_hw_init(struct bcwc_private *dev_priv)
if (!(i % 3) && i > 0)
printk("\n");
val = BCWC_S2_REG_READ(ddr_phy_reg_map[i]);
val = FTHD_S2_REG_READ(ddr_phy_reg_map[i]);
printk(KERN_CONT "0x%.3x = 0x%.8x\t",
ddr_phy_reg_map[i], val);
}
*/
ret = bcwc_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM_FULL);
ret = fthd_ddr_verify_mem(dev_priv, 0, MEM_VERIFY_NUM_FULL);
if (ret) {
dev_err(&dev_priv->pdev->dev,
"Full memory verification failed! (%d)\n", ret);
@@ -706,33 +706,33 @@ int bcwc_hw_init(struct bcwc_private *dev_priv)
* fully implemented.
*/
/* bcwc_ddr_calibrate(dev_priv); */
/* fthd_ddr_calibrate(dev_priv); */
} else {
dev_info(&dev_priv->pdev->dev,
"Full memory verification succeeded! (%d)\n", ret);
}
/* Save our working configuration */
bcwc_hw_ddr_phy_save_regs(dev_priv);
fthd_hw_ddr_phy_save_regs(dev_priv);
BCWC_S2_REG_WRITE(0x8, S2_D108);
BCWC_S2_REG_WRITE(0xc, S2_D104);
FTHD_S2_REG_WRITE(0x8, S2_D108);
FTHD_S2_REG_WRITE(0xc, S2_D104);
BCWC_ISP_REG_WRITE(0, ISP_REG_40004);
FTHD_ISP_REG_WRITE(0, ISP_REG_40004);
ret = isp_init(dev_priv);
if (ret)
goto out;
dev_info(&dev_priv->pdev->dev, "Enabling interrupts\n");
bcwc_hw_irq_enable(dev_priv);
fthd_hw_irq_enable(dev_priv);
out:
return ret;
}
void bcwc_hw_deinit(struct bcwc_private *dev_priv)
void fthd_hw_deinit(struct fthd_private *dev_priv)
{
dev_info(&dev_priv->pdev->dev, "%s", __FUNCTION__);
BCWC_ISP_REG_WRITE(0, ISP_REG_41020);
bcwc_hw_irq_disable(dev_priv);
FTHD_ISP_REG_WRITE(0, ISP_REG_41020);
fthd_hw_irq_disable(dev_priv);
}

38
bcwc_hw.h → fthd_hw.h
View File

@@ -17,27 +17,27 @@
*
*/
#ifndef _BCWC_HW_H
#define _BCWC_HW_H
#ifndef _FTHD_HW_H
#define _FTHD_HW_H
#include <linux/pci.h>
/* Used after most PCI Link IO writes */
static inline void bcwc_hw_pci_post(struct bcwc_private *dev_priv)
static inline void fthd_hw_pci_post(struct fthd_private *dev_priv)
{
pci_write_config_dword(dev_priv->pdev, 0, 0x12345678);
}
#define BCWC_S2_REG_READ(offset) _BCWC_S2_REG_READ(dev_priv, (offset))
#define BCWC_S2_REG_WRITE(val, offset) _BCWC_S2_REG_WRITE(dev_priv, (val), (offset))
#define FTHD_S2_REG_READ(offset) _FTHD_S2_REG_READ(dev_priv, (offset))
#define FTHD_S2_REG_WRITE(val, offset) _FTHD_S2_REG_WRITE(dev_priv, (val), (offset))
#define BCWC_S2_MEM_READ(offset) _BCWC_S2_MEM_READ(dev_priv, (offset))
#define BCWC_S2_MEM_WRITE(val, offset) _BCWC_S2_MEM_WRITE(dev_priv, (val), (offset))
#define FTHD_S2_MEM_READ(offset) _FTHD_S2_MEM_READ(dev_priv, (offset))
#define FTHD_S2_MEM_WRITE(val, offset) _FTHD_S2_MEM_WRITE(dev_priv, (val), (offset))
#define BCWC_ISP_REG_READ(offset) _BCWC_ISP_REG_READ(dev_priv, (offset))
#define BCWC_ISP_REG_WRITE(val, offset) _BCWC_ISP_REG_WRITE(dev_priv, (val), (offset))
#define FTHD_ISP_REG_READ(offset) _FTHD_ISP_REG_READ(dev_priv, (offset))
#define FTHD_ISP_REG_WRITE(val, offset) _FTHD_ISP_REG_WRITE(dev_priv, (val), (offset))
static inline u32 _BCWC_S2_REG_READ(struct bcwc_private *dev_priv, u32 offset)
static inline u32 _FTHD_S2_REG_READ(struct fthd_private *dev_priv, u32 offset)
{
if (offset >= dev_priv->s2_io_len) {
dev_err(&dev_priv->pdev->dev,
@@ -49,7 +49,7 @@ static inline u32 _BCWC_S2_REG_READ(struct bcwc_private *dev_priv, u32 offset)
return ioread32(dev_priv->s2_io + offset);
}
static inline void _BCWC_S2_REG_WRITE(struct bcwc_private *dev_priv, u32 val,
static inline void _FTHD_S2_REG_WRITE(struct fthd_private *dev_priv, u32 val,
u32 offset)
{
if (offset >= dev_priv->s2_io_len) {
@@ -60,10 +60,10 @@ static inline void _BCWC_S2_REG_WRITE(struct bcwc_private *dev_priv, u32 val,
// dev_info(&dev_priv->pdev->dev, "S2 IO write at %u\n", offset);
iowrite32(val, dev_priv->s2_io + offset);
bcwc_hw_pci_post(dev_priv);
fthd_hw_pci_post(dev_priv);
}
static inline u32 _BCWC_S2_MEM_READ(struct bcwc_private *dev_priv, u32 offset)
static inline u32 _FTHD_S2_MEM_READ(struct fthd_private *dev_priv, u32 offset)
{
if (offset >= dev_priv->s2_mem_len) {
dev_err(&dev_priv->pdev->dev,
@@ -75,7 +75,7 @@ static inline u32 _BCWC_S2_MEM_READ(struct bcwc_private *dev_priv, u32 offset)
return ioread32(dev_priv->s2_mem + offset);
}
static inline void _BCWC_S2_MEM_WRITE(struct bcwc_private *dev_priv, u32 val,
static inline void _FTHD_S2_MEM_WRITE(struct fthd_private *dev_priv, u32 val,
u32 offset)
{
if (offset >= dev_priv->s2_mem_len) {
@@ -88,7 +88,7 @@ static inline void _BCWC_S2_MEM_WRITE(struct bcwc_private *dev_priv, u32 val,
iowrite32(val, dev_priv->s2_mem + offset);
}
static inline u32 _BCWC_ISP_REG_READ(struct bcwc_private *dev_priv, u32 offset)
static inline u32 _FTHD_ISP_REG_READ(struct fthd_private *dev_priv, u32 offset)
{
if (offset >= dev_priv->isp_io_len) {
dev_err(&dev_priv->pdev->dev,
@@ -100,7 +100,7 @@ static inline u32 _BCWC_ISP_REG_READ(struct bcwc_private *dev_priv, u32 offset)
return ioread32(dev_priv->isp_io + offset);
}
static inline void _BCWC_ISP_REG_WRITE(struct bcwc_private *dev_priv, u32 val,
static inline void _FTHD_ISP_REG_WRITE(struct fthd_private *dev_priv, u32 val,
u32 offset)
{
if (offset >= dev_priv->isp_io_len) {
@@ -111,9 +111,9 @@ static inline void _BCWC_ISP_REG_WRITE(struct bcwc_private *dev_priv, u32 val,
// dev_info(&dev_priv->pdev->dev, "Dev IO write at %u\n", offset);
iowrite32(val, dev_priv->isp_io + offset);
bcwc_hw_pci_post(dev_priv);
fthd_hw_pci_post(dev_priv);
}
extern int bcwc_hw_init(struct bcwc_private *dev_priv);
extern void bcwc_hw_deinit(struct bcwc_private *priv);
extern int fthd_hw_init(struct fthd_private *dev_priv);
extern void fthd_hw_deinit(struct fthd_private *priv);
#endif

402
bcwc_isp.c → fthd_isp.c
View File

@@ -21,15 +21,15 @@
#include <linux/acpi.h>
#include <linux/firmware.h>
#include <linux/dmi.h>
#include "bcwc_drv.h"
#include "bcwc_hw.h"
#include "bcwc_reg.h"
#include "bcwc_ringbuf.h"
#include "bcwc_isp.h"
#include "fthd_drv.h"
#include "fthd_hw.h"
#include "fthd_reg.h"
#include "fthd_ringbuf.h"
#include "fthd_isp.h"
int isp_mem_init(struct bcwc_private *dev_priv)
int isp_mem_init(struct fthd_private *dev_priv)
{
struct resource *root = &dev_priv->pdev->resource[BCWC_PCI_S2_MEM];
struct resource *root = &dev_priv->pdev->resource[FTHD_PCI_S2_MEM];
dev_priv->mem = kzalloc(sizeof(struct resource), GFP_KERNEL);
if (!dev_priv->mem)
@@ -50,7 +50,7 @@ int isp_mem_init(struct bcwc_private *dev_priv)
return 0;
}
struct isp_mem_obj *isp_mem_create(struct bcwc_private *dev_priv,
struct isp_mem_obj *isp_mem_create(struct fthd_private *dev_priv,
unsigned int type, resource_size_t size)
{
struct isp_mem_obj *obj;
@@ -90,7 +90,7 @@ int isp_mem_destroy(struct isp_mem_obj *obj)
return 0;
}
int isp_acpi_set_power(struct bcwc_private *dev_priv, int power)
int isp_acpi_set_power(struct fthd_private *dev_priv, int power)
{
acpi_status status;
acpi_handle handle;
@@ -136,12 +136,12 @@ out:
return ret;
}
static int isp_enable_sensor(struct bcwc_private *dev_priv)
static int isp_enable_sensor(struct fthd_private *dev_priv)
{
return 0;
}
static int isp_load_firmware(struct bcwc_private *dev_priv)
static int isp_load_firmware(struct fthd_private *dev_priv)
{
const struct firmware *fw;
int ret = 0;
@@ -176,7 +176,7 @@ static int isp_load_firmware(struct bcwc_private *dev_priv)
return ret;
}
static void isp_free_channel_info(struct bcwc_private *priv)
static void isp_free_channel_info(struct fthd_private *priv)
{
struct fw_channel *chan;
int i;
@@ -193,7 +193,7 @@ static void isp_free_channel_info(struct bcwc_private *priv)
priv->channels = NULL;
}
static struct fw_channel *isp_get_chan_index(struct bcwc_private *priv, const char *name)
static struct fw_channel *isp_get_chan_index(struct fthd_private *priv, const char *name)
{
int i;
for(i = 0; i < priv->num_channels; i++) {
@@ -203,7 +203,7 @@ static struct fw_channel *isp_get_chan_index(struct bcwc_private *priv, const ch
return NULL;
}
static int isp_fill_channel_info(struct bcwc_private *priv, int offset, int num_channels)
static int isp_fill_channel_info(struct fthd_private *priv, int offset, int num_channels)
{
struct isp_channel_info *info;
struct fw_channel *chan;
@@ -265,12 +265,12 @@ out:
return -ENOMEM;
}
int bcwc_isp_cmd(struct bcwc_private *dev_priv, enum bcwc_isp_cmds command, void *buf,
int fthd_isp_cmd(struct fthd_private *dev_priv, enum fthd_isp_cmds command, void *buf,
int request_len, int *response_len)
{
struct isp_mem_obj *request;
struct isp_cmd_hdr *cmd;
struct bcwc_ringbuf_entry *entry;
struct fthd_ringbuf_entry *entry;
int len, ret;
if (response_len) {
@@ -295,7 +295,7 @@ int bcwc_isp_cmd(struct bcwc_private *dev_priv, enum bcwc_isp_cmds command, void
if (request_len)
memcpy((char *)cmd + sizeof(struct isp_cmd_hdr), buf, request_len);
entry = bcwc_channel_ringbuf_send(dev_priv, dev_priv->channel_io,
entry = fthd_channel_ringbuf_send(dev_priv, dev_priv->channel_io,
request->offset, request_len + 8, (response_len ? *response_len : 0) + 8);
if (!entry) {
@@ -310,7 +310,7 @@ int bcwc_isp_cmd(struct bcwc_private *dev_priv, enum bcwc_isp_cmds command, void
if (wait_event_interruptible_timeout(dev_priv->cmd_wq, dev_priv->cmd_ready, HZ) <= 0) {
dev_err(&dev_priv->pdev->dev, "timeout wait for command %d\n", cmd->opcode);
bcwc_channel_ringbuf_dump(dev_priv, dev_priv->channel_io);
fthd_channel_ringbuf_dump(dev_priv, dev_priv->channel_io);
if (response_len)
*response_len = 0;
ret = -ETIMEDOUT;
@@ -333,55 +333,55 @@ out:
int bcwc_isp_cmd_start(struct bcwc_private *dev_priv)
int fthd_isp_cmd_start(struct fthd_private *dev_priv)
{
pr_debug("sending start cmd to firmware\n");
return bcwc_isp_cmd(dev_priv, CISP_CMD_START, NULL, 0, NULL);
return fthd_isp_cmd(dev_priv, CISP_CMD_START, NULL, 0, NULL);
}
int bcwc_isp_cmd_channel_start(struct bcwc_private *dev_priv)
int fthd_isp_cmd_channel_start(struct fthd_private *dev_priv)
{
struct isp_cmd_channel_start cmd;
pr_debug("sending channel start cmd to firmware\n");
cmd.channel = 0;
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_START, &cmd, sizeof(cmd), NULL);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_START, &cmd, sizeof(cmd), NULL);
}
int bcwc_isp_cmd_channel_stop(struct bcwc_private *dev_priv)
int fthd_isp_cmd_channel_stop(struct fthd_private *dev_priv)
{
struct isp_cmd_channel_stop cmd;
cmd.channel = 0;
pr_debug("sending channel stop cmd to firmware\n");
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_STOP, &cmd, sizeof(cmd), NULL);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_STOP, &cmd, sizeof(cmd), NULL);
}
int bcwc_isp_cmd_stop(struct bcwc_private *dev_priv)
int fthd_isp_cmd_stop(struct fthd_private *dev_priv)
{
return bcwc_isp_cmd(dev_priv, CISP_CMD_STOP, NULL, 0, NULL);
return fthd_isp_cmd(dev_priv, CISP_CMD_STOP, NULL, 0, NULL);
}
int bcwc_isp_cmd_powerdown(struct bcwc_private *dev_priv)
int fthd_isp_cmd_powerdown(struct fthd_private *dev_priv)
{
return bcwc_isp_cmd(dev_priv, CISP_CMD_POWER_DOWN, NULL, 0, NULL);
return fthd_isp_cmd(dev_priv, CISP_CMD_POWER_DOWN, NULL, 0, NULL);
}
static void isp_free_set_file(struct bcwc_private *dev_priv)
static void isp_free_set_file(struct fthd_private *dev_priv)
{
isp_mem_destroy(dev_priv->set_file);
}
int isp_powerdown(struct bcwc_private *dev_priv)
int isp_powerdown(struct fthd_private *dev_priv)
{
int retries;
u32 reg;
BCWC_ISP_REG_WRITE(0xf7fbdff9, 0xc3000);
bcwc_isp_cmd_powerdown(dev_priv);
FTHD_ISP_REG_WRITE(0xf7fbdff9, 0xc3000);
fthd_isp_cmd_powerdown(dev_priv);
for (retries = 0; retries < 100; retries++) {
reg = BCWC_ISP_REG_READ(0xc3000);
reg = FTHD_ISP_REG_READ(0xc3000);
if (reg == 0x8042006)
break;
mdelay(10);
@@ -394,32 +394,32 @@ int isp_powerdown(struct bcwc_private *dev_priv)
return 0;
}
int isp_uninit(struct bcwc_private *dev_priv)
int isp_uninit(struct fthd_private *dev_priv)
{
BCWC_ISP_REG_WRITE(0x00000000, 0x40004);
BCWC_ISP_REG_WRITE(0x00000000, 0x41004);
BCWC_ISP_REG_WRITE(0xffffffff, 0xc0008);
BCWC_ISP_REG_WRITE(0xffffffff, 0xc000c);
BCWC_ISP_REG_WRITE(0xffffffff, 0xc0010);
BCWC_ISP_REG_WRITE(0x00000000, 0xc1004);
BCWC_ISP_REG_WRITE(0xffffffff, 0xc100c);
BCWC_ISP_REG_WRITE(0xffffffff, 0xc1014);
BCWC_ISP_REG_WRITE(0xffffffff, 0xc101c);
BCWC_ISP_REG_WRITE(0xffffffff, 0xc1024);
FTHD_ISP_REG_WRITE(0x00000000, 0x40004);
FTHD_ISP_REG_WRITE(0x00000000, 0x41004);
FTHD_ISP_REG_WRITE(0xffffffff, 0xc0008);
FTHD_ISP_REG_WRITE(0xffffffff, 0xc000c);
FTHD_ISP_REG_WRITE(0xffffffff, 0xc0010);
FTHD_ISP_REG_WRITE(0x00000000, 0xc1004);
FTHD_ISP_REG_WRITE(0xffffffff, 0xc100c);
FTHD_ISP_REG_WRITE(0xffffffff, 0xc1014);
FTHD_ISP_REG_WRITE(0xffffffff, 0xc101c);
FTHD_ISP_REG_WRITE(0xffffffff, 0xc1024);
mdelay(1);
BCWC_ISP_REG_WRITE(0, 0xc0000);
BCWC_ISP_REG_WRITE(0, 0xc0004);
BCWC_ISP_REG_WRITE(0, 0xc0008);
BCWC_ISP_REG_WRITE(0, 0xc000c);
BCWC_ISP_REG_WRITE(0, 0xc0010);
BCWC_ISP_REG_WRITE(0, 0xc0014);
BCWC_ISP_REG_WRITE(0, 0xc0018);
BCWC_ISP_REG_WRITE(0, 0xc001c);
BCWC_ISP_REG_WRITE(0, 0xc0020);
BCWC_ISP_REG_WRITE(0, 0xc0024);
FTHD_ISP_REG_WRITE(0, 0xc0000);
FTHD_ISP_REG_WRITE(0, 0xc0004);
FTHD_ISP_REG_WRITE(0, 0xc0008);
FTHD_ISP_REG_WRITE(0, 0xc000c);
FTHD_ISP_REG_WRITE(0, 0xc0010);
FTHD_ISP_REG_WRITE(0, 0xc0014);
FTHD_ISP_REG_WRITE(0, 0xc0018);
FTHD_ISP_REG_WRITE(0, 0xc001c);
FTHD_ISP_REG_WRITE(0, 0xc0020);
FTHD_ISP_REG_WRITE(0, 0xc0024);
BCWC_ISP_REG_WRITE(0xffffffff, 0x41024);
FTHD_ISP_REG_WRITE(0xffffffff, 0x41024);
isp_free_channel_info(dev_priv);
isp_free_set_file(dev_priv);
isp_mem_destroy(dev_priv->firmware);
@@ -428,16 +428,16 @@ int isp_uninit(struct bcwc_private *dev_priv)
}
int bcwc_isp_cmd_print_enable(struct bcwc_private *dev_priv, int enable)
int fthd_isp_cmd_print_enable(struct fthd_private *dev_priv, int enable)
{
struct isp_cmd_print_enable cmd;
cmd.enable = enable;
return bcwc_isp_cmd(dev_priv, CISP_CMD_PRINT_ENABLE, &cmd, sizeof(cmd), NULL);
return fthd_isp_cmd(dev_priv, CISP_CMD_PRINT_ENABLE, &cmd, sizeof(cmd), NULL);
}
int bcwc_isp_cmd_set_loadfile(struct bcwc_private *dev_priv)
int fthd_isp_cmd_set_loadfile(struct fthd_private *dev_priv)
{
struct isp_cmd_set_loadfile cmd;
struct isp_mem_obj *file;
@@ -517,10 +517,10 @@ int bcwc_isp_cmd_set_loadfile(struct bcwc_private *dev_priv)
pr_debug("set file: addr %08lx, size %d\n", file->offset, (int)file->size);
cmd.addr = file->offset;
cmd.length = file->size;
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_SET_FILE_LOAD, &cmd, sizeof(cmd), NULL);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_SET_FILE_LOAD, &cmd, sizeof(cmd), NULL);
}
int bcwc_isp_cmd_channel_info(struct bcwc_private *dev_priv)
int fthd_isp_cmd_channel_info(struct fthd_private *dev_priv)
{
struct isp_cmd_channel_info cmd;
int ret, len;
@@ -529,7 +529,7 @@ int bcwc_isp_cmd_channel_info(struct bcwc_private *dev_priv)
memset(&cmd, 0, sizeof(cmd));
len = sizeof(cmd);
ret = bcwc_isp_cmd(dev_priv, CISP_CMD_CH_INFO_GET, &cmd, sizeof(cmd), &len);
ret = fthd_isp_cmd(dev_priv, CISP_CMD_CH_INFO_GET, &cmd, sizeof(cmd), &len);
print_hex_dump_bytes("CHINFO ", DUMP_PREFIX_OFFSET, &cmd, sizeof(cmd));
pr_debug("sensor id: %04x %04x\n", cmd.sensorid0, cmd.sensorid1);
pr_debug("sensor count: %d\n", cmd.sensor_count);
@@ -545,7 +545,7 @@ int bcwc_isp_cmd_channel_info(struct bcwc_private *dev_priv)
return ret;
}
int bcwc_isp_cmd_camera_config(struct bcwc_private *dev_priv)
int fthd_isp_cmd_camera_config(struct fthd_private *dev_priv)
{
struct isp_cmd_config cmd;
int ret, len;
@@ -555,13 +555,13 @@ int bcwc_isp_cmd_camera_config(struct bcwc_private *dev_priv)
memset(&cmd, 0, sizeof(cmd));
len = sizeof(cmd);
ret = bcwc_isp_cmd(dev_priv, CISP_CMD_CONFIG_GET, &cmd, sizeof(cmd), &len);
ret = fthd_isp_cmd(dev_priv, CISP_CMD_CONFIG_GET, &cmd, sizeof(cmd), &len);
if (!ret)
print_hex_dump_bytes("CAMINFO ", DUMP_PREFIX_OFFSET, &cmd, sizeof(cmd));
return ret;
}
int bcwc_isp_cmd_channel_camera_config(struct bcwc_private *dev_priv)
int fthd_isp_cmd_channel_camera_config(struct fthd_private *dev_priv)
{
struct isp_cmd_channel_camera_config cmd;
int ret, len, i;
@@ -573,7 +573,7 @@ int bcwc_isp_cmd_channel_camera_config(struct bcwc_private *dev_priv)
cmd.channel = i;
len = sizeof(cmd);
ret = bcwc_isp_cmd(dev_priv, CISP_CMD_CH_CAMERA_CONFIG_GET, &cmd, sizeof(cmd), &len);
ret = fthd_isp_cmd(dev_priv, CISP_CMD_CH_CAMERA_CONFIG_GET, &cmd, sizeof(cmd), &len);
if (ret)
break;
snprintf(prefix, sizeof(prefix)-1, "CAMCONF%d ", i);
@@ -582,7 +582,7 @@ int bcwc_isp_cmd_channel_camera_config(struct bcwc_private *dev_priv)
return ret;
}
int bcwc_isp_cmd_channel_camera_config_select(struct bcwc_private *dev_priv, int channel, int config)
int fthd_isp_cmd_channel_camera_config_select(struct fthd_private *dev_priv, int channel, int config)
{
struct isp_cmd_channel_camera_config_select cmd;
int len;
@@ -593,10 +593,10 @@ int bcwc_isp_cmd_channel_camera_config_select(struct bcwc_private *dev_priv, int
cmd.channel = channel;
cmd.config = config;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_CAMERA_CONFIG_SELECT, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_CAMERA_CONFIG_SELECT, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_crop_set(struct bcwc_private *dev_priv, int channel,
int fthd_isp_cmd_channel_crop_set(struct fthd_private *dev_priv, int channel,
int x1, int y1, int x2, int y2)
{
struct isp_cmd_channel_set_crop cmd;
@@ -611,10 +611,10 @@ int bcwc_isp_cmd_channel_crop_set(struct bcwc_private *dev_priv, int channel,
cmd.x2 = x2;
cmd.y2 = y2;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_CROP_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_CROP_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_output_config_set(struct bcwc_private *dev_priv, int channel, int x, int y, int pixelformat)
int fthd_isp_cmd_channel_output_config_set(struct fthd_private *dev_priv, int channel, int x, int y, int pixelformat)
{
struct isp_cmd_channel_output_config cmd;
int len;
@@ -637,10 +637,10 @@ int bcwc_isp_cmd_channel_output_config_set(struct bcwc_private *dev_priv, int ch
cmd.unknown3 = 0;
cmd.unknown5 = 0x7ff;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_OUTPUT_CONFIG_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_OUTPUT_CONFIG_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_recycle_mode(struct bcwc_private *dev_priv, int channel, int mode)
int fthd_isp_cmd_channel_recycle_mode(struct fthd_private *dev_priv, int channel, int mode)
{
struct isp_cmd_channel_recycle_mode cmd;
int len;
@@ -651,10 +651,10 @@ int bcwc_isp_cmd_channel_recycle_mode(struct bcwc_private *dev_priv, int channel
cmd.channel = channel;
cmd.mode = mode;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_BUFFER_RECYCLE_MODE_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_BUFFER_RECYCLE_MODE_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_buffer_return(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_buffer_return(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_buffer_return cmd;
int len;
@@ -664,10 +664,10 @@ int bcwc_isp_cmd_channel_buffer_return(struct bcwc_private *dev_priv, int channe
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_BUFFER_RETURN, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_BUFFER_RETURN, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_recycle_start(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_recycle_start(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_recycle_mode cmd;
int len;
@@ -677,10 +677,10 @@ int bcwc_isp_cmd_channel_recycle_start(struct bcwc_private *dev_priv, int channe
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_BUFFER_RECYCLE_START, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_BUFFER_RECYCLE_START, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_drc_start(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_drc_start(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_drc_start cmd;
int len;
@@ -690,10 +690,10 @@ int bcwc_isp_cmd_channel_drc_start(struct bcwc_private *dev_priv, int channel)
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_DRC_START, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_DRC_START, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_tone_curve_adaptation_start(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_tone_curve_adaptation_start(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_tone_curve_adaptation_start cmd;
int len;
@@ -703,10 +703,10 @@ int bcwc_isp_cmd_channel_tone_curve_adaptation_start(struct bcwc_private *dev_pr
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TONE_CURVE_ADAPTATION_START, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TONE_CURVE_ADAPTATION_START, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_sif_pixel_format(struct bcwc_private *dev_priv, int channel, int param1, int param2)
int fthd_isp_cmd_channel_sif_pixel_format(struct fthd_private *dev_priv, int channel, int param1, int param2)
{
struct isp_cmd_channel_sif_format_set cmd;
int len;
@@ -718,10 +718,10 @@ int bcwc_isp_cmd_channel_sif_pixel_format(struct bcwc_private *dev_priv, int cha
cmd.param1 = param1;
cmd.param2 = param2;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_SIF_PIXEL_FORMAT_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_SIF_PIXEL_FORMAT_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_error_handling_config(struct bcwc_private *dev_priv, int channel, int param1, int param2)
int fthd_isp_cmd_channel_error_handling_config(struct fthd_private *dev_priv, int channel, int param1, int param2)
{
struct isp_cmd_channel_camera_err_handle_config cmd;
int len;
@@ -733,10 +733,10 @@ int bcwc_isp_cmd_channel_error_handling_config(struct bcwc_private *dev_priv, in
cmd.param1 = param1;
cmd.param2 = param2;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_CAMERA_ERR_HANDLE_CONFIG, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_CAMERA_ERR_HANDLE_CONFIG, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_streaming_mode(struct bcwc_private *dev_priv, int channel, int mode)
int fthd_isp_cmd_channel_streaming_mode(struct fthd_private *dev_priv, int channel, int mode)
{
struct isp_cmd_channel_streaming_mode cmd;
int len;
@@ -747,10 +747,10 @@ int bcwc_isp_cmd_channel_streaming_mode(struct bcwc_private *dev_priv, int chann
cmd.channel = channel;
cmd.mode = mode;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_STREAMING_MODE_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_STREAMING_MODE_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_frame_rate_min(struct bcwc_private *dev_priv, int channel, int rate)
int fthd_isp_cmd_channel_frame_rate_min(struct fthd_private *dev_priv, int channel, int rate)
{
struct isp_cmd_channel_frame_rate_set cmd;
int len;
@@ -761,10 +761,10 @@ int bcwc_isp_cmd_channel_frame_rate_min(struct bcwc_private *dev_priv, int chann
cmd.channel = channel;
cmd.rate = rate;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_AE_FRAME_RATE_MIN_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_AE_FRAME_RATE_MIN_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_frame_rate_max(struct bcwc_private *dev_priv, int channel, int rate)
int fthd_isp_cmd_channel_frame_rate_max(struct fthd_private *dev_priv, int channel, int rate)
{
struct isp_cmd_channel_frame_rate_set cmd;
int len;
@@ -775,10 +775,10 @@ int bcwc_isp_cmd_channel_frame_rate_max(struct bcwc_private *dev_priv, int chann
cmd.channel = channel;
cmd.rate = rate;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_AE_FRAME_RATE_MAX_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_AE_FRAME_RATE_MAX_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_ae_speed_set(struct bcwc_private *dev_priv, int channel, int speed)
int fthd_isp_cmd_channel_ae_speed_set(struct fthd_private *dev_priv, int channel, int speed)
{
struct isp_cmd_channel_ae_speed_set cmd;
int len;
@@ -789,10 +789,10 @@ int bcwc_isp_cmd_channel_ae_speed_set(struct bcwc_private *dev_priv, int channel
cmd.channel = channel;
cmd.speed = speed;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_AE_SPEED_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_AE_SPEED_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_ae_stability_set(struct bcwc_private *dev_priv, int channel, int stability)
int fthd_isp_cmd_channel_ae_stability_set(struct fthd_private *dev_priv, int channel, int stability)
{
struct isp_cmd_channel_ae_stability_set cmd;
int len;
@@ -803,10 +803,10 @@ int bcwc_isp_cmd_channel_ae_stability_set(struct bcwc_private *dev_priv, int cha
cmd.channel = channel;
cmd.stability = stability;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_AE_STABILITY_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_AE_STABILITY_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_ae_stability_to_stable_set(struct bcwc_private *dev_priv, int channel, int value)
int fthd_isp_cmd_channel_ae_stability_to_stable_set(struct fthd_private *dev_priv, int channel, int value)
{
struct isp_cmd_channel_ae_stability_to_stable_set cmd;
int len;
@@ -817,10 +817,10 @@ int bcwc_isp_cmd_channel_ae_stability_to_stable_set(struct bcwc_private *dev_pri
cmd.channel = channel;
cmd.value = value;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_AE_STABILITY_TO_STABLE_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_AE_STABILITY_TO_STABLE_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_face_detection_start(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_face_detection_start(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_face_detection_start cmd;
int len;
@@ -830,10 +830,10 @@ int bcwc_isp_cmd_channel_face_detection_start(struct bcwc_private *dev_priv, int
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_FACE_DETECTION_START, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_FACE_DETECTION_START, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_face_detection_stop(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_face_detection_stop(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_face_detection_stop cmd;
int len;
@@ -843,10 +843,10 @@ int bcwc_isp_cmd_channel_face_detection_stop(struct bcwc_private *dev_priv, int
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_FACE_DETECTION_STOP, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_FACE_DETECTION_STOP, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_face_detection_enable(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_face_detection_enable(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_face_detection_enable cmd;
int len;
@@ -856,10 +856,10 @@ int bcwc_isp_cmd_channel_face_detection_enable(struct bcwc_private *dev_priv, in
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_FACE_DETECTION_ENABLE, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_FACE_DETECTION_ENABLE, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_face_detection_disable(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_face_detection_disable(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_face_detection_disable cmd;
int len;
@@ -869,10 +869,10 @@ int bcwc_isp_cmd_channel_face_detection_disable(struct bcwc_private *dev_priv, i
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_FACE_DETECTION_DISABLE, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_FACE_DETECTION_DISABLE, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_temporal_filter_start(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_temporal_filter_start(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_temporal_filter_start cmd;
int len;
@@ -882,10 +882,10 @@ int bcwc_isp_cmd_channel_temporal_filter_start(struct bcwc_private *dev_priv, in
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TEMPORAL_FILTER_START, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TEMPORAL_FILTER_START, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_temporal_filter_stop(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_temporal_filter_stop(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_temporal_filter_stop cmd;
int len;
@@ -895,10 +895,10 @@ int bcwc_isp_cmd_channel_temporal_filter_stop(struct bcwc_private *dev_priv, int
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TEMPORAL_FILTER_STOP, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TEMPORAL_FILTER_STOP, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_temporal_filter_enable(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_temporal_filter_enable(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_temporal_filter_enable cmd;
int len;
@@ -908,10 +908,10 @@ int bcwc_isp_cmd_channel_temporal_filter_enable(struct bcwc_private *dev_priv, i
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TEMPORAL_FILTER_ENABLE, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TEMPORAL_FILTER_ENABLE, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_temporal_filter_disable(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_temporal_filter_disable(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_temporal_filter_disable cmd;
int len;
@@ -921,10 +921,10 @@ int bcwc_isp_cmd_channel_temporal_filter_disable(struct bcwc_private *dev_priv,
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TEMPORAL_FILTER_DISABLE, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_TEMPORAL_FILTER_DISABLE, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_motion_history_start(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_motion_history_start(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_motion_history_start cmd;
int len;
@@ -934,10 +934,10 @@ int bcwc_isp_cmd_channel_motion_history_start(struct bcwc_private *dev_priv, int
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_MOTION_HISTORY_START, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_MOTION_HISTORY_START, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_motion_history_stop(struct bcwc_private *dev_priv, int channel)
int fthd_isp_cmd_channel_motion_history_stop(struct fthd_private *dev_priv, int channel)
{
struct isp_cmd_channel_motion_history_stop cmd;
int len;
@@ -947,10 +947,10 @@ int bcwc_isp_cmd_channel_motion_history_stop(struct bcwc_private *dev_priv, int
memset(&cmd, 0, sizeof(cmd));
cmd.channel = channel;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_MOTION_HISTORY_STOP, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_MOTION_HISTORY_STOP, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_ae_metering_mode_set(struct bcwc_private *dev_priv, int channel, int mode)
int fthd_isp_cmd_channel_ae_metering_mode_set(struct fthd_private *dev_priv, int channel, int mode)
{
struct isp_cmd_channel_ae_metering_mode_set cmd;
int len;
@@ -961,10 +961,10 @@ int bcwc_isp_cmd_channel_ae_metering_mode_set(struct bcwc_private *dev_priv, int
cmd.channel = channel;
cmd.mode = mode;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_AE_METERING_MODE_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_APPLE_CH_AE_METERING_MODE_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_brightness_set(struct bcwc_private *dev_priv, int channel, int brightness)
int fthd_isp_cmd_channel_brightness_set(struct fthd_private *dev_priv, int channel, int brightness)
{
struct isp_cmd_channel_brightness_set cmd;
int len;
@@ -975,10 +975,10 @@ int bcwc_isp_cmd_channel_brightness_set(struct bcwc_private *dev_priv, int chann
cmd.channel = channel;
cmd.brightness = brightness;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_SCALER_BRIGHTNESS_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_SCALER_BRIGHTNESS_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_isp_cmd_channel_contrast_set(struct bcwc_private *dev_priv, int channel, int contrast)
int fthd_isp_cmd_channel_contrast_set(struct fthd_private *dev_priv, int channel, int contrast)
{
struct isp_cmd_channel_contrast_set cmd;
int len;
@@ -989,17 +989,17 @@ int bcwc_isp_cmd_channel_contrast_set(struct bcwc_private *dev_priv, int channel
cmd.channel = channel;
cmd.contrast = contrast;
len = sizeof(cmd);
return bcwc_isp_cmd(dev_priv, CISP_CMD_CH_SCALER_CONTRAST_SET, &cmd, sizeof(cmd), &len);
return fthd_isp_cmd(dev_priv, CISP_CMD_CH_SCALER_CONTRAST_SET, &cmd, sizeof(cmd), &len);
}
int bcwc_start_channel(struct bcwc_private *dev_priv, int channel)
int fthd_start_channel(struct fthd_private *dev_priv, int channel)
{
int ret, x1 = 0, x2 = 0, pixelformat;
ret = bcwc_isp_cmd_channel_camera_config(dev_priv);
ret = fthd_isp_cmd_channel_camera_config(dev_priv);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_camera_config_select(dev_priv, 0, 0);
ret = fthd_isp_cmd_channel_camera_config_select(dev_priv, 0, 0);
if (ret)
return ret;
@@ -1012,7 +1012,7 @@ int bcwc_start_channel(struct bcwc_private *dev_priv, int channel)
x2 = 1280;
}
ret = bcwc_isp_cmd_channel_crop_set(dev_priv, 0, x1, 0, x2, 720);
ret = fthd_isp_cmd_channel_crop_set(dev_priv, 0, x1, 0, x2, 720);
if (ret)
return ret;
@@ -1030,112 +1030,112 @@ int bcwc_start_channel(struct bcwc_private *dev_priv, int channel)
pixelformat = 1;
WARN_ON(1);
}
ret = bcwc_isp_cmd_channel_output_config_set(dev_priv, 0,
ret = fthd_isp_cmd_channel_output_config_set(dev_priv, 0,
dev_priv->fmt.fmt.width,
dev_priv->fmt.fmt.height,
pixelformat);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_recycle_mode(dev_priv, 0, 1);
ret = fthd_isp_cmd_channel_recycle_mode(dev_priv, 0, 1);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_recycle_start(dev_priv, 0);
ret = fthd_isp_cmd_channel_recycle_start(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_ae_metering_mode_set(dev_priv, 0, 3);
ret = fthd_isp_cmd_channel_ae_metering_mode_set(dev_priv, 0, 3);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_drc_start(dev_priv, 0);
ret = fthd_isp_cmd_channel_drc_start(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_tone_curve_adaptation_start(dev_priv, 0);
ret = fthd_isp_cmd_channel_tone_curve_adaptation_start(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_ae_speed_set(dev_priv, 0, 60);
ret = fthd_isp_cmd_channel_ae_speed_set(dev_priv, 0, 60);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_ae_stability_set(dev_priv, 0, 75);
ret = fthd_isp_cmd_channel_ae_stability_set(dev_priv, 0, 75);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_ae_stability_to_stable_set(dev_priv, 0, 8);
ret = fthd_isp_cmd_channel_ae_stability_to_stable_set(dev_priv, 0, 8);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_sif_pixel_format(dev_priv, 0, 1, 1);
ret = fthd_isp_cmd_channel_sif_pixel_format(dev_priv, 0, 1, 1);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_error_handling_config(dev_priv, 0, 2, 1);
ret = fthd_isp_cmd_channel_error_handling_config(dev_priv, 0, 2, 1);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_face_detection_enable(dev_priv, 0);
ret = fthd_isp_cmd_channel_face_detection_enable(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_face_detection_start(dev_priv, 0);
ret = fthd_isp_cmd_channel_face_detection_start(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_frame_rate_max(dev_priv, 0, dev_priv->frametime * 256);
ret = fthd_isp_cmd_channel_frame_rate_max(dev_priv, 0, dev_priv->frametime * 256);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_frame_rate_min(dev_priv, 0, dev_priv->frametime * 256);
ret = fthd_isp_cmd_channel_frame_rate_min(dev_priv, 0, dev_priv->frametime * 256);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_temporal_filter_start(dev_priv, 0);
ret = fthd_isp_cmd_channel_temporal_filter_start(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_motion_history_start(dev_priv, 0);
ret = fthd_isp_cmd_channel_motion_history_start(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_temporal_filter_enable(dev_priv, 0);
ret = fthd_isp_cmd_channel_temporal_filter_enable(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_streaming_mode(dev_priv, 0, 0);
ret = fthd_isp_cmd_channel_streaming_mode(dev_priv, 0, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_brightness_set(dev_priv, 0, 0x80);
ret = fthd_isp_cmd_channel_brightness_set(dev_priv, 0, 0x80);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_contrast_set(dev_priv, 0, 0x80);
ret = fthd_isp_cmd_channel_contrast_set(dev_priv, 0, 0x80);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_start(dev_priv);
ret = fthd_isp_cmd_channel_start(dev_priv);
if (ret)
return ret;
mdelay(1000); /* Needed to settle AE */
return 0;
}
int bcwc_stop_channel(struct bcwc_private *dev_priv, int channel)
int fthd_stop_channel(struct fthd_private *dev_priv, int channel)
{
int ret;
ret = bcwc_isp_cmd_channel_stop(dev_priv);
ret = fthd_isp_cmd_channel_stop(dev_priv);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_buffer_return(dev_priv, 0);
ret = fthd_isp_cmd_channel_buffer_return(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_face_detection_stop(dev_priv, 0);
ret = fthd_isp_cmd_channel_face_detection_stop(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_face_detection_disable(dev_priv, 0);
ret = fthd_isp_cmd_channel_face_detection_disable(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_temporal_filter_disable(dev_priv, 0);
ret = fthd_isp_cmd_channel_temporal_filter_disable(dev_priv, 0);
if (ret)
return ret;
ret = bcwc_isp_cmd_channel_motion_history_stop(dev_priv, 0);
ret = fthd_isp_cmd_channel_motion_history_stop(dev_priv, 0);
if (ret)
return ret;
return bcwc_isp_cmd_channel_temporal_filter_stop(dev_priv, 0);
return fthd_isp_cmd_channel_temporal_filter_stop(dev_priv, 0);
}
int isp_init(struct bcwc_private *dev_priv)
int isp_init(struct fthd_private *dev_priv)
{
struct isp_mem_obj *ipc_queue, *heap, *fw_args;
struct isp_fw_args *fw_args_data;
@@ -1157,31 +1157,31 @@ int isp_init(struct bcwc_private *dev_priv)
mdelay(10);
isp_enable_sensor(dev_priv);
BCWC_ISP_REG_WRITE(0, ISP_IPC_NUM_CHAN);
BCWC_ISP_REG_WRITE(0, ISP_IPC_QUEUE_SIZE);
BCWC_ISP_REG_WRITE(0, ISP_FW_SIZE);
BCWC_ISP_REG_WRITE(0, ISP_FW_HEAP_SIZE);
BCWC_ISP_REG_WRITE(0, ISP_FW_HEAP_ADDR);
BCWC_ISP_REG_WRITE(0, ISP_FW_HEAP_SIZE2);
BCWC_ISP_REG_WRITE(0, ISP_REG_C3018);
BCWC_ISP_REG_WRITE(0, ISP_REG_C301C);
FTHD_ISP_REG_WRITE(0, ISP_IPC_NUM_CHAN);
FTHD_ISP_REG_WRITE(0, ISP_IPC_QUEUE_SIZE);
FTHD_ISP_REG_WRITE(0, ISP_FW_SIZE);
FTHD_ISP_REG_WRITE(0, ISP_FW_HEAP_SIZE);
FTHD_ISP_REG_WRITE(0, ISP_FW_HEAP_ADDR);
FTHD_ISP_REG_WRITE(0, ISP_FW_HEAP_SIZE2);
FTHD_ISP_REG_WRITE(0, ISP_REG_C3018);
FTHD_ISP_REG_WRITE(0, ISP_REG_C301C);
BCWC_ISP_REG_WRITE(0xffffffff, ISP_REG_41024);
FTHD_ISP_REG_WRITE(0xffffffff, ISP_REG_41024);
/*
* Probably the IPC queue
* FIXME: Check if we can do 64bit writes on PCIe
*/
for (i = ISP_IPC_CHAN_START; i <= ISP_IPC_CHAN_END; i += 8) {
BCWC_ISP_REG_WRITE(0xffffffff, i);
BCWC_ISP_REG_WRITE(0, i + 4);
FTHD_ISP_REG_WRITE(0xffffffff, i);
FTHD_ISP_REG_WRITE(0, i + 4);
}
BCWC_ISP_REG_WRITE(0x80000000, ISP_REG_40008);
BCWC_ISP_REG_WRITE(0x1, ISP_REG_40004);
FTHD_ISP_REG_WRITE(0x80000000, ISP_REG_40008);
FTHD_ISP_REG_WRITE(0x1, ISP_REG_40004);
for (retries = 0; retries < 1000; retries++) {
reg = BCWC_ISP_REG_READ(ISP_REG_41000);
reg = FTHD_ISP_REG_READ(ISP_REG_41000);
if ((reg & 0xf0) > 0)
break;
mdelay(10);
@@ -1195,10 +1195,10 @@ int isp_init(struct bcwc_private *dev_priv)
dev_info(&dev_priv->pdev->dev, "ISP woke up after %dms\n",
(retries - 1) * 10);
BCWC_ISP_REG_WRITE(0xffffffff, ISP_REG_41024);
FTHD_ISP_REG_WRITE(0xffffffff, ISP_REG_41024);
num_channels = BCWC_ISP_REG_READ(ISP_IPC_NUM_CHAN);
queue_size = BCWC_ISP_REG_READ(ISP_IPC_QUEUE_SIZE) + 1;
num_channels = FTHD_ISP_REG_READ(ISP_IPC_NUM_CHAN);
queue_size = FTHD_ISP_REG_READ(ISP_IPC_QUEUE_SIZE) + 1;
dev_info(&dev_priv->pdev->dev,
"Number of IPC channels: %u, queue size: %u\n",
@@ -1215,16 +1215,16 @@ int isp_init(struct bcwc_private *dev_priv)
return -ENOMEM;
/* Firmware heap max size is 4mb */
heap_size = BCWC_ISP_REG_READ(ISP_FW_HEAP_SIZE);
heap_size = FTHD_ISP_REG_READ(ISP_FW_HEAP_SIZE);
if (heap_size == 0) {
BCWC_ISP_REG_WRITE(0, ISP_IPC_NUM_CHAN);
BCWC_ISP_REG_WRITE(ipc_queue->offset, ISP_IPC_QUEUE_SIZE);
BCWC_ISP_REG_WRITE(dev_priv->firmware->size_aligned, ISP_FW_SIZE);
BCWC_ISP_REG_WRITE(0x10000000 - dev_priv->firmware->size_aligned,
FTHD_ISP_REG_WRITE(0, ISP_IPC_NUM_CHAN);
FTHD_ISP_REG_WRITE(ipc_queue->offset, ISP_IPC_QUEUE_SIZE);
FTHD_ISP_REG_WRITE(dev_priv->firmware->size_aligned, ISP_FW_SIZE);
FTHD_ISP_REG_WRITE(0x10000000 - dev_priv->firmware->size_aligned,
ISP_FW_HEAP_SIZE);
BCWC_ISP_REG_WRITE(0, ISP_FW_HEAP_ADDR);
BCWC_ISP_REG_WRITE(0, ISP_FW_HEAP_SIZE2);
FTHD_ISP_REG_WRITE(0, ISP_FW_HEAP_ADDR);
FTHD_ISP_REG_WRITE(0, ISP_FW_HEAP_SIZE2);
} else {
/* Must be at least 0x1000 bytes */
heap_size = (heap_size < 0x1000) ? 0x1000 : heap_size;
@@ -1243,18 +1243,18 @@ int isp_init(struct bcwc_private *dev_priv)
if (!heap)
return -ENOMEM;
BCWC_ISP_REG_WRITE(0, ISP_IPC_NUM_CHAN);
FTHD_ISP_REG_WRITE(0, ISP_IPC_NUM_CHAN);
/* Set IPC queue base addr */
BCWC_ISP_REG_WRITE(ipc_queue->offset, ISP_IPC_QUEUE_SIZE);
FTHD_ISP_REG_WRITE(ipc_queue->offset, ISP_IPC_QUEUE_SIZE);
BCWC_ISP_REG_WRITE(FTHD_MEM_FW_SIZE, ISP_FW_SIZE);
FTHD_ISP_REG_WRITE(FTHD_MEM_FW_SIZE, ISP_FW_SIZE);
BCWC_ISP_REG_WRITE(0x10000000 - FTHD_MEM_FW_SIZE, ISP_FW_HEAP_SIZE);
FTHD_ISP_REG_WRITE(0x10000000 - FTHD_MEM_FW_SIZE, ISP_FW_HEAP_SIZE);
BCWC_ISP_REG_WRITE(heap->offset, ISP_FW_HEAP_ADDR);
FTHD_ISP_REG_WRITE(heap->offset, ISP_FW_HEAP_ADDR);
BCWC_ISP_REG_WRITE(heap->size, ISP_FW_HEAP_SIZE2);
FTHD_ISP_REG_WRITE(heap->size, ISP_FW_HEAP_SIZE2);
/* Set FW args */
fw_args = isp_mem_create(dev_priv, FTHD_MEM_FW_ARGS, sizeof(struct isp_fw_args));
@@ -1267,12 +1267,12 @@ int isp_init(struct bcwc_private *dev_priv)
fw_args_data->fw_arg = 0;
fw_args_data->full_stats_mode = 0;
BCWC_ISP_REG_WRITE(fw_args->offset, ISP_REG_C301C);
FTHD_ISP_REG_WRITE(fw_args->offset, ISP_REG_C301C);
BCWC_ISP_REG_WRITE(0x10, ISP_REG_41020);
FTHD_ISP_REG_WRITE(0x10, ISP_REG_41020);
for (retries = 0; retries < 1000; retries++) {
reg = BCWC_ISP_REG_READ(ISP_REG_41000);
reg = FTHD_ISP_REG_READ(ISP_REG_41000);
if ((reg & 0xf0) > 0)
break;
mdelay(10);
@@ -1286,24 +1286,24 @@ int isp_init(struct bcwc_private *dev_priv)
dev_info(&dev_priv->pdev->dev, "ISP second int after %dms\n",
(retries - 1) * 10);
offset = BCWC_ISP_REG_READ(ISP_IPC_NUM_CHAN);
offset = FTHD_ISP_REG_READ(ISP_IPC_NUM_CHAN);
dev_info(&dev_priv->pdev->dev, "Channel description table at %08x\n", offset);
ret = isp_fill_channel_info(dev_priv, offset, num_channels);
if (ret)
return ret;
bcwc_channel_ringbuf_init(dev_priv, dev_priv->channel_terminal);
bcwc_channel_ringbuf_init(dev_priv, dev_priv->channel_io);
bcwc_channel_ringbuf_init(dev_priv, dev_priv->channel_debug);
bcwc_channel_ringbuf_init(dev_priv, dev_priv->channel_buf_h2t);
bcwc_channel_ringbuf_init(dev_priv, dev_priv->channel_buf_t2h);
bcwc_channel_ringbuf_init(dev_priv, dev_priv->channel_shared_malloc);
bcwc_channel_ringbuf_init(dev_priv, dev_priv->channel_io_t2h);
fthd_channel_ringbuf_init(dev_priv, dev_priv->channel_terminal);
fthd_channel_ringbuf_init(dev_priv, dev_priv->channel_io);
fthd_channel_ringbuf_init(dev_priv, dev_priv->channel_debug);
fthd_channel_ringbuf_init(dev_priv, dev_priv->channel_buf_h2t);
fthd_channel_ringbuf_init(dev_priv, dev_priv->channel_buf_t2h);
fthd_channel_ringbuf_init(dev_priv, dev_priv->channel_shared_malloc);
fthd_channel_ringbuf_init(dev_priv, dev_priv->channel_io_t2h);
BCWC_ISP_REG_WRITE(0x8042006, ISP_FW_HEAP_SIZE);
FTHD_ISP_REG_WRITE(0x8042006, ISP_FW_HEAP_SIZE);
for (retries = 0; retries < 1000; retries++) {
reg = BCWC_ISP_REG_READ(ISP_FW_HEAP_SIZE);
reg = FTHD_ISP_REG_READ(ISP_FW_HEAP_SIZE);
if (!reg)
break;
mdelay(10);

92
bcwc_isp.h → fthd_isp.h
View File

@@ -33,7 +33,7 @@
#define FTHD_MEM_SIZE 0x8000000 /* 128mb */
#define FTHD_MEM_FW_SIZE 0x800000 /* 8mb */
enum bcwc_isp_cmds {
enum fthd_isp_cmds {
CISP_CMD_START = 0x0,
CISP_CMD_STOP = 0x1,
CISP_CMD_RESET = 0x2,
@@ -667,54 +667,54 @@ struct isp_cmd_channel_buffer_return {
#define to_isp_mem_obj(x) container_of((x), struct isp_mem_obj, base)
extern int isp_init(struct bcwc_private *dev_priv);
extern int isp_uninit(struct bcwc_private *dev_priv);
extern int isp_init(struct fthd_private *dev_priv);
extern int isp_uninit(struct fthd_private *dev_priv);
extern int isp_mem_init(struct bcwc_private *dev_priv);
extern struct isp_mem_obj *isp_mem_create(struct bcwc_private *dev_priv,
extern int isp_mem_init(struct fthd_private *dev_priv);
extern struct isp_mem_obj *isp_mem_create(struct fthd_private *dev_priv,
unsigned int type,
resource_size_t size);
extern int isp_mem_destroy(struct isp_mem_obj *obj);
extern int bcwc_isp_cmd_start(struct bcwc_private *dev_priv);
extern int bcwc_isp_cmd_stop(struct bcwc_private *dev_priv);
extern int isp_powerdown(struct bcwc_private *dev_priv);
extern int bcwc_isp_cmd_print_enable(struct bcwc_private *dev_priv, int enable);
extern int bcwc_isp_cmd_set_loadfile(struct bcwc_private *dev_priv);
extern int bcwc_isp_cmd_channel_info(struct bcwc_private *dev_priv);
extern int bcwc_isp_cmd_channel_start(struct bcwc_private *dev_priv);
extern int bcwc_isp_cmd_channel_stop(struct bcwc_private *dev_priv);
extern int bcwc_isp_cmd_channel_camera_config(struct bcwc_private *dev_priv);
extern int bcwc_isp_cmd_channel_crop_set(struct bcwc_private *dev_priv, int channel,
extern int fthd_isp_cmd_start(struct fthd_private *dev_priv);
extern int fthd_isp_cmd_stop(struct fthd_private *dev_priv);
extern int isp_powerdown(struct fthd_private *dev_priv);
extern int fthd_isp_cmd_print_enable(struct fthd_private *dev_priv, int enable);
extern int fthd_isp_cmd_set_loadfile(struct fthd_private *dev_priv);
extern int fthd_isp_cmd_channel_info(struct fthd_private *dev_priv);
extern int fthd_isp_cmd_channel_start(struct fthd_private *dev_priv);
extern int fthd_isp_cmd_channel_stop(struct fthd_private *dev_priv);
extern int fthd_isp_cmd_channel_camera_config(struct fthd_private *dev_priv);
extern int fthd_isp_cmd_channel_crop_set(struct fthd_private *dev_priv, int channel,
int x1, int y1, int x2, int y2);
extern int bcwc_isp_cmd_channel_output_config_set(struct bcwc_private *dev_priv, int channel, int x, int y, int pixelformat);
extern int bcwc_isp_cmd_channel_recycle_mode(struct bcwc_private *dev_priv, int channel, int mode);
extern int bcwc_isp_cmd_channel_recycle_start(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_camera_config_select(struct bcwc_private *dev_priv, int channel, int config);
extern int bcwc_isp_cmd_channel_drc_start(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_tone_curve_adaptation_start(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_sif_pixel_format(struct bcwc_private *dev_priv, int channel, int param1, int param2);
extern int bcwc_isp_cmd_channel_error_handling_config(struct bcwc_private *dev_priv, int channel, int param1, int param2);
extern int bcwc_isp_cmd_channel_streaming_mode(struct bcwc_private *dev_priv, int channel, int mode);
extern int bcwc_isp_cmd_channel_frame_rate_min(struct bcwc_private *dev_priv, int channel, int rate);
extern int bcwc_isp_cmd_channel_frame_rate_max(struct bcwc_private *dev_priv, int channel, int rate);
extern int bcwc_isp_cmd_camera_config(struct bcwc_private *dev_priv);
extern int bcwc_isp_cmd_channel_ae_speed_set(struct bcwc_private *dev_priv, int channel, int speed);
extern int bcwc_isp_cmd_channel_ae_stability_set(struct bcwc_private *dev_priv, int channel, int stability);
extern int bcwc_isp_cmd_channel_ae_stability_to_stable_set(struct bcwc_private *dev_priv, int channel, int value);
extern int bcwc_isp_cmd_channel_face_detection_enable(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_face_detection_disable(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_face_detection_start(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_face_detection_stop(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_temporal_filter_start(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_temporal_filter_stop(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_temporal_filter_enable(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_temporal_filter_disable(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_motion_history_start(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_motion_history_stop(struct bcwc_private *dev_priv, int channel);
extern int bcwc_isp_cmd_channel_ae_metering_mode_set(struct bcwc_private *dev_priv, int channel, int mode);
extern int bcwc_isp_cmd_channel_brightness_set(struct bcwc_private *dev_priv, int channel, int brightness);
extern int bcwc_isp_cmd_channel_contrast_set(struct bcwc_private *dev_priv, int channel, int contrast);
extern int bcwc_isp_cmd_channel_buffer_return(struct bcwc_private *dev_priv, int channel);
extern int bcwc_start_channel(struct bcwc_private *dev_priv, int channel);
extern int bcwc_stop_channel(struct bcwc_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_output_config_set(struct fthd_private *dev_priv, int channel, int x, int y, int pixelformat);
extern int fthd_isp_cmd_channel_recycle_mode(struct fthd_private *dev_priv, int channel, int mode);
extern int fthd_isp_cmd_channel_recycle_start(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_camera_config_select(struct fthd_private *dev_priv, int channel, int config);
extern int fthd_isp_cmd_channel_drc_start(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_tone_curve_adaptation_start(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_sif_pixel_format(struct fthd_private *dev_priv, int channel, int param1, int param2);
extern int fthd_isp_cmd_channel_error_handling_config(struct fthd_private *dev_priv, int channel, int param1, int param2);
extern int fthd_isp_cmd_channel_streaming_mode(struct fthd_private *dev_priv, int channel, int mode);
extern int fthd_isp_cmd_channel_frame_rate_min(struct fthd_private *dev_priv, int channel, int rate);
extern int fthd_isp_cmd_channel_frame_rate_max(struct fthd_private *dev_priv, int channel, int rate);
extern int fthd_isp_cmd_camera_config(struct fthd_private *dev_priv);
extern int fthd_isp_cmd_channel_ae_speed_set(struct fthd_private *dev_priv, int channel, int speed);
extern int fthd_isp_cmd_channel_ae_stability_set(struct fthd_private *dev_priv, int channel, int stability);
extern int fthd_isp_cmd_channel_ae_stability_to_stable_set(struct fthd_private *dev_priv, int channel, int value);
extern int fthd_isp_cmd_channel_face_detection_enable(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_face_detection_disable(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_face_detection_start(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_face_detection_stop(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_temporal_filter_start(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_temporal_filter_stop(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_temporal_filter_enable(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_temporal_filter_disable(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_motion_history_start(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_motion_history_stop(struct fthd_private *dev_priv, int channel);
extern int fthd_isp_cmd_channel_ae_metering_mode_set(struct fthd_private *dev_priv, int channel, int mode);
extern int fthd_isp_cmd_channel_brightness_set(struct fthd_private *dev_priv, int channel, int brightness);
extern int fthd_isp_cmd_channel_contrast_set(struct fthd_private *dev_priv, int channel, int contrast);
extern int fthd_isp_cmd_channel_buffer_return(struct fthd_private *dev_priv, int channel);
extern int fthd_start_channel(struct fthd_private *dev_priv, int channel);
extern int fthd_stop_channel(struct fthd_private *dev_priv, int channel);
#endif

4
bcwc_reg.h → fthd_reg.h
View File

@@ -17,8 +17,8 @@
*
*/
#ifndef _BCWC_REG_H
#define _BCWC_REG_H
#ifndef _FTHD_REG_H
#define _FTHD_REG_H
/* PCIE link regs */
#define S2_PCIE_LINK_D000 0xd000

36
bcwc_ringbuf.c → fthd_ringbuf.c
View File

@@ -22,21 +22,21 @@
#include <linux/pci.h>
#include <linux/io.h>
#include <linux/delay.h>
#include "bcwc_drv.h"
#include "bcwc_hw.h"
#include "bcwc_ringbuf.h"
#include "bcwc_isp.h"
#include "fthd_drv.h"
#include "fthd_hw.h"
#include "fthd_ringbuf.h"
#include "fthd_isp.h"
static struct bcwc_ringbuf_entry *get_entry_addr(struct bcwc_private *dev_priv,
static struct fthd_ringbuf_entry *get_entry_addr(struct fthd_private *dev_priv,
struct fw_channel *chan, int num)
{
return (struct bcwc_ringbuf_entry *)(chan->ringbuf.virt_addr \
+ num * sizeof(struct bcwc_ringbuf_entry));
return (struct fthd_ringbuf_entry *)(chan->ringbuf.virt_addr \
+ num * sizeof(struct fthd_ringbuf_entry));
}
void bcwc_channel_ringbuf_dump(struct bcwc_private *dev_priv, struct fw_channel *chan)
void fthd_channel_ringbuf_dump(struct fthd_private *dev_priv, struct fw_channel *chan)
{
struct bcwc_ringbuf_entry *entry;
struct fthd_ringbuf_entry *entry;
char pos;
int i;
@@ -45,16 +45,16 @@ void bcwc_channel_ringbuf_dump(struct bcwc_private *dev_priv, struct fw_channel
pos = '*';
else
pos = ' ';
entry = dev_priv->s2_mem + chan->offset + i * sizeof(struct bcwc_ringbuf_entry);
entry = dev_priv->s2_mem + chan->offset + i * sizeof(struct fthd_ringbuf_entry);
pr_debug("%s: %c%3.3d: ADDRESS %08x REQUEST_SIZE %08x RESPONSE_SIZE %08x\n", chan->name,
pos, i, entry->address_flags, entry->request_size, entry->response_size);
}
}
void bcwc_channel_ringbuf_init(struct bcwc_private *dev_priv, struct fw_channel *chan)
void fthd_channel_ringbuf_init(struct fthd_private *dev_priv, struct fw_channel *chan)
{
struct bcwc_ringbuf_entry *entry;
struct fthd_ringbuf_entry *entry;
int i;
chan->ringbuf.idx = 0;
@@ -62,7 +62,7 @@ void bcwc_channel_ringbuf_init(struct bcwc_private *dev_priv, struct fw_channel
chan->ringbuf.virt_addr = dev_priv->s2_mem + chan->offset;
if (chan->type == RINGBUF_TYPE_H2T) {
entry = (struct bcwc_ringbuf_entry *)chan->ringbuf.virt_addr;
entry = (struct fthd_ringbuf_entry *)chan->ringbuf.virt_addr;
pr_debug("clearing ringbuf %s at %p (size %d)\n", chan->name, entry, chan->size);
spin_lock_irq(&chan->lock);
@@ -76,10 +76,10 @@ void bcwc_channel_ringbuf_init(struct bcwc_private *dev_priv, struct fw_channel
}
}
struct bcwc_ringbuf_entry *bcwc_channel_ringbuf_send(struct bcwc_private *dev_priv, struct fw_channel *chan,
struct fthd_ringbuf_entry *fthd_channel_ringbuf_send(struct fthd_private *dev_priv, struct fw_channel *chan,
u32 data_offset, u32 request_size, u32 response_size)
{
struct bcwc_ringbuf_entry *entry;
struct fthd_ringbuf_entry *entry;
pr_debug("send %08x\n", data_offset);
@@ -104,15 +104,15 @@ struct bcwc_ringbuf_entry *bcwc_channel_ringbuf_send(struct bcwc_private *dev_pr
spin_unlock_irq(&chan->lock);
spin_lock_irq(&dev_priv->io_lock);
BCWC_ISP_REG_WRITE(0x10 << chan->source, ISP_REG_41020);
FTHD_ISP_REG_WRITE(0x10 << chan->source, ISP_REG_41020);
spin_unlock_irq(&dev_priv->io_lock);
return entry;
}
struct bcwc_ringbuf_entry *bcwc_channel_ringbuf_receive(struct bcwc_private *dev_priv,
struct fthd_ringbuf_entry *fthd_channel_ringbuf_receive(struct fthd_private *dev_priv,
struct fw_channel *chan)
{
struct bcwc_ringbuf_entry *entry, *ret = NULL;
struct fthd_ringbuf_entry *entry, *ret = NULL;
spin_lock_irq(&chan->lock);
if (chan->rx_lock)

20
bcwc_ringbuf.h → fthd_ringbuf.h
View File

@@ -17,8 +17,8 @@
*
*/
#ifndef _BCWC_RINGBUF_H
#define _BCWC_RINGBUF_H
#ifndef _FTHD_RINGBUF_H
#define _FTHD_RINGBUF_H
enum ringbuf_type_t {
RINGBUF_TYPE_H2T=0,
@@ -26,14 +26,14 @@ enum ringbuf_type_t {
RINGBUF_TYPE_UNIDIRECTIONAL,
};
struct bcwc_ringbuf {
struct fthd_ringbuf {
void *doorbell;
u32 phys_offset;
int idx;
u8 *virt_addr;
};
struct bcwc_ringbuf_entry {
struct fthd_ringbuf_entry {
u32 address_flags;
u32 request_size;
u32 response_size;
@@ -41,14 +41,14 @@ struct bcwc_ringbuf_entry {
} __attribute__((packed));
struct fw_channel;
struct bcwc_private;
extern void bcwc_channel_ringbuf_dump(struct bcwc_private *dev_priv, struct fw_channel *chan);
extern void bcwc_channel_ringbuf_init(struct bcwc_private *dev_priv, struct fw_channel *chan);
extern struct bcwc_ringbuf_entry *bcwc_channel_ringbuf_get_entry(struct bcwc_private *, struct fw_channel *);
extern struct bcwc_ringbuf_entry *bcwc_channel_ringbuf_send(struct bcwc_private *dev_priv, struct fw_channel *chan,
struct fthd_private;
extern void fthd_channel_ringbuf_dump(struct fthd_private *dev_priv, struct fw_channel *chan);
extern void fthd_channel_ringbuf_init(struct fthd_private *dev_priv, struct fw_channel *chan);
extern struct fthd_ringbuf_entry *fthd_channel_ringbuf_get_entry(struct fthd_private *, struct fw_channel *);
extern struct fthd_ringbuf_entry *fthd_channel_ringbuf_send(struct fthd_private *dev_priv, struct fw_channel *chan,
u32 data_offset, u32 request_size, u32 response_size);
struct bcwc_ringbuf_entry *bcwc_channel_ringbuf_receive(struct bcwc_private *dev_priv,
struct fthd_ringbuf_entry *fthd_channel_ringbuf_receive(struct fthd_private *dev_priv,
struct fw_channel *chan);
#endif

200
bcwc_v4l2.c → fthd_v4l2.c
View File

@@ -26,13 +26,13 @@
#include <media/v4l2-dev.h>
#include <media/v4l2-ioctl.h>
#include <media/videobuf2-dma-sg.h>
#include "bcwc_drv.h"
#include "bcwc_hw.h"
#include "bcwc_isp.h"
#include "bcwc_ringbuf.h"
#include "bcwc_buffer.h"
#include "fthd_drv.h"
#include "fthd_hw.h"
#include "fthd_isp.h"
#include "fthd_ringbuf.h"
#include "fthd_buffer.h"
#define BCWC_FMT(_desc, _x, _y, _sizeimage, _planes, _pixfmt) \
#define FTHD_FMT(_desc, _x, _y, _sizeimage, _planes, _pixfmt) \
{ \
.fmt.width = (_x), \
.fmt.height = (_y), \
@@ -42,38 +42,38 @@
.desc = (_desc), \
}
struct bcwc_fmt bcwc_formats[] = {
BCWC_FMT("1280x720 YUYV (4:2:2)", 1280, 720, 1280 * 720 * 2, 1, V4L2_PIX_FMT_YUYV),
BCWC_FMT("1280x720 YVYU (4:2:2)", 1280, 720, 1280 * 720 * 2, 1, V4L2_PIX_FMT_YVYU),
BCWC_FMT("1280x720 NV16", 1280, 720, 1280 * 720, 2, V4L2_PIX_FMT_NV16),
struct fthd_fmt fthd_formats[] = {
FTHD_FMT("1280x720 YUYV (4:2:2)", 1280, 720, 1280 * 720 * 2, 1, V4L2_PIX_FMT_YUYV),
FTHD_FMT("1280x720 YVYU (4:2:2)", 1280, 720, 1280 * 720 * 2, 1, V4L2_PIX_FMT_YVYU),
FTHD_FMT("1280x720 NV16", 1280, 720, 1280 * 720, 2, V4L2_PIX_FMT_NV16),
BCWC_FMT("1024x576 YUYV (4:2:2)", 1024, 576, 1024 * 576 * 2, 1, V4L2_PIX_FMT_YUYV),
BCWC_FMT("1024x576 YVYU (4:2:2)", 1024, 576, 1024 * 576 * 2, 1, V4L2_PIX_FMT_YVYU),
BCWC_FMT("1024x576 NV16", 1024, 576, 1024 * 576, 2, V4L2_PIX_FMT_NV16),
FTHD_FMT("1024x576 YUYV (4:2:2)", 1024, 576, 1024 * 576 * 2, 1, V4L2_PIX_FMT_YUYV),
FTHD_FMT("1024x576 YVYU (4:2:2)", 1024, 576, 1024 * 576 * 2, 1, V4L2_PIX_FMT_YVYU),
FTHD_FMT("1024x576 NV16", 1024, 576, 1024 * 576, 2, V4L2_PIX_FMT_NV16),
BCWC_FMT("1024x720 YUYV (4:2:2)", 1024, 720, 1024 * 720 * 2, 1, V4L2_PIX_FMT_YUYV),
BCWC_FMT("1024x720 YVYU (4:2:2)", 1024, 720, 1024 * 720 * 2, 1, V4L2_PIX_FMT_YVYU),
BCWC_FMT("1024x720 NV16", 1024, 720, 1024 * 720, 2, V4L2_PIX_FMT_NV16),
FTHD_FMT("1024x720 YUYV (4:2:2)", 1024, 720, 1024 * 720 * 2, 1, V4L2_PIX_FMT_YUYV),
FTHD_FMT("1024x720 YVYU (4:2:2)", 1024, 720, 1024 * 720 * 2, 1, V4L2_PIX_FMT_YVYU),
FTHD_FMT("1024x720 NV16", 1024, 720, 1024 * 720, 2, V4L2_PIX_FMT_NV16),
BCWC_FMT("640x480 YUYV (4:2:2)", 640, 480, 640 * 480 * 2, 1, V4L2_PIX_FMT_YUYV),
BCWC_FMT("640x480 YVYU (4:2:2)", 640, 480, 640 * 480 * 2, 1, V4L2_PIX_FMT_YVYU),
BCWC_FMT("640x480 NV16", 640, 480, 640 * 480, 2, V4L2_PIX_FMT_NV16),
FTHD_FMT("640x480 YUYV (4:2:2)", 640, 480, 640 * 480 * 2, 1, V4L2_PIX_FMT_YUYV),
FTHD_FMT("640x480 YVYU (4:2:2)", 640, 480, 640 * 480 * 2, 1, V4L2_PIX_FMT_YVYU),
FTHD_FMT("640x480 NV16", 640, 480, 640 * 480, 2, V4L2_PIX_FMT_NV16),
BCWC_FMT("320x240 YUYV (4:2:2)", 320, 240, 320 * 240 * 2, 1, V4L2_PIX_FMT_YUYV),
BCWC_FMT("320x240 YVYU (4:2:2)", 320, 240, 320 * 240 * 2, 1, V4L2_PIX_FMT_YVYU),
BCWC_FMT("320x240 NV16", 320, 240, 320 * 240, 2, V4L2_PIX_FMT_NV16),
FTHD_FMT("320x240 YUYV (4:2:2)", 320, 240, 320 * 240 * 2, 1, V4L2_PIX_FMT_YUYV),
FTHD_FMT("320x240 YVYU (4:2:2)", 320, 240, 320 * 240 * 2, 1, V4L2_PIX_FMT_YVYU),
FTHD_FMT("320x240 NV16", 320, 240, 320 * 240, 2, V4L2_PIX_FMT_NV16),
BCWC_FMT("384x288 YUYV (4:2:2)", 384, 288, 384 * 288 * 2, 1, V4L2_PIX_FMT_YUYV),
BCWC_FMT("384x288 YVYU (4:2:2)", 384, 288, 384 * 288 * 2, 1, V4L2_PIX_FMT_YVYU),
BCWC_FMT("384x288 NV16", 384, 288, 384 * 288, 2, V4L2_PIX_FMT_NV16),
FTHD_FMT("384x288 YUYV (4:2:2)", 384, 288, 384 * 288 * 2, 1, V4L2_PIX_FMT_YUYV),
FTHD_FMT("384x288 YVYU (4:2:2)", 384, 288, 384 * 288 * 2, 1, V4L2_PIX_FMT_YVYU),
FTHD_FMT("384x288 NV16", 384, 288, 384 * 288, 2, V4L2_PIX_FMT_NV16),
};
static int bcwc_buffer_queue_setup(struct vb2_queue *vq,
static int fthd_buffer_queue_setup(struct vb2_queue *vq,
const struct v4l2_format *fmt,
unsigned int *nbuffers, unsigned int *nplanes,
unsigned int sizes[], void *alloc_ctxs[])
{
struct bcwc_private *dev_priv = vb2_get_drv_priv(vq);
struct fthd_private *dev_priv = vb2_get_drv_priv(vq);
int i, total_size = 0;
*nplanes = dev_priv->fmt.planes;
@@ -96,13 +96,13 @@ static int bcwc_buffer_queue_setup(struct vb2_queue *vq,
return 0;
}
static void bcwc_buffer_cleanup(struct vb2_buffer *vb)
static void fthd_buffer_cleanup(struct vb2_buffer *vb)
{
struct bcwc_private *dev_priv = vb2_get_drv_priv(vb->vb2_queue);
struct fthd_private *dev_priv = vb2_get_drv_priv(vb->vb2_queue);
struct h2t_buf_ctx *ctx = NULL;
int i;
for(i = 0; i < BCWC_BUFFERS; i++) {
for(i = 0; i < FTHD_BUFFERS; i++) {
if (dev_priv->h2t_bufs[i].vb == vb) {
ctx = dev_priv->h2t_bufs + i;
break;
@@ -121,12 +121,12 @@ static void bcwc_buffer_cleanup(struct vb2_buffer *vb)
ctx->dma_desc_obj = NULL;
}
static int bcwc_send_h2t_buffer(struct bcwc_private *dev_priv, struct h2t_buf_ctx *ctx)
static int fthd_send_h2t_buffer(struct fthd_private *dev_priv, struct h2t_buf_ctx *ctx)
{
volatile struct bcwc_ringbuf_entry *entry;
volatile struct fthd_ringbuf_entry *entry;
// pr_debug("sending buffer %p\n", ctx->vb);
entry = bcwc_channel_ringbuf_send(dev_priv, dev_priv->channel_buf_h2t,
entry = fthd_channel_ringbuf_send(dev_priv, dev_priv->channel_buf_h2t,
ctx->dma_desc_obj->offset, 0x180, 0x30000000);
if (!entry)
@@ -140,22 +140,22 @@ static int bcwc_send_h2t_buffer(struct bcwc_private *dev_priv, struct h2t_buf_ct
return 0;
}
void bcwc_buffer_queued_handler(struct bcwc_private *dev_priv, struct dma_descriptor_list *list)
void fthd_buffer_queued_handler(struct fthd_private *dev_priv, struct dma_descriptor_list *list)
{
struct h2t_buf_ctx *ctx = (struct h2t_buf_ctx *)list->desc[0].tag;
ctx->done = 1;
wake_up_interruptible(&ctx->wq);
}
static void bcwc_buffer_queue(struct vb2_buffer *vb)
static void fthd_buffer_queue(struct vb2_buffer *vb)
{
struct bcwc_private *dev_priv = vb2_get_drv_priv(vb->vb2_queue);
struct fthd_private *dev_priv = vb2_get_drv_priv(vb->vb2_queue);
struct dma_descriptor_list *list;
struct h2t_buf_ctx *ctx = NULL;
int i;
pr_debug("vb = %p\n", vb);
for(i = 0; i < BCWC_BUFFERS; i++) {
for(i = 0; i < FTHD_BUFFERS; i++) {
if (dev_priv->h2t_bufs[i].vb == vb) {
ctx = dev_priv->h2t_bufs + i;
break;
@@ -178,7 +178,7 @@ static void bcwc_buffer_queue(struct vb2_buffer *vb)
pr_debug("%d: field0: %d, count %d, pool %d, addr0 0x%08x, addr1 0x%08x tag 0x%08llx vb = %p\n", i, list->field0,
list->desc[i].count, list->desc[i].pool, list->desc[i].addr0, list->desc[i].addr1, list->desc[i].tag, ctx->vb);
if (bcwc_send_h2t_buffer(dev_priv, ctx)) {
if (fthd_send_h2t_buffer(dev_priv, ctx)) {
vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
ctx->state = BUF_ALLOC;
}
@@ -186,15 +186,15 @@ static void bcwc_buffer_queue(struct vb2_buffer *vb)
return;
}
static int bcwc_buffer_prepare(struct vb2_buffer *vb)
static int fthd_buffer_prepare(struct vb2_buffer *vb)
{
struct bcwc_private *dev_priv = vb2_get_drv_priv(vb->vb2_queue);
struct fthd_private *dev_priv = vb2_get_drv_priv(vb->vb2_queue);
struct sg_table *sgtable;
struct h2t_buf_ctx *ctx = NULL;
struct dma_descriptor_list *dma_list;
int i;
for(i = 0; i < BCWC_BUFFERS; i++) {
for(i = 0; i < FTHD_BUFFERS; i++) {
if (dev_priv->h2t_bufs[i].state == BUF_FREE ||
(dev_priv->h2t_bufs[i].state == BUF_ALLOC && dev_priv->h2t_bufs[i].vb == vb)) {
ctx = dev_priv->h2t_bufs + i;
@@ -244,7 +244,7 @@ static int bcwc_buffer_prepare(struct vb2_buffer *vb)
return 0;
}
void bcwc_buffer_return_handler(struct bcwc_private *dev_priv, struct dma_descriptor_list *list, int size)
void fthd_buffer_return_handler(struct fthd_private *dev_priv, struct dma_descriptor_list *list, int size)
{
struct h2t_buf_ctx *ctx;
int i;
@@ -262,23 +262,23 @@ void bcwc_buffer_return_handler(struct bcwc_private *dev_priv, struct dma_descri
}
}
static int bcwc_start_streaming(struct vb2_queue *vq, unsigned int count)
static int fthd_start_streaming(struct vb2_queue *vq, unsigned int count)
{
struct bcwc_private *dev_priv = vb2_get_drv_priv(vq);
struct fthd_private *dev_priv = vb2_get_drv_priv(vq);
struct h2t_buf_ctx *ctx;
int i, ret;
pr_debug("count = %d\n", count);
ret = bcwc_start_channel(dev_priv, 0);
ret = fthd_start_channel(dev_priv, 0);
if (ret)
return ret;
for(i = 0; i < BCWC_BUFFERS && count; i++, count--) {
for(i = 0; i < FTHD_BUFFERS && count; i++, count--) {
ctx = dev_priv->h2t_bufs + i;
if (ctx->state != BUF_DRV_QUEUED)
continue;
if (bcwc_send_h2t_buffer(dev_priv, ctx)) {
if (fthd_send_h2t_buffer(dev_priv, ctx)) {
vb2_buffer_done(ctx->vb, VB2_BUF_STATE_ERROR);
ctx->state = BUF_ALLOC;
}
@@ -287,20 +287,20 @@ static int bcwc_start_streaming(struct vb2_queue *vq, unsigned int count)
return 0;
}
static void bcwc_stop_streaming(struct vb2_queue *vq)
static void fthd_stop_streaming(struct vb2_queue *vq)
{
struct bcwc_private *dev_priv = vb2_get_drv_priv(vq);
struct fthd_private *dev_priv = vb2_get_drv_priv(vq);
struct h2t_buf_ctx *ctx;
int ret, i;
ret = bcwc_stop_channel(dev_priv, 0);
ret = fthd_stop_channel(dev_priv, 0);
if (!ret) {
pr_debug("waiting for buffers...\n");
vb2_wait_for_all_buffers(vq);
pr_debug("done\n");
} else {
/* Firmware doesn't respond. */
for(i = 0; i < BCWC_BUFFERS;i++) {
for(i = 0; i < FTHD_BUFFERS;i++) {
ctx = dev_priv->h2t_bufs + i;
if (ctx->state == BUF_DRV_QUEUED || ctx->state == BUF_HW_QUEUED) {
vb2_buffer_done(ctx->vb, VB2_BUF_STATE_DONE);
@@ -312,17 +312,17 @@ static void bcwc_stop_streaming(struct vb2_queue *vq)
}
static struct vb2_ops vb2_queue_ops = {
.queue_setup = bcwc_buffer_queue_setup,
.buf_prepare = bcwc_buffer_prepare,
.buf_cleanup = bcwc_buffer_cleanup,
.start_streaming = bcwc_start_streaming,
.stop_streaming = bcwc_stop_streaming,
.buf_queue = bcwc_buffer_queue,
.queue_setup = fthd_buffer_queue_setup,
.buf_prepare = fthd_buffer_prepare,
.buf_cleanup = fthd_buffer_cleanup,
.start_streaming = fthd_start_streaming,
.stop_streaming = fthd_stop_streaming,
.buf_queue = fthd_buffer_queue,
.wait_prepare = vb2_ops_wait_prepare,
.wait_finish = vb2_ops_wait_finish,
};
static struct v4l2_file_operations bcwc_vdev_fops = {
static struct v4l2_file_operations fthd_vdev_fops = {
.owner = THIS_MODULE,
.open = v4l2_fh_open,
@@ -332,7 +332,7 @@ static struct v4l2_file_operations bcwc_vdev_fops = {
.unlocked_ioctl = video_ioctl2
};
static int bcwc_v4l2_ioctl_enum_input(struct file *filp, void *priv,
static int fthd_v4l2_ioctl_enum_input(struct file *filp, void *priv,
struct v4l2_input *input)
{
if (input->index != 0)
@@ -344,31 +344,31 @@ static int bcwc_v4l2_ioctl_enum_input(struct file *filp, void *priv,
return 0;
}
static int bcwc_v4l2_ioctl_g_input(struct file *filp, void *priv, unsigned int *i)
static int fthd_v4l2_ioctl_g_input(struct file *filp, void *priv, unsigned int *i)
{
*i = 0;
return 0;
}
static int bcwc_v4l2_ioctl_s_input(struct file *filp, void *priv, unsigned int i)
static int fthd_v4l2_ioctl_s_input(struct file *filp, void *priv, unsigned int i)
{
if (i != 0)
return -EINVAL;
return 0;
}
static int bcwc_v4l2_ioctl_s_std(struct file *filp, void *priv, v4l2_std_id std)
static int fthd_v4l2_ioctl_s_std(struct file *filp, void *priv, v4l2_std_id std)
{
return 0;
}
static int bcwc_v4l2_ioctl_g_std(struct file *filp, void *priv, v4l2_std_id *std)
static int fthd_v4l2_ioctl_g_std(struct file *filp, void *priv, v4l2_std_id *std)
{
*std = V4L2_STD_NTSC_M;
return 0;
}
static int bcwc_v4l2_ioctl_querycap(struct file *filp, void *priv,
static int fthd_v4l2_ioctl_querycap(struct file *filp, void *priv,
struct v4l2_capability *cap)
{
strcpy(cap->driver, "bcwc");
@@ -379,21 +379,21 @@ static int bcwc_v4l2_ioctl_querycap(struct file *filp, void *priv,
return 0;
}
static int bcwc_v4l2_ioctl_enum_fmt_vid_cap(struct file *filp, void *priv,
static int fthd_v4l2_ioctl_enum_fmt_vid_cap(struct file *filp, void *priv,
struct v4l2_fmtdesc *fmt)
{
if (fmt->index >= ARRAY_SIZE(bcwc_formats))
if (fmt->index >= ARRAY_SIZE(fthd_formats))
return -EINVAL;
strlcpy(fmt->description, bcwc_formats[fmt->index].desc,
strlcpy(fmt->description, fthd_formats[fmt->index].desc,
sizeof(fmt->description));
fmt->pixelformat = bcwc_formats[fmt->index].fmt.pixelformat;
fmt->pixelformat = fthd_formats[fmt->index].fmt.pixelformat;
return 0;
}
static int bcwc_v4l2_ioctl_try_fmt_vid_cap(struct file *filp, void *_priv,
static int fthd_v4l2_ioctl_try_fmt_vid_cap(struct file *filp, void *_priv,
struct v4l2_format *fmt)
{
struct bcwc_private *dev_priv = video_drvdata(filp);
struct fthd_private *dev_priv = video_drvdata(filp);
pr_info("%s: %dx%d\n", __FUNCTION__, fmt->fmt.pix.width, fmt->fmt.pix.height);
@@ -423,19 +423,19 @@ static int bcwc_v4l2_ioctl_try_fmt_vid_cap(struct file *filp, void *_priv,
return 0;
}
static int bcwc_v4l2_ioctl_g_fmt_vid_cap(struct file *filp, void *priv,
static int fthd_v4l2_ioctl_g_fmt_vid_cap(struct file *filp, void *priv,
struct v4l2_format *fmt)
{
struct bcwc_private *dev_priv = video_drvdata(filp);
struct fthd_private *dev_priv = video_drvdata(filp);
pr_debug("%s\n", __FUNCTION__);
fmt->fmt.pix = dev_priv->fmt.fmt;
return 0;
}
static int bcwc_v4l2_ioctl_s_fmt_vid_cap(struct file *filp, void *priv,
static int fthd_v4l2_ioctl_s_fmt_vid_cap(struct file *filp, void *priv,
struct v4l2_format *fmt)
{
struct bcwc_private *dev_priv = video_drvdata(filp);
struct fthd_private *dev_priv = video_drvdata(filp);
if (fmt->fmt.pix.width < 320 ||
fmt->fmt.pix.height < 240 ||
@@ -473,10 +473,10 @@ static int bcwc_v4l2_ioctl_s_fmt_vid_cap(struct file *filp, void *priv,
}
static int bcwc_v4l2_ioctl_g_parm(struct file *filp, void *priv,
static int fthd_v4l2_ioctl_g_parm(struct file *filp, void *priv,
struct v4l2_streamparm *parm)
{
struct bcwc_private *priv_dev = video_drvdata(filp);
struct fthd_private *priv_dev = video_drvdata(filp);
struct v4l2_fract timeperframe = {
.numerator = priv_dev->frametime,
.denominator = 1000,
@@ -491,11 +491,11 @@ static int bcwc_v4l2_ioctl_g_parm(struct file *filp, void *priv,
return 0;
}
static int bcwc_v4l2_ioctl_s_parm(struct file *filp, void *priv,
static int fthd_v4l2_ioctl_s_parm(struct file *filp, void *priv,
struct v4l2_streamparm *parm)
{
struct bcwc_private *dev_priv = video_drvdata(filp);
struct fthd_private *dev_priv = video_drvdata(filp);
struct v4l2_fract *timeperframe;
if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
@@ -511,10 +511,10 @@ static int bcwc_v4l2_ioctl_s_parm(struct file *filp, void *priv,
dev_priv->frametime = clamp_t(unsigned int, timeperframe->numerator * 1000 /
timeperframe->denominator, 20, 500);
return bcwc_v4l2_ioctl_g_parm(filp, priv, parm);
return fthd_v4l2_ioctl_g_parm(filp, priv, parm);
}
static int bcwc_v4l2_ioctl_enum_framesizes(struct file *filp, void *priv,
static int fthd_v4l2_ioctl_enum_framesizes(struct file *filp, void *priv,
struct v4l2_frmsizeenum *sizes)
{
sizes->type = V4L2_FRMSIZE_TYPE_CONTINUOUS;
@@ -527,7 +527,7 @@ static int bcwc_v4l2_ioctl_enum_framesizes(struct file *filp, void *priv,
return 0;
}
static int bcwc_v4l2_ioctl_enum_frameintervals(struct file *filp, void *priv,
static int fthd_v4l2_ioctl_enum_frameintervals(struct file *filp, void *priv,
struct v4l2_frmivalenum *interval)
{
pr_debug("%s\n", __FUNCTION__);
@@ -546,18 +546,18 @@ static int bcwc_v4l2_ioctl_enum_frameintervals(struct file *filp, void *priv,
return -ENODEV;
}
static struct v4l2_ioctl_ops bcwc_ioctl_ops = {
.vidioc_enum_input = bcwc_v4l2_ioctl_enum_input,
.vidioc_g_input = bcwc_v4l2_ioctl_g_input,
.vidioc_s_input = bcwc_v4l2_ioctl_s_input,
.vidioc_s_std = bcwc_v4l2_ioctl_s_std,
.vidioc_g_std = bcwc_v4l2_ioctl_g_std,
.vidioc_enum_fmt_vid_cap = bcwc_v4l2_ioctl_enum_fmt_vid_cap,
.vidioc_try_fmt_vid_cap = bcwc_v4l2_ioctl_try_fmt_vid_cap,
static struct v4l2_ioctl_ops fthd_ioctl_ops = {
.vidioc_enum_input = fthd_v4l2_ioctl_enum_input,
.vidioc_g_input = fthd_v4l2_ioctl_g_input,
.vidioc_s_input = fthd_v4l2_ioctl_s_input,
.vidioc_s_std = fthd_v4l2_ioctl_s_std,
.vidioc_g_std = fthd_v4l2_ioctl_g_std,
.vidioc_enum_fmt_vid_cap = fthd_v4l2_ioctl_enum_fmt_vid_cap,
.vidioc_try_fmt_vid_cap = fthd_v4l2_ioctl_try_fmt_vid_cap,
.vidioc_g_fmt_vid_cap = bcwc_v4l2_ioctl_g_fmt_vid_cap,
.vidioc_s_fmt_vid_cap = bcwc_v4l2_ioctl_s_fmt_vid_cap,
.vidioc_querycap = bcwc_v4l2_ioctl_querycap,
.vidioc_g_fmt_vid_cap = fthd_v4l2_ioctl_g_fmt_vid_cap,
.vidioc_s_fmt_vid_cap = fthd_v4l2_ioctl_s_fmt_vid_cap,
.vidioc_querycap = fthd_v4l2_ioctl_querycap,
.vidioc_reqbufs = vb2_ioctl_reqbufs,
@@ -569,13 +569,13 @@ static struct v4l2_ioctl_ops bcwc_ioctl_ops = {
.vidioc_streamon = vb2_ioctl_streamon,
.vidioc_streamoff = vb2_ioctl_streamoff,
.vidioc_g_parm = bcwc_v4l2_ioctl_g_parm,
.vidioc_s_parm = bcwc_v4l2_ioctl_s_parm,
.vidioc_enum_framesizes = bcwc_v4l2_ioctl_enum_framesizes,
.vidioc_enum_frameintervals = bcwc_v4l2_ioctl_enum_frameintervals,
.vidioc_g_parm = fthd_v4l2_ioctl_g_parm,
.vidioc_s_parm = fthd_v4l2_ioctl_s_parm,
.vidioc_enum_framesizes = fthd_v4l2_ioctl_enum_framesizes,
.vidioc_enum_frameintervals = fthd_v4l2_ioctl_enum_frameintervals,
};
int bcwc_v4l2_register(struct bcwc_private *dev_priv)
int fthd_v4l2_register(struct fthd_private *dev_priv)
{
struct v4l2_device *v4l2_dev = &dev_priv->v4l2_dev;
struct video_device *vdev;
@@ -614,8 +614,8 @@ int bcwc_v4l2_register(struct bcwc_private *dev_priv)
vdev->v4l2_dev = v4l2_dev;
strcpy(vdev->name, "Apple Facetime HD"); // XXX: Length?
vdev->vfl_dir = VFL_DIR_RX;
vdev->fops = &bcwc_vdev_fops;
vdev->ioctl_ops = &bcwc_ioctl_ops;
vdev->fops = &fthd_vdev_fops;
vdev->ioctl_ops = &fthd_ioctl_ops;
vdev->queue = q;
vdev->release = video_device_release;
@@ -636,7 +636,7 @@ fail:
return ret;
}
void bcwc_v4l2_unregister(struct bcwc_private *dev_priv)
void fthd_v4l2_unregister(struct fthd_private *dev_priv)
{
vb2_dma_sg_cleanup_ctx(dev_priv->alloc_ctx);

12
bcwc_v4l2.h → fthd_v4l2.h
View File

@@ -17,8 +17,8 @@
*
*/
#ifndef _BCWC_V4L2_H
#define _BCWC_V4L2_H
#ifndef _FTHD_V4L2_H
#define _FTHD_V4L2_H
#include <linux/pci.h>
#include <linux/spinlock.h>
@@ -27,7 +27,7 @@
#include <media/videobuf-dma-sg.h>
#include <media/v4l2-device.h>
struct bcwc_fmt {
struct fthd_fmt {
struct v4l2_pix_format fmt;
const char *desc;
int range; /* CISP_COMMAND_CH_OUTPUT_CONFIG_SET */
@@ -38,8 +38,8 @@ struct bcwc_fmt {
int y2;
};
struct bcwc_private;
extern int bcwc_v4l2_register(struct bcwc_private *dev_priv);
extern void bcwc_v4l2_unregister(struct bcwc_private *dev_priv);
struct fthd_private;
extern int fthd_v4l2_register(struct fthd_private *dev_priv);
extern void fthd_v4l2_unregister(struct fthd_private *dev_priv);
#endif