diff --git a/bcwc_drv.h b/bcwc_drv.h
index 892593e..732876a 100644
--- a/bcwc_drv.h
+++ b/bcwc_drv.h
@@ -44,7 +44,7 @@ struct bcwc_private {
 
 	/* DDR_PHY saved registers. Offsets need to be initialized somewhere */
 	u32 ddr_phy_num_regs;
-	struct bcwc_reg ddr_reg_map[DDR_PHY_NUM_REGS];
+	struct bcwc_reg ddr_phy_reg_map[DDR_PHY_NUM_REGS];
 };
 
 #endif
diff --git a/bcwc_hw.c b/bcwc_hw.c
index 89f35d1..09ed581 100644
--- a/bcwc_hw.c
+++ b/bcwc_hw.c
@@ -13,6 +13,26 @@
 #include "bcwc_drv.h"
 #include "bcwc_hw.h"
 
+/* FIXME: Double check these */
+static u32 ddr_phy_reg_map[] = {
+	0x0000, 0x0004, 0x0010, 0x0014, 0x0018, 0x001c, 0x0020, 0x0030,
+	0x0034, 0x0038, 0x003c, 0x0040, 0x0044, 0x0048, 0x004c, 0x0050,
+	0x0054, 0x0058, 0x005c, 0x0060, 0x0064, 0x0068, 0x006c, 0x0070,
+	0x0074, 0x0078, 0x007c, 0x0080, 0x0084, 0x0090, 0x0094, 0x0098,
+	0x009c, 0x00a0, 0x00a4, 0x00b0, 0x00b4, 0x00b8, 0x00bc, 0x00c0,
+	0x0200, 0x0204, 0x0208, 0x020c, 0x0210, 0x0214, 0x0218, 0x021c,
+	0x0220, 0x0224, 0x0228, 0x022c, 0x0230, 0x0234, 0x0238, 0x023c,
+	0x0240, 0x0244, 0x0248, 0x024c, 0x0250, 0x0254, 0x0258, 0x025c,
+	0x0260, 0x0264, 0x0268, 0x026c, 0x0270, 0x0274, 0x02a4, 0x02a8,
+	0x02ac, 0x02b0, 0x02b4, 0x02b8, 0x02bc, 0x02c0, 0x02c4, 0x02c8,
+	0x02cc, 0x02d0, 0x02d4, 0x02d8, 0x02dc, 0x02e0, 0x02e4, 0x02e8,
+	0x02ec, 0x02f0, 0x02f4, 0x02f8, 0x02fc, 0x0300, 0x0304, 0x0308,
+	0x030c, 0x0310, 0x0314, 0x0328, 0x032c, 0x0330, 0x0334, 0x0338,
+	0x033c, 0x0348, 0x034c, 0x0350, 0x0354, 0x0358, 0x035c, 0x0360,
+	0x0364, 0x0370, 0x0374, 0x0378, 0x037c, 0x0380, 0x0384, 0x0388,
+	0x038c, 0x0390, 0x0394, 0x03a0, 0x03a4, 0x03a8, 0x03ac,
+};
+
 /* Used after most PCI Link IO writes */
 static inline void bcwc_hw_pci_post(struct bcwc_private *dev_priv)
 {
@@ -739,9 +759,9 @@ static int bcwc_hw_save_ddr_phy_regs(struct bcwc_private *dev_priv)
 		return -ENOENT;
 
 	for (i = 0; i < dev_priv->ddr_phy_num_regs; i++) {
-		offset = dev_priv->ddr_reg_map[i].offset;
+		offset = dev_priv->ddr_phy_reg_map[i].offset;
 		reg = BCWC_ISP_REG_READ(offset + DDR_PHY_REG_BASE);
-		dev_priv->ddr_reg_map[i].value = reg;
+		dev_priv->ddr_phy_reg_map[i].value = reg;
 	}
 
 	return 0;
@@ -894,16 +914,18 @@ static int bcwc_hw_power_off(struct bcwc_private *dev_priv)
 
 int bcwc_hw_init(struct bcwc_private *dev_priv)
 {
-	int ret;
+	int ret, i;
 
 	ret = bcwc_hw_s2_init_pcie_link(dev_priv);
 	if (ret)
 		goto out;
 
-	/* Set DDR speed to 450 MHz */
 	bcwc_hw_s2_preinit_ddr_controller_soc(dev_priv);
 	bcwc_hw_s2_init_ddr_controller_soc(dev_priv);
-	// bcwc_hw_isp_init(dev_priv);
+
+	/* Initialize the reg map */
+	for (i = 0; i < DDR_PHY_NUM_REGS; i++)
+		dev_priv->ddr_phy_reg_map[i].offset = ddr_phy_reg_map[i];
 
 out:
 	return ret;